| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -mtriple=amdgcn -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefixes=GCN |
| |
| --- |
| |
| name: zext_sgpr_s1_to_sgpr_s16 |
| legalized: true |
| regBankSelected: true |
| body: | |
| bb.0: |
| liveins: $sgpr0 |
| |
| ; GCN-LABEL: name: zext_sgpr_s1_to_sgpr_s16 |
| ; GCN: liveins: $sgpr0 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 |
| ; GCN-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], 1, implicit-def dead $scc |
| ; GCN-NEXT: [[S_SEXT_I32_I16_:%[0-9]+]]:sreg_32 = S_SEXT_I32_I16 [[S_AND_B32_]] |
| ; GCN-NEXT: $sgpr0 = COPY [[S_SEXT_I32_I16_]] |
| %0:sgpr(s32) = COPY $sgpr0 |
| %1:sgpr(s1) = G_TRUNC %0 |
| %2:sgpr(s16) = G_ZEXT %1 |
| %3:sgpr(s32) = G_SEXT %2 |
| $sgpr0 = COPY %3 |
| ... |
| |
| --- |
| |
| name: zext_sgpr_s1_to_sgpr_s32 |
| legalized: true |
| regBankSelected: true |
| body: | |
| bb.0: |
| liveins: $sgpr0 |
| |
| ; GCN-LABEL: name: zext_sgpr_s1_to_sgpr_s32 |
| ; GCN: liveins: $sgpr0 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 |
| ; GCN-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], 1, implicit-def dead $scc |
| ; GCN-NEXT: $sgpr0 = COPY [[S_AND_B32_]] |
| %0:sgpr(s32) = COPY $sgpr0 |
| %1:sgpr(s1) = G_TRUNC %0 |
| %2:sgpr(s32) = G_ZEXT %1 |
| $sgpr0 = COPY %2 |
| ... |
| |
| --- |
| |
| name: zext_sgpr_s1_to_sgpr_s64 |
| legalized: true |
| regBankSelected: true |
| body: | |
| bb.0: |
| liveins: $sgpr0 |
| |
| ; GCN-LABEL: name: zext_sgpr_s1_to_sgpr_s64 |
| ; GCN: liveins: $sgpr0 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 |
| ; GCN-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF |
| ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[DEF]], %subreg.sub1 |
| ; GCN-NEXT: [[S_BFE_U64_:%[0-9]+]]:sreg_64 = S_BFE_U64 [[REG_SEQUENCE]], 65536, implicit-def $scc |
| ; GCN-NEXT: $sgpr0_sgpr1 = COPY [[S_BFE_U64_]] |
| %0:sgpr(s32) = COPY $sgpr0 |
| %1:sgpr(s1) = G_TRUNC %0 |
| %2:sgpr(s64) = G_ZEXT %1 |
| $sgpr0_sgpr1 = COPY %2 |
| ... |
| |
| --- |
| |
| name: zext_sgpr_s16_to_sgpr_s32 |
| legalized: true |
| regBankSelected: true |
| body: | |
| bb.0: |
| liveins: $sgpr0 |
| |
| ; GCN-LABEL: name: zext_sgpr_s16_to_sgpr_s32 |
| ; GCN: liveins: $sgpr0 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 |
| ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 65535 |
| ; GCN-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[S_MOV_B32_]], [[COPY]], implicit-def dead $scc |
| ; GCN-NEXT: $sgpr0 = COPY [[S_AND_B32_]] |
| %0:sgpr(s32) = COPY $sgpr0 |
| %1:sgpr(s16) = G_TRUNC %0 |
| %2:sgpr(s32) = G_ZEXT %1 |
| $sgpr0 = COPY %2 |
| |
| ... |
| |
| --- |
| |
| name: zext_sgpr_s16_to_sgpr_s64 |
| legalized: true |
| regBankSelected: true |
| body: | |
| bb.0: |
| liveins: $sgpr0 |
| |
| ; GCN-LABEL: name: zext_sgpr_s16_to_sgpr_s64 |
| ; GCN: liveins: $sgpr0 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 |
| ; GCN-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF |
| ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[DEF]], %subreg.sub1 |
| ; GCN-NEXT: [[S_BFE_U64_:%[0-9]+]]:sreg_64 = S_BFE_U64 [[REG_SEQUENCE]], 1048576, implicit-def $scc |
| ; GCN-NEXT: $sgpr0_sgpr1 = COPY [[S_BFE_U64_]] |
| %0:sgpr(s32) = COPY $sgpr0 |
| %1:sgpr(s16) = G_TRUNC %0 |
| %2:sgpr(s64) = G_ZEXT %1 |
| $sgpr0_sgpr1 = COPY %2 |
| |
| ... |
| |
| --- |
| |
| name: zext_sgpr_s32_to_sgpr_s64 |
| legalized: true |
| regBankSelected: true |
| body: | |
| bb.0: |
| liveins: $sgpr0 |
| |
| ; GCN-LABEL: name: zext_sgpr_s32_to_sgpr_s64 |
| ; GCN: liveins: $sgpr0 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32_xexec_hi_and_sreg_32_xm0 = COPY $sgpr0 |
| ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 0 |
| ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[S_MOV_B32_]], %subreg.sub1 |
| ; GCN-NEXT: $sgpr0_sgpr1 = COPY [[REG_SEQUENCE]] |
| %0:sgpr(s32) = COPY $sgpr0 |
| %1:sgpr(s64) = G_ZEXT %0 |
| $sgpr0_sgpr1 = COPY %1 |
| |
| ... |
| |
| # --- |
| |
| # name: zext_vcc_s1_to_vgpr_s32 |
| # legalized: true |
| # regBankSelected: true |
| # body: | |
| # bb.0: |
| # liveins: $vgpr0 |
| |
| # %0:vgpr(s32) = COPY $vgpr0 |
| # %1:vcc(s1) = G_ICMP intpred(eq), %0, %0 |
| # %2:vgpr(s32) = G_ZEXT %1 |
| # $vgpr0 = COPY %2 |
| # ... |
| |
| --- |
| |
| name: zext_vgpr_s1_to_vgpr_s16 |
| legalized: true |
| regBankSelected: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; GCN-LABEL: name: zext_vgpr_s1_to_vgpr_s16 |
| ; GCN: liveins: $vgpr0 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GCN-NEXT: [[V_AND_B32_e32_:%[0-9]+]]:vgpr_32 = V_AND_B32_e32 1, [[COPY]], implicit $exec |
| ; GCN-NEXT: [[V_BFE_I32_e64_:%[0-9]+]]:vgpr_32 = V_BFE_I32_e64 [[V_AND_B32_e32_]], 0, 16, implicit $exec |
| ; GCN-NEXT: $vgpr0 = COPY [[V_BFE_I32_e64_]] |
| %0:vgpr(s32) = COPY $vgpr0 |
| %1:vgpr(s1) = G_TRUNC %0 |
| %2:vgpr(s16) = G_ZEXT %1 |
| %3:vgpr(s32) = G_SEXT %2 |
| $vgpr0 = COPY %3 |
| ... |
| |
| --- |
| |
| name: zext_vgpr_s1_to_vgpr_s32 |
| legalized: true |
| regBankSelected: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; GCN-LABEL: name: zext_vgpr_s1_to_vgpr_s32 |
| ; GCN: liveins: $vgpr0 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GCN-NEXT: [[V_AND_B32_e32_:%[0-9]+]]:vgpr_32 = V_AND_B32_e32 1, [[COPY]], implicit $exec |
| ; GCN-NEXT: $vgpr0 = COPY [[V_AND_B32_e32_]] |
| %0:vgpr(s32) = COPY $vgpr0 |
| %1:vgpr(s1) = G_TRUNC %0 |
| %2:vgpr(s32) = G_ZEXT %1 |
| $vgpr0 = COPY %2 |
| ... |
| |
| --- |
| |
| name: zext_vgpr_s16_to_vgpr_s32 |
| legalized: true |
| regBankSelected: true |
| body: | |
| bb.0: |
| liveins: $vgpr0 |
| |
| ; GCN-LABEL: name: zext_vgpr_s16_to_vgpr_s32 |
| ; GCN: liveins: $vgpr0 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 65535 |
| ; GCN-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec |
| ; GCN-NEXT: $vgpr0 = COPY [[V_AND_B32_e64_]] |
| %0:vgpr(s32) = COPY $vgpr0 |
| %1:vgpr(s16) = G_TRUNC %0 |
| %2:vgpr(s32) = G_ZEXT %1 |
| $vgpr0 = COPY %2 |
| |
| ... |
| |
| --- |
| |
| name: zext_sgpr_reg_class_s1_to_sgpr_s32 |
| legalized: true |
| regBankSelected: true |
| body: | |
| bb.0: |
| liveins: $sgpr0 |
| |
| ; GCN-LABEL: name: zext_sgpr_reg_class_s1_to_sgpr_s32 |
| ; GCN: liveins: $sgpr0 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 |
| ; GCN-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], 1, implicit-def dead $scc |
| ; GCN-NEXT: $sgpr0 = COPY [[S_AND_B32_]] |
| %0:sgpr(s32) = COPY $sgpr0 |
| %1:sreg_32(s1) = G_TRUNC %0 |
| %2:sgpr(s32) = G_ZEXT %1 |
| $sgpr0 = COPY %2 |
| ... |