| #ifndef __ASM_X86_MSR_H_ |
| #define __ASM_X86_MSR_H_ |
| |
| #include <asm/msr-index.h> |
| |
| #ifndef __ASSEMBLY__ |
| # include <linux/types.h> |
| #endif |
| |
| #ifdef __i386__ |
| |
| |
| #else /* __i386__ */ |
| |
| #ifndef __ASSEMBLY__ |
| #include <linux/errno.h> |
| /* |
| * Access to machine-specific registers (available on 586 and better only) |
| * Note: the rd* operations modify the parameters directly (without using |
| * pointer indirection), this allows gcc to optimize better |
| */ |
| |
| #define rdmsr(msr,val1,val2) \ |
| __asm__ __volatile__("rdmsr" \ |
| : "=a" (val1), "=d" (val2) \ |
| : "c" (msr)) |
| |
| |
| #define rdmsrl(msr,val) do { unsigned long a__,b__; \ |
| __asm__ __volatile__("rdmsr" \ |
| : "=a" (a__), "=d" (b__) \ |
| : "c" (msr)); \ |
| val = a__ | (b__<<32); \ |
| } while(0) |
| |
| #define wrmsr(msr,val1,val2) \ |
| __asm__ __volatile__("wrmsr" \ |
| : /* no outputs */ \ |
| : "c" (msr), "a" (val1), "d" (val2)) |
| |
| #define wrmsrl(msr,val) wrmsr(msr,(__u32)((__u64)(val)),((__u64)(val))>>32) |
| |
| #define rdtsc(low,high) \ |
| __asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high)) |
| |
| #define rdtscl(low) \ |
| __asm__ __volatile__ ("rdtsc" : "=a" (low) : : "edx") |
| |
| #define rdtscp(low,high,aux) \ |
| __asm__ __volatile__ (".byte 0x0f,0x01,0xf9" : "=a" (low), "=d" (high), "=c" (aux)) |
| |
| #define rdtscll(val) do { \ |
| unsigned int __a,__d; \ |
| __asm__ __volatile__("rdtsc" : "=a" (__a), "=d" (__d)); \ |
| (val) = ((unsigned long)__a) | (((unsigned long)__d)<<32); \ |
| } while(0) |
| |
| #define rdtscpll(val, aux) do { \ |
| unsigned long __a, __d; \ |
| __asm__ __volatile__ (".byte 0x0f,0x01,0xf9" : "=a" (__a), "=d" (__d), "=c" (aux)); \ |
| (val) = (__d << 32) | __a; \ |
| } while (0) |
| |
| #define write_tsc(val1,val2) wrmsr(0x10, val1, val2) |
| |
| #define write_rdtscp_aux(val) wrmsr(0xc0000103, val, 0) |
| |
| #define rdpmc(counter,low,high) \ |
| __asm__ __volatile__("rdpmc" \ |
| : "=a" (low), "=d" (high) \ |
| : "c" (counter)) |
| |
| |
| static __inline__ void cpuid(int op, unsigned int *eax, unsigned int *ebx, |
| unsigned int *ecx, unsigned int *edx) |
| { |
| __asm__("cpuid" |
| : "=a" (*eax), |
| "=b" (*ebx), |
| "=c" (*ecx), |
| "=d" (*edx) |
| : "0" (op)); |
| } |
| |
| /* Some CPUID calls want 'count' to be placed in ecx */ |
| static __inline__ void cpuid_count(int op, int count, int *eax, int *ebx, int *ecx, |
| int *edx) |
| { |
| __asm__("cpuid" |
| : "=a" (*eax), |
| "=b" (*ebx), |
| "=c" (*ecx), |
| "=d" (*edx) |
| : "0" (op), "c" (count)); |
| } |
| |
| /* |
| * CPUID functions returning a single datum |
| */ |
| static __inline__ unsigned int cpuid_eax(unsigned int op) |
| { |
| unsigned int eax; |
| |
| __asm__("cpuid" |
| : "=a" (eax) |
| : "0" (op) |
| : "bx", "cx", "dx"); |
| return eax; |
| } |
| static __inline__ unsigned int cpuid_ebx(unsigned int op) |
| { |
| unsigned int eax, ebx; |
| |
| __asm__("cpuid" |
| : "=a" (eax), "=b" (ebx) |
| : "0" (op) |
| : "cx", "dx" ); |
| return ebx; |
| } |
| static __inline__ unsigned int cpuid_ecx(unsigned int op) |
| { |
| unsigned int eax, ecx; |
| |
| __asm__("cpuid" |
| : "=a" (eax), "=c" (ecx) |
| : "0" (op) |
| : "bx", "dx" ); |
| return ecx; |
| } |
| static __inline__ unsigned int cpuid_edx(unsigned int op) |
| { |
| unsigned int eax, edx; |
| |
| __asm__("cpuid" |
| : "=a" (eax), "=d" (edx) |
| : "0" (op) |
| : "bx", "cx"); |
| return edx; |
| } |
| |
| #endif /* __ASSEMBLY__ */ |
| |
| #endif /* !__i386__ */ |
| |
| #endif |