/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|*                                                                            *|
|*Intrinsic Function Source Fragment                                          *|
|*                                                                            *|
|* Automatically generated file, do not edit!                                 *|
|*                                                                            *|
\*===----------------------------------------------------------------------===*/

// VisualStudio defines setjmp as _setjmp
#if defined(_MSC_VER) && defined(setjmp) && \
                         !defined(setjmp_undefined_for_msvc)
#  pragma push_macro("setjmp")
#  undef setjmp
#  define setjmp_undefined_for_msvc
#endif

// Enum values for Intrinsics.h
#ifdef GET_INTRINSIC_ENUM_VALUES
    AMDGPU_div_fixup,                          // llvm.AMDGPU.div.fixup
    AMDGPU_div_fmas,                           // llvm.AMDGPU.div.fmas
    AMDGPU_div_scale,                          // llvm.AMDGPU.div.scale
    AMDGPU_rcp,                                // llvm.AMDGPU.rcp
    AMDGPU_rsq,                                // llvm.AMDGPU.rsq
    AMDGPU_rsq_clamped,                        // llvm.AMDGPU.rsq.clamped
    AMDGPU_trig_preop,                         // llvm.AMDGPU.trig.preop
    aarch64_clrex,                             // llvm.aarch64.clrex
    aarch64_crc32b,                            // llvm.aarch64.crc32b
    aarch64_crc32cb,                           // llvm.aarch64.crc32cb
    aarch64_crc32ch,                           // llvm.aarch64.crc32ch
    aarch64_crc32cw,                           // llvm.aarch64.crc32cw
    aarch64_crc32cx,                           // llvm.aarch64.crc32cx
    aarch64_crc32h,                            // llvm.aarch64.crc32h
    aarch64_crc32w,                            // llvm.aarch64.crc32w
    aarch64_crc32x,                            // llvm.aarch64.crc32x
    aarch64_crypto_aesd,                       // llvm.aarch64.crypto.aesd
    aarch64_crypto_aese,                       // llvm.aarch64.crypto.aese
    aarch64_crypto_aesimc,                     // llvm.aarch64.crypto.aesimc
    aarch64_crypto_aesmc,                      // llvm.aarch64.crypto.aesmc
    aarch64_crypto_sha1c,                      // llvm.aarch64.crypto.sha1c
    aarch64_crypto_sha1h,                      // llvm.aarch64.crypto.sha1h
    aarch64_crypto_sha1m,                      // llvm.aarch64.crypto.sha1m
    aarch64_crypto_sha1p,                      // llvm.aarch64.crypto.sha1p
    aarch64_crypto_sha1su0,                    // llvm.aarch64.crypto.sha1su0
    aarch64_crypto_sha1su1,                    // llvm.aarch64.crypto.sha1su1
    aarch64_crypto_sha256h,                    // llvm.aarch64.crypto.sha256h
    aarch64_crypto_sha256h2,                   // llvm.aarch64.crypto.sha256h2
    aarch64_crypto_sha256su0,                  // llvm.aarch64.crypto.sha256su0
    aarch64_crypto_sha256su1,                  // llvm.aarch64.crypto.sha256su1
    aarch64_dmb,                               // llvm.aarch64.dmb
    aarch64_dsb,                               // llvm.aarch64.dsb
    aarch64_hint,                              // llvm.aarch64.hint
    aarch64_isb,                               // llvm.aarch64.isb
    aarch64_ldaxp,                             // llvm.aarch64.ldaxp
    aarch64_ldaxr,                             // llvm.aarch64.ldaxr
    aarch64_ldxp,                              // llvm.aarch64.ldxp
    aarch64_ldxr,                              // llvm.aarch64.ldxr
    aarch64_neon_abs,                          // llvm.aarch64.neon.abs
    aarch64_neon_addhn,                        // llvm.aarch64.neon.addhn
    aarch64_neon_addp,                         // llvm.aarch64.neon.addp
    aarch64_neon_cls,                          // llvm.aarch64.neon.cls
    aarch64_neon_fabd,                         // llvm.aarch64.neon.fabd
    aarch64_neon_facge,                        // llvm.aarch64.neon.facge
    aarch64_neon_facgt,                        // llvm.aarch64.neon.facgt
    aarch64_neon_faddv,                        // llvm.aarch64.neon.faddv
    aarch64_neon_fcvtas,                       // llvm.aarch64.neon.fcvtas
    aarch64_neon_fcvtau,                       // llvm.aarch64.neon.fcvtau
    aarch64_neon_fcvtms,                       // llvm.aarch64.neon.fcvtms
    aarch64_neon_fcvtmu,                       // llvm.aarch64.neon.fcvtmu
    aarch64_neon_fcvtns,                       // llvm.aarch64.neon.fcvtns
    aarch64_neon_fcvtnu,                       // llvm.aarch64.neon.fcvtnu
    aarch64_neon_fcvtps,                       // llvm.aarch64.neon.fcvtps
    aarch64_neon_fcvtpu,                       // llvm.aarch64.neon.fcvtpu
    aarch64_neon_fcvtxn,                       // llvm.aarch64.neon.fcvtxn
    aarch64_neon_fcvtzs,                       // llvm.aarch64.neon.fcvtzs
    aarch64_neon_fcvtzu,                       // llvm.aarch64.neon.fcvtzu
    aarch64_neon_fmax,                         // llvm.aarch64.neon.fmax
    aarch64_neon_fmaxnm,                       // llvm.aarch64.neon.fmaxnm
    aarch64_neon_fmaxnmp,                      // llvm.aarch64.neon.fmaxnmp
    aarch64_neon_fmaxnmv,                      // llvm.aarch64.neon.fmaxnmv
    aarch64_neon_fmaxp,                        // llvm.aarch64.neon.fmaxp
    aarch64_neon_fmaxv,                        // llvm.aarch64.neon.fmaxv
    aarch64_neon_fmin,                         // llvm.aarch64.neon.fmin
    aarch64_neon_fminnm,                       // llvm.aarch64.neon.fminnm
    aarch64_neon_fminnmp,                      // llvm.aarch64.neon.fminnmp
    aarch64_neon_fminnmv,                      // llvm.aarch64.neon.fminnmv
    aarch64_neon_fminp,                        // llvm.aarch64.neon.fminp
    aarch64_neon_fminv,                        // llvm.aarch64.neon.fminv
    aarch64_neon_fmulx,                        // llvm.aarch64.neon.fmulx
    aarch64_neon_frecpe,                       // llvm.aarch64.neon.frecpe
    aarch64_neon_frecps,                       // llvm.aarch64.neon.frecps
    aarch64_neon_frecpx,                       // llvm.aarch64.neon.frecpx
    aarch64_neon_frintn,                       // llvm.aarch64.neon.frintn
    aarch64_neon_frsqrte,                      // llvm.aarch64.neon.frsqrte
    aarch64_neon_frsqrts,                      // llvm.aarch64.neon.frsqrts
    aarch64_neon_ld1x2,                        // llvm.aarch64.neon.ld1x2
    aarch64_neon_ld1x3,                        // llvm.aarch64.neon.ld1x3
    aarch64_neon_ld1x4,                        // llvm.aarch64.neon.ld1x4
    aarch64_neon_ld2,                          // llvm.aarch64.neon.ld2
    aarch64_neon_ld2lane,                      // llvm.aarch64.neon.ld2lane
    aarch64_neon_ld2r,                         // llvm.aarch64.neon.ld2r
    aarch64_neon_ld3,                          // llvm.aarch64.neon.ld3
    aarch64_neon_ld3lane,                      // llvm.aarch64.neon.ld3lane
    aarch64_neon_ld3r,                         // llvm.aarch64.neon.ld3r
    aarch64_neon_ld4,                          // llvm.aarch64.neon.ld4
    aarch64_neon_ld4lane,                      // llvm.aarch64.neon.ld4lane
    aarch64_neon_ld4r,                         // llvm.aarch64.neon.ld4r
    aarch64_neon_pmul,                         // llvm.aarch64.neon.pmul
    aarch64_neon_pmull,                        // llvm.aarch64.neon.pmull
    aarch64_neon_pmull64,                      // llvm.aarch64.neon.pmull64
    aarch64_neon_raddhn,                       // llvm.aarch64.neon.raddhn
    aarch64_neon_rbit,                         // llvm.aarch64.neon.rbit
    aarch64_neon_rshrn,                        // llvm.aarch64.neon.rshrn
    aarch64_neon_rsubhn,                       // llvm.aarch64.neon.rsubhn
    aarch64_neon_sabd,                         // llvm.aarch64.neon.sabd
    aarch64_neon_saddlp,                       // llvm.aarch64.neon.saddlp
    aarch64_neon_saddlv,                       // llvm.aarch64.neon.saddlv
    aarch64_neon_saddv,                        // llvm.aarch64.neon.saddv
    aarch64_neon_scalar_sqxtn,                 // llvm.aarch64.neon.scalar.sqxtn
    aarch64_neon_scalar_sqxtun,                // llvm.aarch64.neon.scalar.sqxtun
    aarch64_neon_scalar_uqxtn,                 // llvm.aarch64.neon.scalar.uqxtn
    aarch64_neon_shadd,                        // llvm.aarch64.neon.shadd
    aarch64_neon_shll,                         // llvm.aarch64.neon.shll
    aarch64_neon_shsub,                        // llvm.aarch64.neon.shsub
    aarch64_neon_smax,                         // llvm.aarch64.neon.smax
    aarch64_neon_smaxp,                        // llvm.aarch64.neon.smaxp
    aarch64_neon_smaxv,                        // llvm.aarch64.neon.smaxv
    aarch64_neon_smin,                         // llvm.aarch64.neon.smin
    aarch64_neon_sminp,                        // llvm.aarch64.neon.sminp
    aarch64_neon_sminv,                        // llvm.aarch64.neon.sminv
    aarch64_neon_smull,                        // llvm.aarch64.neon.smull
    aarch64_neon_sqabs,                        // llvm.aarch64.neon.sqabs
    aarch64_neon_sqadd,                        // llvm.aarch64.neon.sqadd
    aarch64_neon_sqdmulh,                      // llvm.aarch64.neon.sqdmulh
    aarch64_neon_sqdmull,                      // llvm.aarch64.neon.sqdmull
    aarch64_neon_sqdmulls_scalar,              // llvm.aarch64.neon.sqdmulls.scalar
    aarch64_neon_sqneg,                        // llvm.aarch64.neon.sqneg
    aarch64_neon_sqrdmulh,                     // llvm.aarch64.neon.sqrdmulh
    aarch64_neon_sqrshl,                       // llvm.aarch64.neon.sqrshl
    aarch64_neon_sqrshrn,                      // llvm.aarch64.neon.sqrshrn
    aarch64_neon_sqrshrun,                     // llvm.aarch64.neon.sqrshrun
    aarch64_neon_sqshl,                        // llvm.aarch64.neon.sqshl
    aarch64_neon_sqshlu,                       // llvm.aarch64.neon.sqshlu
    aarch64_neon_sqshrn,                       // llvm.aarch64.neon.sqshrn
    aarch64_neon_sqshrun,                      // llvm.aarch64.neon.sqshrun
    aarch64_neon_sqsub,                        // llvm.aarch64.neon.sqsub
    aarch64_neon_sqxtn,                        // llvm.aarch64.neon.sqxtn
    aarch64_neon_sqxtun,                       // llvm.aarch64.neon.sqxtun
    aarch64_neon_srhadd,                       // llvm.aarch64.neon.srhadd
    aarch64_neon_srshl,                        // llvm.aarch64.neon.srshl
    aarch64_neon_sshl,                         // llvm.aarch64.neon.sshl
    aarch64_neon_sshll,                        // llvm.aarch64.neon.sshll
    aarch64_neon_st1x2,                        // llvm.aarch64.neon.st1x2
    aarch64_neon_st1x3,                        // llvm.aarch64.neon.st1x3
    aarch64_neon_st1x4,                        // llvm.aarch64.neon.st1x4
    aarch64_neon_st2,                          // llvm.aarch64.neon.st2
    aarch64_neon_st2lane,                      // llvm.aarch64.neon.st2lane
    aarch64_neon_st3,                          // llvm.aarch64.neon.st3
    aarch64_neon_st3lane,                      // llvm.aarch64.neon.st3lane
    aarch64_neon_st4,                          // llvm.aarch64.neon.st4
    aarch64_neon_st4lane,                      // llvm.aarch64.neon.st4lane
    aarch64_neon_subhn,                        // llvm.aarch64.neon.subhn
    aarch64_neon_suqadd,                       // llvm.aarch64.neon.suqadd
    aarch64_neon_tbl1,                         // llvm.aarch64.neon.tbl1
    aarch64_neon_tbl2,                         // llvm.aarch64.neon.tbl2
    aarch64_neon_tbl3,                         // llvm.aarch64.neon.tbl3
    aarch64_neon_tbl4,                         // llvm.aarch64.neon.tbl4
    aarch64_neon_tbx1,                         // llvm.aarch64.neon.tbx1
    aarch64_neon_tbx2,                         // llvm.aarch64.neon.tbx2
    aarch64_neon_tbx3,                         // llvm.aarch64.neon.tbx3
    aarch64_neon_tbx4,                         // llvm.aarch64.neon.tbx4
    aarch64_neon_uabd,                         // llvm.aarch64.neon.uabd
    aarch64_neon_uaddlp,                       // llvm.aarch64.neon.uaddlp
    aarch64_neon_uaddlv,                       // llvm.aarch64.neon.uaddlv
    aarch64_neon_uaddv,                        // llvm.aarch64.neon.uaddv
    aarch64_neon_uhadd,                        // llvm.aarch64.neon.uhadd
    aarch64_neon_uhsub,                        // llvm.aarch64.neon.uhsub
    aarch64_neon_umax,                         // llvm.aarch64.neon.umax
    aarch64_neon_umaxp,                        // llvm.aarch64.neon.umaxp
    aarch64_neon_umaxv,                        // llvm.aarch64.neon.umaxv
    aarch64_neon_umin,                         // llvm.aarch64.neon.umin
    aarch64_neon_uminp,                        // llvm.aarch64.neon.uminp
    aarch64_neon_uminv,                        // llvm.aarch64.neon.uminv
    aarch64_neon_umull,                        // llvm.aarch64.neon.umull
    aarch64_neon_uqadd,                        // llvm.aarch64.neon.uqadd
    aarch64_neon_uqrshl,                       // llvm.aarch64.neon.uqrshl
    aarch64_neon_uqrshrn,                      // llvm.aarch64.neon.uqrshrn
    aarch64_neon_uqshl,                        // llvm.aarch64.neon.uqshl
    aarch64_neon_uqshrn,                       // llvm.aarch64.neon.uqshrn
    aarch64_neon_uqsub,                        // llvm.aarch64.neon.uqsub
    aarch64_neon_uqxtn,                        // llvm.aarch64.neon.uqxtn
    aarch64_neon_urecpe,                       // llvm.aarch64.neon.urecpe
    aarch64_neon_urhadd,                       // llvm.aarch64.neon.urhadd
    aarch64_neon_urshl,                        // llvm.aarch64.neon.urshl
    aarch64_neon_ursqrte,                      // llvm.aarch64.neon.ursqrte
    aarch64_neon_ushl,                         // llvm.aarch64.neon.ushl
    aarch64_neon_ushll,                        // llvm.aarch64.neon.ushll
    aarch64_neon_usqadd,                       // llvm.aarch64.neon.usqadd
    aarch64_neon_vcopy_lane,                   // llvm.aarch64.neon.vcopy.lane
    aarch64_neon_vcvtfp2fxs,                   // llvm.aarch64.neon.vcvtfp2fxs
    aarch64_neon_vcvtfp2fxu,                   // llvm.aarch64.neon.vcvtfp2fxu
    aarch64_neon_vcvtfp2hf,                    // llvm.aarch64.neon.vcvtfp2hf
    aarch64_neon_vcvtfxs2fp,                   // llvm.aarch64.neon.vcvtfxs2fp
    aarch64_neon_vcvtfxu2fp,                   // llvm.aarch64.neon.vcvtfxu2fp
    aarch64_neon_vcvthf2fp,                    // llvm.aarch64.neon.vcvthf2fp
    aarch64_neon_vsli,                         // llvm.aarch64.neon.vsli
    aarch64_neon_vsri,                         // llvm.aarch64.neon.vsri
    aarch64_rbit,                              // llvm.aarch64.rbit
    aarch64_sdiv,                              // llvm.aarch64.sdiv
    aarch64_sisd_fabd,                         // llvm.aarch64.sisd.fabd
    aarch64_sisd_fcvtxn,                       // llvm.aarch64.sisd.fcvtxn
    aarch64_stlxp,                             // llvm.aarch64.stlxp
    aarch64_stlxr,                             // llvm.aarch64.stlxr
    aarch64_stxp,                              // llvm.aarch64.stxp
    aarch64_stxr,                              // llvm.aarch64.stxr
    aarch64_udiv,                              // llvm.aarch64.udiv
    adjust_trampoline,                         // llvm.adjust.trampoline
    annotation,                                // llvm.annotation
    arm_cdp,                                   // llvm.arm.cdp
    arm_cdp2,                                  // llvm.arm.cdp2
    arm_clrex,                                 // llvm.arm.clrex
    arm_crc32b,                                // llvm.arm.crc32b
    arm_crc32cb,                               // llvm.arm.crc32cb
    arm_crc32ch,                               // llvm.arm.crc32ch
    arm_crc32cw,                               // llvm.arm.crc32cw
    arm_crc32h,                                // llvm.arm.crc32h
    arm_crc32w,                                // llvm.arm.crc32w
    arm_dmb,                                   // llvm.arm.dmb
    arm_dsb,                                   // llvm.arm.dsb
    arm_get_fpscr,                             // llvm.arm.get.fpscr
    arm_hint,                                  // llvm.arm.hint
    arm_isb,                                   // llvm.arm.isb
    arm_ldaex,                                 // llvm.arm.ldaex
    arm_ldaexd,                                // llvm.arm.ldaexd
    arm_ldrex,                                 // llvm.arm.ldrex
    arm_ldrexd,                                // llvm.arm.ldrexd
    arm_mcr,                                   // llvm.arm.mcr
    arm_mcr2,                                  // llvm.arm.mcr2
    arm_mcrr,                                  // llvm.arm.mcrr
    arm_mcrr2,                                 // llvm.arm.mcrr2
    arm_mrc,                                   // llvm.arm.mrc
    arm_mrc2,                                  // llvm.arm.mrc2
    arm_neon_aesd,                             // llvm.arm.neon.aesd
    arm_neon_aese,                             // llvm.arm.neon.aese
    arm_neon_aesimc,                           // llvm.arm.neon.aesimc
    arm_neon_aesmc,                            // llvm.arm.neon.aesmc
    arm_neon_sha1c,                            // llvm.arm.neon.sha1c
    arm_neon_sha1h,                            // llvm.arm.neon.sha1h
    arm_neon_sha1m,                            // llvm.arm.neon.sha1m
    arm_neon_sha1p,                            // llvm.arm.neon.sha1p
    arm_neon_sha1su0,                          // llvm.arm.neon.sha1su0
    arm_neon_sha1su1,                          // llvm.arm.neon.sha1su1
    arm_neon_sha256h,                          // llvm.arm.neon.sha256h
    arm_neon_sha256h2,                         // llvm.arm.neon.sha256h2
    arm_neon_sha256su0,                        // llvm.arm.neon.sha256su0
    arm_neon_sha256su1,                        // llvm.arm.neon.sha256su1
    arm_neon_vabds,                            // llvm.arm.neon.vabds
    arm_neon_vabdu,                            // llvm.arm.neon.vabdu
    arm_neon_vabs,                             // llvm.arm.neon.vabs
    arm_neon_vacge,                            // llvm.arm.neon.vacge
    arm_neon_vacgt,                            // llvm.arm.neon.vacgt
    arm_neon_vbsl,                             // llvm.arm.neon.vbsl
    arm_neon_vcls,                             // llvm.arm.neon.vcls
    arm_neon_vclz,                             // llvm.arm.neon.vclz
    arm_neon_vcnt,                             // llvm.arm.neon.vcnt
    arm_neon_vcvtas,                           // llvm.arm.neon.vcvtas
    arm_neon_vcvtau,                           // llvm.arm.neon.vcvtau
    arm_neon_vcvtfp2fxs,                       // llvm.arm.neon.vcvtfp2fxs
    arm_neon_vcvtfp2fxu,                       // llvm.arm.neon.vcvtfp2fxu
    arm_neon_vcvtfp2hf,                        // llvm.arm.neon.vcvtfp2hf
    arm_neon_vcvtfxs2fp,                       // llvm.arm.neon.vcvtfxs2fp
    arm_neon_vcvtfxu2fp,                       // llvm.arm.neon.vcvtfxu2fp
    arm_neon_vcvthf2fp,                        // llvm.arm.neon.vcvthf2fp
    arm_neon_vcvtms,                           // llvm.arm.neon.vcvtms
    arm_neon_vcvtmu,                           // llvm.arm.neon.vcvtmu
    arm_neon_vcvtns,                           // llvm.arm.neon.vcvtns
    arm_neon_vcvtnu,                           // llvm.arm.neon.vcvtnu
    arm_neon_vcvtps,                           // llvm.arm.neon.vcvtps
    arm_neon_vcvtpu,                           // llvm.arm.neon.vcvtpu
    arm_neon_vhadds,                           // llvm.arm.neon.vhadds
    arm_neon_vhaddu,                           // llvm.arm.neon.vhaddu
    arm_neon_vhsubs,                           // llvm.arm.neon.vhsubs
    arm_neon_vhsubu,                           // llvm.arm.neon.vhsubu
    arm_neon_vld1,                             // llvm.arm.neon.vld1
    arm_neon_vld2,                             // llvm.arm.neon.vld2
    arm_neon_vld2lane,                         // llvm.arm.neon.vld2lane
    arm_neon_vld3,                             // llvm.arm.neon.vld3
    arm_neon_vld3lane,                         // llvm.arm.neon.vld3lane
    arm_neon_vld4,                             // llvm.arm.neon.vld4
    arm_neon_vld4lane,                         // llvm.arm.neon.vld4lane
    arm_neon_vmaxnm,                           // llvm.arm.neon.vmaxnm
    arm_neon_vmaxs,                            // llvm.arm.neon.vmaxs
    arm_neon_vmaxu,                            // llvm.arm.neon.vmaxu
    arm_neon_vminnm,                           // llvm.arm.neon.vminnm
    arm_neon_vmins,                            // llvm.arm.neon.vmins
    arm_neon_vminu,                            // llvm.arm.neon.vminu
    arm_neon_vmullp,                           // llvm.arm.neon.vmullp
    arm_neon_vmulls,                           // llvm.arm.neon.vmulls
    arm_neon_vmullu,                           // llvm.arm.neon.vmullu
    arm_neon_vmulp,                            // llvm.arm.neon.vmulp
    arm_neon_vpadals,                          // llvm.arm.neon.vpadals
    arm_neon_vpadalu,                          // llvm.arm.neon.vpadalu
    arm_neon_vpadd,                            // llvm.arm.neon.vpadd
    arm_neon_vpaddls,                          // llvm.arm.neon.vpaddls
    arm_neon_vpaddlu,                          // llvm.arm.neon.vpaddlu
    arm_neon_vpmaxs,                           // llvm.arm.neon.vpmaxs
    arm_neon_vpmaxu,                           // llvm.arm.neon.vpmaxu
    arm_neon_vpmins,                           // llvm.arm.neon.vpmins
    arm_neon_vpminu,                           // llvm.arm.neon.vpminu
    arm_neon_vqabs,                            // llvm.arm.neon.vqabs
    arm_neon_vqadds,                           // llvm.arm.neon.vqadds
    arm_neon_vqaddu,                           // llvm.arm.neon.vqaddu
    arm_neon_vqdmulh,                          // llvm.arm.neon.vqdmulh
    arm_neon_vqdmull,                          // llvm.arm.neon.vqdmull
    arm_neon_vqmovns,                          // llvm.arm.neon.vqmovns
    arm_neon_vqmovnsu,                         // llvm.arm.neon.vqmovnsu
    arm_neon_vqmovnu,                          // llvm.arm.neon.vqmovnu
    arm_neon_vqneg,                            // llvm.arm.neon.vqneg
    arm_neon_vqrdmulh,                         // llvm.arm.neon.vqrdmulh
    arm_neon_vqrshiftns,                       // llvm.arm.neon.vqrshiftns
    arm_neon_vqrshiftnsu,                      // llvm.arm.neon.vqrshiftnsu
    arm_neon_vqrshiftnu,                       // llvm.arm.neon.vqrshiftnu
    arm_neon_vqrshifts,                        // llvm.arm.neon.vqrshifts
    arm_neon_vqrshiftu,                        // llvm.arm.neon.vqrshiftu
    arm_neon_vqshiftns,                        // llvm.arm.neon.vqshiftns
    arm_neon_vqshiftnsu,                       // llvm.arm.neon.vqshiftnsu
    arm_neon_vqshiftnu,                        // llvm.arm.neon.vqshiftnu
    arm_neon_vqshifts,                         // llvm.arm.neon.vqshifts
    arm_neon_vqshiftsu,                        // llvm.arm.neon.vqshiftsu
    arm_neon_vqshiftu,                         // llvm.arm.neon.vqshiftu
    arm_neon_vqsubs,                           // llvm.arm.neon.vqsubs
    arm_neon_vqsubu,                           // llvm.arm.neon.vqsubu
    arm_neon_vraddhn,                          // llvm.arm.neon.vraddhn
    arm_neon_vrecpe,                           // llvm.arm.neon.vrecpe
    arm_neon_vrecps,                           // llvm.arm.neon.vrecps
    arm_neon_vrhadds,                          // llvm.arm.neon.vrhadds
    arm_neon_vrhaddu,                          // llvm.arm.neon.vrhaddu
    arm_neon_vrinta,                           // llvm.arm.neon.vrinta
    arm_neon_vrintm,                           // llvm.arm.neon.vrintm
    arm_neon_vrintn,                           // llvm.arm.neon.vrintn
    arm_neon_vrintp,                           // llvm.arm.neon.vrintp
    arm_neon_vrintx,                           // llvm.arm.neon.vrintx
    arm_neon_vrintz,                           // llvm.arm.neon.vrintz
    arm_neon_vrshiftn,                         // llvm.arm.neon.vrshiftn
    arm_neon_vrshifts,                         // llvm.arm.neon.vrshifts
    arm_neon_vrshiftu,                         // llvm.arm.neon.vrshiftu
    arm_neon_vrsqrte,                          // llvm.arm.neon.vrsqrte
    arm_neon_vrsqrts,                          // llvm.arm.neon.vrsqrts
    arm_neon_vrsubhn,                          // llvm.arm.neon.vrsubhn
    arm_neon_vshiftins,                        // llvm.arm.neon.vshiftins
    arm_neon_vshifts,                          // llvm.arm.neon.vshifts
    arm_neon_vshiftu,                          // llvm.arm.neon.vshiftu
    arm_neon_vst1,                             // llvm.arm.neon.vst1
    arm_neon_vst2,                             // llvm.arm.neon.vst2
    arm_neon_vst2lane,                         // llvm.arm.neon.vst2lane
    arm_neon_vst3,                             // llvm.arm.neon.vst3
    arm_neon_vst3lane,                         // llvm.arm.neon.vst3lane
    arm_neon_vst4,                             // llvm.arm.neon.vst4
    arm_neon_vst4lane,                         // llvm.arm.neon.vst4lane
    arm_neon_vtbl1,                            // llvm.arm.neon.vtbl1
    arm_neon_vtbl2,                            // llvm.arm.neon.vtbl2
    arm_neon_vtbl3,                            // llvm.arm.neon.vtbl3
    arm_neon_vtbl4,                            // llvm.arm.neon.vtbl4
    arm_neon_vtbx1,                            // llvm.arm.neon.vtbx1
    arm_neon_vtbx2,                            // llvm.arm.neon.vtbx2
    arm_neon_vtbx3,                            // llvm.arm.neon.vtbx3
    arm_neon_vtbx4,                            // llvm.arm.neon.vtbx4
    arm_qadd,                                  // llvm.arm.qadd
    arm_qsub,                                  // llvm.arm.qsub
    arm_rbit,                                  // llvm.arm.rbit
    arm_set_fpscr,                             // llvm.arm.set.fpscr
    arm_ssat,                                  // llvm.arm.ssat
    arm_stlex,                                 // llvm.arm.stlex
    arm_stlexd,                                // llvm.arm.stlexd
    arm_strex,                                 // llvm.arm.strex
    arm_strexd,                                // llvm.arm.strexd
    arm_thread_pointer,                        // llvm.arm.thread.pointer
    arm_undefined,                             // llvm.arm.undefined
    arm_usat,                                  // llvm.arm.usat
    arm_vcvtr,                                 // llvm.arm.vcvtr
    arm_vcvtru,                                // llvm.arm.vcvtru
    bswap,                                     // llvm.bswap
    ceil,                                      // llvm.ceil
    clear_cache,                               // llvm.clear_cache
    convert_from_fp16,                         // llvm.convert.from.fp16
    convert_to_fp16,                           // llvm.convert.to.fp16
    convertff,                                 // llvm.convertff
    convertfsi,                                // llvm.convertfsi
    convertfui,                                // llvm.convertfui
    convertsif,                                // llvm.convertsif
    convertss,                                 // llvm.convertss
    convertsu,                                 // llvm.convertsu
    convertuif,                                // llvm.convertuif
    convertus,                                 // llvm.convertus
    convertuu,                                 // llvm.convertuu
    copysign,                                  // llvm.copysign
    cos,                                       // llvm.cos
    ctlz,                                      // llvm.ctlz
    ctpop,                                     // llvm.ctpop
    cttz,                                      // llvm.cttz
    cuda_syncthreads,                          // llvm.cuda.syncthreads
    dbg_declare,                               // llvm.dbg.declare
    dbg_value,                                 // llvm.dbg.value
    debugtrap,                                 // llvm.debugtrap
    donothing,                                 // llvm.donothing
    eh_dwarf_cfa,                              // llvm.eh.dwarf.cfa
    eh_return_i32,                             // llvm.eh.return.i32
    eh_return_i64,                             // llvm.eh.return.i64
    eh_sjlj_callsite,                          // llvm.eh.sjlj.callsite
    eh_sjlj_functioncontext,                   // llvm.eh.sjlj.functioncontext
    eh_sjlj_longjmp,                           // llvm.eh.sjlj.longjmp
    eh_sjlj_lsda,                              // llvm.eh.sjlj.lsda
    eh_sjlj_setjmp,                            // llvm.eh.sjlj.setjmp
    eh_typeid_for,                             // llvm.eh.typeid.for
    eh_unwind_init,                            // llvm.eh.unwind.init
    exp,                                       // llvm.exp
    exp2,                                      // llvm.exp2
    expect,                                    // llvm.expect
    experimental_patchpoint_i64,               // llvm.experimental.patchpoint.i64
    experimental_patchpoint_void,              // llvm.experimental.patchpoint.void
    experimental_stackmap,                     // llvm.experimental.stackmap
    fabs,                                      // llvm.fabs
    floor,                                     // llvm.floor
    flt_rounds,                                // llvm.flt.rounds
    fma,                                       // llvm.fma
    fmuladd,                                   // llvm.fmuladd
    frameaddress,                              // llvm.frameaddress
    gcread,                                    // llvm.gcread
    gcroot,                                    // llvm.gcroot
    gcwrite,                                   // llvm.gcwrite
    hexagon_A2_abs,                            // llvm.hexagon.A2.abs
    hexagon_A2_absp,                           // llvm.hexagon.A2.absp
    hexagon_A2_abssat,                         // llvm.hexagon.A2.abssat
    hexagon_A2_add,                            // llvm.hexagon.A2.add
    hexagon_A2_addh_h16_hh,                    // llvm.hexagon.A2.addh.h16.hh
    hexagon_A2_addh_h16_hl,                    // llvm.hexagon.A2.addh.h16.hl
    hexagon_A2_addh_h16_lh,                    // llvm.hexagon.A2.addh.h16.lh
    hexagon_A2_addh_h16_ll,                    // llvm.hexagon.A2.addh.h16.ll
    hexagon_A2_addh_h16_sat_hh,                // llvm.hexagon.A2.addh.h16.sat.hh
    hexagon_A2_addh_h16_sat_hl,                // llvm.hexagon.A2.addh.h16.sat.hl
    hexagon_A2_addh_h16_sat_lh,                // llvm.hexagon.A2.addh.h16.sat.lh
    hexagon_A2_addh_h16_sat_ll,                // llvm.hexagon.A2.addh.h16.sat.ll
    hexagon_A2_addh_l16_hl,                    // llvm.hexagon.A2.addh.l16.hl
    hexagon_A2_addh_l16_ll,                    // llvm.hexagon.A2.addh.l16.ll
    hexagon_A2_addh_l16_sat_hl,                // llvm.hexagon.A2.addh.l16.sat.hl
    hexagon_A2_addh_l16_sat_ll,                // llvm.hexagon.A2.addh.l16.sat.ll
    hexagon_A2_addi,                           // llvm.hexagon.A2.addi
    hexagon_A2_addp,                           // llvm.hexagon.A2.addp
    hexagon_A2_addpsat,                        // llvm.hexagon.A2.addpsat
    hexagon_A2_addsat,                         // llvm.hexagon.A2.addsat
    hexagon_A2_addsp,                          // llvm.hexagon.A2.addsp
    hexagon_A2_and,                            // llvm.hexagon.A2.and
    hexagon_A2_andir,                          // llvm.hexagon.A2.andir
    hexagon_A2_andp,                           // llvm.hexagon.A2.andp
    hexagon_A2_aslh,                           // llvm.hexagon.A2.aslh
    hexagon_A2_asrh,                           // llvm.hexagon.A2.asrh
    hexagon_A2_combine_hh,                     // llvm.hexagon.A2.combine.hh
    hexagon_A2_combine_hl,                     // llvm.hexagon.A2.combine.hl
    hexagon_A2_combine_lh,                     // llvm.hexagon.A2.combine.lh
    hexagon_A2_combine_ll,                     // llvm.hexagon.A2.combine.ll
    hexagon_A2_combineii,                      // llvm.hexagon.A2.combineii
    hexagon_A2_combinew,                       // llvm.hexagon.A2.combinew
    hexagon_A2_max,                            // llvm.hexagon.A2.max
    hexagon_A2_maxp,                           // llvm.hexagon.A2.maxp
    hexagon_A2_maxu,                           // llvm.hexagon.A2.maxu
    hexagon_A2_maxup,                          // llvm.hexagon.A2.maxup
    hexagon_A2_min,                            // llvm.hexagon.A2.min
    hexagon_A2_minp,                           // llvm.hexagon.A2.minp
    hexagon_A2_minu,                           // llvm.hexagon.A2.minu
    hexagon_A2_minup,                          // llvm.hexagon.A2.minup
    hexagon_A2_neg,                            // llvm.hexagon.A2.neg
    hexagon_A2_negp,                           // llvm.hexagon.A2.negp
    hexagon_A2_negsat,                         // llvm.hexagon.A2.negsat
    hexagon_A2_not,                            // llvm.hexagon.A2.not
    hexagon_A2_notp,                           // llvm.hexagon.A2.notp
    hexagon_A2_or,                             // llvm.hexagon.A2.or
    hexagon_A2_orir,                           // llvm.hexagon.A2.orir
    hexagon_A2_orp,                            // llvm.hexagon.A2.orp
    hexagon_A2_roundsat,                       // llvm.hexagon.A2.roundsat
    hexagon_A2_sat,                            // llvm.hexagon.A2.sat
    hexagon_A2_satb,                           // llvm.hexagon.A2.satb
    hexagon_A2_sath,                           // llvm.hexagon.A2.sath
    hexagon_A2_satub,                          // llvm.hexagon.A2.satub
    hexagon_A2_satuh,                          // llvm.hexagon.A2.satuh
    hexagon_A2_sub,                            // llvm.hexagon.A2.sub
    hexagon_A2_subh_h16_hh,                    // llvm.hexagon.A2.subh.h16.hh
    hexagon_A2_subh_h16_hl,                    // llvm.hexagon.A2.subh.h16.hl
    hexagon_A2_subh_h16_lh,                    // llvm.hexagon.A2.subh.h16.lh
    hexagon_A2_subh_h16_ll,                    // llvm.hexagon.A2.subh.h16.ll
    hexagon_A2_subh_h16_sat_hh,                // llvm.hexagon.A2.subh.h16.sat.hh
    hexagon_A2_subh_h16_sat_hl,                // llvm.hexagon.A2.subh.h16.sat.hl
    hexagon_A2_subh_h16_sat_lh,                // llvm.hexagon.A2.subh.h16.sat.lh
    hexagon_A2_subh_h16_sat_ll,                // llvm.hexagon.A2.subh.h16.sat.ll
    hexagon_A2_subh_l16_hl,                    // llvm.hexagon.A2.subh.l16.hl
    hexagon_A2_subh_l16_ll,                    // llvm.hexagon.A2.subh.l16.ll
    hexagon_A2_subh_l16_sat_hl,                // llvm.hexagon.A2.subh.l16.sat.hl
    hexagon_A2_subh_l16_sat_ll,                // llvm.hexagon.A2.subh.l16.sat.ll
    hexagon_A2_subp,                           // llvm.hexagon.A2.subp
    hexagon_A2_subri,                          // llvm.hexagon.A2.subri
    hexagon_A2_subsat,                         // llvm.hexagon.A2.subsat
    hexagon_A2_svaddh,                         // llvm.hexagon.A2.svaddh
    hexagon_A2_svaddhs,                        // llvm.hexagon.A2.svaddhs
    hexagon_A2_svadduhs,                       // llvm.hexagon.A2.svadduhs
    hexagon_A2_svavgh,                         // llvm.hexagon.A2.svavgh
    hexagon_A2_svavghs,                        // llvm.hexagon.A2.svavghs
    hexagon_A2_svnavgh,                        // llvm.hexagon.A2.svnavgh
    hexagon_A2_svsubh,                         // llvm.hexagon.A2.svsubh
    hexagon_A2_svsubhs,                        // llvm.hexagon.A2.svsubhs
    hexagon_A2_svsubuhs,                       // llvm.hexagon.A2.svsubuhs
    hexagon_A2_swiz,                           // llvm.hexagon.A2.swiz
    hexagon_A2_sxtb,                           // llvm.hexagon.A2.sxtb
    hexagon_A2_sxth,                           // llvm.hexagon.A2.sxth
    hexagon_A2_sxtw,                           // llvm.hexagon.A2.sxtw
    hexagon_A2_tfr,                            // llvm.hexagon.A2.tfr
    hexagon_A2_tfrih,                          // llvm.hexagon.A2.tfrih
    hexagon_A2_tfril,                          // llvm.hexagon.A2.tfril
    hexagon_A2_tfrp,                           // llvm.hexagon.A2.tfrp
    hexagon_A2_tfrpi,                          // llvm.hexagon.A2.tfrpi
    hexagon_A2_tfrsi,                          // llvm.hexagon.A2.tfrsi
    hexagon_A2_vabsh,                          // llvm.hexagon.A2.vabsh
    hexagon_A2_vabshsat,                       // llvm.hexagon.A2.vabshsat
    hexagon_A2_vabsw,                          // llvm.hexagon.A2.vabsw
    hexagon_A2_vabswsat,                       // llvm.hexagon.A2.vabswsat
    hexagon_A2_vaddb_map,                      // llvm.hexagon.A2.vaddb.map
    hexagon_A2_vaddh,                          // llvm.hexagon.A2.vaddh
    hexagon_A2_vaddhs,                         // llvm.hexagon.A2.vaddhs
    hexagon_A2_vaddub,                         // llvm.hexagon.A2.vaddub
    hexagon_A2_vaddubs,                        // llvm.hexagon.A2.vaddubs
    hexagon_A2_vadduhs,                        // llvm.hexagon.A2.vadduhs
    hexagon_A2_vaddw,                          // llvm.hexagon.A2.vaddw
    hexagon_A2_vaddws,                         // llvm.hexagon.A2.vaddws
    hexagon_A2_vavgh,                          // llvm.hexagon.A2.vavgh
    hexagon_A2_vavghcr,                        // llvm.hexagon.A2.vavghcr
    hexagon_A2_vavghr,                         // llvm.hexagon.A2.vavghr
    hexagon_A2_vavgub,                         // llvm.hexagon.A2.vavgub
    hexagon_A2_vavgubr,                        // llvm.hexagon.A2.vavgubr
    hexagon_A2_vavguh,                         // llvm.hexagon.A2.vavguh
    hexagon_A2_vavguhr,                        // llvm.hexagon.A2.vavguhr
    hexagon_A2_vavguw,                         // llvm.hexagon.A2.vavguw
    hexagon_A2_vavguwr,                        // llvm.hexagon.A2.vavguwr
    hexagon_A2_vavgw,                          // llvm.hexagon.A2.vavgw
    hexagon_A2_vavgwcr,                        // llvm.hexagon.A2.vavgwcr
    hexagon_A2_vavgwr,                         // llvm.hexagon.A2.vavgwr
    hexagon_A2_vcmpbeq,                        // llvm.hexagon.A2.vcmpbeq
    hexagon_A2_vcmpbgtu,                       // llvm.hexagon.A2.vcmpbgtu
    hexagon_A2_vcmpheq,                        // llvm.hexagon.A2.vcmpheq
    hexagon_A2_vcmphgt,                        // llvm.hexagon.A2.vcmphgt
    hexagon_A2_vcmphgtu,                       // llvm.hexagon.A2.vcmphgtu
    hexagon_A2_vcmpweq,                        // llvm.hexagon.A2.vcmpweq
    hexagon_A2_vcmpwgt,                        // llvm.hexagon.A2.vcmpwgt
    hexagon_A2_vcmpwgtu,                       // llvm.hexagon.A2.vcmpwgtu
    hexagon_A2_vconj,                          // llvm.hexagon.A2.vconj
    hexagon_A2_vmaxb,                          // llvm.hexagon.A2.vmaxb
    hexagon_A2_vmaxh,                          // llvm.hexagon.A2.vmaxh
    hexagon_A2_vmaxub,                         // llvm.hexagon.A2.vmaxub
    hexagon_A2_vmaxuh,                         // llvm.hexagon.A2.vmaxuh
    hexagon_A2_vmaxuw,                         // llvm.hexagon.A2.vmaxuw
    hexagon_A2_vmaxw,                          // llvm.hexagon.A2.vmaxw
    hexagon_A2_vminb,                          // llvm.hexagon.A2.vminb
    hexagon_A2_vminh,                          // llvm.hexagon.A2.vminh
    hexagon_A2_vminub,                         // llvm.hexagon.A2.vminub
    hexagon_A2_vminuh,                         // llvm.hexagon.A2.vminuh
    hexagon_A2_vminuw,                         // llvm.hexagon.A2.vminuw
    hexagon_A2_vminw,                          // llvm.hexagon.A2.vminw
    hexagon_A2_vnavgh,                         // llvm.hexagon.A2.vnavgh
    hexagon_A2_vnavghcr,                       // llvm.hexagon.A2.vnavghcr
    hexagon_A2_vnavghr,                        // llvm.hexagon.A2.vnavghr
    hexagon_A2_vnavgw,                         // llvm.hexagon.A2.vnavgw
    hexagon_A2_vnavgwcr,                       // llvm.hexagon.A2.vnavgwcr
    hexagon_A2_vnavgwr,                        // llvm.hexagon.A2.vnavgwr
    hexagon_A2_vraddub,                        // llvm.hexagon.A2.vraddub
    hexagon_A2_vraddub_acc,                    // llvm.hexagon.A2.vraddub.acc
    hexagon_A2_vrsadub,                        // llvm.hexagon.A2.vrsadub
    hexagon_A2_vrsadub_acc,                    // llvm.hexagon.A2.vrsadub.acc
    hexagon_A2_vsubb_map,                      // llvm.hexagon.A2.vsubb.map
    hexagon_A2_vsubh,                          // llvm.hexagon.A2.vsubh
    hexagon_A2_vsubhs,                         // llvm.hexagon.A2.vsubhs
    hexagon_A2_vsubub,                         // llvm.hexagon.A2.vsubub
    hexagon_A2_vsububs,                        // llvm.hexagon.A2.vsububs
    hexagon_A2_vsubuhs,                        // llvm.hexagon.A2.vsubuhs
    hexagon_A2_vsubw,                          // llvm.hexagon.A2.vsubw
    hexagon_A2_vsubws,                         // llvm.hexagon.A2.vsubws
    hexagon_A2_xor,                            // llvm.hexagon.A2.xor
    hexagon_A2_xorp,                           // llvm.hexagon.A2.xorp
    hexagon_A2_zxtb,                           // llvm.hexagon.A2.zxtb
    hexagon_A2_zxth,                           // llvm.hexagon.A2.zxth
    hexagon_A4_andn,                           // llvm.hexagon.A4.andn
    hexagon_A4_andnp,                          // llvm.hexagon.A4.andnp
    hexagon_A4_bitsplit,                       // llvm.hexagon.A4.bitsplit
    hexagon_A4_bitspliti,                      // llvm.hexagon.A4.bitspliti
    hexagon_A4_boundscheck,                    // llvm.hexagon.A4.boundscheck
    hexagon_A4_cmpbeq,                         // llvm.hexagon.A4.cmpbeq
    hexagon_A4_cmpbeqi,                        // llvm.hexagon.A4.cmpbeqi
    hexagon_A4_cmpbgt,                         // llvm.hexagon.A4.cmpbgt
    hexagon_A4_cmpbgti,                        // llvm.hexagon.A4.cmpbgti
    hexagon_A4_cmpbgtu,                        // llvm.hexagon.A4.cmpbgtu
    hexagon_A4_cmpbgtui,                       // llvm.hexagon.A4.cmpbgtui
    hexagon_A4_cmpheq,                         // llvm.hexagon.A4.cmpheq
    hexagon_A4_cmpheqi,                        // llvm.hexagon.A4.cmpheqi
    hexagon_A4_cmphgt,                         // llvm.hexagon.A4.cmphgt
    hexagon_A4_cmphgti,                        // llvm.hexagon.A4.cmphgti
    hexagon_A4_cmphgtu,                        // llvm.hexagon.A4.cmphgtu
    hexagon_A4_cmphgtui,                       // llvm.hexagon.A4.cmphgtui
    hexagon_A4_combineir,                      // llvm.hexagon.A4.combineir
    hexagon_A4_combineri,                      // llvm.hexagon.A4.combineri
    hexagon_A4_cround_ri,                      // llvm.hexagon.A4.cround.ri
    hexagon_A4_cround_rr,                      // llvm.hexagon.A4.cround.rr
    hexagon_A4_modwrapu,                       // llvm.hexagon.A4.modwrapu
    hexagon_A4_orn,                            // llvm.hexagon.A4.orn
    hexagon_A4_ornp,                           // llvm.hexagon.A4.ornp
    hexagon_A4_rcmpeq,                         // llvm.hexagon.A4.rcmpeq
    hexagon_A4_rcmpeqi,                        // llvm.hexagon.A4.rcmpeqi
    hexagon_A4_rcmpneq,                        // llvm.hexagon.A4.rcmpneq
    hexagon_A4_rcmpneqi,                       // llvm.hexagon.A4.rcmpneqi
    hexagon_A4_round_ri,                       // llvm.hexagon.A4.round.ri
    hexagon_A4_round_ri_sat,                   // llvm.hexagon.A4.round.ri.sat
    hexagon_A4_round_rr,                       // llvm.hexagon.A4.round.rr
    hexagon_A4_round_rr_sat,                   // llvm.hexagon.A4.round.rr.sat
    hexagon_A4_tlbmatch,                       // llvm.hexagon.A4.tlbmatch
    hexagon_A4_vcmpbeq_any,                    // llvm.hexagon.A4.vcmpbeq.any
    hexagon_A4_vcmpbeqi,                       // llvm.hexagon.A4.vcmpbeqi
    hexagon_A4_vcmpbgt,                        // llvm.hexagon.A4.vcmpbgt
    hexagon_A4_vcmpbgti,                       // llvm.hexagon.A4.vcmpbgti
    hexagon_A4_vcmpbgtui,                      // llvm.hexagon.A4.vcmpbgtui
    hexagon_A4_vcmpheqi,                       // llvm.hexagon.A4.vcmpheqi
    hexagon_A4_vcmphgti,                       // llvm.hexagon.A4.vcmphgti
    hexagon_A4_vcmphgtui,                      // llvm.hexagon.A4.vcmphgtui
    hexagon_A4_vcmpweqi,                       // llvm.hexagon.A4.vcmpweqi
    hexagon_A4_vcmpwgti,                       // llvm.hexagon.A4.vcmpwgti
    hexagon_A4_vcmpwgtui,                      // llvm.hexagon.A4.vcmpwgtui
    hexagon_A4_vrmaxh,                         // llvm.hexagon.A4.vrmaxh
    hexagon_A4_vrmaxuh,                        // llvm.hexagon.A4.vrmaxuh
    hexagon_A4_vrmaxuw,                        // llvm.hexagon.A4.vrmaxuw
    hexagon_A4_vrmaxw,                         // llvm.hexagon.A4.vrmaxw
    hexagon_A4_vrminh,                         // llvm.hexagon.A4.vrminh
    hexagon_A4_vrminuh,                        // llvm.hexagon.A4.vrminuh
    hexagon_A4_vrminuw,                        // llvm.hexagon.A4.vrminuw
    hexagon_A4_vrminw,                         // llvm.hexagon.A4.vrminw
    hexagon_A5_vaddhubs,                       // llvm.hexagon.A5.vaddhubs
    hexagon_C2_all8,                           // llvm.hexagon.C2.all8
    hexagon_C2_and,                            // llvm.hexagon.C2.and
    hexagon_C2_andn,                           // llvm.hexagon.C2.andn
    hexagon_C2_any8,                           // llvm.hexagon.C2.any8
    hexagon_C2_bitsclr,                        // llvm.hexagon.C2.bitsclr
    hexagon_C2_bitsclri,                       // llvm.hexagon.C2.bitsclri
    hexagon_C2_bitsset,                        // llvm.hexagon.C2.bitsset
    hexagon_C2_cmpeq,                          // llvm.hexagon.C2.cmpeq
    hexagon_C2_cmpeqi,                         // llvm.hexagon.C2.cmpeqi
    hexagon_C2_cmpeqp,                         // llvm.hexagon.C2.cmpeqp
    hexagon_C2_cmpgei,                         // llvm.hexagon.C2.cmpgei
    hexagon_C2_cmpgeui,                        // llvm.hexagon.C2.cmpgeui
    hexagon_C2_cmpgt,                          // llvm.hexagon.C2.cmpgt
    hexagon_C2_cmpgti,                         // llvm.hexagon.C2.cmpgti
    hexagon_C2_cmpgtp,                         // llvm.hexagon.C2.cmpgtp
    hexagon_C2_cmpgtu,                         // llvm.hexagon.C2.cmpgtu
    hexagon_C2_cmpgtui,                        // llvm.hexagon.C2.cmpgtui
    hexagon_C2_cmpgtup,                        // llvm.hexagon.C2.cmpgtup
    hexagon_C2_cmplt,                          // llvm.hexagon.C2.cmplt
    hexagon_C2_cmpltu,                         // llvm.hexagon.C2.cmpltu
    hexagon_C2_mask,                           // llvm.hexagon.C2.mask
    hexagon_C2_mux,                            // llvm.hexagon.C2.mux
    hexagon_C2_muxii,                          // llvm.hexagon.C2.muxii
    hexagon_C2_muxir,                          // llvm.hexagon.C2.muxir
    hexagon_C2_muxri,                          // llvm.hexagon.C2.muxri
    hexagon_C2_not,                            // llvm.hexagon.C2.not
    hexagon_C2_or,                             // llvm.hexagon.C2.or
    hexagon_C2_orn,                            // llvm.hexagon.C2.orn
    hexagon_C2_pxfer_map,                      // llvm.hexagon.C2.pxfer.map
    hexagon_C2_tfrpr,                          // llvm.hexagon.C2.tfrpr
    hexagon_C2_tfrrp,                          // llvm.hexagon.C2.tfrrp
    hexagon_C2_vitpack,                        // llvm.hexagon.C2.vitpack
    hexagon_C2_vmux,                           // llvm.hexagon.C2.vmux
    hexagon_C2_xor,                            // llvm.hexagon.C2.xor
    hexagon_C4_and_and,                        // llvm.hexagon.C4.and.and
    hexagon_C4_and_andn,                       // llvm.hexagon.C4.and.andn
    hexagon_C4_and_or,                         // llvm.hexagon.C4.and.or
    hexagon_C4_and_orn,                        // llvm.hexagon.C4.and.orn
    hexagon_C4_cmplte,                         // llvm.hexagon.C4.cmplte
    hexagon_C4_cmpltei,                        // llvm.hexagon.C4.cmpltei
    hexagon_C4_cmplteu,                        // llvm.hexagon.C4.cmplteu
    hexagon_C4_cmplteui,                       // llvm.hexagon.C4.cmplteui
    hexagon_C4_cmpneq,                         // llvm.hexagon.C4.cmpneq
    hexagon_C4_cmpneqi,                        // llvm.hexagon.C4.cmpneqi
    hexagon_C4_fastcorner9,                    // llvm.hexagon.C4.fastcorner9
    hexagon_C4_fastcorner9_not,                // llvm.hexagon.C4.fastcorner9.not
    hexagon_C4_nbitsclr,                       // llvm.hexagon.C4.nbitsclr
    hexagon_C4_nbitsclri,                      // llvm.hexagon.C4.nbitsclri
    hexagon_C4_nbitsset,                       // llvm.hexagon.C4.nbitsset
    hexagon_C4_or_and,                         // llvm.hexagon.C4.or.and
    hexagon_C4_or_andn,                        // llvm.hexagon.C4.or.andn
    hexagon_C4_or_or,                          // llvm.hexagon.C4.or.or
    hexagon_C4_or_orn,                         // llvm.hexagon.C4.or.orn
    hexagon_F2_conv_d2df,                      // llvm.hexagon.F2.conv.d2df
    hexagon_F2_conv_d2sf,                      // llvm.hexagon.F2.conv.d2sf
    hexagon_F2_conv_df2d,                      // llvm.hexagon.F2.conv.df2d
    hexagon_F2_conv_df2d_chop,                 // llvm.hexagon.F2.conv.df2d.chop
    hexagon_F2_conv_df2sf,                     // llvm.hexagon.F2.conv.df2sf
    hexagon_F2_conv_df2ud,                     // llvm.hexagon.F2.conv.df2ud
    hexagon_F2_conv_df2ud_chop,                // llvm.hexagon.F2.conv.df2ud.chop
    hexagon_F2_conv_df2uw,                     // llvm.hexagon.F2.conv.df2uw
    hexagon_F2_conv_df2uw_chop,                // llvm.hexagon.F2.conv.df2uw.chop
    hexagon_F2_conv_df2w,                      // llvm.hexagon.F2.conv.df2w
    hexagon_F2_conv_df2w_chop,                 // llvm.hexagon.F2.conv.df2w.chop
    hexagon_F2_conv_sf2d,                      // llvm.hexagon.F2.conv.sf2d
    hexagon_F2_conv_sf2d_chop,                 // llvm.hexagon.F2.conv.sf2d.chop
    hexagon_F2_conv_sf2df,                     // llvm.hexagon.F2.conv.sf2df
    hexagon_F2_conv_sf2ud,                     // llvm.hexagon.F2.conv.sf2ud
    hexagon_F2_conv_sf2ud_chop,                // llvm.hexagon.F2.conv.sf2ud.chop
    hexagon_F2_conv_sf2uw,                     // llvm.hexagon.F2.conv.sf2uw
    hexagon_F2_conv_sf2uw_chop,                // llvm.hexagon.F2.conv.sf2uw.chop
    hexagon_F2_conv_sf2w,                      // llvm.hexagon.F2.conv.sf2w
    hexagon_F2_conv_sf2w_chop,                 // llvm.hexagon.F2.conv.sf2w.chop
    hexagon_F2_conv_ud2df,                     // llvm.hexagon.F2.conv.ud2df
    hexagon_F2_conv_ud2sf,                     // llvm.hexagon.F2.conv.ud2sf
    hexagon_F2_conv_uw2df,                     // llvm.hexagon.F2.conv.uw2df
    hexagon_F2_conv_uw2sf,                     // llvm.hexagon.F2.conv.uw2sf
    hexagon_F2_conv_w2df,                      // llvm.hexagon.F2.conv.w2df
    hexagon_F2_conv_w2sf,                      // llvm.hexagon.F2.conv.w2sf
    hexagon_F2_dfadd,                          // llvm.hexagon.F2.dfadd
    hexagon_F2_dfclass,                        // llvm.hexagon.F2.dfclass
    hexagon_F2_dfcmpeq,                        // llvm.hexagon.F2.dfcmpeq
    hexagon_F2_dfcmpge,                        // llvm.hexagon.F2.dfcmpge
    hexagon_F2_dfcmpgt,                        // llvm.hexagon.F2.dfcmpgt
    hexagon_F2_dfcmpuo,                        // llvm.hexagon.F2.dfcmpuo
    hexagon_F2_dffixupd,                       // llvm.hexagon.F2.dffixupd
    hexagon_F2_dffixupn,                       // llvm.hexagon.F2.dffixupn
    hexagon_F2_dffixupr,                       // llvm.hexagon.F2.dffixupr
    hexagon_F2_dffma,                          // llvm.hexagon.F2.dffma
    hexagon_F2_dffma_lib,                      // llvm.hexagon.F2.dffma.lib
    hexagon_F2_dffma_sc,                       // llvm.hexagon.F2.dffma.sc
    hexagon_F2_dffms,                          // llvm.hexagon.F2.dffms
    hexagon_F2_dffms_lib,                      // llvm.hexagon.F2.dffms.lib
    hexagon_F2_dfimm_n,                        // llvm.hexagon.F2.dfimm.n
    hexagon_F2_dfimm_p,                        // llvm.hexagon.F2.dfimm.p
    hexagon_F2_dfmax,                          // llvm.hexagon.F2.dfmax
    hexagon_F2_dfmin,                          // llvm.hexagon.F2.dfmin
    hexagon_F2_dfmpy,                          // llvm.hexagon.F2.dfmpy
    hexagon_F2_dfsub,                          // llvm.hexagon.F2.dfsub
    hexagon_F2_sfadd,                          // llvm.hexagon.F2.sfadd
    hexagon_F2_sfclass,                        // llvm.hexagon.F2.sfclass
    hexagon_F2_sfcmpeq,                        // llvm.hexagon.F2.sfcmpeq
    hexagon_F2_sfcmpge,                        // llvm.hexagon.F2.sfcmpge
    hexagon_F2_sfcmpgt,                        // llvm.hexagon.F2.sfcmpgt
    hexagon_F2_sfcmpuo,                        // llvm.hexagon.F2.sfcmpuo
    hexagon_F2_sffixupd,                       // llvm.hexagon.F2.sffixupd
    hexagon_F2_sffixupn,                       // llvm.hexagon.F2.sffixupn
    hexagon_F2_sffixupr,                       // llvm.hexagon.F2.sffixupr
    hexagon_F2_sffma,                          // llvm.hexagon.F2.sffma
    hexagon_F2_sffma_lib,                      // llvm.hexagon.F2.sffma.lib
    hexagon_F2_sffma_sc,                       // llvm.hexagon.F2.sffma.sc
    hexagon_F2_sffms,                          // llvm.hexagon.F2.sffms
    hexagon_F2_sffms_lib,                      // llvm.hexagon.F2.sffms.lib
    hexagon_F2_sfimm_n,                        // llvm.hexagon.F2.sfimm.n
    hexagon_F2_sfimm_p,                        // llvm.hexagon.F2.sfimm.p
    hexagon_F2_sfmax,                          // llvm.hexagon.F2.sfmax
    hexagon_F2_sfmin,                          // llvm.hexagon.F2.sfmin
    hexagon_F2_sfmpy,                          // llvm.hexagon.F2.sfmpy
    hexagon_F2_sfsub,                          // llvm.hexagon.F2.sfsub
    hexagon_M2_acci,                           // llvm.hexagon.M2.acci
    hexagon_M2_accii,                          // llvm.hexagon.M2.accii
    hexagon_M2_cmaci_s0,                       // llvm.hexagon.M2.cmaci.s0
    hexagon_M2_cmacr_s0,                       // llvm.hexagon.M2.cmacr.s0
    hexagon_M2_cmacs_s0,                       // llvm.hexagon.M2.cmacs.s0
    hexagon_M2_cmacs_s1,                       // llvm.hexagon.M2.cmacs.s1
    hexagon_M2_cmacsc_s0,                      // llvm.hexagon.M2.cmacsc.s0
    hexagon_M2_cmacsc_s1,                      // llvm.hexagon.M2.cmacsc.s1
    hexagon_M2_cmpyi_s0,                       // llvm.hexagon.M2.cmpyi.s0
    hexagon_M2_cmpyr_s0,                       // llvm.hexagon.M2.cmpyr.s0
    hexagon_M2_cmpyrs_s0,                      // llvm.hexagon.M2.cmpyrs.s0
    hexagon_M2_cmpyrs_s1,                      // llvm.hexagon.M2.cmpyrs.s1
    hexagon_M2_cmpyrsc_s0,                     // llvm.hexagon.M2.cmpyrsc.s0
    hexagon_M2_cmpyrsc_s1,                     // llvm.hexagon.M2.cmpyrsc.s1
    hexagon_M2_cmpys_s0,                       // llvm.hexagon.M2.cmpys.s0
    hexagon_M2_cmpys_s1,                       // llvm.hexagon.M2.cmpys.s1
    hexagon_M2_cmpysc_s0,                      // llvm.hexagon.M2.cmpysc.s0
    hexagon_M2_cmpysc_s1,                      // llvm.hexagon.M2.cmpysc.s1
    hexagon_M2_cnacs_s0,                       // llvm.hexagon.M2.cnacs.s0
    hexagon_M2_cnacs_s1,                       // llvm.hexagon.M2.cnacs.s1
    hexagon_M2_cnacsc_s0,                      // llvm.hexagon.M2.cnacsc.s0
    hexagon_M2_cnacsc_s1,                      // llvm.hexagon.M2.cnacsc.s1
    hexagon_M2_dpmpyss_acc_s0,                 // llvm.hexagon.M2.dpmpyss.acc.s0
    hexagon_M2_dpmpyss_nac_s0,                 // llvm.hexagon.M2.dpmpyss.nac.s0
    hexagon_M2_dpmpyss_rnd_s0,                 // llvm.hexagon.M2.dpmpyss.rnd.s0
    hexagon_M2_dpmpyss_s0,                     // llvm.hexagon.M2.dpmpyss.s0
    hexagon_M2_dpmpyuu_acc_s0,                 // llvm.hexagon.M2.dpmpyuu.acc.s0
    hexagon_M2_dpmpyuu_nac_s0,                 // llvm.hexagon.M2.dpmpyuu.nac.s0
    hexagon_M2_dpmpyuu_s0,                     // llvm.hexagon.M2.dpmpyuu.s0
    hexagon_M2_hmmpyh_rs1,                     // llvm.hexagon.M2.hmmpyh.rs1
    hexagon_M2_hmmpyh_s1,                      // llvm.hexagon.M2.hmmpyh.s1
    hexagon_M2_hmmpyl_rs1,                     // llvm.hexagon.M2.hmmpyl.rs1
    hexagon_M2_hmmpyl_s1,                      // llvm.hexagon.M2.hmmpyl.s1
    hexagon_M2_maci,                           // llvm.hexagon.M2.maci
    hexagon_M2_macsin,                         // llvm.hexagon.M2.macsin
    hexagon_M2_macsip,                         // llvm.hexagon.M2.macsip
    hexagon_M2_mmachs_rs0,                     // llvm.hexagon.M2.mmachs.rs0
    hexagon_M2_mmachs_rs1,                     // llvm.hexagon.M2.mmachs.rs1
    hexagon_M2_mmachs_s0,                      // llvm.hexagon.M2.mmachs.s0
    hexagon_M2_mmachs_s1,                      // llvm.hexagon.M2.mmachs.s1
    hexagon_M2_mmacls_rs0,                     // llvm.hexagon.M2.mmacls.rs0
    hexagon_M2_mmacls_rs1,                     // llvm.hexagon.M2.mmacls.rs1
    hexagon_M2_mmacls_s0,                      // llvm.hexagon.M2.mmacls.s0
    hexagon_M2_mmacls_s1,                      // llvm.hexagon.M2.mmacls.s1
    hexagon_M2_mmacuhs_rs0,                    // llvm.hexagon.M2.mmacuhs.rs0
    hexagon_M2_mmacuhs_rs1,                    // llvm.hexagon.M2.mmacuhs.rs1
    hexagon_M2_mmacuhs_s0,                     // llvm.hexagon.M2.mmacuhs.s0
    hexagon_M2_mmacuhs_s1,                     // llvm.hexagon.M2.mmacuhs.s1
    hexagon_M2_mmaculs_rs0,                    // llvm.hexagon.M2.mmaculs.rs0
    hexagon_M2_mmaculs_rs1,                    // llvm.hexagon.M2.mmaculs.rs1
    hexagon_M2_mmaculs_s0,                     // llvm.hexagon.M2.mmaculs.s0
    hexagon_M2_mmaculs_s1,                     // llvm.hexagon.M2.mmaculs.s1
    hexagon_M2_mmpyh_rs0,                      // llvm.hexagon.M2.mmpyh.rs0
    hexagon_M2_mmpyh_rs1,                      // llvm.hexagon.M2.mmpyh.rs1
    hexagon_M2_mmpyh_s0,                       // llvm.hexagon.M2.mmpyh.s0
    hexagon_M2_mmpyh_s1,                       // llvm.hexagon.M2.mmpyh.s1
    hexagon_M2_mmpyl_rs0,                      // llvm.hexagon.M2.mmpyl.rs0
    hexagon_M2_mmpyl_rs1,                      // llvm.hexagon.M2.mmpyl.rs1
    hexagon_M2_mmpyl_s0,                       // llvm.hexagon.M2.mmpyl.s0
    hexagon_M2_mmpyl_s1,                       // llvm.hexagon.M2.mmpyl.s1
    hexagon_M2_mmpyuh_rs0,                     // llvm.hexagon.M2.mmpyuh.rs0
    hexagon_M2_mmpyuh_rs1,                     // llvm.hexagon.M2.mmpyuh.rs1
    hexagon_M2_mmpyuh_s0,                      // llvm.hexagon.M2.mmpyuh.s0
    hexagon_M2_mmpyuh_s1,                      // llvm.hexagon.M2.mmpyuh.s1
    hexagon_M2_mmpyul_rs0,                     // llvm.hexagon.M2.mmpyul.rs0
    hexagon_M2_mmpyul_rs1,                     // llvm.hexagon.M2.mmpyul.rs1
    hexagon_M2_mmpyul_s0,                      // llvm.hexagon.M2.mmpyul.s0
    hexagon_M2_mmpyul_s1,                      // llvm.hexagon.M2.mmpyul.s1
    hexagon_M2_mpy_acc_hh_s0,                  // llvm.hexagon.M2.mpy.acc.hh.s0
    hexagon_M2_mpy_acc_hh_s1,                  // llvm.hexagon.M2.mpy.acc.hh.s1
    hexagon_M2_mpy_acc_hl_s0,                  // llvm.hexagon.M2.mpy.acc.hl.s0
    hexagon_M2_mpy_acc_hl_s1,                  // llvm.hexagon.M2.mpy.acc.hl.s1
    hexagon_M2_mpy_acc_lh_s0,                  // llvm.hexagon.M2.mpy.acc.lh.s0
    hexagon_M2_mpy_acc_lh_s1,                  // llvm.hexagon.M2.mpy.acc.lh.s1
    hexagon_M2_mpy_acc_ll_s0,                  // llvm.hexagon.M2.mpy.acc.ll.s0
    hexagon_M2_mpy_acc_ll_s1,                  // llvm.hexagon.M2.mpy.acc.ll.s1
    hexagon_M2_mpy_acc_sat_hh_s0,              // llvm.hexagon.M2.mpy.acc.sat.hh.s0
    hexagon_M2_mpy_acc_sat_hh_s1,              // llvm.hexagon.M2.mpy.acc.sat.hh.s1
    hexagon_M2_mpy_acc_sat_hl_s0,              // llvm.hexagon.M2.mpy.acc.sat.hl.s0
    hexagon_M2_mpy_acc_sat_hl_s1,              // llvm.hexagon.M2.mpy.acc.sat.hl.s1
    hexagon_M2_mpy_acc_sat_lh_s0,              // llvm.hexagon.M2.mpy.acc.sat.lh.s0
    hexagon_M2_mpy_acc_sat_lh_s1,              // llvm.hexagon.M2.mpy.acc.sat.lh.s1
    hexagon_M2_mpy_acc_sat_ll_s0,              // llvm.hexagon.M2.mpy.acc.sat.ll.s0
    hexagon_M2_mpy_acc_sat_ll_s1,              // llvm.hexagon.M2.mpy.acc.sat.ll.s1
    hexagon_M2_mpy_hh_s0,                      // llvm.hexagon.M2.mpy.hh.s0
    hexagon_M2_mpy_hh_s1,                      // llvm.hexagon.M2.mpy.hh.s1
    hexagon_M2_mpy_hl_s0,                      // llvm.hexagon.M2.mpy.hl.s0
    hexagon_M2_mpy_hl_s1,                      // llvm.hexagon.M2.mpy.hl.s1
    hexagon_M2_mpy_lh_s0,                      // llvm.hexagon.M2.mpy.lh.s0
    hexagon_M2_mpy_lh_s1,                      // llvm.hexagon.M2.mpy.lh.s1
    hexagon_M2_mpy_ll_s0,                      // llvm.hexagon.M2.mpy.ll.s0
    hexagon_M2_mpy_ll_s1,                      // llvm.hexagon.M2.mpy.ll.s1
    hexagon_M2_mpy_nac_hh_s0,                  // llvm.hexagon.M2.mpy.nac.hh.s0
    hexagon_M2_mpy_nac_hh_s1,                  // llvm.hexagon.M2.mpy.nac.hh.s1
    hexagon_M2_mpy_nac_hl_s0,                  // llvm.hexagon.M2.mpy.nac.hl.s0
    hexagon_M2_mpy_nac_hl_s1,                  // llvm.hexagon.M2.mpy.nac.hl.s1
    hexagon_M2_mpy_nac_lh_s0,                  // llvm.hexagon.M2.mpy.nac.lh.s0
    hexagon_M2_mpy_nac_lh_s1,                  // llvm.hexagon.M2.mpy.nac.lh.s1
    hexagon_M2_mpy_nac_ll_s0,                  // llvm.hexagon.M2.mpy.nac.ll.s0
    hexagon_M2_mpy_nac_ll_s1,                  // llvm.hexagon.M2.mpy.nac.ll.s1
    hexagon_M2_mpy_nac_sat_hh_s0,              // llvm.hexagon.M2.mpy.nac.sat.hh.s0
    hexagon_M2_mpy_nac_sat_hh_s1,              // llvm.hexagon.M2.mpy.nac.sat.hh.s1
    hexagon_M2_mpy_nac_sat_hl_s0,              // llvm.hexagon.M2.mpy.nac.sat.hl.s0
    hexagon_M2_mpy_nac_sat_hl_s1,              // llvm.hexagon.M2.mpy.nac.sat.hl.s1
    hexagon_M2_mpy_nac_sat_lh_s0,              // llvm.hexagon.M2.mpy.nac.sat.lh.s0
    hexagon_M2_mpy_nac_sat_lh_s1,              // llvm.hexagon.M2.mpy.nac.sat.lh.s1
    hexagon_M2_mpy_nac_sat_ll_s0,              // llvm.hexagon.M2.mpy.nac.sat.ll.s0
    hexagon_M2_mpy_nac_sat_ll_s1,              // llvm.hexagon.M2.mpy.nac.sat.ll.s1
    hexagon_M2_mpy_rnd_hh_s0,                  // llvm.hexagon.M2.mpy.rnd.hh.s0
    hexagon_M2_mpy_rnd_hh_s1,                  // llvm.hexagon.M2.mpy.rnd.hh.s1
    hexagon_M2_mpy_rnd_hl_s0,                  // llvm.hexagon.M2.mpy.rnd.hl.s0
    hexagon_M2_mpy_rnd_hl_s1,                  // llvm.hexagon.M2.mpy.rnd.hl.s1
    hexagon_M2_mpy_rnd_lh_s0,                  // llvm.hexagon.M2.mpy.rnd.lh.s0
    hexagon_M2_mpy_rnd_lh_s1,                  // llvm.hexagon.M2.mpy.rnd.lh.s1
    hexagon_M2_mpy_rnd_ll_s0,                  // llvm.hexagon.M2.mpy.rnd.ll.s0
    hexagon_M2_mpy_rnd_ll_s1,                  // llvm.hexagon.M2.mpy.rnd.ll.s1
    hexagon_M2_mpy_sat_hh_s0,                  // llvm.hexagon.M2.mpy.sat.hh.s0
    hexagon_M2_mpy_sat_hh_s1,                  // llvm.hexagon.M2.mpy.sat.hh.s1
    hexagon_M2_mpy_sat_hl_s0,                  // llvm.hexagon.M2.mpy.sat.hl.s0
    hexagon_M2_mpy_sat_hl_s1,                  // llvm.hexagon.M2.mpy.sat.hl.s1
    hexagon_M2_mpy_sat_lh_s0,                  // llvm.hexagon.M2.mpy.sat.lh.s0
    hexagon_M2_mpy_sat_lh_s1,                  // llvm.hexagon.M2.mpy.sat.lh.s1
    hexagon_M2_mpy_sat_ll_s0,                  // llvm.hexagon.M2.mpy.sat.ll.s0
    hexagon_M2_mpy_sat_ll_s1,                  // llvm.hexagon.M2.mpy.sat.ll.s1
    hexagon_M2_mpy_sat_rnd_hh_s0,              // llvm.hexagon.M2.mpy.sat.rnd.hh.s0
    hexagon_M2_mpy_sat_rnd_hh_s1,              // llvm.hexagon.M2.mpy.sat.rnd.hh.s1
    hexagon_M2_mpy_sat_rnd_hl_s0,              // llvm.hexagon.M2.mpy.sat.rnd.hl.s0
    hexagon_M2_mpy_sat_rnd_hl_s1,              // llvm.hexagon.M2.mpy.sat.rnd.hl.s1
    hexagon_M2_mpy_sat_rnd_lh_s0,              // llvm.hexagon.M2.mpy.sat.rnd.lh.s0
    hexagon_M2_mpy_sat_rnd_lh_s1,              // llvm.hexagon.M2.mpy.sat.rnd.lh.s1
    hexagon_M2_mpy_sat_rnd_ll_s0,              // llvm.hexagon.M2.mpy.sat.rnd.ll.s0
    hexagon_M2_mpy_sat_rnd_ll_s1,              // llvm.hexagon.M2.mpy.sat.rnd.ll.s1
    hexagon_M2_mpy_up,                         // llvm.hexagon.M2.mpy.up
    hexagon_M2_mpy_up_s1,                      // llvm.hexagon.M2.mpy.up.s1
    hexagon_M2_mpy_up_s1_sat,                  // llvm.hexagon.M2.mpy.up.s1.sat
    hexagon_M2_mpyd_acc_hh_s0,                 // llvm.hexagon.M2.mpyd.acc.hh.s0
    hexagon_M2_mpyd_acc_hh_s1,                 // llvm.hexagon.M2.mpyd.acc.hh.s1
    hexagon_M2_mpyd_acc_hl_s0,                 // llvm.hexagon.M2.mpyd.acc.hl.s0
    hexagon_M2_mpyd_acc_hl_s1,                 // llvm.hexagon.M2.mpyd.acc.hl.s1
    hexagon_M2_mpyd_acc_lh_s0,                 // llvm.hexagon.M2.mpyd.acc.lh.s0
    hexagon_M2_mpyd_acc_lh_s1,                 // llvm.hexagon.M2.mpyd.acc.lh.s1
    hexagon_M2_mpyd_acc_ll_s0,                 // llvm.hexagon.M2.mpyd.acc.ll.s0
    hexagon_M2_mpyd_acc_ll_s1,                 // llvm.hexagon.M2.mpyd.acc.ll.s1
    hexagon_M2_mpyd_hh_s0,                     // llvm.hexagon.M2.mpyd.hh.s0
    hexagon_M2_mpyd_hh_s1,                     // llvm.hexagon.M2.mpyd.hh.s1
    hexagon_M2_mpyd_hl_s0,                     // llvm.hexagon.M2.mpyd.hl.s0
    hexagon_M2_mpyd_hl_s1,                     // llvm.hexagon.M2.mpyd.hl.s1
    hexagon_M2_mpyd_lh_s0,                     // llvm.hexagon.M2.mpyd.lh.s0
    hexagon_M2_mpyd_lh_s1,                     // llvm.hexagon.M2.mpyd.lh.s1
    hexagon_M2_mpyd_ll_s0,                     // llvm.hexagon.M2.mpyd.ll.s0
    hexagon_M2_mpyd_ll_s1,                     // llvm.hexagon.M2.mpyd.ll.s1
    hexagon_M2_mpyd_nac_hh_s0,                 // llvm.hexagon.M2.mpyd.nac.hh.s0
    hexagon_M2_mpyd_nac_hh_s1,                 // llvm.hexagon.M2.mpyd.nac.hh.s1
    hexagon_M2_mpyd_nac_hl_s0,                 // llvm.hexagon.M2.mpyd.nac.hl.s0
    hexagon_M2_mpyd_nac_hl_s1,                 // llvm.hexagon.M2.mpyd.nac.hl.s1
    hexagon_M2_mpyd_nac_lh_s0,                 // llvm.hexagon.M2.mpyd.nac.lh.s0
    hexagon_M2_mpyd_nac_lh_s1,                 // llvm.hexagon.M2.mpyd.nac.lh.s1
    hexagon_M2_mpyd_nac_ll_s0,                 // llvm.hexagon.M2.mpyd.nac.ll.s0
    hexagon_M2_mpyd_nac_ll_s1,                 // llvm.hexagon.M2.mpyd.nac.ll.s1
    hexagon_M2_mpyd_rnd_hh_s0,                 // llvm.hexagon.M2.mpyd.rnd.hh.s0
    hexagon_M2_mpyd_rnd_hh_s1,                 // llvm.hexagon.M2.mpyd.rnd.hh.s1
    hexagon_M2_mpyd_rnd_hl_s0,                 // llvm.hexagon.M2.mpyd.rnd.hl.s0
    hexagon_M2_mpyd_rnd_hl_s1,                 // llvm.hexagon.M2.mpyd.rnd.hl.s1
    hexagon_M2_mpyd_rnd_lh_s0,                 // llvm.hexagon.M2.mpyd.rnd.lh.s0
    hexagon_M2_mpyd_rnd_lh_s1,                 // llvm.hexagon.M2.mpyd.rnd.lh.s1
    hexagon_M2_mpyd_rnd_ll_s0,                 // llvm.hexagon.M2.mpyd.rnd.ll.s0
    hexagon_M2_mpyd_rnd_ll_s1,                 // llvm.hexagon.M2.mpyd.rnd.ll.s1
    hexagon_M2_mpyi,                           // llvm.hexagon.M2.mpyi
    hexagon_M2_mpysmi,                         // llvm.hexagon.M2.mpysmi
    hexagon_M2_mpysu_up,                       // llvm.hexagon.M2.mpysu.up
    hexagon_M2_mpyu_acc_hh_s0,                 // llvm.hexagon.M2.mpyu.acc.hh.s0
    hexagon_M2_mpyu_acc_hh_s1,                 // llvm.hexagon.M2.mpyu.acc.hh.s1
    hexagon_M2_mpyu_acc_hl_s0,                 // llvm.hexagon.M2.mpyu.acc.hl.s0
    hexagon_M2_mpyu_acc_hl_s1,                 // llvm.hexagon.M2.mpyu.acc.hl.s1
    hexagon_M2_mpyu_acc_lh_s0,                 // llvm.hexagon.M2.mpyu.acc.lh.s0
    hexagon_M2_mpyu_acc_lh_s1,                 // llvm.hexagon.M2.mpyu.acc.lh.s1
    hexagon_M2_mpyu_acc_ll_s0,                 // llvm.hexagon.M2.mpyu.acc.ll.s0
    hexagon_M2_mpyu_acc_ll_s1,                 // llvm.hexagon.M2.mpyu.acc.ll.s1
    hexagon_M2_mpyu_hh_s0,                     // llvm.hexagon.M2.mpyu.hh.s0
    hexagon_M2_mpyu_hh_s1,                     // llvm.hexagon.M2.mpyu.hh.s1
    hexagon_M2_mpyu_hl_s0,                     // llvm.hexagon.M2.mpyu.hl.s0
    hexagon_M2_mpyu_hl_s1,                     // llvm.hexagon.M2.mpyu.hl.s1
    hexagon_M2_mpyu_lh_s0,                     // llvm.hexagon.M2.mpyu.lh.s0
    hexagon_M2_mpyu_lh_s1,                     // llvm.hexagon.M2.mpyu.lh.s1
    hexagon_M2_mpyu_ll_s0,                     // llvm.hexagon.M2.mpyu.ll.s0
    hexagon_M2_mpyu_ll_s1,                     // llvm.hexagon.M2.mpyu.ll.s1
    hexagon_M2_mpyu_nac_hh_s0,                 // llvm.hexagon.M2.mpyu.nac.hh.s0
    hexagon_M2_mpyu_nac_hh_s1,                 // llvm.hexagon.M2.mpyu.nac.hh.s1
    hexagon_M2_mpyu_nac_hl_s0,                 // llvm.hexagon.M2.mpyu.nac.hl.s0
    hexagon_M2_mpyu_nac_hl_s1,                 // llvm.hexagon.M2.mpyu.nac.hl.s1
    hexagon_M2_mpyu_nac_lh_s0,                 // llvm.hexagon.M2.mpyu.nac.lh.s0
    hexagon_M2_mpyu_nac_lh_s1,                 // llvm.hexagon.M2.mpyu.nac.lh.s1
    hexagon_M2_mpyu_nac_ll_s0,                 // llvm.hexagon.M2.mpyu.nac.ll.s0
    hexagon_M2_mpyu_nac_ll_s1,                 // llvm.hexagon.M2.mpyu.nac.ll.s1
    hexagon_M2_mpyu_up,                        // llvm.hexagon.M2.mpyu.up
    hexagon_M2_mpyud_acc_hh_s0,                // llvm.hexagon.M2.mpyud.acc.hh.s0
    hexagon_M2_mpyud_acc_hh_s1,                // llvm.hexagon.M2.mpyud.acc.hh.s1
    hexagon_M2_mpyud_acc_hl_s0,                // llvm.hexagon.M2.mpyud.acc.hl.s0
    hexagon_M2_mpyud_acc_hl_s1,                // llvm.hexagon.M2.mpyud.acc.hl.s1
    hexagon_M2_mpyud_acc_lh_s0,                // llvm.hexagon.M2.mpyud.acc.lh.s0
    hexagon_M2_mpyud_acc_lh_s1,                // llvm.hexagon.M2.mpyud.acc.lh.s1
    hexagon_M2_mpyud_acc_ll_s0,                // llvm.hexagon.M2.mpyud.acc.ll.s0
    hexagon_M2_mpyud_acc_ll_s1,                // llvm.hexagon.M2.mpyud.acc.ll.s1
    hexagon_M2_mpyud_hh_s0,                    // llvm.hexagon.M2.mpyud.hh.s0
    hexagon_M2_mpyud_hh_s1,                    // llvm.hexagon.M2.mpyud.hh.s1
    hexagon_M2_mpyud_hl_s0,                    // llvm.hexagon.M2.mpyud.hl.s0
    hexagon_M2_mpyud_hl_s1,                    // llvm.hexagon.M2.mpyud.hl.s1
    hexagon_M2_mpyud_lh_s0,                    // llvm.hexagon.M2.mpyud.lh.s0
    hexagon_M2_mpyud_lh_s1,                    // llvm.hexagon.M2.mpyud.lh.s1
    hexagon_M2_mpyud_ll_s0,                    // llvm.hexagon.M2.mpyud.ll.s0
    hexagon_M2_mpyud_ll_s1,                    // llvm.hexagon.M2.mpyud.ll.s1
    hexagon_M2_mpyud_nac_hh_s0,                // llvm.hexagon.M2.mpyud.nac.hh.s0
    hexagon_M2_mpyud_nac_hh_s1,                // llvm.hexagon.M2.mpyud.nac.hh.s1
    hexagon_M2_mpyud_nac_hl_s0,                // llvm.hexagon.M2.mpyud.nac.hl.s0
    hexagon_M2_mpyud_nac_hl_s1,                // llvm.hexagon.M2.mpyud.nac.hl.s1
    hexagon_M2_mpyud_nac_lh_s0,                // llvm.hexagon.M2.mpyud.nac.lh.s0
    hexagon_M2_mpyud_nac_lh_s1,                // llvm.hexagon.M2.mpyud.nac.lh.s1
    hexagon_M2_mpyud_nac_ll_s0,                // llvm.hexagon.M2.mpyud.nac.ll.s0
    hexagon_M2_mpyud_nac_ll_s1,                // llvm.hexagon.M2.mpyud.nac.ll.s1
    hexagon_M2_mpyui,                          // llvm.hexagon.M2.mpyui
    hexagon_M2_nacci,                          // llvm.hexagon.M2.nacci
    hexagon_M2_naccii,                         // llvm.hexagon.M2.naccii
    hexagon_M2_subacc,                         // llvm.hexagon.M2.subacc
    hexagon_M2_vabsdiffh,                      // llvm.hexagon.M2.vabsdiffh
    hexagon_M2_vabsdiffw,                      // llvm.hexagon.M2.vabsdiffw
    hexagon_M2_vcmac_s0_sat_i,                 // llvm.hexagon.M2.vcmac.s0.sat.i
    hexagon_M2_vcmac_s0_sat_r,                 // llvm.hexagon.M2.vcmac.s0.sat.r
    hexagon_M2_vcmpy_s0_sat_i,                 // llvm.hexagon.M2.vcmpy.s0.sat.i
    hexagon_M2_vcmpy_s0_sat_r,                 // llvm.hexagon.M2.vcmpy.s0.sat.r
    hexagon_M2_vcmpy_s1_sat_i,                 // llvm.hexagon.M2.vcmpy.s1.sat.i
    hexagon_M2_vcmpy_s1_sat_r,                 // llvm.hexagon.M2.vcmpy.s1.sat.r
    hexagon_M2_vdmacs_s0,                      // llvm.hexagon.M2.vdmacs.s0
    hexagon_M2_vdmacs_s1,                      // llvm.hexagon.M2.vdmacs.s1
    hexagon_M2_vdmpyrs_s0,                     // llvm.hexagon.M2.vdmpyrs.s0
    hexagon_M2_vdmpyrs_s1,                     // llvm.hexagon.M2.vdmpyrs.s1
    hexagon_M2_vdmpys_s0,                      // llvm.hexagon.M2.vdmpys.s0
    hexagon_M2_vdmpys_s1,                      // llvm.hexagon.M2.vdmpys.s1
    hexagon_M2_vmac2,                          // llvm.hexagon.M2.vmac2
    hexagon_M2_vmac2es,                        // llvm.hexagon.M2.vmac2es
    hexagon_M2_vmac2es_s0,                     // llvm.hexagon.M2.vmac2es.s0
    hexagon_M2_vmac2es_s1,                     // llvm.hexagon.M2.vmac2es.s1
    hexagon_M2_vmac2s_s0,                      // llvm.hexagon.M2.vmac2s.s0
    hexagon_M2_vmac2s_s1,                      // llvm.hexagon.M2.vmac2s.s1
    hexagon_M2_vmac2su_s0,                     // llvm.hexagon.M2.vmac2su.s0
    hexagon_M2_vmac2su_s1,                     // llvm.hexagon.M2.vmac2su.s1
    hexagon_M2_vmpy2es_s0,                     // llvm.hexagon.M2.vmpy2es.s0
    hexagon_M2_vmpy2es_s1,                     // llvm.hexagon.M2.vmpy2es.s1
    hexagon_M2_vmpy2s_s0,                      // llvm.hexagon.M2.vmpy2s.s0
    hexagon_M2_vmpy2s_s0pack,                  // llvm.hexagon.M2.vmpy2s.s0pack
    hexagon_M2_vmpy2s_s1,                      // llvm.hexagon.M2.vmpy2s.s1
    hexagon_M2_vmpy2s_s1pack,                  // llvm.hexagon.M2.vmpy2s.s1pack
    hexagon_M2_vmpy2su_s0,                     // llvm.hexagon.M2.vmpy2su.s0
    hexagon_M2_vmpy2su_s1,                     // llvm.hexagon.M2.vmpy2su.s1
    hexagon_M2_vraddh,                         // llvm.hexagon.M2.vraddh
    hexagon_M2_vradduh,                        // llvm.hexagon.M2.vradduh
    hexagon_M2_vrcmaci_s0,                     // llvm.hexagon.M2.vrcmaci.s0
    hexagon_M2_vrcmaci_s0c,                    // llvm.hexagon.M2.vrcmaci.s0c
    hexagon_M2_vrcmacr_s0,                     // llvm.hexagon.M2.vrcmacr.s0
    hexagon_M2_vrcmacr_s0c,                    // llvm.hexagon.M2.vrcmacr.s0c
    hexagon_M2_vrcmpyi_s0,                     // llvm.hexagon.M2.vrcmpyi.s0
    hexagon_M2_vrcmpyi_s0c,                    // llvm.hexagon.M2.vrcmpyi.s0c
    hexagon_M2_vrcmpyr_s0,                     // llvm.hexagon.M2.vrcmpyr.s0
    hexagon_M2_vrcmpyr_s0c,                    // llvm.hexagon.M2.vrcmpyr.s0c
    hexagon_M2_vrcmpys_acc_s1,                 // llvm.hexagon.M2.vrcmpys.acc.s1
    hexagon_M2_vrcmpys_s1,                     // llvm.hexagon.M2.vrcmpys.s1
    hexagon_M2_vrcmpys_s1rp,                   // llvm.hexagon.M2.vrcmpys.s1rp
    hexagon_M2_vrmac_s0,                       // llvm.hexagon.M2.vrmac.s0
    hexagon_M2_vrmpy_s0,                       // llvm.hexagon.M2.vrmpy.s0
    hexagon_M2_xor_xacc,                       // llvm.hexagon.M2.xor.xacc
    hexagon_M4_and_and,                        // llvm.hexagon.M4.and.and
    hexagon_M4_and_andn,                       // llvm.hexagon.M4.and.andn
    hexagon_M4_and_or,                         // llvm.hexagon.M4.and.or
    hexagon_M4_and_xor,                        // llvm.hexagon.M4.and.xor
    hexagon_M4_cmpyi_wh,                       // llvm.hexagon.M4.cmpyi.wh
    hexagon_M4_cmpyi_whc,                      // llvm.hexagon.M4.cmpyi.whc
    hexagon_M4_cmpyr_wh,                       // llvm.hexagon.M4.cmpyr.wh
    hexagon_M4_cmpyr_whc,                      // llvm.hexagon.M4.cmpyr.whc
    hexagon_M4_mac_up_s1_sat,                  // llvm.hexagon.M4.mac.up.s1.sat
    hexagon_M4_mpyri_addi,                     // llvm.hexagon.M4.mpyri.addi
    hexagon_M4_mpyri_addr,                     // llvm.hexagon.M4.mpyri.addr
    hexagon_M4_mpyri_addr_u2,                  // llvm.hexagon.M4.mpyri.addr.u2
    hexagon_M4_mpyrr_addi,                     // llvm.hexagon.M4.mpyrr.addi
    hexagon_M4_mpyrr_addr,                     // llvm.hexagon.M4.mpyrr.addr
    hexagon_M4_nac_up_s1_sat,                  // llvm.hexagon.M4.nac.up.s1.sat
    hexagon_M4_or_and,                         // llvm.hexagon.M4.or.and
    hexagon_M4_or_andn,                        // llvm.hexagon.M4.or.andn
    hexagon_M4_or_or,                          // llvm.hexagon.M4.or.or
    hexagon_M4_or_xor,                         // llvm.hexagon.M4.or.xor
    hexagon_M4_pmpyw,                          // llvm.hexagon.M4.pmpyw
    hexagon_M4_pmpyw_acc,                      // llvm.hexagon.M4.pmpyw.acc
    hexagon_M4_vpmpyh,                         // llvm.hexagon.M4.vpmpyh
    hexagon_M4_vpmpyh_acc,                     // llvm.hexagon.M4.vpmpyh.acc
    hexagon_M4_vrmpyeh_acc_s0,                 // llvm.hexagon.M4.vrmpyeh.acc.s0
    hexagon_M4_vrmpyeh_acc_s1,                 // llvm.hexagon.M4.vrmpyeh.acc.s1
    hexagon_M4_vrmpyeh_s0,                     // llvm.hexagon.M4.vrmpyeh.s0
    hexagon_M4_vrmpyeh_s1,                     // llvm.hexagon.M4.vrmpyeh.s1
    hexagon_M4_vrmpyoh_acc_s0,                 // llvm.hexagon.M4.vrmpyoh.acc.s0
    hexagon_M4_vrmpyoh_acc_s1,                 // llvm.hexagon.M4.vrmpyoh.acc.s1
    hexagon_M4_vrmpyoh_s0,                     // llvm.hexagon.M4.vrmpyoh.s0
    hexagon_M4_vrmpyoh_s1,                     // llvm.hexagon.M4.vrmpyoh.s1
    hexagon_M4_xor_and,                        // llvm.hexagon.M4.xor.and
    hexagon_M4_xor_andn,                       // llvm.hexagon.M4.xor.andn
    hexagon_M4_xor_or,                         // llvm.hexagon.M4.xor.or
    hexagon_M4_xor_xacc,                       // llvm.hexagon.M4.xor.xacc
    hexagon_M5_vdmacbsu,                       // llvm.hexagon.M5.vdmacbsu
    hexagon_M5_vdmpybsu,                       // llvm.hexagon.M5.vdmpybsu
    hexagon_M5_vmacbsu,                        // llvm.hexagon.M5.vmacbsu
    hexagon_M5_vmacbuu,                        // llvm.hexagon.M5.vmacbuu
    hexagon_M5_vmpybsu,                        // llvm.hexagon.M5.vmpybsu
    hexagon_M5_vmpybuu,                        // llvm.hexagon.M5.vmpybuu
    hexagon_M5_vrmacbsu,                       // llvm.hexagon.M5.vrmacbsu
    hexagon_M5_vrmacbuu,                       // llvm.hexagon.M5.vrmacbuu
    hexagon_M5_vrmpybsu,                       // llvm.hexagon.M5.vrmpybsu
    hexagon_M5_vrmpybuu,                       // llvm.hexagon.M5.vrmpybuu
    hexagon_S2_addasl_rrri,                    // llvm.hexagon.S2.addasl.rrri
    hexagon_S2_asl_i_p,                        // llvm.hexagon.S2.asl.i.p
    hexagon_S2_asl_i_p_acc,                    // llvm.hexagon.S2.asl.i.p.acc
    hexagon_S2_asl_i_p_and,                    // llvm.hexagon.S2.asl.i.p.and
    hexagon_S2_asl_i_p_nac,                    // llvm.hexagon.S2.asl.i.p.nac
    hexagon_S2_asl_i_p_or,                     // llvm.hexagon.S2.asl.i.p.or
    hexagon_S2_asl_i_p_xacc,                   // llvm.hexagon.S2.asl.i.p.xacc
    hexagon_S2_asl_i_r,                        // llvm.hexagon.S2.asl.i.r
    hexagon_S2_asl_i_r_acc,                    // llvm.hexagon.S2.asl.i.r.acc
    hexagon_S2_asl_i_r_and,                    // llvm.hexagon.S2.asl.i.r.and
    hexagon_S2_asl_i_r_nac,                    // llvm.hexagon.S2.asl.i.r.nac
    hexagon_S2_asl_i_r_or,                     // llvm.hexagon.S2.asl.i.r.or
    hexagon_S2_asl_i_r_sat,                    // llvm.hexagon.S2.asl.i.r.sat
    hexagon_S2_asl_i_r_xacc,                   // llvm.hexagon.S2.asl.i.r.xacc
    hexagon_S2_asl_i_vh,                       // llvm.hexagon.S2.asl.i.vh
    hexagon_S2_asl_i_vw,                       // llvm.hexagon.S2.asl.i.vw
    hexagon_S2_asl_r_p,                        // llvm.hexagon.S2.asl.r.p
    hexagon_S2_asl_r_p_acc,                    // llvm.hexagon.S2.asl.r.p.acc
    hexagon_S2_asl_r_p_and,                    // llvm.hexagon.S2.asl.r.p.and
    hexagon_S2_asl_r_p_nac,                    // llvm.hexagon.S2.asl.r.p.nac
    hexagon_S2_asl_r_p_or,                     // llvm.hexagon.S2.asl.r.p.or
    hexagon_S2_asl_r_p_xor,                    // llvm.hexagon.S2.asl.r.p.xor
    hexagon_S2_asl_r_r,                        // llvm.hexagon.S2.asl.r.r
    hexagon_S2_asl_r_r_acc,                    // llvm.hexagon.S2.asl.r.r.acc
    hexagon_S2_asl_r_r_and,                    // llvm.hexagon.S2.asl.r.r.and
    hexagon_S2_asl_r_r_nac,                    // llvm.hexagon.S2.asl.r.r.nac
    hexagon_S2_asl_r_r_or,                     // llvm.hexagon.S2.asl.r.r.or
    hexagon_S2_asl_r_r_sat,                    // llvm.hexagon.S2.asl.r.r.sat
    hexagon_S2_asl_r_vh,                       // llvm.hexagon.S2.asl.r.vh
    hexagon_S2_asl_r_vw,                       // llvm.hexagon.S2.asl.r.vw
    hexagon_S2_asr_i_p,                        // llvm.hexagon.S2.asr.i.p
    hexagon_S2_asr_i_p_acc,                    // llvm.hexagon.S2.asr.i.p.acc
    hexagon_S2_asr_i_p_and,                    // llvm.hexagon.S2.asr.i.p.and
    hexagon_S2_asr_i_p_nac,                    // llvm.hexagon.S2.asr.i.p.nac
    hexagon_S2_asr_i_p_or,                     // llvm.hexagon.S2.asr.i.p.or
    hexagon_S2_asr_i_p_rnd,                    // llvm.hexagon.S2.asr.i.p.rnd
    hexagon_S2_asr_i_p_rnd_goodsyntax,         // llvm.hexagon.S2.asr.i.p.rnd.goodsyntax
    hexagon_S2_asr_i_r,                        // llvm.hexagon.S2.asr.i.r
    hexagon_S2_asr_i_r_acc,                    // llvm.hexagon.S2.asr.i.r.acc
    hexagon_S2_asr_i_r_and,                    // llvm.hexagon.S2.asr.i.r.and
    hexagon_S2_asr_i_r_nac,                    // llvm.hexagon.S2.asr.i.r.nac
    hexagon_S2_asr_i_r_or,                     // llvm.hexagon.S2.asr.i.r.or
    hexagon_S2_asr_i_r_rnd,                    // llvm.hexagon.S2.asr.i.r.rnd
    hexagon_S2_asr_i_r_rnd_goodsyntax,         // llvm.hexagon.S2.asr.i.r.rnd.goodsyntax
    hexagon_S2_asr_i_svw_trun,                 // llvm.hexagon.S2.asr.i.svw.trun
    hexagon_S2_asr_i_vh,                       // llvm.hexagon.S2.asr.i.vh
    hexagon_S2_asr_i_vw,                       // llvm.hexagon.S2.asr.i.vw
    hexagon_S2_asr_r_p,                        // llvm.hexagon.S2.asr.r.p
    hexagon_S2_asr_r_p_acc,                    // llvm.hexagon.S2.asr.r.p.acc
    hexagon_S2_asr_r_p_and,                    // llvm.hexagon.S2.asr.r.p.and
    hexagon_S2_asr_r_p_nac,                    // llvm.hexagon.S2.asr.r.p.nac
    hexagon_S2_asr_r_p_or,                     // llvm.hexagon.S2.asr.r.p.or
    hexagon_S2_asr_r_p_xor,                    // llvm.hexagon.S2.asr.r.p.xor
    hexagon_S2_asr_r_r,                        // llvm.hexagon.S2.asr.r.r
    hexagon_S2_asr_r_r_acc,                    // llvm.hexagon.S2.asr.r.r.acc
    hexagon_S2_asr_r_r_and,                    // llvm.hexagon.S2.asr.r.r.and
    hexagon_S2_asr_r_r_nac,                    // llvm.hexagon.S2.asr.r.r.nac
    hexagon_S2_asr_r_r_or,                     // llvm.hexagon.S2.asr.r.r.or
    hexagon_S2_asr_r_r_sat,                    // llvm.hexagon.S2.asr.r.r.sat
    hexagon_S2_asr_r_svw_trun,                 // llvm.hexagon.S2.asr.r.svw.trun
    hexagon_S2_asr_r_vh,                       // llvm.hexagon.S2.asr.r.vh
    hexagon_S2_asr_r_vw,                       // llvm.hexagon.S2.asr.r.vw
    hexagon_S2_brev,                           // llvm.hexagon.S2.brev
    hexagon_S2_brevp,                          // llvm.hexagon.S2.brevp
    hexagon_S2_cl0,                            // llvm.hexagon.S2.cl0
    hexagon_S2_cl0p,                           // llvm.hexagon.S2.cl0p
    hexagon_S2_cl1,                            // llvm.hexagon.S2.cl1
    hexagon_S2_cl1p,                           // llvm.hexagon.S2.cl1p
    hexagon_S2_clb,                            // llvm.hexagon.S2.clb
    hexagon_S2_clbnorm,                        // llvm.hexagon.S2.clbnorm
    hexagon_S2_clbp,                           // llvm.hexagon.S2.clbp
    hexagon_S2_clrbit_i,                       // llvm.hexagon.S2.clrbit.i
    hexagon_S2_clrbit_r,                       // llvm.hexagon.S2.clrbit.r
    hexagon_S2_ct0,                            // llvm.hexagon.S2.ct0
    hexagon_S2_ct0p,                           // llvm.hexagon.S2.ct0p
    hexagon_S2_ct1,                            // llvm.hexagon.S2.ct1
    hexagon_S2_ct1p,                           // llvm.hexagon.S2.ct1p
    hexagon_S2_deinterleave,                   // llvm.hexagon.S2.deinterleave
    hexagon_S2_extractu,                       // llvm.hexagon.S2.extractu
    hexagon_S2_extractu_rp,                    // llvm.hexagon.S2.extractu.rp
    hexagon_S2_extractup,                      // llvm.hexagon.S2.extractup
    hexagon_S2_extractup_rp,                   // llvm.hexagon.S2.extractup.rp
    hexagon_S2_insert,                         // llvm.hexagon.S2.insert
    hexagon_S2_insert_rp,                      // llvm.hexagon.S2.insert.rp
    hexagon_S2_insertp,                        // llvm.hexagon.S2.insertp
    hexagon_S2_insertp_rp,                     // llvm.hexagon.S2.insertp.rp
    hexagon_S2_interleave,                     // llvm.hexagon.S2.interleave
    hexagon_S2_lfsp,                           // llvm.hexagon.S2.lfsp
    hexagon_S2_lsl_r_p,                        // llvm.hexagon.S2.lsl.r.p
    hexagon_S2_lsl_r_p_acc,                    // llvm.hexagon.S2.lsl.r.p.acc
    hexagon_S2_lsl_r_p_and,                    // llvm.hexagon.S2.lsl.r.p.and
    hexagon_S2_lsl_r_p_nac,                    // llvm.hexagon.S2.lsl.r.p.nac
    hexagon_S2_lsl_r_p_or,                     // llvm.hexagon.S2.lsl.r.p.or
    hexagon_S2_lsl_r_p_xor,                    // llvm.hexagon.S2.lsl.r.p.xor
    hexagon_S2_lsl_r_r,                        // llvm.hexagon.S2.lsl.r.r
    hexagon_S2_lsl_r_r_acc,                    // llvm.hexagon.S2.lsl.r.r.acc
    hexagon_S2_lsl_r_r_and,                    // llvm.hexagon.S2.lsl.r.r.and
    hexagon_S2_lsl_r_r_nac,                    // llvm.hexagon.S2.lsl.r.r.nac
    hexagon_S2_lsl_r_r_or,                     // llvm.hexagon.S2.lsl.r.r.or
    hexagon_S2_lsl_r_vh,                       // llvm.hexagon.S2.lsl.r.vh
    hexagon_S2_lsl_r_vw,                       // llvm.hexagon.S2.lsl.r.vw
    hexagon_S2_lsr_i_p,                        // llvm.hexagon.S2.lsr.i.p
    hexagon_S2_lsr_i_p_acc,                    // llvm.hexagon.S2.lsr.i.p.acc
    hexagon_S2_lsr_i_p_and,                    // llvm.hexagon.S2.lsr.i.p.and
    hexagon_S2_lsr_i_p_nac,                    // llvm.hexagon.S2.lsr.i.p.nac
    hexagon_S2_lsr_i_p_or,                     // llvm.hexagon.S2.lsr.i.p.or
    hexagon_S2_lsr_i_p_xacc,                   // llvm.hexagon.S2.lsr.i.p.xacc
    hexagon_S2_lsr_i_r,                        // llvm.hexagon.S2.lsr.i.r
    hexagon_S2_lsr_i_r_acc,                    // llvm.hexagon.S2.lsr.i.r.acc
    hexagon_S2_lsr_i_r_and,                    // llvm.hexagon.S2.lsr.i.r.and
    hexagon_S2_lsr_i_r_nac,                    // llvm.hexagon.S2.lsr.i.r.nac
    hexagon_S2_lsr_i_r_or,                     // llvm.hexagon.S2.lsr.i.r.or
    hexagon_S2_lsr_i_r_xacc,                   // llvm.hexagon.S2.lsr.i.r.xacc
    hexagon_S2_lsr_i_vh,                       // llvm.hexagon.S2.lsr.i.vh
    hexagon_S2_lsr_i_vw,                       // llvm.hexagon.S2.lsr.i.vw
    hexagon_S2_lsr_r_p,                        // llvm.hexagon.S2.lsr.r.p
    hexagon_S2_lsr_r_p_acc,                    // llvm.hexagon.S2.lsr.r.p.acc
    hexagon_S2_lsr_r_p_and,                    // llvm.hexagon.S2.lsr.r.p.and
    hexagon_S2_lsr_r_p_nac,                    // llvm.hexagon.S2.lsr.r.p.nac
    hexagon_S2_lsr_r_p_or,                     // llvm.hexagon.S2.lsr.r.p.or
    hexagon_S2_lsr_r_p_xor,                    // llvm.hexagon.S2.lsr.r.p.xor
    hexagon_S2_lsr_r_r,                        // llvm.hexagon.S2.lsr.r.r
    hexagon_S2_lsr_r_r_acc,                    // llvm.hexagon.S2.lsr.r.r.acc
    hexagon_S2_lsr_r_r_and,                    // llvm.hexagon.S2.lsr.r.r.and
    hexagon_S2_lsr_r_r_nac,                    // llvm.hexagon.S2.lsr.r.r.nac
    hexagon_S2_lsr_r_r_or,                     // llvm.hexagon.S2.lsr.r.r.or
    hexagon_S2_lsr_r_vh,                       // llvm.hexagon.S2.lsr.r.vh
    hexagon_S2_lsr_r_vw,                       // llvm.hexagon.S2.lsr.r.vw
    hexagon_S2_packhl,                         // llvm.hexagon.S2.packhl
    hexagon_S2_parityp,                        // llvm.hexagon.S2.parityp
    hexagon_S2_setbit_i,                       // llvm.hexagon.S2.setbit.i
    hexagon_S2_setbit_r,                       // llvm.hexagon.S2.setbit.r
    hexagon_S2_shuffeb,                        // llvm.hexagon.S2.shuffeb
    hexagon_S2_shuffeh,                        // llvm.hexagon.S2.shuffeh
    hexagon_S2_shuffob,                        // llvm.hexagon.S2.shuffob
    hexagon_S2_shuffoh,                        // llvm.hexagon.S2.shuffoh
    hexagon_S2_svsathb,                        // llvm.hexagon.S2.svsathb
    hexagon_S2_svsathub,                       // llvm.hexagon.S2.svsathub
    hexagon_S2_tableidxb_goodsyntax,           // llvm.hexagon.S2.tableidxb.goodsyntax
    hexagon_S2_tableidxd_goodsyntax,           // llvm.hexagon.S2.tableidxd.goodsyntax
    hexagon_S2_tableidxh_goodsyntax,           // llvm.hexagon.S2.tableidxh.goodsyntax
    hexagon_S2_tableidxw_goodsyntax,           // llvm.hexagon.S2.tableidxw.goodsyntax
    hexagon_S2_togglebit_i,                    // llvm.hexagon.S2.togglebit.i
    hexagon_S2_togglebit_r,                    // llvm.hexagon.S2.togglebit.r
    hexagon_S2_tstbit_i,                       // llvm.hexagon.S2.tstbit.i
    hexagon_S2_tstbit_r,                       // llvm.hexagon.S2.tstbit.r
    hexagon_S2_valignib,                       // llvm.hexagon.S2.valignib
    hexagon_S2_valignrb,                       // llvm.hexagon.S2.valignrb
    hexagon_S2_vcnegh,                         // llvm.hexagon.S2.vcnegh
    hexagon_S2_vcrotate,                       // llvm.hexagon.S2.vcrotate
    hexagon_S2_vrcnegh,                        // llvm.hexagon.S2.vrcnegh
    hexagon_S2_vrndpackwh,                     // llvm.hexagon.S2.vrndpackwh
    hexagon_S2_vrndpackwhs,                    // llvm.hexagon.S2.vrndpackwhs
    hexagon_S2_vsathb,                         // llvm.hexagon.S2.vsathb
    hexagon_S2_vsathb_nopack,                  // llvm.hexagon.S2.vsathb.nopack
    hexagon_S2_vsathub,                        // llvm.hexagon.S2.vsathub
    hexagon_S2_vsathub_nopack,                 // llvm.hexagon.S2.vsathub.nopack
    hexagon_S2_vsatwh,                         // llvm.hexagon.S2.vsatwh
    hexagon_S2_vsatwh_nopack,                  // llvm.hexagon.S2.vsatwh.nopack
    hexagon_S2_vsatwuh,                        // llvm.hexagon.S2.vsatwuh
    hexagon_S2_vsatwuh_nopack,                 // llvm.hexagon.S2.vsatwuh.nopack
    hexagon_S2_vsplatrb,                       // llvm.hexagon.S2.vsplatrb
    hexagon_S2_vsplatrh,                       // llvm.hexagon.S2.vsplatrh
    hexagon_S2_vspliceib,                      // llvm.hexagon.S2.vspliceib
    hexagon_S2_vsplicerb,                      // llvm.hexagon.S2.vsplicerb
    hexagon_S2_vsxtbh,                         // llvm.hexagon.S2.vsxtbh
    hexagon_S2_vsxthw,                         // llvm.hexagon.S2.vsxthw
    hexagon_S2_vtrunehb,                       // llvm.hexagon.S2.vtrunehb
    hexagon_S2_vtrunewh,                       // llvm.hexagon.S2.vtrunewh
    hexagon_S2_vtrunohb,                       // llvm.hexagon.S2.vtrunohb
    hexagon_S2_vtrunowh,                       // llvm.hexagon.S2.vtrunowh
    hexagon_S2_vzxtbh,                         // llvm.hexagon.S2.vzxtbh
    hexagon_S2_vzxthw,                         // llvm.hexagon.S2.vzxthw
    hexagon_S4_addaddi,                        // llvm.hexagon.S4.addaddi
    hexagon_S4_addi_asl_ri,                    // llvm.hexagon.S4.addi.asl.ri
    hexagon_S4_addi_lsr_ri,                    // llvm.hexagon.S4.addi.lsr.ri
    hexagon_S4_andi_asl_ri,                    // llvm.hexagon.S4.andi.asl.ri
    hexagon_S4_andi_lsr_ri,                    // llvm.hexagon.S4.andi.lsr.ri
    hexagon_S4_clbaddi,                        // llvm.hexagon.S4.clbaddi
    hexagon_S4_clbpaddi,                       // llvm.hexagon.S4.clbpaddi
    hexagon_S4_clbpnorm,                       // llvm.hexagon.S4.clbpnorm
    hexagon_S4_extract,                        // llvm.hexagon.S4.extract
    hexagon_S4_extract_rp,                     // llvm.hexagon.S4.extract.rp
    hexagon_S4_extractp,                       // llvm.hexagon.S4.extractp
    hexagon_S4_extractp_rp,                    // llvm.hexagon.S4.extractp.rp
    hexagon_S4_lsli,                           // llvm.hexagon.S4.lsli
    hexagon_S4_ntstbit_i,                      // llvm.hexagon.S4.ntstbit.i
    hexagon_S4_ntstbit_r,                      // llvm.hexagon.S4.ntstbit.r
    hexagon_S4_or_andi,                        // llvm.hexagon.S4.or.andi
    hexagon_S4_or_andix,                       // llvm.hexagon.S4.or.andix
    hexagon_S4_or_ori,                         // llvm.hexagon.S4.or.ori
    hexagon_S4_ori_asl_ri,                     // llvm.hexagon.S4.ori.asl.ri
    hexagon_S4_ori_lsr_ri,                     // llvm.hexagon.S4.ori.lsr.ri
    hexagon_S4_parity,                         // llvm.hexagon.S4.parity
    hexagon_S4_subaddi,                        // llvm.hexagon.S4.subaddi
    hexagon_S4_subi_asl_ri,                    // llvm.hexagon.S4.subi.asl.ri
    hexagon_S4_subi_lsr_ri,                    // llvm.hexagon.S4.subi.lsr.ri
    hexagon_S4_vrcrotate,                      // llvm.hexagon.S4.vrcrotate
    hexagon_S4_vrcrotate_acc,                  // llvm.hexagon.S4.vrcrotate.acc
    hexagon_S4_vxaddsubh,                      // llvm.hexagon.S4.vxaddsubh
    hexagon_S4_vxaddsubhr,                     // llvm.hexagon.S4.vxaddsubhr
    hexagon_S4_vxaddsubw,                      // llvm.hexagon.S4.vxaddsubw
    hexagon_S4_vxsubaddh,                      // llvm.hexagon.S4.vxsubaddh
    hexagon_S4_vxsubaddhr,                     // llvm.hexagon.S4.vxsubaddhr
    hexagon_S4_vxsubaddw,                      // llvm.hexagon.S4.vxsubaddw
    hexagon_S5_asrhub_rnd_sat_goodsyntax,      // llvm.hexagon.S5.asrhub.rnd.sat.goodsyntax
    hexagon_S5_asrhub_sat,                     // llvm.hexagon.S5.asrhub.sat
    hexagon_S5_popcountp,                      // llvm.hexagon.S5.popcountp
    hexagon_S5_vasrhrnd_goodsyntax,            // llvm.hexagon.S5.vasrhrnd.goodsyntax
    hexagon_SI_to_SXTHI_asrh,                  // llvm.hexagon.SI.to.SXTHI.asrh
    hexagon_circ_ldd,                          // llvm.hexagon.circ.ldd
    init_trampoline,                           // llvm.init.trampoline
    invariant_end,                             // llvm.invariant.end
    invariant_start,                           // llvm.invariant.start
    lifetime_end,                              // llvm.lifetime.end
    lifetime_start,                            // llvm.lifetime.start
    log,                                       // llvm.log
    log10,                                     // llvm.log10
    log2,                                      // llvm.log2
    longjmp,                                   // llvm.longjmp
    memcpy,                                    // llvm.memcpy
    memmove,                                   // llvm.memmove
    memset,                                    // llvm.memset
    mips_absq_s_ph,                            // llvm.mips.absq.s.ph
    mips_absq_s_qb,                            // llvm.mips.absq.s.qb
    mips_absq_s_w,                             // llvm.mips.absq.s.w
    mips_add_a_b,                              // llvm.mips.add.a.b
    mips_add_a_d,                              // llvm.mips.add.a.d
    mips_add_a_h,                              // llvm.mips.add.a.h
    mips_add_a_w,                              // llvm.mips.add.a.w
    mips_addq_ph,                              // llvm.mips.addq.ph
    mips_addq_s_ph,                            // llvm.mips.addq.s.ph
    mips_addq_s_w,                             // llvm.mips.addq.s.w
    mips_addqh_ph,                             // llvm.mips.addqh.ph
    mips_addqh_r_ph,                           // llvm.mips.addqh.r.ph
    mips_addqh_r_w,                            // llvm.mips.addqh.r.w
    mips_addqh_w,                              // llvm.mips.addqh.w
    mips_adds_a_b,                             // llvm.mips.adds.a.b
    mips_adds_a_d,                             // llvm.mips.adds.a.d
    mips_adds_a_h,                             // llvm.mips.adds.a.h
    mips_adds_a_w,                             // llvm.mips.adds.a.w
    mips_adds_s_b,                             // llvm.mips.adds.s.b
    mips_adds_s_d,                             // llvm.mips.adds.s.d
    mips_adds_s_h,                             // llvm.mips.adds.s.h
    mips_adds_s_w,                             // llvm.mips.adds.s.w
    mips_adds_u_b,                             // llvm.mips.adds.u.b
    mips_adds_u_d,                             // llvm.mips.adds.u.d
    mips_adds_u_h,                             // llvm.mips.adds.u.h
    mips_adds_u_w,                             // llvm.mips.adds.u.w
    mips_addsc,                                // llvm.mips.addsc
    mips_addu_ph,                              // llvm.mips.addu.ph
    mips_addu_qb,                              // llvm.mips.addu.qb
    mips_addu_s_ph,                            // llvm.mips.addu.s.ph
    mips_addu_s_qb,                            // llvm.mips.addu.s.qb
    mips_adduh_qb,                             // llvm.mips.adduh.qb
    mips_adduh_r_qb,                           // llvm.mips.adduh.r.qb
    mips_addv_b,                               // llvm.mips.addv.b
    mips_addv_d,                               // llvm.mips.addv.d
    mips_addv_h,                               // llvm.mips.addv.h
    mips_addv_w,                               // llvm.mips.addv.w
    mips_addvi_b,                              // llvm.mips.addvi.b
    mips_addvi_d,                              // llvm.mips.addvi.d
    mips_addvi_h,                              // llvm.mips.addvi.h
    mips_addvi_w,                              // llvm.mips.addvi.w
    mips_addwc,                                // llvm.mips.addwc
    mips_and_v,                                // llvm.mips.and.v
    mips_andi_b,                               // llvm.mips.andi.b
    mips_append,                               // llvm.mips.append
    mips_asub_s_b,                             // llvm.mips.asub.s.b
    mips_asub_s_d,                             // llvm.mips.asub.s.d
    mips_asub_s_h,                             // llvm.mips.asub.s.h
    mips_asub_s_w,                             // llvm.mips.asub.s.w
    mips_asub_u_b,                             // llvm.mips.asub.u.b
    mips_asub_u_d,                             // llvm.mips.asub.u.d
    mips_asub_u_h,                             // llvm.mips.asub.u.h
    mips_asub_u_w,                             // llvm.mips.asub.u.w
    mips_ave_s_b,                              // llvm.mips.ave.s.b
    mips_ave_s_d,                              // llvm.mips.ave.s.d
    mips_ave_s_h,                              // llvm.mips.ave.s.h
    mips_ave_s_w,                              // llvm.mips.ave.s.w
    mips_ave_u_b,                              // llvm.mips.ave.u.b
    mips_ave_u_d,                              // llvm.mips.ave.u.d
    mips_ave_u_h,                              // llvm.mips.ave.u.h
    mips_ave_u_w,                              // llvm.mips.ave.u.w
    mips_aver_s_b,                             // llvm.mips.aver.s.b
    mips_aver_s_d,                             // llvm.mips.aver.s.d
    mips_aver_s_h,                             // llvm.mips.aver.s.h
    mips_aver_s_w,                             // llvm.mips.aver.s.w
    mips_aver_u_b,                             // llvm.mips.aver.u.b
    mips_aver_u_d,                             // llvm.mips.aver.u.d
    mips_aver_u_h,                             // llvm.mips.aver.u.h
    mips_aver_u_w,                             // llvm.mips.aver.u.w
    mips_balign,                               // llvm.mips.balign
    mips_bclr_b,                               // llvm.mips.bclr.b
    mips_bclr_d,                               // llvm.mips.bclr.d
    mips_bclr_h,                               // llvm.mips.bclr.h
    mips_bclr_w,                               // llvm.mips.bclr.w
    mips_bclri_b,                              // llvm.mips.bclri.b
    mips_bclri_d,                              // llvm.mips.bclri.d
    mips_bclri_h,                              // llvm.mips.bclri.h
    mips_bclri_w,                              // llvm.mips.bclri.w
    mips_binsl_b,                              // llvm.mips.binsl.b
    mips_binsl_d,                              // llvm.mips.binsl.d
    mips_binsl_h,                              // llvm.mips.binsl.h
    mips_binsl_w,                              // llvm.mips.binsl.w
    mips_binsli_b,                             // llvm.mips.binsli.b
    mips_binsli_d,                             // llvm.mips.binsli.d
    mips_binsli_h,                             // llvm.mips.binsli.h
    mips_binsli_w,                             // llvm.mips.binsli.w
    mips_binsr_b,                              // llvm.mips.binsr.b
    mips_binsr_d,                              // llvm.mips.binsr.d
    mips_binsr_h,                              // llvm.mips.binsr.h
    mips_binsr_w,                              // llvm.mips.binsr.w
    mips_binsri_b,                             // llvm.mips.binsri.b
    mips_binsri_d,                             // llvm.mips.binsri.d
    mips_binsri_h,                             // llvm.mips.binsri.h
    mips_binsri_w,                             // llvm.mips.binsri.w
    mips_bitrev,                               // llvm.mips.bitrev
    mips_bmnz_v,                               // llvm.mips.bmnz.v
    mips_bmnzi_b,                              // llvm.mips.bmnzi.b
    mips_bmz_v,                                // llvm.mips.bmz.v
    mips_bmzi_b,                               // llvm.mips.bmzi.b
    mips_bneg_b,                               // llvm.mips.bneg.b
    mips_bneg_d,                               // llvm.mips.bneg.d
    mips_bneg_h,                               // llvm.mips.bneg.h
    mips_bneg_w,                               // llvm.mips.bneg.w
    mips_bnegi_b,                              // llvm.mips.bnegi.b
    mips_bnegi_d,                              // llvm.mips.bnegi.d
    mips_bnegi_h,                              // llvm.mips.bnegi.h
    mips_bnegi_w,                              // llvm.mips.bnegi.w
    mips_bnz_b,                                // llvm.mips.bnz.b
    mips_bnz_d,                                // llvm.mips.bnz.d
    mips_bnz_h,                                // llvm.mips.bnz.h
    mips_bnz_v,                                // llvm.mips.bnz.v
    mips_bnz_w,                                // llvm.mips.bnz.w
    mips_bposge32,                             // llvm.mips.bposge32
    mips_bsel_v,                               // llvm.mips.bsel.v
    mips_bseli_b,                              // llvm.mips.bseli.b
    mips_bset_b,                               // llvm.mips.bset.b
    mips_bset_d,                               // llvm.mips.bset.d
    mips_bset_h,                               // llvm.mips.bset.h
    mips_bset_w,                               // llvm.mips.bset.w
    mips_bseti_b,                              // llvm.mips.bseti.b
    mips_bseti_d,                              // llvm.mips.bseti.d
    mips_bseti_h,                              // llvm.mips.bseti.h
    mips_bseti_w,                              // llvm.mips.bseti.w
    mips_bz_b,                                 // llvm.mips.bz.b
    mips_bz_d,                                 // llvm.mips.bz.d
    mips_bz_h,                                 // llvm.mips.bz.h
    mips_bz_v,                                 // llvm.mips.bz.v
    mips_bz_w,                                 // llvm.mips.bz.w
    mips_ceq_b,                                // llvm.mips.ceq.b
    mips_ceq_d,                                // llvm.mips.ceq.d
    mips_ceq_h,                                // llvm.mips.ceq.h
    mips_ceq_w,                                // llvm.mips.ceq.w
    mips_ceqi_b,                               // llvm.mips.ceqi.b
    mips_ceqi_d,                               // llvm.mips.ceqi.d
    mips_ceqi_h,                               // llvm.mips.ceqi.h
    mips_ceqi_w,                               // llvm.mips.ceqi.w
    mips_cfcmsa,                               // llvm.mips.cfcmsa
    mips_cle_s_b,                              // llvm.mips.cle.s.b
    mips_cle_s_d,                              // llvm.mips.cle.s.d
    mips_cle_s_h,                              // llvm.mips.cle.s.h
    mips_cle_s_w,                              // llvm.mips.cle.s.w
    mips_cle_u_b,                              // llvm.mips.cle.u.b
    mips_cle_u_d,                              // llvm.mips.cle.u.d
    mips_cle_u_h,                              // llvm.mips.cle.u.h
    mips_cle_u_w,                              // llvm.mips.cle.u.w
    mips_clei_s_b,                             // llvm.mips.clei.s.b
    mips_clei_s_d,                             // llvm.mips.clei.s.d
    mips_clei_s_h,                             // llvm.mips.clei.s.h
    mips_clei_s_w,                             // llvm.mips.clei.s.w
    mips_clei_u_b,                             // llvm.mips.clei.u.b
    mips_clei_u_d,                             // llvm.mips.clei.u.d
    mips_clei_u_h,                             // llvm.mips.clei.u.h
    mips_clei_u_w,                             // llvm.mips.clei.u.w
    mips_clt_s_b,                              // llvm.mips.clt.s.b
    mips_clt_s_d,                              // llvm.mips.clt.s.d
    mips_clt_s_h,                              // llvm.mips.clt.s.h
    mips_clt_s_w,                              // llvm.mips.clt.s.w
    mips_clt_u_b,                              // llvm.mips.clt.u.b
    mips_clt_u_d,                              // llvm.mips.clt.u.d
    mips_clt_u_h,                              // llvm.mips.clt.u.h
    mips_clt_u_w,                              // llvm.mips.clt.u.w
    mips_clti_s_b,                             // llvm.mips.clti.s.b
    mips_clti_s_d,                             // llvm.mips.clti.s.d
    mips_clti_s_h,                             // llvm.mips.clti.s.h
    mips_clti_s_w,                             // llvm.mips.clti.s.w
    mips_clti_u_b,                             // llvm.mips.clti.u.b
    mips_clti_u_d,                             // llvm.mips.clti.u.d
    mips_clti_u_h,                             // llvm.mips.clti.u.h
    mips_clti_u_w,                             // llvm.mips.clti.u.w
    mips_cmp_eq_ph,                            // llvm.mips.cmp.eq.ph
    mips_cmp_le_ph,                            // llvm.mips.cmp.le.ph
    mips_cmp_lt_ph,                            // llvm.mips.cmp.lt.ph
    mips_cmpgdu_eq_qb,                         // llvm.mips.cmpgdu.eq.qb
    mips_cmpgdu_le_qb,                         // llvm.mips.cmpgdu.le.qb
    mips_cmpgdu_lt_qb,                         // llvm.mips.cmpgdu.lt.qb
    mips_cmpgu_eq_qb,                          // llvm.mips.cmpgu.eq.qb
    mips_cmpgu_le_qb,                          // llvm.mips.cmpgu.le.qb
    mips_cmpgu_lt_qb,                          // llvm.mips.cmpgu.lt.qb
    mips_cmpu_eq_qb,                           // llvm.mips.cmpu.eq.qb
    mips_cmpu_le_qb,                           // llvm.mips.cmpu.le.qb
    mips_cmpu_lt_qb,                           // llvm.mips.cmpu.lt.qb
    mips_copy_s_b,                             // llvm.mips.copy.s.b
    mips_copy_s_d,                             // llvm.mips.copy.s.d
    mips_copy_s_h,                             // llvm.mips.copy.s.h
    mips_copy_s_w,                             // llvm.mips.copy.s.w
    mips_copy_u_b,                             // llvm.mips.copy.u.b
    mips_copy_u_d,                             // llvm.mips.copy.u.d
    mips_copy_u_h,                             // llvm.mips.copy.u.h
    mips_copy_u_w,                             // llvm.mips.copy.u.w
    mips_ctcmsa,                               // llvm.mips.ctcmsa
    mips_div_s_b,                              // llvm.mips.div.s.b
    mips_div_s_d,                              // llvm.mips.div.s.d
    mips_div_s_h,                              // llvm.mips.div.s.h
    mips_div_s_w,                              // llvm.mips.div.s.w
    mips_div_u_b,                              // llvm.mips.div.u.b
    mips_div_u_d,                              // llvm.mips.div.u.d
    mips_div_u_h,                              // llvm.mips.div.u.h
    mips_div_u_w,                              // llvm.mips.div.u.w
    mips_dlsa,                                 // llvm.mips.dlsa
    mips_dotp_s_d,                             // llvm.mips.dotp.s.d
    mips_dotp_s_h,                             // llvm.mips.dotp.s.h
    mips_dotp_s_w,                             // llvm.mips.dotp.s.w
    mips_dotp_u_d,                             // llvm.mips.dotp.u.d
    mips_dotp_u_h,                             // llvm.mips.dotp.u.h
    mips_dotp_u_w,                             // llvm.mips.dotp.u.w
    mips_dpa_w_ph,                             // llvm.mips.dpa.w.ph
    mips_dpadd_s_d,                            // llvm.mips.dpadd.s.d
    mips_dpadd_s_h,                            // llvm.mips.dpadd.s.h
    mips_dpadd_s_w,                            // llvm.mips.dpadd.s.w
    mips_dpadd_u_d,                            // llvm.mips.dpadd.u.d
    mips_dpadd_u_h,                            // llvm.mips.dpadd.u.h
    mips_dpadd_u_w,                            // llvm.mips.dpadd.u.w
    mips_dpaq_s_w_ph,                          // llvm.mips.dpaq.s.w.ph
    mips_dpaq_sa_l_w,                          // llvm.mips.dpaq.sa.l.w
    mips_dpaqx_s_w_ph,                         // llvm.mips.dpaqx.s.w.ph
    mips_dpaqx_sa_w_ph,                        // llvm.mips.dpaqx.sa.w.ph
    mips_dpau_h_qbl,                           // llvm.mips.dpau.h.qbl
    mips_dpau_h_qbr,                           // llvm.mips.dpau.h.qbr
    mips_dpax_w_ph,                            // llvm.mips.dpax.w.ph
    mips_dps_w_ph,                             // llvm.mips.dps.w.ph
    mips_dpsq_s_w_ph,                          // llvm.mips.dpsq.s.w.ph
    mips_dpsq_sa_l_w,                          // llvm.mips.dpsq.sa.l.w
    mips_dpsqx_s_w_ph,                         // llvm.mips.dpsqx.s.w.ph
    mips_dpsqx_sa_w_ph,                        // llvm.mips.dpsqx.sa.w.ph
    mips_dpsu_h_qbl,                           // llvm.mips.dpsu.h.qbl
    mips_dpsu_h_qbr,                           // llvm.mips.dpsu.h.qbr
    mips_dpsub_s_d,                            // llvm.mips.dpsub.s.d
    mips_dpsub_s_h,                            // llvm.mips.dpsub.s.h
    mips_dpsub_s_w,                            // llvm.mips.dpsub.s.w
    mips_dpsub_u_d,                            // llvm.mips.dpsub.u.d
    mips_dpsub_u_h,                            // llvm.mips.dpsub.u.h
    mips_dpsub_u_w,                            // llvm.mips.dpsub.u.w
    mips_dpsx_w_ph,                            // llvm.mips.dpsx.w.ph
    mips_extp,                                 // llvm.mips.extp
    mips_extpdp,                               // llvm.mips.extpdp
    mips_extr_r_w,                             // llvm.mips.extr.r.w
    mips_extr_rs_w,                            // llvm.mips.extr.rs.w
    mips_extr_s_h,                             // llvm.mips.extr.s.h
    mips_extr_w,                               // llvm.mips.extr.w
    mips_fadd_d,                               // llvm.mips.fadd.d
    mips_fadd_w,                               // llvm.mips.fadd.w
    mips_fcaf_d,                               // llvm.mips.fcaf.d
    mips_fcaf_w,                               // llvm.mips.fcaf.w
    mips_fceq_d,                               // llvm.mips.fceq.d
    mips_fceq_w,                               // llvm.mips.fceq.w
    mips_fclass_d,                             // llvm.mips.fclass.d
    mips_fclass_w,                             // llvm.mips.fclass.w
    mips_fcle_d,                               // llvm.mips.fcle.d
    mips_fcle_w,                               // llvm.mips.fcle.w
    mips_fclt_d,                               // llvm.mips.fclt.d
    mips_fclt_w,                               // llvm.mips.fclt.w
    mips_fcne_d,                               // llvm.mips.fcne.d
    mips_fcne_w,                               // llvm.mips.fcne.w
    mips_fcor_d,                               // llvm.mips.fcor.d
    mips_fcor_w,                               // llvm.mips.fcor.w
    mips_fcueq_d,                              // llvm.mips.fcueq.d
    mips_fcueq_w,                              // llvm.mips.fcueq.w
    mips_fcule_d,                              // llvm.mips.fcule.d
    mips_fcule_w,                              // llvm.mips.fcule.w
    mips_fcult_d,                              // llvm.mips.fcult.d
    mips_fcult_w,                              // llvm.mips.fcult.w
    mips_fcun_d,                               // llvm.mips.fcun.d
    mips_fcun_w,                               // llvm.mips.fcun.w
    mips_fcune_d,                              // llvm.mips.fcune.d
    mips_fcune_w,                              // llvm.mips.fcune.w
    mips_fdiv_d,                               // llvm.mips.fdiv.d
    mips_fdiv_w,                               // llvm.mips.fdiv.w
    mips_fexdo_h,                              // llvm.mips.fexdo.h
    mips_fexdo_w,                              // llvm.mips.fexdo.w
    mips_fexp2_d,                              // llvm.mips.fexp2.d
    mips_fexp2_w,                              // llvm.mips.fexp2.w
    mips_fexupl_d,                             // llvm.mips.fexupl.d
    mips_fexupl_w,                             // llvm.mips.fexupl.w
    mips_fexupr_d,                             // llvm.mips.fexupr.d
    mips_fexupr_w,                             // llvm.mips.fexupr.w
    mips_ffint_s_d,                            // llvm.mips.ffint.s.d
    mips_ffint_s_w,                            // llvm.mips.ffint.s.w
    mips_ffint_u_d,                            // llvm.mips.ffint.u.d
    mips_ffint_u_w,                            // llvm.mips.ffint.u.w
    mips_ffql_d,                               // llvm.mips.ffql.d
    mips_ffql_w,                               // llvm.mips.ffql.w
    mips_ffqr_d,                               // llvm.mips.ffqr.d
    mips_ffqr_w,                               // llvm.mips.ffqr.w
    mips_fill_b,                               // llvm.mips.fill.b
    mips_fill_d,                               // llvm.mips.fill.d
    mips_fill_h,                               // llvm.mips.fill.h
    mips_fill_w,                               // llvm.mips.fill.w
    mips_flog2_d,                              // llvm.mips.flog2.d
    mips_flog2_w,                              // llvm.mips.flog2.w
    mips_fmadd_d,                              // llvm.mips.fmadd.d
    mips_fmadd_w,                              // llvm.mips.fmadd.w
    mips_fmax_a_d,                             // llvm.mips.fmax.a.d
    mips_fmax_a_w,                             // llvm.mips.fmax.a.w
    mips_fmax_d,                               // llvm.mips.fmax.d
    mips_fmax_w,                               // llvm.mips.fmax.w
    mips_fmin_a_d,                             // llvm.mips.fmin.a.d
    mips_fmin_a_w,                             // llvm.mips.fmin.a.w
    mips_fmin_d,                               // llvm.mips.fmin.d
    mips_fmin_w,                               // llvm.mips.fmin.w
    mips_fmsub_d,                              // llvm.mips.fmsub.d
    mips_fmsub_w,                              // llvm.mips.fmsub.w
    mips_fmul_d,                               // llvm.mips.fmul.d
    mips_fmul_w,                               // llvm.mips.fmul.w
    mips_frcp_d,                               // llvm.mips.frcp.d
    mips_frcp_w,                               // llvm.mips.frcp.w
    mips_frint_d,                              // llvm.mips.frint.d
    mips_frint_w,                              // llvm.mips.frint.w
    mips_frsqrt_d,                             // llvm.mips.frsqrt.d
    mips_frsqrt_w,                             // llvm.mips.frsqrt.w
    mips_fsaf_d,                               // llvm.mips.fsaf.d
    mips_fsaf_w,                               // llvm.mips.fsaf.w
    mips_fseq_d,                               // llvm.mips.fseq.d
    mips_fseq_w,                               // llvm.mips.fseq.w
    mips_fsle_d,                               // llvm.mips.fsle.d
    mips_fsle_w,                               // llvm.mips.fsle.w
    mips_fslt_d,                               // llvm.mips.fslt.d
    mips_fslt_w,                               // llvm.mips.fslt.w
    mips_fsne_d,                               // llvm.mips.fsne.d
    mips_fsne_w,                               // llvm.mips.fsne.w
    mips_fsor_d,                               // llvm.mips.fsor.d
    mips_fsor_w,                               // llvm.mips.fsor.w
    mips_fsqrt_d,                              // llvm.mips.fsqrt.d
    mips_fsqrt_w,                              // llvm.mips.fsqrt.w
    mips_fsub_d,                               // llvm.mips.fsub.d
    mips_fsub_w,                               // llvm.mips.fsub.w
    mips_fsueq_d,                              // llvm.mips.fsueq.d
    mips_fsueq_w,                              // llvm.mips.fsueq.w
    mips_fsule_d,                              // llvm.mips.fsule.d
    mips_fsule_w,                              // llvm.mips.fsule.w
    mips_fsult_d,                              // llvm.mips.fsult.d
    mips_fsult_w,                              // llvm.mips.fsult.w
    mips_fsun_d,                               // llvm.mips.fsun.d
    mips_fsun_w,                               // llvm.mips.fsun.w
    mips_fsune_d,                              // llvm.mips.fsune.d
    mips_fsune_w,                              // llvm.mips.fsune.w
    mips_ftint_s_d,                            // llvm.mips.ftint.s.d
    mips_ftint_s_w,                            // llvm.mips.ftint.s.w
    mips_ftint_u_d,                            // llvm.mips.ftint.u.d
    mips_ftint_u_w,                            // llvm.mips.ftint.u.w
    mips_ftq_h,                                // llvm.mips.ftq.h
    mips_ftq_w,                                // llvm.mips.ftq.w
    mips_ftrunc_s_d,                           // llvm.mips.ftrunc.s.d
    mips_ftrunc_s_w,                           // llvm.mips.ftrunc.s.w
    mips_ftrunc_u_d,                           // llvm.mips.ftrunc.u.d
    mips_ftrunc_u_w,                           // llvm.mips.ftrunc.u.w
    mips_hadd_s_d,                             // llvm.mips.hadd.s.d
    mips_hadd_s_h,                             // llvm.mips.hadd.s.h
    mips_hadd_s_w,                             // llvm.mips.hadd.s.w
    mips_hadd_u_d,                             // llvm.mips.hadd.u.d
    mips_hadd_u_h,                             // llvm.mips.hadd.u.h
    mips_hadd_u_w,                             // llvm.mips.hadd.u.w
    mips_hsub_s_d,                             // llvm.mips.hsub.s.d
    mips_hsub_s_h,                             // llvm.mips.hsub.s.h
    mips_hsub_s_w,                             // llvm.mips.hsub.s.w
    mips_hsub_u_d,                             // llvm.mips.hsub.u.d
    mips_hsub_u_h,                             // llvm.mips.hsub.u.h
    mips_hsub_u_w,                             // llvm.mips.hsub.u.w
    mips_ilvev_b,                              // llvm.mips.ilvev.b
    mips_ilvev_d,                              // llvm.mips.ilvev.d
    mips_ilvev_h,                              // llvm.mips.ilvev.h
    mips_ilvev_w,                              // llvm.mips.ilvev.w
    mips_ilvl_b,                               // llvm.mips.ilvl.b
    mips_ilvl_d,                               // llvm.mips.ilvl.d
    mips_ilvl_h,                               // llvm.mips.ilvl.h
    mips_ilvl_w,                               // llvm.mips.ilvl.w
    mips_ilvod_b,                              // llvm.mips.ilvod.b
    mips_ilvod_d,                              // llvm.mips.ilvod.d
    mips_ilvod_h,                              // llvm.mips.ilvod.h
    mips_ilvod_w,                              // llvm.mips.ilvod.w
    mips_ilvr_b,                               // llvm.mips.ilvr.b
    mips_ilvr_d,                               // llvm.mips.ilvr.d
    mips_ilvr_h,                               // llvm.mips.ilvr.h
    mips_ilvr_w,                               // llvm.mips.ilvr.w
    mips_insert_b,                             // llvm.mips.insert.b
    mips_insert_d,                             // llvm.mips.insert.d
    mips_insert_h,                             // llvm.mips.insert.h
    mips_insert_w,                             // llvm.mips.insert.w
    mips_insv,                                 // llvm.mips.insv
    mips_insve_b,                              // llvm.mips.insve.b
    mips_insve_d,                              // llvm.mips.insve.d
    mips_insve_h,                              // llvm.mips.insve.h
    mips_insve_w,                              // llvm.mips.insve.w
    mips_lbux,                                 // llvm.mips.lbux
    mips_ld_b,                                 // llvm.mips.ld.b
    mips_ld_d,                                 // llvm.mips.ld.d
    mips_ld_h,                                 // llvm.mips.ld.h
    mips_ld_w,                                 // llvm.mips.ld.w
    mips_ldi_b,                                // llvm.mips.ldi.b
    mips_ldi_d,                                // llvm.mips.ldi.d
    mips_ldi_h,                                // llvm.mips.ldi.h
    mips_ldi_w,                                // llvm.mips.ldi.w
    mips_lhx,                                  // llvm.mips.lhx
    mips_lsa,                                  // llvm.mips.lsa
    mips_lwx,                                  // llvm.mips.lwx
    mips_madd,                                 // llvm.mips.madd
    mips_madd_q_h,                             // llvm.mips.madd.q.h
    mips_madd_q_w,                             // llvm.mips.madd.q.w
    mips_maddr_q_h,                            // llvm.mips.maddr.q.h
    mips_maddr_q_w,                            // llvm.mips.maddr.q.w
    mips_maddu,                                // llvm.mips.maddu
    mips_maddv_b,                              // llvm.mips.maddv.b
    mips_maddv_d,                              // llvm.mips.maddv.d
    mips_maddv_h,                              // llvm.mips.maddv.h
    mips_maddv_w,                              // llvm.mips.maddv.w
    mips_maq_s_w_phl,                          // llvm.mips.maq.s.w.phl
    mips_maq_s_w_phr,                          // llvm.mips.maq.s.w.phr
    mips_maq_sa_w_phl,                         // llvm.mips.maq.sa.w.phl
    mips_maq_sa_w_phr,                         // llvm.mips.maq.sa.w.phr
    mips_max_a_b,                              // llvm.mips.max.a.b
    mips_max_a_d,                              // llvm.mips.max.a.d
    mips_max_a_h,                              // llvm.mips.max.a.h
    mips_max_a_w,                              // llvm.mips.max.a.w
    mips_max_s_b,                              // llvm.mips.max.s.b
    mips_max_s_d,                              // llvm.mips.max.s.d
    mips_max_s_h,                              // llvm.mips.max.s.h
    mips_max_s_w,                              // llvm.mips.max.s.w
    mips_max_u_b,                              // llvm.mips.max.u.b
    mips_max_u_d,                              // llvm.mips.max.u.d
    mips_max_u_h,                              // llvm.mips.max.u.h
    mips_max_u_w,                              // llvm.mips.max.u.w
    mips_maxi_s_b,                             // llvm.mips.maxi.s.b
    mips_maxi_s_d,                             // llvm.mips.maxi.s.d
    mips_maxi_s_h,                             // llvm.mips.maxi.s.h
    mips_maxi_s_w,                             // llvm.mips.maxi.s.w
    mips_maxi_u_b,                             // llvm.mips.maxi.u.b
    mips_maxi_u_d,                             // llvm.mips.maxi.u.d
    mips_maxi_u_h,                             // llvm.mips.maxi.u.h
    mips_maxi_u_w,                             // llvm.mips.maxi.u.w
    mips_min_a_b,                              // llvm.mips.min.a.b
    mips_min_a_d,                              // llvm.mips.min.a.d
    mips_min_a_h,                              // llvm.mips.min.a.h
    mips_min_a_w,                              // llvm.mips.min.a.w
    mips_min_s_b,                              // llvm.mips.min.s.b
    mips_min_s_d,                              // llvm.mips.min.s.d
    mips_min_s_h,                              // llvm.mips.min.s.h
    mips_min_s_w,                              // llvm.mips.min.s.w
    mips_min_u_b,                              // llvm.mips.min.u.b
    mips_min_u_d,                              // llvm.mips.min.u.d
    mips_min_u_h,                              // llvm.mips.min.u.h
    mips_min_u_w,                              // llvm.mips.min.u.w
    mips_mini_s_b,                             // llvm.mips.mini.s.b
    mips_mini_s_d,                             // llvm.mips.mini.s.d
    mips_mini_s_h,                             // llvm.mips.mini.s.h
    mips_mini_s_w,                             // llvm.mips.mini.s.w
    mips_mini_u_b,                             // llvm.mips.mini.u.b
    mips_mini_u_d,                             // llvm.mips.mini.u.d
    mips_mini_u_h,                             // llvm.mips.mini.u.h
    mips_mini_u_w,                             // llvm.mips.mini.u.w
    mips_mod_s_b,                              // llvm.mips.mod.s.b
    mips_mod_s_d,                              // llvm.mips.mod.s.d
    mips_mod_s_h,                              // llvm.mips.mod.s.h
    mips_mod_s_w,                              // llvm.mips.mod.s.w
    mips_mod_u_b,                              // llvm.mips.mod.u.b
    mips_mod_u_d,                              // llvm.mips.mod.u.d
    mips_mod_u_h,                              // llvm.mips.mod.u.h
    mips_mod_u_w,                              // llvm.mips.mod.u.w
    mips_modsub,                               // llvm.mips.modsub
    mips_move_v,                               // llvm.mips.move.v
    mips_msub,                                 // llvm.mips.msub
    mips_msub_q_h,                             // llvm.mips.msub.q.h
    mips_msub_q_w,                             // llvm.mips.msub.q.w
    mips_msubr_q_h,                            // llvm.mips.msubr.q.h
    mips_msubr_q_w,                            // llvm.mips.msubr.q.w
    mips_msubu,                                // llvm.mips.msubu
    mips_msubv_b,                              // llvm.mips.msubv.b
    mips_msubv_d,                              // llvm.mips.msubv.d
    mips_msubv_h,                              // llvm.mips.msubv.h
    mips_msubv_w,                              // llvm.mips.msubv.w
    mips_mthlip,                               // llvm.mips.mthlip
    mips_mul_ph,                               // llvm.mips.mul.ph
    mips_mul_q_h,                              // llvm.mips.mul.q.h
    mips_mul_q_w,                              // llvm.mips.mul.q.w
    mips_mul_s_ph,                             // llvm.mips.mul.s.ph
    mips_muleq_s_w_phl,                        // llvm.mips.muleq.s.w.phl
    mips_muleq_s_w_phr,                        // llvm.mips.muleq.s.w.phr
    mips_muleu_s_ph_qbl,                       // llvm.mips.muleu.s.ph.qbl
    mips_muleu_s_ph_qbr,                       // llvm.mips.muleu.s.ph.qbr
    mips_mulq_rs_ph,                           // llvm.mips.mulq.rs.ph
    mips_mulq_rs_w,                            // llvm.mips.mulq.rs.w
    mips_mulq_s_ph,                            // llvm.mips.mulq.s.ph
    mips_mulq_s_w,                             // llvm.mips.mulq.s.w
    mips_mulr_q_h,                             // llvm.mips.mulr.q.h
    mips_mulr_q_w,                             // llvm.mips.mulr.q.w
    mips_mulsa_w_ph,                           // llvm.mips.mulsa.w.ph
    mips_mulsaq_s_w_ph,                        // llvm.mips.mulsaq.s.w.ph
    mips_mult,                                 // llvm.mips.mult
    mips_multu,                                // llvm.mips.multu
    mips_mulv_b,                               // llvm.mips.mulv.b
    mips_mulv_d,                               // llvm.mips.mulv.d
    mips_mulv_h,                               // llvm.mips.mulv.h
    mips_mulv_w,                               // llvm.mips.mulv.w
    mips_nloc_b,                               // llvm.mips.nloc.b
    mips_nloc_d,                               // llvm.mips.nloc.d
    mips_nloc_h,                               // llvm.mips.nloc.h
    mips_nloc_w,                               // llvm.mips.nloc.w
    mips_nlzc_b,                               // llvm.mips.nlzc.b
    mips_nlzc_d,                               // llvm.mips.nlzc.d
    mips_nlzc_h,                               // llvm.mips.nlzc.h
    mips_nlzc_w,                               // llvm.mips.nlzc.w
    mips_nor_v,                                // llvm.mips.nor.v
    mips_nori_b,                               // llvm.mips.nori.b
    mips_or_v,                                 // llvm.mips.or.v
    mips_ori_b,                                // llvm.mips.ori.b
    mips_packrl_ph,                            // llvm.mips.packrl.ph
    mips_pckev_b,                              // llvm.mips.pckev.b
    mips_pckev_d,                              // llvm.mips.pckev.d
    mips_pckev_h,                              // llvm.mips.pckev.h
    mips_pckev_w,                              // llvm.mips.pckev.w
    mips_pckod_b,                              // llvm.mips.pckod.b
    mips_pckod_d,                              // llvm.mips.pckod.d
    mips_pckod_h,                              // llvm.mips.pckod.h
    mips_pckod_w,                              // llvm.mips.pckod.w
    mips_pcnt_b,                               // llvm.mips.pcnt.b
    mips_pcnt_d,                               // llvm.mips.pcnt.d
    mips_pcnt_h,                               // llvm.mips.pcnt.h
    mips_pcnt_w,                               // llvm.mips.pcnt.w
    mips_pick_ph,                              // llvm.mips.pick.ph
    mips_pick_qb,                              // llvm.mips.pick.qb
    mips_preceq_w_phl,                         // llvm.mips.preceq.w.phl
    mips_preceq_w_phr,                         // llvm.mips.preceq.w.phr
    mips_precequ_ph_qbl,                       // llvm.mips.precequ.ph.qbl
    mips_precequ_ph_qbla,                      // llvm.mips.precequ.ph.qbla
    mips_precequ_ph_qbr,                       // llvm.mips.precequ.ph.qbr
    mips_precequ_ph_qbra,                      // llvm.mips.precequ.ph.qbra
    mips_preceu_ph_qbl,                        // llvm.mips.preceu.ph.qbl
    mips_preceu_ph_qbla,                       // llvm.mips.preceu.ph.qbla
    mips_preceu_ph_qbr,                        // llvm.mips.preceu.ph.qbr
    mips_preceu_ph_qbra,                       // llvm.mips.preceu.ph.qbra
    mips_precr_qb_ph,                          // llvm.mips.precr.qb.ph
    mips_precr_sra_ph_w,                       // llvm.mips.precr.sra.ph.w
    mips_precr_sra_r_ph_w,                     // llvm.mips.precr.sra.r.ph.w
    mips_precrq_ph_w,                          // llvm.mips.precrq.ph.w
    mips_precrq_qb_ph,                         // llvm.mips.precrq.qb.ph
    mips_precrq_rs_ph_w,                       // llvm.mips.precrq.rs.ph.w
    mips_precrqu_s_qb_ph,                      // llvm.mips.precrqu.s.qb.ph
    mips_prepend,                              // llvm.mips.prepend
    mips_raddu_w_qb,                           // llvm.mips.raddu.w.qb
    mips_rddsp,                                // llvm.mips.rddsp
    mips_repl_ph,                              // llvm.mips.repl.ph
    mips_repl_qb,                              // llvm.mips.repl.qb
    mips_sat_s_b,                              // llvm.mips.sat.s.b
    mips_sat_s_d,                              // llvm.mips.sat.s.d
    mips_sat_s_h,                              // llvm.mips.sat.s.h
    mips_sat_s_w,                              // llvm.mips.sat.s.w
    mips_sat_u_b,                              // llvm.mips.sat.u.b
    mips_sat_u_d,                              // llvm.mips.sat.u.d
    mips_sat_u_h,                              // llvm.mips.sat.u.h
    mips_sat_u_w,                              // llvm.mips.sat.u.w
    mips_shf_b,                                // llvm.mips.shf.b
    mips_shf_h,                                // llvm.mips.shf.h
    mips_shf_w,                                // llvm.mips.shf.w
    mips_shilo,                                // llvm.mips.shilo
    mips_shll_ph,                              // llvm.mips.shll.ph
    mips_shll_qb,                              // llvm.mips.shll.qb
    mips_shll_s_ph,                            // llvm.mips.shll.s.ph
    mips_shll_s_w,                             // llvm.mips.shll.s.w
    mips_shra_ph,                              // llvm.mips.shra.ph
    mips_shra_qb,                              // llvm.mips.shra.qb
    mips_shra_r_ph,                            // llvm.mips.shra.r.ph
    mips_shra_r_qb,                            // llvm.mips.shra.r.qb
    mips_shra_r_w,                             // llvm.mips.shra.r.w
    mips_shrl_ph,                              // llvm.mips.shrl.ph
    mips_shrl_qb,                              // llvm.mips.shrl.qb
    mips_sld_b,                                // llvm.mips.sld.b
    mips_sld_d,                                // llvm.mips.sld.d
    mips_sld_h,                                // llvm.mips.sld.h
    mips_sld_w,                                // llvm.mips.sld.w
    mips_sldi_b,                               // llvm.mips.sldi.b
    mips_sldi_d,                               // llvm.mips.sldi.d
    mips_sldi_h,                               // llvm.mips.sldi.h
    mips_sldi_w,                               // llvm.mips.sldi.w
    mips_sll_b,                                // llvm.mips.sll.b
    mips_sll_d,                                // llvm.mips.sll.d
    mips_sll_h,                                // llvm.mips.sll.h
    mips_sll_w,                                // llvm.mips.sll.w
    mips_slli_b,                               // llvm.mips.slli.b
    mips_slli_d,                               // llvm.mips.slli.d
    mips_slli_h,                               // llvm.mips.slli.h
    mips_slli_w,                               // llvm.mips.slli.w
    mips_splat_b,                              // llvm.mips.splat.b
    mips_splat_d,                              // llvm.mips.splat.d
    mips_splat_h,                              // llvm.mips.splat.h
    mips_splat_w,                              // llvm.mips.splat.w
    mips_splati_b,                             // llvm.mips.splati.b
    mips_splati_d,                             // llvm.mips.splati.d
    mips_splati_h,                             // llvm.mips.splati.h
    mips_splati_w,                             // llvm.mips.splati.w
    mips_sra_b,                                // llvm.mips.sra.b
    mips_sra_d,                                // llvm.mips.sra.d
    mips_sra_h,                                // llvm.mips.sra.h
    mips_sra_w,                                // llvm.mips.sra.w
    mips_srai_b,                               // llvm.mips.srai.b
    mips_srai_d,                               // llvm.mips.srai.d
    mips_srai_h,                               // llvm.mips.srai.h
    mips_srai_w,                               // llvm.mips.srai.w
    mips_srar_b,                               // llvm.mips.srar.b
    mips_srar_d,                               // llvm.mips.srar.d
    mips_srar_h,                               // llvm.mips.srar.h
    mips_srar_w,                               // llvm.mips.srar.w
    mips_srari_b,                              // llvm.mips.srari.b
    mips_srari_d,                              // llvm.mips.srari.d
    mips_srari_h,                              // llvm.mips.srari.h
    mips_srari_w,                              // llvm.mips.srari.w
    mips_srl_b,                                // llvm.mips.srl.b
    mips_srl_d,                                // llvm.mips.srl.d
    mips_srl_h,                                // llvm.mips.srl.h
    mips_srl_w,                                // llvm.mips.srl.w
    mips_srli_b,                               // llvm.mips.srli.b
    mips_srli_d,                               // llvm.mips.srli.d
    mips_srli_h,                               // llvm.mips.srli.h
    mips_srli_w,                               // llvm.mips.srli.w
    mips_srlr_b,                               // llvm.mips.srlr.b
    mips_srlr_d,                               // llvm.mips.srlr.d
    mips_srlr_h,                               // llvm.mips.srlr.h
    mips_srlr_w,                               // llvm.mips.srlr.w
    mips_srlri_b,                              // llvm.mips.srlri.b
    mips_srlri_d,                              // llvm.mips.srlri.d
    mips_srlri_h,                              // llvm.mips.srlri.h
    mips_srlri_w,                              // llvm.mips.srlri.w
    mips_st_b,                                 // llvm.mips.st.b
    mips_st_d,                                 // llvm.mips.st.d
    mips_st_h,                                 // llvm.mips.st.h
    mips_st_w,                                 // llvm.mips.st.w
    mips_subq_ph,                              // llvm.mips.subq.ph
    mips_subq_s_ph,                            // llvm.mips.subq.s.ph
    mips_subq_s_w,                             // llvm.mips.subq.s.w
    mips_subqh_ph,                             // llvm.mips.subqh.ph
    mips_subqh_r_ph,                           // llvm.mips.subqh.r.ph
    mips_subqh_r_w,                            // llvm.mips.subqh.r.w
    mips_subqh_w,                              // llvm.mips.subqh.w
    mips_subs_s_b,                             // llvm.mips.subs.s.b
    mips_subs_s_d,                             // llvm.mips.subs.s.d
    mips_subs_s_h,                             // llvm.mips.subs.s.h
    mips_subs_s_w,                             // llvm.mips.subs.s.w
    mips_subs_u_b,                             // llvm.mips.subs.u.b
    mips_subs_u_d,                             // llvm.mips.subs.u.d
    mips_subs_u_h,                             // llvm.mips.subs.u.h
    mips_subs_u_w,                             // llvm.mips.subs.u.w
    mips_subsus_u_b,                           // llvm.mips.subsus.u.b
    mips_subsus_u_d,                           // llvm.mips.subsus.u.d
    mips_subsus_u_h,                           // llvm.mips.subsus.u.h
    mips_subsus_u_w,                           // llvm.mips.subsus.u.w
    mips_subsuu_s_b,                           // llvm.mips.subsuu.s.b
    mips_subsuu_s_d,                           // llvm.mips.subsuu.s.d
    mips_subsuu_s_h,                           // llvm.mips.subsuu.s.h
    mips_subsuu_s_w,                           // llvm.mips.subsuu.s.w
    mips_subu_ph,                              // llvm.mips.subu.ph
    mips_subu_qb,                              // llvm.mips.subu.qb
    mips_subu_s_ph,                            // llvm.mips.subu.s.ph
    mips_subu_s_qb,                            // llvm.mips.subu.s.qb
    mips_subuh_qb,                             // llvm.mips.subuh.qb
    mips_subuh_r_qb,                           // llvm.mips.subuh.r.qb
    mips_subv_b,                               // llvm.mips.subv.b
    mips_subv_d,                               // llvm.mips.subv.d
    mips_subv_h,                               // llvm.mips.subv.h
    mips_subv_w,                               // llvm.mips.subv.w
    mips_subvi_b,                              // llvm.mips.subvi.b
    mips_subvi_d,                              // llvm.mips.subvi.d
    mips_subvi_h,                              // llvm.mips.subvi.h
    mips_subvi_w,                              // llvm.mips.subvi.w
    mips_vshf_b,                               // llvm.mips.vshf.b
    mips_vshf_d,                               // llvm.mips.vshf.d
    mips_vshf_h,                               // llvm.mips.vshf.h
    mips_vshf_w,                               // llvm.mips.vshf.w
    mips_wrdsp,                                // llvm.mips.wrdsp
    mips_xor_v,                                // llvm.mips.xor.v
    mips_xori_b,                               // llvm.mips.xori.b
    nearbyint,                                 // llvm.nearbyint
    nvvm_abs_i,                                // llvm.nvvm.abs.i
    nvvm_abs_ll,                               // llvm.nvvm.abs.ll
    nvvm_add_rm_d,                             // llvm.nvvm.add.rm.d
    nvvm_add_rm_f,                             // llvm.nvvm.add.rm.f
    nvvm_add_rm_ftz_f,                         // llvm.nvvm.add.rm.ftz.f
    nvvm_add_rn_d,                             // llvm.nvvm.add.rn.d
    nvvm_add_rn_f,                             // llvm.nvvm.add.rn.f
    nvvm_add_rn_ftz_f,                         // llvm.nvvm.add.rn.ftz.f
    nvvm_add_rp_d,                             // llvm.nvvm.add.rp.d
    nvvm_add_rp_f,                             // llvm.nvvm.add.rp.f
    nvvm_add_rp_ftz_f,                         // llvm.nvvm.add.rp.ftz.f
    nvvm_add_rz_d,                             // llvm.nvvm.add.rz.d
    nvvm_add_rz_f,                             // llvm.nvvm.add.rz.f
    nvvm_add_rz_ftz_f,                         // llvm.nvvm.add.rz.ftz.f
    nvvm_atomic_load_add_f32,                  // llvm.nvvm.atomic.load.add.f32
    nvvm_atomic_load_dec_32,                   // llvm.nvvm.atomic.load.dec.32
    nvvm_atomic_load_inc_32,                   // llvm.nvvm.atomic.load.inc.32
    nvvm_barrier0,                             // llvm.nvvm.barrier0
    nvvm_barrier0_and,                         // llvm.nvvm.barrier0.and
    nvvm_barrier0_or,                          // llvm.nvvm.barrier0.or
    nvvm_barrier0_popc,                        // llvm.nvvm.barrier0.popc
    nvvm_bitcast_d2ll,                         // llvm.nvvm.bitcast.d2ll
    nvvm_bitcast_f2i,                          // llvm.nvvm.bitcast.f2i
    nvvm_bitcast_i2f,                          // llvm.nvvm.bitcast.i2f
    nvvm_bitcast_ll2d,                         // llvm.nvvm.bitcast.ll2d
    nvvm_brev32,                               // llvm.nvvm.brev32
    nvvm_brev64,                               // llvm.nvvm.brev64
    nvvm_ceil_d,                               // llvm.nvvm.ceil.d
    nvvm_ceil_f,                               // llvm.nvvm.ceil.f
    nvvm_ceil_ftz_f,                           // llvm.nvvm.ceil.ftz.f
    nvvm_clz_i,                                // llvm.nvvm.clz.i
    nvvm_clz_ll,                               // llvm.nvvm.clz.ll
    nvvm_compiler_error,                       // llvm.nvvm.compiler.error
    nvvm_compiler_warn,                        // llvm.nvvm.compiler.warn
    nvvm_cos_approx_f,                         // llvm.nvvm.cos.approx.f
    nvvm_cos_approx_ftz_f,                     // llvm.nvvm.cos.approx.ftz.f
    nvvm_d2f_rm,                               // llvm.nvvm.d2f.rm
    nvvm_d2f_rm_ftz,                           // llvm.nvvm.d2f.rm.ftz
    nvvm_d2f_rn,                               // llvm.nvvm.d2f.rn
    nvvm_d2f_rn_ftz,                           // llvm.nvvm.d2f.rn.ftz
    nvvm_d2f_rp,                               // llvm.nvvm.d2f.rp
    nvvm_d2f_rp_ftz,                           // llvm.nvvm.d2f.rp.ftz
    nvvm_d2f_rz,                               // llvm.nvvm.d2f.rz
    nvvm_d2f_rz_ftz,                           // llvm.nvvm.d2f.rz.ftz
    nvvm_d2i_hi,                               // llvm.nvvm.d2i.hi
    nvvm_d2i_lo,                               // llvm.nvvm.d2i.lo
    nvvm_d2i_rm,                               // llvm.nvvm.d2i.rm
    nvvm_d2i_rn,                               // llvm.nvvm.d2i.rn
    nvvm_d2i_rp,                               // llvm.nvvm.d2i.rp
    nvvm_d2i_rz,                               // llvm.nvvm.d2i.rz
    nvvm_d2ll_rm,                              // llvm.nvvm.d2ll.rm
    nvvm_d2ll_rn,                              // llvm.nvvm.d2ll.rn
    nvvm_d2ll_rp,                              // llvm.nvvm.d2ll.rp
    nvvm_d2ll_rz,                              // llvm.nvvm.d2ll.rz
    nvvm_d2ui_rm,                              // llvm.nvvm.d2ui.rm
    nvvm_d2ui_rn,                              // llvm.nvvm.d2ui.rn
    nvvm_d2ui_rp,                              // llvm.nvvm.d2ui.rp
    nvvm_d2ui_rz,                              // llvm.nvvm.d2ui.rz
    nvvm_d2ull_rm,                             // llvm.nvvm.d2ull.rm
    nvvm_d2ull_rn,                             // llvm.nvvm.d2ull.rn
    nvvm_d2ull_rp,                             // llvm.nvvm.d2ull.rp
    nvvm_d2ull_rz,                             // llvm.nvvm.d2ull.rz
    nvvm_div_approx_f,                         // llvm.nvvm.div.approx.f
    nvvm_div_approx_ftz_f,                     // llvm.nvvm.div.approx.ftz.f
    nvvm_div_rm_d,                             // llvm.nvvm.div.rm.d
    nvvm_div_rm_f,                             // llvm.nvvm.div.rm.f
    nvvm_div_rm_ftz_f,                         // llvm.nvvm.div.rm.ftz.f
    nvvm_div_rn_d,                             // llvm.nvvm.div.rn.d
    nvvm_div_rn_f,                             // llvm.nvvm.div.rn.f
    nvvm_div_rn_ftz_f,                         // llvm.nvvm.div.rn.ftz.f
    nvvm_div_rp_d,                             // llvm.nvvm.div.rp.d
    nvvm_div_rp_f,                             // llvm.nvvm.div.rp.f
    nvvm_div_rp_ftz_f,                         // llvm.nvvm.div.rp.ftz.f
    nvvm_div_rz_d,                             // llvm.nvvm.div.rz.d
    nvvm_div_rz_f,                             // llvm.nvvm.div.rz.f
    nvvm_div_rz_ftz_f,                         // llvm.nvvm.div.rz.ftz.f
    nvvm_ex2_approx_d,                         // llvm.nvvm.ex2.approx.d
    nvvm_ex2_approx_f,                         // llvm.nvvm.ex2.approx.f
    nvvm_ex2_approx_ftz_f,                     // llvm.nvvm.ex2.approx.ftz.f
    nvvm_f2h_rn,                               // llvm.nvvm.f2h.rn
    nvvm_f2h_rn_ftz,                           // llvm.nvvm.f2h.rn.ftz
    nvvm_f2i_rm,                               // llvm.nvvm.f2i.rm
    nvvm_f2i_rm_ftz,                           // llvm.nvvm.f2i.rm.ftz
    nvvm_f2i_rn,                               // llvm.nvvm.f2i.rn
    nvvm_f2i_rn_ftz,                           // llvm.nvvm.f2i.rn.ftz
    nvvm_f2i_rp,                               // llvm.nvvm.f2i.rp
    nvvm_f2i_rp_ftz,                           // llvm.nvvm.f2i.rp.ftz
    nvvm_f2i_rz,                               // llvm.nvvm.f2i.rz
    nvvm_f2i_rz_ftz,                           // llvm.nvvm.f2i.rz.ftz
    nvvm_f2ll_rm,                              // llvm.nvvm.f2ll.rm
    nvvm_f2ll_rm_ftz,                          // llvm.nvvm.f2ll.rm.ftz
    nvvm_f2ll_rn,                              // llvm.nvvm.f2ll.rn
    nvvm_f2ll_rn_ftz,                          // llvm.nvvm.f2ll.rn.ftz
    nvvm_f2ll_rp,                              // llvm.nvvm.f2ll.rp
    nvvm_f2ll_rp_ftz,                          // llvm.nvvm.f2ll.rp.ftz
    nvvm_f2ll_rz,                              // llvm.nvvm.f2ll.rz
    nvvm_f2ll_rz_ftz,                          // llvm.nvvm.f2ll.rz.ftz
    nvvm_f2ui_rm,                              // llvm.nvvm.f2ui.rm
    nvvm_f2ui_rm_ftz,                          // llvm.nvvm.f2ui.rm.ftz
    nvvm_f2ui_rn,                              // llvm.nvvm.f2ui.rn
    nvvm_f2ui_rn_ftz,                          // llvm.nvvm.f2ui.rn.ftz
    nvvm_f2ui_rp,                              // llvm.nvvm.f2ui.rp
    nvvm_f2ui_rp_ftz,                          // llvm.nvvm.f2ui.rp.ftz
    nvvm_f2ui_rz,                              // llvm.nvvm.f2ui.rz
    nvvm_f2ui_rz_ftz,                          // llvm.nvvm.f2ui.rz.ftz
    nvvm_f2ull_rm,                             // llvm.nvvm.f2ull.rm
    nvvm_f2ull_rm_ftz,                         // llvm.nvvm.f2ull.rm.ftz
    nvvm_f2ull_rn,                             // llvm.nvvm.f2ull.rn
    nvvm_f2ull_rn_ftz,                         // llvm.nvvm.f2ull.rn.ftz
    nvvm_f2ull_rp,                             // llvm.nvvm.f2ull.rp
    nvvm_f2ull_rp_ftz,                         // llvm.nvvm.f2ull.rp.ftz
    nvvm_f2ull_rz,                             // llvm.nvvm.f2ull.rz
    nvvm_f2ull_rz_ftz,                         // llvm.nvvm.f2ull.rz.ftz
    nvvm_fabs_d,                               // llvm.nvvm.fabs.d
    nvvm_fabs_f,                               // llvm.nvvm.fabs.f
    nvvm_fabs_ftz_f,                           // llvm.nvvm.fabs.ftz.f
    nvvm_floor_d,                              // llvm.nvvm.floor.d
    nvvm_floor_f,                              // llvm.nvvm.floor.f
    nvvm_floor_ftz_f,                          // llvm.nvvm.floor.ftz.f
    nvvm_fma_rm_d,                             // llvm.nvvm.fma.rm.d
    nvvm_fma_rm_f,                             // llvm.nvvm.fma.rm.f
    nvvm_fma_rm_ftz_f,                         // llvm.nvvm.fma.rm.ftz.f
    nvvm_fma_rn_d,                             // llvm.nvvm.fma.rn.d
    nvvm_fma_rn_f,                             // llvm.nvvm.fma.rn.f
    nvvm_fma_rn_ftz_f,                         // llvm.nvvm.fma.rn.ftz.f
    nvvm_fma_rp_d,                             // llvm.nvvm.fma.rp.d
    nvvm_fma_rp_f,                             // llvm.nvvm.fma.rp.f
    nvvm_fma_rp_ftz_f,                         // llvm.nvvm.fma.rp.ftz.f
    nvvm_fma_rz_d,                             // llvm.nvvm.fma.rz.d
    nvvm_fma_rz_f,                             // llvm.nvvm.fma.rz.f
    nvvm_fma_rz_ftz_f,                         // llvm.nvvm.fma.rz.ftz.f
    nvvm_fmax_d,                               // llvm.nvvm.fmax.d
    nvvm_fmax_f,                               // llvm.nvvm.fmax.f
    nvvm_fmax_ftz_f,                           // llvm.nvvm.fmax.ftz.f
    nvvm_fmin_d,                               // llvm.nvvm.fmin.d
    nvvm_fmin_f,                               // llvm.nvvm.fmin.f
    nvvm_fmin_ftz_f,                           // llvm.nvvm.fmin.ftz.f
    nvvm_h2f,                                  // llvm.nvvm.h2f
    nvvm_i2d_rm,                               // llvm.nvvm.i2d.rm
    nvvm_i2d_rn,                               // llvm.nvvm.i2d.rn
    nvvm_i2d_rp,                               // llvm.nvvm.i2d.rp
    nvvm_i2d_rz,                               // llvm.nvvm.i2d.rz
    nvvm_i2f_rm,                               // llvm.nvvm.i2f.rm
    nvvm_i2f_rn,                               // llvm.nvvm.i2f.rn
    nvvm_i2f_rp,                               // llvm.nvvm.i2f.rp
    nvvm_i2f_rz,                               // llvm.nvvm.i2f.rz
    nvvm_isspacep_const,                       // llvm.nvvm.isspacep.const
    nvvm_isspacep_global,                      // llvm.nvvm.isspacep.global
    nvvm_isspacep_local,                       // llvm.nvvm.isspacep.local
    nvvm_isspacep_shared,                      // llvm.nvvm.isspacep.shared
    nvvm_istypep_sampler,                      // llvm.nvvm.istypep.sampler
    nvvm_istypep_surface,                      // llvm.nvvm.istypep.surface
    nvvm_istypep_texture,                      // llvm.nvvm.istypep.texture
    nvvm_ldg_global_f,                         // llvm.nvvm.ldg.global.f
    nvvm_ldg_global_i,                         // llvm.nvvm.ldg.global.i
    nvvm_ldg_global_p,                         // llvm.nvvm.ldg.global.p
    nvvm_ldu_global_f,                         // llvm.nvvm.ldu.global.f
    nvvm_ldu_global_i,                         // llvm.nvvm.ldu.global.i
    nvvm_ldu_global_p,                         // llvm.nvvm.ldu.global.p
    nvvm_lg2_approx_d,                         // llvm.nvvm.lg2.approx.d
    nvvm_lg2_approx_f,                         // llvm.nvvm.lg2.approx.f
    nvvm_lg2_approx_ftz_f,                     // llvm.nvvm.lg2.approx.ftz.f
    nvvm_ll2d_rm,                              // llvm.nvvm.ll2d.rm
    nvvm_ll2d_rn,                              // llvm.nvvm.ll2d.rn
    nvvm_ll2d_rp,                              // llvm.nvvm.ll2d.rp
    nvvm_ll2d_rz,                              // llvm.nvvm.ll2d.rz
    nvvm_ll2f_rm,                              // llvm.nvvm.ll2f.rm
    nvvm_ll2f_rn,                              // llvm.nvvm.ll2f.rn
    nvvm_ll2f_rp,                              // llvm.nvvm.ll2f.rp
    nvvm_ll2f_rz,                              // llvm.nvvm.ll2f.rz
    nvvm_lohi_i2d,                             // llvm.nvvm.lohi.i2d
    nvvm_max_i,                                // llvm.nvvm.max.i
    nvvm_max_ll,                               // llvm.nvvm.max.ll
    nvvm_max_ui,                               // llvm.nvvm.max.ui
    nvvm_max_ull,                              // llvm.nvvm.max.ull
    nvvm_membar_cta,                           // llvm.nvvm.membar.cta
    nvvm_membar_gl,                            // llvm.nvvm.membar.gl
    nvvm_membar_sys,                           // llvm.nvvm.membar.sys
    nvvm_min_i,                                // llvm.nvvm.min.i
    nvvm_min_ll,                               // llvm.nvvm.min.ll
    nvvm_min_ui,                               // llvm.nvvm.min.ui
    nvvm_min_ull,                              // llvm.nvvm.min.ull
    nvvm_move_double,                          // llvm.nvvm.move.double
    nvvm_move_float,                           // llvm.nvvm.move.float
    nvvm_move_i16,                             // llvm.nvvm.move.i16
    nvvm_move_i32,                             // llvm.nvvm.move.i32
    nvvm_move_i64,                             // llvm.nvvm.move.i64
    nvvm_move_ptr,                             // llvm.nvvm.move.ptr
    nvvm_mul24_i,                              // llvm.nvvm.mul24.i
    nvvm_mul24_ui,                             // llvm.nvvm.mul24.ui
    nvvm_mul_rm_d,                             // llvm.nvvm.mul.rm.d
    nvvm_mul_rm_f,                             // llvm.nvvm.mul.rm.f
    nvvm_mul_rm_ftz_f,                         // llvm.nvvm.mul.rm.ftz.f
    nvvm_mul_rn_d,                             // llvm.nvvm.mul.rn.d
    nvvm_mul_rn_f,                             // llvm.nvvm.mul.rn.f
    nvvm_mul_rn_ftz_f,                         // llvm.nvvm.mul.rn.ftz.f
    nvvm_mul_rp_d,                             // llvm.nvvm.mul.rp.d
    nvvm_mul_rp_f,                             // llvm.nvvm.mul.rp.f
    nvvm_mul_rp_ftz_f,                         // llvm.nvvm.mul.rp.ftz.f
    nvvm_mul_rz_d,                             // llvm.nvvm.mul.rz.d
    nvvm_mul_rz_f,                             // llvm.nvvm.mul.rz.f
    nvvm_mul_rz_ftz_f,                         // llvm.nvvm.mul.rz.ftz.f
    nvvm_mulhi_i,                              // llvm.nvvm.mulhi.i
    nvvm_mulhi_ll,                             // llvm.nvvm.mulhi.ll
    nvvm_mulhi_ui,                             // llvm.nvvm.mulhi.ui
    nvvm_mulhi_ull,                            // llvm.nvvm.mulhi.ull
    nvvm_popc_i,                               // llvm.nvvm.popc.i
    nvvm_popc_ll,                              // llvm.nvvm.popc.ll
    nvvm_prmt,                                 // llvm.nvvm.prmt
    nvvm_ptr_constant_to_gen,                  // llvm.nvvm.ptr.constant.to.gen
    nvvm_ptr_gen_to_constant,                  // llvm.nvvm.ptr.gen.to.constant
    nvvm_ptr_gen_to_global,                    // llvm.nvvm.ptr.gen.to.global
    nvvm_ptr_gen_to_local,                     // llvm.nvvm.ptr.gen.to.local
    nvvm_ptr_gen_to_param,                     // llvm.nvvm.ptr.gen.to.param
    nvvm_ptr_gen_to_shared,                    // llvm.nvvm.ptr.gen.to.shared
    nvvm_ptr_global_to_gen,                    // llvm.nvvm.ptr.global.to.gen
    nvvm_ptr_local_to_gen,                     // llvm.nvvm.ptr.local.to.gen
    nvvm_ptr_shared_to_gen,                    // llvm.nvvm.ptr.shared.to.gen
    nvvm_rcp_approx_ftz_d,                     // llvm.nvvm.rcp.approx.ftz.d
    nvvm_rcp_rm_d,                             // llvm.nvvm.rcp.rm.d
    nvvm_rcp_rm_f,                             // llvm.nvvm.rcp.rm.f
    nvvm_rcp_rm_ftz_f,                         // llvm.nvvm.rcp.rm.ftz.f
    nvvm_rcp_rn_d,                             // llvm.nvvm.rcp.rn.d
    nvvm_rcp_rn_f,                             // llvm.nvvm.rcp.rn.f
    nvvm_rcp_rn_ftz_f,                         // llvm.nvvm.rcp.rn.ftz.f
    nvvm_rcp_rp_d,                             // llvm.nvvm.rcp.rp.d
    nvvm_rcp_rp_f,                             // llvm.nvvm.rcp.rp.f
    nvvm_rcp_rp_ftz_f,                         // llvm.nvvm.rcp.rp.ftz.f
    nvvm_rcp_rz_d,                             // llvm.nvvm.rcp.rz.d
    nvvm_rcp_rz_f,                             // llvm.nvvm.rcp.rz.f
    nvvm_rcp_rz_ftz_f,                         // llvm.nvvm.rcp.rz.ftz.f
    nvvm_read_ptx_sreg_ctaid_x,                // llvm.nvvm.read.ptx.sreg.ctaid.x
    nvvm_read_ptx_sreg_ctaid_y,                // llvm.nvvm.read.ptx.sreg.ctaid.y
    nvvm_read_ptx_sreg_ctaid_z,                // llvm.nvvm.read.ptx.sreg.ctaid.z
    nvvm_read_ptx_sreg_envreg0,                // llvm.nvvm.read.ptx.sreg.envreg0
    nvvm_read_ptx_sreg_envreg1,                // llvm.nvvm.read.ptx.sreg.envreg1
    nvvm_read_ptx_sreg_envreg10,               // llvm.nvvm.read.ptx.sreg.envreg10
    nvvm_read_ptx_sreg_envreg11,               // llvm.nvvm.read.ptx.sreg.envreg11
    nvvm_read_ptx_sreg_envreg12,               // llvm.nvvm.read.ptx.sreg.envreg12
    nvvm_read_ptx_sreg_envreg13,               // llvm.nvvm.read.ptx.sreg.envreg13
    nvvm_read_ptx_sreg_envreg14,               // llvm.nvvm.read.ptx.sreg.envreg14
    nvvm_read_ptx_sreg_envreg15,               // llvm.nvvm.read.ptx.sreg.envreg15
    nvvm_read_ptx_sreg_envreg16,               // llvm.nvvm.read.ptx.sreg.envreg16
    nvvm_read_ptx_sreg_envreg17,               // llvm.nvvm.read.ptx.sreg.envreg17
    nvvm_read_ptx_sreg_envreg18,               // llvm.nvvm.read.ptx.sreg.envreg18
    nvvm_read_ptx_sreg_envreg19,               // llvm.nvvm.read.ptx.sreg.envreg19
    nvvm_read_ptx_sreg_envreg2,                // llvm.nvvm.read.ptx.sreg.envreg2
    nvvm_read_ptx_sreg_envreg20,               // llvm.nvvm.read.ptx.sreg.envreg20
    nvvm_read_ptx_sreg_envreg21,               // llvm.nvvm.read.ptx.sreg.envreg21
    nvvm_read_ptx_sreg_envreg22,               // llvm.nvvm.read.ptx.sreg.envreg22
    nvvm_read_ptx_sreg_envreg23,               // llvm.nvvm.read.ptx.sreg.envreg23
    nvvm_read_ptx_sreg_envreg24,               // llvm.nvvm.read.ptx.sreg.envreg24
    nvvm_read_ptx_sreg_envreg25,               // llvm.nvvm.read.ptx.sreg.envreg25
    nvvm_read_ptx_sreg_envreg26,               // llvm.nvvm.read.ptx.sreg.envreg26
    nvvm_read_ptx_sreg_envreg27,               // llvm.nvvm.read.ptx.sreg.envreg27
    nvvm_read_ptx_sreg_envreg28,               // llvm.nvvm.read.ptx.sreg.envreg28
    nvvm_read_ptx_sreg_envreg29,               // llvm.nvvm.read.ptx.sreg.envreg29
    nvvm_read_ptx_sreg_envreg3,                // llvm.nvvm.read.ptx.sreg.envreg3
    nvvm_read_ptx_sreg_envreg30,               // llvm.nvvm.read.ptx.sreg.envreg30
    nvvm_read_ptx_sreg_envreg31,               // llvm.nvvm.read.ptx.sreg.envreg31
    nvvm_read_ptx_sreg_envreg4,                // llvm.nvvm.read.ptx.sreg.envreg4
    nvvm_read_ptx_sreg_envreg5,                // llvm.nvvm.read.ptx.sreg.envreg5
    nvvm_read_ptx_sreg_envreg6,                // llvm.nvvm.read.ptx.sreg.envreg6
    nvvm_read_ptx_sreg_envreg7,                // llvm.nvvm.read.ptx.sreg.envreg7
    nvvm_read_ptx_sreg_envreg8,                // llvm.nvvm.read.ptx.sreg.envreg8
    nvvm_read_ptx_sreg_envreg9,                // llvm.nvvm.read.ptx.sreg.envreg9
    nvvm_read_ptx_sreg_nctaid_x,               // llvm.nvvm.read.ptx.sreg.nctaid.x
    nvvm_read_ptx_sreg_nctaid_y,               // llvm.nvvm.read.ptx.sreg.nctaid.y
    nvvm_read_ptx_sreg_nctaid_z,               // llvm.nvvm.read.ptx.sreg.nctaid.z
    nvvm_read_ptx_sreg_ntid_x,                 // llvm.nvvm.read.ptx.sreg.ntid.x
    nvvm_read_ptx_sreg_ntid_y,                 // llvm.nvvm.read.ptx.sreg.ntid.y
    nvvm_read_ptx_sreg_ntid_z,                 // llvm.nvvm.read.ptx.sreg.ntid.z
    nvvm_read_ptx_sreg_tid_x,                  // llvm.nvvm.read.ptx.sreg.tid.x
    nvvm_read_ptx_sreg_tid_y,                  // llvm.nvvm.read.ptx.sreg.tid.y
    nvvm_read_ptx_sreg_tid_z,                  // llvm.nvvm.read.ptx.sreg.tid.z
    nvvm_read_ptx_sreg_warpsize,               // llvm.nvvm.read.ptx.sreg.warpsize
    nvvm_reflect,                              // llvm.nvvm.reflect
    nvvm_rotate_b32,                           // llvm.nvvm.rotate.b32
    nvvm_rotate_b64,                           // llvm.nvvm.rotate.b64
    nvvm_rotate_right_b64,                     // llvm.nvvm.rotate.right.b64
    nvvm_round_d,                              // llvm.nvvm.round.d
    nvvm_round_f,                              // llvm.nvvm.round.f
    nvvm_round_ftz_f,                          // llvm.nvvm.round.ftz.f
    nvvm_rsqrt_approx_d,                       // llvm.nvvm.rsqrt.approx.d
    nvvm_rsqrt_approx_f,                       // llvm.nvvm.rsqrt.approx.f
    nvvm_rsqrt_approx_ftz_f,                   // llvm.nvvm.rsqrt.approx.ftz.f
    nvvm_sad_i,                                // llvm.nvvm.sad.i
    nvvm_sad_ui,                               // llvm.nvvm.sad.ui
    nvvm_saturate_d,                           // llvm.nvvm.saturate.d
    nvvm_saturate_f,                           // llvm.nvvm.saturate.f
    nvvm_saturate_ftz_f,                       // llvm.nvvm.saturate.ftz.f
    nvvm_sin_approx_f,                         // llvm.nvvm.sin.approx.f
    nvvm_sin_approx_ftz_f,                     // llvm.nvvm.sin.approx.ftz.f
    nvvm_sqrt_approx_f,                        // llvm.nvvm.sqrt.approx.f
    nvvm_sqrt_approx_ftz_f,                    // llvm.nvvm.sqrt.approx.ftz.f
    nvvm_sqrt_f,                               // llvm.nvvm.sqrt.f
    nvvm_sqrt_rm_d,                            // llvm.nvvm.sqrt.rm.d
    nvvm_sqrt_rm_f,                            // llvm.nvvm.sqrt.rm.f
    nvvm_sqrt_rm_ftz_f,                        // llvm.nvvm.sqrt.rm.ftz.f
    nvvm_sqrt_rn_d,                            // llvm.nvvm.sqrt.rn.d
    nvvm_sqrt_rn_f,                            // llvm.nvvm.sqrt.rn.f
    nvvm_sqrt_rn_ftz_f,                        // llvm.nvvm.sqrt.rn.ftz.f
    nvvm_sqrt_rp_d,                            // llvm.nvvm.sqrt.rp.d
    nvvm_sqrt_rp_f,                            // llvm.nvvm.sqrt.rp.f
    nvvm_sqrt_rp_ftz_f,                        // llvm.nvvm.sqrt.rp.ftz.f
    nvvm_sqrt_rz_d,                            // llvm.nvvm.sqrt.rz.d
    nvvm_sqrt_rz_f,                            // llvm.nvvm.sqrt.rz.f
    nvvm_sqrt_rz_ftz_f,                        // llvm.nvvm.sqrt.rz.ftz.f
    nvvm_suld_1d_array_i16_clamp,              // llvm.nvvm.suld.1d.array.i16.clamp
    nvvm_suld_1d_array_i16_trap,               // llvm.nvvm.suld.1d.array.i16.trap
    nvvm_suld_1d_array_i16_zero,               // llvm.nvvm.suld.1d.array.i16.zero
    nvvm_suld_1d_array_i32_clamp,              // llvm.nvvm.suld.1d.array.i32.clamp
    nvvm_suld_1d_array_i32_trap,               // llvm.nvvm.suld.1d.array.i32.trap
    nvvm_suld_1d_array_i32_zero,               // llvm.nvvm.suld.1d.array.i32.zero
    nvvm_suld_1d_array_i64_clamp,              // llvm.nvvm.suld.1d.array.i64.clamp
    nvvm_suld_1d_array_i64_trap,               // llvm.nvvm.suld.1d.array.i64.trap
    nvvm_suld_1d_array_i64_zero,               // llvm.nvvm.suld.1d.array.i64.zero
    nvvm_suld_1d_array_i8_clamp,               // llvm.nvvm.suld.1d.array.i8.clamp
    nvvm_suld_1d_array_i8_trap,                // llvm.nvvm.suld.1d.array.i8.trap
    nvvm_suld_1d_array_i8_zero,                // llvm.nvvm.suld.1d.array.i8.zero
    nvvm_suld_1d_array_v2i16_clamp,            // llvm.nvvm.suld.1d.array.v2i16.clamp
    nvvm_suld_1d_array_v2i16_trap,             // llvm.nvvm.suld.1d.array.v2i16.trap
    nvvm_suld_1d_array_v2i16_zero,             // llvm.nvvm.suld.1d.array.v2i16.zero
    nvvm_suld_1d_array_v2i32_clamp,            // llvm.nvvm.suld.1d.array.v2i32.clamp
    nvvm_suld_1d_array_v2i32_trap,             // llvm.nvvm.suld.1d.array.v2i32.trap
    nvvm_suld_1d_array_v2i32_zero,             // llvm.nvvm.suld.1d.array.v2i32.zero
    nvvm_suld_1d_array_v2i64_clamp,            // llvm.nvvm.suld.1d.array.v2i64.clamp
    nvvm_suld_1d_array_v2i64_trap,             // llvm.nvvm.suld.1d.array.v2i64.trap
    nvvm_suld_1d_array_v2i64_zero,             // llvm.nvvm.suld.1d.array.v2i64.zero
    nvvm_suld_1d_array_v2i8_clamp,             // llvm.nvvm.suld.1d.array.v2i8.clamp
    nvvm_suld_1d_array_v2i8_trap,              // llvm.nvvm.suld.1d.array.v2i8.trap
    nvvm_suld_1d_array_v2i8_zero,              // llvm.nvvm.suld.1d.array.v2i8.zero
    nvvm_suld_1d_array_v4i16_clamp,            // llvm.nvvm.suld.1d.array.v4i16.clamp
    nvvm_suld_1d_array_v4i16_trap,             // llvm.nvvm.suld.1d.array.v4i16.trap
    nvvm_suld_1d_array_v4i16_zero,             // llvm.nvvm.suld.1d.array.v4i16.zero
    nvvm_suld_1d_array_v4i32_clamp,            // llvm.nvvm.suld.1d.array.v4i32.clamp
    nvvm_suld_1d_array_v4i32_trap,             // llvm.nvvm.suld.1d.array.v4i32.trap
    nvvm_suld_1d_array_v4i32_zero,             // llvm.nvvm.suld.1d.array.v4i32.zero
    nvvm_suld_1d_array_v4i8_clamp,             // llvm.nvvm.suld.1d.array.v4i8.clamp
    nvvm_suld_1d_array_v4i8_trap,              // llvm.nvvm.suld.1d.array.v4i8.trap
    nvvm_suld_1d_array_v4i8_zero,              // llvm.nvvm.suld.1d.array.v4i8.zero
    nvvm_suld_1d_i16_clamp,                    // llvm.nvvm.suld.1d.i16.clamp
    nvvm_suld_1d_i16_trap,                     // llvm.nvvm.suld.1d.i16.trap
    nvvm_suld_1d_i16_zero,                     // llvm.nvvm.suld.1d.i16.zero
    nvvm_suld_1d_i32_clamp,                    // llvm.nvvm.suld.1d.i32.clamp
    nvvm_suld_1d_i32_trap,                     // llvm.nvvm.suld.1d.i32.trap
    nvvm_suld_1d_i32_zero,                     // llvm.nvvm.suld.1d.i32.zero
    nvvm_suld_1d_i64_clamp,                    // llvm.nvvm.suld.1d.i64.clamp
    nvvm_suld_1d_i64_trap,                     // llvm.nvvm.suld.1d.i64.trap
    nvvm_suld_1d_i64_zero,                     // llvm.nvvm.suld.1d.i64.zero
    nvvm_suld_1d_i8_clamp,                     // llvm.nvvm.suld.1d.i8.clamp
    nvvm_suld_1d_i8_trap,                      // llvm.nvvm.suld.1d.i8.trap
    nvvm_suld_1d_i8_zero,                      // llvm.nvvm.suld.1d.i8.zero
    nvvm_suld_1d_v2i16_clamp,                  // llvm.nvvm.suld.1d.v2i16.clamp
    nvvm_suld_1d_v2i16_trap,                   // llvm.nvvm.suld.1d.v2i16.trap
    nvvm_suld_1d_v2i16_zero,                   // llvm.nvvm.suld.1d.v2i16.zero
    nvvm_suld_1d_v2i32_clamp,                  // llvm.nvvm.suld.1d.v2i32.clamp
    nvvm_suld_1d_v2i32_trap,                   // llvm.nvvm.suld.1d.v2i32.trap
    nvvm_suld_1d_v2i32_zero,                   // llvm.nvvm.suld.1d.v2i32.zero
    nvvm_suld_1d_v2i64_clamp,                  // llvm.nvvm.suld.1d.v2i64.clamp
    nvvm_suld_1d_v2i64_trap,                   // llvm.nvvm.suld.1d.v2i64.trap
    nvvm_suld_1d_v2i64_zero,                   // llvm.nvvm.suld.1d.v2i64.zero
    nvvm_suld_1d_v2i8_clamp,                   // llvm.nvvm.suld.1d.v2i8.clamp
    nvvm_suld_1d_v2i8_trap,                    // llvm.nvvm.suld.1d.v2i8.trap
    nvvm_suld_1d_v2i8_zero,                    // llvm.nvvm.suld.1d.v2i8.zero
    nvvm_suld_1d_v4i16_clamp,                  // llvm.nvvm.suld.1d.v4i16.clamp
    nvvm_suld_1d_v4i16_trap,                   // llvm.nvvm.suld.1d.v4i16.trap
    nvvm_suld_1d_v4i16_zero,                   // llvm.nvvm.suld.1d.v4i16.zero
    nvvm_suld_1d_v4i32_clamp,                  // llvm.nvvm.suld.1d.v4i32.clamp
    nvvm_suld_1d_v4i32_trap,                   // llvm.nvvm.suld.1d.v4i32.trap
    nvvm_suld_1d_v4i32_zero,                   // llvm.nvvm.suld.1d.v4i32.zero
    nvvm_suld_1d_v4i8_clamp,                   // llvm.nvvm.suld.1d.v4i8.clamp
    nvvm_suld_1d_v4i8_trap,                    // llvm.nvvm.suld.1d.v4i8.trap
    nvvm_suld_1d_v4i8_zero,                    // llvm.nvvm.suld.1d.v4i8.zero
    nvvm_suld_2d_array_i16_clamp,              // llvm.nvvm.suld.2d.array.i16.clamp
    nvvm_suld_2d_array_i16_trap,               // llvm.nvvm.suld.2d.array.i16.trap
    nvvm_suld_2d_array_i16_zero,               // llvm.nvvm.suld.2d.array.i16.zero
    nvvm_suld_2d_array_i32_clamp,              // llvm.nvvm.suld.2d.array.i32.clamp
    nvvm_suld_2d_array_i32_trap,               // llvm.nvvm.suld.2d.array.i32.trap
    nvvm_suld_2d_array_i32_zero,               // llvm.nvvm.suld.2d.array.i32.zero
    nvvm_suld_2d_array_i64_clamp,              // llvm.nvvm.suld.2d.array.i64.clamp
    nvvm_suld_2d_array_i64_trap,               // llvm.nvvm.suld.2d.array.i64.trap
    nvvm_suld_2d_array_i64_zero,               // llvm.nvvm.suld.2d.array.i64.zero
    nvvm_suld_2d_array_i8_clamp,               // llvm.nvvm.suld.2d.array.i8.clamp
    nvvm_suld_2d_array_i8_trap,                // llvm.nvvm.suld.2d.array.i8.trap
    nvvm_suld_2d_array_i8_zero,                // llvm.nvvm.suld.2d.array.i8.zero
    nvvm_suld_2d_array_v2i16_clamp,            // llvm.nvvm.suld.2d.array.v2i16.clamp
    nvvm_suld_2d_array_v2i16_trap,             // llvm.nvvm.suld.2d.array.v2i16.trap
    nvvm_suld_2d_array_v2i16_zero,             // llvm.nvvm.suld.2d.array.v2i16.zero
    nvvm_suld_2d_array_v2i32_clamp,            // llvm.nvvm.suld.2d.array.v2i32.clamp
    nvvm_suld_2d_array_v2i32_trap,             // llvm.nvvm.suld.2d.array.v2i32.trap
    nvvm_suld_2d_array_v2i32_zero,             // llvm.nvvm.suld.2d.array.v2i32.zero
    nvvm_suld_2d_array_v2i64_clamp,            // llvm.nvvm.suld.2d.array.v2i64.clamp
    nvvm_suld_2d_array_v2i64_trap,             // llvm.nvvm.suld.2d.array.v2i64.trap
    nvvm_suld_2d_array_v2i64_zero,             // llvm.nvvm.suld.2d.array.v2i64.zero
    nvvm_suld_2d_array_v2i8_clamp,             // llvm.nvvm.suld.2d.array.v2i8.clamp
    nvvm_suld_2d_array_v2i8_trap,              // llvm.nvvm.suld.2d.array.v2i8.trap
    nvvm_suld_2d_array_v2i8_zero,              // llvm.nvvm.suld.2d.array.v2i8.zero
    nvvm_suld_2d_array_v4i16_clamp,            // llvm.nvvm.suld.2d.array.v4i16.clamp
    nvvm_suld_2d_array_v4i16_trap,             // llvm.nvvm.suld.2d.array.v4i16.trap
    nvvm_suld_2d_array_v4i16_zero,             // llvm.nvvm.suld.2d.array.v4i16.zero
    nvvm_suld_2d_array_v4i32_clamp,            // llvm.nvvm.suld.2d.array.v4i32.clamp
    nvvm_suld_2d_array_v4i32_trap,             // llvm.nvvm.suld.2d.array.v4i32.trap
    nvvm_suld_2d_array_v4i32_zero,             // llvm.nvvm.suld.2d.array.v4i32.zero
    nvvm_suld_2d_array_v4i8_clamp,             // llvm.nvvm.suld.2d.array.v4i8.clamp
    nvvm_suld_2d_array_v4i8_trap,              // llvm.nvvm.suld.2d.array.v4i8.trap
    nvvm_suld_2d_array_v4i8_zero,              // llvm.nvvm.suld.2d.array.v4i8.zero
    nvvm_suld_2d_i16_clamp,                    // llvm.nvvm.suld.2d.i16.clamp
    nvvm_suld_2d_i16_trap,                     // llvm.nvvm.suld.2d.i16.trap
    nvvm_suld_2d_i16_zero,                     // llvm.nvvm.suld.2d.i16.zero
    nvvm_suld_2d_i32_clamp,                    // llvm.nvvm.suld.2d.i32.clamp
    nvvm_suld_2d_i32_trap,                     // llvm.nvvm.suld.2d.i32.trap
    nvvm_suld_2d_i32_zero,                     // llvm.nvvm.suld.2d.i32.zero
    nvvm_suld_2d_i64_clamp,                    // llvm.nvvm.suld.2d.i64.clamp
    nvvm_suld_2d_i64_trap,                     // llvm.nvvm.suld.2d.i64.trap
    nvvm_suld_2d_i64_zero,                     // llvm.nvvm.suld.2d.i64.zero
    nvvm_suld_2d_i8_clamp,                     // llvm.nvvm.suld.2d.i8.clamp
    nvvm_suld_2d_i8_trap,                      // llvm.nvvm.suld.2d.i8.trap
    nvvm_suld_2d_i8_zero,                      // llvm.nvvm.suld.2d.i8.zero
    nvvm_suld_2d_v2i16_clamp,                  // llvm.nvvm.suld.2d.v2i16.clamp
    nvvm_suld_2d_v2i16_trap,                   // llvm.nvvm.suld.2d.v2i16.trap
    nvvm_suld_2d_v2i16_zero,                   // llvm.nvvm.suld.2d.v2i16.zero
    nvvm_suld_2d_v2i32_clamp,                  // llvm.nvvm.suld.2d.v2i32.clamp
    nvvm_suld_2d_v2i32_trap,                   // llvm.nvvm.suld.2d.v2i32.trap
    nvvm_suld_2d_v2i32_zero,                   // llvm.nvvm.suld.2d.v2i32.zero
    nvvm_suld_2d_v2i64_clamp,                  // llvm.nvvm.suld.2d.v2i64.clamp
    nvvm_suld_2d_v2i64_trap,                   // llvm.nvvm.suld.2d.v2i64.trap
    nvvm_suld_2d_v2i64_zero,                   // llvm.nvvm.suld.2d.v2i64.zero
    nvvm_suld_2d_v2i8_clamp,                   // llvm.nvvm.suld.2d.v2i8.clamp
    nvvm_suld_2d_v2i8_trap,                    // llvm.nvvm.suld.2d.v2i8.trap
    nvvm_suld_2d_v2i8_zero,                    // llvm.nvvm.suld.2d.v2i8.zero
    nvvm_suld_2d_v4i16_clamp,                  // llvm.nvvm.suld.2d.v4i16.clamp
    nvvm_suld_2d_v4i16_trap,                   // llvm.nvvm.suld.2d.v4i16.trap
    nvvm_suld_2d_v4i16_zero,                   // llvm.nvvm.suld.2d.v4i16.zero
    nvvm_suld_2d_v4i32_clamp,                  // llvm.nvvm.suld.2d.v4i32.clamp
    nvvm_suld_2d_v4i32_trap,                   // llvm.nvvm.suld.2d.v4i32.trap
    nvvm_suld_2d_v4i32_zero,                   // llvm.nvvm.suld.2d.v4i32.zero
    nvvm_suld_2d_v4i8_clamp,                   // llvm.nvvm.suld.2d.v4i8.clamp
    nvvm_suld_2d_v4i8_trap,                    // llvm.nvvm.suld.2d.v4i8.trap
    nvvm_suld_2d_v4i8_zero,                    // llvm.nvvm.suld.2d.v4i8.zero
    nvvm_suld_3d_i16_clamp,                    // llvm.nvvm.suld.3d.i16.clamp
    nvvm_suld_3d_i16_trap,                     // llvm.nvvm.suld.3d.i16.trap
    nvvm_suld_3d_i16_zero,                     // llvm.nvvm.suld.3d.i16.zero
    nvvm_suld_3d_i32_clamp,                    // llvm.nvvm.suld.3d.i32.clamp
    nvvm_suld_3d_i32_trap,                     // llvm.nvvm.suld.3d.i32.trap
    nvvm_suld_3d_i32_zero,                     // llvm.nvvm.suld.3d.i32.zero
    nvvm_suld_3d_i64_clamp,                    // llvm.nvvm.suld.3d.i64.clamp
    nvvm_suld_3d_i64_trap,                     // llvm.nvvm.suld.3d.i64.trap
    nvvm_suld_3d_i64_zero,                     // llvm.nvvm.suld.3d.i64.zero
    nvvm_suld_3d_i8_clamp,                     // llvm.nvvm.suld.3d.i8.clamp
    nvvm_suld_3d_i8_trap,                      // llvm.nvvm.suld.3d.i8.trap
    nvvm_suld_3d_i8_zero,                      // llvm.nvvm.suld.3d.i8.zero
    nvvm_suld_3d_v2i16_clamp,                  // llvm.nvvm.suld.3d.v2i16.clamp
    nvvm_suld_3d_v2i16_trap,                   // llvm.nvvm.suld.3d.v2i16.trap
    nvvm_suld_3d_v2i16_zero,                   // llvm.nvvm.suld.3d.v2i16.zero
    nvvm_suld_3d_v2i32_clamp,                  // llvm.nvvm.suld.3d.v2i32.clamp
    nvvm_suld_3d_v2i32_trap,                   // llvm.nvvm.suld.3d.v2i32.trap
    nvvm_suld_3d_v2i32_zero,                   // llvm.nvvm.suld.3d.v2i32.zero
    nvvm_suld_3d_v2i64_clamp,                  // llvm.nvvm.suld.3d.v2i64.clamp
    nvvm_suld_3d_v2i64_trap,                   // llvm.nvvm.suld.3d.v2i64.trap
    nvvm_suld_3d_v2i64_zero,                   // llvm.nvvm.suld.3d.v2i64.zero
    nvvm_suld_3d_v2i8_clamp,                   // llvm.nvvm.suld.3d.v2i8.clamp
    nvvm_suld_3d_v2i8_trap,                    // llvm.nvvm.suld.3d.v2i8.trap
    nvvm_suld_3d_v2i8_zero,                    // llvm.nvvm.suld.3d.v2i8.zero
    nvvm_suld_3d_v4i16_clamp,                  // llvm.nvvm.suld.3d.v4i16.clamp
    nvvm_suld_3d_v4i16_trap,                   // llvm.nvvm.suld.3d.v4i16.trap
    nvvm_suld_3d_v4i16_zero,                   // llvm.nvvm.suld.3d.v4i16.zero
    nvvm_suld_3d_v4i32_clamp,                  // llvm.nvvm.suld.3d.v4i32.clamp
    nvvm_suld_3d_v4i32_trap,                   // llvm.nvvm.suld.3d.v4i32.trap
    nvvm_suld_3d_v4i32_zero,                   // llvm.nvvm.suld.3d.v4i32.zero
    nvvm_suld_3d_v4i8_clamp,                   // llvm.nvvm.suld.3d.v4i8.clamp
    nvvm_suld_3d_v4i8_trap,                    // llvm.nvvm.suld.3d.v4i8.trap
    nvvm_suld_3d_v4i8_zero,                    // llvm.nvvm.suld.3d.v4i8.zero
    nvvm_suq_array_size,                       // llvm.nvvm.suq.array.size
    nvvm_suq_channel_data_type,                // llvm.nvvm.suq.channel.data.type
    nvvm_suq_channel_order,                    // llvm.nvvm.suq.channel.order
    nvvm_suq_depth,                            // llvm.nvvm.suq.depth
    nvvm_suq_height,                           // llvm.nvvm.suq.height
    nvvm_suq_width,                            // llvm.nvvm.suq.width
    nvvm_sust_b_1d_array_i16_clamp,            // llvm.nvvm.sust.b.1d.array.i16.clamp
    nvvm_sust_b_1d_array_i16_trap,             // llvm.nvvm.sust.b.1d.array.i16.trap
    nvvm_sust_b_1d_array_i16_zero,             // llvm.nvvm.sust.b.1d.array.i16.zero
    nvvm_sust_b_1d_array_i32_clamp,            // llvm.nvvm.sust.b.1d.array.i32.clamp
    nvvm_sust_b_1d_array_i32_trap,             // llvm.nvvm.sust.b.1d.array.i32.trap
    nvvm_sust_b_1d_array_i32_zero,             // llvm.nvvm.sust.b.1d.array.i32.zero
    nvvm_sust_b_1d_array_i64_clamp,            // llvm.nvvm.sust.b.1d.array.i64.clamp
    nvvm_sust_b_1d_array_i64_trap,             // llvm.nvvm.sust.b.1d.array.i64.trap
    nvvm_sust_b_1d_array_i64_zero,             // llvm.nvvm.sust.b.1d.array.i64.zero
    nvvm_sust_b_1d_array_i8_clamp,             // llvm.nvvm.sust.b.1d.array.i8.clamp
    nvvm_sust_b_1d_array_i8_trap,              // llvm.nvvm.sust.b.1d.array.i8.trap
    nvvm_sust_b_1d_array_i8_zero,              // llvm.nvvm.sust.b.1d.array.i8.zero
    nvvm_sust_b_1d_array_v2i16_clamp,          // llvm.nvvm.sust.b.1d.array.v2i16.clamp
    nvvm_sust_b_1d_array_v2i16_trap,           // llvm.nvvm.sust.b.1d.array.v2i16.trap
    nvvm_sust_b_1d_array_v2i16_zero,           // llvm.nvvm.sust.b.1d.array.v2i16.zero
    nvvm_sust_b_1d_array_v2i32_clamp,          // llvm.nvvm.sust.b.1d.array.v2i32.clamp
    nvvm_sust_b_1d_array_v2i32_trap,           // llvm.nvvm.sust.b.1d.array.v2i32.trap
    nvvm_sust_b_1d_array_v2i32_zero,           // llvm.nvvm.sust.b.1d.array.v2i32.zero
    nvvm_sust_b_1d_array_v2i64_clamp,          // llvm.nvvm.sust.b.1d.array.v2i64.clamp
    nvvm_sust_b_1d_array_v2i64_trap,           // llvm.nvvm.sust.b.1d.array.v2i64.trap
    nvvm_sust_b_1d_array_v2i64_zero,           // llvm.nvvm.sust.b.1d.array.v2i64.zero
    nvvm_sust_b_1d_array_v2i8_clamp,           // llvm.nvvm.sust.b.1d.array.v2i8.clamp
    nvvm_sust_b_1d_array_v2i8_trap,            // llvm.nvvm.sust.b.1d.array.v2i8.trap
    nvvm_sust_b_1d_array_v2i8_zero,            // llvm.nvvm.sust.b.1d.array.v2i8.zero
    nvvm_sust_b_1d_array_v4i16_clamp,          // llvm.nvvm.sust.b.1d.array.v4i16.clamp
    nvvm_sust_b_1d_array_v4i16_trap,           // llvm.nvvm.sust.b.1d.array.v4i16.trap
    nvvm_sust_b_1d_array_v4i16_zero,           // llvm.nvvm.sust.b.1d.array.v4i16.zero
    nvvm_sust_b_1d_array_v4i32_clamp,          // llvm.nvvm.sust.b.1d.array.v4i32.clamp
    nvvm_sust_b_1d_array_v4i32_trap,           // llvm.nvvm.sust.b.1d.array.v4i32.trap
    nvvm_sust_b_1d_array_v4i32_zero,           // llvm.nvvm.sust.b.1d.array.v4i32.zero
    nvvm_sust_b_1d_array_v4i8_clamp,           // llvm.nvvm.sust.b.1d.array.v4i8.clamp
    nvvm_sust_b_1d_array_v4i8_trap,            // llvm.nvvm.sust.b.1d.array.v4i8.trap
    nvvm_sust_b_1d_array_v4i8_zero,            // llvm.nvvm.sust.b.1d.array.v4i8.zero
    nvvm_sust_b_1d_i16_clamp,                  // llvm.nvvm.sust.b.1d.i16.clamp
    nvvm_sust_b_1d_i16_trap,                   // llvm.nvvm.sust.b.1d.i16.trap
    nvvm_sust_b_1d_i16_zero,                   // llvm.nvvm.sust.b.1d.i16.zero
    nvvm_sust_b_1d_i32_clamp,                  // llvm.nvvm.sust.b.1d.i32.clamp
    nvvm_sust_b_1d_i32_trap,                   // llvm.nvvm.sust.b.1d.i32.trap
    nvvm_sust_b_1d_i32_zero,                   // llvm.nvvm.sust.b.1d.i32.zero
    nvvm_sust_b_1d_i64_clamp,                  // llvm.nvvm.sust.b.1d.i64.clamp
    nvvm_sust_b_1d_i64_trap,                   // llvm.nvvm.sust.b.1d.i64.trap
    nvvm_sust_b_1d_i64_zero,                   // llvm.nvvm.sust.b.1d.i64.zero
    nvvm_sust_b_1d_i8_clamp,                   // llvm.nvvm.sust.b.1d.i8.clamp
    nvvm_sust_b_1d_i8_trap,                    // llvm.nvvm.sust.b.1d.i8.trap
    nvvm_sust_b_1d_i8_zero,                    // llvm.nvvm.sust.b.1d.i8.zero
    nvvm_sust_b_1d_v2i16_clamp,                // llvm.nvvm.sust.b.1d.v2i16.clamp
    nvvm_sust_b_1d_v2i16_trap,                 // llvm.nvvm.sust.b.1d.v2i16.trap
    nvvm_sust_b_1d_v2i16_zero,                 // llvm.nvvm.sust.b.1d.v2i16.zero
    nvvm_sust_b_1d_v2i32_clamp,                // llvm.nvvm.sust.b.1d.v2i32.clamp
    nvvm_sust_b_1d_v2i32_trap,                 // llvm.nvvm.sust.b.1d.v2i32.trap
    nvvm_sust_b_1d_v2i32_zero,                 // llvm.nvvm.sust.b.1d.v2i32.zero
    nvvm_sust_b_1d_v2i64_clamp,                // llvm.nvvm.sust.b.1d.v2i64.clamp
    nvvm_sust_b_1d_v2i64_trap,                 // llvm.nvvm.sust.b.1d.v2i64.trap
    nvvm_sust_b_1d_v2i64_zero,                 // llvm.nvvm.sust.b.1d.v2i64.zero
    nvvm_sust_b_1d_v2i8_clamp,                 // llvm.nvvm.sust.b.1d.v2i8.clamp
    nvvm_sust_b_1d_v2i8_trap,                  // llvm.nvvm.sust.b.1d.v2i8.trap
    nvvm_sust_b_1d_v2i8_zero,                  // llvm.nvvm.sust.b.1d.v2i8.zero
    nvvm_sust_b_1d_v4i16_clamp,                // llvm.nvvm.sust.b.1d.v4i16.clamp
    nvvm_sust_b_1d_v4i16_trap,                 // llvm.nvvm.sust.b.1d.v4i16.trap
    nvvm_sust_b_1d_v4i16_zero,                 // llvm.nvvm.sust.b.1d.v4i16.zero
    nvvm_sust_b_1d_v4i32_clamp,                // llvm.nvvm.sust.b.1d.v4i32.clamp
    nvvm_sust_b_1d_v4i32_trap,                 // llvm.nvvm.sust.b.1d.v4i32.trap
    nvvm_sust_b_1d_v4i32_zero,                 // llvm.nvvm.sust.b.1d.v4i32.zero
    nvvm_sust_b_1d_v4i8_clamp,                 // llvm.nvvm.sust.b.1d.v4i8.clamp
    nvvm_sust_b_1d_v4i8_trap,                  // llvm.nvvm.sust.b.1d.v4i8.trap
    nvvm_sust_b_1d_v4i8_zero,                  // llvm.nvvm.sust.b.1d.v4i8.zero
    nvvm_sust_b_2d_array_i16_clamp,            // llvm.nvvm.sust.b.2d.array.i16.clamp
    nvvm_sust_b_2d_array_i16_trap,             // llvm.nvvm.sust.b.2d.array.i16.trap
    nvvm_sust_b_2d_array_i16_zero,             // llvm.nvvm.sust.b.2d.array.i16.zero
    nvvm_sust_b_2d_array_i32_clamp,            // llvm.nvvm.sust.b.2d.array.i32.clamp
    nvvm_sust_b_2d_array_i32_trap,             // llvm.nvvm.sust.b.2d.array.i32.trap
    nvvm_sust_b_2d_array_i32_zero,             // llvm.nvvm.sust.b.2d.array.i32.zero
    nvvm_sust_b_2d_array_i64_clamp,            // llvm.nvvm.sust.b.2d.array.i64.clamp
    nvvm_sust_b_2d_array_i64_trap,             // llvm.nvvm.sust.b.2d.array.i64.trap
    nvvm_sust_b_2d_array_i64_zero,             // llvm.nvvm.sust.b.2d.array.i64.zero
    nvvm_sust_b_2d_array_i8_clamp,             // llvm.nvvm.sust.b.2d.array.i8.clamp
    nvvm_sust_b_2d_array_i8_trap,              // llvm.nvvm.sust.b.2d.array.i8.trap
    nvvm_sust_b_2d_array_i8_zero,              // llvm.nvvm.sust.b.2d.array.i8.zero
    nvvm_sust_b_2d_array_v2i16_clamp,          // llvm.nvvm.sust.b.2d.array.v2i16.clamp
    nvvm_sust_b_2d_array_v2i16_trap,           // llvm.nvvm.sust.b.2d.array.v2i16.trap
    nvvm_sust_b_2d_array_v2i16_zero,           // llvm.nvvm.sust.b.2d.array.v2i16.zero
    nvvm_sust_b_2d_array_v2i32_clamp,          // llvm.nvvm.sust.b.2d.array.v2i32.clamp
    nvvm_sust_b_2d_array_v2i32_trap,           // llvm.nvvm.sust.b.2d.array.v2i32.trap
    nvvm_sust_b_2d_array_v2i32_zero,           // llvm.nvvm.sust.b.2d.array.v2i32.zero
    nvvm_sust_b_2d_array_v2i64_clamp,          // llvm.nvvm.sust.b.2d.array.v2i64.clamp
    nvvm_sust_b_2d_array_v2i64_trap,           // llvm.nvvm.sust.b.2d.array.v2i64.trap
    nvvm_sust_b_2d_array_v2i64_zero,           // llvm.nvvm.sust.b.2d.array.v2i64.zero
    nvvm_sust_b_2d_array_v2i8_clamp,           // llvm.nvvm.sust.b.2d.array.v2i8.clamp
    nvvm_sust_b_2d_array_v2i8_trap,            // llvm.nvvm.sust.b.2d.array.v2i8.trap
    nvvm_sust_b_2d_array_v2i8_zero,            // llvm.nvvm.sust.b.2d.array.v2i8.zero
    nvvm_sust_b_2d_array_v4i16_clamp,          // llvm.nvvm.sust.b.2d.array.v4i16.clamp
    nvvm_sust_b_2d_array_v4i16_trap,           // llvm.nvvm.sust.b.2d.array.v4i16.trap
    nvvm_sust_b_2d_array_v4i16_zero,           // llvm.nvvm.sust.b.2d.array.v4i16.zero
    nvvm_sust_b_2d_array_v4i32_clamp,          // llvm.nvvm.sust.b.2d.array.v4i32.clamp
    nvvm_sust_b_2d_array_v4i32_trap,           // llvm.nvvm.sust.b.2d.array.v4i32.trap
    nvvm_sust_b_2d_array_v4i32_zero,           // llvm.nvvm.sust.b.2d.array.v4i32.zero
    nvvm_sust_b_2d_array_v4i8_clamp,           // llvm.nvvm.sust.b.2d.array.v4i8.clamp
    nvvm_sust_b_2d_array_v4i8_trap,            // llvm.nvvm.sust.b.2d.array.v4i8.trap
    nvvm_sust_b_2d_array_v4i8_zero,            // llvm.nvvm.sust.b.2d.array.v4i8.zero
    nvvm_sust_b_2d_i16_clamp,                  // llvm.nvvm.sust.b.2d.i16.clamp
    nvvm_sust_b_2d_i16_trap,                   // llvm.nvvm.sust.b.2d.i16.trap
    nvvm_sust_b_2d_i16_zero,                   // llvm.nvvm.sust.b.2d.i16.zero
    nvvm_sust_b_2d_i32_clamp,                  // llvm.nvvm.sust.b.2d.i32.clamp
    nvvm_sust_b_2d_i32_trap,                   // llvm.nvvm.sust.b.2d.i32.trap
    nvvm_sust_b_2d_i32_zero,                   // llvm.nvvm.sust.b.2d.i32.zero
    nvvm_sust_b_2d_i64_clamp,                  // llvm.nvvm.sust.b.2d.i64.clamp
    nvvm_sust_b_2d_i64_trap,                   // llvm.nvvm.sust.b.2d.i64.trap
    nvvm_sust_b_2d_i64_zero,                   // llvm.nvvm.sust.b.2d.i64.zero
    nvvm_sust_b_2d_i8_clamp,                   // llvm.nvvm.sust.b.2d.i8.clamp
    nvvm_sust_b_2d_i8_trap,                    // llvm.nvvm.sust.b.2d.i8.trap
    nvvm_sust_b_2d_i8_zero,                    // llvm.nvvm.sust.b.2d.i8.zero
    nvvm_sust_b_2d_v2i16_clamp,                // llvm.nvvm.sust.b.2d.v2i16.clamp
    nvvm_sust_b_2d_v2i16_trap,                 // llvm.nvvm.sust.b.2d.v2i16.trap
    nvvm_sust_b_2d_v2i16_zero,                 // llvm.nvvm.sust.b.2d.v2i16.zero
    nvvm_sust_b_2d_v2i32_clamp,                // llvm.nvvm.sust.b.2d.v2i32.clamp
    nvvm_sust_b_2d_v2i32_trap,                 // llvm.nvvm.sust.b.2d.v2i32.trap
    nvvm_sust_b_2d_v2i32_zero,                 // llvm.nvvm.sust.b.2d.v2i32.zero
    nvvm_sust_b_2d_v2i64_clamp,                // llvm.nvvm.sust.b.2d.v2i64.clamp
    nvvm_sust_b_2d_v2i64_trap,                 // llvm.nvvm.sust.b.2d.v2i64.trap
    nvvm_sust_b_2d_v2i64_zero,                 // llvm.nvvm.sust.b.2d.v2i64.zero
    nvvm_sust_b_2d_v2i8_clamp,                 // llvm.nvvm.sust.b.2d.v2i8.clamp
    nvvm_sust_b_2d_v2i8_trap,                  // llvm.nvvm.sust.b.2d.v2i8.trap
    nvvm_sust_b_2d_v2i8_zero,                  // llvm.nvvm.sust.b.2d.v2i8.zero
    nvvm_sust_b_2d_v4i16_clamp,                // llvm.nvvm.sust.b.2d.v4i16.clamp
    nvvm_sust_b_2d_v4i16_trap,                 // llvm.nvvm.sust.b.2d.v4i16.trap
    nvvm_sust_b_2d_v4i16_zero,                 // llvm.nvvm.sust.b.2d.v4i16.zero
    nvvm_sust_b_2d_v4i32_clamp,                // llvm.nvvm.sust.b.2d.v4i32.clamp
    nvvm_sust_b_2d_v4i32_trap,                 // llvm.nvvm.sust.b.2d.v4i32.trap
    nvvm_sust_b_2d_v4i32_zero,                 // llvm.nvvm.sust.b.2d.v4i32.zero
    nvvm_sust_b_2d_v4i8_clamp,                 // llvm.nvvm.sust.b.2d.v4i8.clamp
    nvvm_sust_b_2d_v4i8_trap,                  // llvm.nvvm.sust.b.2d.v4i8.trap
    nvvm_sust_b_2d_v4i8_zero,                  // llvm.nvvm.sust.b.2d.v4i8.zero
    nvvm_sust_b_3d_i16_clamp,                  // llvm.nvvm.sust.b.3d.i16.clamp
    nvvm_sust_b_3d_i16_trap,                   // llvm.nvvm.sust.b.3d.i16.trap
    nvvm_sust_b_3d_i16_zero,                   // llvm.nvvm.sust.b.3d.i16.zero
    nvvm_sust_b_3d_i32_clamp,                  // llvm.nvvm.sust.b.3d.i32.clamp
    nvvm_sust_b_3d_i32_trap,                   // llvm.nvvm.sust.b.3d.i32.trap
    nvvm_sust_b_3d_i32_zero,                   // llvm.nvvm.sust.b.3d.i32.zero
    nvvm_sust_b_3d_i64_clamp,                  // llvm.nvvm.sust.b.3d.i64.clamp
    nvvm_sust_b_3d_i64_trap,                   // llvm.nvvm.sust.b.3d.i64.trap
    nvvm_sust_b_3d_i64_zero,                   // llvm.nvvm.sust.b.3d.i64.zero
    nvvm_sust_b_3d_i8_clamp,                   // llvm.nvvm.sust.b.3d.i8.clamp
    nvvm_sust_b_3d_i8_trap,                    // llvm.nvvm.sust.b.3d.i8.trap
    nvvm_sust_b_3d_i8_zero,                    // llvm.nvvm.sust.b.3d.i8.zero
    nvvm_sust_b_3d_v2i16_clamp,                // llvm.nvvm.sust.b.3d.v2i16.clamp
    nvvm_sust_b_3d_v2i16_trap,                 // llvm.nvvm.sust.b.3d.v2i16.trap
    nvvm_sust_b_3d_v2i16_zero,                 // llvm.nvvm.sust.b.3d.v2i16.zero
    nvvm_sust_b_3d_v2i32_clamp,                // llvm.nvvm.sust.b.3d.v2i32.clamp
    nvvm_sust_b_3d_v2i32_trap,                 // llvm.nvvm.sust.b.3d.v2i32.trap
    nvvm_sust_b_3d_v2i32_zero,                 // llvm.nvvm.sust.b.3d.v2i32.zero
    nvvm_sust_b_3d_v2i64_clamp,                // llvm.nvvm.sust.b.3d.v2i64.clamp
    nvvm_sust_b_3d_v2i64_trap,                 // llvm.nvvm.sust.b.3d.v2i64.trap
    nvvm_sust_b_3d_v2i64_zero,                 // llvm.nvvm.sust.b.3d.v2i64.zero
    nvvm_sust_b_3d_v2i8_clamp,                 // llvm.nvvm.sust.b.3d.v2i8.clamp
    nvvm_sust_b_3d_v2i8_trap,                  // llvm.nvvm.sust.b.3d.v2i8.trap
    nvvm_sust_b_3d_v2i8_zero,                  // llvm.nvvm.sust.b.3d.v2i8.zero
    nvvm_sust_b_3d_v4i16_clamp,                // llvm.nvvm.sust.b.3d.v4i16.clamp
    nvvm_sust_b_3d_v4i16_trap,                 // llvm.nvvm.sust.b.3d.v4i16.trap
    nvvm_sust_b_3d_v4i16_zero,                 // llvm.nvvm.sust.b.3d.v4i16.zero
    nvvm_sust_b_3d_v4i32_clamp,                // llvm.nvvm.sust.b.3d.v4i32.clamp
    nvvm_sust_b_3d_v4i32_trap,                 // llvm.nvvm.sust.b.3d.v4i32.trap
    nvvm_sust_b_3d_v4i32_zero,                 // llvm.nvvm.sust.b.3d.v4i32.zero
    nvvm_sust_b_3d_v4i8_clamp,                 // llvm.nvvm.sust.b.3d.v4i8.clamp
    nvvm_sust_b_3d_v4i8_trap,                  // llvm.nvvm.sust.b.3d.v4i8.trap
    nvvm_sust_b_3d_v4i8_zero,                  // llvm.nvvm.sust.b.3d.v4i8.zero
    nvvm_sust_p_1d_array_i16_trap,             // llvm.nvvm.sust.p.1d.array.i16.trap
    nvvm_sust_p_1d_array_i32_trap,             // llvm.nvvm.sust.p.1d.array.i32.trap
    nvvm_sust_p_1d_array_i8_trap,              // llvm.nvvm.sust.p.1d.array.i8.trap
    nvvm_sust_p_1d_array_v2i16_trap,           // llvm.nvvm.sust.p.1d.array.v2i16.trap
    nvvm_sust_p_1d_array_v2i32_trap,           // llvm.nvvm.sust.p.1d.array.v2i32.trap
    nvvm_sust_p_1d_array_v2i8_trap,            // llvm.nvvm.sust.p.1d.array.v2i8.trap
    nvvm_sust_p_1d_array_v4i16_trap,           // llvm.nvvm.sust.p.1d.array.v4i16.trap
    nvvm_sust_p_1d_array_v4i32_trap,           // llvm.nvvm.sust.p.1d.array.v4i32.trap
    nvvm_sust_p_1d_array_v4i8_trap,            // llvm.nvvm.sust.p.1d.array.v4i8.trap
    nvvm_sust_p_1d_i16_trap,                   // llvm.nvvm.sust.p.1d.i16.trap
    nvvm_sust_p_1d_i32_trap,                   // llvm.nvvm.sust.p.1d.i32.trap
    nvvm_sust_p_1d_i8_trap,                    // llvm.nvvm.sust.p.1d.i8.trap
    nvvm_sust_p_1d_v2i16_trap,                 // llvm.nvvm.sust.p.1d.v2i16.trap
    nvvm_sust_p_1d_v2i32_trap,                 // llvm.nvvm.sust.p.1d.v2i32.trap
    nvvm_sust_p_1d_v2i8_trap,                  // llvm.nvvm.sust.p.1d.v2i8.trap
    nvvm_sust_p_1d_v4i16_trap,                 // llvm.nvvm.sust.p.1d.v4i16.trap
    nvvm_sust_p_1d_v4i32_trap,                 // llvm.nvvm.sust.p.1d.v4i32.trap
    nvvm_sust_p_1d_v4i8_trap,                  // llvm.nvvm.sust.p.1d.v4i8.trap
    nvvm_sust_p_2d_array_i16_trap,             // llvm.nvvm.sust.p.2d.array.i16.trap
    nvvm_sust_p_2d_array_i32_trap,             // llvm.nvvm.sust.p.2d.array.i32.trap
    nvvm_sust_p_2d_array_i8_trap,              // llvm.nvvm.sust.p.2d.array.i8.trap
    nvvm_sust_p_2d_array_v2i16_trap,           // llvm.nvvm.sust.p.2d.array.v2i16.trap
    nvvm_sust_p_2d_array_v2i32_trap,           // llvm.nvvm.sust.p.2d.array.v2i32.trap
    nvvm_sust_p_2d_array_v2i8_trap,            // llvm.nvvm.sust.p.2d.array.v2i8.trap
    nvvm_sust_p_2d_array_v4i16_trap,           // llvm.nvvm.sust.p.2d.array.v4i16.trap
    nvvm_sust_p_2d_array_v4i32_trap,           // llvm.nvvm.sust.p.2d.array.v4i32.trap
    nvvm_sust_p_2d_array_v4i8_trap,            // llvm.nvvm.sust.p.2d.array.v4i8.trap
    nvvm_sust_p_2d_i16_trap,                   // llvm.nvvm.sust.p.2d.i16.trap
    nvvm_sust_p_2d_i32_trap,                   // llvm.nvvm.sust.p.2d.i32.trap
    nvvm_sust_p_2d_i8_trap,                    // llvm.nvvm.sust.p.2d.i8.trap
    nvvm_sust_p_2d_v2i16_trap,                 // llvm.nvvm.sust.p.2d.v2i16.trap
    nvvm_sust_p_2d_v2i32_trap,                 // llvm.nvvm.sust.p.2d.v2i32.trap
    nvvm_sust_p_2d_v2i8_trap,                  // llvm.nvvm.sust.p.2d.v2i8.trap
    nvvm_sust_p_2d_v4i16_trap,                 // llvm.nvvm.sust.p.2d.v4i16.trap
    nvvm_sust_p_2d_v4i32_trap,                 // llvm.nvvm.sust.p.2d.v4i32.trap
    nvvm_sust_p_2d_v4i8_trap,                  // llvm.nvvm.sust.p.2d.v4i8.trap
    nvvm_sust_p_3d_i16_trap,                   // llvm.nvvm.sust.p.3d.i16.trap
    nvvm_sust_p_3d_i32_trap,                   // llvm.nvvm.sust.p.3d.i32.trap
    nvvm_sust_p_3d_i8_trap,                    // llvm.nvvm.sust.p.3d.i8.trap
    nvvm_sust_p_3d_v2i16_trap,                 // llvm.nvvm.sust.p.3d.v2i16.trap
    nvvm_sust_p_3d_v2i32_trap,                 // llvm.nvvm.sust.p.3d.v2i32.trap
    nvvm_sust_p_3d_v2i8_trap,                  // llvm.nvvm.sust.p.3d.v2i8.trap
    nvvm_sust_p_3d_v4i16_trap,                 // llvm.nvvm.sust.p.3d.v4i16.trap
    nvvm_sust_p_3d_v4i32_trap,                 // llvm.nvvm.sust.p.3d.v4i32.trap
    nvvm_sust_p_3d_v4i8_trap,                  // llvm.nvvm.sust.p.3d.v4i8.trap
    nvvm_swap_lo_hi_b64,                       // llvm.nvvm.swap.lo.hi.b64
    nvvm_tex_1d_array_grad_v4f32_f32,          // llvm.nvvm.tex.1d.array.grad.v4f32.f32
    nvvm_tex_1d_array_grad_v4s32_f32,          // llvm.nvvm.tex.1d.array.grad.v4s32.f32
    nvvm_tex_1d_array_grad_v4u32_f32,          // llvm.nvvm.tex.1d.array.grad.v4u32.f32
    nvvm_tex_1d_array_level_v4f32_f32,         // llvm.nvvm.tex.1d.array.level.v4f32.f32
    nvvm_tex_1d_array_level_v4s32_f32,         // llvm.nvvm.tex.1d.array.level.v4s32.f32
    nvvm_tex_1d_array_level_v4u32_f32,         // llvm.nvvm.tex.1d.array.level.v4u32.f32
    nvvm_tex_1d_array_v4f32_f32,               // llvm.nvvm.tex.1d.array.v4f32.f32
    nvvm_tex_1d_array_v4f32_s32,               // llvm.nvvm.tex.1d.array.v4f32.s32
    nvvm_tex_1d_array_v4s32_f32,               // llvm.nvvm.tex.1d.array.v4s32.f32
    nvvm_tex_1d_array_v4s32_s32,               // llvm.nvvm.tex.1d.array.v4s32.s32
    nvvm_tex_1d_array_v4u32_f32,               // llvm.nvvm.tex.1d.array.v4u32.f32
    nvvm_tex_1d_array_v4u32_s32,               // llvm.nvvm.tex.1d.array.v4u32.s32
    nvvm_tex_1d_grad_v4f32_f32,                // llvm.nvvm.tex.1d.grad.v4f32.f32
    nvvm_tex_1d_grad_v4s32_f32,                // llvm.nvvm.tex.1d.grad.v4s32.f32
    nvvm_tex_1d_grad_v4u32_f32,                // llvm.nvvm.tex.1d.grad.v4u32.f32
    nvvm_tex_1d_level_v4f32_f32,               // llvm.nvvm.tex.1d.level.v4f32.f32
    nvvm_tex_1d_level_v4s32_f32,               // llvm.nvvm.tex.1d.level.v4s32.f32
    nvvm_tex_1d_level_v4u32_f32,               // llvm.nvvm.tex.1d.level.v4u32.f32
    nvvm_tex_1d_v4f32_f32,                     // llvm.nvvm.tex.1d.v4f32.f32
    nvvm_tex_1d_v4f32_s32,                     // llvm.nvvm.tex.1d.v4f32.s32
    nvvm_tex_1d_v4s32_f32,                     // llvm.nvvm.tex.1d.v4s32.f32
    nvvm_tex_1d_v4s32_s32,                     // llvm.nvvm.tex.1d.v4s32.s32
    nvvm_tex_1d_v4u32_f32,                     // llvm.nvvm.tex.1d.v4u32.f32
    nvvm_tex_1d_v4u32_s32,                     // llvm.nvvm.tex.1d.v4u32.s32
    nvvm_tex_2d_array_grad_v4f32_f32,          // llvm.nvvm.tex.2d.array.grad.v4f32.f32
    nvvm_tex_2d_array_grad_v4s32_f32,          // llvm.nvvm.tex.2d.array.grad.v4s32.f32
    nvvm_tex_2d_array_grad_v4u32_f32,          // llvm.nvvm.tex.2d.array.grad.v4u32.f32
    nvvm_tex_2d_array_level_v4f32_f32,         // llvm.nvvm.tex.2d.array.level.v4f32.f32
    nvvm_tex_2d_array_level_v4s32_f32,         // llvm.nvvm.tex.2d.array.level.v4s32.f32
    nvvm_tex_2d_array_level_v4u32_f32,         // llvm.nvvm.tex.2d.array.level.v4u32.f32
    nvvm_tex_2d_array_v4f32_f32,               // llvm.nvvm.tex.2d.array.v4f32.f32
    nvvm_tex_2d_array_v4f32_s32,               // llvm.nvvm.tex.2d.array.v4f32.s32
    nvvm_tex_2d_array_v4s32_f32,               // llvm.nvvm.tex.2d.array.v4s32.f32
    nvvm_tex_2d_array_v4s32_s32,               // llvm.nvvm.tex.2d.array.v4s32.s32
    nvvm_tex_2d_array_v4u32_f32,               // llvm.nvvm.tex.2d.array.v4u32.f32
    nvvm_tex_2d_array_v4u32_s32,               // llvm.nvvm.tex.2d.array.v4u32.s32
    nvvm_tex_2d_grad_v4f32_f32,                // llvm.nvvm.tex.2d.grad.v4f32.f32
    nvvm_tex_2d_grad_v4s32_f32,                // llvm.nvvm.tex.2d.grad.v4s32.f32
    nvvm_tex_2d_grad_v4u32_f32,                // llvm.nvvm.tex.2d.grad.v4u32.f32
    nvvm_tex_2d_level_v4f32_f32,               // llvm.nvvm.tex.2d.level.v4f32.f32
    nvvm_tex_2d_level_v4s32_f32,               // llvm.nvvm.tex.2d.level.v4s32.f32
    nvvm_tex_2d_level_v4u32_f32,               // llvm.nvvm.tex.2d.level.v4u32.f32
    nvvm_tex_2d_v4f32_f32,                     // llvm.nvvm.tex.2d.v4f32.f32
    nvvm_tex_2d_v4f32_s32,                     // llvm.nvvm.tex.2d.v4f32.s32
    nvvm_tex_2d_v4s32_f32,                     // llvm.nvvm.tex.2d.v4s32.f32
    nvvm_tex_2d_v4s32_s32,                     // llvm.nvvm.tex.2d.v4s32.s32
    nvvm_tex_2d_v4u32_f32,                     // llvm.nvvm.tex.2d.v4u32.f32
    nvvm_tex_2d_v4u32_s32,                     // llvm.nvvm.tex.2d.v4u32.s32
    nvvm_tex_3d_grad_v4f32_f32,                // llvm.nvvm.tex.3d.grad.v4f32.f32
    nvvm_tex_3d_grad_v4s32_f32,                // llvm.nvvm.tex.3d.grad.v4s32.f32
    nvvm_tex_3d_grad_v4u32_f32,                // llvm.nvvm.tex.3d.grad.v4u32.f32
    nvvm_tex_3d_level_v4f32_f32,               // llvm.nvvm.tex.3d.level.v4f32.f32
    nvvm_tex_3d_level_v4s32_f32,               // llvm.nvvm.tex.3d.level.v4s32.f32
    nvvm_tex_3d_level_v4u32_f32,               // llvm.nvvm.tex.3d.level.v4u32.f32
    nvvm_tex_3d_v4f32_f32,                     // llvm.nvvm.tex.3d.v4f32.f32
    nvvm_tex_3d_v4f32_s32,                     // llvm.nvvm.tex.3d.v4f32.s32
    nvvm_tex_3d_v4s32_f32,                     // llvm.nvvm.tex.3d.v4s32.f32
    nvvm_tex_3d_v4s32_s32,                     // llvm.nvvm.tex.3d.v4s32.s32
    nvvm_tex_3d_v4u32_f32,                     // llvm.nvvm.tex.3d.v4u32.f32
    nvvm_tex_3d_v4u32_s32,                     // llvm.nvvm.tex.3d.v4u32.s32
    nvvm_tex_cube_array_level_v4f32_f32,       // llvm.nvvm.tex.cube.array.level.v4f32.f32
    nvvm_tex_cube_array_level_v4s32_f32,       // llvm.nvvm.tex.cube.array.level.v4s32.f32
    nvvm_tex_cube_array_level_v4u32_f32,       // llvm.nvvm.tex.cube.array.level.v4u32.f32
    nvvm_tex_cube_array_v4f32_f32,             // llvm.nvvm.tex.cube.array.v4f32.f32
    nvvm_tex_cube_array_v4s32_f32,             // llvm.nvvm.tex.cube.array.v4s32.f32
    nvvm_tex_cube_array_v4u32_f32,             // llvm.nvvm.tex.cube.array.v4u32.f32
    nvvm_tex_cube_level_v4f32_f32,             // llvm.nvvm.tex.cube.level.v4f32.f32
    nvvm_tex_cube_level_v4s32_f32,             // llvm.nvvm.tex.cube.level.v4s32.f32
    nvvm_tex_cube_level_v4u32_f32,             // llvm.nvvm.tex.cube.level.v4u32.f32
    nvvm_tex_cube_v4f32_f32,                   // llvm.nvvm.tex.cube.v4f32.f32
    nvvm_tex_cube_v4s32_f32,                   // llvm.nvvm.tex.cube.v4s32.f32
    nvvm_tex_cube_v4u32_f32,                   // llvm.nvvm.tex.cube.v4u32.f32
    nvvm_tex_unified_1d_array_grad_v4f32_f32,  // llvm.nvvm.tex.unified.1d.array.grad.v4f32.f32
    nvvm_tex_unified_1d_array_grad_v4s32_f32,  // llvm.nvvm.tex.unified.1d.array.grad.v4s32.f32
    nvvm_tex_unified_1d_array_grad_v4u32_f32,  // llvm.nvvm.tex.unified.1d.array.grad.v4u32.f32
    nvvm_tex_unified_1d_array_level_v4f32_f32,  // llvm.nvvm.tex.unified.1d.array.level.v4f32.f32
    nvvm_tex_unified_1d_array_level_v4s32_f32,  // llvm.nvvm.tex.unified.1d.array.level.v4s32.f32
    nvvm_tex_unified_1d_array_level_v4u32_f32,  // llvm.nvvm.tex.unified.1d.array.level.v4u32.f32
    nvvm_tex_unified_1d_array_v4f32_f32,       // llvm.nvvm.tex.unified.1d.array.v4f32.f32
    nvvm_tex_unified_1d_array_v4f32_s32,       // llvm.nvvm.tex.unified.1d.array.v4f32.s32
    nvvm_tex_unified_1d_array_v4s32_f32,       // llvm.nvvm.tex.unified.1d.array.v4s32.f32
    nvvm_tex_unified_1d_array_v4s32_s32,       // llvm.nvvm.tex.unified.1d.array.v4s32.s32
    nvvm_tex_unified_1d_array_v4u32_f32,       // llvm.nvvm.tex.unified.1d.array.v4u32.f32
    nvvm_tex_unified_1d_array_v4u32_s32,       // llvm.nvvm.tex.unified.1d.array.v4u32.s32
    nvvm_tex_unified_1d_grad_v4f32_f32,        // llvm.nvvm.tex.unified.1d.grad.v4f32.f32
    nvvm_tex_unified_1d_grad_v4s32_f32,        // llvm.nvvm.tex.unified.1d.grad.v4s32.f32
    nvvm_tex_unified_1d_grad_v4u32_f32,        // llvm.nvvm.tex.unified.1d.grad.v4u32.f32
    nvvm_tex_unified_1d_level_v4f32_f32,       // llvm.nvvm.tex.unified.1d.level.v4f32.f32
    nvvm_tex_unified_1d_level_v4s32_f32,       // llvm.nvvm.tex.unified.1d.level.v4s32.f32
    nvvm_tex_unified_1d_level_v4u32_f32,       // llvm.nvvm.tex.unified.1d.level.v4u32.f32
    nvvm_tex_unified_1d_v4f32_f32,             // llvm.nvvm.tex.unified.1d.v4f32.f32
    nvvm_tex_unified_1d_v4f32_s32,             // llvm.nvvm.tex.unified.1d.v4f32.s32
    nvvm_tex_unified_1d_v4s32_f32,             // llvm.nvvm.tex.unified.1d.v4s32.f32
    nvvm_tex_unified_1d_v4s32_s32,             // llvm.nvvm.tex.unified.1d.v4s32.s32
    nvvm_tex_unified_1d_v4u32_f32,             // llvm.nvvm.tex.unified.1d.v4u32.f32
    nvvm_tex_unified_1d_v4u32_s32,             // llvm.nvvm.tex.unified.1d.v4u32.s32
    nvvm_tex_unified_2d_array_grad_v4f32_f32,  // llvm.nvvm.tex.unified.2d.array.grad.v4f32.f32
    nvvm_tex_unified_2d_array_grad_v4s32_f32,  // llvm.nvvm.tex.unified.2d.array.grad.v4s32.f32
    nvvm_tex_unified_2d_array_grad_v4u32_f32,  // llvm.nvvm.tex.unified.2d.array.grad.v4u32.f32
    nvvm_tex_unified_2d_array_level_v4f32_f32,  // llvm.nvvm.tex.unified.2d.array.level.v4f32.f32
    nvvm_tex_unified_2d_array_level_v4s32_f32,  // llvm.nvvm.tex.unified.2d.array.level.v4s32.f32
    nvvm_tex_unified_2d_array_level_v4u32_f32,  // llvm.nvvm.tex.unified.2d.array.level.v4u32.f32
    nvvm_tex_unified_2d_array_v4f32_f32,       // llvm.nvvm.tex.unified.2d.array.v4f32.f32
    nvvm_tex_unified_2d_array_v4f32_s32,       // llvm.nvvm.tex.unified.2d.array.v4f32.s32
    nvvm_tex_unified_2d_array_v4s32_f32,       // llvm.nvvm.tex.unified.2d.array.v4s32.f32
    nvvm_tex_unified_2d_array_v4s32_s32,       // llvm.nvvm.tex.unified.2d.array.v4s32.s32
    nvvm_tex_unified_2d_array_v4u32_f32,       // llvm.nvvm.tex.unified.2d.array.v4u32.f32
    nvvm_tex_unified_2d_array_v4u32_s32,       // llvm.nvvm.tex.unified.2d.array.v4u32.s32
    nvvm_tex_unified_2d_grad_v4f32_f32,        // llvm.nvvm.tex.unified.2d.grad.v4f32.f32
    nvvm_tex_unified_2d_grad_v4s32_f32,        // llvm.nvvm.tex.unified.2d.grad.v4s32.f32
    nvvm_tex_unified_2d_grad_v4u32_f32,        // llvm.nvvm.tex.unified.2d.grad.v4u32.f32
    nvvm_tex_unified_2d_level_v4f32_f32,       // llvm.nvvm.tex.unified.2d.level.v4f32.f32
    nvvm_tex_unified_2d_level_v4s32_f32,       // llvm.nvvm.tex.unified.2d.level.v4s32.f32
    nvvm_tex_unified_2d_level_v4u32_f32,       // llvm.nvvm.tex.unified.2d.level.v4u32.f32
    nvvm_tex_unified_2d_v4f32_f32,             // llvm.nvvm.tex.unified.2d.v4f32.f32
    nvvm_tex_unified_2d_v4f32_s32,             // llvm.nvvm.tex.unified.2d.v4f32.s32
    nvvm_tex_unified_2d_v4s32_f32,             // llvm.nvvm.tex.unified.2d.v4s32.f32
    nvvm_tex_unified_2d_v4s32_s32,             // llvm.nvvm.tex.unified.2d.v4s32.s32
    nvvm_tex_unified_2d_v4u32_f32,             // llvm.nvvm.tex.unified.2d.v4u32.f32
    nvvm_tex_unified_2d_v4u32_s32,             // llvm.nvvm.tex.unified.2d.v4u32.s32
    nvvm_tex_unified_3d_grad_v4f32_f32,        // llvm.nvvm.tex.unified.3d.grad.v4f32.f32
    nvvm_tex_unified_3d_grad_v4s32_f32,        // llvm.nvvm.tex.unified.3d.grad.v4s32.f32
    nvvm_tex_unified_3d_grad_v4u32_f32,        // llvm.nvvm.tex.unified.3d.grad.v4u32.f32
    nvvm_tex_unified_3d_level_v4f32_f32,       // llvm.nvvm.tex.unified.3d.level.v4f32.f32
    nvvm_tex_unified_3d_level_v4s32_f32,       // llvm.nvvm.tex.unified.3d.level.v4s32.f32
    nvvm_tex_unified_3d_level_v4u32_f32,       // llvm.nvvm.tex.unified.3d.level.v4u32.f32
    nvvm_tex_unified_3d_v4f32_f32,             // llvm.nvvm.tex.unified.3d.v4f32.f32
    nvvm_tex_unified_3d_v4f32_s32,             // llvm.nvvm.tex.unified.3d.v4f32.s32
    nvvm_tex_unified_3d_v4s32_f32,             // llvm.nvvm.tex.unified.3d.v4s32.f32
    nvvm_tex_unified_3d_v4s32_s32,             // llvm.nvvm.tex.unified.3d.v4s32.s32
    nvvm_tex_unified_3d_v4u32_f32,             // llvm.nvvm.tex.unified.3d.v4u32.f32
    nvvm_tex_unified_3d_v4u32_s32,             // llvm.nvvm.tex.unified.3d.v4u32.s32
    nvvm_tex_unified_cube_array_level_v4f32_f32,  // llvm.nvvm.tex.unified.cube.array.level.v4f32.f32
    nvvm_tex_unified_cube_array_level_v4s32_f32,  // llvm.nvvm.tex.unified.cube.array.level.v4s32.f32
    nvvm_tex_unified_cube_array_level_v4u32_f32,  // llvm.nvvm.tex.unified.cube.array.level.v4u32.f32
    nvvm_tex_unified_cube_array_v4f32_f32,     // llvm.nvvm.tex.unified.cube.array.v4f32.f32
    nvvm_tex_unified_cube_array_v4s32_f32,     // llvm.nvvm.tex.unified.cube.array.v4s32.f32
    nvvm_tex_unified_cube_array_v4u32_f32,     // llvm.nvvm.tex.unified.cube.array.v4u32.f32
    nvvm_tex_unified_cube_level_v4f32_f32,     // llvm.nvvm.tex.unified.cube.level.v4f32.f32
    nvvm_tex_unified_cube_level_v4s32_f32,     // llvm.nvvm.tex.unified.cube.level.v4s32.f32
    nvvm_tex_unified_cube_level_v4u32_f32,     // llvm.nvvm.tex.unified.cube.level.v4u32.f32
    nvvm_tex_unified_cube_v4f32_f32,           // llvm.nvvm.tex.unified.cube.v4f32.f32
    nvvm_tex_unified_cube_v4s32_f32,           // llvm.nvvm.tex.unified.cube.v4s32.f32
    nvvm_tex_unified_cube_v4u32_f32,           // llvm.nvvm.tex.unified.cube.v4u32.f32
    nvvm_texsurf_handle,                       // llvm.nvvm.texsurf.handle
    nvvm_texsurf_handle_internal,              // llvm.nvvm.texsurf.handle.internal
    nvvm_tld4_a_2d_v4f32_f32,                  // llvm.nvvm.tld4.a.2d.v4f32.f32
    nvvm_tld4_a_2d_v4s32_f32,                  // llvm.nvvm.tld4.a.2d.v4s32.f32
    nvvm_tld4_a_2d_v4u32_f32,                  // llvm.nvvm.tld4.a.2d.v4u32.f32
    nvvm_tld4_b_2d_v4f32_f32,                  // llvm.nvvm.tld4.b.2d.v4f32.f32
    nvvm_tld4_b_2d_v4s32_f32,                  // llvm.nvvm.tld4.b.2d.v4s32.f32
    nvvm_tld4_b_2d_v4u32_f32,                  // llvm.nvvm.tld4.b.2d.v4u32.f32
    nvvm_tld4_g_2d_v4f32_f32,                  // llvm.nvvm.tld4.g.2d.v4f32.f32
    nvvm_tld4_g_2d_v4s32_f32,                  // llvm.nvvm.tld4.g.2d.v4s32.f32
    nvvm_tld4_g_2d_v4u32_f32,                  // llvm.nvvm.tld4.g.2d.v4u32.f32
    nvvm_tld4_r_2d_v4f32_f32,                  // llvm.nvvm.tld4.r.2d.v4f32.f32
    nvvm_tld4_r_2d_v4s32_f32,                  // llvm.nvvm.tld4.r.2d.v4s32.f32
    nvvm_tld4_r_2d_v4u32_f32,                  // llvm.nvvm.tld4.r.2d.v4u32.f32
    nvvm_tld4_unified_a_2d_v4f32_f32,          // llvm.nvvm.tld4.unified.a.2d.v4f32.f32
    nvvm_tld4_unified_a_2d_v4s32_f32,          // llvm.nvvm.tld4.unified.a.2d.v4s32.f32
    nvvm_tld4_unified_a_2d_v4u32_f32,          // llvm.nvvm.tld4.unified.a.2d.v4u32.f32
    nvvm_tld4_unified_b_2d_v4f32_f32,          // llvm.nvvm.tld4.unified.b.2d.v4f32.f32
    nvvm_tld4_unified_b_2d_v4s32_f32,          // llvm.nvvm.tld4.unified.b.2d.v4s32.f32
    nvvm_tld4_unified_b_2d_v4u32_f32,          // llvm.nvvm.tld4.unified.b.2d.v4u32.f32
    nvvm_tld4_unified_g_2d_v4f32_f32,          // llvm.nvvm.tld4.unified.g.2d.v4f32.f32
    nvvm_tld4_unified_g_2d_v4s32_f32,          // llvm.nvvm.tld4.unified.g.2d.v4s32.f32
    nvvm_tld4_unified_g_2d_v4u32_f32,          // llvm.nvvm.tld4.unified.g.2d.v4u32.f32
    nvvm_tld4_unified_r_2d_v4f32_f32,          // llvm.nvvm.tld4.unified.r.2d.v4f32.f32
    nvvm_tld4_unified_r_2d_v4s32_f32,          // llvm.nvvm.tld4.unified.r.2d.v4s32.f32
    nvvm_tld4_unified_r_2d_v4u32_f32,          // llvm.nvvm.tld4.unified.r.2d.v4u32.f32
    nvvm_trunc_d,                              // llvm.nvvm.trunc.d
    nvvm_trunc_f,                              // llvm.nvvm.trunc.f
    nvvm_trunc_ftz_f,                          // llvm.nvvm.trunc.ftz.f
    nvvm_txq_array_size,                       // llvm.nvvm.txq.array.size
    nvvm_txq_channel_data_type,                // llvm.nvvm.txq.channel.data.type
    nvvm_txq_channel_order,                    // llvm.nvvm.txq.channel.order
    nvvm_txq_depth,                            // llvm.nvvm.txq.depth
    nvvm_txq_height,                           // llvm.nvvm.txq.height
    nvvm_txq_num_mipmap_levels,                // llvm.nvvm.txq.num.mipmap.levels
    nvvm_txq_num_samples,                      // llvm.nvvm.txq.num.samples
    nvvm_txq_width,                            // llvm.nvvm.txq.width
    nvvm_ui2d_rm,                              // llvm.nvvm.ui2d.rm
    nvvm_ui2d_rn,                              // llvm.nvvm.ui2d.rn
    nvvm_ui2d_rp,                              // llvm.nvvm.ui2d.rp
    nvvm_ui2d_rz,                              // llvm.nvvm.ui2d.rz
    nvvm_ui2f_rm,                              // llvm.nvvm.ui2f.rm
    nvvm_ui2f_rn,                              // llvm.nvvm.ui2f.rn
    nvvm_ui2f_rp,                              // llvm.nvvm.ui2f.rp
    nvvm_ui2f_rz,                              // llvm.nvvm.ui2f.rz
    nvvm_ull2d_rm,                             // llvm.nvvm.ull2d.rm
    nvvm_ull2d_rn,                             // llvm.nvvm.ull2d.rn
    nvvm_ull2d_rp,                             // llvm.nvvm.ull2d.rp
    nvvm_ull2d_rz,                             // llvm.nvvm.ull2d.rz
    nvvm_ull2f_rm,                             // llvm.nvvm.ull2f.rm
    nvvm_ull2f_rn,                             // llvm.nvvm.ull2f.rn
    nvvm_ull2f_rp,                             // llvm.nvvm.ull2f.rp
    nvvm_ull2f_rz,                             // llvm.nvvm.ull2f.rz
    objectsize,                                // llvm.objectsize
    pcmarker,                                  // llvm.pcmarker
    pow,                                       // llvm.pow
    powi,                                      // llvm.powi
    ppc_altivec_dss,                           // llvm.ppc.altivec.dss
    ppc_altivec_dssall,                        // llvm.ppc.altivec.dssall
    ppc_altivec_dst,                           // llvm.ppc.altivec.dst
    ppc_altivec_dstst,                         // llvm.ppc.altivec.dstst
    ppc_altivec_dststt,                        // llvm.ppc.altivec.dststt
    ppc_altivec_dstt,                          // llvm.ppc.altivec.dstt
    ppc_altivec_lvebx,                         // llvm.ppc.altivec.lvebx
    ppc_altivec_lvehx,                         // llvm.ppc.altivec.lvehx
    ppc_altivec_lvewx,                         // llvm.ppc.altivec.lvewx
    ppc_altivec_lvsl,                          // llvm.ppc.altivec.lvsl
    ppc_altivec_lvsr,                          // llvm.ppc.altivec.lvsr
    ppc_altivec_lvx,                           // llvm.ppc.altivec.lvx
    ppc_altivec_lvxl,                          // llvm.ppc.altivec.lvxl
    ppc_altivec_mfvscr,                        // llvm.ppc.altivec.mfvscr
    ppc_altivec_mtvscr,                        // llvm.ppc.altivec.mtvscr
    ppc_altivec_stvebx,                        // llvm.ppc.altivec.stvebx
    ppc_altivec_stvehx,                        // llvm.ppc.altivec.stvehx
    ppc_altivec_stvewx,                        // llvm.ppc.altivec.stvewx
    ppc_altivec_stvx,                          // llvm.ppc.altivec.stvx
    ppc_altivec_stvxl,                         // llvm.ppc.altivec.stvxl
    ppc_altivec_vaddcuw,                       // llvm.ppc.altivec.vaddcuw
    ppc_altivec_vaddsbs,                       // llvm.ppc.altivec.vaddsbs
    ppc_altivec_vaddshs,                       // llvm.ppc.altivec.vaddshs
    ppc_altivec_vaddsws,                       // llvm.ppc.altivec.vaddsws
    ppc_altivec_vaddubs,                       // llvm.ppc.altivec.vaddubs
    ppc_altivec_vadduhs,                       // llvm.ppc.altivec.vadduhs
    ppc_altivec_vadduws,                       // llvm.ppc.altivec.vadduws
    ppc_altivec_vavgsb,                        // llvm.ppc.altivec.vavgsb
    ppc_altivec_vavgsh,                        // llvm.ppc.altivec.vavgsh
    ppc_altivec_vavgsw,                        // llvm.ppc.altivec.vavgsw
    ppc_altivec_vavgub,                        // llvm.ppc.altivec.vavgub
    ppc_altivec_vavguh,                        // llvm.ppc.altivec.vavguh
    ppc_altivec_vavguw,                        // llvm.ppc.altivec.vavguw
    ppc_altivec_vcfsx,                         // llvm.ppc.altivec.vcfsx
    ppc_altivec_vcfux,                         // llvm.ppc.altivec.vcfux
    ppc_altivec_vcmpbfp,                       // llvm.ppc.altivec.vcmpbfp
    ppc_altivec_vcmpbfp_p,                     // llvm.ppc.altivec.vcmpbfp.p
    ppc_altivec_vcmpeqfp,                      // llvm.ppc.altivec.vcmpeqfp
    ppc_altivec_vcmpeqfp_p,                    // llvm.ppc.altivec.vcmpeqfp.p
    ppc_altivec_vcmpequb,                      // llvm.ppc.altivec.vcmpequb
    ppc_altivec_vcmpequb_p,                    // llvm.ppc.altivec.vcmpequb.p
    ppc_altivec_vcmpequh,                      // llvm.ppc.altivec.vcmpequh
    ppc_altivec_vcmpequh_p,                    // llvm.ppc.altivec.vcmpequh.p
    ppc_altivec_vcmpequw,                      // llvm.ppc.altivec.vcmpequw
    ppc_altivec_vcmpequw_p,                    // llvm.ppc.altivec.vcmpequw.p
    ppc_altivec_vcmpgefp,                      // llvm.ppc.altivec.vcmpgefp
    ppc_altivec_vcmpgefp_p,                    // llvm.ppc.altivec.vcmpgefp.p
    ppc_altivec_vcmpgtfp,                      // llvm.ppc.altivec.vcmpgtfp
    ppc_altivec_vcmpgtfp_p,                    // llvm.ppc.altivec.vcmpgtfp.p
    ppc_altivec_vcmpgtsb,                      // llvm.ppc.altivec.vcmpgtsb
    ppc_altivec_vcmpgtsb_p,                    // llvm.ppc.altivec.vcmpgtsb.p
    ppc_altivec_vcmpgtsh,                      // llvm.ppc.altivec.vcmpgtsh
    ppc_altivec_vcmpgtsh_p,                    // llvm.ppc.altivec.vcmpgtsh.p
    ppc_altivec_vcmpgtsw,                      // llvm.ppc.altivec.vcmpgtsw
    ppc_altivec_vcmpgtsw_p,                    // llvm.ppc.altivec.vcmpgtsw.p
    ppc_altivec_vcmpgtub,                      // llvm.ppc.altivec.vcmpgtub
    ppc_altivec_vcmpgtub_p,                    // llvm.ppc.altivec.vcmpgtub.p
    ppc_altivec_vcmpgtuh,                      // llvm.ppc.altivec.vcmpgtuh
    ppc_altivec_vcmpgtuh_p,                    // llvm.ppc.altivec.vcmpgtuh.p
    ppc_altivec_vcmpgtuw,                      // llvm.ppc.altivec.vcmpgtuw
    ppc_altivec_vcmpgtuw_p,                    // llvm.ppc.altivec.vcmpgtuw.p
    ppc_altivec_vctsxs,                        // llvm.ppc.altivec.vctsxs
    ppc_altivec_vctuxs,                        // llvm.ppc.altivec.vctuxs
    ppc_altivec_vexptefp,                      // llvm.ppc.altivec.vexptefp
    ppc_altivec_vlogefp,                       // llvm.ppc.altivec.vlogefp
    ppc_altivec_vmaddfp,                       // llvm.ppc.altivec.vmaddfp
    ppc_altivec_vmaxfp,                        // llvm.ppc.altivec.vmaxfp
    ppc_altivec_vmaxsb,                        // llvm.ppc.altivec.vmaxsb
    ppc_altivec_vmaxsh,                        // llvm.ppc.altivec.vmaxsh
    ppc_altivec_vmaxsw,                        // llvm.ppc.altivec.vmaxsw
    ppc_altivec_vmaxub,                        // llvm.ppc.altivec.vmaxub
    ppc_altivec_vmaxuh,                        // llvm.ppc.altivec.vmaxuh
    ppc_altivec_vmaxuw,                        // llvm.ppc.altivec.vmaxuw
    ppc_altivec_vmhaddshs,                     // llvm.ppc.altivec.vmhaddshs
    ppc_altivec_vmhraddshs,                    // llvm.ppc.altivec.vmhraddshs
    ppc_altivec_vminfp,                        // llvm.ppc.altivec.vminfp
    ppc_altivec_vminsb,                        // llvm.ppc.altivec.vminsb
    ppc_altivec_vminsh,                        // llvm.ppc.altivec.vminsh
    ppc_altivec_vminsw,                        // llvm.ppc.altivec.vminsw
    ppc_altivec_vminub,                        // llvm.ppc.altivec.vminub
    ppc_altivec_vminuh,                        // llvm.ppc.altivec.vminuh
    ppc_altivec_vminuw,                        // llvm.ppc.altivec.vminuw
    ppc_altivec_vmladduhm,                     // llvm.ppc.altivec.vmladduhm
    ppc_altivec_vmsummbm,                      // llvm.ppc.altivec.vmsummbm
    ppc_altivec_vmsumshm,                      // llvm.ppc.altivec.vmsumshm
    ppc_altivec_vmsumshs,                      // llvm.ppc.altivec.vmsumshs
    ppc_altivec_vmsumubm,                      // llvm.ppc.altivec.vmsumubm
    ppc_altivec_vmsumuhm,                      // llvm.ppc.altivec.vmsumuhm
    ppc_altivec_vmsumuhs,                      // llvm.ppc.altivec.vmsumuhs
    ppc_altivec_vmulesb,                       // llvm.ppc.altivec.vmulesb
    ppc_altivec_vmulesh,                       // llvm.ppc.altivec.vmulesh
    ppc_altivec_vmuleub,                       // llvm.ppc.altivec.vmuleub
    ppc_altivec_vmuleuh,                       // llvm.ppc.altivec.vmuleuh
    ppc_altivec_vmulosb,                       // llvm.ppc.altivec.vmulosb
    ppc_altivec_vmulosh,                       // llvm.ppc.altivec.vmulosh
    ppc_altivec_vmuloub,                       // llvm.ppc.altivec.vmuloub
    ppc_altivec_vmulouh,                       // llvm.ppc.altivec.vmulouh
    ppc_altivec_vnmsubfp,                      // llvm.ppc.altivec.vnmsubfp
    ppc_altivec_vperm,                         // llvm.ppc.altivec.vperm
    ppc_altivec_vpkpx,                         // llvm.ppc.altivec.vpkpx
    ppc_altivec_vpkshss,                       // llvm.ppc.altivec.vpkshss
    ppc_altivec_vpkshus,                       // llvm.ppc.altivec.vpkshus
    ppc_altivec_vpkswss,                       // llvm.ppc.altivec.vpkswss
    ppc_altivec_vpkswus,                       // llvm.ppc.altivec.vpkswus
    ppc_altivec_vpkuhus,                       // llvm.ppc.altivec.vpkuhus
    ppc_altivec_vpkuwus,                       // llvm.ppc.altivec.vpkuwus
    ppc_altivec_vrefp,                         // llvm.ppc.altivec.vrefp
    ppc_altivec_vrfim,                         // llvm.ppc.altivec.vrfim
    ppc_altivec_vrfin,                         // llvm.ppc.altivec.vrfin
    ppc_altivec_vrfip,                         // llvm.ppc.altivec.vrfip
    ppc_altivec_vrfiz,                         // llvm.ppc.altivec.vrfiz
    ppc_altivec_vrlb,                          // llvm.ppc.altivec.vrlb
    ppc_altivec_vrlh,                          // llvm.ppc.altivec.vrlh
    ppc_altivec_vrlw,                          // llvm.ppc.altivec.vrlw
    ppc_altivec_vrsqrtefp,                     // llvm.ppc.altivec.vrsqrtefp
    ppc_altivec_vsel,                          // llvm.ppc.altivec.vsel
    ppc_altivec_vsl,                           // llvm.ppc.altivec.vsl
    ppc_altivec_vslb,                          // llvm.ppc.altivec.vslb
    ppc_altivec_vslh,                          // llvm.ppc.altivec.vslh
    ppc_altivec_vslo,                          // llvm.ppc.altivec.vslo
    ppc_altivec_vslw,                          // llvm.ppc.altivec.vslw
    ppc_altivec_vsr,                           // llvm.ppc.altivec.vsr
    ppc_altivec_vsrab,                         // llvm.ppc.altivec.vsrab
    ppc_altivec_vsrah,                         // llvm.ppc.altivec.vsrah
    ppc_altivec_vsraw,                         // llvm.ppc.altivec.vsraw
    ppc_altivec_vsrb,                          // llvm.ppc.altivec.vsrb
    ppc_altivec_vsrh,                          // llvm.ppc.altivec.vsrh
    ppc_altivec_vsro,                          // llvm.ppc.altivec.vsro
    ppc_altivec_vsrw,                          // llvm.ppc.altivec.vsrw
    ppc_altivec_vsubcuw,                       // llvm.ppc.altivec.vsubcuw
    ppc_altivec_vsubsbs,                       // llvm.ppc.altivec.vsubsbs
    ppc_altivec_vsubshs,                       // llvm.ppc.altivec.vsubshs
    ppc_altivec_vsubsws,                       // llvm.ppc.altivec.vsubsws
    ppc_altivec_vsububs,                       // llvm.ppc.altivec.vsububs
    ppc_altivec_vsubuhs,                       // llvm.ppc.altivec.vsubuhs
    ppc_altivec_vsubuws,                       // llvm.ppc.altivec.vsubuws
    ppc_altivec_vsum2sws,                      // llvm.ppc.altivec.vsum2sws
    ppc_altivec_vsum4sbs,                      // llvm.ppc.altivec.vsum4sbs
    ppc_altivec_vsum4shs,                      // llvm.ppc.altivec.vsum4shs
    ppc_altivec_vsum4ubs,                      // llvm.ppc.altivec.vsum4ubs
    ppc_altivec_vsumsws,                       // llvm.ppc.altivec.vsumsws
    ppc_altivec_vupkhpx,                       // llvm.ppc.altivec.vupkhpx
    ppc_altivec_vupkhsb,                       // llvm.ppc.altivec.vupkhsb
    ppc_altivec_vupkhsh,                       // llvm.ppc.altivec.vupkhsh
    ppc_altivec_vupklpx,                       // llvm.ppc.altivec.vupklpx
    ppc_altivec_vupklsb,                       // llvm.ppc.altivec.vupklsb
    ppc_altivec_vupklsh,                       // llvm.ppc.altivec.vupklsh
    ppc_dcba,                                  // llvm.ppc.dcba
    ppc_dcbf,                                  // llvm.ppc.dcbf
    ppc_dcbi,                                  // llvm.ppc.dcbi
    ppc_dcbst,                                 // llvm.ppc.dcbst
    ppc_dcbt,                                  // llvm.ppc.dcbt
    ppc_dcbtst,                                // llvm.ppc.dcbtst
    ppc_dcbz,                                  // llvm.ppc.dcbz
    ppc_dcbzl,                                 // llvm.ppc.dcbzl
    ppc_is_decremented_ctr_nonzero,            // llvm.ppc.is.decremented.ctr.nonzero
    ppc_mtctr,                                 // llvm.ppc.mtctr
    ppc_sync,                                  // llvm.ppc.sync
    prefetch,                                  // llvm.prefetch
    ptr_annotation,                            // llvm.ptr.annotation
    ptx_bar_sync,                              // llvm.ptx.bar.sync
    ptx_read_clock,                            // llvm.ptx.read.clock
    ptx_read_clock64,                          // llvm.ptx.read.clock64
    ptx_read_ctaid_w,                          // llvm.ptx.read.ctaid.w
    ptx_read_ctaid_x,                          // llvm.ptx.read.ctaid.x
    ptx_read_ctaid_y,                          // llvm.ptx.read.ctaid.y
    ptx_read_ctaid_z,                          // llvm.ptx.read.ctaid.z
    ptx_read_gridid,                           // llvm.ptx.read.gridid
    ptx_read_laneid,                           // llvm.ptx.read.laneid
    ptx_read_lanemask_eq,                      // llvm.ptx.read.lanemask.eq
    ptx_read_lanemask_ge,                      // llvm.ptx.read.lanemask.ge
    ptx_read_lanemask_gt,                      // llvm.ptx.read.lanemask.gt
    ptx_read_lanemask_le,                      // llvm.ptx.read.lanemask.le
    ptx_read_lanemask_lt,                      // llvm.ptx.read.lanemask.lt
    ptx_read_nctaid_w,                         // llvm.ptx.read.nctaid.w
    ptx_read_nctaid_x,                         // llvm.ptx.read.nctaid.x
    ptx_read_nctaid_y,                         // llvm.ptx.read.nctaid.y
    ptx_read_nctaid_z,                         // llvm.ptx.read.nctaid.z
    ptx_read_nsmid,                            // llvm.ptx.read.nsmid
    ptx_read_ntid_w,                           // llvm.ptx.read.ntid.w
    ptx_read_ntid_x,                           // llvm.ptx.read.ntid.x
    ptx_read_ntid_y,                           // llvm.ptx.read.ntid.y
    ptx_read_ntid_z,                           // llvm.ptx.read.ntid.z
    ptx_read_nwarpid,                          // llvm.ptx.read.nwarpid
    ptx_read_pm0,                              // llvm.ptx.read.pm0
    ptx_read_pm1,                              // llvm.ptx.read.pm1
    ptx_read_pm2,                              // llvm.ptx.read.pm2
    ptx_read_pm3,                              // llvm.ptx.read.pm3
    ptx_read_smid,                             // llvm.ptx.read.smid
    ptx_read_tid_w,                            // llvm.ptx.read.tid.w
    ptx_read_tid_x,                            // llvm.ptx.read.tid.x
    ptx_read_tid_y,                            // llvm.ptx.read.tid.y
    ptx_read_tid_z,                            // llvm.ptx.read.tid.z
    ptx_read_warpid,                           // llvm.ptx.read.warpid
    r600_read_global_size_x,                   // llvm.r600.read.global.size.x
    r600_read_global_size_y,                   // llvm.r600.read.global.size.y
    r600_read_global_size_z,                   // llvm.r600.read.global.size.z
    r600_read_local_size_x,                    // llvm.r600.read.local.size.x
    r600_read_local_size_y,                    // llvm.r600.read.local.size.y
    r600_read_local_size_z,                    // llvm.r600.read.local.size.z
    r600_read_ngroups_x,                       // llvm.r600.read.ngroups.x
    r600_read_ngroups_y,                       // llvm.r600.read.ngroups.y
    r600_read_ngroups_z,                       // llvm.r600.read.ngroups.z
    r600_read_tgid_x,                          // llvm.r600.read.tgid.x
    r600_read_tgid_y,                          // llvm.r600.read.tgid.y
    r600_read_tgid_z,                          // llvm.r600.read.tgid.z
    r600_read_tidig_x,                         // llvm.r600.read.tidig.x
    r600_read_tidig_y,                         // llvm.r600.read.tidig.y
    r600_read_tidig_z,                         // llvm.r600.read.tidig.z
    read_register,                             // llvm.read_register
    readcyclecounter,                          // llvm.readcyclecounter
    returnaddress,                             // llvm.returnaddress
    rint,                                      // llvm.rint
    round,                                     // llvm.round
    sadd_with_overflow,                        // llvm.sadd.with.overflow
    setjmp,                                    // llvm.setjmp
    siglongjmp,                                // llvm.siglongjmp
    sigsetjmp,                                 // llvm.sigsetjmp
    sin,                                       // llvm.sin
    smul_with_overflow,                        // llvm.smul.with.overflow
    sqrt,                                      // llvm.sqrt
    ssub_with_overflow,                        // llvm.ssub.with.overflow
    stackprotector,                            // llvm.stackprotector
    stackprotectorcheck,                       // llvm.stackprotectorcheck
    stackrestore,                              // llvm.stackrestore
    stacksave,                                 // llvm.stacksave
    trap,                                      // llvm.trap
    trunc,                                     // llvm.trunc
    uadd_with_overflow,                        // llvm.uadd.with.overflow
    umul_with_overflow,                        // llvm.umul.with.overflow
    usub_with_overflow,                        // llvm.usub.with.overflow
    vacopy,                                    // llvm.va_copy
    vaend,                                     // llvm.va_end
    var_annotation,                            // llvm.var.annotation
    vastart,                                   // llvm.va_start
    write_register,                            // llvm.write_register
    x86_3dnow_pavgusb,                         // llvm.x86.3dnow.pavgusb
    x86_3dnow_pf2id,                           // llvm.x86.3dnow.pf2id
    x86_3dnow_pfacc,                           // llvm.x86.3dnow.pfacc
    x86_3dnow_pfadd,                           // llvm.x86.3dnow.pfadd
    x86_3dnow_pfcmpeq,                         // llvm.x86.3dnow.pfcmpeq
    x86_3dnow_pfcmpge,                         // llvm.x86.3dnow.pfcmpge
    x86_3dnow_pfcmpgt,                         // llvm.x86.3dnow.pfcmpgt
    x86_3dnow_pfmax,                           // llvm.x86.3dnow.pfmax
    x86_3dnow_pfmin,                           // llvm.x86.3dnow.pfmin
    x86_3dnow_pfmul,                           // llvm.x86.3dnow.pfmul
    x86_3dnow_pfrcp,                           // llvm.x86.3dnow.pfrcp
    x86_3dnow_pfrcpit1,                        // llvm.x86.3dnow.pfrcpit1
    x86_3dnow_pfrcpit2,                        // llvm.x86.3dnow.pfrcpit2
    x86_3dnow_pfrsqit1,                        // llvm.x86.3dnow.pfrsqit1
    x86_3dnow_pfrsqrt,                         // llvm.x86.3dnow.pfrsqrt
    x86_3dnow_pfsub,                           // llvm.x86.3dnow.pfsub
    x86_3dnow_pfsubr,                          // llvm.x86.3dnow.pfsubr
    x86_3dnow_pi2fd,                           // llvm.x86.3dnow.pi2fd
    x86_3dnow_pmulhrw,                         // llvm.x86.3dnow.pmulhrw
    x86_3dnowa_pf2iw,                          // llvm.x86.3dnowa.pf2iw
    x86_3dnowa_pfnacc,                         // llvm.x86.3dnowa.pfnacc
    x86_3dnowa_pfpnacc,                        // llvm.x86.3dnowa.pfpnacc
    x86_3dnowa_pi2fw,                          // llvm.x86.3dnowa.pi2fw
    x86_3dnowa_pswapd,                         // llvm.x86.3dnowa.pswapd
    x86_aesni_aesdec,                          // llvm.x86.aesni.aesdec
    x86_aesni_aesdeclast,                      // llvm.x86.aesni.aesdeclast
    x86_aesni_aesenc,                          // llvm.x86.aesni.aesenc
    x86_aesni_aesenclast,                      // llvm.x86.aesni.aesenclast
    x86_aesni_aesimc,                          // llvm.x86.aesni.aesimc
    x86_aesni_aeskeygenassist,                 // llvm.x86.aesni.aeskeygenassist
    x86_avx2_gather_d_d,                       // llvm.x86.avx2.gather.d.d
    x86_avx2_gather_d_d_256,                   // llvm.x86.avx2.gather.d.d.256
    x86_avx2_gather_d_pd,                      // llvm.x86.avx2.gather.d.pd
    x86_avx2_gather_d_pd_256,                  // llvm.x86.avx2.gather.d.pd.256
    x86_avx2_gather_d_ps,                      // llvm.x86.avx2.gather.d.ps
    x86_avx2_gather_d_ps_256,                  // llvm.x86.avx2.gather.d.ps.256
    x86_avx2_gather_d_q,                       // llvm.x86.avx2.gather.d.q
    x86_avx2_gather_d_q_256,                   // llvm.x86.avx2.gather.d.q.256
    x86_avx2_gather_q_d,                       // llvm.x86.avx2.gather.q.d
    x86_avx2_gather_q_d_256,                   // llvm.x86.avx2.gather.q.d.256
    x86_avx2_gather_q_pd,                      // llvm.x86.avx2.gather.q.pd
    x86_avx2_gather_q_pd_256,                  // llvm.x86.avx2.gather.q.pd.256
    x86_avx2_gather_q_ps,                      // llvm.x86.avx2.gather.q.ps
    x86_avx2_gather_q_ps_256,                  // llvm.x86.avx2.gather.q.ps.256
    x86_avx2_gather_q_q,                       // llvm.x86.avx2.gather.q.q
    x86_avx2_gather_q_q_256,                   // llvm.x86.avx2.gather.q.q.256
    x86_avx2_maskload_d,                       // llvm.x86.avx2.maskload.d
    x86_avx2_maskload_d_256,                   // llvm.x86.avx2.maskload.d.256
    x86_avx2_maskload_q,                       // llvm.x86.avx2.maskload.q
    x86_avx2_maskload_q_256,                   // llvm.x86.avx2.maskload.q.256
    x86_avx2_maskstore_d,                      // llvm.x86.avx2.maskstore.d
    x86_avx2_maskstore_d_256,                  // llvm.x86.avx2.maskstore.d.256
    x86_avx2_maskstore_q,                      // llvm.x86.avx2.maskstore.q
    x86_avx2_maskstore_q_256,                  // llvm.x86.avx2.maskstore.q.256
    x86_avx2_movntdqa,                         // llvm.x86.avx2.movntdqa
    x86_avx2_mpsadbw,                          // llvm.x86.avx2.mpsadbw
    x86_avx2_pabs_b,                           // llvm.x86.avx2.pabs.b
    x86_avx2_pabs_d,                           // llvm.x86.avx2.pabs.d
    x86_avx2_pabs_w,                           // llvm.x86.avx2.pabs.w
    x86_avx2_packssdw,                         // llvm.x86.avx2.packssdw
    x86_avx2_packsswb,                         // llvm.x86.avx2.packsswb
    x86_avx2_packusdw,                         // llvm.x86.avx2.packusdw
    x86_avx2_packuswb,                         // llvm.x86.avx2.packuswb
    x86_avx2_padds_b,                          // llvm.x86.avx2.padds.b
    x86_avx2_padds_w,                          // llvm.x86.avx2.padds.w
    x86_avx2_paddus_b,                         // llvm.x86.avx2.paddus.b
    x86_avx2_paddus_w,                         // llvm.x86.avx2.paddus.w
    x86_avx2_pavg_b,                           // llvm.x86.avx2.pavg.b
    x86_avx2_pavg_w,                           // llvm.x86.avx2.pavg.w
    x86_avx2_pblendd_128,                      // llvm.x86.avx2.pblendd.128
    x86_avx2_pblendd_256,                      // llvm.x86.avx2.pblendd.256
    x86_avx2_pblendvb,                         // llvm.x86.avx2.pblendvb
    x86_avx2_pblendw,                          // llvm.x86.avx2.pblendw
    x86_avx2_pbroadcastb_128,                  // llvm.x86.avx2.pbroadcastb.128
    x86_avx2_pbroadcastb_256,                  // llvm.x86.avx2.pbroadcastb.256
    x86_avx2_pbroadcastd_128,                  // llvm.x86.avx2.pbroadcastd.128
    x86_avx2_pbroadcastd_256,                  // llvm.x86.avx2.pbroadcastd.256
    x86_avx2_pbroadcastq_128,                  // llvm.x86.avx2.pbroadcastq.128
    x86_avx2_pbroadcastq_256,                  // llvm.x86.avx2.pbroadcastq.256
    x86_avx2_pbroadcastw_128,                  // llvm.x86.avx2.pbroadcastw.128
    x86_avx2_pbroadcastw_256,                  // llvm.x86.avx2.pbroadcastw.256
    x86_avx2_permd,                            // llvm.x86.avx2.permd
    x86_avx2_permps,                           // llvm.x86.avx2.permps
    x86_avx2_phadd_d,                          // llvm.x86.avx2.phadd.d
    x86_avx2_phadd_sw,                         // llvm.x86.avx2.phadd.sw
    x86_avx2_phadd_w,                          // llvm.x86.avx2.phadd.w
    x86_avx2_phsub_d,                          // llvm.x86.avx2.phsub.d
    x86_avx2_phsub_sw,                         // llvm.x86.avx2.phsub.sw
    x86_avx2_phsub_w,                          // llvm.x86.avx2.phsub.w
    x86_avx2_pmadd_ub_sw,                      // llvm.x86.avx2.pmadd.ub.sw
    x86_avx2_pmadd_wd,                         // llvm.x86.avx2.pmadd.wd
    x86_avx2_pmaxs_b,                          // llvm.x86.avx2.pmaxs.b
    x86_avx2_pmaxs_d,                          // llvm.x86.avx2.pmaxs.d
    x86_avx2_pmaxs_w,                          // llvm.x86.avx2.pmaxs.w
    x86_avx2_pmaxu_b,                          // llvm.x86.avx2.pmaxu.b
    x86_avx2_pmaxu_d,                          // llvm.x86.avx2.pmaxu.d
    x86_avx2_pmaxu_w,                          // llvm.x86.avx2.pmaxu.w
    x86_avx2_pmins_b,                          // llvm.x86.avx2.pmins.b
    x86_avx2_pmins_d,                          // llvm.x86.avx2.pmins.d
    x86_avx2_pmins_w,                          // llvm.x86.avx2.pmins.w
    x86_avx2_pminu_b,                          // llvm.x86.avx2.pminu.b
    x86_avx2_pminu_d,                          // llvm.x86.avx2.pminu.d
    x86_avx2_pminu_w,                          // llvm.x86.avx2.pminu.w
    x86_avx2_pmovmskb,                         // llvm.x86.avx2.pmovmskb
    x86_avx2_pmovsxbd,                         // llvm.x86.avx2.pmovsxbd
    x86_avx2_pmovsxbq,                         // llvm.x86.avx2.pmovsxbq
    x86_avx2_pmovsxbw,                         // llvm.x86.avx2.pmovsxbw
    x86_avx2_pmovsxdq,                         // llvm.x86.avx2.pmovsxdq
    x86_avx2_pmovsxwd,                         // llvm.x86.avx2.pmovsxwd
    x86_avx2_pmovsxwq,                         // llvm.x86.avx2.pmovsxwq
    x86_avx2_pmovzxbd,                         // llvm.x86.avx2.pmovzxbd
    x86_avx2_pmovzxbq,                         // llvm.x86.avx2.pmovzxbq
    x86_avx2_pmovzxbw,                         // llvm.x86.avx2.pmovzxbw
    x86_avx2_pmovzxdq,                         // llvm.x86.avx2.pmovzxdq
    x86_avx2_pmovzxwd,                         // llvm.x86.avx2.pmovzxwd
    x86_avx2_pmovzxwq,                         // llvm.x86.avx2.pmovzxwq
    x86_avx2_pmul_dq,                          // llvm.x86.avx2.pmul.dq
    x86_avx2_pmul_hr_sw,                       // llvm.x86.avx2.pmul.hr.sw
    x86_avx2_pmulh_w,                          // llvm.x86.avx2.pmulh.w
    x86_avx2_pmulhu_w,                         // llvm.x86.avx2.pmulhu.w
    x86_avx2_pmulu_dq,                         // llvm.x86.avx2.pmulu.dq
    x86_avx2_psad_bw,                          // llvm.x86.avx2.psad.bw
    x86_avx2_pshuf_b,                          // llvm.x86.avx2.pshuf.b
    x86_avx2_psign_b,                          // llvm.x86.avx2.psign.b
    x86_avx2_psign_d,                          // llvm.x86.avx2.psign.d
    x86_avx2_psign_w,                          // llvm.x86.avx2.psign.w
    x86_avx2_psll_d,                           // llvm.x86.avx2.psll.d
    x86_avx2_psll_dq,                          // llvm.x86.avx2.psll.dq
    x86_avx2_psll_dq_bs,                       // llvm.x86.avx2.psll.dq.bs
    x86_avx2_psll_q,                           // llvm.x86.avx2.psll.q
    x86_avx2_psll_w,                           // llvm.x86.avx2.psll.w
    x86_avx2_pslli_d,                          // llvm.x86.avx2.pslli.d
    x86_avx2_pslli_q,                          // llvm.x86.avx2.pslli.q
    x86_avx2_pslli_w,                          // llvm.x86.avx2.pslli.w
    x86_avx2_psllv_d,                          // llvm.x86.avx2.psllv.d
    x86_avx2_psllv_d_256,                      // llvm.x86.avx2.psllv.d.256
    x86_avx2_psllv_q,                          // llvm.x86.avx2.psllv.q
    x86_avx2_psllv_q_256,                      // llvm.x86.avx2.psllv.q.256
    x86_avx2_psra_d,                           // llvm.x86.avx2.psra.d
    x86_avx2_psra_w,                           // llvm.x86.avx2.psra.w
    x86_avx2_psrai_d,                          // llvm.x86.avx2.psrai.d
    x86_avx2_psrai_w,                          // llvm.x86.avx2.psrai.w
    x86_avx2_psrav_d,                          // llvm.x86.avx2.psrav.d
    x86_avx2_psrav_d_256,                      // llvm.x86.avx2.psrav.d.256
    x86_avx2_psrl_d,                           // llvm.x86.avx2.psrl.d
    x86_avx2_psrl_dq,                          // llvm.x86.avx2.psrl.dq
    x86_avx2_psrl_dq_bs,                       // llvm.x86.avx2.psrl.dq.bs
    x86_avx2_psrl_q,                           // llvm.x86.avx2.psrl.q
    x86_avx2_psrl_w,                           // llvm.x86.avx2.psrl.w
    x86_avx2_psrli_d,                          // llvm.x86.avx2.psrli.d
    x86_avx2_psrli_q,                          // llvm.x86.avx2.psrli.q
    x86_avx2_psrli_w,                          // llvm.x86.avx2.psrli.w
    x86_avx2_psrlv_d,                          // llvm.x86.avx2.psrlv.d
    x86_avx2_psrlv_d_256,                      // llvm.x86.avx2.psrlv.d.256
    x86_avx2_psrlv_q,                          // llvm.x86.avx2.psrlv.q
    x86_avx2_psrlv_q_256,                      // llvm.x86.avx2.psrlv.q.256
    x86_avx2_psubs_b,                          // llvm.x86.avx2.psubs.b
    x86_avx2_psubs_w,                          // llvm.x86.avx2.psubs.w
    x86_avx2_psubus_b,                         // llvm.x86.avx2.psubus.b
    x86_avx2_psubus_w,                         // llvm.x86.avx2.psubus.w
    x86_avx2_vbroadcast_sd_pd_256,             // llvm.x86.avx2.vbroadcast.sd.pd.256
    x86_avx2_vbroadcast_ss_ps,                 // llvm.x86.avx2.vbroadcast.ss.ps
    x86_avx2_vbroadcast_ss_ps_256,             // llvm.x86.avx2.vbroadcast.ss.ps.256
    x86_avx2_vbroadcasti128,                   // llvm.x86.avx2.vbroadcasti128
    x86_avx2_vextracti128,                     // llvm.x86.avx2.vextracti128
    x86_avx2_vinserti128,                      // llvm.x86.avx2.vinserti128
    x86_avx2_vperm2i128,                       // llvm.x86.avx2.vperm2i128
    x86_avx512_cvtsd2usi,                      // llvm.x86.avx512.cvtsd2usi
    x86_avx512_cvtsd2usi64,                    // llvm.x86.avx512.cvtsd2usi64
    x86_avx512_cvtss2usi,                      // llvm.x86.avx512.cvtss2usi
    x86_avx512_cvtss2usi64,                    // llvm.x86.avx512.cvtss2usi64
    x86_avx512_cvttsd2usi,                     // llvm.x86.avx512.cvttsd2usi
    x86_avx512_cvttsd2usi64,                   // llvm.x86.avx512.cvttsd2usi64
    x86_avx512_cvttss2usi,                     // llvm.x86.avx512.cvttss2usi
    x86_avx512_cvttss2usi64,                   // llvm.x86.avx512.cvttss2usi64
    x86_avx512_cvtusi2sd,                      // llvm.x86.avx512.cvtusi2sd
    x86_avx512_cvtusi2ss,                      // llvm.x86.avx512.cvtusi2ss
    x86_avx512_cvtusi642sd,                    // llvm.x86.avx512.cvtusi642sd
    x86_avx512_cvtusi642ss,                    // llvm.x86.avx512.cvtusi642ss
    x86_avx512_gather_dpd_512,                 // llvm.x86.avx512.gather.dpd.512
    x86_avx512_gather_dpi_512,                 // llvm.x86.avx512.gather.dpi.512
    x86_avx512_gather_dpq_512,                 // llvm.x86.avx512.gather.dpq.512
    x86_avx512_gather_dps_512,                 // llvm.x86.avx512.gather.dps.512
    x86_avx512_gather_qpd_512,                 // llvm.x86.avx512.gather.qpd.512
    x86_avx512_gather_qpi_512,                 // llvm.x86.avx512.gather.qpi.512
    x86_avx512_gather_qpq_512,                 // llvm.x86.avx512.gather.qpq.512
    x86_avx512_gather_qps_512,                 // llvm.x86.avx512.gather.qps.512
    x86_avx512_gatherpf_dpd_512,               // llvm.x86.avx512.gatherpf.dpd.512
    x86_avx512_gatherpf_dps_512,               // llvm.x86.avx512.gatherpf.dps.512
    x86_avx512_gatherpf_qpd_512,               // llvm.x86.avx512.gatherpf.qpd.512
    x86_avx512_gatherpf_qps_512,               // llvm.x86.avx512.gatherpf.qps.512
    x86_avx512_kand_w,                         // llvm.x86.avx512.kand.w
    x86_avx512_kandn_w,                        // llvm.x86.avx512.kandn.w
    x86_avx512_knot_w,                         // llvm.x86.avx512.knot.w
    x86_avx512_kor_w,                          // llvm.x86.avx512.kor.w
    x86_avx512_kortestc_w,                     // llvm.x86.avx512.kortestc.w
    x86_avx512_kortestz_w,                     // llvm.x86.avx512.kortestz.w
    x86_avx512_kunpck_bw,                      // llvm.x86.avx512.kunpck.bw
    x86_avx512_kxnor_w,                        // llvm.x86.avx512.kxnor.w
    x86_avx512_kxor_w,                         // llvm.x86.avx512.kxor.w
    x86_avx512_mask_blend_d_512,               // llvm.x86.avx512.mask.blend.d.512
    x86_avx512_mask_blend_pd_512,              // llvm.x86.avx512.mask.blend.pd.512
    x86_avx512_mask_blend_ps_512,              // llvm.x86.avx512.mask.blend.ps.512
    x86_avx512_mask_blend_q_512,               // llvm.x86.avx512.mask.blend.q.512
    x86_avx512_mask_cmp_pd_512,                // llvm.x86.avx512.mask.cmp.pd.512
    x86_avx512_mask_cmp_ps_512,                // llvm.x86.avx512.mask.cmp.ps.512
    x86_avx512_mask_conflict_d_512,            // llvm.x86.avx512.mask.conflict.d.512
    x86_avx512_mask_conflict_q_512,            // llvm.x86.avx512.mask.conflict.q.512
    x86_avx512_mask_cvtdq2pd_512,              // llvm.x86.avx512.mask.cvtdq2pd.512
    x86_avx512_mask_cvtdq2ps_512,              // llvm.x86.avx512.mask.cvtdq2ps.512
    x86_avx512_mask_cvtpd2dq_512,              // llvm.x86.avx512.mask.cvtpd2dq.512
    x86_avx512_mask_cvtpd2ps_512,              // llvm.x86.avx512.mask.cvtpd2ps.512
    x86_avx512_mask_cvtpd2udq_512,             // llvm.x86.avx512.mask.cvtpd2udq.512
    x86_avx512_mask_cvtps2dq_512,              // llvm.x86.avx512.mask.cvtps2dq.512
    x86_avx512_mask_cvtps2udq_512,             // llvm.x86.avx512.mask.cvtps2udq.512
    x86_avx512_mask_cvttpd2dq_512,             // llvm.x86.avx512.mask.cvttpd2dq.512
    x86_avx512_mask_cvttpd2udq_512,            // llvm.x86.avx512.mask.cvttpd2udq.512
    x86_avx512_mask_cvttps2dq_512,             // llvm.x86.avx512.mask.cvttps2dq.512
    x86_avx512_mask_cvttps2udq_512,            // llvm.x86.avx512.mask.cvttps2udq.512
    x86_avx512_mask_cvtudq2pd_512,             // llvm.x86.avx512.mask.cvtudq2pd.512
    x86_avx512_mask_cvtudq2ps_512,             // llvm.x86.avx512.mask.cvtudq2ps.512
    x86_avx512_mask_loadu_d_512,               // llvm.x86.avx512.mask.loadu.d.512
    x86_avx512_mask_loadu_pd_512,              // llvm.x86.avx512.mask.loadu.pd.512
    x86_avx512_mask_loadu_ps_512,              // llvm.x86.avx512.mask.loadu.ps.512
    x86_avx512_mask_loadu_q_512,               // llvm.x86.avx512.mask.loadu.q.512
    x86_avx512_mask_lzcnt_d_512,               // llvm.x86.avx512.mask.lzcnt.d.512
    x86_avx512_mask_lzcnt_q_512,               // llvm.x86.avx512.mask.lzcnt.q.512
    x86_avx512_mask_max_pd_512,                // llvm.x86.avx512.mask.max.pd.512
    x86_avx512_mask_max_ps_512,                // llvm.x86.avx512.mask.max.ps.512
    x86_avx512_mask_min_pd_512,                // llvm.x86.avx512.mask.min.pd.512
    x86_avx512_mask_min_ps_512,                // llvm.x86.avx512.mask.min.ps.512
    x86_avx512_mask_pabs_d_512,                // llvm.x86.avx512.mask.pabs.d.512
    x86_avx512_mask_pabs_q_512,                // llvm.x86.avx512.mask.pabs.q.512
    x86_avx512_mask_pand_d_512,                // llvm.x86.avx512.mask.pand.d.512
    x86_avx512_mask_pand_q_512,                // llvm.x86.avx512.mask.pand.q.512
    x86_avx512_mask_pbroadcast_d_gpr_512,      // llvm.x86.avx512.mask.pbroadcast.d.gpr.512
    x86_avx512_mask_pbroadcast_q_gpr_512,      // llvm.x86.avx512.mask.pbroadcast.q.gpr.512
    x86_avx512_mask_pbroadcast_q_mem_512,      // llvm.x86.avx512.mask.pbroadcast.q.mem.512
    x86_avx512_mask_pcmpeq_d_512,              // llvm.x86.avx512.mask.pcmpeq.d.512
    x86_avx512_mask_pcmpeq_q_512,              // llvm.x86.avx512.mask.pcmpeq.q.512
    x86_avx512_mask_pmaxs_d_512,               // llvm.x86.avx512.mask.pmaxs.d.512
    x86_avx512_mask_pmaxs_q_512,               // llvm.x86.avx512.mask.pmaxs.q.512
    x86_avx512_mask_pmaxu_d_512,               // llvm.x86.avx512.mask.pmaxu.d.512
    x86_avx512_mask_pmaxu_q_512,               // llvm.x86.avx512.mask.pmaxu.q.512
    x86_avx512_mask_pmins_d_512,               // llvm.x86.avx512.mask.pmins.d.512
    x86_avx512_mask_pmins_q_512,               // llvm.x86.avx512.mask.pmins.q.512
    x86_avx512_mask_pminu_d_512,               // llvm.x86.avx512.mask.pminu.d.512
    x86_avx512_mask_pminu_q_512,               // llvm.x86.avx512.mask.pminu.q.512
    x86_avx512_mask_pmul_dq_512,               // llvm.x86.avx512.mask.pmul.dq.512
    x86_avx512_mask_pmulu_dq_512,              // llvm.x86.avx512.mask.pmulu.dq.512
    x86_avx512_mask_ptestm_d_512,              // llvm.x86.avx512.mask.ptestm.d.512
    x86_avx512_mask_ptestm_q_512,              // llvm.x86.avx512.mask.ptestm.q.512
    x86_avx512_mask_rndscale_pd_512,           // llvm.x86.avx512.mask.rndscale.pd.512
    x86_avx512_mask_rndscale_ps_512,           // llvm.x86.avx512.mask.rndscale.ps.512
    x86_avx512_mask_storeu_d_512,              // llvm.x86.avx512.mask.storeu.d.512
    x86_avx512_mask_storeu_pd_512,             // llvm.x86.avx512.mask.storeu.pd.512
    x86_avx512_mask_storeu_ps_512,             // llvm.x86.avx512.mask.storeu.ps.512
    x86_avx512_mask_storeu_q_512,              // llvm.x86.avx512.mask.storeu.q.512
    x86_avx512_mask_vcvtph2ps_512,             // llvm.x86.avx512.mask.vcvtph2ps.512
    x86_avx512_mask_vcvtps2ph_512,             // llvm.x86.avx512.mask.vcvtps2ph.512
    x86_avx512_mask_vpermt_d_512,              // llvm.x86.avx512.mask.vpermt.d.512
    x86_avx512_mask_vpermt_pd_512,             // llvm.x86.avx512.mask.vpermt.pd.512
    x86_avx512_mask_vpermt_ps_512,             // llvm.x86.avx512.mask.vpermt.ps.512
    x86_avx512_mask_vpermt_q_512,              // llvm.x86.avx512.mask.vpermt.q.512
    x86_avx512_movntdqa,                       // llvm.x86.avx512.movntdqa
    x86_avx512_pbroadcastd_512,                // llvm.x86.avx512.pbroadcastd.512
    x86_avx512_pbroadcastd_i32_512,            // llvm.x86.avx512.pbroadcastd.i32.512
    x86_avx512_pbroadcastq_512,                // llvm.x86.avx512.pbroadcastq.512
    x86_avx512_pbroadcastq_i64_512,            // llvm.x86.avx512.pbroadcastq.i64.512
    x86_avx512_pmovzxbd,                       // llvm.x86.avx512.pmovzxbd
    x86_avx512_pmovzxbq,                       // llvm.x86.avx512.pmovzxbq
    x86_avx512_pmovzxdq,                       // llvm.x86.avx512.pmovzxdq
    x86_avx512_pmovzxwd,                       // llvm.x86.avx512.pmovzxwd
    x86_avx512_pmovzxwq,                       // llvm.x86.avx512.pmovzxwq
    x86_avx512_psll_dq,                        // llvm.x86.avx512.psll.dq
    x86_avx512_psll_dq_bs,                     // llvm.x86.avx512.psll.dq.bs
    x86_avx512_psrl_dq,                        // llvm.x86.avx512.psrl.dq
    x86_avx512_psrl_dq_bs,                     // llvm.x86.avx512.psrl.dq.bs
    x86_avx512_rcp14_pd_512,                   // llvm.x86.avx512.rcp14.pd.512
    x86_avx512_rcp14_ps_512,                   // llvm.x86.avx512.rcp14.ps.512
    x86_avx512_rcp14_sd,                       // llvm.x86.avx512.rcp14.sd
    x86_avx512_rcp14_ss,                       // llvm.x86.avx512.rcp14.ss
    x86_avx512_rcp28_pd,                       // llvm.x86.avx512.rcp28.pd
    x86_avx512_rcp28_ps,                       // llvm.x86.avx512.rcp28.ps
    x86_avx512_rcp28_sd,                       // llvm.x86.avx512.rcp28.sd
    x86_avx512_rcp28_ss,                       // llvm.x86.avx512.rcp28.ss
    x86_avx512_rndscale_sd,                    // llvm.x86.avx512.rndscale.sd
    x86_avx512_rndscale_ss,                    // llvm.x86.avx512.rndscale.ss
    x86_avx512_rsqrt14_pd_512,                 // llvm.x86.avx512.rsqrt14.pd.512
    x86_avx512_rsqrt14_ps_512,                 // llvm.x86.avx512.rsqrt14.ps.512
    x86_avx512_rsqrt14_sd,                     // llvm.x86.avx512.rsqrt14.sd
    x86_avx512_rsqrt14_ss,                     // llvm.x86.avx512.rsqrt14.ss
    x86_avx512_rsqrt28_pd,                     // llvm.x86.avx512.rsqrt28.pd
    x86_avx512_rsqrt28_ps,                     // llvm.x86.avx512.rsqrt28.ps
    x86_avx512_rsqrt28_sd,                     // llvm.x86.avx512.rsqrt28.sd
    x86_avx512_rsqrt28_ss,                     // llvm.x86.avx512.rsqrt28.ss
    x86_avx512_scatter_dpd_512,                // llvm.x86.avx512.scatter.dpd.512
    x86_avx512_scatter_dpi_512,                // llvm.x86.avx512.scatter.dpi.512
    x86_avx512_scatter_dpq_512,                // llvm.x86.avx512.scatter.dpq.512
    x86_avx512_scatter_dps_512,                // llvm.x86.avx512.scatter.dps.512
    x86_avx512_scatter_qpd_512,                // llvm.x86.avx512.scatter.qpd.512
    x86_avx512_scatter_qpi_512,                // llvm.x86.avx512.scatter.qpi.512
    x86_avx512_scatter_qpq_512,                // llvm.x86.avx512.scatter.qpq.512
    x86_avx512_scatter_qps_512,                // llvm.x86.avx512.scatter.qps.512
    x86_avx512_scatterpf_dpd_512,              // llvm.x86.avx512.scatterpf.dpd.512
    x86_avx512_scatterpf_dps_512,              // llvm.x86.avx512.scatterpf.dps.512
    x86_avx512_scatterpf_qpd_512,              // llvm.x86.avx512.scatterpf.qpd.512
    x86_avx512_scatterpf_qps_512,              // llvm.x86.avx512.scatterpf.qps.512
    x86_avx512_sqrt_pd_512,                    // llvm.x86.avx512.sqrt.pd.512
    x86_avx512_sqrt_ps_512,                    // llvm.x86.avx512.sqrt.ps.512
    x86_avx512_sqrt_sd,                        // llvm.x86.avx512.sqrt.sd
    x86_avx512_sqrt_ss,                        // llvm.x86.avx512.sqrt.ss
    x86_avx512_vbroadcast_sd_512,              // llvm.x86.avx512.vbroadcast.sd.512
    x86_avx512_vbroadcast_sd_pd_512,           // llvm.x86.avx512.vbroadcast.sd.pd.512
    x86_avx512_vbroadcast_ss_512,              // llvm.x86.avx512.vbroadcast.ss.512
    x86_avx512_vbroadcast_ss_ps_512,           // llvm.x86.avx512.vbroadcast.ss.ps.512
    x86_avx_addsub_pd_256,                     // llvm.x86.avx.addsub.pd.256
    x86_avx_addsub_ps_256,                     // llvm.x86.avx.addsub.ps.256
    x86_avx_blend_pd_256,                      // llvm.x86.avx.blend.pd.256
    x86_avx_blend_ps_256,                      // llvm.x86.avx.blend.ps.256
    x86_avx_blendv_pd_256,                     // llvm.x86.avx.blendv.pd.256
    x86_avx_blendv_ps_256,                     // llvm.x86.avx.blendv.ps.256
    x86_avx_cmp_pd_256,                        // llvm.x86.avx.cmp.pd.256
    x86_avx_cmp_ps_256,                        // llvm.x86.avx.cmp.ps.256
    x86_avx_cvt_pd2_ps_256,                    // llvm.x86.avx.cvt.pd2.ps.256
    x86_avx_cvt_pd2dq_256,                     // llvm.x86.avx.cvt.pd2dq.256
    x86_avx_cvt_ps2_pd_256,                    // llvm.x86.avx.cvt.ps2.pd.256
    x86_avx_cvt_ps2dq_256,                     // llvm.x86.avx.cvt.ps2dq.256
    x86_avx_cvtdq2_pd_256,                     // llvm.x86.avx.cvtdq2.pd.256
    x86_avx_cvtdq2_ps_256,                     // llvm.x86.avx.cvtdq2.ps.256
    x86_avx_cvtt_pd2dq_256,                    // llvm.x86.avx.cvtt.pd2dq.256
    x86_avx_cvtt_ps2dq_256,                    // llvm.x86.avx.cvtt.ps2dq.256
    x86_avx_dp_ps_256,                         // llvm.x86.avx.dp.ps.256
    x86_avx_hadd_pd_256,                       // llvm.x86.avx.hadd.pd.256
    x86_avx_hadd_ps_256,                       // llvm.x86.avx.hadd.ps.256
    x86_avx_hsub_pd_256,                       // llvm.x86.avx.hsub.pd.256
    x86_avx_hsub_ps_256,                       // llvm.x86.avx.hsub.ps.256
    x86_avx_ldu_dq_256,                        // llvm.x86.avx.ldu.dq.256
    x86_avx_maskload_pd,                       // llvm.x86.avx.maskload.pd
    x86_avx_maskload_pd_256,                   // llvm.x86.avx.maskload.pd.256
    x86_avx_maskload_ps,                       // llvm.x86.avx.maskload.ps
    x86_avx_maskload_ps_256,                   // llvm.x86.avx.maskload.ps.256
    x86_avx_maskstore_pd,                      // llvm.x86.avx.maskstore.pd
    x86_avx_maskstore_pd_256,                  // llvm.x86.avx.maskstore.pd.256
    x86_avx_maskstore_ps,                      // llvm.x86.avx.maskstore.ps
    x86_avx_maskstore_ps_256,                  // llvm.x86.avx.maskstore.ps.256
    x86_avx_max_pd_256,                        // llvm.x86.avx.max.pd.256
    x86_avx_max_ps_256,                        // llvm.x86.avx.max.ps.256
    x86_avx_min_pd_256,                        // llvm.x86.avx.min.pd.256
    x86_avx_min_ps_256,                        // llvm.x86.avx.min.ps.256
    x86_avx_movmsk_pd_256,                     // llvm.x86.avx.movmsk.pd.256
    x86_avx_movmsk_ps_256,                     // llvm.x86.avx.movmsk.ps.256
    x86_avx_ptestc_256,                        // llvm.x86.avx.ptestc.256
    x86_avx_ptestnzc_256,                      // llvm.x86.avx.ptestnzc.256
    x86_avx_ptestz_256,                        // llvm.x86.avx.ptestz.256
    x86_avx_rcp_ps_256,                        // llvm.x86.avx.rcp.ps.256
    x86_avx_round_pd_256,                      // llvm.x86.avx.round.pd.256
    x86_avx_round_ps_256,                      // llvm.x86.avx.round.ps.256
    x86_avx_rsqrt_ps_256,                      // llvm.x86.avx.rsqrt.ps.256
    x86_avx_sqrt_pd_256,                       // llvm.x86.avx.sqrt.pd.256
    x86_avx_sqrt_ps_256,                       // llvm.x86.avx.sqrt.ps.256
    x86_avx_storeu_dq_256,                     // llvm.x86.avx.storeu.dq.256
    x86_avx_storeu_pd_256,                     // llvm.x86.avx.storeu.pd.256
    x86_avx_storeu_ps_256,                     // llvm.x86.avx.storeu.ps.256
    x86_avx_vbroadcastf128_pd_256,             // llvm.x86.avx.vbroadcastf128.pd.256
    x86_avx_vbroadcastf128_ps_256,             // llvm.x86.avx.vbroadcastf128.ps.256
    x86_avx_vextractf128_pd_256,               // llvm.x86.avx.vextractf128.pd.256
    x86_avx_vextractf128_ps_256,               // llvm.x86.avx.vextractf128.ps.256
    x86_avx_vextractf128_si_256,               // llvm.x86.avx.vextractf128.si.256
    x86_avx_vinsertf128_pd_256,                // llvm.x86.avx.vinsertf128.pd.256
    x86_avx_vinsertf128_ps_256,                // llvm.x86.avx.vinsertf128.ps.256
    x86_avx_vinsertf128_si_256,                // llvm.x86.avx.vinsertf128.si.256
    x86_avx_vperm2f128_pd_256,                 // llvm.x86.avx.vperm2f128.pd.256
    x86_avx_vperm2f128_ps_256,                 // llvm.x86.avx.vperm2f128.ps.256
    x86_avx_vperm2f128_si_256,                 // llvm.x86.avx.vperm2f128.si.256
    x86_avx_vpermilvar_pd,                     // llvm.x86.avx.vpermilvar.pd
    x86_avx_vpermilvar_pd_256,                 // llvm.x86.avx.vpermilvar.pd.256
    x86_avx_vpermilvar_ps,                     // llvm.x86.avx.vpermilvar.ps
    x86_avx_vpermilvar_ps_256,                 // llvm.x86.avx.vpermilvar.ps.256
    x86_avx_vtestc_pd,                         // llvm.x86.avx.vtestc.pd
    x86_avx_vtestc_pd_256,                     // llvm.x86.avx.vtestc.pd.256
    x86_avx_vtestc_ps,                         // llvm.x86.avx.vtestc.ps
    x86_avx_vtestc_ps_256,                     // llvm.x86.avx.vtestc.ps.256
    x86_avx_vtestnzc_pd,                       // llvm.x86.avx.vtestnzc.pd
    x86_avx_vtestnzc_pd_256,                   // llvm.x86.avx.vtestnzc.pd.256
    x86_avx_vtestnzc_ps,                       // llvm.x86.avx.vtestnzc.ps
    x86_avx_vtestnzc_ps_256,                   // llvm.x86.avx.vtestnzc.ps.256
    x86_avx_vtestz_pd,                         // llvm.x86.avx.vtestz.pd
    x86_avx_vtestz_pd_256,                     // llvm.x86.avx.vtestz.pd.256
    x86_avx_vtestz_ps,                         // llvm.x86.avx.vtestz.ps
    x86_avx_vtestz_ps_256,                     // llvm.x86.avx.vtestz.ps.256
    x86_avx_vzeroall,                          // llvm.x86.avx.vzeroall
    x86_avx_vzeroupper,                        // llvm.x86.avx.vzeroupper
    x86_bmi_bextr_32,                          // llvm.x86.bmi.bextr.32
    x86_bmi_bextr_64,                          // llvm.x86.bmi.bextr.64
    x86_bmi_bzhi_32,                           // llvm.x86.bmi.bzhi.32
    x86_bmi_bzhi_64,                           // llvm.x86.bmi.bzhi.64
    x86_bmi_pdep_32,                           // llvm.x86.bmi.pdep.32
    x86_bmi_pdep_64,                           // llvm.x86.bmi.pdep.64
    x86_bmi_pext_32,                           // llvm.x86.bmi.pext.32
    x86_bmi_pext_64,                           // llvm.x86.bmi.pext.64
    x86_fma_vfmadd_pd,                         // llvm.x86.fma.vfmadd.pd
    x86_fma_vfmadd_pd_256,                     // llvm.x86.fma.vfmadd.pd.256
    x86_fma_vfmadd_pd_512,                     // llvm.x86.fma.vfmadd.pd.512
    x86_fma_vfmadd_ps,                         // llvm.x86.fma.vfmadd.ps
    x86_fma_vfmadd_ps_256,                     // llvm.x86.fma.vfmadd.ps.256
    x86_fma_vfmadd_ps_512,                     // llvm.x86.fma.vfmadd.ps.512
    x86_fma_vfmadd_sd,                         // llvm.x86.fma.vfmadd.sd
    x86_fma_vfmadd_ss,                         // llvm.x86.fma.vfmadd.ss
    x86_fma_vfmaddsub_pd,                      // llvm.x86.fma.vfmaddsub.pd
    x86_fma_vfmaddsub_pd_256,                  // llvm.x86.fma.vfmaddsub.pd.256
    x86_fma_vfmaddsub_pd_512,                  // llvm.x86.fma.vfmaddsub.pd.512
    x86_fma_vfmaddsub_ps,                      // llvm.x86.fma.vfmaddsub.ps
    x86_fma_vfmaddsub_ps_256,                  // llvm.x86.fma.vfmaddsub.ps.256
    x86_fma_vfmaddsub_ps_512,                  // llvm.x86.fma.vfmaddsub.ps.512
    x86_fma_vfmsub_pd,                         // llvm.x86.fma.vfmsub.pd
    x86_fma_vfmsub_pd_256,                     // llvm.x86.fma.vfmsub.pd.256
    x86_fma_vfmsub_pd_512,                     // llvm.x86.fma.vfmsub.pd.512
    x86_fma_vfmsub_ps,                         // llvm.x86.fma.vfmsub.ps
    x86_fma_vfmsub_ps_256,                     // llvm.x86.fma.vfmsub.ps.256
    x86_fma_vfmsub_ps_512,                     // llvm.x86.fma.vfmsub.ps.512
    x86_fma_vfmsub_sd,                         // llvm.x86.fma.vfmsub.sd
    x86_fma_vfmsub_ss,                         // llvm.x86.fma.vfmsub.ss
    x86_fma_vfmsubadd_pd,                      // llvm.x86.fma.vfmsubadd.pd
    x86_fma_vfmsubadd_pd_256,                  // llvm.x86.fma.vfmsubadd.pd.256
    x86_fma_vfmsubadd_pd_512,                  // llvm.x86.fma.vfmsubadd.pd.512
    x86_fma_vfmsubadd_ps,                      // llvm.x86.fma.vfmsubadd.ps
    x86_fma_vfmsubadd_ps_256,                  // llvm.x86.fma.vfmsubadd.ps.256
    x86_fma_vfmsubadd_ps_512,                  // llvm.x86.fma.vfmsubadd.ps.512
    x86_fma_vfnmadd_pd,                        // llvm.x86.fma.vfnmadd.pd
    x86_fma_vfnmadd_pd_256,                    // llvm.x86.fma.vfnmadd.pd.256
    x86_fma_vfnmadd_pd_512,                    // llvm.x86.fma.vfnmadd.pd.512
    x86_fma_vfnmadd_ps,                        // llvm.x86.fma.vfnmadd.ps
    x86_fma_vfnmadd_ps_256,                    // llvm.x86.fma.vfnmadd.ps.256
    x86_fma_vfnmadd_ps_512,                    // llvm.x86.fma.vfnmadd.ps.512
    x86_fma_vfnmadd_sd,                        // llvm.x86.fma.vfnmadd.sd
    x86_fma_vfnmadd_ss,                        // llvm.x86.fma.vfnmadd.ss
    x86_fma_vfnmsub_pd,                        // llvm.x86.fma.vfnmsub.pd
    x86_fma_vfnmsub_pd_256,                    // llvm.x86.fma.vfnmsub.pd.256
    x86_fma_vfnmsub_pd_512,                    // llvm.x86.fma.vfnmsub.pd.512
    x86_fma_vfnmsub_ps,                        // llvm.x86.fma.vfnmsub.ps
    x86_fma_vfnmsub_ps_256,                    // llvm.x86.fma.vfnmsub.ps.256
    x86_fma_vfnmsub_ps_512,                    // llvm.x86.fma.vfnmsub.ps.512
    x86_fma_vfnmsub_sd,                        // llvm.x86.fma.vfnmsub.sd
    x86_fma_vfnmsub_ss,                        // llvm.x86.fma.vfnmsub.ss
    x86_int,                                   // llvm.x86.int
    x86_mmx_emms,                              // llvm.x86.mmx.emms
    x86_mmx_femms,                             // llvm.x86.mmx.femms
    x86_mmx_maskmovq,                          // llvm.x86.mmx.maskmovq
    x86_mmx_movnt_dq,                          // llvm.x86.mmx.movnt.dq
    x86_mmx_packssdw,                          // llvm.x86.mmx.packssdw
    x86_mmx_packsswb,                          // llvm.x86.mmx.packsswb
    x86_mmx_packuswb,                          // llvm.x86.mmx.packuswb
    x86_mmx_padd_b,                            // llvm.x86.mmx.padd.b
    x86_mmx_padd_d,                            // llvm.x86.mmx.padd.d
    x86_mmx_padd_q,                            // llvm.x86.mmx.padd.q
    x86_mmx_padd_w,                            // llvm.x86.mmx.padd.w
    x86_mmx_padds_b,                           // llvm.x86.mmx.padds.b
    x86_mmx_padds_w,                           // llvm.x86.mmx.padds.w
    x86_mmx_paddus_b,                          // llvm.x86.mmx.paddus.b
    x86_mmx_paddus_w,                          // llvm.x86.mmx.paddus.w
    x86_mmx_palignr_b,                         // llvm.x86.mmx.palignr.b
    x86_mmx_pand,                              // llvm.x86.mmx.pand
    x86_mmx_pandn,                             // llvm.x86.mmx.pandn
    x86_mmx_pavg_b,                            // llvm.x86.mmx.pavg.b
    x86_mmx_pavg_w,                            // llvm.x86.mmx.pavg.w
    x86_mmx_pcmpeq_b,                          // llvm.x86.mmx.pcmpeq.b
    x86_mmx_pcmpeq_d,                          // llvm.x86.mmx.pcmpeq.d
    x86_mmx_pcmpeq_w,                          // llvm.x86.mmx.pcmpeq.w
    x86_mmx_pcmpgt_b,                          // llvm.x86.mmx.pcmpgt.b
    x86_mmx_pcmpgt_d,                          // llvm.x86.mmx.pcmpgt.d
    x86_mmx_pcmpgt_w,                          // llvm.x86.mmx.pcmpgt.w
    x86_mmx_pextr_w,                           // llvm.x86.mmx.pextr.w
    x86_mmx_pinsr_w,                           // llvm.x86.mmx.pinsr.w
    x86_mmx_pmadd_wd,                          // llvm.x86.mmx.pmadd.wd
    x86_mmx_pmaxs_w,                           // llvm.x86.mmx.pmaxs.w
    x86_mmx_pmaxu_b,                           // llvm.x86.mmx.pmaxu.b
    x86_mmx_pmins_w,                           // llvm.x86.mmx.pmins.w
    x86_mmx_pminu_b,                           // llvm.x86.mmx.pminu.b
    x86_mmx_pmovmskb,                          // llvm.x86.mmx.pmovmskb
    x86_mmx_pmulh_w,                           // llvm.x86.mmx.pmulh.w
    x86_mmx_pmulhu_w,                          // llvm.x86.mmx.pmulhu.w
    x86_mmx_pmull_w,                           // llvm.x86.mmx.pmull.w
    x86_mmx_pmulu_dq,                          // llvm.x86.mmx.pmulu.dq
    x86_mmx_por,                               // llvm.x86.mmx.por
    x86_mmx_psad_bw,                           // llvm.x86.mmx.psad.bw
    x86_mmx_psll_d,                            // llvm.x86.mmx.psll.d
    x86_mmx_psll_q,                            // llvm.x86.mmx.psll.q
    x86_mmx_psll_w,                            // llvm.x86.mmx.psll.w
    x86_mmx_pslli_d,                           // llvm.x86.mmx.pslli.d
    x86_mmx_pslli_q,                           // llvm.x86.mmx.pslli.q
    x86_mmx_pslli_w,                           // llvm.x86.mmx.pslli.w
    x86_mmx_psra_d,                            // llvm.x86.mmx.psra.d
    x86_mmx_psra_w,                            // llvm.x86.mmx.psra.w
    x86_mmx_psrai_d,                           // llvm.x86.mmx.psrai.d
    x86_mmx_psrai_w,                           // llvm.x86.mmx.psrai.w
    x86_mmx_psrl_d,                            // llvm.x86.mmx.psrl.d
    x86_mmx_psrl_q,                            // llvm.x86.mmx.psrl.q
    x86_mmx_psrl_w,                            // llvm.x86.mmx.psrl.w
    x86_mmx_psrli_d,                           // llvm.x86.mmx.psrli.d
    x86_mmx_psrli_q,                           // llvm.x86.mmx.psrli.q
    x86_mmx_psrli_w,                           // llvm.x86.mmx.psrli.w
    x86_mmx_psub_b,                            // llvm.x86.mmx.psub.b
    x86_mmx_psub_d,                            // llvm.x86.mmx.psub.d
    x86_mmx_psub_q,                            // llvm.x86.mmx.psub.q
    x86_mmx_psub_w,                            // llvm.x86.mmx.psub.w
    x86_mmx_psubs_b,                           // llvm.x86.mmx.psubs.b
    x86_mmx_psubs_w,                           // llvm.x86.mmx.psubs.w
    x86_mmx_psubus_b,                          // llvm.x86.mmx.psubus.b
    x86_mmx_psubus_w,                          // llvm.x86.mmx.psubus.w
    x86_mmx_punpckhbw,                         // llvm.x86.mmx.punpckhbw
    x86_mmx_punpckhdq,                         // llvm.x86.mmx.punpckhdq
    x86_mmx_punpckhwd,                         // llvm.x86.mmx.punpckhwd
    x86_mmx_punpcklbw,                         // llvm.x86.mmx.punpcklbw
    x86_mmx_punpckldq,                         // llvm.x86.mmx.punpckldq
    x86_mmx_punpcklwd,                         // llvm.x86.mmx.punpcklwd
    x86_mmx_pxor,                              // llvm.x86.mmx.pxor
    x86_pclmulqdq,                             // llvm.x86.pclmulqdq
    x86_rdfsbase_32,                           // llvm.x86.rdfsbase.32
    x86_rdfsbase_64,                           // llvm.x86.rdfsbase.64
    x86_rdgsbase_32,                           // llvm.x86.rdgsbase.32
    x86_rdgsbase_64,                           // llvm.x86.rdgsbase.64
    x86_rdpmc,                                 // llvm.x86.rdpmc
    x86_rdrand_16,                             // llvm.x86.rdrand.16
    x86_rdrand_32,                             // llvm.x86.rdrand.32
    x86_rdrand_64,                             // llvm.x86.rdrand.64
    x86_rdseed_16,                             // llvm.x86.rdseed.16
    x86_rdseed_32,                             // llvm.x86.rdseed.32
    x86_rdseed_64,                             // llvm.x86.rdseed.64
    x86_rdtsc,                                 // llvm.x86.rdtsc
    x86_rdtscp,                                // llvm.x86.rdtscp
    x86_sha1msg1,                              // llvm.x86.sha1msg1
    x86_sha1msg2,                              // llvm.x86.sha1msg2
    x86_sha1nexte,                             // llvm.x86.sha1nexte
    x86_sha1rnds4,                             // llvm.x86.sha1rnds4
    x86_sha256msg1,                            // llvm.x86.sha256msg1
    x86_sha256msg2,                            // llvm.x86.sha256msg2
    x86_sha256rnds2,                           // llvm.x86.sha256rnds2
    x86_sse2_add_sd,                           // llvm.x86.sse2.add.sd
    x86_sse2_clflush,                          // llvm.x86.sse2.clflush
    x86_sse2_cmp_pd,                           // llvm.x86.sse2.cmp.pd
    x86_sse2_cmp_sd,                           // llvm.x86.sse2.cmp.sd
    x86_sse2_comieq_sd,                        // llvm.x86.sse2.comieq.sd
    x86_sse2_comige_sd,                        // llvm.x86.sse2.comige.sd
    x86_sse2_comigt_sd,                        // llvm.x86.sse2.comigt.sd
    x86_sse2_comile_sd,                        // llvm.x86.sse2.comile.sd
    x86_sse2_comilt_sd,                        // llvm.x86.sse2.comilt.sd
    x86_sse2_comineq_sd,                       // llvm.x86.sse2.comineq.sd
    x86_sse2_cvtdq2pd,                         // llvm.x86.sse2.cvtdq2pd
    x86_sse2_cvtdq2ps,                         // llvm.x86.sse2.cvtdq2ps
    x86_sse2_cvtpd2dq,                         // llvm.x86.sse2.cvtpd2dq
    x86_sse2_cvtpd2ps,                         // llvm.x86.sse2.cvtpd2ps
    x86_sse2_cvtps2dq,                         // llvm.x86.sse2.cvtps2dq
    x86_sse2_cvtps2pd,                         // llvm.x86.sse2.cvtps2pd
    x86_sse2_cvtsd2si,                         // llvm.x86.sse2.cvtsd2si
    x86_sse2_cvtsd2si64,                       // llvm.x86.sse2.cvtsd2si64
    x86_sse2_cvtsd2ss,                         // llvm.x86.sse2.cvtsd2ss
    x86_sse2_cvtsi2sd,                         // llvm.x86.sse2.cvtsi2sd
    x86_sse2_cvtsi642sd,                       // llvm.x86.sse2.cvtsi642sd
    x86_sse2_cvtss2sd,                         // llvm.x86.sse2.cvtss2sd
    x86_sse2_cvttpd2dq,                        // llvm.x86.sse2.cvttpd2dq
    x86_sse2_cvttps2dq,                        // llvm.x86.sse2.cvttps2dq
    x86_sse2_cvttsd2si,                        // llvm.x86.sse2.cvttsd2si
    x86_sse2_cvttsd2si64,                      // llvm.x86.sse2.cvttsd2si64
    x86_sse2_div_sd,                           // llvm.x86.sse2.div.sd
    x86_sse2_lfence,                           // llvm.x86.sse2.lfence
    x86_sse2_maskmov_dqu,                      // llvm.x86.sse2.maskmov.dqu
    x86_sse2_max_pd,                           // llvm.x86.sse2.max.pd
    x86_sse2_max_sd,                           // llvm.x86.sse2.max.sd
    x86_sse2_mfence,                           // llvm.x86.sse2.mfence
    x86_sse2_min_pd,                           // llvm.x86.sse2.min.pd
    x86_sse2_min_sd,                           // llvm.x86.sse2.min.sd
    x86_sse2_movmsk_pd,                        // llvm.x86.sse2.movmsk.pd
    x86_sse2_mul_sd,                           // llvm.x86.sse2.mul.sd
    x86_sse2_packssdw_128,                     // llvm.x86.sse2.packssdw.128
    x86_sse2_packsswb_128,                     // llvm.x86.sse2.packsswb.128
    x86_sse2_packuswb_128,                     // llvm.x86.sse2.packuswb.128
    x86_sse2_padds_b,                          // llvm.x86.sse2.padds.b
    x86_sse2_padds_w,                          // llvm.x86.sse2.padds.w
    x86_sse2_paddus_b,                         // llvm.x86.sse2.paddus.b
    x86_sse2_paddus_w,                         // llvm.x86.sse2.paddus.w
    x86_sse2_pause,                            // llvm.x86.sse2.pause
    x86_sse2_pavg_b,                           // llvm.x86.sse2.pavg.b
    x86_sse2_pavg_w,                           // llvm.x86.sse2.pavg.w
    x86_sse2_pmadd_wd,                         // llvm.x86.sse2.pmadd.wd
    x86_sse2_pmaxs_w,                          // llvm.x86.sse2.pmaxs.w
    x86_sse2_pmaxu_b,                          // llvm.x86.sse2.pmaxu.b
    x86_sse2_pmins_w,                          // llvm.x86.sse2.pmins.w
    x86_sse2_pminu_b,                          // llvm.x86.sse2.pminu.b
    x86_sse2_pmovmskb_128,                     // llvm.x86.sse2.pmovmskb.128
    x86_sse2_pmulh_w,                          // llvm.x86.sse2.pmulh.w
    x86_sse2_pmulhu_w,                         // llvm.x86.sse2.pmulhu.w
    x86_sse2_pmulu_dq,                         // llvm.x86.sse2.pmulu.dq
    x86_sse2_psad_bw,                          // llvm.x86.sse2.psad.bw
    x86_sse2_pshuf_d,                          // llvm.x86.sse2.pshuf.d
    x86_sse2_pshufh_w,                         // llvm.x86.sse2.pshufh.w
    x86_sse2_pshufl_w,                         // llvm.x86.sse2.pshufl.w
    x86_sse2_psll_d,                           // llvm.x86.sse2.psll.d
    x86_sse2_psll_dq,                          // llvm.x86.sse2.psll.dq
    x86_sse2_psll_dq_bs,                       // llvm.x86.sse2.psll.dq.bs
    x86_sse2_psll_q,                           // llvm.x86.sse2.psll.q
    x86_sse2_psll_w,                           // llvm.x86.sse2.psll.w
    x86_sse2_pslli_d,                          // llvm.x86.sse2.pslli.d
    x86_sse2_pslli_q,                          // llvm.x86.sse2.pslli.q
    x86_sse2_pslli_w,                          // llvm.x86.sse2.pslli.w
    x86_sse2_psra_d,                           // llvm.x86.sse2.psra.d
    x86_sse2_psra_w,                           // llvm.x86.sse2.psra.w
    x86_sse2_psrai_d,                          // llvm.x86.sse2.psrai.d
    x86_sse2_psrai_w,                          // llvm.x86.sse2.psrai.w
    x86_sse2_psrl_d,                           // llvm.x86.sse2.psrl.d
    x86_sse2_psrl_dq,                          // llvm.x86.sse2.psrl.dq
    x86_sse2_psrl_dq_bs,                       // llvm.x86.sse2.psrl.dq.bs
    x86_sse2_psrl_q,                           // llvm.x86.sse2.psrl.q
    x86_sse2_psrl_w,                           // llvm.x86.sse2.psrl.w
    x86_sse2_psrli_d,                          // llvm.x86.sse2.psrli.d
    x86_sse2_psrli_q,                          // llvm.x86.sse2.psrli.q
    x86_sse2_psrli_w,                          // llvm.x86.sse2.psrli.w
    x86_sse2_psubs_b,                          // llvm.x86.sse2.psubs.b
    x86_sse2_psubs_w,                          // llvm.x86.sse2.psubs.w
    x86_sse2_psubus_b,                         // llvm.x86.sse2.psubus.b
    x86_sse2_psubus_w,                         // llvm.x86.sse2.psubus.w
    x86_sse2_sqrt_pd,                          // llvm.x86.sse2.sqrt.pd
    x86_sse2_sqrt_sd,                          // llvm.x86.sse2.sqrt.sd
    x86_sse2_storel_dq,                        // llvm.x86.sse2.storel.dq
    x86_sse2_storeu_dq,                        // llvm.x86.sse2.storeu.dq
    x86_sse2_storeu_pd,                        // llvm.x86.sse2.storeu.pd
    x86_sse2_sub_sd,                           // llvm.x86.sse2.sub.sd
    x86_sse2_ucomieq_sd,                       // llvm.x86.sse2.ucomieq.sd
    x86_sse2_ucomige_sd,                       // llvm.x86.sse2.ucomige.sd
    x86_sse2_ucomigt_sd,                       // llvm.x86.sse2.ucomigt.sd
    x86_sse2_ucomile_sd,                       // llvm.x86.sse2.ucomile.sd
    x86_sse2_ucomilt_sd,                       // llvm.x86.sse2.ucomilt.sd
    x86_sse2_ucomineq_sd,                      // llvm.x86.sse2.ucomineq.sd
    x86_sse3_addsub_pd,                        // llvm.x86.sse3.addsub.pd
    x86_sse3_addsub_ps,                        // llvm.x86.sse3.addsub.ps
    x86_sse3_hadd_pd,                          // llvm.x86.sse3.hadd.pd
    x86_sse3_hadd_ps,                          // llvm.x86.sse3.hadd.ps
    x86_sse3_hsub_pd,                          // llvm.x86.sse3.hsub.pd
    x86_sse3_hsub_ps,                          // llvm.x86.sse3.hsub.ps
    x86_sse3_ldu_dq,                           // llvm.x86.sse3.ldu.dq
    x86_sse3_monitor,                          // llvm.x86.sse3.monitor
    x86_sse3_mwait,                            // llvm.x86.sse3.mwait
    x86_sse41_blendpd,                         // llvm.x86.sse41.blendpd
    x86_sse41_blendps,                         // llvm.x86.sse41.blendps
    x86_sse41_blendvpd,                        // llvm.x86.sse41.blendvpd
    x86_sse41_blendvps,                        // llvm.x86.sse41.blendvps
    x86_sse41_dppd,                            // llvm.x86.sse41.dppd
    x86_sse41_dpps,                            // llvm.x86.sse41.dpps
    x86_sse41_extractps,                       // llvm.x86.sse41.extractps
    x86_sse41_insertps,                        // llvm.x86.sse41.insertps
    x86_sse41_movntdqa,                        // llvm.x86.sse41.movntdqa
    x86_sse41_mpsadbw,                         // llvm.x86.sse41.mpsadbw
    x86_sse41_packusdw,                        // llvm.x86.sse41.packusdw
    x86_sse41_pblendvb,                        // llvm.x86.sse41.pblendvb
    x86_sse41_pblendw,                         // llvm.x86.sse41.pblendw
    x86_sse41_pextrb,                          // llvm.x86.sse41.pextrb
    x86_sse41_pextrd,                          // llvm.x86.sse41.pextrd
    x86_sse41_pextrq,                          // llvm.x86.sse41.pextrq
    x86_sse41_phminposuw,                      // llvm.x86.sse41.phminposuw
    x86_sse41_pmaxsb,                          // llvm.x86.sse41.pmaxsb
    x86_sse41_pmaxsd,                          // llvm.x86.sse41.pmaxsd
    x86_sse41_pmaxud,                          // llvm.x86.sse41.pmaxud
    x86_sse41_pmaxuw,                          // llvm.x86.sse41.pmaxuw
    x86_sse41_pminsb,                          // llvm.x86.sse41.pminsb
    x86_sse41_pminsd,                          // llvm.x86.sse41.pminsd
    x86_sse41_pminud,                          // llvm.x86.sse41.pminud
    x86_sse41_pminuw,                          // llvm.x86.sse41.pminuw
    x86_sse41_pmovsxbd,                        // llvm.x86.sse41.pmovsxbd
    x86_sse41_pmovsxbq,                        // llvm.x86.sse41.pmovsxbq
    x86_sse41_pmovsxbw,                        // llvm.x86.sse41.pmovsxbw
    x86_sse41_pmovsxdq,                        // llvm.x86.sse41.pmovsxdq
    x86_sse41_pmovsxwd,                        // llvm.x86.sse41.pmovsxwd
    x86_sse41_pmovsxwq,                        // llvm.x86.sse41.pmovsxwq
    x86_sse41_pmovzxbd,                        // llvm.x86.sse41.pmovzxbd
    x86_sse41_pmovzxbq,                        // llvm.x86.sse41.pmovzxbq
    x86_sse41_pmovzxbw,                        // llvm.x86.sse41.pmovzxbw
    x86_sse41_pmovzxdq,                        // llvm.x86.sse41.pmovzxdq
    x86_sse41_pmovzxwd,                        // llvm.x86.sse41.pmovzxwd
    x86_sse41_pmovzxwq,                        // llvm.x86.sse41.pmovzxwq
    x86_sse41_pmuldq,                          // llvm.x86.sse41.pmuldq
    x86_sse41_ptestc,                          // llvm.x86.sse41.ptestc
    x86_sse41_ptestnzc,                        // llvm.x86.sse41.ptestnzc
    x86_sse41_ptestz,                          // llvm.x86.sse41.ptestz
    x86_sse41_round_pd,                        // llvm.x86.sse41.round.pd
    x86_sse41_round_ps,                        // llvm.x86.sse41.round.ps
    x86_sse41_round_sd,                        // llvm.x86.sse41.round.sd
    x86_sse41_round_ss,                        // llvm.x86.sse41.round.ss
    x86_sse42_crc32_32_16,                     // llvm.x86.sse42.crc32.32.16
    x86_sse42_crc32_32_32,                     // llvm.x86.sse42.crc32.32.32
    x86_sse42_crc32_32_8,                      // llvm.x86.sse42.crc32.32.8
    x86_sse42_crc32_64_64,                     // llvm.x86.sse42.crc32.64.64
    x86_sse42_pcmpestri128,                    // llvm.x86.sse42.pcmpestri128
    x86_sse42_pcmpestria128,                   // llvm.x86.sse42.pcmpestria128
    x86_sse42_pcmpestric128,                   // llvm.x86.sse42.pcmpestric128
    x86_sse42_pcmpestrio128,                   // llvm.x86.sse42.pcmpestrio128
    x86_sse42_pcmpestris128,                   // llvm.x86.sse42.pcmpestris128
    x86_sse42_pcmpestriz128,                   // llvm.x86.sse42.pcmpestriz128
    x86_sse42_pcmpestrm128,                    // llvm.x86.sse42.pcmpestrm128
    x86_sse42_pcmpistri128,                    // llvm.x86.sse42.pcmpistri128
    x86_sse42_pcmpistria128,                   // llvm.x86.sse42.pcmpistria128
    x86_sse42_pcmpistric128,                   // llvm.x86.sse42.pcmpistric128
    x86_sse42_pcmpistrio128,                   // llvm.x86.sse42.pcmpistrio128
    x86_sse42_pcmpistris128,                   // llvm.x86.sse42.pcmpistris128
    x86_sse42_pcmpistriz128,                   // llvm.x86.sse42.pcmpistriz128
    x86_sse42_pcmpistrm128,                    // llvm.x86.sse42.pcmpistrm128
    x86_sse4a_extrq,                           // llvm.x86.sse4a.extrq
    x86_sse4a_extrqi,                          // llvm.x86.sse4a.extrqi
    x86_sse4a_insertq,                         // llvm.x86.sse4a.insertq
    x86_sse4a_insertqi,                        // llvm.x86.sse4a.insertqi
    x86_sse4a_movnt_sd,                        // llvm.x86.sse4a.movnt.sd
    x86_sse4a_movnt_ss,                        // llvm.x86.sse4a.movnt.ss
    x86_sse_add_ss,                            // llvm.x86.sse.add.ss
    x86_sse_cmp_ps,                            // llvm.x86.sse.cmp.ps
    x86_sse_cmp_ss,                            // llvm.x86.sse.cmp.ss
    x86_sse_comieq_ss,                         // llvm.x86.sse.comieq.ss
    x86_sse_comige_ss,                         // llvm.x86.sse.comige.ss
    x86_sse_comigt_ss,                         // llvm.x86.sse.comigt.ss
    x86_sse_comile_ss,                         // llvm.x86.sse.comile.ss
    x86_sse_comilt_ss,                         // llvm.x86.sse.comilt.ss
    x86_sse_comineq_ss,                        // llvm.x86.sse.comineq.ss
    x86_sse_cvtpd2pi,                          // llvm.x86.sse.cvtpd2pi
    x86_sse_cvtpi2pd,                          // llvm.x86.sse.cvtpi2pd
    x86_sse_cvtpi2ps,                          // llvm.x86.sse.cvtpi2ps
    x86_sse_cvtps2pi,                          // llvm.x86.sse.cvtps2pi
    x86_sse_cvtsi2ss,                          // llvm.x86.sse.cvtsi2ss
    x86_sse_cvtsi642ss,                        // llvm.x86.sse.cvtsi642ss
    x86_sse_cvtss2si,                          // llvm.x86.sse.cvtss2si
    x86_sse_cvtss2si64,                        // llvm.x86.sse.cvtss2si64
    x86_sse_cvttpd2pi,                         // llvm.x86.sse.cvttpd2pi
    x86_sse_cvttps2pi,                         // llvm.x86.sse.cvttps2pi
    x86_sse_cvttss2si,                         // llvm.x86.sse.cvttss2si
    x86_sse_cvttss2si64,                       // llvm.x86.sse.cvttss2si64
    x86_sse_div_ss,                            // llvm.x86.sse.div.ss
    x86_sse_ldmxcsr,                           // llvm.x86.sse.ldmxcsr
    x86_sse_max_ps,                            // llvm.x86.sse.max.ps
    x86_sse_max_ss,                            // llvm.x86.sse.max.ss
    x86_sse_min_ps,                            // llvm.x86.sse.min.ps
    x86_sse_min_ss,                            // llvm.x86.sse.min.ss
    x86_sse_movmsk_ps,                         // llvm.x86.sse.movmsk.ps
    x86_sse_mul_ss,                            // llvm.x86.sse.mul.ss
    x86_sse_pshuf_w,                           // llvm.x86.sse.pshuf.w
    x86_sse_rcp_ps,                            // llvm.x86.sse.rcp.ps
    x86_sse_rcp_ss,                            // llvm.x86.sse.rcp.ss
    x86_sse_rsqrt_ps,                          // llvm.x86.sse.rsqrt.ps
    x86_sse_rsqrt_ss,                          // llvm.x86.sse.rsqrt.ss
    x86_sse_sfence,                            // llvm.x86.sse.sfence
    x86_sse_sqrt_ps,                           // llvm.x86.sse.sqrt.ps
    x86_sse_sqrt_ss,                           // llvm.x86.sse.sqrt.ss
    x86_sse_stmxcsr,                           // llvm.x86.sse.stmxcsr
    x86_sse_storeu_ps,                         // llvm.x86.sse.storeu.ps
    x86_sse_sub_ss,                            // llvm.x86.sse.sub.ss
    x86_sse_ucomieq_ss,                        // llvm.x86.sse.ucomieq.ss
    x86_sse_ucomige_ss,                        // llvm.x86.sse.ucomige.ss
    x86_sse_ucomigt_ss,                        // llvm.x86.sse.ucomigt.ss
    x86_sse_ucomile_ss,                        // llvm.x86.sse.ucomile.ss
    x86_sse_ucomilt_ss,                        // llvm.x86.sse.ucomilt.ss
    x86_sse_ucomineq_ss,                       // llvm.x86.sse.ucomineq.ss
    x86_ssse3_pabs_b,                          // llvm.x86.ssse3.pabs.b
    x86_ssse3_pabs_b_128,                      // llvm.x86.ssse3.pabs.b.128
    x86_ssse3_pabs_d,                          // llvm.x86.ssse3.pabs.d
    x86_ssse3_pabs_d_128,                      // llvm.x86.ssse3.pabs.d.128
    x86_ssse3_pabs_w,                          // llvm.x86.ssse3.pabs.w
    x86_ssse3_pabs_w_128,                      // llvm.x86.ssse3.pabs.w.128
    x86_ssse3_phadd_d,                         // llvm.x86.ssse3.phadd.d
    x86_ssse3_phadd_d_128,                     // llvm.x86.ssse3.phadd.d.128
    x86_ssse3_phadd_sw,                        // llvm.x86.ssse3.phadd.sw
    x86_ssse3_phadd_sw_128,                    // llvm.x86.ssse3.phadd.sw.128
    x86_ssse3_phadd_w,                         // llvm.x86.ssse3.phadd.w
    x86_ssse3_phadd_w_128,                     // llvm.x86.ssse3.phadd.w.128
    x86_ssse3_phsub_d,                         // llvm.x86.ssse3.phsub.d
    x86_ssse3_phsub_d_128,                     // llvm.x86.ssse3.phsub.d.128
    x86_ssse3_phsub_sw,                        // llvm.x86.ssse3.phsub.sw
    x86_ssse3_phsub_sw_128,                    // llvm.x86.ssse3.phsub.sw.128
    x86_ssse3_phsub_w,                         // llvm.x86.ssse3.phsub.w
    x86_ssse3_phsub_w_128,                     // llvm.x86.ssse3.phsub.w.128
    x86_ssse3_pmadd_ub_sw,                     // llvm.x86.ssse3.pmadd.ub.sw
    x86_ssse3_pmadd_ub_sw_128,                 // llvm.x86.ssse3.pmadd.ub.sw.128
    x86_ssse3_pmul_hr_sw,                      // llvm.x86.ssse3.pmul.hr.sw
    x86_ssse3_pmul_hr_sw_128,                  // llvm.x86.ssse3.pmul.hr.sw.128
    x86_ssse3_pshuf_b,                         // llvm.x86.ssse3.pshuf.b
    x86_ssse3_pshuf_b_128,                     // llvm.x86.ssse3.pshuf.b.128
    x86_ssse3_psign_b,                         // llvm.x86.ssse3.psign.b
    x86_ssse3_psign_b_128,                     // llvm.x86.ssse3.psign.b.128
    x86_ssse3_psign_d,                         // llvm.x86.ssse3.psign.d
    x86_ssse3_psign_d_128,                     // llvm.x86.ssse3.psign.d.128
    x86_ssse3_psign_w,                         // llvm.x86.ssse3.psign.w
    x86_ssse3_psign_w_128,                     // llvm.x86.ssse3.psign.w.128
    x86_tbm_bextri_u32,                        // llvm.x86.tbm.bextri.u32
    x86_tbm_bextri_u64,                        // llvm.x86.tbm.bextri.u64
    x86_vcvtph2ps_128,                         // llvm.x86.vcvtph2ps.128
    x86_vcvtph2ps_256,                         // llvm.x86.vcvtph2ps.256
    x86_vcvtps2ph_128,                         // llvm.x86.vcvtps2ph.128
    x86_vcvtps2ph_256,                         // llvm.x86.vcvtps2ph.256
    x86_wrfsbase_32,                           // llvm.x86.wrfsbase.32
    x86_wrfsbase_64,                           // llvm.x86.wrfsbase.64
    x86_wrgsbase_32,                           // llvm.x86.wrgsbase.32
    x86_wrgsbase_64,                           // llvm.x86.wrgsbase.64
    x86_xabort,                                // llvm.x86.xabort
    x86_xbegin,                                // llvm.x86.xbegin
    x86_xend,                                  // llvm.x86.xend
    x86_xop_vfrcz_pd,                          // llvm.x86.xop.vfrcz.pd
    x86_xop_vfrcz_pd_256,                      // llvm.x86.xop.vfrcz.pd.256
    x86_xop_vfrcz_ps,                          // llvm.x86.xop.vfrcz.ps
    x86_xop_vfrcz_ps_256,                      // llvm.x86.xop.vfrcz.ps.256
    x86_xop_vfrcz_sd,                          // llvm.x86.xop.vfrcz.sd
    x86_xop_vfrcz_ss,                          // llvm.x86.xop.vfrcz.ss
    x86_xop_vpcmov,                            // llvm.x86.xop.vpcmov
    x86_xop_vpcmov_256,                        // llvm.x86.xop.vpcmov.256
    x86_xop_vpcomb,                            // llvm.x86.xop.vpcomb
    x86_xop_vpcomd,                            // llvm.x86.xop.vpcomd
    x86_xop_vpcomq,                            // llvm.x86.xop.vpcomq
    x86_xop_vpcomub,                           // llvm.x86.xop.vpcomub
    x86_xop_vpcomud,                           // llvm.x86.xop.vpcomud
    x86_xop_vpcomuq,                           // llvm.x86.xop.vpcomuq
    x86_xop_vpcomuw,                           // llvm.x86.xop.vpcomuw
    x86_xop_vpcomw,                            // llvm.x86.xop.vpcomw
    x86_xop_vpermil2pd,                        // llvm.x86.xop.vpermil2pd
    x86_xop_vpermil2pd_256,                    // llvm.x86.xop.vpermil2pd.256
    x86_xop_vpermil2ps,                        // llvm.x86.xop.vpermil2ps
    x86_xop_vpermil2ps_256,                    // llvm.x86.xop.vpermil2ps.256
    x86_xop_vphaddbd,                          // llvm.x86.xop.vphaddbd
    x86_xop_vphaddbq,                          // llvm.x86.xop.vphaddbq
    x86_xop_vphaddbw,                          // llvm.x86.xop.vphaddbw
    x86_xop_vphadddq,                          // llvm.x86.xop.vphadddq
    x86_xop_vphaddubd,                         // llvm.x86.xop.vphaddubd
    x86_xop_vphaddubq,                         // llvm.x86.xop.vphaddubq
    x86_xop_vphaddubw,                         // llvm.x86.xop.vphaddubw
    x86_xop_vphaddudq,                         // llvm.x86.xop.vphaddudq
    x86_xop_vphadduwd,                         // llvm.x86.xop.vphadduwd
    x86_xop_vphadduwq,                         // llvm.x86.xop.vphadduwq
    x86_xop_vphaddwd,                          // llvm.x86.xop.vphaddwd
    x86_xop_vphaddwq,                          // llvm.x86.xop.vphaddwq
    x86_xop_vphsubbw,                          // llvm.x86.xop.vphsubbw
    x86_xop_vphsubdq,                          // llvm.x86.xop.vphsubdq
    x86_xop_vphsubwd,                          // llvm.x86.xop.vphsubwd
    x86_xop_vpmacsdd,                          // llvm.x86.xop.vpmacsdd
    x86_xop_vpmacsdqh,                         // llvm.x86.xop.vpmacsdqh
    x86_xop_vpmacsdql,                         // llvm.x86.xop.vpmacsdql
    x86_xop_vpmacssdd,                         // llvm.x86.xop.vpmacssdd
    x86_xop_vpmacssdqh,                        // llvm.x86.xop.vpmacssdqh
    x86_xop_vpmacssdql,                        // llvm.x86.xop.vpmacssdql
    x86_xop_vpmacsswd,                         // llvm.x86.xop.vpmacsswd
    x86_xop_vpmacssww,                         // llvm.x86.xop.vpmacssww
    x86_xop_vpmacswd,                          // llvm.x86.xop.vpmacswd
    x86_xop_vpmacsww,                          // llvm.x86.xop.vpmacsww
    x86_xop_vpmadcsswd,                        // llvm.x86.xop.vpmadcsswd
    x86_xop_vpmadcswd,                         // llvm.x86.xop.vpmadcswd
    x86_xop_vpperm,                            // llvm.x86.xop.vpperm
    x86_xop_vprotb,                            // llvm.x86.xop.vprotb
    x86_xop_vprotbi,                           // llvm.x86.xop.vprotbi
    x86_xop_vprotd,                            // llvm.x86.xop.vprotd
    x86_xop_vprotdi,                           // llvm.x86.xop.vprotdi
    x86_xop_vprotq,                            // llvm.x86.xop.vprotq
    x86_xop_vprotqi,                           // llvm.x86.xop.vprotqi
    x86_xop_vprotw,                            // llvm.x86.xop.vprotw
    x86_xop_vprotwi,                           // llvm.x86.xop.vprotwi
    x86_xop_vpshab,                            // llvm.x86.xop.vpshab
    x86_xop_vpshad,                            // llvm.x86.xop.vpshad
    x86_xop_vpshaq,                            // llvm.x86.xop.vpshaq
    x86_xop_vpshaw,                            // llvm.x86.xop.vpshaw
    x86_xop_vpshlb,                            // llvm.x86.xop.vpshlb
    x86_xop_vpshld,                            // llvm.x86.xop.vpshld
    x86_xop_vpshlq,                            // llvm.x86.xop.vpshlq
    x86_xop_vpshlw,                            // llvm.x86.xop.vpshlw
    x86_xtest,                                 // llvm.x86.xtest
    xcore_bitrev,                              // llvm.xcore.bitrev
    xcore_checkevent,                          // llvm.xcore.checkevent
    xcore_chkct,                               // llvm.xcore.chkct
    xcore_clre,                                // llvm.xcore.clre
    xcore_clrpt,                               // llvm.xcore.clrpt
    xcore_clrsr,                               // llvm.xcore.clrsr
    xcore_crc32,                               // llvm.xcore.crc32
    xcore_crc8,                                // llvm.xcore.crc8
    xcore_edu,                                 // llvm.xcore.edu
    xcore_eeu,                                 // llvm.xcore.eeu
    xcore_endin,                               // llvm.xcore.endin
    xcore_freer,                               // llvm.xcore.freer
    xcore_geted,                               // llvm.xcore.geted
    xcore_getet,                               // llvm.xcore.getet
    xcore_getid,                               // llvm.xcore.getid
    xcore_getps,                               // llvm.xcore.getps
    xcore_getr,                                // llvm.xcore.getr
    xcore_getst,                               // llvm.xcore.getst
    xcore_getts,                               // llvm.xcore.getts
    xcore_in,                                  // llvm.xcore.in
    xcore_inct,                                // llvm.xcore.inct
    xcore_initcp,                              // llvm.xcore.initcp
    xcore_initdp,                              // llvm.xcore.initdp
    xcore_initlr,                              // llvm.xcore.initlr
    xcore_initpc,                              // llvm.xcore.initpc
    xcore_initsp,                              // llvm.xcore.initsp
    xcore_inshr,                               // llvm.xcore.inshr
    xcore_int,                                 // llvm.xcore.int
    xcore_mjoin,                               // llvm.xcore.mjoin
    xcore_msync,                               // llvm.xcore.msync
    xcore_out,                                 // llvm.xcore.out
    xcore_outct,                               // llvm.xcore.outct
    xcore_outshr,                              // llvm.xcore.outshr
    xcore_outt,                                // llvm.xcore.outt
    xcore_peek,                                // llvm.xcore.peek
    xcore_setc,                                // llvm.xcore.setc
    xcore_setclk,                              // llvm.xcore.setclk
    xcore_setd,                                // llvm.xcore.setd
    xcore_setev,                               // llvm.xcore.setev
    xcore_setps,                               // llvm.xcore.setps
    xcore_setpsc,                              // llvm.xcore.setpsc
    xcore_setpt,                               // llvm.xcore.setpt
    xcore_setrdy,                              // llvm.xcore.setrdy
    xcore_setsr,                               // llvm.xcore.setsr
    xcore_settw,                               // llvm.xcore.settw
    xcore_setv,                                // llvm.xcore.setv
    xcore_sext,                                // llvm.xcore.sext
    xcore_ssync,                               // llvm.xcore.ssync
    xcore_syncr,                               // llvm.xcore.syncr
    xcore_testct,                              // llvm.xcore.testct
    xcore_testwct,                             // llvm.xcore.testwct
    xcore_waitevent,                           // llvm.xcore.waitevent
    xcore_zext                                 // llvm.xcore.zext
#endif

// Intrinsic ID to name table
#ifdef GET_INTRINSIC_NAME_TABLE
  // Note that entry #0 is the invalid intrinsic!
  "llvm.AMDGPU.div.fixup",
  "llvm.AMDGPU.div.fmas",
  "llvm.AMDGPU.div.scale",
  "llvm.AMDGPU.rcp",
  "llvm.AMDGPU.rsq",
  "llvm.AMDGPU.rsq.clamped",
  "llvm.AMDGPU.trig.preop",
  "llvm.aarch64.clrex",
  "llvm.aarch64.crc32b",
  "llvm.aarch64.crc32cb",
  "llvm.aarch64.crc32ch",
  "llvm.aarch64.crc32cw",
  "llvm.aarch64.crc32cx",
  "llvm.aarch64.crc32h",
  "llvm.aarch64.crc32w",
  "llvm.aarch64.crc32x",
  "llvm.aarch64.crypto.aesd",
  "llvm.aarch64.crypto.aese",
  "llvm.aarch64.crypto.aesimc",
  "llvm.aarch64.crypto.aesmc",
  "llvm.aarch64.crypto.sha1c",
  "llvm.aarch64.crypto.sha1h",
  "llvm.aarch64.crypto.sha1m",
  "llvm.aarch64.crypto.sha1p",
  "llvm.aarch64.crypto.sha1su0",
  "llvm.aarch64.crypto.sha1su1",
  "llvm.aarch64.crypto.sha256h",
  "llvm.aarch64.crypto.sha256h2",
  "llvm.aarch64.crypto.sha256su0",
  "llvm.aarch64.crypto.sha256su1",
  "llvm.aarch64.dmb",
  "llvm.aarch64.dsb",
  "llvm.aarch64.hint",
  "llvm.aarch64.isb",
  "llvm.aarch64.ldaxp",
  "llvm.aarch64.ldaxr",
  "llvm.aarch64.ldxp",
  "llvm.aarch64.ldxr",
  "llvm.aarch64.neon.abs",
  "llvm.aarch64.neon.addhn",
  "llvm.aarch64.neon.addp",
  "llvm.aarch64.neon.cls",
  "llvm.aarch64.neon.fabd",
  "llvm.aarch64.neon.facge",
  "llvm.aarch64.neon.facgt",
  "llvm.aarch64.neon.faddv",
  "llvm.aarch64.neon.fcvtas",
  "llvm.aarch64.neon.fcvtau",
  "llvm.aarch64.neon.fcvtms",
  "llvm.aarch64.neon.fcvtmu",
  "llvm.aarch64.neon.fcvtns",
  "llvm.aarch64.neon.fcvtnu",
  "llvm.aarch64.neon.fcvtps",
  "llvm.aarch64.neon.fcvtpu",
  "llvm.aarch64.neon.fcvtxn",
  "llvm.aarch64.neon.fcvtzs",
  "llvm.aarch64.neon.fcvtzu",
  "llvm.aarch64.neon.fmax",
  "llvm.aarch64.neon.fmaxnm",
  "llvm.aarch64.neon.fmaxnmp",
  "llvm.aarch64.neon.fmaxnmv",
  "llvm.aarch64.neon.fmaxp",
  "llvm.aarch64.neon.fmaxv",
  "llvm.aarch64.neon.fmin",
  "llvm.aarch64.neon.fminnm",
  "llvm.aarch64.neon.fminnmp",
  "llvm.aarch64.neon.fminnmv",
  "llvm.aarch64.neon.fminp",
  "llvm.aarch64.neon.fminv",
  "llvm.aarch64.neon.fmulx",
  "llvm.aarch64.neon.frecpe",
  "llvm.aarch64.neon.frecps",
  "llvm.aarch64.neon.frecpx",
  "llvm.aarch64.neon.frintn",
  "llvm.aarch64.neon.frsqrte",
  "llvm.aarch64.neon.frsqrts",
  "llvm.aarch64.neon.ld1x2",
  "llvm.aarch64.neon.ld1x3",
  "llvm.aarch64.neon.ld1x4",
  "llvm.aarch64.neon.ld2",
  "llvm.aarch64.neon.ld2lane",
  "llvm.aarch64.neon.ld2r",
  "llvm.aarch64.neon.ld3",
  "llvm.aarch64.neon.ld3lane",
  "llvm.aarch64.neon.ld3r",
  "llvm.aarch64.neon.ld4",
  "llvm.aarch64.neon.ld4lane",
  "llvm.aarch64.neon.ld4r",
  "llvm.aarch64.neon.pmul",
  "llvm.aarch64.neon.pmull",
  "llvm.aarch64.neon.pmull64",
  "llvm.aarch64.neon.raddhn",
  "llvm.aarch64.neon.rbit",
  "llvm.aarch64.neon.rshrn",
  "llvm.aarch64.neon.rsubhn",
  "llvm.aarch64.neon.sabd",
  "llvm.aarch64.neon.saddlp",
  "llvm.aarch64.neon.saddlv",
  "llvm.aarch64.neon.saddv",
  "llvm.aarch64.neon.scalar.sqxtn",
  "llvm.aarch64.neon.scalar.sqxtun",
  "llvm.aarch64.neon.scalar.uqxtn",
  "llvm.aarch64.neon.shadd",
  "llvm.aarch64.neon.shll",
  "llvm.aarch64.neon.shsub",
  "llvm.aarch64.neon.smax",
  "llvm.aarch64.neon.smaxp",
  "llvm.aarch64.neon.smaxv",
  "llvm.aarch64.neon.smin",
  "llvm.aarch64.neon.sminp",
  "llvm.aarch64.neon.sminv",
  "llvm.aarch64.neon.smull",
  "llvm.aarch64.neon.sqabs",
  "llvm.aarch64.neon.sqadd",
  "llvm.aarch64.neon.sqdmulh",
  "llvm.aarch64.neon.sqdmull",
  "llvm.aarch64.neon.sqdmulls.scalar",
  "llvm.aarch64.neon.sqneg",
  "llvm.aarch64.neon.sqrdmulh",
  "llvm.aarch64.neon.sqrshl",
  "llvm.aarch64.neon.sqrshrn",
  "llvm.aarch64.neon.sqrshrun",
  "llvm.aarch64.neon.sqshl",
  "llvm.aarch64.neon.sqshlu",
  "llvm.aarch64.neon.sqshrn",
  "llvm.aarch64.neon.sqshrun",
  "llvm.aarch64.neon.sqsub",
  "llvm.aarch64.neon.sqxtn",
  "llvm.aarch64.neon.sqxtun",
  "llvm.aarch64.neon.srhadd",
  "llvm.aarch64.neon.srshl",
  "llvm.aarch64.neon.sshl",
  "llvm.aarch64.neon.sshll",
  "llvm.aarch64.neon.st1x2",
  "llvm.aarch64.neon.st1x3",
  "llvm.aarch64.neon.st1x4",
  "llvm.aarch64.neon.st2",
  "llvm.aarch64.neon.st2lane",
  "llvm.aarch64.neon.st3",
  "llvm.aarch64.neon.st3lane",
  "llvm.aarch64.neon.st4",
  "llvm.aarch64.neon.st4lane",
  "llvm.aarch64.neon.subhn",
  "llvm.aarch64.neon.suqadd",
  "llvm.aarch64.neon.tbl1",
  "llvm.aarch64.neon.tbl2",
  "llvm.aarch64.neon.tbl3",
  "llvm.aarch64.neon.tbl4",
  "llvm.aarch64.neon.tbx1",
  "llvm.aarch64.neon.tbx2",
  "llvm.aarch64.neon.tbx3",
  "llvm.aarch64.neon.tbx4",
  "llvm.aarch64.neon.uabd",
  "llvm.aarch64.neon.uaddlp",
  "llvm.aarch64.neon.uaddlv",
  "llvm.aarch64.neon.uaddv",
  "llvm.aarch64.neon.uhadd",
  "llvm.aarch64.neon.uhsub",
  "llvm.aarch64.neon.umax",
  "llvm.aarch64.neon.umaxp",
  "llvm.aarch64.neon.umaxv",
  "llvm.aarch64.neon.umin",
  "llvm.aarch64.neon.uminp",
  "llvm.aarch64.neon.uminv",
  "llvm.aarch64.neon.umull",
  "llvm.aarch64.neon.uqadd",
  "llvm.aarch64.neon.uqrshl",
  "llvm.aarch64.neon.uqrshrn",
  "llvm.aarch64.neon.uqshl",
  "llvm.aarch64.neon.uqshrn",
  "llvm.aarch64.neon.uqsub",
  "llvm.aarch64.neon.uqxtn",
  "llvm.aarch64.neon.urecpe",
  "llvm.aarch64.neon.urhadd",
  "llvm.aarch64.neon.urshl",
  "llvm.aarch64.neon.ursqrte",
  "llvm.aarch64.neon.ushl",
  "llvm.aarch64.neon.ushll",
  "llvm.aarch64.neon.usqadd",
  "llvm.aarch64.neon.vcopy.lane",
  "llvm.aarch64.neon.vcvtfp2fxs",
  "llvm.aarch64.neon.vcvtfp2fxu",
  "llvm.aarch64.neon.vcvtfp2hf",
  "llvm.aarch64.neon.vcvtfxs2fp",
  "llvm.aarch64.neon.vcvtfxu2fp",
  "llvm.aarch64.neon.vcvthf2fp",
  "llvm.aarch64.neon.vsli",
  "llvm.aarch64.neon.vsri",
  "llvm.aarch64.rbit",
  "llvm.aarch64.sdiv",
  "llvm.aarch64.sisd.fabd",
  "llvm.aarch64.sisd.fcvtxn",
  "llvm.aarch64.stlxp",
  "llvm.aarch64.stlxr",
  "llvm.aarch64.stxp",
  "llvm.aarch64.stxr",
  "llvm.aarch64.udiv",
  "llvm.adjust.trampoline",
  "llvm.annotation",
  "llvm.arm.cdp",
  "llvm.arm.cdp2",
  "llvm.arm.clrex",
  "llvm.arm.crc32b",
  "llvm.arm.crc32cb",
  "llvm.arm.crc32ch",
  "llvm.arm.crc32cw",
  "llvm.arm.crc32h",
  "llvm.arm.crc32w",
  "llvm.arm.dmb",
  "llvm.arm.dsb",
  "llvm.arm.get.fpscr",
  "llvm.arm.hint",
  "llvm.arm.isb",
  "llvm.arm.ldaex",
  "llvm.arm.ldaexd",
  "llvm.arm.ldrex",
  "llvm.arm.ldrexd",
  "llvm.arm.mcr",
  "llvm.arm.mcr2",
  "llvm.arm.mcrr",
  "llvm.arm.mcrr2",
  "llvm.arm.mrc",
  "llvm.arm.mrc2",
  "llvm.arm.neon.aesd",
  "llvm.arm.neon.aese",
  "llvm.arm.neon.aesimc",
  "llvm.arm.neon.aesmc",
  "llvm.arm.neon.sha1c",
  "llvm.arm.neon.sha1h",
  "llvm.arm.neon.sha1m",
  "llvm.arm.neon.sha1p",
  "llvm.arm.neon.sha1su0",
  "llvm.arm.neon.sha1su1",
  "llvm.arm.neon.sha256h",
  "llvm.arm.neon.sha256h2",
  "llvm.arm.neon.sha256su0",
  "llvm.arm.neon.sha256su1",
  "llvm.arm.neon.vabds",
  "llvm.arm.neon.vabdu",
  "llvm.arm.neon.vabs",
  "llvm.arm.neon.vacge",
  "llvm.arm.neon.vacgt",
  "llvm.arm.neon.vbsl",
  "llvm.arm.neon.vcls",
  "llvm.arm.neon.vclz",
  "llvm.arm.neon.vcnt",
  "llvm.arm.neon.vcvtas",
  "llvm.arm.neon.vcvtau",
  "llvm.arm.neon.vcvtfp2fxs",
  "llvm.arm.neon.vcvtfp2fxu",
  "llvm.arm.neon.vcvtfp2hf",
  "llvm.arm.neon.vcvtfxs2fp",
  "llvm.arm.neon.vcvtfxu2fp",
  "llvm.arm.neon.vcvthf2fp",
  "llvm.arm.neon.vcvtms",
  "llvm.arm.neon.vcvtmu",
  "llvm.arm.neon.vcvtns",
  "llvm.arm.neon.vcvtnu",
  "llvm.arm.neon.vcvtps",
  "llvm.arm.neon.vcvtpu",
  "llvm.arm.neon.vhadds",
  "llvm.arm.neon.vhaddu",
  "llvm.arm.neon.vhsubs",
  "llvm.arm.neon.vhsubu",
  "llvm.arm.neon.vld1",
  "llvm.arm.neon.vld2",
  "llvm.arm.neon.vld2lane",
  "llvm.arm.neon.vld3",
  "llvm.arm.neon.vld3lane",
  "llvm.arm.neon.vld4",
  "llvm.arm.neon.vld4lane",
  "llvm.arm.neon.vmaxnm",
  "llvm.arm.neon.vmaxs",
  "llvm.arm.neon.vmaxu",
  "llvm.arm.neon.vminnm",
  "llvm.arm.neon.vmins",
  "llvm.arm.neon.vminu",
  "llvm.arm.neon.vmullp",
  "llvm.arm.neon.vmulls",
  "llvm.arm.neon.vmullu",
  "llvm.arm.neon.vmulp",
  "llvm.arm.neon.vpadals",
  "llvm.arm.neon.vpadalu",
  "llvm.arm.neon.vpadd",
  "llvm.arm.neon.vpaddls",
  "llvm.arm.neon.vpaddlu",
  "llvm.arm.neon.vpmaxs",
  "llvm.arm.neon.vpmaxu",
  "llvm.arm.neon.vpmins",
  "llvm.arm.neon.vpminu",
  "llvm.arm.neon.vqabs",
  "llvm.arm.neon.vqadds",
  "llvm.arm.neon.vqaddu",
  "llvm.arm.neon.vqdmulh",
  "llvm.arm.neon.vqdmull",
  "llvm.arm.neon.vqmovns",
  "llvm.arm.neon.vqmovnsu",
  "llvm.arm.neon.vqmovnu",
  "llvm.arm.neon.vqneg",
  "llvm.arm.neon.vqrdmulh",
  "llvm.arm.neon.vqrshiftns",
  "llvm.arm.neon.vqrshiftnsu",
  "llvm.arm.neon.vqrshiftnu",
  "llvm.arm.neon.vqrshifts",
  "llvm.arm.neon.vqrshiftu",
  "llvm.arm.neon.vqshiftns",
  "llvm.arm.neon.vqshiftnsu",
  "llvm.arm.neon.vqshiftnu",
  "llvm.arm.neon.vqshifts",
  "llvm.arm.neon.vqshiftsu",
  "llvm.arm.neon.vqshiftu",
  "llvm.arm.neon.vqsubs",
  "llvm.arm.neon.vqsubu",
  "llvm.arm.neon.vraddhn",
  "llvm.arm.neon.vrecpe",
  "llvm.arm.neon.vrecps",
  "llvm.arm.neon.vrhadds",
  "llvm.arm.neon.vrhaddu",
  "llvm.arm.neon.vrinta",
  "llvm.arm.neon.vrintm",
  "llvm.arm.neon.vrintn",
  "llvm.arm.neon.vrintp",
  "llvm.arm.neon.vrintx",
  "llvm.arm.neon.vrintz",
  "llvm.arm.neon.vrshiftn",
  "llvm.arm.neon.vrshifts",
  "llvm.arm.neon.vrshiftu",
  "llvm.arm.neon.vrsqrte",
  "llvm.arm.neon.vrsqrts",
  "llvm.arm.neon.vrsubhn",
  "llvm.arm.neon.vshiftins",
  "llvm.arm.neon.vshifts",
  "llvm.arm.neon.vshiftu",
  "llvm.arm.neon.vst1",
  "llvm.arm.neon.vst2",
  "llvm.arm.neon.vst2lane",
  "llvm.arm.neon.vst3",
  "llvm.arm.neon.vst3lane",
  "llvm.arm.neon.vst4",
  "llvm.arm.neon.vst4lane",
  "llvm.arm.neon.vtbl1",
  "llvm.arm.neon.vtbl2",
  "llvm.arm.neon.vtbl3",
  "llvm.arm.neon.vtbl4",
  "llvm.arm.neon.vtbx1",
  "llvm.arm.neon.vtbx2",
  "llvm.arm.neon.vtbx3",
  "llvm.arm.neon.vtbx4",
  "llvm.arm.qadd",
  "llvm.arm.qsub",
  "llvm.arm.rbit",
  "llvm.arm.set.fpscr",
  "llvm.arm.ssat",
  "llvm.arm.stlex",
  "llvm.arm.stlexd",
  "llvm.arm.strex",
  "llvm.arm.strexd",
  "llvm.arm.thread.pointer",
  "llvm.arm.undefined",
  "llvm.arm.usat",
  "llvm.arm.vcvtr",
  "llvm.arm.vcvtru",
  "llvm.bswap",
  "llvm.ceil",
  "llvm.clear_cache",
  "llvm.convert.from.fp16",
  "llvm.convert.to.fp16",
  "llvm.convertff",
  "llvm.convertfsi",
  "llvm.convertfui",
  "llvm.convertsif",
  "llvm.convertss",
  "llvm.convertsu",
  "llvm.convertuif",
  "llvm.convertus",
  "llvm.convertuu",
  "llvm.copysign",
  "llvm.cos",
  "llvm.ctlz",
  "llvm.ctpop",
  "llvm.cttz",
  "llvm.cuda.syncthreads",
  "llvm.dbg.declare",
  "llvm.dbg.value",
  "llvm.debugtrap",
  "llvm.donothing",
  "llvm.eh.dwarf.cfa",
  "llvm.eh.return.i32",
  "llvm.eh.return.i64",
  "llvm.eh.sjlj.callsite",
  "llvm.eh.sjlj.functioncontext",
  "llvm.eh.sjlj.longjmp",
  "llvm.eh.sjlj.lsda",
  "llvm.eh.sjlj.setjmp",
  "llvm.eh.typeid.for",
  "llvm.eh.unwind.init",
  "llvm.exp",
  "llvm.exp2",
  "llvm.expect",
  "llvm.experimental.patchpoint.i64",
  "llvm.experimental.patchpoint.void",
  "llvm.experimental.stackmap",
  "llvm.fabs",
  "llvm.floor",
  "llvm.flt.rounds",
  "llvm.fma",
  "llvm.fmuladd",
  "llvm.frameaddress",
  "llvm.gcread",
  "llvm.gcroot",
  "llvm.gcwrite",
  "llvm.hexagon.A2.abs",
  "llvm.hexagon.A2.absp",
  "llvm.hexagon.A2.abssat",
  "llvm.hexagon.A2.add",
  "llvm.hexagon.A2.addh.h16.hh",
  "llvm.hexagon.A2.addh.h16.hl",
  "llvm.hexagon.A2.addh.h16.lh",
  "llvm.hexagon.A2.addh.h16.ll",
  "llvm.hexagon.A2.addh.h16.sat.hh",
  "llvm.hexagon.A2.addh.h16.sat.hl",
  "llvm.hexagon.A2.addh.h16.sat.lh",
  "llvm.hexagon.A2.addh.h16.sat.ll",
  "llvm.hexagon.A2.addh.l16.hl",
  "llvm.hexagon.A2.addh.l16.ll",
  "llvm.hexagon.A2.addh.l16.sat.hl",
  "llvm.hexagon.A2.addh.l16.sat.ll",
  "llvm.hexagon.A2.addi",
  "llvm.hexagon.A2.addp",
  "llvm.hexagon.A2.addpsat",
  "llvm.hexagon.A2.addsat",
  "llvm.hexagon.A2.addsp",
  "llvm.hexagon.A2.and",
  "llvm.hexagon.A2.andir",
  "llvm.hexagon.A2.andp",
  "llvm.hexagon.A2.aslh",
  "llvm.hexagon.A2.asrh",
  "llvm.hexagon.A2.combine.hh",
  "llvm.hexagon.A2.combine.hl",
  "llvm.hexagon.A2.combine.lh",
  "llvm.hexagon.A2.combine.ll",
  "llvm.hexagon.A2.combineii",
  "llvm.hexagon.A2.combinew",
  "llvm.hexagon.A2.max",
  "llvm.hexagon.A2.maxp",
  "llvm.hexagon.A2.maxu",
  "llvm.hexagon.A2.maxup",
  "llvm.hexagon.A2.min",
  "llvm.hexagon.A2.minp",
  "llvm.hexagon.A2.minu",
  "llvm.hexagon.A2.minup",
  "llvm.hexagon.A2.neg",
  "llvm.hexagon.A2.negp",
  "llvm.hexagon.A2.negsat",
  "llvm.hexagon.A2.not",
  "llvm.hexagon.A2.notp",
  "llvm.hexagon.A2.or",
  "llvm.hexagon.A2.orir",
  "llvm.hexagon.A2.orp",
  "llvm.hexagon.A2.roundsat",
  "llvm.hexagon.A2.sat",
  "llvm.hexagon.A2.satb",
  "llvm.hexagon.A2.sath",
  "llvm.hexagon.A2.satub",
  "llvm.hexagon.A2.satuh",
  "llvm.hexagon.A2.sub",
  "llvm.hexagon.A2.subh.h16.hh",
  "llvm.hexagon.A2.subh.h16.hl",
  "llvm.hexagon.A2.subh.h16.lh",
  "llvm.hexagon.A2.subh.h16.ll",
  "llvm.hexagon.A2.subh.h16.sat.hh",
  "llvm.hexagon.A2.subh.h16.sat.hl",
  "llvm.hexagon.A2.subh.h16.sat.lh",
  "llvm.hexagon.A2.subh.h16.sat.ll",
  "llvm.hexagon.A2.subh.l16.hl",
  "llvm.hexagon.A2.subh.l16.ll",
  "llvm.hexagon.A2.subh.l16.sat.hl",
  "llvm.hexagon.A2.subh.l16.sat.ll",
  "llvm.hexagon.A2.subp",
  "llvm.hexagon.A2.subri",
  "llvm.hexagon.A2.subsat",
  "llvm.hexagon.A2.svaddh",
  "llvm.hexagon.A2.svaddhs",
  "llvm.hexagon.A2.svadduhs",
  "llvm.hexagon.A2.svavgh",
  "llvm.hexagon.A2.svavghs",
  "llvm.hexagon.A2.svnavgh",
  "llvm.hexagon.A2.svsubh",
  "llvm.hexagon.A2.svsubhs",
  "llvm.hexagon.A2.svsubuhs",
  "llvm.hexagon.A2.swiz",
  "llvm.hexagon.A2.sxtb",
  "llvm.hexagon.A2.sxth",
  "llvm.hexagon.A2.sxtw",
  "llvm.hexagon.A2.tfr",
  "llvm.hexagon.A2.tfrih",
  "llvm.hexagon.A2.tfril",
  "llvm.hexagon.A2.tfrp",
  "llvm.hexagon.A2.tfrpi",
  "llvm.hexagon.A2.tfrsi",
  "llvm.hexagon.A2.vabsh",
  "llvm.hexagon.A2.vabshsat",
  "llvm.hexagon.A2.vabsw",
  "llvm.hexagon.A2.vabswsat",
  "llvm.hexagon.A2.vaddb.map",
  "llvm.hexagon.A2.vaddh",
  "llvm.hexagon.A2.vaddhs",
  "llvm.hexagon.A2.vaddub",
  "llvm.hexagon.A2.vaddubs",
  "llvm.hexagon.A2.vadduhs",
  "llvm.hexagon.A2.vaddw",
  "llvm.hexagon.A2.vaddws",
  "llvm.hexagon.A2.vavgh",
  "llvm.hexagon.A2.vavghcr",
  "llvm.hexagon.A2.vavghr",
  "llvm.hexagon.A2.vavgub",
  "llvm.hexagon.A2.vavgubr",
  "llvm.hexagon.A2.vavguh",
  "llvm.hexagon.A2.vavguhr",
  "llvm.hexagon.A2.vavguw",
  "llvm.hexagon.A2.vavguwr",
  "llvm.hexagon.A2.vavgw",
  "llvm.hexagon.A2.vavgwcr",
  "llvm.hexagon.A2.vavgwr",
  "llvm.hexagon.A2.vcmpbeq",
  "llvm.hexagon.A2.vcmpbgtu",
  "llvm.hexagon.A2.vcmpheq",
  "llvm.hexagon.A2.vcmphgt",
  "llvm.hexagon.A2.vcmphgtu",
  "llvm.hexagon.A2.vcmpweq",
  "llvm.hexagon.A2.vcmpwgt",
  "llvm.hexagon.A2.vcmpwgtu",
  "llvm.hexagon.A2.vconj",
  "llvm.hexagon.A2.vmaxb",
  "llvm.hexagon.A2.vmaxh",
  "llvm.hexagon.A2.vmaxub",
  "llvm.hexagon.A2.vmaxuh",
  "llvm.hexagon.A2.vmaxuw",
  "llvm.hexagon.A2.vmaxw",
  "llvm.hexagon.A2.vminb",
  "llvm.hexagon.A2.vminh",
  "llvm.hexagon.A2.vminub",
  "llvm.hexagon.A2.vminuh",
  "llvm.hexagon.A2.vminuw",
  "llvm.hexagon.A2.vminw",
  "llvm.hexagon.A2.vnavgh",
  "llvm.hexagon.A2.vnavghcr",
  "llvm.hexagon.A2.vnavghr",
  "llvm.hexagon.A2.vnavgw",
  "llvm.hexagon.A2.vnavgwcr",
  "llvm.hexagon.A2.vnavgwr",
  "llvm.hexagon.A2.vraddub",
  "llvm.hexagon.A2.vraddub.acc",
  "llvm.hexagon.A2.vrsadub",
  "llvm.hexagon.A2.vrsadub.acc",
  "llvm.hexagon.A2.vsubb.map",
  "llvm.hexagon.A2.vsubh",
  "llvm.hexagon.A2.vsubhs",
  "llvm.hexagon.A2.vsubub",
  "llvm.hexagon.A2.vsububs",
  "llvm.hexagon.A2.vsubuhs",
  "llvm.hexagon.A2.vsubw",
  "llvm.hexagon.A2.vsubws",
  "llvm.hexagon.A2.xor",
  "llvm.hexagon.A2.xorp",
  "llvm.hexagon.A2.zxtb",
  "llvm.hexagon.A2.zxth",
  "llvm.hexagon.A4.andn",
  "llvm.hexagon.A4.andnp",
  "llvm.hexagon.A4.bitsplit",
  "llvm.hexagon.A4.bitspliti",
  "llvm.hexagon.A4.boundscheck",
  "llvm.hexagon.A4.cmpbeq",
  "llvm.hexagon.A4.cmpbeqi",
  "llvm.hexagon.A4.cmpbgt",
  "llvm.hexagon.A4.cmpbgti",
  "llvm.hexagon.A4.cmpbgtu",
  "llvm.hexagon.A4.cmpbgtui",
  "llvm.hexagon.A4.cmpheq",
  "llvm.hexagon.A4.cmpheqi",
  "llvm.hexagon.A4.cmphgt",
  "llvm.hexagon.A4.cmphgti",
  "llvm.hexagon.A4.cmphgtu",
  "llvm.hexagon.A4.cmphgtui",
  "llvm.hexagon.A4.combineir",
  "llvm.hexagon.A4.combineri",
  "llvm.hexagon.A4.cround.ri",
  "llvm.hexagon.A4.cround.rr",
  "llvm.hexagon.A4.modwrapu",
  "llvm.hexagon.A4.orn",
  "llvm.hexagon.A4.ornp",
  "llvm.hexagon.A4.rcmpeq",
  "llvm.hexagon.A4.rcmpeqi",
  "llvm.hexagon.A4.rcmpneq",
  "llvm.hexagon.A4.rcmpneqi",
  "llvm.hexagon.A4.round.ri",
  "llvm.hexagon.A4.round.ri.sat",
  "llvm.hexagon.A4.round.rr",
  "llvm.hexagon.A4.round.rr.sat",
  "llvm.hexagon.A4.tlbmatch",
  "llvm.hexagon.A4.vcmpbeq.any",
  "llvm.hexagon.A4.vcmpbeqi",
  "llvm.hexagon.A4.vcmpbgt",
  "llvm.hexagon.A4.vcmpbgti",
  "llvm.hexagon.A4.vcmpbgtui",
  "llvm.hexagon.A4.vcmpheqi",
  "llvm.hexagon.A4.vcmphgti",
  "llvm.hexagon.A4.vcmphgtui",
  "llvm.hexagon.A4.vcmpweqi",
  "llvm.hexagon.A4.vcmpwgti",
  "llvm.hexagon.A4.vcmpwgtui",
  "llvm.hexagon.A4.vrmaxh",
  "llvm.hexagon.A4.vrmaxuh",
  "llvm.hexagon.A4.vrmaxuw",
  "llvm.hexagon.A4.vrmaxw",
  "llvm.hexagon.A4.vrminh",
  "llvm.hexagon.A4.vrminuh",
  "llvm.hexagon.A4.vrminuw",
  "llvm.hexagon.A4.vrminw",
  "llvm.hexagon.A5.vaddhubs",
  "llvm.hexagon.C2.all8",
  "llvm.hexagon.C2.and",
  "llvm.hexagon.C2.andn",
  "llvm.hexagon.C2.any8",
  "llvm.hexagon.C2.bitsclr",
  "llvm.hexagon.C2.bitsclri",
  "llvm.hexagon.C2.bitsset",
  "llvm.hexagon.C2.cmpeq",
  "llvm.hexagon.C2.cmpeqi",
  "llvm.hexagon.C2.cmpeqp",
  "llvm.hexagon.C2.cmpgei",
  "llvm.hexagon.C2.cmpgeui",
  "llvm.hexagon.C2.cmpgt",
  "llvm.hexagon.C2.cmpgti",
  "llvm.hexagon.C2.cmpgtp",
  "llvm.hexagon.C2.cmpgtu",
  "llvm.hexagon.C2.cmpgtui",
  "llvm.hexagon.C2.cmpgtup",
  "llvm.hexagon.C2.cmplt",
  "llvm.hexagon.C2.cmpltu",
  "llvm.hexagon.C2.mask",
  "llvm.hexagon.C2.mux",
  "llvm.hexagon.C2.muxii",
  "llvm.hexagon.C2.muxir",
  "llvm.hexagon.C2.muxri",
  "llvm.hexagon.C2.not",
  "llvm.hexagon.C2.or",
  "llvm.hexagon.C2.orn",
  "llvm.hexagon.C2.pxfer.map",
  "llvm.hexagon.C2.tfrpr",
  "llvm.hexagon.C2.tfrrp",
  "llvm.hexagon.C2.vitpack",
  "llvm.hexagon.C2.vmux",
  "llvm.hexagon.C2.xor",
  "llvm.hexagon.C4.and.and",
  "llvm.hexagon.C4.and.andn",
  "llvm.hexagon.C4.and.or",
  "llvm.hexagon.C4.and.orn",
  "llvm.hexagon.C4.cmplte",
  "llvm.hexagon.C4.cmpltei",
  "llvm.hexagon.C4.cmplteu",
  "llvm.hexagon.C4.cmplteui",
  "llvm.hexagon.C4.cmpneq",
  "llvm.hexagon.C4.cmpneqi",
  "llvm.hexagon.C4.fastcorner9",
  "llvm.hexagon.C4.fastcorner9.not",
  "llvm.hexagon.C4.nbitsclr",
  "llvm.hexagon.C4.nbitsclri",
  "llvm.hexagon.C4.nbitsset",
  "llvm.hexagon.C4.or.and",
  "llvm.hexagon.C4.or.andn",
  "llvm.hexagon.C4.or.or",
  "llvm.hexagon.C4.or.orn",
  "llvm.hexagon.F2.conv.d2df",
  "llvm.hexagon.F2.conv.d2sf",
  "llvm.hexagon.F2.conv.df2d",
  "llvm.hexagon.F2.conv.df2d.chop",
  "llvm.hexagon.F2.conv.df2sf",
  "llvm.hexagon.F2.conv.df2ud",
  "llvm.hexagon.F2.conv.df2ud.chop",
  "llvm.hexagon.F2.conv.df2uw",
  "llvm.hexagon.F2.conv.df2uw.chop",
  "llvm.hexagon.F2.conv.df2w",
  "llvm.hexagon.F2.conv.df2w.chop",
  "llvm.hexagon.F2.conv.sf2d",
  "llvm.hexagon.F2.conv.sf2d.chop",
  "llvm.hexagon.F2.conv.sf2df",
  "llvm.hexagon.F2.conv.sf2ud",
  "llvm.hexagon.F2.conv.sf2ud.chop",
  "llvm.hexagon.F2.conv.sf2uw",
  "llvm.hexagon.F2.conv.sf2uw.chop",
  "llvm.hexagon.F2.conv.sf2w",
  "llvm.hexagon.F2.conv.sf2w.chop",
  "llvm.hexagon.F2.conv.ud2df",
  "llvm.hexagon.F2.conv.ud2sf",
  "llvm.hexagon.F2.conv.uw2df",
  "llvm.hexagon.F2.conv.uw2sf",
  "llvm.hexagon.F2.conv.w2df",
  "llvm.hexagon.F2.conv.w2sf",
  "llvm.hexagon.F2.dfadd",
  "llvm.hexagon.F2.dfclass",
  "llvm.hexagon.F2.dfcmpeq",
  "llvm.hexagon.F2.dfcmpge",
  "llvm.hexagon.F2.dfcmpgt",
  "llvm.hexagon.F2.dfcmpuo",
  "llvm.hexagon.F2.dffixupd",
  "llvm.hexagon.F2.dffixupn",
  "llvm.hexagon.F2.dffixupr",
  "llvm.hexagon.F2.dffma",
  "llvm.hexagon.F2.dffma.lib",
  "llvm.hexagon.F2.dffma.sc",
  "llvm.hexagon.F2.dffms",
  "llvm.hexagon.F2.dffms.lib",
  "llvm.hexagon.F2.dfimm.n",
  "llvm.hexagon.F2.dfimm.p",
  "llvm.hexagon.F2.dfmax",
  "llvm.hexagon.F2.dfmin",
  "llvm.hexagon.F2.dfmpy",
  "llvm.hexagon.F2.dfsub",
  "llvm.hexagon.F2.sfadd",
  "llvm.hexagon.F2.sfclass",
  "llvm.hexagon.F2.sfcmpeq",
  "llvm.hexagon.F2.sfcmpge",
  "llvm.hexagon.F2.sfcmpgt",
  "llvm.hexagon.F2.sfcmpuo",
  "llvm.hexagon.F2.sffixupd",
  "llvm.hexagon.F2.sffixupn",
  "llvm.hexagon.F2.sffixupr",
  "llvm.hexagon.F2.sffma",
  "llvm.hexagon.F2.sffma.lib",
  "llvm.hexagon.F2.sffma.sc",
  "llvm.hexagon.F2.sffms",
  "llvm.hexagon.F2.sffms.lib",
  "llvm.hexagon.F2.sfimm.n",
  "llvm.hexagon.F2.sfimm.p",
  "llvm.hexagon.F2.sfmax",
  "llvm.hexagon.F2.sfmin",
  "llvm.hexagon.F2.sfmpy",
  "llvm.hexagon.F2.sfsub",
  "llvm.hexagon.M2.acci",
  "llvm.hexagon.M2.accii",
  "llvm.hexagon.M2.cmaci.s0",
  "llvm.hexagon.M2.cmacr.s0",
  "llvm.hexagon.M2.cmacs.s0",
  "llvm.hexagon.M2.cmacs.s1",
  "llvm.hexagon.M2.cmacsc.s0",
  "llvm.hexagon.M2.cmacsc.s1",
  "llvm.hexagon.M2.cmpyi.s0",
  "llvm.hexagon.M2.cmpyr.s0",
  "llvm.hexagon.M2.cmpyrs.s0",
  "llvm.hexagon.M2.cmpyrs.s1",
  "llvm.hexagon.M2.cmpyrsc.s0",
  "llvm.hexagon.M2.cmpyrsc.s1",
  "llvm.hexagon.M2.cmpys.s0",
  "llvm.hexagon.M2.cmpys.s1",
  "llvm.hexagon.M2.cmpysc.s0",
  "llvm.hexagon.M2.cmpysc.s1",
  "llvm.hexagon.M2.cnacs.s0",
  "llvm.hexagon.M2.cnacs.s1",
  "llvm.hexagon.M2.cnacsc.s0",
  "llvm.hexagon.M2.cnacsc.s1",
  "llvm.hexagon.M2.dpmpyss.acc.s0",
  "llvm.hexagon.M2.dpmpyss.nac.s0",
  "llvm.hexagon.M2.dpmpyss.rnd.s0",
  "llvm.hexagon.M2.dpmpyss.s0",
  "llvm.hexagon.M2.dpmpyuu.acc.s0",
  "llvm.hexagon.M2.dpmpyuu.nac.s0",
  "llvm.hexagon.M2.dpmpyuu.s0",
  "llvm.hexagon.M2.hmmpyh.rs1",
  "llvm.hexagon.M2.hmmpyh.s1",
  "llvm.hexagon.M2.hmmpyl.rs1",
  "llvm.hexagon.M2.hmmpyl.s1",
  "llvm.hexagon.M2.maci",
  "llvm.hexagon.M2.macsin",
  "llvm.hexagon.M2.macsip",
  "llvm.hexagon.M2.mmachs.rs0",
  "llvm.hexagon.M2.mmachs.rs1",
  "llvm.hexagon.M2.mmachs.s0",
  "llvm.hexagon.M2.mmachs.s1",
  "llvm.hexagon.M2.mmacls.rs0",
  "llvm.hexagon.M2.mmacls.rs1",
  "llvm.hexagon.M2.mmacls.s0",
  "llvm.hexagon.M2.mmacls.s1",
  "llvm.hexagon.M2.mmacuhs.rs0",
  "llvm.hexagon.M2.mmacuhs.rs1",
  "llvm.hexagon.M2.mmacuhs.s0",
  "llvm.hexagon.M2.mmacuhs.s1",
  "llvm.hexagon.M2.mmaculs.rs0",
  "llvm.hexagon.M2.mmaculs.rs1",
  "llvm.hexagon.M2.mmaculs.s0",
  "llvm.hexagon.M2.mmaculs.s1",
  "llvm.hexagon.M2.mmpyh.rs0",
  "llvm.hexagon.M2.mmpyh.rs1",
  "llvm.hexagon.M2.mmpyh.s0",
  "llvm.hexagon.M2.mmpyh.s1",
  "llvm.hexagon.M2.mmpyl.rs0",
  "llvm.hexagon.M2.mmpyl.rs1",
  "llvm.hexagon.M2.mmpyl.s0",
  "llvm.hexagon.M2.mmpyl.s1",
  "llvm.hexagon.M2.mmpyuh.rs0",
  "llvm.hexagon.M2.mmpyuh.rs1",
  "llvm.hexagon.M2.mmpyuh.s0",
  "llvm.hexagon.M2.mmpyuh.s1",
  "llvm.hexagon.M2.mmpyul.rs0",
  "llvm.hexagon.M2.mmpyul.rs1",
  "llvm.hexagon.M2.mmpyul.s0",
  "llvm.hexagon.M2.mmpyul.s1",
  "llvm.hexagon.M2.mpy.acc.hh.s0",
  "llvm.hexagon.M2.mpy.acc.hh.s1",
  "llvm.hexagon.M2.mpy.acc.hl.s0",
  "llvm.hexagon.M2.mpy.acc.hl.s1",
  "llvm.hexagon.M2.mpy.acc.lh.s0",
  "llvm.hexagon.M2.mpy.acc.lh.s1",
  "llvm.hexagon.M2.mpy.acc.ll.s0",
  "llvm.hexagon.M2.mpy.acc.ll.s1",
  "llvm.hexagon.M2.mpy.acc.sat.hh.s0",
  "llvm.hexagon.M2.mpy.acc.sat.hh.s1",
  "llvm.hexagon.M2.mpy.acc.sat.hl.s0",
  "llvm.hexagon.M2.mpy.acc.sat.hl.s1",
  "llvm.hexagon.M2.mpy.acc.sat.lh.s0",
  "llvm.hexagon.M2.mpy.acc.sat.lh.s1",
  "llvm.hexagon.M2.mpy.acc.sat.ll.s0",
  "llvm.hexagon.M2.mpy.acc.sat.ll.s1",
  "llvm.hexagon.M2.mpy.hh.s0",
  "llvm.hexagon.M2.mpy.hh.s1",
  "llvm.hexagon.M2.mpy.hl.s0",
  "llvm.hexagon.M2.mpy.hl.s1",
  "llvm.hexagon.M2.mpy.lh.s0",
  "llvm.hexagon.M2.mpy.lh.s1",
  "llvm.hexagon.M2.mpy.ll.s0",
  "llvm.hexagon.M2.mpy.ll.s1",
  "llvm.hexagon.M2.mpy.nac.hh.s0",
  "llvm.hexagon.M2.mpy.nac.hh.s1",
  "llvm.hexagon.M2.mpy.nac.hl.s0",
  "llvm.hexagon.M2.mpy.nac.hl.s1",
  "llvm.hexagon.M2.mpy.nac.lh.s0",
  "llvm.hexagon.M2.mpy.nac.lh.s1",
  "llvm.hexagon.M2.mpy.nac.ll.s0",
  "llvm.hexagon.M2.mpy.nac.ll.s1",
  "llvm.hexagon.M2.mpy.nac.sat.hh.s0",
  "llvm.hexagon.M2.mpy.nac.sat.hh.s1",
  "llvm.hexagon.M2.mpy.nac.sat.hl.s0",
  "llvm.hexagon.M2.mpy.nac.sat.hl.s1",
  "llvm.hexagon.M2.mpy.nac.sat.lh.s0",
  "llvm.hexagon.M2.mpy.nac.sat.lh.s1",
  "llvm.hexagon.M2.mpy.nac.sat.ll.s0",
  "llvm.hexagon.M2.mpy.nac.sat.ll.s1",
  "llvm.hexagon.M2.mpy.rnd.hh.s0",
  "llvm.hexagon.M2.mpy.rnd.hh.s1",
  "llvm.hexagon.M2.mpy.rnd.hl.s0",
  "llvm.hexagon.M2.mpy.rnd.hl.s1",
  "llvm.hexagon.M2.mpy.rnd.lh.s0",
  "llvm.hexagon.M2.mpy.rnd.lh.s1",
  "llvm.hexagon.M2.mpy.rnd.ll.s0",
  "llvm.hexagon.M2.mpy.rnd.ll.s1",
  "llvm.hexagon.M2.mpy.sat.hh.s0",
  "llvm.hexagon.M2.mpy.sat.hh.s1",
  "llvm.hexagon.M2.mpy.sat.hl.s0",
  "llvm.hexagon.M2.mpy.sat.hl.s1",
  "llvm.hexagon.M2.mpy.sat.lh.s0",
  "llvm.hexagon.M2.mpy.sat.lh.s1",
  "llvm.hexagon.M2.mpy.sat.ll.s0",
  "llvm.hexagon.M2.mpy.sat.ll.s1",
  "llvm.hexagon.M2.mpy.sat.rnd.hh.s0",
  "llvm.hexagon.M2.mpy.sat.rnd.hh.s1",
  "llvm.hexagon.M2.mpy.sat.rnd.hl.s0",
  "llvm.hexagon.M2.mpy.sat.rnd.hl.s1",
  "llvm.hexagon.M2.mpy.sat.rnd.lh.s0",
  "llvm.hexagon.M2.mpy.sat.rnd.lh.s1",
  "llvm.hexagon.M2.mpy.sat.rnd.ll.s0",
  "llvm.hexagon.M2.mpy.sat.rnd.ll.s1",
  "llvm.hexagon.M2.mpy.up",
  "llvm.hexagon.M2.mpy.up.s1",
  "llvm.hexagon.M2.mpy.up.s1.sat",
  "llvm.hexagon.M2.mpyd.acc.hh.s0",
  "llvm.hexagon.M2.mpyd.acc.hh.s1",
  "llvm.hexagon.M2.mpyd.acc.hl.s0",
  "llvm.hexagon.M2.mpyd.acc.hl.s1",
  "llvm.hexagon.M2.mpyd.acc.lh.s0",
  "llvm.hexagon.M2.mpyd.acc.lh.s1",
  "llvm.hexagon.M2.mpyd.acc.ll.s0",
  "llvm.hexagon.M2.mpyd.acc.ll.s1",
  "llvm.hexagon.M2.mpyd.hh.s0",
  "llvm.hexagon.M2.mpyd.hh.s1",
  "llvm.hexagon.M2.mpyd.hl.s0",
  "llvm.hexagon.M2.mpyd.hl.s1",
  "llvm.hexagon.M2.mpyd.lh.s0",
  "llvm.hexagon.M2.mpyd.lh.s1",
  "llvm.hexagon.M2.mpyd.ll.s0",
  "llvm.hexagon.M2.mpyd.ll.s1",
  "llvm.hexagon.M2.mpyd.nac.hh.s0",
  "llvm.hexagon.M2.mpyd.nac.hh.s1",
  "llvm.hexagon.M2.mpyd.nac.hl.s0",
  "llvm.hexagon.M2.mpyd.nac.hl.s1",
  "llvm.hexagon.M2.mpyd.nac.lh.s0",
  "llvm.hexagon.M2.mpyd.nac.lh.s1",
  "llvm.hexagon.M2.mpyd.nac.ll.s0",
  "llvm.hexagon.M2.mpyd.nac.ll.s1",
  "llvm.hexagon.M2.mpyd.rnd.hh.s0",
  "llvm.hexagon.M2.mpyd.rnd.hh.s1",
  "llvm.hexagon.M2.mpyd.rnd.hl.s0",
  "llvm.hexagon.M2.mpyd.rnd.hl.s1",
  "llvm.hexagon.M2.mpyd.rnd.lh.s0",
  "llvm.hexagon.M2.mpyd.rnd.lh.s1",
  "llvm.hexagon.M2.mpyd.rnd.ll.s0",
  "llvm.hexagon.M2.mpyd.rnd.ll.s1",
  "llvm.hexagon.M2.mpyi",
  "llvm.hexagon.M2.mpysmi",
  "llvm.hexagon.M2.mpysu.up",
  "llvm.hexagon.M2.mpyu.acc.hh.s0",
  "llvm.hexagon.M2.mpyu.acc.hh.s1",
  "llvm.hexagon.M2.mpyu.acc.hl.s0",
  "llvm.hexagon.M2.mpyu.acc.hl.s1",
  "llvm.hexagon.M2.mpyu.acc.lh.s0",
  "llvm.hexagon.M2.mpyu.acc.lh.s1",
  "llvm.hexagon.M2.mpyu.acc.ll.s0",
  "llvm.hexagon.M2.mpyu.acc.ll.s1",
  "llvm.hexagon.M2.mpyu.hh.s0",
  "llvm.hexagon.M2.mpyu.hh.s1",
  "llvm.hexagon.M2.mpyu.hl.s0",
  "llvm.hexagon.M2.mpyu.hl.s1",
  "llvm.hexagon.M2.mpyu.lh.s0",
  "llvm.hexagon.M2.mpyu.lh.s1",
  "llvm.hexagon.M2.mpyu.ll.s0",
  "llvm.hexagon.M2.mpyu.ll.s1",
  "llvm.hexagon.M2.mpyu.nac.hh.s0",
  "llvm.hexagon.M2.mpyu.nac.hh.s1",
  "llvm.hexagon.M2.mpyu.nac.hl.s0",
  "llvm.hexagon.M2.mpyu.nac.hl.s1",
  "llvm.hexagon.M2.mpyu.nac.lh.s0",
  "llvm.hexagon.M2.mpyu.nac.lh.s1",
  "llvm.hexagon.M2.mpyu.nac.ll.s0",
  "llvm.hexagon.M2.mpyu.nac.ll.s1",
  "llvm.hexagon.M2.mpyu.up",
  "llvm.hexagon.M2.mpyud.acc.hh.s0",
  "llvm.hexagon.M2.mpyud.acc.hh.s1",
  "llvm.hexagon.M2.mpyud.acc.hl.s0",
  "llvm.hexagon.M2.mpyud.acc.hl.s1",
  "llvm.hexagon.M2.mpyud.acc.lh.s0",
  "llvm.hexagon.M2.mpyud.acc.lh.s1",
  "llvm.hexagon.M2.mpyud.acc.ll.s0",
  "llvm.hexagon.M2.mpyud.acc.ll.s1",
  "llvm.hexagon.M2.mpyud.hh.s0",
  "llvm.hexagon.M2.mpyud.hh.s1",
  "llvm.hexagon.M2.mpyud.hl.s0",
  "llvm.hexagon.M2.mpyud.hl.s1",
  "llvm.hexagon.M2.mpyud.lh.s0",
  "llvm.hexagon.M2.mpyud.lh.s1",
  "llvm.hexagon.M2.mpyud.ll.s0",
  "llvm.hexagon.M2.mpyud.ll.s1",
  "llvm.hexagon.M2.mpyud.nac.hh.s0",
  "llvm.hexagon.M2.mpyud.nac.hh.s1",
  "llvm.hexagon.M2.mpyud.nac.hl.s0",
  "llvm.hexagon.M2.mpyud.nac.hl.s1",
  "llvm.hexagon.M2.mpyud.nac.lh.s0",
  "llvm.hexagon.M2.mpyud.nac.lh.s1",
  "llvm.hexagon.M2.mpyud.nac.ll.s0",
  "llvm.hexagon.M2.mpyud.nac.ll.s1",
  "llvm.hexagon.M2.mpyui",
  "llvm.hexagon.M2.nacci",
  "llvm.hexagon.M2.naccii",
  "llvm.hexagon.M2.subacc",
  "llvm.hexagon.M2.vabsdiffh",
  "llvm.hexagon.M2.vabsdiffw",
  "llvm.hexagon.M2.vcmac.s0.sat.i",
  "llvm.hexagon.M2.vcmac.s0.sat.r",
  "llvm.hexagon.M2.vcmpy.s0.sat.i",
  "llvm.hexagon.M2.vcmpy.s0.sat.r",
  "llvm.hexagon.M2.vcmpy.s1.sat.i",
  "llvm.hexagon.M2.vcmpy.s1.sat.r",
  "llvm.hexagon.M2.vdmacs.s0",
  "llvm.hexagon.M2.vdmacs.s1",
  "llvm.hexagon.M2.vdmpyrs.s0",
  "llvm.hexagon.M2.vdmpyrs.s1",
  "llvm.hexagon.M2.vdmpys.s0",
  "llvm.hexagon.M2.vdmpys.s1",
  "llvm.hexagon.M2.vmac2",
  "llvm.hexagon.M2.vmac2es",
  "llvm.hexagon.M2.vmac2es.s0",
  "llvm.hexagon.M2.vmac2es.s1",
  "llvm.hexagon.M2.vmac2s.s0",
  "llvm.hexagon.M2.vmac2s.s1",
  "llvm.hexagon.M2.vmac2su.s0",
  "llvm.hexagon.M2.vmac2su.s1",
  "llvm.hexagon.M2.vmpy2es.s0",
  "llvm.hexagon.M2.vmpy2es.s1",
  "llvm.hexagon.M2.vmpy2s.s0",
  "llvm.hexagon.M2.vmpy2s.s0pack",
  "llvm.hexagon.M2.vmpy2s.s1",
  "llvm.hexagon.M2.vmpy2s.s1pack",
  "llvm.hexagon.M2.vmpy2su.s0",
  "llvm.hexagon.M2.vmpy2su.s1",
  "llvm.hexagon.M2.vraddh",
  "llvm.hexagon.M2.vradduh",
  "llvm.hexagon.M2.vrcmaci.s0",
  "llvm.hexagon.M2.vrcmaci.s0c",
  "llvm.hexagon.M2.vrcmacr.s0",
  "llvm.hexagon.M2.vrcmacr.s0c",
  "llvm.hexagon.M2.vrcmpyi.s0",
  "llvm.hexagon.M2.vrcmpyi.s0c",
  "llvm.hexagon.M2.vrcmpyr.s0",
  "llvm.hexagon.M2.vrcmpyr.s0c",
  "llvm.hexagon.M2.vrcmpys.acc.s1",
  "llvm.hexagon.M2.vrcmpys.s1",
  "llvm.hexagon.M2.vrcmpys.s1rp",
  "llvm.hexagon.M2.vrmac.s0",
  "llvm.hexagon.M2.vrmpy.s0",
  "llvm.hexagon.M2.xor.xacc",
  "llvm.hexagon.M4.and.and",
  "llvm.hexagon.M4.and.andn",
  "llvm.hexagon.M4.and.or",
  "llvm.hexagon.M4.and.xor",
  "llvm.hexagon.M4.cmpyi.wh",
  "llvm.hexagon.M4.cmpyi.whc",
  "llvm.hexagon.M4.cmpyr.wh",
  "llvm.hexagon.M4.cmpyr.whc",
  "llvm.hexagon.M4.mac.up.s1.sat",
  "llvm.hexagon.M4.mpyri.addi",
  "llvm.hexagon.M4.mpyri.addr",
  "llvm.hexagon.M4.mpyri.addr.u2",
  "llvm.hexagon.M4.mpyrr.addi",
  "llvm.hexagon.M4.mpyrr.addr",
  "llvm.hexagon.M4.nac.up.s1.sat",
  "llvm.hexagon.M4.or.and",
  "llvm.hexagon.M4.or.andn",
  "llvm.hexagon.M4.or.or",
  "llvm.hexagon.M4.or.xor",
  "llvm.hexagon.M4.pmpyw",
  "llvm.hexagon.M4.pmpyw.acc",
  "llvm.hexagon.M4.vpmpyh",
  "llvm.hexagon.M4.vpmpyh.acc",
  "llvm.hexagon.M4.vrmpyeh.acc.s0",
  "llvm.hexagon.M4.vrmpyeh.acc.s1",
  "llvm.hexagon.M4.vrmpyeh.s0",
  "llvm.hexagon.M4.vrmpyeh.s1",
  "llvm.hexagon.M4.vrmpyoh.acc.s0",
  "llvm.hexagon.M4.vrmpyoh.acc.s1",
  "llvm.hexagon.M4.vrmpyoh.s0",
  "llvm.hexagon.M4.vrmpyoh.s1",
  "llvm.hexagon.M4.xor.and",
  "llvm.hexagon.M4.xor.andn",
  "llvm.hexagon.M4.xor.or",
  "llvm.hexagon.M4.xor.xacc",
  "llvm.hexagon.M5.vdmacbsu",
  "llvm.hexagon.M5.vdmpybsu",
  "llvm.hexagon.M5.vmacbsu",
  "llvm.hexagon.M5.vmacbuu",
  "llvm.hexagon.M5.vmpybsu",
  "llvm.hexagon.M5.vmpybuu",
  "llvm.hexagon.M5.vrmacbsu",
  "llvm.hexagon.M5.vrmacbuu",
  "llvm.hexagon.M5.vrmpybsu",
  "llvm.hexagon.M5.vrmpybuu",
  "llvm.hexagon.S2.addasl.rrri",
  "llvm.hexagon.S2.asl.i.p",
  "llvm.hexagon.S2.asl.i.p.acc",
  "llvm.hexagon.S2.asl.i.p.and",
  "llvm.hexagon.S2.asl.i.p.nac",
  "llvm.hexagon.S2.asl.i.p.or",
  "llvm.hexagon.S2.asl.i.p.xacc",
  "llvm.hexagon.S2.asl.i.r",
  "llvm.hexagon.S2.asl.i.r.acc",
  "llvm.hexagon.S2.asl.i.r.and",
  "llvm.hexagon.S2.asl.i.r.nac",
  "llvm.hexagon.S2.asl.i.r.or",
  "llvm.hexagon.S2.asl.i.r.sat",
  "llvm.hexagon.S2.asl.i.r.xacc",
  "llvm.hexagon.S2.asl.i.vh",
  "llvm.hexagon.S2.asl.i.vw",
  "llvm.hexagon.S2.asl.r.p",
  "llvm.hexagon.S2.asl.r.p.acc",
  "llvm.hexagon.S2.asl.r.p.and",
  "llvm.hexagon.S2.asl.r.p.nac",
  "llvm.hexagon.S2.asl.r.p.or",
  "llvm.hexagon.S2.asl.r.p.xor",
  "llvm.hexagon.S2.asl.r.r",
  "llvm.hexagon.S2.asl.r.r.acc",
  "llvm.hexagon.S2.asl.r.r.and",
  "llvm.hexagon.S2.asl.r.r.nac",
  "llvm.hexagon.S2.asl.r.r.or",
  "llvm.hexagon.S2.asl.r.r.sat",
  "llvm.hexagon.S2.asl.r.vh",
  "llvm.hexagon.S2.asl.r.vw",
  "llvm.hexagon.S2.asr.i.p",
  "llvm.hexagon.S2.asr.i.p.acc",
  "llvm.hexagon.S2.asr.i.p.and",
  "llvm.hexagon.S2.asr.i.p.nac",
  "llvm.hexagon.S2.asr.i.p.or",
  "llvm.hexagon.S2.asr.i.p.rnd",
  "llvm.hexagon.S2.asr.i.p.rnd.goodsyntax",
  "llvm.hexagon.S2.asr.i.r",
  "llvm.hexagon.S2.asr.i.r.acc",
  "llvm.hexagon.S2.asr.i.r.and",
  "llvm.hexagon.S2.asr.i.r.nac",
  "llvm.hexagon.S2.asr.i.r.or",
  "llvm.hexagon.S2.asr.i.r.rnd",
  "llvm.hexagon.S2.asr.i.r.rnd.goodsyntax",
  "llvm.hexagon.S2.asr.i.svw.trun",
  "llvm.hexagon.S2.asr.i.vh",
  "llvm.hexagon.S2.asr.i.vw",
  "llvm.hexagon.S2.asr.r.p",
  "llvm.hexagon.S2.asr.r.p.acc",
  "llvm.hexagon.S2.asr.r.p.and",
  "llvm.hexagon.S2.asr.r.p.nac",
  "llvm.hexagon.S2.asr.r.p.or",
  "llvm.hexagon.S2.asr.r.p.xor",
  "llvm.hexagon.S2.asr.r.r",
  "llvm.hexagon.S2.asr.r.r.acc",
  "llvm.hexagon.S2.asr.r.r.and",
  "llvm.hexagon.S2.asr.r.r.nac",
  "llvm.hexagon.S2.asr.r.r.or",
  "llvm.hexagon.S2.asr.r.r.sat",
  "llvm.hexagon.S2.asr.r.svw.trun",
  "llvm.hexagon.S2.asr.r.vh",
  "llvm.hexagon.S2.asr.r.vw",
  "llvm.hexagon.S2.brev",
  "llvm.hexagon.S2.brevp",
  "llvm.hexagon.S2.cl0",
  "llvm.hexagon.S2.cl0p",
  "llvm.hexagon.S2.cl1",
  "llvm.hexagon.S2.cl1p",
  "llvm.hexagon.S2.clb",
  "llvm.hexagon.S2.clbnorm",
  "llvm.hexagon.S2.clbp",
  "llvm.hexagon.S2.clrbit.i",
  "llvm.hexagon.S2.clrbit.r",
  "llvm.hexagon.S2.ct0",
  "llvm.hexagon.S2.ct0p",
  "llvm.hexagon.S2.ct1",
  "llvm.hexagon.S2.ct1p",
  "llvm.hexagon.S2.deinterleave",
  "llvm.hexagon.S2.extractu",
  "llvm.hexagon.S2.extractu.rp",
  "llvm.hexagon.S2.extractup",
  "llvm.hexagon.S2.extractup.rp",
  "llvm.hexagon.S2.insert",
  "llvm.hexagon.S2.insert.rp",
  "llvm.hexagon.S2.insertp",
  "llvm.hexagon.S2.insertp.rp",
  "llvm.hexagon.S2.interleave",
  "llvm.hexagon.S2.lfsp",
  "llvm.hexagon.S2.lsl.r.p",
  "llvm.hexagon.S2.lsl.r.p.acc",
  "llvm.hexagon.S2.lsl.r.p.and",
  "llvm.hexagon.S2.lsl.r.p.nac",
  "llvm.hexagon.S2.lsl.r.p.or",
  "llvm.hexagon.S2.lsl.r.p.xor",
  "llvm.hexagon.S2.lsl.r.r",
  "llvm.hexagon.S2.lsl.r.r.acc",
  "llvm.hexagon.S2.lsl.r.r.and",
  "llvm.hexagon.S2.lsl.r.r.nac",
  "llvm.hexagon.S2.lsl.r.r.or",
  "llvm.hexagon.S2.lsl.r.vh",
  "llvm.hexagon.S2.lsl.r.vw",
  "llvm.hexagon.S2.lsr.i.p",
  "llvm.hexagon.S2.lsr.i.p.acc",
  "llvm.hexagon.S2.lsr.i.p.and",
  "llvm.hexagon.S2.lsr.i.p.nac",
  "llvm.hexagon.S2.lsr.i.p.or",
  "llvm.hexagon.S2.lsr.i.p.xacc",
  "llvm.hexagon.S2.lsr.i.r",
  "llvm.hexagon.S2.lsr.i.r.acc",
  "llvm.hexagon.S2.lsr.i.r.and",
  "llvm.hexagon.S2.lsr.i.r.nac",
  "llvm.hexagon.S2.lsr.i.r.or",
  "llvm.hexagon.S2.lsr.i.r.xacc",
  "llvm.hexagon.S2.lsr.i.vh",
  "llvm.hexagon.S2.lsr.i.vw",
  "llvm.hexagon.S2.lsr.r.p",
  "llvm.hexagon.S2.lsr.r.p.acc",
  "llvm.hexagon.S2.lsr.r.p.and",
  "llvm.hexagon.S2.lsr.r.p.nac",
  "llvm.hexagon.S2.lsr.r.p.or",
  "llvm.hexagon.S2.lsr.r.p.xor",
  "llvm.hexagon.S2.lsr.r.r",
  "llvm.hexagon.S2.lsr.r.r.acc",
  "llvm.hexagon.S2.lsr.r.r.and",
  "llvm.hexagon.S2.lsr.r.r.nac",
  "llvm.hexagon.S2.lsr.r.r.or",
  "llvm.hexagon.S2.lsr.r.vh",
  "llvm.hexagon.S2.lsr.r.vw",
  "llvm.hexagon.S2.packhl",
  "llvm.hexagon.S2.parityp",
  "llvm.hexagon.S2.setbit.i",
  "llvm.hexagon.S2.setbit.r",
  "llvm.hexagon.S2.shuffeb",
  "llvm.hexagon.S2.shuffeh",
  "llvm.hexagon.S2.shuffob",
  "llvm.hexagon.S2.shuffoh",
  "llvm.hexagon.S2.svsathb",
  "llvm.hexagon.S2.svsathub",
  "llvm.hexagon.S2.tableidxb.goodsyntax",
  "llvm.hexagon.S2.tableidxd.goodsyntax",
  "llvm.hexagon.S2.tableidxh.goodsyntax",
  "llvm.hexagon.S2.tableidxw.goodsyntax",
  "llvm.hexagon.S2.togglebit.i",
  "llvm.hexagon.S2.togglebit.r",
  "llvm.hexagon.S2.tstbit.i",
  "llvm.hexagon.S2.tstbit.r",
  "llvm.hexagon.S2.valignib",
  "llvm.hexagon.S2.valignrb",
  "llvm.hexagon.S2.vcnegh",
  "llvm.hexagon.S2.vcrotate",
  "llvm.hexagon.S2.vrcnegh",
  "llvm.hexagon.S2.vrndpackwh",
  "llvm.hexagon.S2.vrndpackwhs",
  "llvm.hexagon.S2.vsathb",
  "llvm.hexagon.S2.vsathb.nopack",
  "llvm.hexagon.S2.vsathub",
  "llvm.hexagon.S2.vsathub.nopack",
  "llvm.hexagon.S2.vsatwh",
  "llvm.hexagon.S2.vsatwh.nopack",
  "llvm.hexagon.S2.vsatwuh",
  "llvm.hexagon.S2.vsatwuh.nopack",
  "llvm.hexagon.S2.vsplatrb",
  "llvm.hexagon.S2.vsplatrh",
  "llvm.hexagon.S2.vspliceib",
  "llvm.hexagon.S2.vsplicerb",
  "llvm.hexagon.S2.vsxtbh",
  "llvm.hexagon.S2.vsxthw",
  "llvm.hexagon.S2.vtrunehb",
  "llvm.hexagon.S2.vtrunewh",
  "llvm.hexagon.S2.vtrunohb",
  "llvm.hexagon.S2.vtrunowh",
  "llvm.hexagon.S2.vzxtbh",
  "llvm.hexagon.S2.vzxthw",
  "llvm.hexagon.S4.addaddi",
  "llvm.hexagon.S4.addi.asl.ri",
  "llvm.hexagon.S4.addi.lsr.ri",
  "llvm.hexagon.S4.andi.asl.ri",
  "llvm.hexagon.S4.andi.lsr.ri",
  "llvm.hexagon.S4.clbaddi",
  "llvm.hexagon.S4.clbpaddi",
  "llvm.hexagon.S4.clbpnorm",
  "llvm.hexagon.S4.extract",
  "llvm.hexagon.S4.extract.rp",
  "llvm.hexagon.S4.extractp",
  "llvm.hexagon.S4.extractp.rp",
  "llvm.hexagon.S4.lsli",
  "llvm.hexagon.S4.ntstbit.i",
  "llvm.hexagon.S4.ntstbit.r",
  "llvm.hexagon.S4.or.andi",
  "llvm.hexagon.S4.or.andix",
  "llvm.hexagon.S4.or.ori",
  "llvm.hexagon.S4.ori.asl.ri",
  "llvm.hexagon.S4.ori.lsr.ri",
  "llvm.hexagon.S4.parity",
  "llvm.hexagon.S4.subaddi",
  "llvm.hexagon.S4.subi.asl.ri",
  "llvm.hexagon.S4.subi.lsr.ri",
  "llvm.hexagon.S4.vrcrotate",
  "llvm.hexagon.S4.vrcrotate.acc",
  "llvm.hexagon.S4.vxaddsubh",
  "llvm.hexagon.S4.vxaddsubhr",
  "llvm.hexagon.S4.vxaddsubw",
  "llvm.hexagon.S4.vxsubaddh",
  "llvm.hexagon.S4.vxsubaddhr",
  "llvm.hexagon.S4.vxsubaddw",
  "llvm.hexagon.S5.asrhub.rnd.sat.goodsyntax",
  "llvm.hexagon.S5.asrhub.sat",
  "llvm.hexagon.S5.popcountp",
  "llvm.hexagon.S5.vasrhrnd.goodsyntax",
  "llvm.hexagon.SI.to.SXTHI.asrh",
  "llvm.hexagon.circ.ldd",
  "llvm.init.trampoline",
  "llvm.invariant.end",
  "llvm.invariant.start",
  "llvm.lifetime.end",
  "llvm.lifetime.start",
  "llvm.log",
  "llvm.log10",
  "llvm.log2",
  "llvm.longjmp",
  "llvm.memcpy",
  "llvm.memmove",
  "llvm.memset",
  "llvm.mips.absq.s.ph",
  "llvm.mips.absq.s.qb",
  "llvm.mips.absq.s.w",
  "llvm.mips.add.a.b",
  "llvm.mips.add.a.d",
  "llvm.mips.add.a.h",
  "llvm.mips.add.a.w",
  "llvm.mips.addq.ph",
  "llvm.mips.addq.s.ph",
  "llvm.mips.addq.s.w",
  "llvm.mips.addqh.ph",
  "llvm.mips.addqh.r.ph",
  "llvm.mips.addqh.r.w",
  "llvm.mips.addqh.w",
  "llvm.mips.adds.a.b",
  "llvm.mips.adds.a.d",
  "llvm.mips.adds.a.h",
  "llvm.mips.adds.a.w",
  "llvm.mips.adds.s.b",
  "llvm.mips.adds.s.d",
  "llvm.mips.adds.s.h",
  "llvm.mips.adds.s.w",
  "llvm.mips.adds.u.b",
  "llvm.mips.adds.u.d",
  "llvm.mips.adds.u.h",
  "llvm.mips.adds.u.w",
  "llvm.mips.addsc",
  "llvm.mips.addu.ph",
  "llvm.mips.addu.qb",
  "llvm.mips.addu.s.ph",
  "llvm.mips.addu.s.qb",
  "llvm.mips.adduh.qb",
  "llvm.mips.adduh.r.qb",
  "llvm.mips.addv.b",
  "llvm.mips.addv.d",
  "llvm.mips.addv.h",
  "llvm.mips.addv.w",
  "llvm.mips.addvi.b",
  "llvm.mips.addvi.d",
  "llvm.mips.addvi.h",
  "llvm.mips.addvi.w",
  "llvm.mips.addwc",
  "llvm.mips.and.v",
  "llvm.mips.andi.b",
  "llvm.mips.append",
  "llvm.mips.asub.s.b",
  "llvm.mips.asub.s.d",
  "llvm.mips.asub.s.h",
  "llvm.mips.asub.s.w",
  "llvm.mips.asub.u.b",
  "llvm.mips.asub.u.d",
  "llvm.mips.asub.u.h",
  "llvm.mips.asub.u.w",
  "llvm.mips.ave.s.b",
  "llvm.mips.ave.s.d",
  "llvm.mips.ave.s.h",
  "llvm.mips.ave.s.w",
  "llvm.mips.ave.u.b",
  "llvm.mips.ave.u.d",
  "llvm.mips.ave.u.h",
  "llvm.mips.ave.u.w",
  "llvm.mips.aver.s.b",
  "llvm.mips.aver.s.d",
  "llvm.mips.aver.s.h",
  "llvm.mips.aver.s.w",
  "llvm.mips.aver.u.b",
  "llvm.mips.aver.u.d",
  "llvm.mips.aver.u.h",
  "llvm.mips.aver.u.w",
  "llvm.mips.balign",
  "llvm.mips.bclr.b",
  "llvm.mips.bclr.d",
  "llvm.mips.bclr.h",
  "llvm.mips.bclr.w",
  "llvm.mips.bclri.b",
  "llvm.mips.bclri.d",
  "llvm.mips.bclri.h",
  "llvm.mips.bclri.w",
  "llvm.mips.binsl.b",
  "llvm.mips.binsl.d",
  "llvm.mips.binsl.h",
  "llvm.mips.binsl.w",
  "llvm.mips.binsli.b",
  "llvm.mips.binsli.d",
  "llvm.mips.binsli.h",
  "llvm.mips.binsli.w",
  "llvm.mips.binsr.b",
  "llvm.mips.binsr.d",
  "llvm.mips.binsr.h",
  "llvm.mips.binsr.w",
  "llvm.mips.binsri.b",
  "llvm.mips.binsri.d",
  "llvm.mips.binsri.h",
  "llvm.mips.binsri.w",
  "llvm.mips.bitrev",
  "llvm.mips.bmnz.v",
  "llvm.mips.bmnzi.b",
  "llvm.mips.bmz.v",
  "llvm.mips.bmzi.b",
  "llvm.mips.bneg.b",
  "llvm.mips.bneg.d",
  "llvm.mips.bneg.h",
  "llvm.mips.bneg.w",
  "llvm.mips.bnegi.b",
  "llvm.mips.bnegi.d",
  "llvm.mips.bnegi.h",
  "llvm.mips.bnegi.w",
  "llvm.mips.bnz.b",
  "llvm.mips.bnz.d",
  "llvm.mips.bnz.h",
  "llvm.mips.bnz.v",
  "llvm.mips.bnz.w",
  "llvm.mips.bposge32",
  "llvm.mips.bsel.v",
  "llvm.mips.bseli.b",
  "llvm.mips.bset.b",
  "llvm.mips.bset.d",
  "llvm.mips.bset.h",
  "llvm.mips.bset.w",
  "llvm.mips.bseti.b",
  "llvm.mips.bseti.d",
  "llvm.mips.bseti.h",
  "llvm.mips.bseti.w",
  "llvm.mips.bz.b",
  "llvm.mips.bz.d",
  "llvm.mips.bz.h",
  "llvm.mips.bz.v",
  "llvm.mips.bz.w",
  "llvm.mips.ceq.b",
  "llvm.mips.ceq.d",
  "llvm.mips.ceq.h",
  "llvm.mips.ceq.w",
  "llvm.mips.ceqi.b",
  "llvm.mips.ceqi.d",
  "llvm.mips.ceqi.h",
  "llvm.mips.ceqi.w",
  "llvm.mips.cfcmsa",
  "llvm.mips.cle.s.b",
  "llvm.mips.cle.s.d",
  "llvm.mips.cle.s.h",
  "llvm.mips.cle.s.w",
  "llvm.mips.cle.u.b",
  "llvm.mips.cle.u.d",
  "llvm.mips.cle.u.h",
  "llvm.mips.cle.u.w",
  "llvm.mips.clei.s.b",
  "llvm.mips.clei.s.d",
  "llvm.mips.clei.s.h",
  "llvm.mips.clei.s.w",
  "llvm.mips.clei.u.b",
  "llvm.mips.clei.u.d",
  "llvm.mips.clei.u.h",
  "llvm.mips.clei.u.w",
  "llvm.mips.clt.s.b",
  "llvm.mips.clt.s.d",
  "llvm.mips.clt.s.h",
  "llvm.mips.clt.s.w",
  "llvm.mips.clt.u.b",
  "llvm.mips.clt.u.d",
  "llvm.mips.clt.u.h",
  "llvm.mips.clt.u.w",
  "llvm.mips.clti.s.b",
  "llvm.mips.clti.s.d",
  "llvm.mips.clti.s.h",
  "llvm.mips.clti.s.w",
  "llvm.mips.clti.u.b",
  "llvm.mips.clti.u.d",
  "llvm.mips.clti.u.h",
  "llvm.mips.clti.u.w",
  "llvm.mips.cmp.eq.ph",
  "llvm.mips.cmp.le.ph",
  "llvm.mips.cmp.lt.ph",
  "llvm.mips.cmpgdu.eq.qb",
  "llvm.mips.cmpgdu.le.qb",
  "llvm.mips.cmpgdu.lt.qb",
  "llvm.mips.cmpgu.eq.qb",
  "llvm.mips.cmpgu.le.qb",
  "llvm.mips.cmpgu.lt.qb",
  "llvm.mips.cmpu.eq.qb",
  "llvm.mips.cmpu.le.qb",
  "llvm.mips.cmpu.lt.qb",
  "llvm.mips.copy.s.b",
  "llvm.mips.copy.s.d",
  "llvm.mips.copy.s.h",
  "llvm.mips.copy.s.w",
  "llvm.mips.copy.u.b",
  "llvm.mips.copy.u.d",
  "llvm.mips.copy.u.h",
  "llvm.mips.copy.u.w",
  "llvm.mips.ctcmsa",
  "llvm.mips.div.s.b",
  "llvm.mips.div.s.d",
  "llvm.mips.div.s.h",
  "llvm.mips.div.s.w",
  "llvm.mips.div.u.b",
  "llvm.mips.div.u.d",
  "llvm.mips.div.u.h",
  "llvm.mips.div.u.w",
  "llvm.mips.dlsa",
  "llvm.mips.dotp.s.d",
  "llvm.mips.dotp.s.h",
  "llvm.mips.dotp.s.w",
  "llvm.mips.dotp.u.d",
  "llvm.mips.dotp.u.h",
  "llvm.mips.dotp.u.w",
  "llvm.mips.dpa.w.ph",
  "llvm.mips.dpadd.s.d",
  "llvm.mips.dpadd.s.h",
  "llvm.mips.dpadd.s.w",
  "llvm.mips.dpadd.u.d",
  "llvm.mips.dpadd.u.h",
  "llvm.mips.dpadd.u.w",
  "llvm.mips.dpaq.s.w.ph",
  "llvm.mips.dpaq.sa.l.w",
  "llvm.mips.dpaqx.s.w.ph",
  "llvm.mips.dpaqx.sa.w.ph",
  "llvm.mips.dpau.h.qbl",
  "llvm.mips.dpau.h.qbr",
  "llvm.mips.dpax.w.ph",
  "llvm.mips.dps.w.ph",
  "llvm.mips.dpsq.s.w.ph",
  "llvm.mips.dpsq.sa.l.w",
  "llvm.mips.dpsqx.s.w.ph",
  "llvm.mips.dpsqx.sa.w.ph",
  "llvm.mips.dpsu.h.qbl",
  "llvm.mips.dpsu.h.qbr",
  "llvm.mips.dpsub.s.d",
  "llvm.mips.dpsub.s.h",
  "llvm.mips.dpsub.s.w",
  "llvm.mips.dpsub.u.d",
  "llvm.mips.dpsub.u.h",
  "llvm.mips.dpsub.u.w",
  "llvm.mips.dpsx.w.ph",
  "llvm.mips.extp",
  "llvm.mips.extpdp",
  "llvm.mips.extr.r.w",
  "llvm.mips.extr.rs.w",
  "llvm.mips.extr.s.h",
  "llvm.mips.extr.w",
  "llvm.mips.fadd.d",
  "llvm.mips.fadd.w",
  "llvm.mips.fcaf.d",
  "llvm.mips.fcaf.w",
  "llvm.mips.fceq.d",
  "llvm.mips.fceq.w",
  "llvm.mips.fclass.d",
  "llvm.mips.fclass.w",
  "llvm.mips.fcle.d",
  "llvm.mips.fcle.w",
  "llvm.mips.fclt.d",
  "llvm.mips.fclt.w",
  "llvm.mips.fcne.d",
  "llvm.mips.fcne.w",
  "llvm.mips.fcor.d",
  "llvm.mips.fcor.w",
  "llvm.mips.fcueq.d",
  "llvm.mips.fcueq.w",
  "llvm.mips.fcule.d",
  "llvm.mips.fcule.w",
  "llvm.mips.fcult.d",
  "llvm.mips.fcult.w",
  "llvm.mips.fcun.d",
  "llvm.mips.fcun.w",
  "llvm.mips.fcune.d",
  "llvm.mips.fcune.w",
  "llvm.mips.fdiv.d",
  "llvm.mips.fdiv.w",
  "llvm.mips.fexdo.h",
  "llvm.mips.fexdo.w",
  "llvm.mips.fexp2.d",
  "llvm.mips.fexp2.w",
  "llvm.mips.fexupl.d",
  "llvm.mips.fexupl.w",
  "llvm.mips.fexupr.d",
  "llvm.mips.fexupr.w",
  "llvm.mips.ffint.s.d",
  "llvm.mips.ffint.s.w",
  "llvm.mips.ffint.u.d",
  "llvm.mips.ffint.u.w",
  "llvm.mips.ffql.d",
  "llvm.mips.ffql.w",
  "llvm.mips.ffqr.d",
  "llvm.mips.ffqr.w",
  "llvm.mips.fill.b",
  "llvm.mips.fill.d",
  "llvm.mips.fill.h",
  "llvm.mips.fill.w",
  "llvm.mips.flog2.d",
  "llvm.mips.flog2.w",
  "llvm.mips.fmadd.d",
  "llvm.mips.fmadd.w",
  "llvm.mips.fmax.a.d",
  "llvm.mips.fmax.a.w",
  "llvm.mips.fmax.d",
  "llvm.mips.fmax.w",
  "llvm.mips.fmin.a.d",
  "llvm.mips.fmin.a.w",
  "llvm.mips.fmin.d",
  "llvm.mips.fmin.w",
  "llvm.mips.fmsub.d",
  "llvm.mips.fmsub.w",
  "llvm.mips.fmul.d",
  "llvm.mips.fmul.w",
  "llvm.mips.frcp.d",
  "llvm.mips.frcp.w",
  "llvm.mips.frint.d",
  "llvm.mips.frint.w",
  "llvm.mips.frsqrt.d",
  "llvm.mips.frsqrt.w",
  "llvm.mips.fsaf.d",
  "llvm.mips.fsaf.w",
  "llvm.mips.fseq.d",
  "llvm.mips.fseq.w",
  "llvm.mips.fsle.d",
  "llvm.mips.fsle.w",
  "llvm.mips.fslt.d",
  "llvm.mips.fslt.w",
  "llvm.mips.fsne.d",
  "llvm.mips.fsne.w",
  "llvm.mips.fsor.d",
  "llvm.mips.fsor.w",
  "llvm.mips.fsqrt.d",
  "llvm.mips.fsqrt.w",
  "llvm.mips.fsub.d",
  "llvm.mips.fsub.w",
  "llvm.mips.fsueq.d",
  "llvm.mips.fsueq.w",
  "llvm.mips.fsule.d",
  "llvm.mips.fsule.w",
  "llvm.mips.fsult.d",
  "llvm.mips.fsult.w",
  "llvm.mips.fsun.d",
  "llvm.mips.fsun.w",
  "llvm.mips.fsune.d",
  "llvm.mips.fsune.w",
  "llvm.mips.ftint.s.d",
  "llvm.mips.ftint.s.w",
  "llvm.mips.ftint.u.d",
  "llvm.mips.ftint.u.w",
  "llvm.mips.ftq.h",
  "llvm.mips.ftq.w",
  "llvm.mips.ftrunc.s.d",
  "llvm.mips.ftrunc.s.w",
  "llvm.mips.ftrunc.u.d",
  "llvm.mips.ftrunc.u.w",
  "llvm.mips.hadd.s.d",
  "llvm.mips.hadd.s.h",
  "llvm.mips.hadd.s.w",
  "llvm.mips.hadd.u.d",
  "llvm.mips.hadd.u.h",
  "llvm.mips.hadd.u.w",
  "llvm.mips.hsub.s.d",
  "llvm.mips.hsub.s.h",
  "llvm.mips.hsub.s.w",
  "llvm.mips.hsub.u.d",
  "llvm.mips.hsub.u.h",
  "llvm.mips.hsub.u.w",
  "llvm.mips.ilvev.b",
  "llvm.mips.ilvev.d",
  "llvm.mips.ilvev.h",
  "llvm.mips.ilvev.w",
  "llvm.mips.ilvl.b",
  "llvm.mips.ilvl.d",
  "llvm.mips.ilvl.h",
  "llvm.mips.ilvl.w",
  "llvm.mips.ilvod.b",
  "llvm.mips.ilvod.d",
  "llvm.mips.ilvod.h",
  "llvm.mips.ilvod.w",
  "llvm.mips.ilvr.b",
  "llvm.mips.ilvr.d",
  "llvm.mips.ilvr.h",
  "llvm.mips.ilvr.w",
  "llvm.mips.insert.b",
  "llvm.mips.insert.d",
  "llvm.mips.insert.h",
  "llvm.mips.insert.w",
  "llvm.mips.insv",
  "llvm.mips.insve.b",
  "llvm.mips.insve.d",
  "llvm.mips.insve.h",
  "llvm.mips.insve.w",
  "llvm.mips.lbux",
  "llvm.mips.ld.b",
  "llvm.mips.ld.d",
  "llvm.mips.ld.h",
  "llvm.mips.ld.w",
  "llvm.mips.ldi.b",
  "llvm.mips.ldi.d",
  "llvm.mips.ldi.h",
  "llvm.mips.ldi.w",
  "llvm.mips.lhx",
  "llvm.mips.lsa",
  "llvm.mips.lwx",
  "llvm.mips.madd",
  "llvm.mips.madd.q.h",
  "llvm.mips.madd.q.w",
  "llvm.mips.maddr.q.h",
  "llvm.mips.maddr.q.w",
  "llvm.mips.maddu",
  "llvm.mips.maddv.b",
  "llvm.mips.maddv.d",
  "llvm.mips.maddv.h",
  "llvm.mips.maddv.w",
  "llvm.mips.maq.s.w.phl",
  "llvm.mips.maq.s.w.phr",
  "llvm.mips.maq.sa.w.phl",
  "llvm.mips.maq.sa.w.phr",
  "llvm.mips.max.a.b",
  "llvm.mips.max.a.d",
  "llvm.mips.max.a.h",
  "llvm.mips.max.a.w",
  "llvm.mips.max.s.b",
  "llvm.mips.max.s.d",
  "llvm.mips.max.s.h",
  "llvm.mips.max.s.w",
  "llvm.mips.max.u.b",
  "llvm.mips.max.u.d",
  "llvm.mips.max.u.h",
  "llvm.mips.max.u.w",
  "llvm.mips.maxi.s.b",
  "llvm.mips.maxi.s.d",
  "llvm.mips.maxi.s.h",
  "llvm.mips.maxi.s.w",
  "llvm.mips.maxi.u.b",
  "llvm.mips.maxi.u.d",
  "llvm.mips.maxi.u.h",
  "llvm.mips.maxi.u.w",
  "llvm.mips.min.a.b",
  "llvm.mips.min.a.d",
  "llvm.mips.min.a.h",
  "llvm.mips.min.a.w",
  "llvm.mips.min.s.b",
  "llvm.mips.min.s.d",
  "llvm.mips.min.s.h",
  "llvm.mips.min.s.w",
  "llvm.mips.min.u.b",
  "llvm.mips.min.u.d",
  "llvm.mips.min.u.h",
  "llvm.mips.min.u.w",
  "llvm.mips.mini.s.b",
  "llvm.mips.mini.s.d",
  "llvm.mips.mini.s.h",
  "llvm.mips.mini.s.w",
  "llvm.mips.mini.u.b",
  "llvm.mips.mini.u.d",
  "llvm.mips.mini.u.h",
  "llvm.mips.mini.u.w",
  "llvm.mips.mod.s.b",
  "llvm.mips.mod.s.d",
  "llvm.mips.mod.s.h",
  "llvm.mips.mod.s.w",
  "llvm.mips.mod.u.b",
  "llvm.mips.mod.u.d",
  "llvm.mips.mod.u.h",
  "llvm.mips.mod.u.w",
  "llvm.mips.modsub",
  "llvm.mips.move.v",
  "llvm.mips.msub",
  "llvm.mips.msub.q.h",
  "llvm.mips.msub.q.w",
  "llvm.mips.msubr.q.h",
  "llvm.mips.msubr.q.w",
  "llvm.mips.msubu",
  "llvm.mips.msubv.b",
  "llvm.mips.msubv.d",
  "llvm.mips.msubv.h",
  "llvm.mips.msubv.w",
  "llvm.mips.mthlip",
  "llvm.mips.mul.ph",
  "llvm.mips.mul.q.h",
  "llvm.mips.mul.q.w",
  "llvm.mips.mul.s.ph",
  "llvm.mips.muleq.s.w.phl",
  "llvm.mips.muleq.s.w.phr",
  "llvm.mips.muleu.s.ph.qbl",
  "llvm.mips.muleu.s.ph.qbr",
  "llvm.mips.mulq.rs.ph",
  "llvm.mips.mulq.rs.w",
  "llvm.mips.mulq.s.ph",
  "llvm.mips.mulq.s.w",
  "llvm.mips.mulr.q.h",
  "llvm.mips.mulr.q.w",
  "llvm.mips.mulsa.w.ph",
  "llvm.mips.mulsaq.s.w.ph",
  "llvm.mips.mult",
  "llvm.mips.multu",
  "llvm.mips.mulv.b",
  "llvm.mips.mulv.d",
  "llvm.mips.mulv.h",
  "llvm.mips.mulv.w",
  "llvm.mips.nloc.b",
  "llvm.mips.nloc.d",
  "llvm.mips.nloc.h",
  "llvm.mips.nloc.w",
  "llvm.mips.nlzc.b",
  "llvm.mips.nlzc.d",
  "llvm.mips.nlzc.h",
  "llvm.mips.nlzc.w",
  "llvm.mips.nor.v",
  "llvm.mips.nori.b",
  "llvm.mips.or.v",
  "llvm.mips.ori.b",
  "llvm.mips.packrl.ph",
  "llvm.mips.pckev.b",
  "llvm.mips.pckev.d",
  "llvm.mips.pckev.h",
  "llvm.mips.pckev.w",
  "llvm.mips.pckod.b",
  "llvm.mips.pckod.d",
  "llvm.mips.pckod.h",
  "llvm.mips.pckod.w",
  "llvm.mips.pcnt.b",
  "llvm.mips.pcnt.d",
  "llvm.mips.pcnt.h",
  "llvm.mips.pcnt.w",
  "llvm.mips.pick.ph",
  "llvm.mips.pick.qb",
  "llvm.mips.preceq.w.phl",
  "llvm.mips.preceq.w.phr",
  "llvm.mips.precequ.ph.qbl",
  "llvm.mips.precequ.ph.qbla",
  "llvm.mips.precequ.ph.qbr",
  "llvm.mips.precequ.ph.qbra",
  "llvm.mips.preceu.ph.qbl",
  "llvm.mips.preceu.ph.qbla",
  "llvm.mips.preceu.ph.qbr",
  "llvm.mips.preceu.ph.qbra",
  "llvm.mips.precr.qb.ph",
  "llvm.mips.precr.sra.ph.w",
  "llvm.mips.precr.sra.r.ph.w",
  "llvm.mips.precrq.ph.w",
  "llvm.mips.precrq.qb.ph",
  "llvm.mips.precrq.rs.ph.w",
  "llvm.mips.precrqu.s.qb.ph",
  "llvm.mips.prepend",
  "llvm.mips.raddu.w.qb",
  "llvm.mips.rddsp",
  "llvm.mips.repl.ph",
  "llvm.mips.repl.qb",
  "llvm.mips.sat.s.b",
  "llvm.mips.sat.s.d",
  "llvm.mips.sat.s.h",
  "llvm.mips.sat.s.w",
  "llvm.mips.sat.u.b",
  "llvm.mips.sat.u.d",
  "llvm.mips.sat.u.h",
  "llvm.mips.sat.u.w",
  "llvm.mips.shf.b",
  "llvm.mips.shf.h",
  "llvm.mips.shf.w",
  "llvm.mips.shilo",
  "llvm.mips.shll.ph",
  "llvm.mips.shll.qb",
  "llvm.mips.shll.s.ph",
  "llvm.mips.shll.s.w",
  "llvm.mips.shra.ph",
  "llvm.mips.shra.qb",
  "llvm.mips.shra.r.ph",
  "llvm.mips.shra.r.qb",
  "llvm.mips.shra.r.w",
  "llvm.mips.shrl.ph",
  "llvm.mips.shrl.qb",
  "llvm.mips.sld.b",
  "llvm.mips.sld.d",
  "llvm.mips.sld.h",
  "llvm.mips.sld.w",
  "llvm.mips.sldi.b",
  "llvm.mips.sldi.d",
  "llvm.mips.sldi.h",
  "llvm.mips.sldi.w",
  "llvm.mips.sll.b",
  "llvm.mips.sll.d",
  "llvm.mips.sll.h",
  "llvm.mips.sll.w",
  "llvm.mips.slli.b",
  "llvm.mips.slli.d",
  "llvm.mips.slli.h",
  "llvm.mips.slli.w",
  "llvm.mips.splat.b",
  "llvm.mips.splat.d",
  "llvm.mips.splat.h",
  "llvm.mips.splat.w",
  "llvm.mips.splati.b",
  "llvm.mips.splati.d",
  "llvm.mips.splati.h",
  "llvm.mips.splati.w",
  "llvm.mips.sra.b",
  "llvm.mips.sra.d",
  "llvm.mips.sra.h",
  "llvm.mips.sra.w",
  "llvm.mips.srai.b",
  "llvm.mips.srai.d",
  "llvm.mips.srai.h",
  "llvm.mips.srai.w",
  "llvm.mips.srar.b",
  "llvm.mips.srar.d",
  "llvm.mips.srar.h",
  "llvm.mips.srar.w",
  "llvm.mips.srari.b",
  "llvm.mips.srari.d",
  "llvm.mips.srari.h",
  "llvm.mips.srari.w",
  "llvm.mips.srl.b",
  "llvm.mips.srl.d",
  "llvm.mips.srl.h",
  "llvm.mips.srl.w",
  "llvm.mips.srli.b",
  "llvm.mips.srli.d",
  "llvm.mips.srli.h",
  "llvm.mips.srli.w",
  "llvm.mips.srlr.b",
  "llvm.mips.srlr.d",
  "llvm.mips.srlr.h",
  "llvm.mips.srlr.w",
  "llvm.mips.srlri.b",
  "llvm.mips.srlri.d",
  "llvm.mips.srlri.h",
  "llvm.mips.srlri.w",
  "llvm.mips.st.b",
  "llvm.mips.st.d",
  "llvm.mips.st.h",
  "llvm.mips.st.w",
  "llvm.mips.subq.ph",
  "llvm.mips.subq.s.ph",
  "llvm.mips.subq.s.w",
  "llvm.mips.subqh.ph",
  "llvm.mips.subqh.r.ph",
  "llvm.mips.subqh.r.w",
  "llvm.mips.subqh.w",
  "llvm.mips.subs.s.b",
  "llvm.mips.subs.s.d",
  "llvm.mips.subs.s.h",
  "llvm.mips.subs.s.w",
  "llvm.mips.subs.u.b",
  "llvm.mips.subs.u.d",
  "llvm.mips.subs.u.h",
  "llvm.mips.subs.u.w",
  "llvm.mips.subsus.u.b",
  "llvm.mips.subsus.u.d",
  "llvm.mips.subsus.u.h",
  "llvm.mips.subsus.u.w",
  "llvm.mips.subsuu.s.b",
  "llvm.mips.subsuu.s.d",
  "llvm.mips.subsuu.s.h",
  "llvm.mips.subsuu.s.w",
  "llvm.mips.subu.ph",
  "llvm.mips.subu.qb",
  "llvm.mips.subu.s.ph",
  "llvm.mips.subu.s.qb",
  "llvm.mips.subuh.qb",
  "llvm.mips.subuh.r.qb",
  "llvm.mips.subv.b",
  "llvm.mips.subv.d",
  "llvm.mips.subv.h",
  "llvm.mips.subv.w",
  "llvm.mips.subvi.b",
  "llvm.mips.subvi.d",
  "llvm.mips.subvi.h",
  "llvm.mips.subvi.w",
  "llvm.mips.vshf.b",
  "llvm.mips.vshf.d",
  "llvm.mips.vshf.h",
  "llvm.mips.vshf.w",
  "llvm.mips.wrdsp",
  "llvm.mips.xor.v",
  "llvm.mips.xori.b",
  "llvm.nearbyint",
  "llvm.nvvm.abs.i",
  "llvm.nvvm.abs.ll",
  "llvm.nvvm.add.rm.d",
  "llvm.nvvm.add.rm.f",
  "llvm.nvvm.add.rm.ftz.f",
  "llvm.nvvm.add.rn.d",
  "llvm.nvvm.add.rn.f",
  "llvm.nvvm.add.rn.ftz.f",
  "llvm.nvvm.add.rp.d",
  "llvm.nvvm.add.rp.f",
  "llvm.nvvm.add.rp.ftz.f",
  "llvm.nvvm.add.rz.d",
  "llvm.nvvm.add.rz.f",
  "llvm.nvvm.add.rz.ftz.f",
  "llvm.nvvm.atomic.load.add.f32",
  "llvm.nvvm.atomic.load.dec.32",
  "llvm.nvvm.atomic.load.inc.32",
  "llvm.nvvm.barrier0",
  "llvm.nvvm.barrier0.and",
  "llvm.nvvm.barrier0.or",
  "llvm.nvvm.barrier0.popc",
  "llvm.nvvm.bitcast.d2ll",
  "llvm.nvvm.bitcast.f2i",
  "llvm.nvvm.bitcast.i2f",
  "llvm.nvvm.bitcast.ll2d",
  "llvm.nvvm.brev32",
  "llvm.nvvm.brev64",
  "llvm.nvvm.ceil.d",
  "llvm.nvvm.ceil.f",
  "llvm.nvvm.ceil.ftz.f",
  "llvm.nvvm.clz.i",
  "llvm.nvvm.clz.ll",
  "llvm.nvvm.compiler.error",
  "llvm.nvvm.compiler.warn",
  "llvm.nvvm.cos.approx.f",
  "llvm.nvvm.cos.approx.ftz.f",
  "llvm.nvvm.d2f.rm",
  "llvm.nvvm.d2f.rm.ftz",
  "llvm.nvvm.d2f.rn",
  "llvm.nvvm.d2f.rn.ftz",
  "llvm.nvvm.d2f.rp",
  "llvm.nvvm.d2f.rp.ftz",
  "llvm.nvvm.d2f.rz",
  "llvm.nvvm.d2f.rz.ftz",
  "llvm.nvvm.d2i.hi",
  "llvm.nvvm.d2i.lo",
  "llvm.nvvm.d2i.rm",
  "llvm.nvvm.d2i.rn",
  "llvm.nvvm.d2i.rp",
  "llvm.nvvm.d2i.rz",
  "llvm.nvvm.d2ll.rm",
  "llvm.nvvm.d2ll.rn",
  "llvm.nvvm.d2ll.rp",
  "llvm.nvvm.d2ll.rz",
  "llvm.nvvm.d2ui.rm",
  "llvm.nvvm.d2ui.rn",
  "llvm.nvvm.d2ui.rp",
  "llvm.nvvm.d2ui.rz",
  "llvm.nvvm.d2ull.rm",
  "llvm.nvvm.d2ull.rn",
  "llvm.nvvm.d2ull.rp",
  "llvm.nvvm.d2ull.rz",
  "llvm.nvvm.div.approx.f",
  "llvm.nvvm.div.approx.ftz.f",
  "llvm.nvvm.div.rm.d",
  "llvm.nvvm.div.rm.f",
  "llvm.nvvm.div.rm.ftz.f",
  "llvm.nvvm.div.rn.d",
  "llvm.nvvm.div.rn.f",
  "llvm.nvvm.div.rn.ftz.f",
  "llvm.nvvm.div.rp.d",
  "llvm.nvvm.div.rp.f",
  "llvm.nvvm.div.rp.ftz.f",
  "llvm.nvvm.div.rz.d",
  "llvm.nvvm.div.rz.f",
  "llvm.nvvm.div.rz.ftz.f",
  "llvm.nvvm.ex2.approx.d",
  "llvm.nvvm.ex2.approx.f",
  "llvm.nvvm.ex2.approx.ftz.f",
  "llvm.nvvm.f2h.rn",
  "llvm.nvvm.f2h.rn.ftz",
  "llvm.nvvm.f2i.rm",
  "llvm.nvvm.f2i.rm.ftz",
  "llvm.nvvm.f2i.rn",
  "llvm.nvvm.f2i.rn.ftz",
  "llvm.nvvm.f2i.rp",
  "llvm.nvvm.f2i.rp.ftz",
  "llvm.nvvm.f2i.rz",
  "llvm.nvvm.f2i.rz.ftz",
  "llvm.nvvm.f2ll.rm",
  "llvm.nvvm.f2ll.rm.ftz",
  "llvm.nvvm.f2ll.rn",
  "llvm.nvvm.f2ll.rn.ftz",
  "llvm.nvvm.f2ll.rp",
  "llvm.nvvm.f2ll.rp.ftz",
  "llvm.nvvm.f2ll.rz",
  "llvm.nvvm.f2ll.rz.ftz",
  "llvm.nvvm.f2ui.rm",
  "llvm.nvvm.f2ui.rm.ftz",
  "llvm.nvvm.f2ui.rn",
  "llvm.nvvm.f2ui.rn.ftz",
  "llvm.nvvm.f2ui.rp",
  "llvm.nvvm.f2ui.rp.ftz",
  "llvm.nvvm.f2ui.rz",
  "llvm.nvvm.f2ui.rz.ftz",
  "llvm.nvvm.f2ull.rm",
  "llvm.nvvm.f2ull.rm.ftz",
  "llvm.nvvm.f2ull.rn",
  "llvm.nvvm.f2ull.rn.ftz",
  "llvm.nvvm.f2ull.rp",
  "llvm.nvvm.f2ull.rp.ftz",
  "llvm.nvvm.f2ull.rz",
  "llvm.nvvm.f2ull.rz.ftz",
  "llvm.nvvm.fabs.d",
  "llvm.nvvm.fabs.f",
  "llvm.nvvm.fabs.ftz.f",
  "llvm.nvvm.floor.d",
  "llvm.nvvm.floor.f",
  "llvm.nvvm.floor.ftz.f",
  "llvm.nvvm.fma.rm.d",
  "llvm.nvvm.fma.rm.f",
  "llvm.nvvm.fma.rm.ftz.f",
  "llvm.nvvm.fma.rn.d",
  "llvm.nvvm.fma.rn.f",
  "llvm.nvvm.fma.rn.ftz.f",
  "llvm.nvvm.fma.rp.d",
  "llvm.nvvm.fma.rp.f",
  "llvm.nvvm.fma.rp.ftz.f",
  "llvm.nvvm.fma.rz.d",
  "llvm.nvvm.fma.rz.f",
  "llvm.nvvm.fma.rz.ftz.f",
  "llvm.nvvm.fmax.d",
  "llvm.nvvm.fmax.f",
  "llvm.nvvm.fmax.ftz.f",
  "llvm.nvvm.fmin.d",
  "llvm.nvvm.fmin.f",
  "llvm.nvvm.fmin.ftz.f",
  "llvm.nvvm.h2f",
  "llvm.nvvm.i2d.rm",
  "llvm.nvvm.i2d.rn",
  "llvm.nvvm.i2d.rp",
  "llvm.nvvm.i2d.rz",
  "llvm.nvvm.i2f.rm",
  "llvm.nvvm.i2f.rn",
  "llvm.nvvm.i2f.rp",
  "llvm.nvvm.i2f.rz",
  "llvm.nvvm.isspacep.const",
  "llvm.nvvm.isspacep.global",
  "llvm.nvvm.isspacep.local",
  "llvm.nvvm.isspacep.shared",
  "llvm.nvvm.istypep.sampler",
  "llvm.nvvm.istypep.surface",
  "llvm.nvvm.istypep.texture",
  "llvm.nvvm.ldg.global.f",
  "llvm.nvvm.ldg.global.i",
  "llvm.nvvm.ldg.global.p",
  "llvm.nvvm.ldu.global.f",
  "llvm.nvvm.ldu.global.i",
  "llvm.nvvm.ldu.global.p",
  "llvm.nvvm.lg2.approx.d",
  "llvm.nvvm.lg2.approx.f",
  "llvm.nvvm.lg2.approx.ftz.f",
  "llvm.nvvm.ll2d.rm",
  "llvm.nvvm.ll2d.rn",
  "llvm.nvvm.ll2d.rp",
  "llvm.nvvm.ll2d.rz",
  "llvm.nvvm.ll2f.rm",
  "llvm.nvvm.ll2f.rn",
  "llvm.nvvm.ll2f.rp",
  "llvm.nvvm.ll2f.rz",
  "llvm.nvvm.lohi.i2d",
  "llvm.nvvm.max.i",
  "llvm.nvvm.max.ll",
  "llvm.nvvm.max.ui",
  "llvm.nvvm.max.ull",
  "llvm.nvvm.membar.cta",
  "llvm.nvvm.membar.gl",
  "llvm.nvvm.membar.sys",
  "llvm.nvvm.min.i",
  "llvm.nvvm.min.ll",
  "llvm.nvvm.min.ui",
  "llvm.nvvm.min.ull",
  "llvm.nvvm.move.double",
  "llvm.nvvm.move.float",
  "llvm.nvvm.move.i16",
  "llvm.nvvm.move.i32",
  "llvm.nvvm.move.i64",
  "llvm.nvvm.move.ptr",
  "llvm.nvvm.mul24.i",
  "llvm.nvvm.mul24.ui",
  "llvm.nvvm.mul.rm.d",
  "llvm.nvvm.mul.rm.f",
  "llvm.nvvm.mul.rm.ftz.f",
  "llvm.nvvm.mul.rn.d",
  "llvm.nvvm.mul.rn.f",
  "llvm.nvvm.mul.rn.ftz.f",
  "llvm.nvvm.mul.rp.d",
  "llvm.nvvm.mul.rp.f",
  "llvm.nvvm.mul.rp.ftz.f",
  "llvm.nvvm.mul.rz.d",
  "llvm.nvvm.mul.rz.f",
  "llvm.nvvm.mul.rz.ftz.f",
  "llvm.nvvm.mulhi.i",
  "llvm.nvvm.mulhi.ll",
  "llvm.nvvm.mulhi.ui",
  "llvm.nvvm.mulhi.ull",
  "llvm.nvvm.popc.i",
  "llvm.nvvm.popc.ll",
  "llvm.nvvm.prmt",
  "llvm.nvvm.ptr.constant.to.gen",
  "llvm.nvvm.ptr.gen.to.constant",
  "llvm.nvvm.ptr.gen.to.global",
  "llvm.nvvm.ptr.gen.to.local",
  "llvm.nvvm.ptr.gen.to.param",
  "llvm.nvvm.ptr.gen.to.shared",
  "llvm.nvvm.ptr.global.to.gen",
  "llvm.nvvm.ptr.local.to.gen",
  "llvm.nvvm.ptr.shared.to.gen",
  "llvm.nvvm.rcp.approx.ftz.d",
  "llvm.nvvm.rcp.rm.d",
  "llvm.nvvm.rcp.rm.f",
  "llvm.nvvm.rcp.rm.ftz.f",
  "llvm.nvvm.rcp.rn.d",
  "llvm.nvvm.rcp.rn.f",
  "llvm.nvvm.rcp.rn.ftz.f",
  "llvm.nvvm.rcp.rp.d",
  "llvm.nvvm.rcp.rp.f",
  "llvm.nvvm.rcp.rp.ftz.f",
  "llvm.nvvm.rcp.rz.d",
  "llvm.nvvm.rcp.rz.f",
  "llvm.nvvm.rcp.rz.ftz.f",
  "llvm.nvvm.read.ptx.sreg.ctaid.x",
  "llvm.nvvm.read.ptx.sreg.ctaid.y",
  "llvm.nvvm.read.ptx.sreg.ctaid.z",
  "llvm.nvvm.read.ptx.sreg.envreg0",
  "llvm.nvvm.read.ptx.sreg.envreg1",
  "llvm.nvvm.read.ptx.sreg.envreg10",
  "llvm.nvvm.read.ptx.sreg.envreg11",
  "llvm.nvvm.read.ptx.sreg.envreg12",
  "llvm.nvvm.read.ptx.sreg.envreg13",
  "llvm.nvvm.read.ptx.sreg.envreg14",
  "llvm.nvvm.read.ptx.sreg.envreg15",
  "llvm.nvvm.read.ptx.sreg.envreg16",
  "llvm.nvvm.read.ptx.sreg.envreg17",
  "llvm.nvvm.read.ptx.sreg.envreg18",
  "llvm.nvvm.read.ptx.sreg.envreg19",
  "llvm.nvvm.read.ptx.sreg.envreg2",
  "llvm.nvvm.read.ptx.sreg.envreg20",
  "llvm.nvvm.read.ptx.sreg.envreg21",
  "llvm.nvvm.read.ptx.sreg.envreg22",
  "llvm.nvvm.read.ptx.sreg.envreg23",
  "llvm.nvvm.read.ptx.sreg.envreg24",
  "llvm.nvvm.read.ptx.sreg.envreg25",
  "llvm.nvvm.read.ptx.sreg.envreg26",
  "llvm.nvvm.read.ptx.sreg.envreg27",
  "llvm.nvvm.read.ptx.sreg.envreg28",
  "llvm.nvvm.read.ptx.sreg.envreg29",
  "llvm.nvvm.read.ptx.sreg.envreg3",
  "llvm.nvvm.read.ptx.sreg.envreg30",
  "llvm.nvvm.read.ptx.sreg.envreg31",
  "llvm.nvvm.read.ptx.sreg.envreg4",
  "llvm.nvvm.read.ptx.sreg.envreg5",
  "llvm.nvvm.read.ptx.sreg.envreg6",
  "llvm.nvvm.read.ptx.sreg.envreg7",
  "llvm.nvvm.read.ptx.sreg.envreg8",
  "llvm.nvvm.read.ptx.sreg.envreg9",
  "llvm.nvvm.read.ptx.sreg.nctaid.x",
  "llvm.nvvm.read.ptx.sreg.nctaid.y",
  "llvm.nvvm.read.ptx.sreg.nctaid.z",
  "llvm.nvvm.read.ptx.sreg.ntid.x",
  "llvm.nvvm.read.ptx.sreg.ntid.y",
  "llvm.nvvm.read.ptx.sreg.ntid.z",
  "llvm.nvvm.read.ptx.sreg.tid.x",
  "llvm.nvvm.read.ptx.sreg.tid.y",
  "llvm.nvvm.read.ptx.sreg.tid.z",
  "llvm.nvvm.read.ptx.sreg.warpsize",
  "llvm.nvvm.reflect",
  "llvm.nvvm.rotate.b32",
  "llvm.nvvm.rotate.b64",
  "llvm.nvvm.rotate.right.b64",
  "llvm.nvvm.round.d",
  "llvm.nvvm.round.f",
  "llvm.nvvm.round.ftz.f",
  "llvm.nvvm.rsqrt.approx.d",
  "llvm.nvvm.rsqrt.approx.f",
  "llvm.nvvm.rsqrt.approx.ftz.f",
  "llvm.nvvm.sad.i",
  "llvm.nvvm.sad.ui",
  "llvm.nvvm.saturate.d",
  "llvm.nvvm.saturate.f",
  "llvm.nvvm.saturate.ftz.f",
  "llvm.nvvm.sin.approx.f",
  "llvm.nvvm.sin.approx.ftz.f",
  "llvm.nvvm.sqrt.approx.f",
  "llvm.nvvm.sqrt.approx.ftz.f",
  "llvm.nvvm.sqrt.f",
  "llvm.nvvm.sqrt.rm.d",
  "llvm.nvvm.sqrt.rm.f",
  "llvm.nvvm.sqrt.rm.ftz.f",
  "llvm.nvvm.sqrt.rn.d",
  "llvm.nvvm.sqrt.rn.f",
  "llvm.nvvm.sqrt.rn.ftz.f",
  "llvm.nvvm.sqrt.rp.d",
  "llvm.nvvm.sqrt.rp.f",
  "llvm.nvvm.sqrt.rp.ftz.f",
  "llvm.nvvm.sqrt.rz.d",
  "llvm.nvvm.sqrt.rz.f",
  "llvm.nvvm.sqrt.rz.ftz.f",
  "llvm.nvvm.suld.1d.array.i16.clamp",
  "llvm.nvvm.suld.1d.array.i16.trap",
  "llvm.nvvm.suld.1d.array.i16.zero",
  "llvm.nvvm.suld.1d.array.i32.clamp",
  "llvm.nvvm.suld.1d.array.i32.trap",
  "llvm.nvvm.suld.1d.array.i32.zero",
  "llvm.nvvm.suld.1d.array.i64.clamp",
  "llvm.nvvm.suld.1d.array.i64.trap",
  "llvm.nvvm.suld.1d.array.i64.zero",
  "llvm.nvvm.suld.1d.array.i8.clamp",
  "llvm.nvvm.suld.1d.array.i8.trap",
  "llvm.nvvm.suld.1d.array.i8.zero",
  "llvm.nvvm.suld.1d.array.v2i16.clamp",
  "llvm.nvvm.suld.1d.array.v2i16.trap",
  "llvm.nvvm.suld.1d.array.v2i16.zero",
  "llvm.nvvm.suld.1d.array.v2i32.clamp",
  "llvm.nvvm.suld.1d.array.v2i32.trap",
  "llvm.nvvm.suld.1d.array.v2i32.zero",
  "llvm.nvvm.suld.1d.array.v2i64.clamp",
  "llvm.nvvm.suld.1d.array.v2i64.trap",
  "llvm.nvvm.suld.1d.array.v2i64.zero",
  "llvm.nvvm.suld.1d.array.v2i8.clamp",
  "llvm.nvvm.suld.1d.array.v2i8.trap",
  "llvm.nvvm.suld.1d.array.v2i8.zero",
  "llvm.nvvm.suld.1d.array.v4i16.clamp",
  "llvm.nvvm.suld.1d.array.v4i16.trap",
  "llvm.nvvm.suld.1d.array.v4i16.zero",
  "llvm.nvvm.suld.1d.array.v4i32.clamp",
  "llvm.nvvm.suld.1d.array.v4i32.trap",
  "llvm.nvvm.suld.1d.array.v4i32.zero",
  "llvm.nvvm.suld.1d.array.v4i8.clamp",
  "llvm.nvvm.suld.1d.array.v4i8.trap",
  "llvm.nvvm.suld.1d.array.v4i8.zero",
  "llvm.nvvm.suld.1d.i16.clamp",
  "llvm.nvvm.suld.1d.i16.trap",
  "llvm.nvvm.suld.1d.i16.zero",
  "llvm.nvvm.suld.1d.i32.clamp",
  "llvm.nvvm.suld.1d.i32.trap",
  "llvm.nvvm.suld.1d.i32.zero",
  "llvm.nvvm.suld.1d.i64.clamp",
  "llvm.nvvm.suld.1d.i64.trap",
  "llvm.nvvm.suld.1d.i64.zero",
  "llvm.nvvm.suld.1d.i8.clamp",
  "llvm.nvvm.suld.1d.i8.trap",
  "llvm.nvvm.suld.1d.i8.zero",
  "llvm.nvvm.suld.1d.v2i16.clamp",
  "llvm.nvvm.suld.1d.v2i16.trap",
  "llvm.nvvm.suld.1d.v2i16.zero",
  "llvm.nvvm.suld.1d.v2i32.clamp",
  "llvm.nvvm.suld.1d.v2i32.trap",
  "llvm.nvvm.suld.1d.v2i32.zero",
  "llvm.nvvm.suld.1d.v2i64.clamp",
  "llvm.nvvm.suld.1d.v2i64.trap",
  "llvm.nvvm.suld.1d.v2i64.zero",
  "llvm.nvvm.suld.1d.v2i8.clamp",
  "llvm.nvvm.suld.1d.v2i8.trap",
  "llvm.nvvm.suld.1d.v2i8.zero",
  "llvm.nvvm.suld.1d.v4i16.clamp",
  "llvm.nvvm.suld.1d.v4i16.trap",
  "llvm.nvvm.suld.1d.v4i16.zero",
  "llvm.nvvm.suld.1d.v4i32.clamp",
  "llvm.nvvm.suld.1d.v4i32.trap",
  "llvm.nvvm.suld.1d.v4i32.zero",
  "llvm.nvvm.suld.1d.v4i8.clamp",
  "llvm.nvvm.suld.1d.v4i8.trap",
  "llvm.nvvm.suld.1d.v4i8.zero",
  "llvm.nvvm.suld.2d.array.i16.clamp",
  "llvm.nvvm.suld.2d.array.i16.trap",
  "llvm.nvvm.suld.2d.array.i16.zero",
  "llvm.nvvm.suld.2d.array.i32.clamp",
  "llvm.nvvm.suld.2d.array.i32.trap",
  "llvm.nvvm.suld.2d.array.i32.zero",
  "llvm.nvvm.suld.2d.array.i64.clamp",
  "llvm.nvvm.suld.2d.array.i64.trap",
  "llvm.nvvm.suld.2d.array.i64.zero",
  "llvm.nvvm.suld.2d.array.i8.clamp",
  "llvm.nvvm.suld.2d.array.i8.trap",
  "llvm.nvvm.suld.2d.array.i8.zero",
  "llvm.nvvm.suld.2d.array.v2i16.clamp",
  "llvm.nvvm.suld.2d.array.v2i16.trap",
  "llvm.nvvm.suld.2d.array.v2i16.zero",
  "llvm.nvvm.suld.2d.array.v2i32.clamp",
  "llvm.nvvm.suld.2d.array.v2i32.trap",
  "llvm.nvvm.suld.2d.array.v2i32.zero",
  "llvm.nvvm.suld.2d.array.v2i64.clamp",
  "llvm.nvvm.suld.2d.array.v2i64.trap",
  "llvm.nvvm.suld.2d.array.v2i64.zero",
  "llvm.nvvm.suld.2d.array.v2i8.clamp",
  "llvm.nvvm.suld.2d.array.v2i8.trap",
  "llvm.nvvm.suld.2d.array.v2i8.zero",
  "llvm.nvvm.suld.2d.array.v4i16.clamp",
  "llvm.nvvm.suld.2d.array.v4i16.trap",
  "llvm.nvvm.suld.2d.array.v4i16.zero",
  "llvm.nvvm.suld.2d.array.v4i32.clamp",
  "llvm.nvvm.suld.2d.array.v4i32.trap",
  "llvm.nvvm.suld.2d.array.v4i32.zero",
  "llvm.nvvm.suld.2d.array.v4i8.clamp",
  "llvm.nvvm.suld.2d.array.v4i8.trap",
  "llvm.nvvm.suld.2d.array.v4i8.zero",
  "llvm.nvvm.suld.2d.i16.clamp",
  "llvm.nvvm.suld.2d.i16.trap",
  "llvm.nvvm.suld.2d.i16.zero",
  "llvm.nvvm.suld.2d.i32.clamp",
  "llvm.nvvm.suld.2d.i32.trap",
  "llvm.nvvm.suld.2d.i32.zero",
  "llvm.nvvm.suld.2d.i64.clamp",
  "llvm.nvvm.suld.2d.i64.trap",
  "llvm.nvvm.suld.2d.i64.zero",
  "llvm.nvvm.suld.2d.i8.clamp",
  "llvm.nvvm.suld.2d.i8.trap",
  "llvm.nvvm.suld.2d.i8.zero",
  "llvm.nvvm.suld.2d.v2i16.clamp",
  "llvm.nvvm.suld.2d.v2i16.trap",
  "llvm.nvvm.suld.2d.v2i16.zero",
  "llvm.nvvm.suld.2d.v2i32.clamp",
  "llvm.nvvm.suld.2d.v2i32.trap",
  "llvm.nvvm.suld.2d.v2i32.zero",
  "llvm.nvvm.suld.2d.v2i64.clamp",
  "llvm.nvvm.suld.2d.v2i64.trap",
  "llvm.nvvm.suld.2d.v2i64.zero",
  "llvm.nvvm.suld.2d.v2i8.clamp",
  "llvm.nvvm.suld.2d.v2i8.trap",
  "llvm.nvvm.suld.2d.v2i8.zero",
  "llvm.nvvm.suld.2d.v4i16.clamp",
  "llvm.nvvm.suld.2d.v4i16.trap",
  "llvm.nvvm.suld.2d.v4i16.zero",
  "llvm.nvvm.suld.2d.v4i32.clamp",
  "llvm.nvvm.suld.2d.v4i32.trap",
  "llvm.nvvm.suld.2d.v4i32.zero",
  "llvm.nvvm.suld.2d.v4i8.clamp",
  "llvm.nvvm.suld.2d.v4i8.trap",
  "llvm.nvvm.suld.2d.v4i8.zero",
  "llvm.nvvm.suld.3d.i16.clamp",
  "llvm.nvvm.suld.3d.i16.trap",
  "llvm.nvvm.suld.3d.i16.zero",
  "llvm.nvvm.suld.3d.i32.clamp",
  "llvm.nvvm.suld.3d.i32.trap",
  "llvm.nvvm.suld.3d.i32.zero",
  "llvm.nvvm.suld.3d.i64.clamp",
  "llvm.nvvm.suld.3d.i64.trap",
  "llvm.nvvm.suld.3d.i64.zero",
  "llvm.nvvm.suld.3d.i8.clamp",
  "llvm.nvvm.suld.3d.i8.trap",
  "llvm.nvvm.suld.3d.i8.zero",
  "llvm.nvvm.suld.3d.v2i16.clamp",
  "llvm.nvvm.suld.3d.v2i16.trap",
  "llvm.nvvm.suld.3d.v2i16.zero",
  "llvm.nvvm.suld.3d.v2i32.clamp",
  "llvm.nvvm.suld.3d.v2i32.trap",
  "llvm.nvvm.suld.3d.v2i32.zero",
  "llvm.nvvm.suld.3d.v2i64.clamp",
  "llvm.nvvm.suld.3d.v2i64.trap",
  "llvm.nvvm.suld.3d.v2i64.zero",
  "llvm.nvvm.suld.3d.v2i8.clamp",
  "llvm.nvvm.suld.3d.v2i8.trap",
  "llvm.nvvm.suld.3d.v2i8.zero",
  "llvm.nvvm.suld.3d.v4i16.clamp",
  "llvm.nvvm.suld.3d.v4i16.trap",
  "llvm.nvvm.suld.3d.v4i16.zero",
  "llvm.nvvm.suld.3d.v4i32.clamp",
  "llvm.nvvm.suld.3d.v4i32.trap",
  "llvm.nvvm.suld.3d.v4i32.zero",
  "llvm.nvvm.suld.3d.v4i8.clamp",
  "llvm.nvvm.suld.3d.v4i8.trap",
  "llvm.nvvm.suld.3d.v4i8.zero",
  "llvm.nvvm.suq.array.size",
  "llvm.nvvm.suq.channel.data.type",
  "llvm.nvvm.suq.channel.order",
  "llvm.nvvm.suq.depth",
  "llvm.nvvm.suq.height",
  "llvm.nvvm.suq.width",
  "llvm.nvvm.sust.b.1d.array.i16.clamp",
  "llvm.nvvm.sust.b.1d.array.i16.trap",
  "llvm.nvvm.sust.b.1d.array.i16.zero",
  "llvm.nvvm.sust.b.1d.array.i32.clamp",
  "llvm.nvvm.sust.b.1d.array.i32.trap",
  "llvm.nvvm.sust.b.1d.array.i32.zero",
  "llvm.nvvm.sust.b.1d.array.i64.clamp",
  "llvm.nvvm.sust.b.1d.array.i64.trap",
  "llvm.nvvm.sust.b.1d.array.i64.zero",
  "llvm.nvvm.sust.b.1d.array.i8.clamp",
  "llvm.nvvm.sust.b.1d.array.i8.trap",
  "llvm.nvvm.sust.b.1d.array.i8.zero",
  "llvm.nvvm.sust.b.1d.array.v2i16.clamp",
  "llvm.nvvm.sust.b.1d.array.v2i16.trap",
  "llvm.nvvm.sust.b.1d.array.v2i16.zero",
  "llvm.nvvm.sust.b.1d.array.v2i32.clamp",
  "llvm.nvvm.sust.b.1d.array.v2i32.trap",
  "llvm.nvvm.sust.b.1d.array.v2i32.zero",
  "llvm.nvvm.sust.b.1d.array.v2i64.clamp",
  "llvm.nvvm.sust.b.1d.array.v2i64.trap",
  "llvm.nvvm.sust.b.1d.array.v2i64.zero",
  "llvm.nvvm.sust.b.1d.array.v2i8.clamp",
  "llvm.nvvm.sust.b.1d.array.v2i8.trap",
  "llvm.nvvm.sust.b.1d.array.v2i8.zero",
  "llvm.nvvm.sust.b.1d.array.v4i16.clamp",
  "llvm.nvvm.sust.b.1d.array.v4i16.trap",
  "llvm.nvvm.sust.b.1d.array.v4i16.zero",
  "llvm.nvvm.sust.b.1d.array.v4i32.clamp",
  "llvm.nvvm.sust.b.1d.array.v4i32.trap",
  "llvm.nvvm.sust.b.1d.array.v4i32.zero",
  "llvm.nvvm.sust.b.1d.array.v4i8.clamp",
  "llvm.nvvm.sust.b.1d.array.v4i8.trap",
  "llvm.nvvm.sust.b.1d.array.v4i8.zero",
  "llvm.nvvm.sust.b.1d.i16.clamp",
  "llvm.nvvm.sust.b.1d.i16.trap",
  "llvm.nvvm.sust.b.1d.i16.zero",
  "llvm.nvvm.sust.b.1d.i32.clamp",
  "llvm.nvvm.sust.b.1d.i32.trap",
  "llvm.nvvm.sust.b.1d.i32.zero",
  "llvm.nvvm.sust.b.1d.i64.clamp",
  "llvm.nvvm.sust.b.1d.i64.trap",
  "llvm.nvvm.sust.b.1d.i64.zero",
  "llvm.nvvm.sust.b.1d.i8.clamp",
  "llvm.nvvm.sust.b.1d.i8.trap",
  "llvm.nvvm.sust.b.1d.i8.zero",
  "llvm.nvvm.sust.b.1d.v2i16.clamp",
  "llvm.nvvm.sust.b.1d.v2i16.trap",
  "llvm.nvvm.sust.b.1d.v2i16.zero",
  "llvm.nvvm.sust.b.1d.v2i32.clamp",
  "llvm.nvvm.sust.b.1d.v2i32.trap",
  "llvm.nvvm.sust.b.1d.v2i32.zero",
  "llvm.nvvm.sust.b.1d.v2i64.clamp",
  "llvm.nvvm.sust.b.1d.v2i64.trap",
  "llvm.nvvm.sust.b.1d.v2i64.zero",
  "llvm.nvvm.sust.b.1d.v2i8.clamp",
  "llvm.nvvm.sust.b.1d.v2i8.trap",
  "llvm.nvvm.sust.b.1d.v2i8.zero",
  "llvm.nvvm.sust.b.1d.v4i16.clamp",
  "llvm.nvvm.sust.b.1d.v4i16.trap",
  "llvm.nvvm.sust.b.1d.v4i16.zero",
  "llvm.nvvm.sust.b.1d.v4i32.clamp",
  "llvm.nvvm.sust.b.1d.v4i32.trap",
  "llvm.nvvm.sust.b.1d.v4i32.zero",
  "llvm.nvvm.sust.b.1d.v4i8.clamp",
  "llvm.nvvm.sust.b.1d.v4i8.trap",
  "llvm.nvvm.sust.b.1d.v4i8.zero",
  "llvm.nvvm.sust.b.2d.array.i16.clamp",
  "llvm.nvvm.sust.b.2d.array.i16.trap",
  "llvm.nvvm.sust.b.2d.array.i16.zero",
  "llvm.nvvm.sust.b.2d.array.i32.clamp",
  "llvm.nvvm.sust.b.2d.array.i32.trap",
  "llvm.nvvm.sust.b.2d.array.i32.zero",
  "llvm.nvvm.sust.b.2d.array.i64.clamp",
  "llvm.nvvm.sust.b.2d.array.i64.trap",
  "llvm.nvvm.sust.b.2d.array.i64.zero",
  "llvm.nvvm.sust.b.2d.array.i8.clamp",
  "llvm.nvvm.sust.b.2d.array.i8.trap",
  "llvm.nvvm.sust.b.2d.array.i8.zero",
  "llvm.nvvm.sust.b.2d.array.v2i16.clamp",
  "llvm.nvvm.sust.b.2d.array.v2i16.trap",
  "llvm.nvvm.sust.b.2d.array.v2i16.zero",
  "llvm.nvvm.sust.b.2d.array.v2i32.clamp",
  "llvm.nvvm.sust.b.2d.array.v2i32.trap",
  "llvm.nvvm.sust.b.2d.array.v2i32.zero",
  "llvm.nvvm.sust.b.2d.array.v2i64.clamp",
  "llvm.nvvm.sust.b.2d.array.v2i64.trap",
  "llvm.nvvm.sust.b.2d.array.v2i64.zero",
  "llvm.nvvm.sust.b.2d.array.v2i8.clamp",
  "llvm.nvvm.sust.b.2d.array.v2i8.trap",
  "llvm.nvvm.sust.b.2d.array.v2i8.zero",
  "llvm.nvvm.sust.b.2d.array.v4i16.clamp",
  "llvm.nvvm.sust.b.2d.array.v4i16.trap",
  "llvm.nvvm.sust.b.2d.array.v4i16.zero",
  "llvm.nvvm.sust.b.2d.array.v4i32.clamp",
  "llvm.nvvm.sust.b.2d.array.v4i32.trap",
  "llvm.nvvm.sust.b.2d.array.v4i32.zero",
  "llvm.nvvm.sust.b.2d.array.v4i8.clamp",
  "llvm.nvvm.sust.b.2d.array.v4i8.trap",
  "llvm.nvvm.sust.b.2d.array.v4i8.zero",
  "llvm.nvvm.sust.b.2d.i16.clamp",
  "llvm.nvvm.sust.b.2d.i16.trap",
  "llvm.nvvm.sust.b.2d.i16.zero",
  "llvm.nvvm.sust.b.2d.i32.clamp",
  "llvm.nvvm.sust.b.2d.i32.trap",
  "llvm.nvvm.sust.b.2d.i32.zero",
  "llvm.nvvm.sust.b.2d.i64.clamp",
  "llvm.nvvm.sust.b.2d.i64.trap",
  "llvm.nvvm.sust.b.2d.i64.zero",
  "llvm.nvvm.sust.b.2d.i8.clamp",
  "llvm.nvvm.sust.b.2d.i8.trap",
  "llvm.nvvm.sust.b.2d.i8.zero",
  "llvm.nvvm.sust.b.2d.v2i16.clamp",
  "llvm.nvvm.sust.b.2d.v2i16.trap",
  "llvm.nvvm.sust.b.2d.v2i16.zero",
  "llvm.nvvm.sust.b.2d.v2i32.clamp",
  "llvm.nvvm.sust.b.2d.v2i32.trap",
  "llvm.nvvm.sust.b.2d.v2i32.zero",
  "llvm.nvvm.sust.b.2d.v2i64.clamp",
  "llvm.nvvm.sust.b.2d.v2i64.trap",
  "llvm.nvvm.sust.b.2d.v2i64.zero",
  "llvm.nvvm.sust.b.2d.v2i8.clamp",
  "llvm.nvvm.sust.b.2d.v2i8.trap",
  "llvm.nvvm.sust.b.2d.v2i8.zero",
  "llvm.nvvm.sust.b.2d.v4i16.clamp",
  "llvm.nvvm.sust.b.2d.v4i16.trap",
  "llvm.nvvm.sust.b.2d.v4i16.zero",
  "llvm.nvvm.sust.b.2d.v4i32.clamp",
  "llvm.nvvm.sust.b.2d.v4i32.trap",
  "llvm.nvvm.sust.b.2d.v4i32.zero",
  "llvm.nvvm.sust.b.2d.v4i8.clamp",
  "llvm.nvvm.sust.b.2d.v4i8.trap",
  "llvm.nvvm.sust.b.2d.v4i8.zero",
  "llvm.nvvm.sust.b.3d.i16.clamp",
  "llvm.nvvm.sust.b.3d.i16.trap",
  "llvm.nvvm.sust.b.3d.i16.zero",
  "llvm.nvvm.sust.b.3d.i32.clamp",
  "llvm.nvvm.sust.b.3d.i32.trap",
  "llvm.nvvm.sust.b.3d.i32.zero",
  "llvm.nvvm.sust.b.3d.i64.clamp",
  "llvm.nvvm.sust.b.3d.i64.trap",
  "llvm.nvvm.sust.b.3d.i64.zero",
  "llvm.nvvm.sust.b.3d.i8.clamp",
  "llvm.nvvm.sust.b.3d.i8.trap",
  "llvm.nvvm.sust.b.3d.i8.zero",
  "llvm.nvvm.sust.b.3d.v2i16.clamp",
  "llvm.nvvm.sust.b.3d.v2i16.trap",
  "llvm.nvvm.sust.b.3d.v2i16.zero",
  "llvm.nvvm.sust.b.3d.v2i32.clamp",
  "llvm.nvvm.sust.b.3d.v2i32.trap",
  "llvm.nvvm.sust.b.3d.v2i32.zero",
  "llvm.nvvm.sust.b.3d.v2i64.clamp",
  "llvm.nvvm.sust.b.3d.v2i64.trap",
  "llvm.nvvm.sust.b.3d.v2i64.zero",
  "llvm.nvvm.sust.b.3d.v2i8.clamp",
  "llvm.nvvm.sust.b.3d.v2i8.trap",
  "llvm.nvvm.sust.b.3d.v2i8.zero",
  "llvm.nvvm.sust.b.3d.v4i16.clamp",
  "llvm.nvvm.sust.b.3d.v4i16.trap",
  "llvm.nvvm.sust.b.3d.v4i16.zero",
  "llvm.nvvm.sust.b.3d.v4i32.clamp",
  "llvm.nvvm.sust.b.3d.v4i32.trap",
  "llvm.nvvm.sust.b.3d.v4i32.zero",
  "llvm.nvvm.sust.b.3d.v4i8.clamp",
  "llvm.nvvm.sust.b.3d.v4i8.trap",
  "llvm.nvvm.sust.b.3d.v4i8.zero",
  "llvm.nvvm.sust.p.1d.array.i16.trap",
  "llvm.nvvm.sust.p.1d.array.i32.trap",
  "llvm.nvvm.sust.p.1d.array.i8.trap",
  "llvm.nvvm.sust.p.1d.array.v2i16.trap",
  "llvm.nvvm.sust.p.1d.array.v2i32.trap",
  "llvm.nvvm.sust.p.1d.array.v2i8.trap",
  "llvm.nvvm.sust.p.1d.array.v4i16.trap",
  "llvm.nvvm.sust.p.1d.array.v4i32.trap",
  "llvm.nvvm.sust.p.1d.array.v4i8.trap",
  "llvm.nvvm.sust.p.1d.i16.trap",
  "llvm.nvvm.sust.p.1d.i32.trap",
  "llvm.nvvm.sust.p.1d.i8.trap",
  "llvm.nvvm.sust.p.1d.v2i16.trap",
  "llvm.nvvm.sust.p.1d.v2i32.trap",
  "llvm.nvvm.sust.p.1d.v2i8.trap",
  "llvm.nvvm.sust.p.1d.v4i16.trap",
  "llvm.nvvm.sust.p.1d.v4i32.trap",
  "llvm.nvvm.sust.p.1d.v4i8.trap",
  "llvm.nvvm.sust.p.2d.array.i16.trap",
  "llvm.nvvm.sust.p.2d.array.i32.trap",
  "llvm.nvvm.sust.p.2d.array.i8.trap",
  "llvm.nvvm.sust.p.2d.array.v2i16.trap",
  "llvm.nvvm.sust.p.2d.array.v2i32.trap",
  "llvm.nvvm.sust.p.2d.array.v2i8.trap",
  "llvm.nvvm.sust.p.2d.array.v4i16.trap",
  "llvm.nvvm.sust.p.2d.array.v4i32.trap",
  "llvm.nvvm.sust.p.2d.array.v4i8.trap",
  "llvm.nvvm.sust.p.2d.i16.trap",
  "llvm.nvvm.sust.p.2d.i32.trap",
  "llvm.nvvm.sust.p.2d.i8.trap",
  "llvm.nvvm.sust.p.2d.v2i16.trap",
  "llvm.nvvm.sust.p.2d.v2i32.trap",
  "llvm.nvvm.sust.p.2d.v2i8.trap",
  "llvm.nvvm.sust.p.2d.v4i16.trap",
  "llvm.nvvm.sust.p.2d.v4i32.trap",
  "llvm.nvvm.sust.p.2d.v4i8.trap",
  "llvm.nvvm.sust.p.3d.i16.trap",
  "llvm.nvvm.sust.p.3d.i32.trap",
  "llvm.nvvm.sust.p.3d.i8.trap",
  "llvm.nvvm.sust.p.3d.v2i16.trap",
  "llvm.nvvm.sust.p.3d.v2i32.trap",
  "llvm.nvvm.sust.p.3d.v2i8.trap",
  "llvm.nvvm.sust.p.3d.v4i16.trap",
  "llvm.nvvm.sust.p.3d.v4i32.trap",
  "llvm.nvvm.sust.p.3d.v4i8.trap",
  "llvm.nvvm.swap.lo.hi.b64",
  "llvm.nvvm.tex.1d.array.grad.v4f32.f32",
  "llvm.nvvm.tex.1d.array.grad.v4s32.f32",
  "llvm.nvvm.tex.1d.array.grad.v4u32.f32",
  "llvm.nvvm.tex.1d.array.level.v4f32.f32",
  "llvm.nvvm.tex.1d.array.level.v4s32.f32",
  "llvm.nvvm.tex.1d.array.level.v4u32.f32",
  "llvm.nvvm.tex.1d.array.v4f32.f32",
  "llvm.nvvm.tex.1d.array.v4f32.s32",
  "llvm.nvvm.tex.1d.array.v4s32.f32",
  "llvm.nvvm.tex.1d.array.v4s32.s32",
  "llvm.nvvm.tex.1d.array.v4u32.f32",
  "llvm.nvvm.tex.1d.array.v4u32.s32",
  "llvm.nvvm.tex.1d.grad.v4f32.f32",
  "llvm.nvvm.tex.1d.grad.v4s32.f32",
  "llvm.nvvm.tex.1d.grad.v4u32.f32",
  "llvm.nvvm.tex.1d.level.v4f32.f32",
  "llvm.nvvm.tex.1d.level.v4s32.f32",
  "llvm.nvvm.tex.1d.level.v4u32.f32",
  "llvm.nvvm.tex.1d.v4f32.f32",
  "llvm.nvvm.tex.1d.v4f32.s32",
  "llvm.nvvm.tex.1d.v4s32.f32",
  "llvm.nvvm.tex.1d.v4s32.s32",
  "llvm.nvvm.tex.1d.v4u32.f32",
  "llvm.nvvm.tex.1d.v4u32.s32",
  "llvm.nvvm.tex.2d.array.grad.v4f32.f32",
  "llvm.nvvm.tex.2d.array.grad.v4s32.f32",
  "llvm.nvvm.tex.2d.array.grad.v4u32.f32",
  "llvm.nvvm.tex.2d.array.level.v4f32.f32",
  "llvm.nvvm.tex.2d.array.level.v4s32.f32",
  "llvm.nvvm.tex.2d.array.level.v4u32.f32",
  "llvm.nvvm.tex.2d.array.v4f32.f32",
  "llvm.nvvm.tex.2d.array.v4f32.s32",
  "llvm.nvvm.tex.2d.array.v4s32.f32",
  "llvm.nvvm.tex.2d.array.v4s32.s32",
  "llvm.nvvm.tex.2d.array.v4u32.f32",
  "llvm.nvvm.tex.2d.array.v4u32.s32",
  "llvm.nvvm.tex.2d.grad.v4f32.f32",
  "llvm.nvvm.tex.2d.grad.v4s32.f32",
  "llvm.nvvm.tex.2d.grad.v4u32.f32",
  "llvm.nvvm.tex.2d.level.v4f32.f32",
  "llvm.nvvm.tex.2d.level.v4s32.f32",
  "llvm.nvvm.tex.2d.level.v4u32.f32",
  "llvm.nvvm.tex.2d.v4f32.f32",
  "llvm.nvvm.tex.2d.v4f32.s32",
  "llvm.nvvm.tex.2d.v4s32.f32",
  "llvm.nvvm.tex.2d.v4s32.s32",
  "llvm.nvvm.tex.2d.v4u32.f32",
  "llvm.nvvm.tex.2d.v4u32.s32",
  "llvm.nvvm.tex.3d.grad.v4f32.f32",
  "llvm.nvvm.tex.3d.grad.v4s32.f32",
  "llvm.nvvm.tex.3d.grad.v4u32.f32",
  "llvm.nvvm.tex.3d.level.v4f32.f32",
  "llvm.nvvm.tex.3d.level.v4s32.f32",
  "llvm.nvvm.tex.3d.level.v4u32.f32",
  "llvm.nvvm.tex.3d.v4f32.f32",
  "llvm.nvvm.tex.3d.v4f32.s32",
  "llvm.nvvm.tex.3d.v4s32.f32",
  "llvm.nvvm.tex.3d.v4s32.s32",
  "llvm.nvvm.tex.3d.v4u32.f32",
  "llvm.nvvm.tex.3d.v4u32.s32",
  "llvm.nvvm.tex.cube.array.level.v4f32.f32",
  "llvm.nvvm.tex.cube.array.level.v4s32.f32",
  "llvm.nvvm.tex.cube.array.level.v4u32.f32",
  "llvm.nvvm.tex.cube.array.v4f32.f32",
  "llvm.nvvm.tex.cube.array.v4s32.f32",
  "llvm.nvvm.tex.cube.array.v4u32.f32",
  "llvm.nvvm.tex.cube.level.v4f32.f32",
  "llvm.nvvm.tex.cube.level.v4s32.f32",
  "llvm.nvvm.tex.cube.level.v4u32.f32",
  "llvm.nvvm.tex.cube.v4f32.f32",
  "llvm.nvvm.tex.cube.v4s32.f32",
  "llvm.nvvm.tex.cube.v4u32.f32",
  "llvm.nvvm.tex.unified.1d.array.grad.v4f32.f32",
  "llvm.nvvm.tex.unified.1d.array.grad.v4s32.f32",
  "llvm.nvvm.tex.unified.1d.array.grad.v4u32.f32",
  "llvm.nvvm.tex.unified.1d.array.level.v4f32.f32",
  "llvm.nvvm.tex.unified.1d.array.level.v4s32.f32",
  "llvm.nvvm.tex.unified.1d.array.level.v4u32.f32",
  "llvm.nvvm.tex.unified.1d.array.v4f32.f32",
  "llvm.nvvm.tex.unified.1d.array.v4f32.s32",
  "llvm.nvvm.tex.unified.1d.array.v4s32.f32",
  "llvm.nvvm.tex.unified.1d.array.v4s32.s32",
  "llvm.nvvm.tex.unified.1d.array.v4u32.f32",
  "llvm.nvvm.tex.unified.1d.array.v4u32.s32",
  "llvm.nvvm.tex.unified.1d.grad.v4f32.f32",
  "llvm.nvvm.tex.unified.1d.grad.v4s32.f32",
  "llvm.nvvm.tex.unified.1d.grad.v4u32.f32",
  "llvm.nvvm.tex.unified.1d.level.v4f32.f32",
  "llvm.nvvm.tex.unified.1d.level.v4s32.f32",
  "llvm.nvvm.tex.unified.1d.level.v4u32.f32",
  "llvm.nvvm.tex.unified.1d.v4f32.f32",
  "llvm.nvvm.tex.unified.1d.v4f32.s32",
  "llvm.nvvm.tex.unified.1d.v4s32.f32",
  "llvm.nvvm.tex.unified.1d.v4s32.s32",
  "llvm.nvvm.tex.unified.1d.v4u32.f32",
  "llvm.nvvm.tex.unified.1d.v4u32.s32",
  "llvm.nvvm.tex.unified.2d.array.grad.v4f32.f32",
  "llvm.nvvm.tex.unified.2d.array.grad.v4s32.f32",
  "llvm.nvvm.tex.unified.2d.array.grad.v4u32.f32",
  "llvm.nvvm.tex.unified.2d.array.level.v4f32.f32",
  "llvm.nvvm.tex.unified.2d.array.level.v4s32.f32",
  "llvm.nvvm.tex.unified.2d.array.level.v4u32.f32",
  "llvm.nvvm.tex.unified.2d.array.v4f32.f32",
  "llvm.nvvm.tex.unified.2d.array.v4f32.s32",
  "llvm.nvvm.tex.unified.2d.array.v4s32.f32",
  "llvm.nvvm.tex.unified.2d.array.v4s32.s32",
  "llvm.nvvm.tex.unified.2d.array.v4u32.f32",
  "llvm.nvvm.tex.unified.2d.array.v4u32.s32",
  "llvm.nvvm.tex.unified.2d.grad.v4f32.f32",
  "llvm.nvvm.tex.unified.2d.grad.v4s32.f32",
  "llvm.nvvm.tex.unified.2d.grad.v4u32.f32",
  "llvm.nvvm.tex.unified.2d.level.v4f32.f32",
  "llvm.nvvm.tex.unified.2d.level.v4s32.f32",
  "llvm.nvvm.tex.unified.2d.level.v4u32.f32",
  "llvm.nvvm.tex.unified.2d.v4f32.f32",
  "llvm.nvvm.tex.unified.2d.v4f32.s32",
  "llvm.nvvm.tex.unified.2d.v4s32.f32",
  "llvm.nvvm.tex.unified.2d.v4s32.s32",
  "llvm.nvvm.tex.unified.2d.v4u32.f32",
  "llvm.nvvm.tex.unified.2d.v4u32.s32",
  "llvm.nvvm.tex.unified.3d.grad.v4f32.f32",
  "llvm.nvvm.tex.unified.3d.grad.v4s32.f32",
  "llvm.nvvm.tex.unified.3d.grad.v4u32.f32",
  "llvm.nvvm.tex.unified.3d.level.v4f32.f32",
  "llvm.nvvm.tex.unified.3d.level.v4s32.f32",
  "llvm.nvvm.tex.unified.3d.level.v4u32.f32",
  "llvm.nvvm.tex.unified.3d.v4f32.f32",
  "llvm.nvvm.tex.unified.3d.v4f32.s32",
  "llvm.nvvm.tex.unified.3d.v4s32.f32",
  "llvm.nvvm.tex.unified.3d.v4s32.s32",
  "llvm.nvvm.tex.unified.3d.v4u32.f32",
  "llvm.nvvm.tex.unified.3d.v4u32.s32",
  "llvm.nvvm.tex.unified.cube.array.level.v4f32.f32",
  "llvm.nvvm.tex.unified.cube.array.level.v4s32.f32",
  "llvm.nvvm.tex.unified.cube.array.level.v4u32.f32",
  "llvm.nvvm.tex.unified.cube.array.v4f32.f32",
  "llvm.nvvm.tex.unified.cube.array.v4s32.f32",
  "llvm.nvvm.tex.unified.cube.array.v4u32.f32",
  "llvm.nvvm.tex.unified.cube.level.v4f32.f32",
  "llvm.nvvm.tex.unified.cube.level.v4s32.f32",
  "llvm.nvvm.tex.unified.cube.level.v4u32.f32",
  "llvm.nvvm.tex.unified.cube.v4f32.f32",
  "llvm.nvvm.tex.unified.cube.v4s32.f32",
  "llvm.nvvm.tex.unified.cube.v4u32.f32",
  "llvm.nvvm.texsurf.handle",
  "llvm.nvvm.texsurf.handle.internal",
  "llvm.nvvm.tld4.a.2d.v4f32.f32",
  "llvm.nvvm.tld4.a.2d.v4s32.f32",
  "llvm.nvvm.tld4.a.2d.v4u32.f32",
  "llvm.nvvm.tld4.b.2d.v4f32.f32",
  "llvm.nvvm.tld4.b.2d.v4s32.f32",
  "llvm.nvvm.tld4.b.2d.v4u32.f32",
  "llvm.nvvm.tld4.g.2d.v4f32.f32",
  "llvm.nvvm.tld4.g.2d.v4s32.f32",
  "llvm.nvvm.tld4.g.2d.v4u32.f32",
  "llvm.nvvm.tld4.r.2d.v4f32.f32",
  "llvm.nvvm.tld4.r.2d.v4s32.f32",
  "llvm.nvvm.tld4.r.2d.v4u32.f32",
  "llvm.nvvm.tld4.unified.a.2d.v4f32.f32",
  "llvm.nvvm.tld4.unified.a.2d.v4s32.f32",
  "llvm.nvvm.tld4.unified.a.2d.v4u32.f32",
  "llvm.nvvm.tld4.unified.b.2d.v4f32.f32",
  "llvm.nvvm.tld4.unified.b.2d.v4s32.f32",
  "llvm.nvvm.tld4.unified.b.2d.v4u32.f32",
  "llvm.nvvm.tld4.unified.g.2d.v4f32.f32",
  "llvm.nvvm.tld4.unified.g.2d.v4s32.f32",
  "llvm.nvvm.tld4.unified.g.2d.v4u32.f32",
  "llvm.nvvm.tld4.unified.r.2d.v4f32.f32",
  "llvm.nvvm.tld4.unified.r.2d.v4s32.f32",
  "llvm.nvvm.tld4.unified.r.2d.v4u32.f32",
  "llvm.nvvm.trunc.d",
  "llvm.nvvm.trunc.f",
  "llvm.nvvm.trunc.ftz.f",
  "llvm.nvvm.txq.array.size",
  "llvm.nvvm.txq.channel.data.type",
  "llvm.nvvm.txq.channel.order",
  "llvm.nvvm.txq.depth",
  "llvm.nvvm.txq.height",
  "llvm.nvvm.txq.num.mipmap.levels",
  "llvm.nvvm.txq.num.samples",
  "llvm.nvvm.txq.width",
  "llvm.nvvm.ui2d.rm",
  "llvm.nvvm.ui2d.rn",
  "llvm.nvvm.ui2d.rp",
  "llvm.nvvm.ui2d.rz",
  "llvm.nvvm.ui2f.rm",
  "llvm.nvvm.ui2f.rn",
  "llvm.nvvm.ui2f.rp",
  "llvm.nvvm.ui2f.rz",
  "llvm.nvvm.ull2d.rm",
  "llvm.nvvm.ull2d.rn",
  "llvm.nvvm.ull2d.rp",
  "llvm.nvvm.ull2d.rz",
  "llvm.nvvm.ull2f.rm",
  "llvm.nvvm.ull2f.rn",
  "llvm.nvvm.ull2f.rp",
  "llvm.nvvm.ull2f.rz",
  "llvm.objectsize",
  "llvm.pcmarker",
  "llvm.pow",
  "llvm.powi",
  "llvm.ppc.altivec.dss",
  "llvm.ppc.altivec.dssall",
  "llvm.ppc.altivec.dst",
  "llvm.ppc.altivec.dstst",
  "llvm.ppc.altivec.dststt",
  "llvm.ppc.altivec.dstt",
  "llvm.ppc.altivec.lvebx",
  "llvm.ppc.altivec.lvehx",
  "llvm.ppc.altivec.lvewx",
  "llvm.ppc.altivec.lvsl",
  "llvm.ppc.altivec.lvsr",
  "llvm.ppc.altivec.lvx",
  "llvm.ppc.altivec.lvxl",
  "llvm.ppc.altivec.mfvscr",
  "llvm.ppc.altivec.mtvscr",
  "llvm.ppc.altivec.stvebx",
  "llvm.ppc.altivec.stvehx",
  "llvm.ppc.altivec.stvewx",
  "llvm.ppc.altivec.stvx",
  "llvm.ppc.altivec.stvxl",
  "llvm.ppc.altivec.vaddcuw",
  "llvm.ppc.altivec.vaddsbs",
  "llvm.ppc.altivec.vaddshs",
  "llvm.ppc.altivec.vaddsws",
  "llvm.ppc.altivec.vaddubs",
  "llvm.ppc.altivec.vadduhs",
  "llvm.ppc.altivec.vadduws",
  "llvm.ppc.altivec.vavgsb",
  "llvm.ppc.altivec.vavgsh",
  "llvm.ppc.altivec.vavgsw",
  "llvm.ppc.altivec.vavgub",
  "llvm.ppc.altivec.vavguh",
  "llvm.ppc.altivec.vavguw",
  "llvm.ppc.altivec.vcfsx",
  "llvm.ppc.altivec.vcfux",
  "llvm.ppc.altivec.vcmpbfp",
  "llvm.ppc.altivec.vcmpbfp.p",
  "llvm.ppc.altivec.vcmpeqfp",
  "llvm.ppc.altivec.vcmpeqfp.p",
  "llvm.ppc.altivec.vcmpequb",
  "llvm.ppc.altivec.vcmpequb.p",
  "llvm.ppc.altivec.vcmpequh",
  "llvm.ppc.altivec.vcmpequh.p",
  "llvm.ppc.altivec.vcmpequw",
  "llvm.ppc.altivec.vcmpequw.p",
  "llvm.ppc.altivec.vcmpgefp",
  "llvm.ppc.altivec.vcmpgefp.p",
  "llvm.ppc.altivec.vcmpgtfp",
  "llvm.ppc.altivec.vcmpgtfp.p",
  "llvm.ppc.altivec.vcmpgtsb",
  "llvm.ppc.altivec.vcmpgtsb.p",
  "llvm.ppc.altivec.vcmpgtsh",
  "llvm.ppc.altivec.vcmpgtsh.p",
  "llvm.ppc.altivec.vcmpgtsw",
  "llvm.ppc.altivec.vcmpgtsw.p",
  "llvm.ppc.altivec.vcmpgtub",
  "llvm.ppc.altivec.vcmpgtub.p",
  "llvm.ppc.altivec.vcmpgtuh",
  "llvm.ppc.altivec.vcmpgtuh.p",
  "llvm.ppc.altivec.vcmpgtuw",
  "llvm.ppc.altivec.vcmpgtuw.p",
  "llvm.ppc.altivec.vctsxs",
  "llvm.ppc.altivec.vctuxs",
  "llvm.ppc.altivec.vexptefp",
  "llvm.ppc.altivec.vlogefp",
  "llvm.ppc.altivec.vmaddfp",
  "llvm.ppc.altivec.vmaxfp",
  "llvm.ppc.altivec.vmaxsb",
  "llvm.ppc.altivec.vmaxsh",
  "llvm.ppc.altivec.vmaxsw",
  "llvm.ppc.altivec.vmaxub",
  "llvm.ppc.altivec.vmaxuh",
  "llvm.ppc.altivec.vmaxuw",
  "llvm.ppc.altivec.vmhaddshs",
  "llvm.ppc.altivec.vmhraddshs",
  "llvm.ppc.altivec.vminfp",
  "llvm.ppc.altivec.vminsb",
  "llvm.ppc.altivec.vminsh",
  "llvm.ppc.altivec.vminsw",
  "llvm.ppc.altivec.vminub",
  "llvm.ppc.altivec.vminuh",
  "llvm.ppc.altivec.vminuw",
  "llvm.ppc.altivec.vmladduhm",
  "llvm.ppc.altivec.vmsummbm",
  "llvm.ppc.altivec.vmsumshm",
  "llvm.ppc.altivec.vmsumshs",
  "llvm.ppc.altivec.vmsumubm",
  "llvm.ppc.altivec.vmsumuhm",
  "llvm.ppc.altivec.vmsumuhs",
  "llvm.ppc.altivec.vmulesb",
  "llvm.ppc.altivec.vmulesh",
  "llvm.ppc.altivec.vmuleub",
  "llvm.ppc.altivec.vmuleuh",
  "llvm.ppc.altivec.vmulosb",
  "llvm.ppc.altivec.vmulosh",
  "llvm.ppc.altivec.vmuloub",
  "llvm.ppc.altivec.vmulouh",
  "llvm.ppc.altivec.vnmsubfp",
  "llvm.ppc.altivec.vperm",
  "llvm.ppc.altivec.vpkpx",
  "llvm.ppc.altivec.vpkshss",
  "llvm.ppc.altivec.vpkshus",
  "llvm.ppc.altivec.vpkswss",
  "llvm.ppc.altivec.vpkswus",
  "llvm.ppc.altivec.vpkuhus",
  "llvm.ppc.altivec.vpkuwus",
  "llvm.ppc.altivec.vrefp",
  "llvm.ppc.altivec.vrfim",
  "llvm.ppc.altivec.vrfin",
  "llvm.ppc.altivec.vrfip",
  "llvm.ppc.altivec.vrfiz",
  "llvm.ppc.altivec.vrlb",
  "llvm.ppc.altivec.vrlh",
  "llvm.ppc.altivec.vrlw",
  "llvm.ppc.altivec.vrsqrtefp",
  "llvm.ppc.altivec.vsel",
  "llvm.ppc.altivec.vsl",
  "llvm.ppc.altivec.vslb",
  "llvm.ppc.altivec.vslh",
  "llvm.ppc.altivec.vslo",
  "llvm.ppc.altivec.vslw",
  "llvm.ppc.altivec.vsr",
  "llvm.ppc.altivec.vsrab",
  "llvm.ppc.altivec.vsrah",
  "llvm.ppc.altivec.vsraw",
  "llvm.ppc.altivec.vsrb",
  "llvm.ppc.altivec.vsrh",
  "llvm.ppc.altivec.vsro",
  "llvm.ppc.altivec.vsrw",
  "llvm.ppc.altivec.vsubcuw",
  "llvm.ppc.altivec.vsubsbs",
  "llvm.ppc.altivec.vsubshs",
  "llvm.ppc.altivec.vsubsws",
  "llvm.ppc.altivec.vsububs",
  "llvm.ppc.altivec.vsubuhs",
  "llvm.ppc.altivec.vsubuws",
  "llvm.ppc.altivec.vsum2sws",
  "llvm.ppc.altivec.vsum4sbs",
  "llvm.ppc.altivec.vsum4shs",
  "llvm.ppc.altivec.vsum4ubs",
  "llvm.ppc.altivec.vsumsws",
  "llvm.ppc.altivec.vupkhpx",
  "llvm.ppc.altivec.vupkhsb",
  "llvm.ppc.altivec.vupkhsh",
  "llvm.ppc.altivec.vupklpx",
  "llvm.ppc.altivec.vupklsb",
  "llvm.ppc.altivec.vupklsh",
  "llvm.ppc.dcba",
  "llvm.ppc.dcbf",
  "llvm.ppc.dcbi",
  "llvm.ppc.dcbst",
  "llvm.ppc.dcbt",
  "llvm.ppc.dcbtst",
  "llvm.ppc.dcbz",
  "llvm.ppc.dcbzl",
  "llvm.ppc.is.decremented.ctr.nonzero",
  "llvm.ppc.mtctr",
  "llvm.ppc.sync",
  "llvm.prefetch",
  "llvm.ptr.annotation",
  "llvm.ptx.bar.sync",
  "llvm.ptx.read.clock",
  "llvm.ptx.read.clock64",
  "llvm.ptx.read.ctaid.w",
  "llvm.ptx.read.ctaid.x",
  "llvm.ptx.read.ctaid.y",
  "llvm.ptx.read.ctaid.z",
  "llvm.ptx.read.gridid",
  "llvm.ptx.read.laneid",
  "llvm.ptx.read.lanemask.eq",
  "llvm.ptx.read.lanemask.ge",
  "llvm.ptx.read.lanemask.gt",
  "llvm.ptx.read.lanemask.le",
  "llvm.ptx.read.lanemask.lt",
  "llvm.ptx.read.nctaid.w",
  "llvm.ptx.read.nctaid.x",
  "llvm.ptx.read.nctaid.y",
  "llvm.ptx.read.nctaid.z",
  "llvm.ptx.read.nsmid",
  "llvm.ptx.read.ntid.w",
  "llvm.ptx.read.ntid.x",
  "llvm.ptx.read.ntid.y",
  "llvm.ptx.read.ntid.z",
  "llvm.ptx.read.nwarpid",
  "llvm.ptx.read.pm0",
  "llvm.ptx.read.pm1",
  "llvm.ptx.read.pm2",
  "llvm.ptx.read.pm3",
  "llvm.ptx.read.smid",
  "llvm.ptx.read.tid.w",
  "llvm.ptx.read.tid.x",
  "llvm.ptx.read.tid.y",
  "llvm.ptx.read.tid.z",
  "llvm.ptx.read.warpid",
  "llvm.r600.read.global.size.x",
  "llvm.r600.read.global.size.y",
  "llvm.r600.read.global.size.z",
  "llvm.r600.read.local.size.x",
  "llvm.r600.read.local.size.y",
  "llvm.r600.read.local.size.z",
  "llvm.r600.read.ngroups.x",
  "llvm.r600.read.ngroups.y",
  "llvm.r600.read.ngroups.z",
  "llvm.r600.read.tgid.x",
  "llvm.r600.read.tgid.y",
  "llvm.r600.read.tgid.z",
  "llvm.r600.read.tidig.x",
  "llvm.r600.read.tidig.y",
  "llvm.r600.read.tidig.z",
  "llvm.read_register",
  "llvm.readcyclecounter",
  "llvm.returnaddress",
  "llvm.rint",
  "llvm.round",
  "llvm.sadd.with.overflow",
  "llvm.setjmp",
  "llvm.siglongjmp",
  "llvm.sigsetjmp",
  "llvm.sin",
  "llvm.smul.with.overflow",
  "llvm.sqrt",
  "llvm.ssub.with.overflow",
  "llvm.stackprotector",
  "llvm.stackprotectorcheck",
  "llvm.stackrestore",
  "llvm.stacksave",
  "llvm.trap",
  "llvm.trunc",
  "llvm.uadd.with.overflow",
  "llvm.umul.with.overflow",
  "llvm.usub.with.overflow",
  "llvm.va_copy",
  "llvm.va_end",
  "llvm.var.annotation",
  "llvm.va_start",
  "llvm.write_register",
  "llvm.x86.3dnow.pavgusb",
  "llvm.x86.3dnow.pf2id",
  "llvm.x86.3dnow.pfacc",
  "llvm.x86.3dnow.pfadd",
  "llvm.x86.3dnow.pfcmpeq",
  "llvm.x86.3dnow.pfcmpge",
  "llvm.x86.3dnow.pfcmpgt",
  "llvm.x86.3dnow.pfmax",
  "llvm.x86.3dnow.pfmin",
  "llvm.x86.3dnow.pfmul",
  "llvm.x86.3dnow.pfrcp",
  "llvm.x86.3dnow.pfrcpit1",
  "llvm.x86.3dnow.pfrcpit2",
  "llvm.x86.3dnow.pfrsqit1",
  "llvm.x86.3dnow.pfrsqrt",
  "llvm.x86.3dnow.pfsub",
  "llvm.x86.3dnow.pfsubr",
  "llvm.x86.3dnow.pi2fd",
  "llvm.x86.3dnow.pmulhrw",
  "llvm.x86.3dnowa.pf2iw",
  "llvm.x86.3dnowa.pfnacc",
  "llvm.x86.3dnowa.pfpnacc",
  "llvm.x86.3dnowa.pi2fw",
  "llvm.x86.3dnowa.pswapd",
  "llvm.x86.aesni.aesdec",
  "llvm.x86.aesni.aesdeclast",
  "llvm.x86.aesni.aesenc",
  "llvm.x86.aesni.aesenclast",
  "llvm.x86.aesni.aesimc",
  "llvm.x86.aesni.aeskeygenassist",
  "llvm.x86.avx2.gather.d.d",
  "llvm.x86.avx2.gather.d.d.256",
  "llvm.x86.avx2.gather.d.pd",
  "llvm.x86.avx2.gather.d.pd.256",
  "llvm.x86.avx2.gather.d.ps",
  "llvm.x86.avx2.gather.d.ps.256",
  "llvm.x86.avx2.gather.d.q",
  "llvm.x86.avx2.gather.d.q.256",
  "llvm.x86.avx2.gather.q.d",
  "llvm.x86.avx2.gather.q.d.256",
  "llvm.x86.avx2.gather.q.pd",
  "llvm.x86.avx2.gather.q.pd.256",
  "llvm.x86.avx2.gather.q.ps",
  "llvm.x86.avx2.gather.q.ps.256",
  "llvm.x86.avx2.gather.q.q",
  "llvm.x86.avx2.gather.q.q.256",
  "llvm.x86.avx2.maskload.d",
  "llvm.x86.avx2.maskload.d.256",
  "llvm.x86.avx2.maskload.q",
  "llvm.x86.avx2.maskload.q.256",
  "llvm.x86.avx2.maskstore.d",
  "llvm.x86.avx2.maskstore.d.256",
  "llvm.x86.avx2.maskstore.q",
  "llvm.x86.avx2.maskstore.q.256",
  "llvm.x86.avx2.movntdqa",
  "llvm.x86.avx2.mpsadbw",
  "llvm.x86.avx2.pabs.b",
  "llvm.x86.avx2.pabs.d",
  "llvm.x86.avx2.pabs.w",
  "llvm.x86.avx2.packssdw",
  "llvm.x86.avx2.packsswb",
  "llvm.x86.avx2.packusdw",
  "llvm.x86.avx2.packuswb",
  "llvm.x86.avx2.padds.b",
  "llvm.x86.avx2.padds.w",
  "llvm.x86.avx2.paddus.b",
  "llvm.x86.avx2.paddus.w",
  "llvm.x86.avx2.pavg.b",
  "llvm.x86.avx2.pavg.w",
  "llvm.x86.avx2.pblendd.128",
  "llvm.x86.avx2.pblendd.256",
  "llvm.x86.avx2.pblendvb",
  "llvm.x86.avx2.pblendw",
  "llvm.x86.avx2.pbroadcastb.128",
  "llvm.x86.avx2.pbroadcastb.256",
  "llvm.x86.avx2.pbroadcastd.128",
  "llvm.x86.avx2.pbroadcastd.256",
  "llvm.x86.avx2.pbroadcastq.128",
  "llvm.x86.avx2.pbroadcastq.256",
  "llvm.x86.avx2.pbroadcastw.128",
  "llvm.x86.avx2.pbroadcastw.256",
  "llvm.x86.avx2.permd",
  "llvm.x86.avx2.permps",
  "llvm.x86.avx2.phadd.d",
  "llvm.x86.avx2.phadd.sw",
  "llvm.x86.avx2.phadd.w",
  "llvm.x86.avx2.phsub.d",
  "llvm.x86.avx2.phsub.sw",
  "llvm.x86.avx2.phsub.w",
  "llvm.x86.avx2.pmadd.ub.sw",
  "llvm.x86.avx2.pmadd.wd",
  "llvm.x86.avx2.pmaxs.b",
  "llvm.x86.avx2.pmaxs.d",
  "llvm.x86.avx2.pmaxs.w",
  "llvm.x86.avx2.pmaxu.b",
  "llvm.x86.avx2.pmaxu.d",
  "llvm.x86.avx2.pmaxu.w",
  "llvm.x86.avx2.pmins.b",
  "llvm.x86.avx2.pmins.d",
  "llvm.x86.avx2.pmins.w",
  "llvm.x86.avx2.pminu.b",
  "llvm.x86.avx2.pminu.d",
  "llvm.x86.avx2.pminu.w",
  "llvm.x86.avx2.pmovmskb",
  "llvm.x86.avx2.pmovsxbd",
  "llvm.x86.avx2.pmovsxbq",
  "llvm.x86.avx2.pmovsxbw",
  "llvm.x86.avx2.pmovsxdq",
  "llvm.x86.avx2.pmovsxwd",
  "llvm.x86.avx2.pmovsxwq",
  "llvm.x86.avx2.pmovzxbd",
  "llvm.x86.avx2.pmovzxbq",
  "llvm.x86.avx2.pmovzxbw",
  "llvm.x86.avx2.pmovzxdq",
  "llvm.x86.avx2.pmovzxwd",
  "llvm.x86.avx2.pmovzxwq",
  "llvm.x86.avx2.pmul.dq",
  "llvm.x86.avx2.pmul.hr.sw",
  "llvm.x86.avx2.pmulh.w",
  "llvm.x86.avx2.pmulhu.w",
  "llvm.x86.avx2.pmulu.dq",
  "llvm.x86.avx2.psad.bw",
  "llvm.x86.avx2.pshuf.b",
  "llvm.x86.avx2.psign.b",
  "llvm.x86.avx2.psign.d",
  "llvm.x86.avx2.psign.w",
  "llvm.x86.avx2.psll.d",
  "llvm.x86.avx2.psll.dq",
  "llvm.x86.avx2.psll.dq.bs",
  "llvm.x86.avx2.psll.q",
  "llvm.x86.avx2.psll.w",
  "llvm.x86.avx2.pslli.d",
  "llvm.x86.avx2.pslli.q",
  "llvm.x86.avx2.pslli.w",
  "llvm.x86.avx2.psllv.d",
  "llvm.x86.avx2.psllv.d.256",
  "llvm.x86.avx2.psllv.q",
  "llvm.x86.avx2.psllv.q.256",
  "llvm.x86.avx2.psra.d",
  "llvm.x86.avx2.psra.w",
  "llvm.x86.avx2.psrai.d",
  "llvm.x86.avx2.psrai.w",
  "llvm.x86.avx2.psrav.d",
  "llvm.x86.avx2.psrav.d.256",
  "llvm.x86.avx2.psrl.d",
  "llvm.x86.avx2.psrl.dq",
  "llvm.x86.avx2.psrl.dq.bs",
  "llvm.x86.avx2.psrl.q",
  "llvm.x86.avx2.psrl.w",
  "llvm.x86.avx2.psrli.d",
  "llvm.x86.avx2.psrli.q",
  "llvm.x86.avx2.psrli.w",
  "llvm.x86.avx2.psrlv.d",
  "llvm.x86.avx2.psrlv.d.256",
  "llvm.x86.avx2.psrlv.q",
  "llvm.x86.avx2.psrlv.q.256",
  "llvm.x86.avx2.psubs.b",
  "llvm.x86.avx2.psubs.w",
  "llvm.x86.avx2.psubus.b",
  "llvm.x86.avx2.psubus.w",
  "llvm.x86.avx2.vbroadcast.sd.pd.256",
  "llvm.x86.avx2.vbroadcast.ss.ps",
  "llvm.x86.avx2.vbroadcast.ss.ps.256",
  "llvm.x86.avx2.vbroadcasti128",
  "llvm.x86.avx2.vextracti128",
  "llvm.x86.avx2.vinserti128",
  "llvm.x86.avx2.vperm2i128",
  "llvm.x86.avx512.cvtsd2usi",
  "llvm.x86.avx512.cvtsd2usi64",
  "llvm.x86.avx512.cvtss2usi",
  "llvm.x86.avx512.cvtss2usi64",
  "llvm.x86.avx512.cvttsd2usi",
  "llvm.x86.avx512.cvttsd2usi64",
  "llvm.x86.avx512.cvttss2usi",
  "llvm.x86.avx512.cvttss2usi64",
  "llvm.x86.avx512.cvtusi2sd",
  "llvm.x86.avx512.cvtusi2ss",
  "llvm.x86.avx512.cvtusi642sd",
  "llvm.x86.avx512.cvtusi642ss",
  "llvm.x86.avx512.gather.dpd.512",
  "llvm.x86.avx512.gather.dpi.512",
  "llvm.x86.avx512.gather.dpq.512",
  "llvm.x86.avx512.gather.dps.512",
  "llvm.x86.avx512.gather.qpd.512",
  "llvm.x86.avx512.gather.qpi.512",
  "llvm.x86.avx512.gather.qpq.512",
  "llvm.x86.avx512.gather.qps.512",
  "llvm.x86.avx512.gatherpf.dpd.512",
  "llvm.x86.avx512.gatherpf.dps.512",
  "llvm.x86.avx512.gatherpf.qpd.512",
  "llvm.x86.avx512.gatherpf.qps.512",
  "llvm.x86.avx512.kand.w",
  "llvm.x86.avx512.kandn.w",
  "llvm.x86.avx512.knot.w",
  "llvm.x86.avx512.kor.w",
  "llvm.x86.avx512.kortestc.w",
  "llvm.x86.avx512.kortestz.w",
  "llvm.x86.avx512.kunpck.bw",
  "llvm.x86.avx512.kxnor.w",
  "llvm.x86.avx512.kxor.w",
  "llvm.x86.avx512.mask.blend.d.512",
  "llvm.x86.avx512.mask.blend.pd.512",
  "llvm.x86.avx512.mask.blend.ps.512",
  "llvm.x86.avx512.mask.blend.q.512",
  "llvm.x86.avx512.mask.cmp.pd.512",
  "llvm.x86.avx512.mask.cmp.ps.512",
  "llvm.x86.avx512.mask.conflict.d.512",
  "llvm.x86.avx512.mask.conflict.q.512",
  "llvm.x86.avx512.mask.cvtdq2pd.512",
  "llvm.x86.avx512.mask.cvtdq2ps.512",
  "llvm.x86.avx512.mask.cvtpd2dq.512",
  "llvm.x86.avx512.mask.cvtpd2ps.512",
  "llvm.x86.avx512.mask.cvtpd2udq.512",
  "llvm.x86.avx512.mask.cvtps2dq.512",
  "llvm.x86.avx512.mask.cvtps2udq.512",
  "llvm.x86.avx512.mask.cvttpd2dq.512",
  "llvm.x86.avx512.mask.cvttpd2udq.512",
  "llvm.x86.avx512.mask.cvttps2dq.512",
  "llvm.x86.avx512.mask.cvttps2udq.512",
  "llvm.x86.avx512.mask.cvtudq2pd.512",
  "llvm.x86.avx512.mask.cvtudq2ps.512",
  "llvm.x86.avx512.mask.loadu.d.512",
  "llvm.x86.avx512.mask.loadu.pd.512",
  "llvm.x86.avx512.mask.loadu.ps.512",
  "llvm.x86.avx512.mask.loadu.q.512",
  "llvm.x86.avx512.mask.lzcnt.d.512",
  "llvm.x86.avx512.mask.lzcnt.q.512",
  "llvm.x86.avx512.mask.max.pd.512",
  "llvm.x86.avx512.mask.max.ps.512",
  "llvm.x86.avx512.mask.min.pd.512",
  "llvm.x86.avx512.mask.min.ps.512",
  "llvm.x86.avx512.mask.pabs.d.512",
  "llvm.x86.avx512.mask.pabs.q.512",
  "llvm.x86.avx512.mask.pand.d.512",
  "llvm.x86.avx512.mask.pand.q.512",
  "llvm.x86.avx512.mask.pbroadcast.d.gpr.512",
  "llvm.x86.avx512.mask.pbroadcast.q.gpr.512",
  "llvm.x86.avx512.mask.pbroadcast.q.mem.512",
  "llvm.x86.avx512.mask.pcmpeq.d.512",
  "llvm.x86.avx512.mask.pcmpeq.q.512",
  "llvm.x86.avx512.mask.pmaxs.d.512",
  "llvm.x86.avx512.mask.pmaxs.q.512",
  "llvm.x86.avx512.mask.pmaxu.d.512",
  "llvm.x86.avx512.mask.pmaxu.q.512",
  "llvm.x86.avx512.mask.pmins.d.512",
  "llvm.x86.avx512.mask.pmins.q.512",
  "llvm.x86.avx512.mask.pminu.d.512",
  "llvm.x86.avx512.mask.pminu.q.512",
  "llvm.x86.avx512.mask.pmul.dq.512",
  "llvm.x86.avx512.mask.pmulu.dq.512",
  "llvm.x86.avx512.mask.ptestm.d.512",
  "llvm.x86.avx512.mask.ptestm.q.512",
  "llvm.x86.avx512.mask.rndscale.pd.512",
  "llvm.x86.avx512.mask.rndscale.ps.512",
  "llvm.x86.avx512.mask.storeu.d.512",
  "llvm.x86.avx512.mask.storeu.pd.512",
  "llvm.x86.avx512.mask.storeu.ps.512",
  "llvm.x86.avx512.mask.storeu.q.512",
  "llvm.x86.avx512.mask.vcvtph2ps.512",
  "llvm.x86.avx512.mask.vcvtps2ph.512",
  "llvm.x86.avx512.mask.vpermt.d.512",
  "llvm.x86.avx512.mask.vpermt.pd.512",
  "llvm.x86.avx512.mask.vpermt.ps.512",
  "llvm.x86.avx512.mask.vpermt.q.512",
  "llvm.x86.avx512.movntdqa",
  "llvm.x86.avx512.pbroadcastd.512",
  "llvm.x86.avx512.pbroadcastd.i32.512",
  "llvm.x86.avx512.pbroadcastq.512",
  "llvm.x86.avx512.pbroadcastq.i64.512",
  "llvm.x86.avx512.pmovzxbd",
  "llvm.x86.avx512.pmovzxbq",
  "llvm.x86.avx512.pmovzxdq",
  "llvm.x86.avx512.pmovzxwd",
  "llvm.x86.avx512.pmovzxwq",
  "llvm.x86.avx512.psll.dq",
  "llvm.x86.avx512.psll.dq.bs",
  "llvm.x86.avx512.psrl.dq",
  "llvm.x86.avx512.psrl.dq.bs",
  "llvm.x86.avx512.rcp14.pd.512",
  "llvm.x86.avx512.rcp14.ps.512",
  "llvm.x86.avx512.rcp14.sd",
  "llvm.x86.avx512.rcp14.ss",
  "llvm.x86.avx512.rcp28.pd",
  "llvm.x86.avx512.rcp28.ps",
  "llvm.x86.avx512.rcp28.sd",
  "llvm.x86.avx512.rcp28.ss",
  "llvm.x86.avx512.rndscale.sd",
  "llvm.x86.avx512.rndscale.ss",
  "llvm.x86.avx512.rsqrt14.pd.512",
  "llvm.x86.avx512.rsqrt14.ps.512",
  "llvm.x86.avx512.rsqrt14.sd",
  "llvm.x86.avx512.rsqrt14.ss",
  "llvm.x86.avx512.rsqrt28.pd",
  "llvm.x86.avx512.rsqrt28.ps",
  "llvm.x86.avx512.rsqrt28.sd",
  "llvm.x86.avx512.rsqrt28.ss",
  "llvm.x86.avx512.scatter.dpd.512",
  "llvm.x86.avx512.scatter.dpi.512",
  "llvm.x86.avx512.scatter.dpq.512",
  "llvm.x86.avx512.scatter.dps.512",
  "llvm.x86.avx512.scatter.qpd.512",
  "llvm.x86.avx512.scatter.qpi.512",
  "llvm.x86.avx512.scatter.qpq.512",
  "llvm.x86.avx512.scatter.qps.512",
  "llvm.x86.avx512.scatterpf.dpd.512",
  "llvm.x86.avx512.scatterpf.dps.512",
  "llvm.x86.avx512.scatterpf.qpd.512",
  "llvm.x86.avx512.scatterpf.qps.512",
  "llvm.x86.avx512.sqrt.pd.512",
  "llvm.x86.avx512.sqrt.ps.512",
  "llvm.x86.avx512.sqrt.sd",
  "llvm.x86.avx512.sqrt.ss",
  "llvm.x86.avx512.vbroadcast.sd.512",
  "llvm.x86.avx512.vbroadcast.sd.pd.512",
  "llvm.x86.avx512.vbroadcast.ss.512",
  "llvm.x86.avx512.vbroadcast.ss.ps.512",
  "llvm.x86.avx.addsub.pd.256",
  "llvm.x86.avx.addsub.ps.256",
  "llvm.x86.avx.blend.pd.256",
  "llvm.x86.avx.blend.ps.256",
  "llvm.x86.avx.blendv.pd.256",
  "llvm.x86.avx.blendv.ps.256",
  "llvm.x86.avx.cmp.pd.256",
  "llvm.x86.avx.cmp.ps.256",
  "llvm.x86.avx.cvt.pd2.ps.256",
  "llvm.x86.avx.cvt.pd2dq.256",
  "llvm.x86.avx.cvt.ps2.pd.256",
  "llvm.x86.avx.cvt.ps2dq.256",
  "llvm.x86.avx.cvtdq2.pd.256",
  "llvm.x86.avx.cvtdq2.ps.256",
  "llvm.x86.avx.cvtt.pd2dq.256",
  "llvm.x86.avx.cvtt.ps2dq.256",
  "llvm.x86.avx.dp.ps.256",
  "llvm.x86.avx.hadd.pd.256",
  "llvm.x86.avx.hadd.ps.256",
  "llvm.x86.avx.hsub.pd.256",
  "llvm.x86.avx.hsub.ps.256",
  "llvm.x86.avx.ldu.dq.256",
  "llvm.x86.avx.maskload.pd",
  "llvm.x86.avx.maskload.pd.256",
  "llvm.x86.avx.maskload.ps",
  "llvm.x86.avx.maskload.ps.256",
  "llvm.x86.avx.maskstore.pd",
  "llvm.x86.avx.maskstore.pd.256",
  "llvm.x86.avx.maskstore.ps",
  "llvm.x86.avx.maskstore.ps.256",
  "llvm.x86.avx.max.pd.256",
  "llvm.x86.avx.max.ps.256",
  "llvm.x86.avx.min.pd.256",
  "llvm.x86.avx.min.ps.256",
  "llvm.x86.avx.movmsk.pd.256",
  "llvm.x86.avx.movmsk.ps.256",
  "llvm.x86.avx.ptestc.256",
  "llvm.x86.avx.ptestnzc.256",
  "llvm.x86.avx.ptestz.256",
  "llvm.x86.avx.rcp.ps.256",
  "llvm.x86.avx.round.pd.256",
  "llvm.x86.avx.round.ps.256",
  "llvm.x86.avx.rsqrt.ps.256",
  "llvm.x86.avx.sqrt.pd.256",
  "llvm.x86.avx.sqrt.ps.256",
  "llvm.x86.avx.storeu.dq.256",
  "llvm.x86.avx.storeu.pd.256",
  "llvm.x86.avx.storeu.ps.256",
  "llvm.x86.avx.vbroadcastf128.pd.256",
  "llvm.x86.avx.vbroadcastf128.ps.256",
  "llvm.x86.avx.vextractf128.pd.256",
  "llvm.x86.avx.vextractf128.ps.256",
  "llvm.x86.avx.vextractf128.si.256",
  "llvm.x86.avx.vinsertf128.pd.256",
  "llvm.x86.avx.vinsertf128.ps.256",
  "llvm.x86.avx.vinsertf128.si.256",
  "llvm.x86.avx.vperm2f128.pd.256",
  "llvm.x86.avx.vperm2f128.ps.256",
  "llvm.x86.avx.vperm2f128.si.256",
  "llvm.x86.avx.vpermilvar.pd",
  "llvm.x86.avx.vpermilvar.pd.256",
  "llvm.x86.avx.vpermilvar.ps",
  "llvm.x86.avx.vpermilvar.ps.256",
  "llvm.x86.avx.vtestc.pd",
  "llvm.x86.avx.vtestc.pd.256",
  "llvm.x86.avx.vtestc.ps",
  "llvm.x86.avx.vtestc.ps.256",
  "llvm.x86.avx.vtestnzc.pd",
  "llvm.x86.avx.vtestnzc.pd.256",
  "llvm.x86.avx.vtestnzc.ps",
  "llvm.x86.avx.vtestnzc.ps.256",
  "llvm.x86.avx.vtestz.pd",
  "llvm.x86.avx.vtestz.pd.256",
  "llvm.x86.avx.vtestz.ps",
  "llvm.x86.avx.vtestz.ps.256",
  "llvm.x86.avx.vzeroall",
  "llvm.x86.avx.vzeroupper",
  "llvm.x86.bmi.bextr.32",
  "llvm.x86.bmi.bextr.64",
  "llvm.x86.bmi.bzhi.32",
  "llvm.x86.bmi.bzhi.64",
  "llvm.x86.bmi.pdep.32",
  "llvm.x86.bmi.pdep.64",
  "llvm.x86.bmi.pext.32",
  "llvm.x86.bmi.pext.64",
  "llvm.x86.fma.vfmadd.pd",
  "llvm.x86.fma.vfmadd.pd.256",
  "llvm.x86.fma.vfmadd.pd.512",
  "llvm.x86.fma.vfmadd.ps",
  "llvm.x86.fma.vfmadd.ps.256",
  "llvm.x86.fma.vfmadd.ps.512",
  "llvm.x86.fma.vfmadd.sd",
  "llvm.x86.fma.vfmadd.ss",
  "llvm.x86.fma.vfmaddsub.pd",
  "llvm.x86.fma.vfmaddsub.pd.256",
  "llvm.x86.fma.vfmaddsub.pd.512",
  "llvm.x86.fma.vfmaddsub.ps",
  "llvm.x86.fma.vfmaddsub.ps.256",
  "llvm.x86.fma.vfmaddsub.ps.512",
  "llvm.x86.fma.vfmsub.pd",
  "llvm.x86.fma.vfmsub.pd.256",
  "llvm.x86.fma.vfmsub.pd.512",
  "llvm.x86.fma.vfmsub.ps",
  "llvm.x86.fma.vfmsub.ps.256",
  "llvm.x86.fma.vfmsub.ps.512",
  "llvm.x86.fma.vfmsub.sd",
  "llvm.x86.fma.vfmsub.ss",
  "llvm.x86.fma.vfmsubadd.pd",
  "llvm.x86.fma.vfmsubadd.pd.256",
  "llvm.x86.fma.vfmsubadd.pd.512",
  "llvm.x86.fma.vfmsubadd.ps",
  "llvm.x86.fma.vfmsubadd.ps.256",
  "llvm.x86.fma.vfmsubadd.ps.512",
  "llvm.x86.fma.vfnmadd.pd",
  "llvm.x86.fma.vfnmadd.pd.256",
  "llvm.x86.fma.vfnmadd.pd.512",
  "llvm.x86.fma.vfnmadd.ps",
  "llvm.x86.fma.vfnmadd.ps.256",
  "llvm.x86.fma.vfnmadd.ps.512",
  "llvm.x86.fma.vfnmadd.sd",
  "llvm.x86.fma.vfnmadd.ss",
  "llvm.x86.fma.vfnmsub.pd",
  "llvm.x86.fma.vfnmsub.pd.256",
  "llvm.x86.fma.vfnmsub.pd.512",
  "llvm.x86.fma.vfnmsub.ps",
  "llvm.x86.fma.vfnmsub.ps.256",
  "llvm.x86.fma.vfnmsub.ps.512",
  "llvm.x86.fma.vfnmsub.sd",
  "llvm.x86.fma.vfnmsub.ss",
  "llvm.x86.int",
  "llvm.x86.mmx.emms",
  "llvm.x86.mmx.femms",
  "llvm.x86.mmx.maskmovq",
  "llvm.x86.mmx.movnt.dq",
  "llvm.x86.mmx.packssdw",
  "llvm.x86.mmx.packsswb",
  "llvm.x86.mmx.packuswb",
  "llvm.x86.mmx.padd.b",
  "llvm.x86.mmx.padd.d",
  "llvm.x86.mmx.padd.q",
  "llvm.x86.mmx.padd.w",
  "llvm.x86.mmx.padds.b",
  "llvm.x86.mmx.padds.w",
  "llvm.x86.mmx.paddus.b",
  "llvm.x86.mmx.paddus.w",
  "llvm.x86.mmx.palignr.b",
  "llvm.x86.mmx.pand",
  "llvm.x86.mmx.pandn",
  "llvm.x86.mmx.pavg.b",
  "llvm.x86.mmx.pavg.w",
  "llvm.x86.mmx.pcmpeq.b",
  "llvm.x86.mmx.pcmpeq.d",
  "llvm.x86.mmx.pcmpeq.w",
  "llvm.x86.mmx.pcmpgt.b",
  "llvm.x86.mmx.pcmpgt.d",
  "llvm.x86.mmx.pcmpgt.w",
  "llvm.x86.mmx.pextr.w",
  "llvm.x86.mmx.pinsr.w",
  "llvm.x86.mmx.pmadd.wd",
  "llvm.x86.mmx.pmaxs.w",
  "llvm.x86.mmx.pmaxu.b",
  "llvm.x86.mmx.pmins.w",
  "llvm.x86.mmx.pminu.b",
  "llvm.x86.mmx.pmovmskb",
  "llvm.x86.mmx.pmulh.w",
  "llvm.x86.mmx.pmulhu.w",
  "llvm.x86.mmx.pmull.w",
  "llvm.x86.mmx.pmulu.dq",
  "llvm.x86.mmx.por",
  "llvm.x86.mmx.psad.bw",
  "llvm.x86.mmx.psll.d",
  "llvm.x86.mmx.psll.q",
  "llvm.x86.mmx.psll.w",
  "llvm.x86.mmx.pslli.d",
  "llvm.x86.mmx.pslli.q",
  "llvm.x86.mmx.pslli.w",
  "llvm.x86.mmx.psra.d",
  "llvm.x86.mmx.psra.w",
  "llvm.x86.mmx.psrai.d",
  "llvm.x86.mmx.psrai.w",
  "llvm.x86.mmx.psrl.d",
  "llvm.x86.mmx.psrl.q",
  "llvm.x86.mmx.psrl.w",
  "llvm.x86.mmx.psrli.d",
  "llvm.x86.mmx.psrli.q",
  "llvm.x86.mmx.psrli.w",
  "llvm.x86.mmx.psub.b",
  "llvm.x86.mmx.psub.d",
  "llvm.x86.mmx.psub.q",
  "llvm.x86.mmx.psub.w",
  "llvm.x86.mmx.psubs.b",
  "llvm.x86.mmx.psubs.w",
  "llvm.x86.mmx.psubus.b",
  "llvm.x86.mmx.psubus.w",
  "llvm.x86.mmx.punpckhbw",
  "llvm.x86.mmx.punpckhdq",
  "llvm.x86.mmx.punpckhwd",
  "llvm.x86.mmx.punpcklbw",
  "llvm.x86.mmx.punpckldq",
  "llvm.x86.mmx.punpcklwd",
  "llvm.x86.mmx.pxor",
  "llvm.x86.pclmulqdq",
  "llvm.x86.rdfsbase.32",
  "llvm.x86.rdfsbase.64",
  "llvm.x86.rdgsbase.32",
  "llvm.x86.rdgsbase.64",
  "llvm.x86.rdpmc",
  "llvm.x86.rdrand.16",
  "llvm.x86.rdrand.32",
  "llvm.x86.rdrand.64",
  "llvm.x86.rdseed.16",
  "llvm.x86.rdseed.32",
  "llvm.x86.rdseed.64",
  "llvm.x86.rdtsc",
  "llvm.x86.rdtscp",
  "llvm.x86.sha1msg1",
  "llvm.x86.sha1msg2",
  "llvm.x86.sha1nexte",
  "llvm.x86.sha1rnds4",
  "llvm.x86.sha256msg1",
  "llvm.x86.sha256msg2",
  "llvm.x86.sha256rnds2",
  "llvm.x86.sse2.add.sd",
  "llvm.x86.sse2.clflush",
  "llvm.x86.sse2.cmp.pd",
  "llvm.x86.sse2.cmp.sd",
  "llvm.x86.sse2.comieq.sd",
  "llvm.x86.sse2.comige.sd",
  "llvm.x86.sse2.comigt.sd",
  "llvm.x86.sse2.comile.sd",
  "llvm.x86.sse2.comilt.sd",
  "llvm.x86.sse2.comineq.sd",
  "llvm.x86.sse2.cvtdq2pd",
  "llvm.x86.sse2.cvtdq2ps",
  "llvm.x86.sse2.cvtpd2dq",
  "llvm.x86.sse2.cvtpd2ps",
  "llvm.x86.sse2.cvtps2dq",
  "llvm.x86.sse2.cvtps2pd",
  "llvm.x86.sse2.cvtsd2si",
  "llvm.x86.sse2.cvtsd2si64",
  "llvm.x86.sse2.cvtsd2ss",
  "llvm.x86.sse2.cvtsi2sd",
  "llvm.x86.sse2.cvtsi642sd",
  "llvm.x86.sse2.cvtss2sd",
  "llvm.x86.sse2.cvttpd2dq",
  "llvm.x86.sse2.cvttps2dq",
  "llvm.x86.sse2.cvttsd2si",
  "llvm.x86.sse2.cvttsd2si64",
  "llvm.x86.sse2.div.sd",
  "llvm.x86.sse2.lfence",
  "llvm.x86.sse2.maskmov.dqu",
  "llvm.x86.sse2.max.pd",
  "llvm.x86.sse2.max.sd",
  "llvm.x86.sse2.mfence",
  "llvm.x86.sse2.min.pd",
  "llvm.x86.sse2.min.sd",
  "llvm.x86.sse2.movmsk.pd",
  "llvm.x86.sse2.mul.sd",
  "llvm.x86.sse2.packssdw.128",
  "llvm.x86.sse2.packsswb.128",
  "llvm.x86.sse2.packuswb.128",
  "llvm.x86.sse2.padds.b",
  "llvm.x86.sse2.padds.w",
  "llvm.x86.sse2.paddus.b",
  "llvm.x86.sse2.paddus.w",
  "llvm.x86.sse2.pause",
  "llvm.x86.sse2.pavg.b",
  "llvm.x86.sse2.pavg.w",
  "llvm.x86.sse2.pmadd.wd",
  "llvm.x86.sse2.pmaxs.w",
  "llvm.x86.sse2.pmaxu.b",
  "llvm.x86.sse2.pmins.w",
  "llvm.x86.sse2.pminu.b",
  "llvm.x86.sse2.pmovmskb.128",
  "llvm.x86.sse2.pmulh.w",
  "llvm.x86.sse2.pmulhu.w",
  "llvm.x86.sse2.pmulu.dq",
  "llvm.x86.sse2.psad.bw",
  "llvm.x86.sse2.pshuf.d",
  "llvm.x86.sse2.pshufh.w",
  "llvm.x86.sse2.pshufl.w",
  "llvm.x86.sse2.psll.d",
  "llvm.x86.sse2.psll.dq",
  "llvm.x86.sse2.psll.dq.bs",
  "llvm.x86.sse2.psll.q",
  "llvm.x86.sse2.psll.w",
  "llvm.x86.sse2.pslli.d",
  "llvm.x86.sse2.pslli.q",
  "llvm.x86.sse2.pslli.w",
  "llvm.x86.sse2.psra.d",
  "llvm.x86.sse2.psra.w",
  "llvm.x86.sse2.psrai.d",
  "llvm.x86.sse2.psrai.w",
  "llvm.x86.sse2.psrl.d",
  "llvm.x86.sse2.psrl.dq",
  "llvm.x86.sse2.psrl.dq.bs",
  "llvm.x86.sse2.psrl.q",
  "llvm.x86.sse2.psrl.w",
  "llvm.x86.sse2.psrli.d",
  "llvm.x86.sse2.psrli.q",
  "llvm.x86.sse2.psrli.w",
  "llvm.x86.sse2.psubs.b",
  "llvm.x86.sse2.psubs.w",
  "llvm.x86.sse2.psubus.b",
  "llvm.x86.sse2.psubus.w",
  "llvm.x86.sse2.sqrt.pd",
  "llvm.x86.sse2.sqrt.sd",
  "llvm.x86.sse2.storel.dq",
  "llvm.x86.sse2.storeu.dq",
  "llvm.x86.sse2.storeu.pd",
  "llvm.x86.sse2.sub.sd",
  "llvm.x86.sse2.ucomieq.sd",
  "llvm.x86.sse2.ucomige.sd",
  "llvm.x86.sse2.ucomigt.sd",
  "llvm.x86.sse2.ucomile.sd",
  "llvm.x86.sse2.ucomilt.sd",
  "llvm.x86.sse2.ucomineq.sd",
  "llvm.x86.sse3.addsub.pd",
  "llvm.x86.sse3.addsub.ps",
  "llvm.x86.sse3.hadd.pd",
  "llvm.x86.sse3.hadd.ps",
  "llvm.x86.sse3.hsub.pd",
  "llvm.x86.sse3.hsub.ps",
  "llvm.x86.sse3.ldu.dq",
  "llvm.x86.sse3.monitor",
  "llvm.x86.sse3.mwait",
  "llvm.x86.sse41.blendpd",
  "llvm.x86.sse41.blendps",
  "llvm.x86.sse41.blendvpd",
  "llvm.x86.sse41.blendvps",
  "llvm.x86.sse41.dppd",
  "llvm.x86.sse41.dpps",
  "llvm.x86.sse41.extractps",
  "llvm.x86.sse41.insertps",
  "llvm.x86.sse41.movntdqa",
  "llvm.x86.sse41.mpsadbw",
  "llvm.x86.sse41.packusdw",
  "llvm.x86.sse41.pblendvb",
  "llvm.x86.sse41.pblendw",
  "llvm.x86.sse41.pextrb",
  "llvm.x86.sse41.pextrd",
  "llvm.x86.sse41.pextrq",
  "llvm.x86.sse41.phminposuw",
  "llvm.x86.sse41.pmaxsb",
  "llvm.x86.sse41.pmaxsd",
  "llvm.x86.sse41.pmaxud",
  "llvm.x86.sse41.pmaxuw",
  "llvm.x86.sse41.pminsb",
  "llvm.x86.sse41.pminsd",
  "llvm.x86.sse41.pminud",
  "llvm.x86.sse41.pminuw",
  "llvm.x86.sse41.pmovsxbd",
  "llvm.x86.sse41.pmovsxbq",
  "llvm.x86.sse41.pmovsxbw",
  "llvm.x86.sse41.pmovsxdq",
  "llvm.x86.sse41.pmovsxwd",
  "llvm.x86.sse41.pmovsxwq",
  "llvm.x86.sse41.pmovzxbd",
  "llvm.x86.sse41.pmovzxbq",
  "llvm.x86.sse41.pmovzxbw",
  "llvm.x86.sse41.pmovzxdq",
  "llvm.x86.sse41.pmovzxwd",
  "llvm.x86.sse41.pmovzxwq",
  "llvm.x86.sse41.pmuldq",
  "llvm.x86.sse41.ptestc",
  "llvm.x86.sse41.ptestnzc",
  "llvm.x86.sse41.ptestz",
  "llvm.x86.sse41.round.pd",
  "llvm.x86.sse41.round.ps",
  "llvm.x86.sse41.round.sd",
  "llvm.x86.sse41.round.ss",
  "llvm.x86.sse42.crc32.32.16",
  "llvm.x86.sse42.crc32.32.32",
  "llvm.x86.sse42.crc32.32.8",
  "llvm.x86.sse42.crc32.64.64",
  "llvm.x86.sse42.pcmpestri128",
  "llvm.x86.sse42.pcmpestria128",
  "llvm.x86.sse42.pcmpestric128",
  "llvm.x86.sse42.pcmpestrio128",
  "llvm.x86.sse42.pcmpestris128",
  "llvm.x86.sse42.pcmpestriz128",
  "llvm.x86.sse42.pcmpestrm128",
  "llvm.x86.sse42.pcmpistri128",
  "llvm.x86.sse42.pcmpistria128",
  "llvm.x86.sse42.pcmpistric128",
  "llvm.x86.sse42.pcmpistrio128",
  "llvm.x86.sse42.pcmpistris128",
  "llvm.x86.sse42.pcmpistriz128",
  "llvm.x86.sse42.pcmpistrm128",
  "llvm.x86.sse4a.extrq",
  "llvm.x86.sse4a.extrqi",
  "llvm.x86.sse4a.insertq",
  "llvm.x86.sse4a.insertqi",
  "llvm.x86.sse4a.movnt.sd",
  "llvm.x86.sse4a.movnt.ss",
  "llvm.x86.sse.add.ss",
  "llvm.x86.sse.cmp.ps",
  "llvm.x86.sse.cmp.ss",
  "llvm.x86.sse.comieq.ss",
  "llvm.x86.sse.comige.ss",
  "llvm.x86.sse.comigt.ss",
  "llvm.x86.sse.comile.ss",
  "llvm.x86.sse.comilt.ss",
  "llvm.x86.sse.comineq.ss",
  "llvm.x86.sse.cvtpd2pi",
  "llvm.x86.sse.cvtpi2pd",
  "llvm.x86.sse.cvtpi2ps",
  "llvm.x86.sse.cvtps2pi",
  "llvm.x86.sse.cvtsi2ss",
  "llvm.x86.sse.cvtsi642ss",
  "llvm.x86.sse.cvtss2si",
  "llvm.x86.sse.cvtss2si64",
  "llvm.x86.sse.cvttpd2pi",
  "llvm.x86.sse.cvttps2pi",
  "llvm.x86.sse.cvttss2si",
  "llvm.x86.sse.cvttss2si64",
  "llvm.x86.sse.div.ss",
  "llvm.x86.sse.ldmxcsr",
  "llvm.x86.sse.max.ps",
  "llvm.x86.sse.max.ss",
  "llvm.x86.sse.min.ps",
  "llvm.x86.sse.min.ss",
  "llvm.x86.sse.movmsk.ps",
  "llvm.x86.sse.mul.ss",
  "llvm.x86.sse.pshuf.w",
  "llvm.x86.sse.rcp.ps",
  "llvm.x86.sse.rcp.ss",
  "llvm.x86.sse.rsqrt.ps",
  "llvm.x86.sse.rsqrt.ss",
  "llvm.x86.sse.sfence",
  "llvm.x86.sse.sqrt.ps",
  "llvm.x86.sse.sqrt.ss",
  "llvm.x86.sse.stmxcsr",
  "llvm.x86.sse.storeu.ps",
  "llvm.x86.sse.sub.ss",
  "llvm.x86.sse.ucomieq.ss",
  "llvm.x86.sse.ucomige.ss",
  "llvm.x86.sse.ucomigt.ss",
  "llvm.x86.sse.ucomile.ss",
  "llvm.x86.sse.ucomilt.ss",
  "llvm.x86.sse.ucomineq.ss",
  "llvm.x86.ssse3.pabs.b",
  "llvm.x86.ssse3.pabs.b.128",
  "llvm.x86.ssse3.pabs.d",
  "llvm.x86.ssse3.pabs.d.128",
  "llvm.x86.ssse3.pabs.w",
  "llvm.x86.ssse3.pabs.w.128",
  "llvm.x86.ssse3.phadd.d",
  "llvm.x86.ssse3.phadd.d.128",
  "llvm.x86.ssse3.phadd.sw",
  "llvm.x86.ssse3.phadd.sw.128",
  "llvm.x86.ssse3.phadd.w",
  "llvm.x86.ssse3.phadd.w.128",
  "llvm.x86.ssse3.phsub.d",
  "llvm.x86.ssse3.phsub.d.128",
  "llvm.x86.ssse3.phsub.sw",
  "llvm.x86.ssse3.phsub.sw.128",
  "llvm.x86.ssse3.phsub.w",
  "llvm.x86.ssse3.phsub.w.128",
  "llvm.x86.ssse3.pmadd.ub.sw",
  "llvm.x86.ssse3.pmadd.ub.sw.128",
  "llvm.x86.ssse3.pmul.hr.sw",
  "llvm.x86.ssse3.pmul.hr.sw.128",
  "llvm.x86.ssse3.pshuf.b",
  "llvm.x86.ssse3.pshuf.b.128",
  "llvm.x86.ssse3.psign.b",
  "llvm.x86.ssse3.psign.b.128",
  "llvm.x86.ssse3.psign.d",
  "llvm.x86.ssse3.psign.d.128",
  "llvm.x86.ssse3.psign.w",
  "llvm.x86.ssse3.psign.w.128",
  "llvm.x86.tbm.bextri.u32",
  "llvm.x86.tbm.bextri.u64",
  "llvm.x86.vcvtph2ps.128",
  "llvm.x86.vcvtph2ps.256",
  "llvm.x86.vcvtps2ph.128",
  "llvm.x86.vcvtps2ph.256",
  "llvm.x86.wrfsbase.32",
  "llvm.x86.wrfsbase.64",
  "llvm.x86.wrgsbase.32",
  "llvm.x86.wrgsbase.64",
  "llvm.x86.xabort",
  "llvm.x86.xbegin",
  "llvm.x86.xend",
  "llvm.x86.xop.vfrcz.pd",
  "llvm.x86.xop.vfrcz.pd.256",
  "llvm.x86.xop.vfrcz.ps",
  "llvm.x86.xop.vfrcz.ps.256",
  "llvm.x86.xop.vfrcz.sd",
  "llvm.x86.xop.vfrcz.ss",
  "llvm.x86.xop.vpcmov",
  "llvm.x86.xop.vpcmov.256",
  "llvm.x86.xop.vpcomb",
  "llvm.x86.xop.vpcomd",
  "llvm.x86.xop.vpcomq",
  "llvm.x86.xop.vpcomub",
  "llvm.x86.xop.vpcomud",
  "llvm.x86.xop.vpcomuq",
  "llvm.x86.xop.vpcomuw",
  "llvm.x86.xop.vpcomw",
  "llvm.x86.xop.vpermil2pd",
  "llvm.x86.xop.vpermil2pd.256",
  "llvm.x86.xop.vpermil2ps",
  "llvm.x86.xop.vpermil2ps.256",
  "llvm.x86.xop.vphaddbd",
  "llvm.x86.xop.vphaddbq",
  "llvm.x86.xop.vphaddbw",
  "llvm.x86.xop.vphadddq",
  "llvm.x86.xop.vphaddubd",
  "llvm.x86.xop.vphaddubq",
  "llvm.x86.xop.vphaddubw",
  "llvm.x86.xop.vphaddudq",
  "llvm.x86.xop.vphadduwd",
  "llvm.x86.xop.vphadduwq",
  "llvm.x86.xop.vphaddwd",
  "llvm.x86.xop.vphaddwq",
  "llvm.x86.xop.vphsubbw",
  "llvm.x86.xop.vphsubdq",
  "llvm.x86.xop.vphsubwd",
  "llvm.x86.xop.vpmacsdd",
  "llvm.x86.xop.vpmacsdqh",
  "llvm.x86.xop.vpmacsdql",
  "llvm.x86.xop.vpmacssdd",
  "llvm.x86.xop.vpmacssdqh",
  "llvm.x86.xop.vpmacssdql",
  "llvm.x86.xop.vpmacsswd",
  "llvm.x86.xop.vpmacssww",
  "llvm.x86.xop.vpmacswd",
  "llvm.x86.xop.vpmacsww",
  "llvm.x86.xop.vpmadcsswd",
  "llvm.x86.xop.vpmadcswd",
  "llvm.x86.xop.vpperm",
  "llvm.x86.xop.vprotb",
  "llvm.x86.xop.vprotbi",
  "llvm.x86.xop.vprotd",
  "llvm.x86.xop.vprotdi",
  "llvm.x86.xop.vprotq",
  "llvm.x86.xop.vprotqi",
  "llvm.x86.xop.vprotw",
  "llvm.x86.xop.vprotwi",
  "llvm.x86.xop.vpshab",
  "llvm.x86.xop.vpshad",
  "llvm.x86.xop.vpshaq",
  "llvm.x86.xop.vpshaw",
  "llvm.x86.xop.vpshlb",
  "llvm.x86.xop.vpshld",
  "llvm.x86.xop.vpshlq",
  "llvm.x86.xop.vpshlw",
  "llvm.x86.xtest",
  "llvm.xcore.bitrev",
  "llvm.xcore.checkevent",
  "llvm.xcore.chkct",
  "llvm.xcore.clre",
  "llvm.xcore.clrpt",
  "llvm.xcore.clrsr",
  "llvm.xcore.crc32",
  "llvm.xcore.crc8",
  "llvm.xcore.edu",
  "llvm.xcore.eeu",
  "llvm.xcore.endin",
  "llvm.xcore.freer",
  "llvm.xcore.geted",
  "llvm.xcore.getet",
  "llvm.xcore.getid",
  "llvm.xcore.getps",
  "llvm.xcore.getr",
  "llvm.xcore.getst",
  "llvm.xcore.getts",
  "llvm.xcore.in",
  "llvm.xcore.inct",
  "llvm.xcore.initcp",
  "llvm.xcore.initdp",
  "llvm.xcore.initlr",
  "llvm.xcore.initpc",
  "llvm.xcore.initsp",
  "llvm.xcore.inshr",
  "llvm.xcore.int",
  "llvm.xcore.mjoin",
  "llvm.xcore.msync",
  "llvm.xcore.out",
  "llvm.xcore.outct",
  "llvm.xcore.outshr",
  "llvm.xcore.outt",
  "llvm.xcore.peek",
  "llvm.xcore.setc",
  "llvm.xcore.setclk",
  "llvm.xcore.setd",
  "llvm.xcore.setev",
  "llvm.xcore.setps",
  "llvm.xcore.setpsc",
  "llvm.xcore.setpt",
  "llvm.xcore.setrdy",
  "llvm.xcore.setsr",
  "llvm.xcore.settw",
  "llvm.xcore.setv",
  "llvm.xcore.sext",
  "llvm.xcore.ssync",
  "llvm.xcore.syncr",
  "llvm.xcore.testct",
  "llvm.xcore.testwct",
  "llvm.xcore.waitevent",
  "llvm.xcore.zext",
#endif

// Intrinsic ID to overload bitset
#ifdef GET_INTRINSIC_OVERLOAD_TABLE
static const uint8_t OTable[] = {
  0 | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0,
  0,
  0,
  0 | (1<<4) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6),
  0 | (1<<0) | (1<<1) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<2) | (1<<4) | (1<<5) | (1<<7),
  0,
  0 | (1<<6),
  0 | (1<<0),
  0,
  0 | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<4) | (1<<5) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4),
  0,
  0 | (1<<2) | (1<<4),
  0 | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5),
  0,
  0 | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<3) | (1<<4) | (1<<6) | (1<<7),
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0 | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<2) | (1<<3) | (1<<4),
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0 | (1<<0),
  0 | (1<<7),
  0 | (1<<0) | (1<<1),
  0,
  0 | (1<<1) | (1<<2),
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0 | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0,
  0,
  0,
  0 | (1<<4),
  0,
  0,
  0 | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2),
  0,
  0,
  0,
  0,
  0,
  0,
  0 | (1<<5),
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0 | (1<<3) | (1<<4),
  0,
  0,
  0,
  0,
  0,
  0,
  0 | (1<<0) | (1<<2) | (1<<3),
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0 | (1<<0) | (1<<3),
  0,
  0,
  0,
  0,
  0,
  0 | (1<<5),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<7),
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0,
  0 | (1<<3) | (1<<5),
  0 | (1<<1) | (1<<2) | (1<<3) | (1<<4),
  0 | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5) | (1<<6) | (1<<7),
  0 | (1<<1) | (1<<2) | (1<<3) | (1<<5) | (1<<6),
  0 | (1<<1) | (1<<2) | (1<<3)
};

return (OTable[id/8] & (1 << (id%8))) != 0;
#endif

// Function name -> enum value recognizer code.
#ifdef GET_FUNCTION_RECOGNIZER
  StringRef NameR(Name+6, Len-6);   // Skip over 'llvm.'
  switch (Name[5]) {                  // Dispatch on first letter.
  default: break;
  case 'A':
    if (NameR.startswith("MDGPU.trig.preop.")) return Intrinsic::AMDGPU_trig_preop;
    if (NameR.startswith("MDGPU.rsq.clamped.")) return Intrinsic::AMDGPU_rsq_clamped;
    if (NameR.startswith("MDGPU.rsq.")) return Intrinsic::AMDGPU_rsq;
    if (NameR.startswith("MDGPU.rcp.")) return Intrinsic::AMDGPU_rcp;
    if (NameR.startswith("MDGPU.div.scale.")) return Intrinsic::AMDGPU_div_scale;
    if (NameR.startswith("MDGPU.div.fmas.")) return Intrinsic::AMDGPU_div_fmas;
    if (NameR.startswith("MDGPU.div.fixup.")) return Intrinsic::AMDGPU_div_fixup;
    break;  // end of 'A' case.
  case 'a':
    if (NameR.startswith("rm.vcvtru.")) return Intrinsic::arm_vcvtru;
    if (NameR.startswith("rm.vcvtr.")) return Intrinsic::arm_vcvtr;
    if (NameR.startswith("rm.strex.")) return Intrinsic::arm_strex;
    if (NameR.startswith("rm.stlex.")) return Intrinsic::arm_stlex;
    if (NameR.startswith("rm.neon.vst4lane.")) return Intrinsic::arm_neon_vst4lane;
    if (NameR.startswith("rm.neon.vst4.")) return Intrinsic::arm_neon_vst4;
    if (NameR.startswith("rm.neon.vst3lane.")) return Intrinsic::arm_neon_vst3lane;
    if (NameR.startswith("rm.neon.vst3.")) return Intrinsic::arm_neon_vst3;
    if (NameR.startswith("rm.neon.vst2lane.")) return Intrinsic::arm_neon_vst2lane;
    if (NameR.startswith("rm.neon.vst2.")) return Intrinsic::arm_neon_vst2;
    if (NameR.startswith("rm.neon.vst1.")) return Intrinsic::arm_neon_vst1;
    if (NameR.startswith("rm.neon.vshiftu.")) return Intrinsic::arm_neon_vshiftu;
    if (NameR.startswith("rm.neon.vshifts.")) return Intrinsic::arm_neon_vshifts;
    if (NameR.startswith("rm.neon.vshiftins.")) return Intrinsic::arm_neon_vshiftins;
    if (NameR.startswith("rm.neon.vrsubhn.")) return Intrinsic::arm_neon_vrsubhn;
    if (NameR.startswith("rm.neon.vrsqrts.")) return Intrinsic::arm_neon_vrsqrts;
    if (NameR.startswith("rm.neon.vrsqrte.")) return Intrinsic::arm_neon_vrsqrte;
    if (NameR.startswith("rm.neon.vrshiftu.")) return Intrinsic::arm_neon_vrshiftu;
    if (NameR.startswith("rm.neon.vrshifts.")) return Intrinsic::arm_neon_vrshifts;
    if (NameR.startswith("rm.neon.vrshiftn.")) return Intrinsic::arm_neon_vrshiftn;
    if (NameR.startswith("rm.neon.vrintz.")) return Intrinsic::arm_neon_vrintz;
    if (NameR.startswith("rm.neon.vrintx.")) return Intrinsic::arm_neon_vrintx;
    if (NameR.startswith("rm.neon.vrintp.")) return Intrinsic::arm_neon_vrintp;
    if (NameR.startswith("rm.neon.vrintn.")) return Intrinsic::arm_neon_vrintn;
    if (NameR.startswith("rm.neon.vrintm.")) return Intrinsic::arm_neon_vrintm;
    if (NameR.startswith("rm.neon.vrinta.")) return Intrinsic::arm_neon_vrinta;
    if (NameR.startswith("rm.neon.vrhaddu.")) return Intrinsic::arm_neon_vrhaddu;
    if (NameR.startswith("rm.neon.vrhadds.")) return Intrinsic::arm_neon_vrhadds;
    if (NameR.startswith("rm.neon.vrecps.")) return Intrinsic::arm_neon_vrecps;
    if (NameR.startswith("rm.neon.vrecpe.")) return Intrinsic::arm_neon_vrecpe;
    if (NameR.startswith("rm.neon.vraddhn.")) return Intrinsic::arm_neon_vraddhn;
    if (NameR.startswith("rm.neon.vqsubu.")) return Intrinsic::arm_neon_vqsubu;
    if (NameR.startswith("rm.neon.vqsubs.")) return Intrinsic::arm_neon_vqsubs;
    if (NameR.startswith("rm.neon.vqshiftu.")) return Intrinsic::arm_neon_vqshiftu;
    if (NameR.startswith("rm.neon.vqshiftsu.")) return Intrinsic::arm_neon_vqshiftsu;
    if (NameR.startswith("rm.neon.vqshifts.")) return Intrinsic::arm_neon_vqshifts;
    if (NameR.startswith("rm.neon.vqshiftnu.")) return Intrinsic::arm_neon_vqshiftnu;
    if (NameR.startswith("rm.neon.vqshiftnsu.")) return Intrinsic::arm_neon_vqshiftnsu;
    if (NameR.startswith("rm.neon.vqshiftns.")) return Intrinsic::arm_neon_vqshiftns;
    if (NameR.startswith("rm.neon.vqrshiftu.")) return Intrinsic::arm_neon_vqrshiftu;
    if (NameR.startswith("rm.neon.vqrshifts.")) return Intrinsic::arm_neon_vqrshifts;
    if (NameR.startswith("rm.neon.vqrshiftnu.")) return Intrinsic::arm_neon_vqrshiftnu;
    if (NameR.startswith("rm.neon.vqrshiftnsu.")) return Intrinsic::arm_neon_vqrshiftnsu;
    if (NameR.startswith("rm.neon.vqrshiftns.")) return Intrinsic::arm_neon_vqrshiftns;
    if (NameR.startswith("rm.neon.vqrdmulh.")) return Intrinsic::arm_neon_vqrdmulh;
    if (NameR.startswith("rm.neon.vqneg.")) return Intrinsic::arm_neon_vqneg;
    if (NameR.startswith("rm.neon.vqmovnu.")) return Intrinsic::arm_neon_vqmovnu;
    if (NameR.startswith("rm.neon.vqmovnsu.")) return Intrinsic::arm_neon_vqmovnsu;
    if (NameR.startswith("rm.neon.vqmovns.")) return Intrinsic::arm_neon_vqmovns;
    if (NameR.startswith("rm.neon.vqdmull.")) return Intrinsic::arm_neon_vqdmull;
    if (NameR.startswith("rm.neon.vqdmulh.")) return Intrinsic::arm_neon_vqdmulh;
    if (NameR.startswith("rm.neon.vqaddu.")) return Intrinsic::arm_neon_vqaddu;
    if (NameR.startswith("rm.neon.vqadds.")) return Intrinsic::arm_neon_vqadds;
    if (NameR.startswith("rm.neon.vqabs.")) return Intrinsic::arm_neon_vqabs;
    if (NameR.startswith("rm.neon.vpminu.")) return Intrinsic::arm_neon_vpminu;
    if (NameR.startswith("rm.neon.vpmins.")) return Intrinsic::arm_neon_vpmins;
    if (NameR.startswith("rm.neon.vpmaxu.")) return Intrinsic::arm_neon_vpmaxu;
    if (NameR.startswith("rm.neon.vpmaxs.")) return Intrinsic::arm_neon_vpmaxs;
    if (NameR.startswith("rm.neon.vpaddlu.")) return Intrinsic::arm_neon_vpaddlu;
    if (NameR.startswith("rm.neon.vpaddls.")) return Intrinsic::arm_neon_vpaddls;
    if (NameR.startswith("rm.neon.vpadd.")) return Intrinsic::arm_neon_vpadd;
    if (NameR.startswith("rm.neon.vpadalu.")) return Intrinsic::arm_neon_vpadalu;
    if (NameR.startswith("rm.neon.vpadals.")) return Intrinsic::arm_neon_vpadals;
    if (NameR.startswith("rm.neon.vmulp.")) return Intrinsic::arm_neon_vmulp;
    if (NameR.startswith("rm.neon.vmullu.")) return Intrinsic::arm_neon_vmullu;
    if (NameR.startswith("rm.neon.vmulls.")) return Intrinsic::arm_neon_vmulls;
    if (NameR.startswith("rm.neon.vmullp.")) return Intrinsic::arm_neon_vmullp;
    if (NameR.startswith("rm.neon.vminu.")) return Intrinsic::arm_neon_vminu;
    if (NameR.startswith("rm.neon.vmins.")) return Intrinsic::arm_neon_vmins;
    if (NameR.startswith("rm.neon.vminnm.")) return Intrinsic::arm_neon_vminnm;
    if (NameR.startswith("rm.neon.vmaxu.")) return Intrinsic::arm_neon_vmaxu;
    if (NameR.startswith("rm.neon.vmaxs.")) return Intrinsic::arm_neon_vmaxs;
    if (NameR.startswith("rm.neon.vmaxnm.")) return Intrinsic::arm_neon_vmaxnm;
    if (NameR.startswith("rm.neon.vld4lane.")) return Intrinsic::arm_neon_vld4lane;
    if (NameR.startswith("rm.neon.vld4.")) return Intrinsic::arm_neon_vld4;
    if (NameR.startswith("rm.neon.vld3lane.")) return Intrinsic::arm_neon_vld3lane;
    if (NameR.startswith("rm.neon.vld3.")) return Intrinsic::arm_neon_vld3;
    if (NameR.startswith("rm.neon.vld2lane.")) return Intrinsic::arm_neon_vld2lane;
    if (NameR.startswith("rm.neon.vld2.")) return Intrinsic::arm_neon_vld2;
    if (NameR.startswith("rm.neon.vld1.")) return Intrinsic::arm_neon_vld1;
    if (NameR.startswith("rm.neon.vhsubu.")) return Intrinsic::arm_neon_vhsubu;
    if (NameR.startswith("rm.neon.vhsubs.")) return Intrinsic::arm_neon_vhsubs;
    if (NameR.startswith("rm.neon.vhaddu.")) return Intrinsic::arm_neon_vhaddu;
    if (NameR.startswith("rm.neon.vhadds.")) return Intrinsic::arm_neon_vhadds;
    if (NameR.startswith("rm.neon.vcvtpu.")) return Intrinsic::arm_neon_vcvtpu;
    if (NameR.startswith("rm.neon.vcvtps.")) return Intrinsic::arm_neon_vcvtps;
    if (NameR.startswith("rm.neon.vcvtnu.")) return Intrinsic::arm_neon_vcvtnu;
    if (NameR.startswith("rm.neon.vcvtns.")) return Intrinsic::arm_neon_vcvtns;
    if (NameR.startswith("rm.neon.vcvtmu.")) return Intrinsic::arm_neon_vcvtmu;
    if (NameR.startswith("rm.neon.vcvtms.")) return Intrinsic::arm_neon_vcvtms;
    if (NameR.startswith("rm.neon.vcvtfxu2fp.")) return Intrinsic::arm_neon_vcvtfxu2fp;
    if (NameR.startswith("rm.neon.vcvtfxs2fp.")) return Intrinsic::arm_neon_vcvtfxs2fp;
    if (NameR.startswith("rm.neon.vcvtfp2fxu.")) return Intrinsic::arm_neon_vcvtfp2fxu;
    if (NameR.startswith("rm.neon.vcvtfp2fxs.")) return Intrinsic::arm_neon_vcvtfp2fxs;
    if (NameR.startswith("rm.neon.vcvtau.")) return Intrinsic::arm_neon_vcvtau;
    if (NameR.startswith("rm.neon.vcvtas.")) return Intrinsic::arm_neon_vcvtas;
    if (NameR.startswith("rm.neon.vcnt.")) return Intrinsic::arm_neon_vcnt;
    if (NameR.startswith("rm.neon.vclz.")) return Intrinsic::arm_neon_vclz;
    if (NameR.startswith("rm.neon.vcls.")) return Intrinsic::arm_neon_vcls;
    if (NameR.startswith("rm.neon.vbsl.")) return Intrinsic::arm_neon_vbsl;
    if (NameR.startswith("rm.neon.vacgt.")) return Intrinsic::arm_neon_vacgt;
    if (NameR.startswith("rm.neon.vacge.")) return Intrinsic::arm_neon_vacge;
    if (NameR.startswith("rm.neon.vabs.")) return Intrinsic::arm_neon_vabs;
    if (NameR.startswith("rm.neon.vabdu.")) return Intrinsic::arm_neon_vabdu;
    if (NameR.startswith("rm.neon.vabds.")) return Intrinsic::arm_neon_vabds;
    if (NameR.startswith("rm.ldrex.")) return Intrinsic::arm_ldrex;
    if (NameR.startswith("rm.ldaex.")) return Intrinsic::arm_ldaex;
    if (NameR.startswith("nnotation.")) return Intrinsic::annotation;
    if (NameR.startswith("arch64.udiv.")) return Intrinsic::aarch64_udiv;
    if (NameR.startswith("arch64.stxr.")) return Intrinsic::aarch64_stxr;
    if (NameR.startswith("arch64.stlxr.")) return Intrinsic::aarch64_stlxr;
    if (NameR.startswith("arch64.sisd.fabd.")) return Intrinsic::aarch64_sisd_fabd;
    if (NameR.startswith("arch64.sdiv.")) return Intrinsic::aarch64_sdiv;
    if (NameR.startswith("arch64.rbit.")) return Intrinsic::aarch64_rbit;
    if (NameR.startswith("arch64.neon.vsri.")) return Intrinsic::aarch64_neon_vsri;
    if (NameR.startswith("arch64.neon.vsli.")) return Intrinsic::aarch64_neon_vsli;
    if (NameR.startswith("arch64.neon.vcvtfxu2fp.")) return Intrinsic::aarch64_neon_vcvtfxu2fp;
    if (NameR.startswith("arch64.neon.vcvtfxs2fp.")) return Intrinsic::aarch64_neon_vcvtfxs2fp;
    if (NameR.startswith("arch64.neon.vcvtfp2fxu.")) return Intrinsic::aarch64_neon_vcvtfp2fxu;
    if (NameR.startswith("arch64.neon.vcvtfp2fxs.")) return Intrinsic::aarch64_neon_vcvtfp2fxs;
    if (NameR.startswith("arch64.neon.vcopy.lane.")) return Intrinsic::aarch64_neon_vcopy_lane;
    if (NameR.startswith("arch64.neon.usqadd.")) return Intrinsic::aarch64_neon_usqadd;
    if (NameR.startswith("arch64.neon.ushll.")) return Intrinsic::aarch64_neon_ushll;
    if (NameR.startswith("arch64.neon.ushl.")) return Intrinsic::aarch64_neon_ushl;
    if (NameR.startswith("arch64.neon.ursqrte.")) return Intrinsic::aarch64_neon_ursqrte;
    if (NameR.startswith("arch64.neon.urshl.")) return Intrinsic::aarch64_neon_urshl;
    if (NameR.startswith("arch64.neon.urhadd.")) return Intrinsic::aarch64_neon_urhadd;
    if (NameR.startswith("arch64.neon.urecpe.")) return Intrinsic::aarch64_neon_urecpe;
    if (NameR.startswith("arch64.neon.uqxtn.")) return Intrinsic::aarch64_neon_uqxtn;
    if (NameR.startswith("arch64.neon.uqsub.")) return Intrinsic::aarch64_neon_uqsub;
    if (NameR.startswith("arch64.neon.uqshrn.")) return Intrinsic::aarch64_neon_uqshrn;
    if (NameR.startswith("arch64.neon.uqshl.")) return Intrinsic::aarch64_neon_uqshl;
    if (NameR.startswith("arch64.neon.uqrshrn.")) return Intrinsic::aarch64_neon_uqrshrn;
    if (NameR.startswith("arch64.neon.uqrshl.")) return Intrinsic::aarch64_neon_uqrshl;
    if (NameR.startswith("arch64.neon.uqadd.")) return Intrinsic::aarch64_neon_uqadd;
    if (NameR.startswith("arch64.neon.umull.")) return Intrinsic::aarch64_neon_umull;
    if (NameR.startswith("arch64.neon.uminv.")) return Intrinsic::aarch64_neon_uminv;
    if (NameR.startswith("arch64.neon.uminp.")) return Intrinsic::aarch64_neon_uminp;
    if (NameR.startswith("arch64.neon.umin.")) return Intrinsic::aarch64_neon_umin;
    if (NameR.startswith("arch64.neon.umaxv.")) return Intrinsic::aarch64_neon_umaxv;
    if (NameR.startswith("arch64.neon.umaxp.")) return Intrinsic::aarch64_neon_umaxp;
    if (NameR.startswith("arch64.neon.umax.")) return Intrinsic::aarch64_neon_umax;
    if (NameR.startswith("arch64.neon.uhsub.")) return Intrinsic::aarch64_neon_uhsub;
    if (NameR.startswith("arch64.neon.uhadd.")) return Intrinsic::aarch64_neon_uhadd;
    if (NameR.startswith("arch64.neon.uaddv.")) return Intrinsic::aarch64_neon_uaddv;
    if (NameR.startswith("arch64.neon.uaddlv.")) return Intrinsic::aarch64_neon_uaddlv;
    if (NameR.startswith("arch64.neon.uaddlp.")) return Intrinsic::aarch64_neon_uaddlp;
    if (NameR.startswith("arch64.neon.uabd.")) return Intrinsic::aarch64_neon_uabd;
    if (NameR.startswith("arch64.neon.tbx4.")) return Intrinsic::aarch64_neon_tbx4;
    if (NameR.startswith("arch64.neon.tbx3.")) return Intrinsic::aarch64_neon_tbx3;
    if (NameR.startswith("arch64.neon.tbx2.")) return Intrinsic::aarch64_neon_tbx2;
    if (NameR.startswith("arch64.neon.tbx1.")) return Intrinsic::aarch64_neon_tbx1;
    if (NameR.startswith("arch64.neon.tbl4.")) return Intrinsic::aarch64_neon_tbl4;
    if (NameR.startswith("arch64.neon.tbl3.")) return Intrinsic::aarch64_neon_tbl3;
    if (NameR.startswith("arch64.neon.tbl2.")) return Intrinsic::aarch64_neon_tbl2;
    if (NameR.startswith("arch64.neon.tbl1.")) return Intrinsic::aarch64_neon_tbl1;
    if (NameR.startswith("arch64.neon.suqadd.")) return Intrinsic::aarch64_neon_suqadd;
    if (NameR.startswith("arch64.neon.subhn.")) return Intrinsic::aarch64_neon_subhn;
    if (NameR.startswith("arch64.neon.st4lane.")) return Intrinsic::aarch64_neon_st4lane;
    if (NameR.startswith("arch64.neon.st4.")) return Intrinsic::aarch64_neon_st4;
    if (NameR.startswith("arch64.neon.st3lane.")) return Intrinsic::aarch64_neon_st3lane;
    if (NameR.startswith("arch64.neon.st3.")) return Intrinsic::aarch64_neon_st3;
    if (NameR.startswith("arch64.neon.st2lane.")) return Intrinsic::aarch64_neon_st2lane;
    if (NameR.startswith("arch64.neon.st2.")) return Intrinsic::aarch64_neon_st2;
    if (NameR.startswith("arch64.neon.st1x4.")) return Intrinsic::aarch64_neon_st1x4;
    if (NameR.startswith("arch64.neon.st1x3.")) return Intrinsic::aarch64_neon_st1x3;
    if (NameR.startswith("arch64.neon.st1x2.")) return Intrinsic::aarch64_neon_st1x2;
    if (NameR.startswith("arch64.neon.sshll.")) return Intrinsic::aarch64_neon_sshll;
    if (NameR.startswith("arch64.neon.sshl.")) return Intrinsic::aarch64_neon_sshl;
    if (NameR.startswith("arch64.neon.srshl.")) return Intrinsic::aarch64_neon_srshl;
    if (NameR.startswith("arch64.neon.srhadd.")) return Intrinsic::aarch64_neon_srhadd;
    if (NameR.startswith("arch64.neon.sqxtun.")) return Intrinsic::aarch64_neon_sqxtun;
    if (NameR.startswith("arch64.neon.sqxtn.")) return Intrinsic::aarch64_neon_sqxtn;
    if (NameR.startswith("arch64.neon.sqsub.")) return Intrinsic::aarch64_neon_sqsub;
    if (NameR.startswith("arch64.neon.sqshrun.")) return Intrinsic::aarch64_neon_sqshrun;
    if (NameR.startswith("arch64.neon.sqshrn.")) return Intrinsic::aarch64_neon_sqshrn;
    if (NameR.startswith("arch64.neon.sqshlu.")) return Intrinsic::aarch64_neon_sqshlu;
    if (NameR.startswith("arch64.neon.sqshl.")) return Intrinsic::aarch64_neon_sqshl;
    if (NameR.startswith("arch64.neon.sqrshrun.")) return Intrinsic::aarch64_neon_sqrshrun;
    if (NameR.startswith("arch64.neon.sqrshrn.")) return Intrinsic::aarch64_neon_sqrshrn;
    if (NameR.startswith("arch64.neon.sqrshl.")) return Intrinsic::aarch64_neon_sqrshl;
    if (NameR.startswith("arch64.neon.sqrdmulh.")) return Intrinsic::aarch64_neon_sqrdmulh;
    if (NameR.startswith("arch64.neon.sqneg.")) return Intrinsic::aarch64_neon_sqneg;
    if (NameR.startswith("arch64.neon.sqdmull.")) return Intrinsic::aarch64_neon_sqdmull;
    if (NameR.startswith("arch64.neon.sqdmulh.")) return Intrinsic::aarch64_neon_sqdmulh;
    if (NameR.startswith("arch64.neon.sqadd.")) return Intrinsic::aarch64_neon_sqadd;
    if (NameR.startswith("arch64.neon.sqabs.")) return Intrinsic::aarch64_neon_sqabs;
    if (NameR.startswith("arch64.neon.smull.")) return Intrinsic::aarch64_neon_smull;
    if (NameR.startswith("arch64.neon.sminv.")) return Intrinsic::aarch64_neon_sminv;
    if (NameR.startswith("arch64.neon.sminp.")) return Intrinsic::aarch64_neon_sminp;
    if (NameR.startswith("arch64.neon.smin.")) return Intrinsic::aarch64_neon_smin;
    if (NameR.startswith("arch64.neon.smaxv.")) return Intrinsic::aarch64_neon_smaxv;
    if (NameR.startswith("arch64.neon.smaxp.")) return Intrinsic::aarch64_neon_smaxp;
    if (NameR.startswith("arch64.neon.smax.")) return Intrinsic::aarch64_neon_smax;
    if (NameR.startswith("arch64.neon.shsub.")) return Intrinsic::aarch64_neon_shsub;
    if (NameR.startswith("arch64.neon.shll.")) return Intrinsic::aarch64_neon_shll;
    if (NameR.startswith("arch64.neon.shadd.")) return Intrinsic::aarch64_neon_shadd;
    if (NameR.startswith("arch64.neon.scalar.uqxtn.")) return Intrinsic::aarch64_neon_scalar_uqxtn;
    if (NameR.startswith("arch64.neon.scalar.sqxtun.")) return Intrinsic::aarch64_neon_scalar_sqxtun;
    if (NameR.startswith("arch64.neon.scalar.sqxtn.")) return Intrinsic::aarch64_neon_scalar_sqxtn;
    if (NameR.startswith("arch64.neon.saddv.")) return Intrinsic::aarch64_neon_saddv;
    if (NameR.startswith("arch64.neon.saddlv.")) return Intrinsic::aarch64_neon_saddlv;
    if (NameR.startswith("arch64.neon.saddlp.")) return Intrinsic::aarch64_neon_saddlp;
    if (NameR.startswith("arch64.neon.sabd.")) return Intrinsic::aarch64_neon_sabd;
    if (NameR.startswith("arch64.neon.rsubhn.")) return Intrinsic::aarch64_neon_rsubhn;
    if (NameR.startswith("arch64.neon.rshrn.")) return Intrinsic::aarch64_neon_rshrn;
    if (NameR.startswith("arch64.neon.rbit.")) return Intrinsic::aarch64_neon_rbit;
    if (NameR.startswith("arch64.neon.raddhn.")) return Intrinsic::aarch64_neon_raddhn;
    if (NameR.startswith("arch64.neon.pmull.")) return Intrinsic::aarch64_neon_pmull;
    if (NameR.startswith("arch64.neon.pmul.")) return Intrinsic::aarch64_neon_pmul;
    if (NameR.startswith("arch64.neon.ld4r.")) return Intrinsic::aarch64_neon_ld4r;
    if (NameR.startswith("arch64.neon.ld4lane.")) return Intrinsic::aarch64_neon_ld4lane;
    if (NameR.startswith("arch64.neon.ld4.")) return Intrinsic::aarch64_neon_ld4;
    if (NameR.startswith("arch64.neon.ld3r.")) return Intrinsic::aarch64_neon_ld3r;
    if (NameR.startswith("arch64.neon.ld3lane.")) return Intrinsic::aarch64_neon_ld3lane;
    if (NameR.startswith("arch64.neon.ld3.")) return Intrinsic::aarch64_neon_ld3;
    if (NameR.startswith("arch64.neon.ld2r.")) return Intrinsic::aarch64_neon_ld2r;
    if (NameR.startswith("arch64.neon.ld2lane.")) return Intrinsic::aarch64_neon_ld2lane;
    if (NameR.startswith("arch64.neon.ld2.")) return Intrinsic::aarch64_neon_ld2;
    if (NameR.startswith("arch64.neon.ld1x4.")) return Intrinsic::aarch64_neon_ld1x4;
    if (NameR.startswith("arch64.neon.ld1x3.")) return Intrinsic::aarch64_neon_ld1x3;
    if (NameR.startswith("arch64.neon.ld1x2.")) return Intrinsic::aarch64_neon_ld1x2;
    if (NameR.startswith("arch64.neon.frsqrts.")) return Intrinsic::aarch64_neon_frsqrts;
    if (NameR.startswith("arch64.neon.frsqrte.")) return Intrinsic::aarch64_neon_frsqrte;
    if (NameR.startswith("arch64.neon.frintn.")) return Intrinsic::aarch64_neon_frintn;
    if (NameR.startswith("arch64.neon.frecpx.")) return Intrinsic::aarch64_neon_frecpx;
    if (NameR.startswith("arch64.neon.frecps.")) return Intrinsic::aarch64_neon_frecps;
    if (NameR.startswith("arch64.neon.frecpe.")) return Intrinsic::aarch64_neon_frecpe;
    if (NameR.startswith("arch64.neon.fmulx.")) return Intrinsic::aarch64_neon_fmulx;
    if (NameR.startswith("arch64.neon.fminv.")) return Intrinsic::aarch64_neon_fminv;
    if (NameR.startswith("arch64.neon.fminp.")) return Intrinsic::aarch64_neon_fminp;
    if (NameR.startswith("arch64.neon.fminnmv.")) return Intrinsic::aarch64_neon_fminnmv;
    if (NameR.startswith("arch64.neon.fminnmp.")) return Intrinsic::aarch64_neon_fminnmp;
    if (NameR.startswith("arch64.neon.fminnm.")) return Intrinsic::aarch64_neon_fminnm;
    if (NameR.startswith("arch64.neon.fmin.")) return Intrinsic::aarch64_neon_fmin;
    if (NameR.startswith("arch64.neon.fmaxv.")) return Intrinsic::aarch64_neon_fmaxv;
    if (NameR.startswith("arch64.neon.fmaxp.")) return Intrinsic::aarch64_neon_fmaxp;
    if (NameR.startswith("arch64.neon.fmaxnmv.")) return Intrinsic::aarch64_neon_fmaxnmv;
    if (NameR.startswith("arch64.neon.fmaxnmp.")) return Intrinsic::aarch64_neon_fmaxnmp;
    if (NameR.startswith("arch64.neon.fmaxnm.")) return Intrinsic::aarch64_neon_fmaxnm;
    if (NameR.startswith("arch64.neon.fmax.")) return Intrinsic::aarch64_neon_fmax;
    if (NameR.startswith("arch64.neon.fcvtzu.")) return Intrinsic::aarch64_neon_fcvtzu;
    if (NameR.startswith("arch64.neon.fcvtzs.")) return Intrinsic::aarch64_neon_fcvtzs;
    if (NameR.startswith("arch64.neon.fcvtxn.")) return Intrinsic::aarch64_neon_fcvtxn;
    if (NameR.startswith("arch64.neon.fcvtpu.")) return Intrinsic::aarch64_neon_fcvtpu;
    if (NameR.startswith("arch64.neon.fcvtps.")) return Intrinsic::aarch64_neon_fcvtps;
    if (NameR.startswith("arch64.neon.fcvtnu.")) return Intrinsic::aarch64_neon_fcvtnu;
    if (NameR.startswith("arch64.neon.fcvtns.")) return Intrinsic::aarch64_neon_fcvtns;
    if (NameR.startswith("arch64.neon.fcvtmu.")) return Intrinsic::aarch64_neon_fcvtmu;
    if (NameR.startswith("arch64.neon.fcvtms.")) return Intrinsic::aarch64_neon_fcvtms;
    if (NameR.startswith("arch64.neon.fcvtau.")) return Intrinsic::aarch64_neon_fcvtau;
    if (NameR.startswith("arch64.neon.fcvtas.")) return Intrinsic::aarch64_neon_fcvtas;
    if (NameR.startswith("arch64.neon.faddv.")) return Intrinsic::aarch64_neon_faddv;
    if (NameR.startswith("arch64.neon.facgt.")) return Intrinsic::aarch64_neon_facgt;
    if (NameR.startswith("arch64.neon.facge.")) return Intrinsic::aarch64_neon_facge;
    if (NameR.startswith("arch64.neon.fabd.")) return Intrinsic::aarch64_neon_fabd;
    if (NameR.startswith("arch64.neon.cls.")) return Intrinsic::aarch64_neon_cls;
    if (NameR.startswith("arch64.neon.addp.")) return Intrinsic::aarch64_neon_addp;
    if (NameR.startswith("arch64.neon.addhn.")) return Intrinsic::aarch64_neon_addhn;
    if (NameR.startswith("arch64.neon.abs.")) return Intrinsic::aarch64_neon_abs;
    if (NameR.startswith("arch64.ldxr.")) return Intrinsic::aarch64_ldxr;
    if (NameR.startswith("arch64.ldaxr.")) return Intrinsic::aarch64_ldaxr;
    switch (NameR.size()) {
    default: break;
    case 6:	 // 6 strings to match.
      if (memcmp(NameR.data()+0, "rm.", 3))
        break;
      switch (NameR[3]) {
      default: break;
      case 'c':	 // 1 string to match.
        if (memcmp(NameR.data()+4, "dp", 2))
          break;
        return Intrinsic::arm_cdp;	 // "rm.cdp"
      case 'd':	 // 2 strings to match.
        switch (NameR[4]) {
        default: break;
        case 'm':	 // 1 string to match.
          if (NameR[5] != 'b')
            break;
          return Intrinsic::arm_dmb;	 // "rm.dmb"
        case 's':	 // 1 string to match.
          if (NameR[5] != 'b')
            break;
          return Intrinsic::arm_dsb;	 // "rm.dsb"
        }
        break;
      case 'i':	 // 1 string to match.
        if (memcmp(NameR.data()+4, "sb", 2))
          break;
        return Intrinsic::arm_isb;	 // "rm.isb"
      case 'm':	 // 2 strings to match.
        switch (NameR[4]) {
        default: break;
        case 'c':	 // 1 string to match.
          if (NameR[5] != 'r')
            break;
          return Intrinsic::arm_mcr;	 // "rm.mcr"
        case 'r':	 // 1 string to match.
          if (NameR[5] != 'c')
            break;
          return Intrinsic::arm_mrc;	 // "rm.mrc"
        }
        break;
      }
      break;
    case 7:	 // 10 strings to match.
      if (memcmp(NameR.data()+0, "rm.", 3))
        break;
      switch (NameR[3]) {
      default: break;
      case 'c':	 // 1 string to match.
        if (memcmp(NameR.data()+4, "dp2", 3))
          break;
        return Intrinsic::arm_cdp2;	 // "rm.cdp2"
      case 'h':	 // 1 string to match.
        if (memcmp(NameR.data()+4, "int", 3))
          break;
        return Intrinsic::arm_hint;	 // "rm.hint"
      case 'm':	 // 3 strings to match.
        switch (NameR[4]) {
        default: break;
        case 'c':	 // 2 strings to match.
          if (NameR[5] != 'r')
            break;
          switch (NameR[6]) {
          default: break;
          case '2':	 // 1 string to match.
            return Intrinsic::arm_mcr2;	 // "rm.mcr2"
          case 'r':	 // 1 string to match.
            return Intrinsic::arm_mcrr;	 // "rm.mcrr"
          }
          break;
        case 'r':	 // 1 string to match.
          if (memcmp(NameR.data()+5, "c2", 2))
            break;
          return Intrinsic::arm_mrc2;	 // "rm.mrc2"
        }
        break;
      case 'q':	 // 2 strings to match.
        switch (NameR[4]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(NameR.data()+5, "dd", 2))
            break;
          return Intrinsic::arm_qadd;	 // "rm.qadd"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+5, "ub", 2))
            break;
          return Intrinsic::arm_qsub;	 // "rm.qsub"
        }
        break;
      case 'r':	 // 1 string to match.
        if (memcmp(NameR.data()+4, "bit", 3))
          break;
        return Intrinsic::arm_rbit;	 // "rm.rbit"
      case 's':	 // 1 string to match.
        if (memcmp(NameR.data()+4, "sat", 3))
          break;
        return Intrinsic::arm_ssat;	 // "rm.ssat"
      case 'u':	 // 1 string to match.
        if (memcmp(NameR.data()+4, "sat", 3))
          break;
        return Intrinsic::arm_usat;	 // "rm.usat"
      }
      break;
    case 8:	 // 2 strings to match.
      if (memcmp(NameR.data()+0, "rm.", 3))
        break;
      switch (NameR[3]) {
      default: break;
      case 'c':	 // 1 string to match.
        if (memcmp(NameR.data()+4, "lrex", 4))
          break;
        return Intrinsic::arm_clrex;	 // "rm.clrex"
      case 'm':	 // 1 string to match.
        if (memcmp(NameR.data()+4, "crr2", 4))
          break;
        return Intrinsic::arm_mcrr2;	 // "rm.mcrr2"
      }
      break;
    case 9:	 // 7 strings to match.
      if (memcmp(NameR.data()+0, "rm.", 3))
        break;
      switch (NameR[3]) {
      default: break;
      case 'c':	 // 3 strings to match.
        if (memcmp(NameR.data()+4, "rc32", 4))
          break;
        switch (NameR[8]) {
        default: break;
        case 'b':	 // 1 string to match.
          return Intrinsic::arm_crc32b;	 // "rm.crc32b"
        case 'h':	 // 1 string to match.
          return Intrinsic::arm_crc32h;	 // "rm.crc32h"
        case 'w':	 // 1 string to match.
          return Intrinsic::arm_crc32w;	 // "rm.crc32w"
        }
        break;
      case 'l':	 // 2 strings to match.
        if (NameR[4] != 'd')
          break;
        switch (NameR[5]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "exd", 3))
            break;
          return Intrinsic::arm_ldaexd;	 // "rm.ldaexd"
        case 'r':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "exd", 3))
            break;
          return Intrinsic::arm_ldrexd;	 // "rm.ldrexd"
        }
        break;
      case 's':	 // 2 strings to match.
        if (NameR[4] != 't')
          break;
        switch (NameR[5]) {
        default: break;
        case 'l':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "exd", 3))
            break;
          return Intrinsic::arm_stlexd;	 // "rm.stlexd"
        case 'r':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "exd", 3))
            break;
          return Intrinsic::arm_strexd;	 // "rm.strexd"
        }
        break;
      }
      break;
    case 10:	 // 6 strings to match.
      switch (NameR[0]) {
      default: break;
      case 'a':	 // 3 strings to match.
        if (memcmp(NameR.data()+1, "rch64.", 6))
          break;
        switch (NameR[7]) {
        default: break;
        case 'd':	 // 2 strings to match.
          switch (NameR[8]) {
          default: break;
          case 'm':	 // 1 string to match.
            if (NameR[9] != 'b')
              break;
            return Intrinsic::aarch64_dmb;	 // "arch64.dmb"
          case 's':	 // 1 string to match.
            if (NameR[9] != 'b')
              break;
            return Intrinsic::aarch64_dsb;	 // "arch64.dsb"
          }
          break;
        case 'i':	 // 1 string to match.
          if (memcmp(NameR.data()+8, "sb", 2))
            break;
          return Intrinsic::aarch64_isb;	 // "arch64.isb"
        }
        break;
      case 'r':	 // 3 strings to match.
        if (memcmp(NameR.data()+1, "m.crc32c", 8))
          break;
        switch (NameR[9]) {
        default: break;
        case 'b':	 // 1 string to match.
          return Intrinsic::arm_crc32cb;	 // "rm.crc32cb"
        case 'h':	 // 1 string to match.
          return Intrinsic::arm_crc32ch;	 // "rm.crc32ch"
        case 'w':	 // 1 string to match.
          return Intrinsic::arm_crc32cw;	 // "rm.crc32cw"
        }
        break;
      }
      break;
    case 11:	 // 3 strings to match.
      if (memcmp(NameR.data()+0, "arch64.", 7))
        break;
      switch (NameR[7]) {
      default: break;
      case 'h':	 // 1 string to match.
        if (memcmp(NameR.data()+8, "int", 3))
          break;
        return Intrinsic::aarch64_hint;	 // "arch64.hint"
      case 'l':	 // 1 string to match.
        if (memcmp(NameR.data()+8, "dxp", 3))
          break;
        return Intrinsic::aarch64_ldxp;	 // "arch64.ldxp"
      case 's':	 // 1 string to match.
        if (memcmp(NameR.data()+8, "txp", 3))
          break;
        return Intrinsic::aarch64_stxp;	 // "arch64.stxp"
      }
      break;
    case 12:	 // 8 strings to match.
      switch (NameR[0]) {
      default: break;
      case 'a':	 // 3 strings to match.
        if (memcmp(NameR.data()+1, "rch64.", 6))
          break;
        switch (NameR[7]) {
        default: break;
        case 'c':	 // 1 string to match.
          if (memcmp(NameR.data()+8, "lrex", 4))
            break;
          return Intrinsic::aarch64_clrex;	 // "arch64.clrex"
        case 'l':	 // 1 string to match.
          if (memcmp(NameR.data()+8, "daxp", 4))
            break;
          return Intrinsic::aarch64_ldaxp;	 // "arch64.ldaxp"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+8, "tlxp", 4))
            break;
          return Intrinsic::aarch64_stlxp;	 // "arch64.stlxp"
        }
        break;
      case 'r':	 // 5 strings to match.
        if (memcmp(NameR.data()+1, "m.", 2))
          break;
        switch (NameR[3]) {
        default: break;
        case 'g':	 // 1 string to match.
          if (memcmp(NameR.data()+4, "et.fpscr", 8))
            break;
          return Intrinsic::arm_get_fpscr;	 // "rm.get.fpscr"
        case 'n':	 // 2 strings to match.
          if (memcmp(NameR.data()+4, "eon.aes", 7))
            break;
          switch (NameR[11]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::arm_neon_aesd;	 // "rm.neon.aesd"
          case 'e':	 // 1 string to match.
            return Intrinsic::arm_neon_aese;	 // "rm.neon.aese"
          }
          break;
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+4, "et.fpscr", 8))
            break;
          return Intrinsic::arm_set_fpscr;	 // "rm.set.fpscr"
        case 'u':	 // 1 string to match.
          if (memcmp(NameR.data()+4, "ndefined", 8))
            break;
          return Intrinsic::arm_undefined;	 // "rm.undefined"
        }
        break;
      }
      break;
    case 13:	 // 17 strings to match.
      switch (NameR[0]) {
      default: break;
      case 'a':	 // 4 strings to match.
        if (memcmp(NameR.data()+1, "rch64.crc32", 11))
          break;
        switch (NameR[12]) {
        default: break;
        case 'b':	 // 1 string to match.
          return Intrinsic::aarch64_crc32b;	 // "arch64.crc32b"
        case 'h':	 // 1 string to match.
          return Intrinsic::aarch64_crc32h;	 // "arch64.crc32h"
        case 'w':	 // 1 string to match.
          return Intrinsic::aarch64_crc32w;	 // "arch64.crc32w"
        case 'x':	 // 1 string to match.
          return Intrinsic::aarch64_crc32x;	 // "arch64.crc32x"
        }
        break;
      case 'r':	 // 13 strings to match.
        if (memcmp(NameR.data()+1, "m.neon.", 7))
          break;
        switch (NameR[8]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(NameR.data()+9, "esmc", 4))
            break;
          return Intrinsic::arm_neon_aesmc;	 // "rm.neon.aesmc"
        case 's':	 // 4 strings to match.
          if (memcmp(NameR.data()+9, "ha1", 3))
            break;
          switch (NameR[12]) {
          default: break;
          case 'c':	 // 1 string to match.
            return Intrinsic::arm_neon_sha1c;	 // "rm.neon.sha1c"
          case 'h':	 // 1 string to match.
            return Intrinsic::arm_neon_sha1h;	 // "rm.neon.sha1h"
          case 'm':	 // 1 string to match.
            return Intrinsic::arm_neon_sha1m;	 // "rm.neon.sha1m"
          case 'p':	 // 1 string to match.
            return Intrinsic::arm_neon_sha1p;	 // "rm.neon.sha1p"
          }
          break;
        case 'v':	 // 8 strings to match.
          if (memcmp(NameR.data()+9, "tb", 2))
            break;
          switch (NameR[11]) {
          default: break;
          case 'l':	 // 4 strings to match.
            switch (NameR[12]) {
            default: break;
            case '1':	 // 1 string to match.
              return Intrinsic::arm_neon_vtbl1;	 // "rm.neon.vtbl1"
            case '2':	 // 1 string to match.
              return Intrinsic::arm_neon_vtbl2;	 // "rm.neon.vtbl2"
            case '3':	 // 1 string to match.
              return Intrinsic::arm_neon_vtbl3;	 // "rm.neon.vtbl3"
            case '4':	 // 1 string to match.
              return Intrinsic::arm_neon_vtbl4;	 // "rm.neon.vtbl4"
            }
            break;
          case 'x':	 // 4 strings to match.
            switch (NameR[12]) {
            default: break;
            case '1':	 // 1 string to match.
              return Intrinsic::arm_neon_vtbx1;	 // "rm.neon.vtbx1"
            case '2':	 // 1 string to match.
              return Intrinsic::arm_neon_vtbx2;	 // "rm.neon.vtbx2"
            case '3':	 // 1 string to match.
              return Intrinsic::arm_neon_vtbx3;	 // "rm.neon.vtbx3"
            case '4':	 // 1 string to match.
              return Intrinsic::arm_neon_vtbx4;	 // "rm.neon.vtbx4"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 14:	 // 5 strings to match.
      switch (NameR[0]) {
      default: break;
      case 'a':	 // 4 strings to match.
        if (memcmp(NameR.data()+1, "rch64.crc32c", 12))
          break;
        switch (NameR[13]) {
        default: break;
        case 'b':	 // 1 string to match.
          return Intrinsic::aarch64_crc32cb;	 // "arch64.crc32cb"
        case 'h':	 // 1 string to match.
          return Intrinsic::aarch64_crc32ch;	 // "arch64.crc32ch"
        case 'w':	 // 1 string to match.
          return Intrinsic::aarch64_crc32cw;	 // "arch64.crc32cw"
        case 'x':	 // 1 string to match.
          return Intrinsic::aarch64_crc32cx;	 // "arch64.crc32cx"
        }
        break;
      case 'r':	 // 1 string to match.
        if (memcmp(NameR.data()+1, "m.neon.aesimc", 13))
          break;
        return Intrinsic::arm_neon_aesimc;	 // "rm.neon.aesimc"
      }
      break;
    case 15:	 // 3 strings to match.
      if (memcmp(NameR.data()+0, "rm.neon.sha", 11))
        break;
      switch (NameR[11]) {
      default: break;
      case '1':	 // 2 strings to match.
        if (memcmp(NameR.data()+12, "su", 2))
          break;
        switch (NameR[14]) {
        default: break;
        case '0':	 // 1 string to match.
          return Intrinsic::arm_neon_sha1su0;	 // "rm.neon.sha1su0"
        case '1':	 // 1 string to match.
          return Intrinsic::arm_neon_sha1su1;	 // "rm.neon.sha1su1"
        }
        break;
      case '2':	 // 1 string to match.
        if (memcmp(NameR.data()+12, "56h", 3))
          break;
        return Intrinsic::arm_neon_sha256h;	 // "rm.neon.sha256h"
      }
      break;
    case 16:	 // 2 strings to match.
      switch (NameR[0]) {
      default: break;
      case 'd':	 // 1 string to match.
        if (memcmp(NameR.data()+1, "just.trampoline", 15))
          break;
        return Intrinsic::adjust_trampoline;	 // "djust.trampoline"
      case 'r':	 // 1 string to match.
        if (memcmp(NameR.data()+1, "m.neon.sha256h2", 15))
          break;
        return Intrinsic::arm_neon_sha256h2;	 // "rm.neon.sha256h2"
      }
      break;
    case 17:	 // 5 strings to match.
      if (memcmp(NameR.data()+0, "rm.", 3))
        break;
      switch (NameR[3]) {
      default: break;
      case 'n':	 // 4 strings to match.
        if (memcmp(NameR.data()+4, "eon.", 4))
          break;
        switch (NameR[8]) {
        default: break;
        case 's':	 // 2 strings to match.
          if (memcmp(NameR.data()+9, "ha256su", 7))
            break;
          switch (NameR[16]) {
          default: break;
          case '0':	 // 1 string to match.
            return Intrinsic::arm_neon_sha256su0;	 // "rm.neon.sha256su0"
          case '1':	 // 1 string to match.
            return Intrinsic::arm_neon_sha256su1;	 // "rm.neon.sha256su1"
          }
          break;
        case 'v':	 // 2 strings to match.
          if (memcmp(NameR.data()+9, "cvt", 3))
            break;
          switch (NameR[12]) {
          default: break;
          case 'f':	 // 1 string to match.
            if (memcmp(NameR.data()+13, "p2hf", 4))
              break;
            return Intrinsic::arm_neon_vcvtfp2hf;	 // "rm.neon.vcvtfp2hf"
          case 'h':	 // 1 string to match.
            if (memcmp(NameR.data()+13, "f2fp", 4))
              break;
            return Intrinsic::arm_neon_vcvthf2fp;	 // "rm.neon.vcvthf2fp"
          }
          break;
        }
        break;
      case 't':	 // 1 string to match.
        if (memcmp(NameR.data()+4, "hread.pointer", 13))
          break;
        return Intrinsic::arm_thread_pointer;	 // "rm.thread.pointer"
      }
      break;
    case 18:	 // 3 strings to match.
      if (memcmp(NameR.data()+0, "arch64.", 7))
        break;
      switch (NameR[7]) {
      default: break;
      case 'c':	 // 2 strings to match.
        if (memcmp(NameR.data()+8, "rypto.aes", 9))
          break;
        switch (NameR[17]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::aarch64_crypto_aesd;	 // "arch64.crypto.aesd"
        case 'e':	 // 1 string to match.
          return Intrinsic::aarch64_crypto_aese;	 // "arch64.crypto.aese"
        }
        break;
      case 's':	 // 1 string to match.
        if (memcmp(NameR.data()+8, "isd.fcvtxn", 10))
          break;
        return Intrinsic::aarch64_sisd_fcvtxn;	 // "arch64.sisd.fcvtxn"
      }
      break;
    case 19:	 // 6 strings to match.
      if (memcmp(NameR.data()+0, "arch64.", 7))
        break;
      switch (NameR[7]) {
      default: break;
      case 'c':	 // 5 strings to match.
        if (memcmp(NameR.data()+8, "rypto.", 6))
          break;
        switch (NameR[14]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(NameR.data()+15, "esmc", 4))
            break;
          return Intrinsic::aarch64_crypto_aesmc;	 // "arch64.crypto.aesmc"
        case 's':	 // 4 strings to match.
          if (memcmp(NameR.data()+15, "ha1", 3))
            break;
          switch (NameR[18]) {
          default: break;
          case 'c':	 // 1 string to match.
            return Intrinsic::aarch64_crypto_sha1c;	 // "arch64.crypto.sha1c"
          case 'h':	 // 1 string to match.
            return Intrinsic::aarch64_crypto_sha1h;	 // "arch64.crypto.sha1h"
          case 'm':	 // 1 string to match.
            return Intrinsic::aarch64_crypto_sha1m;	 // "arch64.crypto.sha1m"
          case 'p':	 // 1 string to match.
            return Intrinsic::aarch64_crypto_sha1p;	 // "arch64.crypto.sha1p"
          }
          break;
        }
        break;
      case 'n':	 // 1 string to match.
        if (memcmp(NameR.data()+8, "eon.pmull64", 11))
          break;
        return Intrinsic::aarch64_neon_pmull64;	 // "arch64.neon.pmull64"
      }
      break;
    case 20:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "arch64.crypto.aesimc", 20))
        break;
      return Intrinsic::aarch64_crypto_aesimc;	 // "arch64.crypto.aesimc"
    case 21:	 // 5 strings to match.
      if (memcmp(NameR.data()+0, "arch64.", 7))
        break;
      switch (NameR[7]) {
      default: break;
      case 'c':	 // 3 strings to match.
        if (memcmp(NameR.data()+8, "rypto.sha", 9))
          break;
        switch (NameR[17]) {
        default: break;
        case '1':	 // 2 strings to match.
          if (memcmp(NameR.data()+18, "su", 2))
            break;
          switch (NameR[20]) {
          default: break;
          case '0':	 // 1 string to match.
            return Intrinsic::aarch64_crypto_sha1su0;	 // "arch64.crypto.sha1su0"
          case '1':	 // 1 string to match.
            return Intrinsic::aarch64_crypto_sha1su1;	 // "arch64.crypto.sha1su1"
          }
          break;
        case '2':	 // 1 string to match.
          if (memcmp(NameR.data()+18, "56h", 3))
            break;
          return Intrinsic::aarch64_crypto_sha256h;	 // "arch64.crypto.sha256h"
        }
        break;
      case 'n':	 // 2 strings to match.
        if (memcmp(NameR.data()+8, "eon.vcvt", 8))
          break;
        switch (NameR[16]) {
        default: break;
        case 'f':	 // 1 string to match.
          if (memcmp(NameR.data()+17, "p2hf", 4))
            break;
          return Intrinsic::aarch64_neon_vcvtfp2hf;	 // "arch64.neon.vcvtfp2hf"
        case 'h':	 // 1 string to match.
          if (memcmp(NameR.data()+17, "f2fp", 4))
            break;
          return Intrinsic::aarch64_neon_vcvthf2fp;	 // "arch64.neon.vcvthf2fp"
        }
        break;
      }
      break;
    case 22:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "arch64.crypto.sha256h2", 22))
        break;
      return Intrinsic::aarch64_crypto_sha256h2;	 // "arch64.crypto.sha256h2"
    case 23:	 // 2 strings to match.
      if (memcmp(NameR.data()+0, "arch64.crypto.sha256su", 22))
        break;
      switch (NameR[22]) {
      default: break;
      case '0':	 // 1 string to match.
        return Intrinsic::aarch64_crypto_sha256su0;	 // "arch64.crypto.sha256su0"
      case '1':	 // 1 string to match.
        return Intrinsic::aarch64_crypto_sha256su1;	 // "arch64.crypto.sha256su1"
      }
      break;
    case 27:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "arch64.neon.sqdmulls.scalar", 27))
        break;
      return Intrinsic::aarch64_neon_sqdmulls_scalar;	 // "arch64.neon.sqdmulls.scalar"
    }
    break;  // end of 'a' case.
  case 'b':
    if (NameR.startswith("swap.")) return Intrinsic::bswap;
    break;  // end of 'b' case.
  case 'c':
    if (NameR.startswith("ttz.")) return Intrinsic::cttz;
    if (NameR.startswith("tpop.")) return Intrinsic::ctpop;
    if (NameR.startswith("tlz.")) return Intrinsic::ctlz;
    if (NameR.startswith("os.")) return Intrinsic::cos;
    if (NameR.startswith("opysign.")) return Intrinsic::copysign;
    if (NameR.startswith("onvertuu.")) return Intrinsic::convertuu;
    if (NameR.startswith("onvertus.")) return Intrinsic::convertus;
    if (NameR.startswith("onvertuif.")) return Intrinsic::convertuif;
    if (NameR.startswith("onvertsu.")) return Intrinsic::convertsu;
    if (NameR.startswith("onvertss.")) return Intrinsic::convertss;
    if (NameR.startswith("onvertsif.")) return Intrinsic::convertsif;
    if (NameR.startswith("onvertfui.")) return Intrinsic::convertfui;
    if (NameR.startswith("onvertfsi.")) return Intrinsic::convertfsi;
    if (NameR.startswith("onvertff.")) return Intrinsic::convertff;
    if (NameR.startswith("onvert.to.fp16.")) return Intrinsic::convert_to_fp16;
    if (NameR.startswith("onvert.from.fp16.")) return Intrinsic::convert_from_fp16;
    if (NameR.startswith("eil.")) return Intrinsic::ceil;
    switch (NameR.size()) {
    default: break;
    case 10:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "lear_cache", 10))
        break;
      return Intrinsic::clear_cache;	 // "lear_cache"
    case 15:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "uda.syncthreads", 15))
        break;
      return Intrinsic::cuda_syncthreads;	 // "uda.syncthreads"
    }
    break;  // end of 'c' case.
  case 'd':
    switch (NameR.size()) {
    default: break;
    case 8:	 // 3 strings to match.
      switch (NameR[0]) {
      default: break;
      case 'b':	 // 1 string to match.
        if (memcmp(NameR.data()+1, "g.value", 7))
          break;
        return Intrinsic::dbg_value;	 // "bg.value"
      case 'e':	 // 1 string to match.
        if (memcmp(NameR.data()+1, "bugtrap", 7))
          break;
        return Intrinsic::debugtrap;	 // "ebugtrap"
      case 'o':	 // 1 string to match.
        if (memcmp(NameR.data()+1, "nothing", 7))
          break;
        return Intrinsic::donothing;	 // "onothing"
      }
      break;
    case 10:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "bg.declare", 10))
        break;
      return Intrinsic::dbg_declare;	 // "bg.declare"
    }
    break;  // end of 'd' case.
  case 'e':
    if (NameR.startswith("xpect.")) return Intrinsic::expect;
    if (NameR.startswith("xp2.")) return Intrinsic::exp2;
    if (NameR.startswith("xp.")) return Intrinsic::exp;
    switch (NameR.size()) {
    default: break;
    case 11:	 // 2 strings to match.
      if (memcmp(NameR.data()+0, "h.", 2))
        break;
      switch (NameR[2]) {
      default: break;
      case 'd':	 // 1 string to match.
        if (memcmp(NameR.data()+3, "warf.cfa", 8))
          break;
        return Intrinsic::eh_dwarf_cfa;	 // "h.dwarf.cfa"
      case 's':	 // 1 string to match.
        if (memcmp(NameR.data()+3, "jlj.lsda", 8))
          break;
        return Intrinsic::eh_sjlj_lsda;	 // "h.sjlj.lsda"
      }
      break;
    case 12:	 // 3 strings to match.
      if (memcmp(NameR.data()+0, "h.", 2))
        break;
      switch (NameR[2]) {
      default: break;
      case 'r':	 // 2 strings to match.
        if (memcmp(NameR.data()+3, "eturn.i", 7))
          break;
        switch (NameR[10]) {
        default: break;
        case '3':	 // 1 string to match.
          if (NameR[11] != '2')
            break;
          return Intrinsic::eh_return_i32;	 // "h.return.i32"
        case '6':	 // 1 string to match.
          if (NameR[11] != '4')
            break;
          return Intrinsic::eh_return_i64;	 // "h.return.i64"
        }
        break;
      case 't':	 // 1 string to match.
        if (memcmp(NameR.data()+3, "ypeid.for", 9))
          break;
        return Intrinsic::eh_typeid_for;	 // "h.typeid.for"
      }
      break;
    case 13:	 // 2 strings to match.
      if (memcmp(NameR.data()+0, "h.", 2))
        break;
      switch (NameR[2]) {
      default: break;
      case 's':	 // 1 string to match.
        if (memcmp(NameR.data()+3, "jlj.setjmp", 10))
          break;
        return Intrinsic::eh_sjlj_setjmp;	 // "h.sjlj.setjmp"
      case 'u':	 // 1 string to match.
        if (memcmp(NameR.data()+3, "nwind.init", 10))
          break;
        return Intrinsic::eh_unwind_init;	 // "h.unwind.init"
      }
      break;
    case 14:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "h.sjlj.longjmp", 14))
        break;
      return Intrinsic::eh_sjlj_longjmp;	 // "h.sjlj.longjmp"
    case 15:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "h.sjlj.callsite", 15))
        break;
      return Intrinsic::eh_sjlj_callsite;	 // "h.sjlj.callsite"
    case 20:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "xperimental.stackmap", 20))
        break;
      return Intrinsic::experimental_stackmap;	 // "xperimental.stackmap"
    case 22:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "h.sjlj.functioncontext", 22))
        break;
      return Intrinsic::eh_sjlj_functioncontext;	 // "h.sjlj.functioncontext"
    case 26:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "xperimental.patchpoint.i64", 26))
        break;
      return Intrinsic::experimental_patchpoint_i64;	 // "xperimental.patchpoint.i64"
    case 27:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "xperimental.patchpoint.void", 27))
        break;
      return Intrinsic::experimental_patchpoint_void;	 // "xperimental.patchpoint.void"
    }
    break;  // end of 'e' case.
  case 'f':
    if (NameR.startswith("muladd.")) return Intrinsic::fmuladd;
    if (NameR.startswith("ma.")) return Intrinsic::fma;
    if (NameR.startswith("loor.")) return Intrinsic::floor;
    if (NameR.startswith("abs.")) return Intrinsic::fabs;
    switch (NameR.size()) {
    default: break;
    case 9:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "lt.rounds", 9))
        break;
      return Intrinsic::flt_rounds;	 // "lt.rounds"
    case 11:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "rameaddress", 11))
        break;
      return Intrinsic::frameaddress;	 // "rameaddress"
    }
    break;  // end of 'f' case.
  case 'g':
    switch (NameR.size()) {
    default: break;
    case 5:	 // 2 strings to match.
      if (memcmp(NameR.data()+0, "cr", 2))
        break;
      switch (NameR[2]) {
      default: break;
      case 'e':	 // 1 string to match.
        if (memcmp(NameR.data()+3, "ad", 2))
          break;
        return Intrinsic::gcread;	 // "cread"
      case 'o':	 // 1 string to match.
        if (memcmp(NameR.data()+3, "ot", 2))
          break;
        return Intrinsic::gcroot;	 // "croot"
      }
      break;
    case 6:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "cwrite", 6))
        break;
      return Intrinsic::gcwrite;	 // "cwrite"
    }
    break;  // end of 'g' case.
  case 'h':
    switch (NameR.size()) {
    default: break;
    case 12:	 // 2 strings to match.
      if (memcmp(NameR.data()+0, "exagon.", 7))
        break;
      switch (NameR[7]) {
      default: break;
      case 'A':	 // 1 string to match.
        if (memcmp(NameR.data()+8, "2.or", 4))
          break;
        return Intrinsic::hexagon_A2_or;	 // "exagon.A2.or"
      case 'C':	 // 1 string to match.
        if (memcmp(NameR.data()+8, "2.or", 4))
          break;
        return Intrinsic::hexagon_C2_or;	 // "exagon.C2.or"
      }
      break;
    case 13:	 // 23 strings to match.
      if (memcmp(NameR.data()+0, "exagon.", 7))
        break;
      switch (NameR[7]) {
      default: break;
      case 'A':	 // 13 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 12 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'a':	 // 3 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'b':	 // 1 string to match.
              if (NameR[12] != 's')
                break;
              return Intrinsic::hexagon_A2_abs;	 // "exagon.A2.abs"
            case 'd':	 // 1 string to match.
              if (NameR[12] != 'd')
                break;
              return Intrinsic::hexagon_A2_add;	 // "exagon.A2.add"
            case 'n':	 // 1 string to match.
              if (NameR[12] != 'd')
                break;
              return Intrinsic::hexagon_A2_and;	 // "exagon.A2.and"
            }
            break;
          case 'm':	 // 2 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (NameR[12] != 'x')
                break;
              return Intrinsic::hexagon_A2_max;	 // "exagon.A2.max"
            case 'i':	 // 1 string to match.
              if (NameR[12] != 'n')
                break;
              return Intrinsic::hexagon_A2_min;	 // "exagon.A2.min"
            }
            break;
          case 'n':	 // 2 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'e':	 // 1 string to match.
              if (NameR[12] != 'g')
                break;
              return Intrinsic::hexagon_A2_neg;	 // "exagon.A2.neg"
            case 'o':	 // 1 string to match.
              if (NameR[12] != 't')
                break;
              return Intrinsic::hexagon_A2_not;	 // "exagon.A2.not"
            }
            break;
          case 'o':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "rp", 2))
              break;
            return Intrinsic::hexagon_A2_orp;	 // "exagon.A2.orp"
          case 's':	 // 2 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (NameR[12] != 't')
                break;
              return Intrinsic::hexagon_A2_sat;	 // "exagon.A2.sat"
            case 'u':	 // 1 string to match.
              if (NameR[12] != 'b')
                break;
              return Intrinsic::hexagon_A2_sub;	 // "exagon.A2.sub"
            }
            break;
          case 't':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "fr", 2))
              break;
            return Intrinsic::hexagon_A2_tfr;	 // "exagon.A2.tfr"
          case 'x':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "or", 2))
              break;
            return Intrinsic::hexagon_A2_xor;	 // "exagon.A2.xor"
          }
          break;
        case '4':	 // 1 string to match.
          if (memcmp(NameR.data()+9, ".orn", 4))
            break;
          return Intrinsic::hexagon_A4_orn;	 // "exagon.A4.orn"
        }
        break;
      case 'C':	 // 5 strings to match.
        if (memcmp(NameR.data()+8, "2.", 2))
          break;
        switch (NameR[10]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(NameR.data()+11, "nd", 2))
            break;
          return Intrinsic::hexagon_C2_and;	 // "exagon.C2.and"
        case 'm':	 // 1 string to match.
          if (memcmp(NameR.data()+11, "ux", 2))
            break;
          return Intrinsic::hexagon_C2_mux;	 // "exagon.C2.mux"
        case 'n':	 // 1 string to match.
          if (memcmp(NameR.data()+11, "ot", 2))
            break;
          return Intrinsic::hexagon_C2_not;	 // "exagon.C2.not"
        case 'o':	 // 1 string to match.
          if (memcmp(NameR.data()+11, "rn", 2))
            break;
          return Intrinsic::hexagon_C2_orn;	 // "exagon.C2.orn"
        case 'x':	 // 1 string to match.
          if (memcmp(NameR.data()+11, "or", 2))
            break;
          return Intrinsic::hexagon_C2_xor;	 // "exagon.C2.xor"
        }
        break;
      case 'S':	 // 5 strings to match.
        if (memcmp(NameR.data()+8, "2.c", 3))
          break;
        switch (NameR[11]) {
        default: break;
        case 'l':	 // 3 strings to match.
          switch (NameR[12]) {
          default: break;
          case '0':	 // 1 string to match.
            return Intrinsic::hexagon_S2_cl0;	 // "exagon.S2.cl0"
          case '1':	 // 1 string to match.
            return Intrinsic::hexagon_S2_cl1;	 // "exagon.S2.cl1"
          case 'b':	 // 1 string to match.
            return Intrinsic::hexagon_S2_clb;	 // "exagon.S2.clb"
          }
          break;
        case 't':	 // 2 strings to match.
          switch (NameR[12]) {
          default: break;
          case '0':	 // 1 string to match.
            return Intrinsic::hexagon_S2_ct0;	 // "exagon.S2.ct0"
          case '1':	 // 1 string to match.
            return Intrinsic::hexagon_S2_ct1;	 // "exagon.S2.ct1"
          }
          break;
        }
        break;
      }
      break;
    case 14:	 // 42 strings to match.
      if (memcmp(NameR.data()+0, "exagon.", 7))
        break;
      switch (NameR[7]) {
      default: break;
      case 'A':	 // 26 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 24 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'a':	 // 6 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'b':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "sp", 2))
                break;
              return Intrinsic::hexagon_A2_absp;	 // "exagon.A2.absp"
            case 'd':	 // 2 strings to match.
              if (NameR[12] != 'd')
                break;
              switch (NameR[13]) {
              default: break;
              case 'i':	 // 1 string to match.
                return Intrinsic::hexagon_A2_addi;	 // "exagon.A2.addi"
              case 'p':	 // 1 string to match.
                return Intrinsic::hexagon_A2_addp;	 // "exagon.A2.addp"
              }
              break;
            case 'n':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "dp", 2))
                break;
              return Intrinsic::hexagon_A2_andp;	 // "exagon.A2.andp"
            case 's':	 // 2 strings to match.
              switch (NameR[12]) {
              default: break;
              case 'l':	 // 1 string to match.
                if (NameR[13] != 'h')
                  break;
                return Intrinsic::hexagon_A2_aslh;	 // "exagon.A2.aslh"
              case 'r':	 // 1 string to match.
                if (NameR[13] != 'h')
                  break;
                return Intrinsic::hexagon_A2_asrh;	 // "exagon.A2.asrh"
              }
              break;
            }
            break;
          case 'm':	 // 4 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (NameR[12] != 'x')
                break;
              switch (NameR[13]) {
              default: break;
              case 'p':	 // 1 string to match.
                return Intrinsic::hexagon_A2_maxp;	 // "exagon.A2.maxp"
              case 'u':	 // 1 string to match.
                return Intrinsic::hexagon_A2_maxu;	 // "exagon.A2.maxu"
              }
              break;
            case 'i':	 // 2 strings to match.
              if (NameR[12] != 'n')
                break;
              switch (NameR[13]) {
              default: break;
              case 'p':	 // 1 string to match.
                return Intrinsic::hexagon_A2_minp;	 // "exagon.A2.minp"
              case 'u':	 // 1 string to match.
                return Intrinsic::hexagon_A2_minu;	 // "exagon.A2.minu"
              }
              break;
            }
            break;
          case 'n':	 // 2 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'e':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "gp", 2))
                break;
              return Intrinsic::hexagon_A2_negp;	 // "exagon.A2.negp"
            case 'o':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "tp", 2))
                break;
              return Intrinsic::hexagon_A2_notp;	 // "exagon.A2.notp"
            }
            break;
          case 'o':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "rir", 3))
              break;
            return Intrinsic::hexagon_A2_orir;	 // "exagon.A2.orir"
          case 's':	 // 7 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (NameR[12] != 't')
                break;
              switch (NameR[13]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::hexagon_A2_satb;	 // "exagon.A2.satb"
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_A2_sath;	 // "exagon.A2.sath"
              }
              break;
            case 'u':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "bp", 2))
                break;
              return Intrinsic::hexagon_A2_subp;	 // "exagon.A2.subp"
            case 'w':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "iz", 2))
                break;
              return Intrinsic::hexagon_A2_swiz;	 // "exagon.A2.swiz"
            case 'x':	 // 3 strings to match.
              if (NameR[12] != 't')
                break;
              switch (NameR[13]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::hexagon_A2_sxtb;	 // "exagon.A2.sxtb"
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_A2_sxth;	 // "exagon.A2.sxth"
              case 'w':	 // 1 string to match.
                return Intrinsic::hexagon_A2_sxtw;	 // "exagon.A2.sxtw"
              }
              break;
            }
            break;
          case 't':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "frp", 3))
              break;
            return Intrinsic::hexagon_A2_tfrp;	 // "exagon.A2.tfrp"
          case 'x':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "orp", 3))
              break;
            return Intrinsic::hexagon_A2_xorp;	 // "exagon.A2.xorp"
          case 'z':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "xt", 2))
              break;
            switch (NameR[13]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::hexagon_A2_zxtb;	 // "exagon.A2.zxtb"
            case 'h':	 // 1 string to match.
              return Intrinsic::hexagon_A2_zxth;	 // "exagon.A2.zxth"
            }
            break;
          }
          break;
        case '4':	 // 2 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "ndn", 3))
              break;
            return Intrinsic::hexagon_A4_andn;	 // "exagon.A4.andn"
          case 'o':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "rnp", 3))
              break;
            return Intrinsic::hexagon_A4_ornp;	 // "exagon.A4.ornp"
          }
          break;
        }
        break;
      case 'C':	 // 5 strings to match.
        if (memcmp(NameR.data()+8, "2.", 2))
          break;
        switch (NameR[10]) {
        default: break;
        case 'a':	 // 3 strings to match.
          switch (NameR[11]) {
          default: break;
          case 'l':	 // 1 string to match.
            if (memcmp(NameR.data()+12, "l8", 2))
              break;
            return Intrinsic::hexagon_C2_all8;	 // "exagon.C2.all8"
          case 'n':	 // 2 strings to match.
            switch (NameR[12]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (NameR[13] != 'n')
                break;
              return Intrinsic::hexagon_C2_andn;	 // "exagon.C2.andn"
            case 'y':	 // 1 string to match.
              if (NameR[13] != '8')
                break;
              return Intrinsic::hexagon_C2_any8;	 // "exagon.C2.any8"
            }
            break;
          }
          break;
        case 'm':	 // 1 string to match.
          if (memcmp(NameR.data()+11, "ask", 3))
            break;
          return Intrinsic::hexagon_C2_mask;	 // "exagon.C2.mask"
        case 'v':	 // 1 string to match.
          if (memcmp(NameR.data()+11, "mux", 3))
            break;
          return Intrinsic::hexagon_C2_vmux;	 // "exagon.C2.vmux"
        }
        break;
      case 'M':	 // 3 strings to match.
        if (memcmp(NameR.data()+8, "2.", 2))
          break;
        switch (NameR[10]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(NameR.data()+11, "cci", 3))
            break;
          return Intrinsic::hexagon_M2_acci;	 // "exagon.M2.acci"
        case 'm':	 // 2 strings to match.
          switch (NameR[11]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(NameR.data()+12, "ci", 2))
              break;
            return Intrinsic::hexagon_M2_maci;	 // "exagon.M2.maci"
          case 'p':	 // 1 string to match.
            if (memcmp(NameR.data()+12, "yi", 2))
              break;
            return Intrinsic::hexagon_M2_mpyi;	 // "exagon.M2.mpyi"
          }
          break;
        }
        break;
      case 'S':	 // 8 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 7 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'b':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "rev", 3))
              break;
            return Intrinsic::hexagon_S2_brev;	 // "exagon.S2.brev"
          case 'c':	 // 5 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'l':	 // 3 strings to match.
              switch (NameR[12]) {
              default: break;
              case '0':	 // 1 string to match.
                if (NameR[13] != 'p')
                  break;
                return Intrinsic::hexagon_S2_cl0p;	 // "exagon.S2.cl0p"
              case '1':	 // 1 string to match.
                if (NameR[13] != 'p')
                  break;
                return Intrinsic::hexagon_S2_cl1p;	 // "exagon.S2.cl1p"
              case 'b':	 // 1 string to match.
                if (NameR[13] != 'p')
                  break;
                return Intrinsic::hexagon_S2_clbp;	 // "exagon.S2.clbp"
              }
              break;
            case 't':	 // 2 strings to match.
              switch (NameR[12]) {
              default: break;
              case '0':	 // 1 string to match.
                if (NameR[13] != 'p')
                  break;
                return Intrinsic::hexagon_S2_ct0p;	 // "exagon.S2.ct0p"
              case '1':	 // 1 string to match.
                if (NameR[13] != 'p')
                  break;
                return Intrinsic::hexagon_S2_ct1p;	 // "exagon.S2.ct1p"
              }
              break;
            }
            break;
          case 'l':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "fsp", 3))
              break;
            return Intrinsic::hexagon_S2_lfsp;	 // "exagon.S2.lfsp"
          }
          break;
        case '4':	 // 1 string to match.
          if (memcmp(NameR.data()+9, ".lsli", 5))
            break;
          return Intrinsic::hexagon_S4_lsli;	 // "exagon.S4.lsli"
        }
        break;
      }
      break;
    case 15:	 // 58 strings to match.
      if (memcmp(NameR.data()+0, "exagon.", 7))
        break;
      switch (NameR[7]) {
      default: break;
      case 'A':	 // 27 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 26 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'a':	 // 2 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "dsp", 3))
                break;
              return Intrinsic::hexagon_A2_addsp;	 // "exagon.A2.addsp"
            case 'n':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "dir", 3))
                break;
              return Intrinsic::hexagon_A2_andir;	 // "exagon.A2.andir"
            }
            break;
          case 'm':	 // 2 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "xup", 3))
                break;
              return Intrinsic::hexagon_A2_maxup;	 // "exagon.A2.maxup"
            case 'i':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "nup", 3))
                break;
              return Intrinsic::hexagon_A2_minup;	 // "exagon.A2.minup"
            }
            break;
          case 's':	 // 3 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "tu", 2))
                break;
              switch (NameR[14]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::hexagon_A2_satub;	 // "exagon.A2.satub"
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_A2_satuh;	 // "exagon.A2.satuh"
              }
              break;
            case 'u':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "bri", 3))
                break;
              return Intrinsic::hexagon_A2_subri;	 // "exagon.A2.subri"
            }
            break;
          case 't':	 // 4 strings to match.
            if (memcmp(NameR.data()+11, "fr", 2))
              break;
            switch (NameR[13]) {
            default: break;
            case 'i':	 // 2 strings to match.
              switch (NameR[14]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_A2_tfrih;	 // "exagon.A2.tfrih"
              case 'l':	 // 1 string to match.
                return Intrinsic::hexagon_A2_tfril;	 // "exagon.A2.tfril"
              }
              break;
            case 'p':	 // 1 string to match.
              if (NameR[14] != 'i')
                break;
              return Intrinsic::hexagon_A2_tfrpi;	 // "exagon.A2.tfrpi"
            case 's':	 // 1 string to match.
              if (NameR[14] != 'i')
                break;
              return Intrinsic::hexagon_A2_tfrsi;	 // "exagon.A2.tfrsi"
            }
            break;
          case 'v':	 // 15 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'a':	 // 6 strings to match.
              switch (NameR[12]) {
              default: break;
              case 'b':	 // 2 strings to match.
                if (NameR[13] != 's')
                  break;
                switch (NameR[14]) {
                default: break;
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vabsh;	 // "exagon.A2.vabsh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vabsw;	 // "exagon.A2.vabsw"
                }
                break;
              case 'd':	 // 2 strings to match.
                if (NameR[13] != 'd')
                  break;
                switch (NameR[14]) {
                default: break;
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vaddh;	 // "exagon.A2.vaddh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vaddw;	 // "exagon.A2.vaddw"
                }
                break;
              case 'v':	 // 2 strings to match.
                if (NameR[13] != 'g')
                  break;
                switch (NameR[14]) {
                default: break;
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vavgh;	 // "exagon.A2.vavgh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vavgw;	 // "exagon.A2.vavgw"
                }
                break;
              }
              break;
            case 'c':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "onj", 3))
                break;
              return Intrinsic::hexagon_A2_vconj;	 // "exagon.A2.vconj"
            case 'm':	 // 6 strings to match.
              switch (NameR[12]) {
              default: break;
              case 'a':	 // 3 strings to match.
                if (NameR[13] != 'x')
                  break;
                switch (NameR[14]) {
                default: break;
                case 'b':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vmaxb;	 // "exagon.A2.vmaxb"
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vmaxh;	 // "exagon.A2.vmaxh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vmaxw;	 // "exagon.A2.vmaxw"
                }
                break;
              case 'i':	 // 3 strings to match.
                if (NameR[13] != 'n')
                  break;
                switch (NameR[14]) {
                default: break;
                case 'b':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vminb;	 // "exagon.A2.vminb"
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vminh;	 // "exagon.A2.vminh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vminw;	 // "exagon.A2.vminw"
                }
                break;
              }
              break;
            case 's':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "ub", 2))
                break;
              switch (NameR[14]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_A2_vsubh;	 // "exagon.A2.vsubh"
              case 'w':	 // 1 string to match.
                return Intrinsic::hexagon_A2_vsubw;	 // "exagon.A2.vsubw"
              }
              break;
            }
            break;
          }
          break;
        case '4':	 // 1 string to match.
          if (memcmp(NameR.data()+9, ".andnp", 6))
            break;
          return Intrinsic::hexagon_A4_andnp;	 // "exagon.A4.andnp"
        }
        break;
      case 'C':	 // 9 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 8 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'c':	 // 3 strings to match.
            if (memcmp(NameR.data()+11, "mp", 2))
              break;
            switch (NameR[13]) {
            default: break;
            case 'e':	 // 1 string to match.
              if (NameR[14] != 'q')
                break;
              return Intrinsic::hexagon_C2_cmpeq;	 // "exagon.C2.cmpeq"
            case 'g':	 // 1 string to match.
              if (NameR[14] != 't')
                break;
              return Intrinsic::hexagon_C2_cmpgt;	 // "exagon.C2.cmpgt"
            case 'l':	 // 1 string to match.
              if (NameR[14] != 't')
                break;
              return Intrinsic::hexagon_C2_cmplt;	 // "exagon.C2.cmplt"
            }
            break;
          case 'm':	 // 3 strings to match.
            if (memcmp(NameR.data()+11, "ux", 2))
              break;
            switch (NameR[13]) {
            default: break;
            case 'i':	 // 2 strings to match.
              switch (NameR[14]) {
              default: break;
              case 'i':	 // 1 string to match.
                return Intrinsic::hexagon_C2_muxii;	 // "exagon.C2.muxii"
              case 'r':	 // 1 string to match.
                return Intrinsic::hexagon_C2_muxir;	 // "exagon.C2.muxir"
              }
              break;
            case 'r':	 // 1 string to match.
              if (NameR[14] != 'i')
                break;
              return Intrinsic::hexagon_C2_muxri;	 // "exagon.C2.muxri"
            }
            break;
          case 't':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "fr", 2))
              break;
            switch (NameR[13]) {
            default: break;
            case 'p':	 // 1 string to match.
              if (NameR[14] != 'r')
                break;
              return Intrinsic::hexagon_C2_tfrpr;	 // "exagon.C2.tfrpr"
            case 'r':	 // 1 string to match.
              if (NameR[14] != 'p')
                break;
              return Intrinsic::hexagon_C2_tfrrp;	 // "exagon.C2.tfrrp"
            }
            break;
          }
          break;
        case '4':	 // 1 string to match.
          if (memcmp(NameR.data()+9, ".or.or", 6))
            break;
          return Intrinsic::hexagon_C4_or_or;	 // "exagon.C4.or.or"
        }
        break;
      case 'F':	 // 14 strings to match.
        if (memcmp(NameR.data()+8, "2.", 2))
          break;
        switch (NameR[10]) {
        default: break;
        case 'd':	 // 7 strings to match.
          if (NameR[11] != 'f')
            break;
          switch (NameR[12]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(NameR.data()+13, "dd", 2))
              break;
            return Intrinsic::hexagon_F2_dfadd;	 // "exagon.F2.dfadd"
          case 'f':	 // 2 strings to match.
            if (NameR[13] != 'm')
              break;
            switch (NameR[14]) {
            default: break;
            case 'a':	 // 1 string to match.
              return Intrinsic::hexagon_F2_dffma;	 // "exagon.F2.dffma"
            case 's':	 // 1 string to match.
              return Intrinsic::hexagon_F2_dffms;	 // "exagon.F2.dffms"
            }
            break;
          case 'm':	 // 3 strings to match.
            switch (NameR[13]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (NameR[14] != 'x')
                break;
              return Intrinsic::hexagon_F2_dfmax;	 // "exagon.F2.dfmax"
            case 'i':	 // 1 string to match.
              if (NameR[14] != 'n')
                break;
              return Intrinsic::hexagon_F2_dfmin;	 // "exagon.F2.dfmin"
            case 'p':	 // 1 string to match.
              if (NameR[14] != 'y')
                break;
              return Intrinsic::hexagon_F2_dfmpy;	 // "exagon.F2.dfmpy"
            }
            break;
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+13, "ub", 2))
              break;
            return Intrinsic::hexagon_F2_dfsub;	 // "exagon.F2.dfsub"
          }
          break;
        case 's':	 // 7 strings to match.
          if (NameR[11] != 'f')
            break;
          switch (NameR[12]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(NameR.data()+13, "dd", 2))
              break;
            return Intrinsic::hexagon_F2_sfadd;	 // "exagon.F2.sfadd"
          case 'f':	 // 2 strings to match.
            if (NameR[13] != 'm')
              break;
            switch (NameR[14]) {
            default: break;
            case 'a':	 // 1 string to match.
              return Intrinsic::hexagon_F2_sffma;	 // "exagon.F2.sffma"
            case 's':	 // 1 string to match.
              return Intrinsic::hexagon_F2_sffms;	 // "exagon.F2.sffms"
            }
            break;
          case 'm':	 // 3 strings to match.
            switch (NameR[13]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (NameR[14] != 'x')
                break;
              return Intrinsic::hexagon_F2_sfmax;	 // "exagon.F2.sfmax"
            case 'i':	 // 1 string to match.
              if (NameR[14] != 'n')
                break;
              return Intrinsic::hexagon_F2_sfmin;	 // "exagon.F2.sfmin"
            case 'p':	 // 1 string to match.
              if (NameR[14] != 'y')
                break;
              return Intrinsic::hexagon_F2_sfmpy;	 // "exagon.F2.sfmpy"
            }
            break;
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+13, "ub", 2))
              break;
            return Intrinsic::hexagon_F2_sfsub;	 // "exagon.F2.sfsub"
          }
          break;
        }
        break;
      case 'M':	 // 6 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 4 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "ccii", 4))
              break;
            return Intrinsic::hexagon_M2_accii;	 // "exagon.M2.accii"
          case 'm':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "pyui", 4))
              break;
            return Intrinsic::hexagon_M2_mpyui;	 // "exagon.M2.mpyui"
          case 'n':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "acci", 4))
              break;
            return Intrinsic::hexagon_M2_nacci;	 // "exagon.M2.nacci"
          case 'v':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "mac2", 4))
              break;
            return Intrinsic::hexagon_M2_vmac2;	 // "exagon.M2.vmac2"
          }
          break;
        case '4':	 // 2 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'o':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "r.or", 4))
              break;
            return Intrinsic::hexagon_M4_or_or;	 // "exagon.M4.or.or"
          case 'p':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "mpyw", 4))
              break;
            return Intrinsic::hexagon_M4_pmpyw;	 // "exagon.M4.pmpyw"
          }
          break;
        }
        break;
      case 'S':	 // 1 string to match.
        if (memcmp(NameR.data()+8, "2.brevp", 7))
          break;
        return Intrinsic::hexagon_S2_brevp;	 // "exagon.S2.brevp"
      case 'c':	 // 1 string to match.
        if (memcmp(NameR.data()+8, "irc.ldd", 7))
          break;
        return Intrinsic::hexagon_circ_ldd;	 // "exagon.circ.ldd"
      }
      break;
    case 16:	 // 70 strings to match.
      if (memcmp(NameR.data()+0, "exagon.", 7))
        break;
      switch (NameR[7]) {
      default: break;
      case 'A':	 // 35 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 26 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'a':	 // 2 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'b':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "ssat", 4))
                break;
              return Intrinsic::hexagon_A2_abssat;	 // "exagon.A2.abssat"
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "dsat", 4))
                break;
              return Intrinsic::hexagon_A2_addsat;	 // "exagon.A2.addsat"
            }
            break;
          case 'n':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "egsat", 5))
              break;
            return Intrinsic::hexagon_A2_negsat;	 // "exagon.A2.negsat"
          case 's':	 // 4 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'u':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "bsat", 4))
                break;
              return Intrinsic::hexagon_A2_subsat;	 // "exagon.A2.subsat"
            case 'v':	 // 3 strings to match.
              switch (NameR[12]) {
              default: break;
              case 'a':	 // 2 strings to match.
                switch (NameR[13]) {
                default: break;
                case 'd':	 // 1 string to match.
                  if (memcmp(NameR.data()+14, "dh", 2))
                    break;
                  return Intrinsic::hexagon_A2_svaddh;	 // "exagon.A2.svaddh"
                case 'v':	 // 1 string to match.
                  if (memcmp(NameR.data()+14, "gh", 2))
                    break;
                  return Intrinsic::hexagon_A2_svavgh;	 // "exagon.A2.svavgh"
                }
                break;
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+13, "ubh", 3))
                  break;
                return Intrinsic::hexagon_A2_svsubh;	 // "exagon.A2.svsubh"
              }
              break;
            }
            break;
          case 'v':	 // 19 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'a':	 // 8 strings to match.
              switch (NameR[12]) {
              default: break;
              case 'd':	 // 3 strings to match.
                if (NameR[13] != 'd')
                  break;
                switch (NameR[14]) {
                default: break;
                case 'h':	 // 1 string to match.
                  if (NameR[15] != 's')
                    break;
                  return Intrinsic::hexagon_A2_vaddhs;	 // "exagon.A2.vaddhs"
                case 'u':	 // 1 string to match.
                  if (NameR[15] != 'b')
                    break;
                  return Intrinsic::hexagon_A2_vaddub;	 // "exagon.A2.vaddub"
                case 'w':	 // 1 string to match.
                  if (NameR[15] != 's')
                    break;
                  return Intrinsic::hexagon_A2_vaddws;	 // "exagon.A2.vaddws"
                }
                break;
              case 'v':	 // 5 strings to match.
                if (NameR[13] != 'g')
                  break;
                switch (NameR[14]) {
                default: break;
                case 'h':	 // 1 string to match.
                  if (NameR[15] != 'r')
                    break;
                  return Intrinsic::hexagon_A2_vavghr;	 // "exagon.A2.vavghr"
                case 'u':	 // 3 strings to match.
                  switch (NameR[15]) {
                  default: break;
                  case 'b':	 // 1 string to match.
                    return Intrinsic::hexagon_A2_vavgub;	 // "exagon.A2.vavgub"
                  case 'h':	 // 1 string to match.
                    return Intrinsic::hexagon_A2_vavguh;	 // "exagon.A2.vavguh"
                  case 'w':	 // 1 string to match.
                    return Intrinsic::hexagon_A2_vavguw;	 // "exagon.A2.vavguw"
                  }
                  break;
                case 'w':	 // 1 string to match.
                  if (NameR[15] != 'r')
                    break;
                  return Intrinsic::hexagon_A2_vavgwr;	 // "exagon.A2.vavgwr"
                }
                break;
              }
              break;
            case 'm':	 // 6 strings to match.
              switch (NameR[12]) {
              default: break;
              case 'a':	 // 3 strings to match.
                if (memcmp(NameR.data()+13, "xu", 2))
                  break;
                switch (NameR[15]) {
                default: break;
                case 'b':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vmaxub;	 // "exagon.A2.vmaxub"
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vmaxuh;	 // "exagon.A2.vmaxuh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vmaxuw;	 // "exagon.A2.vmaxuw"
                }
                break;
              case 'i':	 // 3 strings to match.
                if (memcmp(NameR.data()+13, "nu", 2))
                  break;
                switch (NameR[15]) {
                default: break;
                case 'b':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vminub;	 // "exagon.A2.vminub"
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vminuh;	 // "exagon.A2.vminuh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vminuw;	 // "exagon.A2.vminuw"
                }
                break;
              }
              break;
            case 'n':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "avg", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_A2_vnavgh;	 // "exagon.A2.vnavgh"
              case 'w':	 // 1 string to match.
                return Intrinsic::hexagon_A2_vnavgw;	 // "exagon.A2.vnavgw"
              }
              break;
            case 's':	 // 3 strings to match.
              if (memcmp(NameR.data()+12, "ub", 2))
                break;
              switch (NameR[14]) {
              default: break;
              case 'h':	 // 1 string to match.
                if (NameR[15] != 's')
                  break;
                return Intrinsic::hexagon_A2_vsubhs;	 // "exagon.A2.vsubhs"
              case 'u':	 // 1 string to match.
                if (NameR[15] != 'b')
                  break;
                return Intrinsic::hexagon_A2_vsubub;	 // "exagon.A2.vsubub"
              case 'w':	 // 1 string to match.
                if (NameR[15] != 's')
                  break;
                return Intrinsic::hexagon_A2_vsubws;	 // "exagon.A2.vsubws"
              }
              break;
            }
            break;
          }
          break;
        case '4':	 // 9 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'c':	 // 4 strings to match.
            if (memcmp(NameR.data()+11, "mp", 2))
              break;
            switch (NameR[13]) {
            default: break;
            case 'b':	 // 2 strings to match.
              switch (NameR[14]) {
              default: break;
              case 'e':	 // 1 string to match.
                if (NameR[15] != 'q')
                  break;
                return Intrinsic::hexagon_A4_cmpbeq;	 // "exagon.A4.cmpbeq"
              case 'g':	 // 1 string to match.
                if (NameR[15] != 't')
                  break;
                return Intrinsic::hexagon_A4_cmpbgt;	 // "exagon.A4.cmpbgt"
              }
              break;
            case 'h':	 // 2 strings to match.
              switch (NameR[14]) {
              default: break;
              case 'e':	 // 1 string to match.
                if (NameR[15] != 'q')
                  break;
                return Intrinsic::hexagon_A4_cmpheq;	 // "exagon.A4.cmpheq"
              case 'g':	 // 1 string to match.
                if (NameR[15] != 't')
                  break;
                return Intrinsic::hexagon_A4_cmphgt;	 // "exagon.A4.cmphgt"
              }
              break;
            }
            break;
          case 'r':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "cmpeq", 5))
              break;
            return Intrinsic::hexagon_A4_rcmpeq;	 // "exagon.A4.rcmpeq"
          case 'v':	 // 4 strings to match.
            if (memcmp(NameR.data()+11, "rm", 2))
              break;
            switch (NameR[13]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (NameR[14] != 'x')
                break;
              switch (NameR[15]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_A4_vrmaxh;	 // "exagon.A4.vrmaxh"
              case 'w':	 // 1 string to match.
                return Intrinsic::hexagon_A4_vrmaxw;	 // "exagon.A4.vrmaxw"
              }
              break;
            case 'i':	 // 2 strings to match.
              if (NameR[14] != 'n')
                break;
              switch (NameR[15]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_A4_vrminh;	 // "exagon.A4.vrminh"
              case 'w':	 // 1 string to match.
                return Intrinsic::hexagon_A4_vrminw;	 // "exagon.A4.vrminw"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 'C':	 // 12 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 7 strings to match.
          if (memcmp(NameR.data()+9, ".cmp", 4))
            break;
          switch (NameR[13]) {
          default: break;
          case 'e':	 // 2 strings to match.
            if (NameR[14] != 'q')
              break;
            switch (NameR[15]) {
            default: break;
            case 'i':	 // 1 string to match.
              return Intrinsic::hexagon_C2_cmpeqi;	 // "exagon.C2.cmpeqi"
            case 'p':	 // 1 string to match.
              return Intrinsic::hexagon_C2_cmpeqp;	 // "exagon.C2.cmpeqp"
            }
            break;
          case 'g':	 // 4 strings to match.
            switch (NameR[14]) {
            default: break;
            case 'e':	 // 1 string to match.
              if (NameR[15] != 'i')
                break;
              return Intrinsic::hexagon_C2_cmpgei;	 // "exagon.C2.cmpgei"
            case 't':	 // 3 strings to match.
              switch (NameR[15]) {
              default: break;
              case 'i':	 // 1 string to match.
                return Intrinsic::hexagon_C2_cmpgti;	 // "exagon.C2.cmpgti"
              case 'p':	 // 1 string to match.
                return Intrinsic::hexagon_C2_cmpgtp;	 // "exagon.C2.cmpgtp"
              case 'u':	 // 1 string to match.
                return Intrinsic::hexagon_C2_cmpgtu;	 // "exagon.C2.cmpgtu"
              }
              break;
            }
            break;
          case 'l':	 // 1 string to match.
            if (memcmp(NameR.data()+14, "tu", 2))
              break;
            return Intrinsic::hexagon_C2_cmpltu;	 // "exagon.C2.cmpltu"
          }
          break;
        case '4':	 // 5 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "nd.or", 5))
              break;
            return Intrinsic::hexagon_C4_and_or;	 // "exagon.C4.and.or"
          case 'c':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "mp", 2))
              break;
            switch (NameR[13]) {
            default: break;
            case 'l':	 // 1 string to match.
              if (memcmp(NameR.data()+14, "te", 2))
                break;
              return Intrinsic::hexagon_C4_cmplte;	 // "exagon.C4.cmplte"
            case 'n':	 // 1 string to match.
              if (memcmp(NameR.data()+14, "eq", 2))
                break;
              return Intrinsic::hexagon_C4_cmpneq;	 // "exagon.C4.cmpneq"
            }
            break;
          case 'o':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "r.", 2))
              break;
            switch (NameR[13]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(NameR.data()+14, "nd", 2))
                break;
              return Intrinsic::hexagon_C4_or_and;	 // "exagon.C4.or.and"
            case 'o':	 // 1 string to match.
              if (memcmp(NameR.data()+14, "rn", 2))
                break;
              return Intrinsic::hexagon_C4_or_orn;	 // "exagon.C4.or.orn"
            }
            break;
          }
          break;
        }
        break;
      case 'M':	 // 12 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 7 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'm':	 // 4 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "csi", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case 'n':	 // 1 string to match.
                return Intrinsic::hexagon_M2_macsin;	 // "exagon.M2.macsin"
              case 'p':	 // 1 string to match.
                return Intrinsic::hexagon_M2_macsip;	 // "exagon.M2.macsip"
              }
              break;
            case 'p':	 // 2 strings to match.
              if (NameR[12] != 'y')
                break;
              switch (NameR[13]) {
              default: break;
              case '.':	 // 1 string to match.
                if (memcmp(NameR.data()+14, "up", 2))
                  break;
                return Intrinsic::hexagon_M2_mpy_up;	 // "exagon.M2.mpy.up"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+14, "mi", 2))
                  break;
                return Intrinsic::hexagon_M2_mpysmi;	 // "exagon.M2.mpysmi"
              }
              break;
            }
            break;
          case 'n':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "accii", 5))
              break;
            return Intrinsic::hexagon_M2_naccii;	 // "exagon.M2.naccii"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "ubacc", 5))
              break;
            return Intrinsic::hexagon_M2_subacc;	 // "exagon.M2.subacc"
          case 'v':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "raddh", 5))
              break;
            return Intrinsic::hexagon_M2_vraddh;	 // "exagon.M2.vraddh"
          }
          break;
        case '4':	 // 5 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "nd.or", 5))
              break;
            return Intrinsic::hexagon_M4_and_or;	 // "exagon.M4.and.or"
          case 'o':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "r.", 2))
              break;
            switch (NameR[13]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(NameR.data()+14, "nd", 2))
                break;
              return Intrinsic::hexagon_M4_or_and;	 // "exagon.M4.or.and"
            case 'x':	 // 1 string to match.
              if (memcmp(NameR.data()+14, "or", 2))
                break;
              return Intrinsic::hexagon_M4_or_xor;	 // "exagon.M4.or.xor"
            }
            break;
          case 'v':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "pmpyh", 5))
              break;
            return Intrinsic::hexagon_M4_vpmpyh;	 // "exagon.M4.vpmpyh"
          case 'x':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "or.or", 5))
              break;
            return Intrinsic::hexagon_M4_xor_or;	 // "exagon.M4.xor.or"
          }
          break;
        }
        break;
      case 'S':	 // 11 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 9 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'i':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "nsert", 5))
              break;
            return Intrinsic::hexagon_S2_insert;	 // "exagon.S2.insert"
          case 'p':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "ackhl", 5))
              break;
            return Intrinsic::hexagon_S2_packhl;	 // "exagon.S2.packhl"
          case 'v':	 // 7 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'c':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "negh", 4))
                break;
              return Intrinsic::hexagon_S2_vcnegh;	 // "exagon.S2.vcnegh"
            case 's':	 // 4 strings to match.
              switch (NameR[12]) {
              default: break;
              case 'a':	 // 2 strings to match.
                if (NameR[13] != 't')
                  break;
                switch (NameR[14]) {
                default: break;
                case 'h':	 // 1 string to match.
                  if (NameR[15] != 'b')
                    break;
                  return Intrinsic::hexagon_S2_vsathb;	 // "exagon.S2.vsathb"
                case 'w':	 // 1 string to match.
                  if (NameR[15] != 'h')
                    break;
                  return Intrinsic::hexagon_S2_vsatwh;	 // "exagon.S2.vsatwh"
                }
                break;
              case 'x':	 // 2 strings to match.
                if (NameR[13] != 't')
                  break;
                switch (NameR[14]) {
                default: break;
                case 'b':	 // 1 string to match.
                  if (NameR[15] != 'h')
                    break;
                  return Intrinsic::hexagon_S2_vsxtbh;	 // "exagon.S2.vsxtbh"
                case 'h':	 // 1 string to match.
                  if (NameR[15] != 'w')
                    break;
                  return Intrinsic::hexagon_S2_vsxthw;	 // "exagon.S2.vsxthw"
                }
                break;
              }
              break;
            case 'z':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "xt", 2))
                break;
              switch (NameR[14]) {
              default: break;
              case 'b':	 // 1 string to match.
                if (NameR[15] != 'h')
                  break;
                return Intrinsic::hexagon_S2_vzxtbh;	 // "exagon.S2.vzxtbh"
              case 'h':	 // 1 string to match.
                if (NameR[15] != 'w')
                  break;
                return Intrinsic::hexagon_S2_vzxthw;	 // "exagon.S2.vzxthw"
              }
              break;
            }
            break;
          }
          break;
        case '4':	 // 2 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'o':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "r.ori", 5))
              break;
            return Intrinsic::hexagon_S4_or_ori;	 // "exagon.S4.or.ori"
          case 'p':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "arity", 5))
              break;
            return Intrinsic::hexagon_S4_parity;	 // "exagon.S4.parity"
          }
          break;
        }
        break;
      }
      break;
    case 17:	 // 103 strings to match.
      if (memcmp(NameR.data()+0, "exagon.", 7))
        break;
      switch (NameR[7]) {
      default: break;
      case 'A':	 // 36 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 23 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "ddpsat", 6))
              break;
            return Intrinsic::hexagon_A2_addpsat;	 // "exagon.A2.addpsat"
          case 's':	 // 4 strings to match.
            if (NameR[11] != 'v')
              break;
            switch (NameR[12]) {
            default: break;
            case 'a':	 // 2 strings to match.
              switch (NameR[13]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+14, "dhs", 3))
                  break;
                return Intrinsic::hexagon_A2_svaddhs;	 // "exagon.A2.svaddhs"
              case 'v':	 // 1 string to match.
                if (memcmp(NameR.data()+14, "ghs", 3))
                  break;
                return Intrinsic::hexagon_A2_svavghs;	 // "exagon.A2.svavghs"
              }
              break;
            case 'n':	 // 1 string to match.
              if (memcmp(NameR.data()+13, "avgh", 4))
                break;
              return Intrinsic::hexagon_A2_svnavgh;	 // "exagon.A2.svnavgh"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+13, "ubhs", 4))
                break;
              return Intrinsic::hexagon_A2_svsubhs;	 // "exagon.A2.svsubhs"
            }
            break;
          case 'v':	 // 18 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'a':	 // 7 strings to match.
              switch (NameR[12]) {
              default: break;
              case 'd':	 // 2 strings to match.
                if (memcmp(NameR.data()+13, "du", 2))
                  break;
                switch (NameR[15]) {
                default: break;
                case 'b':	 // 1 string to match.
                  if (NameR[16] != 's')
                    break;
                  return Intrinsic::hexagon_A2_vaddubs;	 // "exagon.A2.vaddubs"
                case 'h':	 // 1 string to match.
                  if (NameR[16] != 's')
                    break;
                  return Intrinsic::hexagon_A2_vadduhs;	 // "exagon.A2.vadduhs"
                }
                break;
              case 'v':	 // 5 strings to match.
                if (NameR[13] != 'g')
                  break;
                switch (NameR[14]) {
                default: break;
                case 'h':	 // 1 string to match.
                  if (memcmp(NameR.data()+15, "cr", 2))
                    break;
                  return Intrinsic::hexagon_A2_vavghcr;	 // "exagon.A2.vavghcr"
                case 'u':	 // 3 strings to match.
                  switch (NameR[15]) {
                  default: break;
                  case 'b':	 // 1 string to match.
                    if (NameR[16] != 'r')
                      break;
                    return Intrinsic::hexagon_A2_vavgubr;	 // "exagon.A2.vavgubr"
                  case 'h':	 // 1 string to match.
                    if (NameR[16] != 'r')
                      break;
                    return Intrinsic::hexagon_A2_vavguhr;	 // "exagon.A2.vavguhr"
                  case 'w':	 // 1 string to match.
                    if (NameR[16] != 'r')
                      break;
                    return Intrinsic::hexagon_A2_vavguwr;	 // "exagon.A2.vavguwr"
                  }
                  break;
                case 'w':	 // 1 string to match.
                  if (memcmp(NameR.data()+15, "cr", 2))
                    break;
                  return Intrinsic::hexagon_A2_vavgwcr;	 // "exagon.A2.vavgwcr"
                }
                break;
              }
              break;
            case 'c':	 // 5 strings to match.
              if (memcmp(NameR.data()+12, "mp", 2))
                break;
              switch (NameR[14]) {
              default: break;
              case 'b':	 // 1 string to match.
                if (memcmp(NameR.data()+15, "eq", 2))
                  break;
                return Intrinsic::hexagon_A2_vcmpbeq;	 // "exagon.A2.vcmpbeq"
              case 'h':	 // 2 strings to match.
                switch (NameR[15]) {
                default: break;
                case 'e':	 // 1 string to match.
                  if (NameR[16] != 'q')
                    break;
                  return Intrinsic::hexagon_A2_vcmpheq;	 // "exagon.A2.vcmpheq"
                case 'g':	 // 1 string to match.
                  if (NameR[16] != 't')
                    break;
                  return Intrinsic::hexagon_A2_vcmphgt;	 // "exagon.A2.vcmphgt"
                }
                break;
              case 'w':	 // 2 strings to match.
                switch (NameR[15]) {
                default: break;
                case 'e':	 // 1 string to match.
                  if (NameR[16] != 'q')
                    break;
                  return Intrinsic::hexagon_A2_vcmpweq;	 // "exagon.A2.vcmpweq"
                case 'g':	 // 1 string to match.
                  if (NameR[16] != 't')
                    break;
                  return Intrinsic::hexagon_A2_vcmpwgt;	 // "exagon.A2.vcmpwgt"
                }
                break;
              }
              break;
            case 'n':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "avg", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case 'h':	 // 1 string to match.
                if (NameR[16] != 'r')
                  break;
                return Intrinsic::hexagon_A2_vnavghr;	 // "exagon.A2.vnavghr"
              case 'w':	 // 1 string to match.
                if (NameR[16] != 'r')
                  break;
                return Intrinsic::hexagon_A2_vnavgwr;	 // "exagon.A2.vnavgwr"
              }
              break;
            case 'r':	 // 2 strings to match.
              switch (NameR[12]) {
              default: break;
              case 'a':	 // 1 string to match.
                if (memcmp(NameR.data()+13, "ddub", 4))
                  break;
                return Intrinsic::hexagon_A2_vraddub;	 // "exagon.A2.vraddub"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+13, "adub", 4))
                  break;
                return Intrinsic::hexagon_A2_vrsadub;	 // "exagon.A2.vrsadub"
              }
              break;
            case 's':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "ubu", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case 'b':	 // 1 string to match.
                if (NameR[16] != 's')
                  break;
                return Intrinsic::hexagon_A2_vsububs;	 // "exagon.A2.vsububs"
              case 'h':	 // 1 string to match.
                if (NameR[16] != 's')
                  break;
                return Intrinsic::hexagon_A2_vsubuhs;	 // "exagon.A2.vsubuhs"
              }
              break;
            }
            break;
          }
          break;
        case '4':	 // 13 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'c':	 // 6 strings to match.
            if (memcmp(NameR.data()+11, "mp", 2))
              break;
            switch (NameR[13]) {
            default: break;
            case 'b':	 // 3 strings to match.
              switch (NameR[14]) {
              default: break;
              case 'e':	 // 1 string to match.
                if (memcmp(NameR.data()+15, "qi", 2))
                  break;
                return Intrinsic::hexagon_A4_cmpbeqi;	 // "exagon.A4.cmpbeqi"
              case 'g':	 // 2 strings to match.
                if (NameR[15] != 't')
                  break;
                switch (NameR[16]) {
                default: break;
                case 'i':	 // 1 string to match.
                  return Intrinsic::hexagon_A4_cmpbgti;	 // "exagon.A4.cmpbgti"
                case 'u':	 // 1 string to match.
                  return Intrinsic::hexagon_A4_cmpbgtu;	 // "exagon.A4.cmpbgtu"
                }
                break;
              }
              break;
            case 'h':	 // 3 strings to match.
              switch (NameR[14]) {
              default: break;
              case 'e':	 // 1 string to match.
                if (memcmp(NameR.data()+15, "qi", 2))
                  break;
                return Intrinsic::hexagon_A4_cmpheqi;	 // "exagon.A4.cmpheqi"
              case 'g':	 // 2 strings to match.
                if (NameR[15] != 't')
                  break;
                switch (NameR[16]) {
                default: break;
                case 'i':	 // 1 string to match.
                  return Intrinsic::hexagon_A4_cmphgti;	 // "exagon.A4.cmphgti"
                case 'u':	 // 1 string to match.
                  return Intrinsic::hexagon_A4_cmphgtu;	 // "exagon.A4.cmphgtu"
                }
                break;
              }
              break;
            }
            break;
          case 'r':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "cmp", 3))
              break;
            switch (NameR[14]) {
            default: break;
            case 'e':	 // 1 string to match.
              if (memcmp(NameR.data()+15, "qi", 2))
                break;
              return Intrinsic::hexagon_A4_rcmpeqi;	 // "exagon.A4.rcmpeqi"
            case 'n':	 // 1 string to match.
              if (memcmp(NameR.data()+15, "eq", 2))
                break;
              return Intrinsic::hexagon_A4_rcmpneq;	 // "exagon.A4.rcmpneq"
            }
            break;
          case 'v':	 // 5 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'c':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "mpbgt", 5))
                break;
              return Intrinsic::hexagon_A4_vcmpbgt;	 // "exagon.A4.vcmpbgt"
            case 'r':	 // 4 strings to match.
              if (NameR[12] != 'm')
                break;
              switch (NameR[13]) {
              default: break;
              case 'a':	 // 2 strings to match.
                if (memcmp(NameR.data()+14, "xu", 2))
                  break;
                switch (NameR[16]) {
                default: break;
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_A4_vrmaxuh;	 // "exagon.A4.vrmaxuh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::hexagon_A4_vrmaxuw;	 // "exagon.A4.vrmaxuw"
                }
                break;
              case 'i':	 // 2 strings to match.
                if (memcmp(NameR.data()+14, "nu", 2))
                  break;
                switch (NameR[16]) {
                default: break;
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_A4_vrminuh;	 // "exagon.A4.vrminuh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::hexagon_A4_vrminuw;	 // "exagon.A4.vrminuw"
                }
                break;
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 'C':	 // 12 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 6 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'b':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "its", 3))
              break;
            switch (NameR[14]) {
            default: break;
            case 'c':	 // 1 string to match.
              if (memcmp(NameR.data()+15, "lr", 2))
                break;
              return Intrinsic::hexagon_C2_bitsclr;	 // "exagon.C2.bitsclr"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+15, "et", 2))
                break;
              return Intrinsic::hexagon_C2_bitsset;	 // "exagon.C2.bitsset"
            }
            break;
          case 'c':	 // 3 strings to match.
            if (memcmp(NameR.data()+11, "mpg", 3))
              break;
            switch (NameR[14]) {
            default: break;
            case 'e':	 // 1 string to match.
              if (memcmp(NameR.data()+15, "ui", 2))
                break;
              return Intrinsic::hexagon_C2_cmpgeui;	 // "exagon.C2.cmpgeui"
            case 't':	 // 2 strings to match.
              if (NameR[15] != 'u')
                break;
              switch (NameR[16]) {
              default: break;
              case 'i':	 // 1 string to match.
                return Intrinsic::hexagon_C2_cmpgtui;	 // "exagon.C2.cmpgtui"
              case 'p':	 // 1 string to match.
                return Intrinsic::hexagon_C2_cmpgtup;	 // "exagon.C2.cmpgtup"
              }
              break;
            }
            break;
          case 'v':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "itpack", 6))
              break;
            return Intrinsic::hexagon_C2_vitpack;	 // "exagon.C2.vitpack"
          }
          break;
        case '4':	 // 6 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "nd.", 3))
              break;
            switch (NameR[14]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(NameR.data()+15, "nd", 2))
                break;
              return Intrinsic::hexagon_C4_and_and;	 // "exagon.C4.and.and"
            case 'o':	 // 1 string to match.
              if (memcmp(NameR.data()+15, "rn", 2))
                break;
              return Intrinsic::hexagon_C4_and_orn;	 // "exagon.C4.and.orn"
            }
            break;
          case 'c':	 // 3 strings to match.
            if (memcmp(NameR.data()+11, "mp", 2))
              break;
            switch (NameR[13]) {
            default: break;
            case 'l':	 // 2 strings to match.
              if (memcmp(NameR.data()+14, "te", 2))
                break;
              switch (NameR[16]) {
              default: break;
              case 'i':	 // 1 string to match.
                return Intrinsic::hexagon_C4_cmpltei;	 // "exagon.C4.cmpltei"
              case 'u':	 // 1 string to match.
                return Intrinsic::hexagon_C4_cmplteu;	 // "exagon.C4.cmplteu"
              }
              break;
            case 'n':	 // 1 string to match.
              if (memcmp(NameR.data()+14, "eqi", 3))
                break;
              return Intrinsic::hexagon_C4_cmpneqi;	 // "exagon.C4.cmpneqi"
            }
            break;
          case 'o':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "r.andn", 6))
              break;
            return Intrinsic::hexagon_C4_or_andn;	 // "exagon.C4.or.andn"
          }
          break;
        }
        break;
      case 'F':	 // 14 strings to match.
        if (memcmp(NameR.data()+8, "2.", 2))
          break;
        switch (NameR[10]) {
        default: break;
        case 'd':	 // 7 strings to match.
          if (NameR[11] != 'f')
            break;
          switch (NameR[12]) {
          default: break;
          case 'c':	 // 5 strings to match.
            switch (NameR[13]) {
            default: break;
            case 'l':	 // 1 string to match.
              if (memcmp(NameR.data()+14, "ass", 3))
                break;
              return Intrinsic::hexagon_F2_dfclass;	 // "exagon.F2.dfclass"
            case 'm':	 // 4 strings to match.
              if (NameR[14] != 'p')
                break;
              switch (NameR[15]) {
              default: break;
              case 'e':	 // 1 string to match.
                if (NameR[16] != 'q')
                  break;
                return Intrinsic::hexagon_F2_dfcmpeq;	 // "exagon.F2.dfcmpeq"
              case 'g':	 // 2 strings to match.
                switch (NameR[16]) {
                default: break;
                case 'e':	 // 1 string to match.
                  return Intrinsic::hexagon_F2_dfcmpge;	 // "exagon.F2.dfcmpge"
                case 't':	 // 1 string to match.
                  return Intrinsic::hexagon_F2_dfcmpgt;	 // "exagon.F2.dfcmpgt"
                }
                break;
              case 'u':	 // 1 string to match.
                if (NameR[16] != 'o')
                  break;
                return Intrinsic::hexagon_F2_dfcmpuo;	 // "exagon.F2.dfcmpuo"
              }
              break;
            }
            break;
          case 'i':	 // 2 strings to match.
            if (memcmp(NameR.data()+13, "mm.", 3))
              break;
            switch (NameR[16]) {
            default: break;
            case 'n':	 // 1 string to match.
              return Intrinsic::hexagon_F2_dfimm_n;	 // "exagon.F2.dfimm.n"
            case 'p':	 // 1 string to match.
              return Intrinsic::hexagon_F2_dfimm_p;	 // "exagon.F2.dfimm.p"
            }
            break;
          }
          break;
        case 's':	 // 7 strings to match.
          if (NameR[11] != 'f')
            break;
          switch (NameR[12]) {
          default: break;
          case 'c':	 // 5 strings to match.
            switch (NameR[13]) {
            default: break;
            case 'l':	 // 1 string to match.
              if (memcmp(NameR.data()+14, "ass", 3))
                break;
              return Intrinsic::hexagon_F2_sfclass;	 // "exagon.F2.sfclass"
            case 'm':	 // 4 strings to match.
              if (NameR[14] != 'p')
                break;
              switch (NameR[15]) {
              default: break;
              case 'e':	 // 1 string to match.
                if (NameR[16] != 'q')
                  break;
                return Intrinsic::hexagon_F2_sfcmpeq;	 // "exagon.F2.sfcmpeq"
              case 'g':	 // 2 strings to match.
                switch (NameR[16]) {
                default: break;
                case 'e':	 // 1 string to match.
                  return Intrinsic::hexagon_F2_sfcmpge;	 // "exagon.F2.sfcmpge"
                case 't':	 // 1 string to match.
                  return Intrinsic::hexagon_F2_sfcmpgt;	 // "exagon.F2.sfcmpgt"
                }
                break;
              case 'u':	 // 1 string to match.
                if (NameR[16] != 'o')
                  break;
                return Intrinsic::hexagon_F2_sfcmpuo;	 // "exagon.F2.sfcmpuo"
              }
              break;
            }
            break;
          case 'i':	 // 2 strings to match.
            if (memcmp(NameR.data()+13, "mm.", 3))
              break;
            switch (NameR[16]) {
            default: break;
            case 'n':	 // 1 string to match.
              return Intrinsic::hexagon_F2_sfimm_n;	 // "exagon.F2.sfimm.n"
            case 'p':	 // 1 string to match.
              return Intrinsic::hexagon_F2_sfimm_p;	 // "exagon.F2.sfimm.p"
            }
            break;
          }
          break;
        }
        break;
      case 'M':	 // 11 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 3 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'm':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "pyu.up", 6))
              break;
            return Intrinsic::hexagon_M2_mpyu_up;	 // "exagon.M2.mpyu.up"
          case 'v':	 // 2 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'm':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "ac2es", 5))
                break;
              return Intrinsic::hexagon_M2_vmac2es;	 // "exagon.M2.vmac2es"
            case 'r':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "adduh", 5))
                break;
              return Intrinsic::hexagon_M2_vradduh;	 // "exagon.M2.vradduh"
            }
            break;
          }
          break;
        case '4':	 // 4 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "nd.", 3))
              break;
            switch (NameR[14]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(NameR.data()+15, "nd", 2))
                break;
              return Intrinsic::hexagon_M4_and_and;	 // "exagon.M4.and.and"
            case 'x':	 // 1 string to match.
              if (memcmp(NameR.data()+15, "or", 2))
                break;
              return Intrinsic::hexagon_M4_and_xor;	 // "exagon.M4.and.xor"
            }
            break;
          case 'o':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "r.andn", 6))
              break;
            return Intrinsic::hexagon_M4_or_andn;	 // "exagon.M4.or.andn"
          case 'x':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "or.and", 6))
              break;
            return Intrinsic::hexagon_M4_xor_and;	 // "exagon.M4.xor.and"
          }
          break;
        case '5':	 // 4 strings to match.
          if (memcmp(NameR.data()+9, ".vm", 3))
            break;
          switch (NameR[12]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (memcmp(NameR.data()+13, "cb", 2))
              break;
            switch (NameR[15]) {
            default: break;
            case 's':	 // 1 string to match.
              if (NameR[16] != 'u')
                break;
              return Intrinsic::hexagon_M5_vmacbsu;	 // "exagon.M5.vmacbsu"
            case 'u':	 // 1 string to match.
              if (NameR[16] != 'u')
                break;
              return Intrinsic::hexagon_M5_vmacbuu;	 // "exagon.M5.vmacbuu"
            }
            break;
          case 'p':	 // 2 strings to match.
            if (memcmp(NameR.data()+13, "yb", 2))
              break;
            switch (NameR[15]) {
            default: break;
            case 's':	 // 1 string to match.
              if (NameR[16] != 'u')
                break;
              return Intrinsic::hexagon_M5_vmpybsu;	 // "exagon.M5.vmpybsu"
            case 'u':	 // 1 string to match.
              if (NameR[16] != 'u')
                break;
              return Intrinsic::hexagon_M5_vmpybuu;	 // "exagon.M5.vmpybuu"
            }
            break;
          }
          break;
        }
        break;
      case 'S':	 // 30 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 25 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'a':	 // 8 strings to match.
            if (NameR[11] != 's')
              break;
            switch (NameR[12]) {
            default: break;
            case 'l':	 // 4 strings to match.
              if (NameR[13] != '.')
                break;
              switch (NameR[14]) {
              default: break;
              case 'i':	 // 2 strings to match.
                if (NameR[15] != '.')
                  break;
                switch (NameR[16]) {
                default: break;
                case 'p':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_asl_i_p;	 // "exagon.S2.asl.i.p"
                case 'r':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_asl_i_r;	 // "exagon.S2.asl.i.r"
                }
                break;
              case 'r':	 // 2 strings to match.
                if (NameR[15] != '.')
                  break;
                switch (NameR[16]) {
                default: break;
                case 'p':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_asl_r_p;	 // "exagon.S2.asl.r.p"
                case 'r':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_asl_r_r;	 // "exagon.S2.asl.r.r"
                }
                break;
              }
              break;
            case 'r':	 // 4 strings to match.
              if (NameR[13] != '.')
                break;
              switch (NameR[14]) {
              default: break;
              case 'i':	 // 2 strings to match.
                if (NameR[15] != '.')
                  break;
                switch (NameR[16]) {
                default: break;
                case 'p':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_asr_i_p;	 // "exagon.S2.asr.i.p"
                case 'r':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_asr_i_r;	 // "exagon.S2.asr.i.r"
                }
                break;
              case 'r':	 // 2 strings to match.
                if (NameR[15] != '.')
                  break;
                switch (NameR[16]) {
                default: break;
                case 'p':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_asr_r_p;	 // "exagon.S2.asr.r.p"
                case 'r':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_asr_r_r;	 // "exagon.S2.asr.r.r"
                }
                break;
              }
              break;
            }
            break;
          case 'c':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "lbnorm", 6))
              break;
            return Intrinsic::hexagon_S2_clbnorm;	 // "exagon.S2.clbnorm"
          case 'i':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "nsertp", 6))
              break;
            return Intrinsic::hexagon_S2_insertp;	 // "exagon.S2.insertp"
          case 'l':	 // 6 strings to match.
            if (NameR[11] != 's')
              break;
            switch (NameR[12]) {
            default: break;
            case 'l':	 // 2 strings to match.
              if (memcmp(NameR.data()+13, ".r.", 3))
                break;
              switch (NameR[16]) {
              default: break;
              case 'p':	 // 1 string to match.
                return Intrinsic::hexagon_S2_lsl_r_p;	 // "exagon.S2.lsl.r.p"
              case 'r':	 // 1 string to match.
                return Intrinsic::hexagon_S2_lsl_r_r;	 // "exagon.S2.lsl.r.r"
              }
              break;
            case 'r':	 // 4 strings to match.
              if (NameR[13] != '.')
                break;
              switch (NameR[14]) {
              default: break;
              case 'i':	 // 2 strings to match.
                if (NameR[15] != '.')
                  break;
                switch (NameR[16]) {
                default: break;
                case 'p':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_lsr_i_p;	 // "exagon.S2.lsr.i.p"
                case 'r':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_lsr_i_r;	 // "exagon.S2.lsr.i.r"
                }
                break;
              case 'r':	 // 2 strings to match.
                if (NameR[15] != '.')
                  break;
                switch (NameR[16]) {
                default: break;
                case 'p':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_lsr_r_p;	 // "exagon.S2.lsr.r.p"
                case 'r':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_lsr_r_r;	 // "exagon.S2.lsr.r.r"
                }
                break;
              }
              break;
            }
            break;
          case 'p':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "arityp", 6))
              break;
            return Intrinsic::hexagon_S2_parityp;	 // "exagon.S2.parityp"
          case 's':	 // 5 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'h':	 // 4 strings to match.
              if (memcmp(NameR.data()+12, "uff", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case 'e':	 // 2 strings to match.
                switch (NameR[16]) {
                default: break;
                case 'b':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_shuffeb;	 // "exagon.S2.shuffeb"
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_shuffeh;	 // "exagon.S2.shuffeh"
                }
                break;
              case 'o':	 // 2 strings to match.
                switch (NameR[16]) {
                default: break;
                case 'b':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_shuffob;	 // "exagon.S2.shuffob"
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_shuffoh;	 // "exagon.S2.shuffoh"
                }
                break;
              }
              break;
            case 'v':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "sathb", 5))
                break;
              return Intrinsic::hexagon_S2_svsathb;	 // "exagon.S2.svsathb"
            }
            break;
          case 'v':	 // 3 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'r':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "cnegh", 5))
                break;
              return Intrinsic::hexagon_S2_vrcnegh;	 // "exagon.S2.vrcnegh"
            case 's':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "at", 2))
                break;
              switch (NameR[14]) {
              default: break;
              case 'h':	 // 1 string to match.
                if (memcmp(NameR.data()+15, "ub", 2))
                  break;
                return Intrinsic::hexagon_S2_vsathub;	 // "exagon.S2.vsathub"
              case 'w':	 // 1 string to match.
                if (memcmp(NameR.data()+15, "uh", 2))
                  break;
                return Intrinsic::hexagon_S2_vsatwuh;	 // "exagon.S2.vsatwuh"
              }
              break;
            }
            break;
          }
          break;
        case '4':	 // 5 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "ddaddi", 6))
              break;
            return Intrinsic::hexagon_S4_addaddi;	 // "exagon.S4.addaddi"
          case 'c':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "lbaddi", 6))
              break;
            return Intrinsic::hexagon_S4_clbaddi;	 // "exagon.S4.clbaddi"
          case 'e':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "xtract", 6))
              break;
            return Intrinsic::hexagon_S4_extract;	 // "exagon.S4.extract"
          case 'o':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "r.andi", 6))
              break;
            return Intrinsic::hexagon_S4_or_andi;	 // "exagon.S4.or.andi"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "ubaddi", 6))
              break;
            return Intrinsic::hexagon_S4_subaddi;	 // "exagon.S4.subaddi"
          }
          break;
        }
        break;
      }
      break;
    case 18:	 // 103 strings to match.
      if (memcmp(NameR.data()+0, "exagon.", 7))
        break;
      switch (NameR[7]) {
      default: break;
      case 'A':	 // 26 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 11 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'c':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "ombinew", 7))
              break;
            return Intrinsic::hexagon_A2_combinew;	 // "exagon.A2.combinew"
          case 'r':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "oundsat", 7))
              break;
            return Intrinsic::hexagon_A2_roundsat;	 // "exagon.A2.roundsat"
          case 's':	 // 2 strings to match.
            if (NameR[11] != 'v')
              break;
            switch (NameR[12]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(NameR.data()+13, "dduhs", 5))
                break;
              return Intrinsic::hexagon_A2_svadduhs;	 // "exagon.A2.svadduhs"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+13, "ubuhs", 5))
                break;
              return Intrinsic::hexagon_A2_svsubuhs;	 // "exagon.A2.svsubuhs"
            }
            break;
          case 'v':	 // 7 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "bs", 2))
                break;
              switch (NameR[14]) {
              default: break;
              case 'h':	 // 1 string to match.
                if (memcmp(NameR.data()+15, "sat", 3))
                  break;
                return Intrinsic::hexagon_A2_vabshsat;	 // "exagon.A2.vabshsat"
              case 'w':	 // 1 string to match.
                if (memcmp(NameR.data()+15, "sat", 3))
                  break;
                return Intrinsic::hexagon_A2_vabswsat;	 // "exagon.A2.vabswsat"
              }
              break;
            case 'c':	 // 3 strings to match.
              if (memcmp(NameR.data()+12, "mp", 2))
                break;
              switch (NameR[14]) {
              default: break;
              case 'b':	 // 1 string to match.
                if (memcmp(NameR.data()+15, "gtu", 3))
                  break;
                return Intrinsic::hexagon_A2_vcmpbgtu;	 // "exagon.A2.vcmpbgtu"
              case 'h':	 // 1 string to match.
                if (memcmp(NameR.data()+15, "gtu", 3))
                  break;
                return Intrinsic::hexagon_A2_vcmphgtu;	 // "exagon.A2.vcmphgtu"
              case 'w':	 // 1 string to match.
                if (memcmp(NameR.data()+15, "gtu", 3))
                  break;
                return Intrinsic::hexagon_A2_vcmpwgtu;	 // "exagon.A2.vcmpwgtu"
              }
              break;
            case 'n':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "avg", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case 'h':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "cr", 2))
                  break;
                return Intrinsic::hexagon_A2_vnavghcr;	 // "exagon.A2.vnavghcr"
              case 'w':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "cr", 2))
                  break;
                return Intrinsic::hexagon_A2_vnavgwcr;	 // "exagon.A2.vnavgwcr"
              }
              break;
            }
            break;
          }
          break;
        case '4':	 // 14 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'b':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "itsplit", 7))
              break;
            return Intrinsic::hexagon_A4_bitsplit;	 // "exagon.A4.bitsplit"
          case 'c':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "mp", 2))
              break;
            switch (NameR[13]) {
            default: break;
            case 'b':	 // 1 string to match.
              if (memcmp(NameR.data()+14, "gtui", 4))
                break;
              return Intrinsic::hexagon_A4_cmpbgtui;	 // "exagon.A4.cmpbgtui"
            case 'h':	 // 1 string to match.
              if (memcmp(NameR.data()+14, "gtui", 4))
                break;
              return Intrinsic::hexagon_A4_cmphgtui;	 // "exagon.A4.cmphgtui"
            }
            break;
          case 'm':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "odwrapu", 7))
              break;
            return Intrinsic::hexagon_A4_modwrapu;	 // "exagon.A4.modwrapu"
          case 'r':	 // 3 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'c':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "mpneqi", 6))
                break;
              return Intrinsic::hexagon_A4_rcmpneqi;	 // "exagon.A4.rcmpneqi"
            case 'o':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "und.r", 5))
                break;
              switch (NameR[17]) {
              default: break;
              case 'i':	 // 1 string to match.
                return Intrinsic::hexagon_A4_round_ri;	 // "exagon.A4.round.ri"
              case 'r':	 // 1 string to match.
                return Intrinsic::hexagon_A4_round_rr;	 // "exagon.A4.round.rr"
              }
              break;
            }
            break;
          case 't':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "lbmatch", 7))
              break;
            return Intrinsic::hexagon_A4_tlbmatch;	 // "exagon.A4.tlbmatch"
          case 'v':	 // 6 strings to match.
            if (memcmp(NameR.data()+11, "cmp", 3))
              break;
            switch (NameR[14]) {
            default: break;
            case 'b':	 // 2 strings to match.
              switch (NameR[15]) {
              default: break;
              case 'e':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "qi", 2))
                  break;
                return Intrinsic::hexagon_A4_vcmpbeqi;	 // "exagon.A4.vcmpbeqi"
              case 'g':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "ti", 2))
                  break;
                return Intrinsic::hexagon_A4_vcmpbgti;	 // "exagon.A4.vcmpbgti"
              }
              break;
            case 'h':	 // 2 strings to match.
              switch (NameR[15]) {
              default: break;
              case 'e':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "qi", 2))
                  break;
                return Intrinsic::hexagon_A4_vcmpheqi;	 // "exagon.A4.vcmpheqi"
              case 'g':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "ti", 2))
                  break;
                return Intrinsic::hexagon_A4_vcmphgti;	 // "exagon.A4.vcmphgti"
              }
              break;
            case 'w':	 // 2 strings to match.
              switch (NameR[15]) {
              default: break;
              case 'e':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "qi", 2))
                  break;
                return Intrinsic::hexagon_A4_vcmpweqi;	 // "exagon.A4.vcmpweqi"
              case 'g':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "ti", 2))
                  break;
                return Intrinsic::hexagon_A4_vcmpwgti;	 // "exagon.A4.vcmpwgti"
              }
              break;
            }
            break;
          }
          break;
        case '5':	 // 1 string to match.
          if (memcmp(NameR.data()+9, ".vaddhubs", 9))
            break;
          return Intrinsic::hexagon_A5_vaddhubs;	 // "exagon.A5.vaddhubs"
        }
        break;
      case 'C':	 // 5 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 1 string to match.
          if (memcmp(NameR.data()+9, ".bitsclri", 9))
            break;
          return Intrinsic::hexagon_C2_bitsclri;	 // "exagon.C2.bitsclri"
        case '4':	 // 4 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "nd.andn", 7))
              break;
            return Intrinsic::hexagon_C4_and_andn;	 // "exagon.C4.and.andn"
          case 'c':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "mplteui", 7))
              break;
            return Intrinsic::hexagon_C4_cmplteui;	 // "exagon.C4.cmplteui"
          case 'n':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "bits", 4))
              break;
            switch (NameR[15]) {
            default: break;
            case 'c':	 // 1 string to match.
              if (memcmp(NameR.data()+16, "lr", 2))
                break;
              return Intrinsic::hexagon_C4_nbitsclr;	 // "exagon.C4.nbitsclr"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+16, "et", 2))
                break;
              return Intrinsic::hexagon_C4_nbitsset;	 // "exagon.C4.nbitsset"
            }
            break;
          }
          break;
        }
        break;
      case 'F':	 // 8 strings to match.
        if (memcmp(NameR.data()+8, "2.", 2))
          break;
        switch (NameR[10]) {
        default: break;
        case 'd':	 // 4 strings to match.
          if (memcmp(NameR.data()+11, "ff", 2))
            break;
          switch (NameR[13]) {
          default: break;
          case 'i':	 // 3 strings to match.
            if (memcmp(NameR.data()+14, "xup", 3))
              break;
            switch (NameR[17]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::hexagon_F2_dffixupd;	 // "exagon.F2.dffixupd"
            case 'n':	 // 1 string to match.
              return Intrinsic::hexagon_F2_dffixupn;	 // "exagon.F2.dffixupn"
            case 'r':	 // 1 string to match.
              return Intrinsic::hexagon_F2_dffixupr;	 // "exagon.F2.dffixupr"
            }
            break;
          case 'm':	 // 1 string to match.
            if (memcmp(NameR.data()+14, "a.sc", 4))
              break;
            return Intrinsic::hexagon_F2_dffma_sc;	 // "exagon.F2.dffma.sc"
          }
          break;
        case 's':	 // 4 strings to match.
          if (memcmp(NameR.data()+11, "ff", 2))
            break;
          switch (NameR[13]) {
          default: break;
          case 'i':	 // 3 strings to match.
            if (memcmp(NameR.data()+14, "xup", 3))
              break;
            switch (NameR[17]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::hexagon_F2_sffixupd;	 // "exagon.F2.sffixupd"
            case 'n':	 // 1 string to match.
              return Intrinsic::hexagon_F2_sffixupn;	 // "exagon.F2.sffixupn"
            case 'r':	 // 1 string to match.
              return Intrinsic::hexagon_F2_sffixupr;	 // "exagon.F2.sffixupr"
            }
            break;
          case 'm':	 // 1 string to match.
            if (memcmp(NameR.data()+14, "a.sc", 4))
              break;
            return Intrinsic::hexagon_F2_sffma_sc;	 // "exagon.F2.sffma.sc"
          }
          break;
        }
        break;
      case 'M':	 // 29 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 18 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'c':	 // 10 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'm':	 // 8 strings to match.
              switch (NameR[12]) {
              default: break;
              case 'a':	 // 4 strings to match.
                if (NameR[13] != 'c')
                  break;
                switch (NameR[14]) {
                default: break;
                case 'i':	 // 1 string to match.
                  if (memcmp(NameR.data()+15, ".s0", 3))
                    break;
                  return Intrinsic::hexagon_M2_cmaci_s0;	 // "exagon.M2.cmaci.s0"
                case 'r':	 // 1 string to match.
                  if (memcmp(NameR.data()+15, ".s0", 3))
                    break;
                  return Intrinsic::hexagon_M2_cmacr_s0;	 // "exagon.M2.cmacr.s0"
                case 's':	 // 2 strings to match.
                  if (memcmp(NameR.data()+15, ".s", 2))
                    break;
                  switch (NameR[17]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_cmacs_s0;	 // "exagon.M2.cmacs.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_cmacs_s1;	 // "exagon.M2.cmacs.s1"
                  }
                  break;
                }
                break;
              case 'p':	 // 4 strings to match.
                if (NameR[13] != 'y')
                  break;
                switch (NameR[14]) {
                default: break;
                case 'i':	 // 1 string to match.
                  if (memcmp(NameR.data()+15, ".s0", 3))
                    break;
                  return Intrinsic::hexagon_M2_cmpyi_s0;	 // "exagon.M2.cmpyi.s0"
                case 'r':	 // 1 string to match.
                  if (memcmp(NameR.data()+15, ".s0", 3))
                    break;
                  return Intrinsic::hexagon_M2_cmpyr_s0;	 // "exagon.M2.cmpyr.s0"
                case 's':	 // 2 strings to match.
                  if (memcmp(NameR.data()+15, ".s", 2))
                    break;
                  switch (NameR[17]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_cmpys_s0;	 // "exagon.M2.cmpys.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_cmpys_s1;	 // "exagon.M2.cmpys.s1"
                  }
                  break;
                }
                break;
              }
              break;
            case 'n':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "acs.s", 5))
                break;
              switch (NameR[17]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M2_cnacs_s0;	 // "exagon.M2.cnacs.s0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M2_cnacs_s1;	 // "exagon.M2.cnacs.s1"
              }
              break;
            }
            break;
          case 'm':	 // 5 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'm':	 // 4 strings to match.
              if (memcmp(NameR.data()+12, "py", 2))
                break;
              switch (NameR[14]) {
              default: break;
              case 'h':	 // 2 strings to match.
                if (memcmp(NameR.data()+15, ".s", 2))
                  break;
                switch (NameR[17]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mmpyh_s0;	 // "exagon.M2.mmpyh.s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mmpyh_s1;	 // "exagon.M2.mmpyh.s1"
                }
                break;
              case 'l':	 // 2 strings to match.
                if (memcmp(NameR.data()+15, ".s", 2))
                  break;
                switch (NameR[17]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mmpyl_s0;	 // "exagon.M2.mmpyl.s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mmpyl_s1;	 // "exagon.M2.mmpyl.s1"
                }
                break;
              }
              break;
            case 'p':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "ysu.up", 6))
                break;
              return Intrinsic::hexagon_M2_mpysu_up;	 // "exagon.M2.mpysu.up"
            }
            break;
          case 'v':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "rm", 2))
              break;
            switch (NameR[13]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(NameR.data()+14, "c.s0", 4))
                break;
              return Intrinsic::hexagon_M2_vrmac_s0;	 // "exagon.M2.vrmac.s0"
            case 'p':	 // 1 string to match.
              if (memcmp(NameR.data()+14, "y.s0", 4))
                break;
              return Intrinsic::hexagon_M2_vrmpy_s0;	 // "exagon.M2.vrmpy.s0"
            }
            break;
          case 'x':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "or.xacc", 7))
              break;
            return Intrinsic::hexagon_M2_xor_xacc;	 // "exagon.M2.xor.xacc"
          }
          break;
        case '4':	 // 5 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "nd.andn", 7))
              break;
            return Intrinsic::hexagon_M4_and_andn;	 // "exagon.M4.and.andn"
          case 'c':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "mpy", 3))
              break;
            switch (NameR[14]) {
            default: break;
            case 'i':	 // 1 string to match.
              if (memcmp(NameR.data()+15, ".wh", 3))
                break;
              return Intrinsic::hexagon_M4_cmpyi_wh;	 // "exagon.M4.cmpyi.wh"
            case 'r':	 // 1 string to match.
              if (memcmp(NameR.data()+15, ".wh", 3))
                break;
              return Intrinsic::hexagon_M4_cmpyr_wh;	 // "exagon.M4.cmpyr.wh"
            }
            break;
          case 'x':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "or.", 3))
              break;
            switch (NameR[14]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(NameR.data()+15, "ndn", 3))
                break;
              return Intrinsic::hexagon_M4_xor_andn;	 // "exagon.M4.xor.andn"
            case 'x':	 // 1 string to match.
              if (memcmp(NameR.data()+15, "acc", 3))
                break;
              return Intrinsic::hexagon_M4_xor_xacc;	 // "exagon.M4.xor.xacc"
            }
            break;
          }
          break;
        case '5':	 // 6 strings to match.
          if (memcmp(NameR.data()+9, ".v", 2))
            break;
          switch (NameR[11]) {
          default: break;
          case 'd':	 // 2 strings to match.
            if (NameR[12] != 'm')
              break;
            switch (NameR[13]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(NameR.data()+14, "cbsu", 4))
                break;
              return Intrinsic::hexagon_M5_vdmacbsu;	 // "exagon.M5.vdmacbsu"
            case 'p':	 // 1 string to match.
              if (memcmp(NameR.data()+14, "ybsu", 4))
                break;
              return Intrinsic::hexagon_M5_vdmpybsu;	 // "exagon.M5.vdmpybsu"
            }
            break;
          case 'r':	 // 4 strings to match.
            if (NameR[12] != 'm')
              break;
            switch (NameR[13]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (memcmp(NameR.data()+14, "cb", 2))
                break;
              switch (NameR[16]) {
              default: break;
              case 's':	 // 1 string to match.
                if (NameR[17] != 'u')
                  break;
                return Intrinsic::hexagon_M5_vrmacbsu;	 // "exagon.M5.vrmacbsu"
              case 'u':	 // 1 string to match.
                if (NameR[17] != 'u')
                  break;
                return Intrinsic::hexagon_M5_vrmacbuu;	 // "exagon.M5.vrmacbuu"
              }
              break;
            case 'p':	 // 2 strings to match.
              if (memcmp(NameR.data()+14, "yb", 2))
                break;
              switch (NameR[16]) {
              default: break;
              case 's':	 // 1 string to match.
                if (NameR[17] != 'u')
                  break;
                return Intrinsic::hexagon_M5_vrmpybsu;	 // "exagon.M5.vrmpybsu"
              case 'u':	 // 1 string to match.
                if (NameR[17] != 'u')
                  break;
                return Intrinsic::hexagon_M5_vrmpybuu;	 // "exagon.M5.vrmpybuu"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 'S':	 // 35 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 31 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'a':	 // 8 strings to match.
            if (NameR[11] != 's')
              break;
            switch (NameR[12]) {
            default: break;
            case 'l':	 // 4 strings to match.
              if (NameR[13] != '.')
                break;
              switch (NameR[14]) {
              default: break;
              case 'i':	 // 2 strings to match.
                if (memcmp(NameR.data()+15, ".v", 2))
                  break;
                switch (NameR[17]) {
                default: break;
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_asl_i_vh;	 // "exagon.S2.asl.i.vh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_asl_i_vw;	 // "exagon.S2.asl.i.vw"
                }
                break;
              case 'r':	 // 2 strings to match.
                if (memcmp(NameR.data()+15, ".v", 2))
                  break;
                switch (NameR[17]) {
                default: break;
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_asl_r_vh;	 // "exagon.S2.asl.r.vh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_asl_r_vw;	 // "exagon.S2.asl.r.vw"
                }
                break;
              }
              break;
            case 'r':	 // 4 strings to match.
              if (NameR[13] != '.')
                break;
              switch (NameR[14]) {
              default: break;
              case 'i':	 // 2 strings to match.
                if (memcmp(NameR.data()+15, ".v", 2))
                  break;
                switch (NameR[17]) {
                default: break;
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_asr_i_vh;	 // "exagon.S2.asr.i.vh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_asr_i_vw;	 // "exagon.S2.asr.i.vw"
                }
                break;
              case 'r':	 // 2 strings to match.
                if (memcmp(NameR.data()+15, ".v", 2))
                  break;
                switch (NameR[17]) {
                default: break;
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_asr_r_vh;	 // "exagon.S2.asr.r.vh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_asr_r_vw;	 // "exagon.S2.asr.r.vw"
                }
                break;
              }
              break;
            }
            break;
          case 'c':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "lrbit.", 6))
              break;
            switch (NameR[17]) {
            default: break;
            case 'i':	 // 1 string to match.
              return Intrinsic::hexagon_S2_clrbit_i;	 // "exagon.S2.clrbit.i"
            case 'r':	 // 1 string to match.
              return Intrinsic::hexagon_S2_clrbit_r;	 // "exagon.S2.clrbit.r"
            }
            break;
          case 'e':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "xtractu", 7))
              break;
            return Intrinsic::hexagon_S2_extractu;	 // "exagon.S2.extractu"
          case 'l':	 // 6 strings to match.
            if (NameR[11] != 's')
              break;
            switch (NameR[12]) {
            default: break;
            case 'l':	 // 2 strings to match.
              if (memcmp(NameR.data()+13, ".r.v", 4))
                break;
              switch (NameR[17]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_S2_lsl_r_vh;	 // "exagon.S2.lsl.r.vh"
              case 'w':	 // 1 string to match.
                return Intrinsic::hexagon_S2_lsl_r_vw;	 // "exagon.S2.lsl.r.vw"
              }
              break;
            case 'r':	 // 4 strings to match.
              if (NameR[13] != '.')
                break;
              switch (NameR[14]) {
              default: break;
              case 'i':	 // 2 strings to match.
                if (memcmp(NameR.data()+15, ".v", 2))
                  break;
                switch (NameR[17]) {
                default: break;
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_lsr_i_vh;	 // "exagon.S2.lsr.i.vh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_lsr_i_vw;	 // "exagon.S2.lsr.i.vw"
                }
                break;
              case 'r':	 // 2 strings to match.
                if (memcmp(NameR.data()+15, ".v", 2))
                  break;
                switch (NameR[17]) {
                default: break;
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_lsr_r_vh;	 // "exagon.S2.lsr.r.vh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::hexagon_S2_lsr_r_vw;	 // "exagon.S2.lsr.r.vw"
                }
                break;
              }
              break;
            }
            break;
          case 's':	 // 3 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'e':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "tbit.", 5))
                break;
              switch (NameR[17]) {
              default: break;
              case 'i':	 // 1 string to match.
                return Intrinsic::hexagon_S2_setbit_i;	 // "exagon.S2.setbit.i"
              case 'r':	 // 1 string to match.
                return Intrinsic::hexagon_S2_setbit_r;	 // "exagon.S2.setbit.r"
              }
              break;
            case 'v':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "sathub", 6))
                break;
              return Intrinsic::hexagon_S2_svsathub;	 // "exagon.S2.svsathub"
            }
            break;
          case 't':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "stbit.", 6))
              break;
            switch (NameR[17]) {
            default: break;
            case 'i':	 // 1 string to match.
              return Intrinsic::hexagon_S2_tstbit_i;	 // "exagon.S2.tstbit.i"
            case 'r':	 // 1 string to match.
              return Intrinsic::hexagon_S2_tstbit_r;	 // "exagon.S2.tstbit.r"
            }
            break;
          case 'v':	 // 9 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "lign", 4))
                break;
              switch (NameR[16]) {
              default: break;
              case 'i':	 // 1 string to match.
                if (NameR[17] != 'b')
                  break;
                return Intrinsic::hexagon_S2_valignib;	 // "exagon.S2.valignib"
              case 'r':	 // 1 string to match.
                if (NameR[17] != 'b')
                  break;
                return Intrinsic::hexagon_S2_valignrb;	 // "exagon.S2.valignrb"
              }
              break;
            case 'c':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "rotate", 6))
                break;
              return Intrinsic::hexagon_S2_vcrotate;	 // "exagon.S2.vcrotate"
            case 's':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "platr", 5))
                break;
              switch (NameR[17]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::hexagon_S2_vsplatrb;	 // "exagon.S2.vsplatrb"
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_S2_vsplatrh;	 // "exagon.S2.vsplatrh"
              }
              break;
            case 't':	 // 4 strings to match.
              if (memcmp(NameR.data()+12, "run", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case 'e':	 // 2 strings to match.
                switch (NameR[16]) {
                default: break;
                case 'h':	 // 1 string to match.
                  if (NameR[17] != 'b')
                    break;
                  return Intrinsic::hexagon_S2_vtrunehb;	 // "exagon.S2.vtrunehb"
                case 'w':	 // 1 string to match.
                  if (NameR[17] != 'h')
                    break;
                  return Intrinsic::hexagon_S2_vtrunewh;	 // "exagon.S2.vtrunewh"
                }
                break;
              case 'o':	 // 2 strings to match.
                switch (NameR[16]) {
                default: break;
                case 'h':	 // 1 string to match.
                  if (NameR[17] != 'b')
                    break;
                  return Intrinsic::hexagon_S2_vtrunohb;	 // "exagon.S2.vtrunohb"
                case 'w':	 // 1 string to match.
                  if (NameR[17] != 'h')
                    break;
                  return Intrinsic::hexagon_S2_vtrunowh;	 // "exagon.S2.vtrunowh"
                }
                break;
              }
              break;
            }
            break;
          }
          break;
        case '4':	 // 4 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'c':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "lbp", 3))
              break;
            switch (NameR[14]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(NameR.data()+15, "ddi", 3))
                break;
              return Intrinsic::hexagon_S4_clbpaddi;	 // "exagon.S4.clbpaddi"
            case 'n':	 // 1 string to match.
              if (memcmp(NameR.data()+15, "orm", 3))
                break;
              return Intrinsic::hexagon_S4_clbpnorm;	 // "exagon.S4.clbpnorm"
            }
            break;
          case 'e':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "xtractp", 7))
              break;
            return Intrinsic::hexagon_S4_extractp;	 // "exagon.S4.extractp"
          case 'o':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "r.andix", 7))
              break;
            return Intrinsic::hexagon_S4_or_andix;	 // "exagon.S4.or.andix"
          }
          break;
        }
        break;
      }
      break;
    case 19:	 // 81 strings to match.
      if (memcmp(NameR.data()+0, "exagon.", 7))
        break;
      switch (NameR[7]) {
      default: break;
      case 'A':	 // 11 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 3 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'c':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "ombineii", 8))
              break;
            return Intrinsic::hexagon_A2_combineii;	 // "exagon.A2.combineii"
          case 'v':	 // 2 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "ddb.map", 7))
                break;
              return Intrinsic::hexagon_A2_vaddb_map;	 // "exagon.A2.vaddb.map"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "ubb.map", 7))
                break;
              return Intrinsic::hexagon_A2_vsubb_map;	 // "exagon.A2.vsubb.map"
            }
            break;
          }
          break;
        case '4':	 // 8 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'b':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "itspliti", 8))
              break;
            return Intrinsic::hexagon_A4_bitspliti;	 // "exagon.A4.bitspliti"
          case 'c':	 // 4 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'o':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "mbine", 5))
                break;
              switch (NameR[17]) {
              default: break;
              case 'i':	 // 1 string to match.
                if (NameR[18] != 'r')
                  break;
                return Intrinsic::hexagon_A4_combineir;	 // "exagon.A4.combineir"
              case 'r':	 // 1 string to match.
                if (NameR[18] != 'i')
                  break;
                return Intrinsic::hexagon_A4_combineri;	 // "exagon.A4.combineri"
              }
              break;
            case 'r':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "ound.r", 6))
                break;
              switch (NameR[18]) {
              default: break;
              case 'i':	 // 1 string to match.
                return Intrinsic::hexagon_A4_cround_ri;	 // "exagon.A4.cround.ri"
              case 'r':	 // 1 string to match.
                return Intrinsic::hexagon_A4_cround_rr;	 // "exagon.A4.cround.rr"
              }
              break;
            }
            break;
          case 'v':	 // 3 strings to match.
            if (memcmp(NameR.data()+11, "cmp", 3))
              break;
            switch (NameR[14]) {
            default: break;
            case 'b':	 // 1 string to match.
              if (memcmp(NameR.data()+15, "gtui", 4))
                break;
              return Intrinsic::hexagon_A4_vcmpbgtui;	 // "exagon.A4.vcmpbgtui"
            case 'h':	 // 1 string to match.
              if (memcmp(NameR.data()+15, "gtui", 4))
                break;
              return Intrinsic::hexagon_A4_vcmphgtui;	 // "exagon.A4.vcmphgtui"
            case 'w':	 // 1 string to match.
              if (memcmp(NameR.data()+15, "gtui", 4))
                break;
              return Intrinsic::hexagon_A4_vcmpwgtui;	 // "exagon.A4.vcmpwgtui"
            }
            break;
          }
          break;
        }
        break;
      case 'C':	 // 2 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 1 string to match.
          if (memcmp(NameR.data()+9, ".pxfer.map", 10))
            break;
          return Intrinsic::hexagon_C2_pxfer_map;	 // "exagon.C2.pxfer.map"
        case '4':	 // 1 string to match.
          if (memcmp(NameR.data()+9, ".nbitsclri", 10))
            break;
          return Intrinsic::hexagon_C4_nbitsclri;	 // "exagon.C4.nbitsclri"
        }
        break;
      case 'F':	 // 12 strings to match.
        if (memcmp(NameR.data()+8, "2.", 2))
          break;
        switch (NameR[10]) {
        default: break;
        case 'c':	 // 8 strings to match.
          if (memcmp(NameR.data()+11, "onv.", 4))
            break;
          switch (NameR[15]) {
          default: break;
          case 'd':	 // 4 strings to match.
            switch (NameR[16]) {
            default: break;
            case '2':	 // 2 strings to match.
              switch (NameR[17]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (NameR[18] != 'f')
                  break;
                return Intrinsic::hexagon_F2_conv_d2df;	 // "exagon.F2.conv.d2df"
              case 's':	 // 1 string to match.
                if (NameR[18] != 'f')
                  break;
                return Intrinsic::hexagon_F2_conv_d2sf;	 // "exagon.F2.conv.d2sf"
              }
              break;
            case 'f':	 // 2 strings to match.
              if (NameR[17] != '2')
                break;
              switch (NameR[18]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::hexagon_F2_conv_df2d;	 // "exagon.F2.conv.df2d"
              case 'w':	 // 1 string to match.
                return Intrinsic::hexagon_F2_conv_df2w;	 // "exagon.F2.conv.df2w"
              }
              break;
            }
            break;
          case 's':	 // 2 strings to match.
            if (memcmp(NameR.data()+16, "f2", 2))
              break;
            switch (NameR[18]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::hexagon_F2_conv_sf2d;	 // "exagon.F2.conv.sf2d"
            case 'w':	 // 1 string to match.
              return Intrinsic::hexagon_F2_conv_sf2w;	 // "exagon.F2.conv.sf2w"
            }
            break;
          case 'w':	 // 2 strings to match.
            if (NameR[16] != '2')
              break;
            switch (NameR[17]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (NameR[18] != 'f')
                break;
              return Intrinsic::hexagon_F2_conv_w2df;	 // "exagon.F2.conv.w2df"
            case 's':	 // 1 string to match.
              if (NameR[18] != 'f')
                break;
              return Intrinsic::hexagon_F2_conv_w2sf;	 // "exagon.F2.conv.w2sf"
            }
            break;
          }
          break;
        case 'd':	 // 2 strings to match.
          if (memcmp(NameR.data()+11, "ffm", 3))
            break;
          switch (NameR[14]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(NameR.data()+15, ".lib", 4))
              break;
            return Intrinsic::hexagon_F2_dffma_lib;	 // "exagon.F2.dffma.lib"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+15, ".lib", 4))
              break;
            return Intrinsic::hexagon_F2_dffms_lib;	 // "exagon.F2.dffms.lib"
          }
          break;
        case 's':	 // 2 strings to match.
          if (memcmp(NameR.data()+11, "ffm", 3))
            break;
          switch (NameR[14]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(NameR.data()+15, ".lib", 4))
              break;
            return Intrinsic::hexagon_F2_sffma_lib;	 // "exagon.F2.sffma.lib"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+15, ".lib", 4))
              break;
            return Intrinsic::hexagon_F2_sffms_lib;	 // "exagon.F2.sffms.lib"
          }
          break;
        }
        break;
      case 'M':	 // 44 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 41 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'c':	 // 8 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'm':	 // 6 strings to match.
              switch (NameR[12]) {
              default: break;
              case 'a':	 // 2 strings to match.
                if (memcmp(NameR.data()+13, "csc.s", 5))
                  break;
                switch (NameR[18]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_cmacsc_s0;	 // "exagon.M2.cmacsc.s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_cmacsc_s1;	 // "exagon.M2.cmacsc.s1"
                }
                break;
              case 'p':	 // 4 strings to match.
                if (NameR[13] != 'y')
                  break;
                switch (NameR[14]) {
                default: break;
                case 'r':	 // 2 strings to match.
                  if (memcmp(NameR.data()+15, "s.s", 3))
                    break;
                  switch (NameR[18]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_cmpyrs_s0;	 // "exagon.M2.cmpyrs.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_cmpyrs_s1;	 // "exagon.M2.cmpyrs.s1"
                  }
                  break;
                case 's':	 // 2 strings to match.
                  if (memcmp(NameR.data()+15, "c.s", 3))
                    break;
                  switch (NameR[18]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_cmpysc_s0;	 // "exagon.M2.cmpysc.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_cmpysc_s1;	 // "exagon.M2.cmpysc.s1"
                  }
                  break;
                }
                break;
              }
              break;
            case 'n':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "acsc.s", 6))
                break;
              switch (NameR[18]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M2_cnacsc_s0;	 // "exagon.M2.cnacsc.s0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M2_cnacsc_s1;	 // "exagon.M2.cnacsc.s1"
              }
              break;
            }
            break;
          case 'h':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "mmpy", 4))
              break;
            switch (NameR[15]) {
            default: break;
            case 'h':	 // 1 string to match.
              if (memcmp(NameR.data()+16, ".s1", 3))
                break;
              return Intrinsic::hexagon_M2_hmmpyh_s1;	 // "exagon.M2.hmmpyh.s1"
            case 'l':	 // 1 string to match.
              if (memcmp(NameR.data()+16, ".s1", 3))
                break;
              return Intrinsic::hexagon_M2_hmmpyl_s1;	 // "exagon.M2.hmmpyl.s1"
            }
            break;
          case 'm':	 // 21 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'm':	 // 12 strings to match.
              switch (NameR[12]) {
              default: break;
              case 'a':	 // 4 strings to match.
                if (NameR[13] != 'c')
                  break;
                switch (NameR[14]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(NameR.data()+15, "s.s", 3))
                    break;
                  switch (NameR[18]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mmachs_s0;	 // "exagon.M2.mmachs.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mmachs_s1;	 // "exagon.M2.mmachs.s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(NameR.data()+15, "s.s", 3))
                    break;
                  switch (NameR[18]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mmacls_s0;	 // "exagon.M2.mmacls.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mmacls_s1;	 // "exagon.M2.mmacls.s1"
                  }
                  break;
                }
                break;
              case 'p':	 // 8 strings to match.
                if (NameR[13] != 'y')
                  break;
                switch (NameR[14]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(NameR.data()+15, ".rs", 3))
                    break;
                  switch (NameR[18]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mmpyh_rs0;	 // "exagon.M2.mmpyh.rs0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mmpyh_rs1;	 // "exagon.M2.mmpyh.rs1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(NameR.data()+15, ".rs", 3))
                    break;
                  switch (NameR[18]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mmpyl_rs0;	 // "exagon.M2.mmpyl.rs0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mmpyl_rs1;	 // "exagon.M2.mmpyl.rs1"
                  }
                  break;
                case 'u':	 // 4 strings to match.
                  switch (NameR[15]) {
                  default: break;
                  case 'h':	 // 2 strings to match.
                    if (memcmp(NameR.data()+16, ".s", 2))
                      break;
                    switch (NameR[18]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mmpyuh_s0;	 // "exagon.M2.mmpyuh.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mmpyuh_s1;	 // "exagon.M2.mmpyuh.s1"
                    }
                    break;
                  case 'l':	 // 2 strings to match.
                    if (memcmp(NameR.data()+16, ".s", 2))
                      break;
                    switch (NameR[18]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mmpyul_s0;	 // "exagon.M2.mmpyul.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mmpyul_s1;	 // "exagon.M2.mmpyul.s1"
                    }
                    break;
                  }
                  break;
                }
                break;
              }
              break;
            case 'p':	 // 9 strings to match.
              if (memcmp(NameR.data()+12, "y.", 2))
                break;
              switch (NameR[14]) {
              default: break;
              case 'h':	 // 4 strings to match.
                switch (NameR[15]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(NameR.data()+16, ".s", 2))
                    break;
                  switch (NameR[18]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_hh_s0;	 // "exagon.M2.mpy.hh.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_hh_s1;	 // "exagon.M2.mpy.hh.s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(NameR.data()+16, ".s", 2))
                    break;
                  switch (NameR[18]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_hl_s0;	 // "exagon.M2.mpy.hl.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_hl_s1;	 // "exagon.M2.mpy.hl.s1"
                  }
                  break;
                }
                break;
              case 'l':	 // 4 strings to match.
                switch (NameR[15]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(NameR.data()+16, ".s", 2))
                    break;
                  switch (NameR[18]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_lh_s0;	 // "exagon.M2.mpy.lh.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_lh_s1;	 // "exagon.M2.mpy.lh.s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(NameR.data()+16, ".s", 2))
                    break;
                  switch (NameR[18]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_ll_s0;	 // "exagon.M2.mpy.ll.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_ll_s1;	 // "exagon.M2.mpy.ll.s1"
                  }
                  break;
                }
                break;
              case 'u':	 // 1 string to match.
                if (memcmp(NameR.data()+15, "p.s1", 4))
                  break;
                return Intrinsic::hexagon_M2_mpy_up_s1;	 // "exagon.M2.mpy.up.s1"
              }
              break;
            }
            break;
          case 'v':	 // 10 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "bsdiff", 6))
                break;
              switch (NameR[18]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_M2_vabsdiffh;	 // "exagon.M2.vabsdiffh"
              case 'w':	 // 1 string to match.
                return Intrinsic::hexagon_M2_vabsdiffw;	 // "exagon.M2.vabsdiffw"
              }
              break;
            case 'd':	 // 4 strings to match.
              if (NameR[12] != 'm')
                break;
              switch (NameR[13]) {
              default: break;
              case 'a':	 // 2 strings to match.
                if (memcmp(NameR.data()+14, "cs.s", 4))
                  break;
                switch (NameR[18]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_vdmacs_s0;	 // "exagon.M2.vdmacs.s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_vdmacs_s1;	 // "exagon.M2.vdmacs.s1"
                }
                break;
              case 'p':	 // 2 strings to match.
                if (memcmp(NameR.data()+14, "ys.s", 4))
                  break;
                switch (NameR[18]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_vdmpys_s0;	 // "exagon.M2.vdmpys.s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_vdmpys_s1;	 // "exagon.M2.vdmpys.s1"
                }
                break;
              }
              break;
            case 'm':	 // 4 strings to match.
              switch (NameR[12]) {
              default: break;
              case 'a':	 // 2 strings to match.
                if (memcmp(NameR.data()+13, "c2s.s", 5))
                  break;
                switch (NameR[18]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_vmac2s_s0;	 // "exagon.M2.vmac2s.s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_vmac2s_s1;	 // "exagon.M2.vmac2s.s1"
                }
                break;
              case 'p':	 // 2 strings to match.
                if (memcmp(NameR.data()+13, "y2s.s", 5))
                  break;
                switch (NameR[18]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_vmpy2s_s0;	 // "exagon.M2.vmpy2s.s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_vmpy2s_s1;	 // "exagon.M2.vmpy2s.s1"
                }
                break;
              }
              break;
            }
            break;
          }
          break;
        case '4':	 // 3 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'c':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "mpy", 3))
              break;
            switch (NameR[14]) {
            default: break;
            case 'i':	 // 1 string to match.
              if (memcmp(NameR.data()+15, ".whc", 4))
                break;
              return Intrinsic::hexagon_M4_cmpyi_whc;	 // "exagon.M4.cmpyi.whc"
            case 'r':	 // 1 string to match.
              if (memcmp(NameR.data()+15, ".whc", 4))
                break;
              return Intrinsic::hexagon_M4_cmpyr_whc;	 // "exagon.M4.cmpyr.whc"
            }
            break;
          case 'p':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "mpyw.acc", 8))
              break;
            return Intrinsic::hexagon_M4_pmpyw_acc;	 // "exagon.M4.pmpyw.acc"
          }
          break;
        }
        break;
      case 'S':	 // 12 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 4 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'e':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "xtractup", 8))
              break;
            return Intrinsic::hexagon_S2_extractup;	 // "exagon.S2.extractup"
          case 'i':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "nsert.rp", 8))
              break;
            return Intrinsic::hexagon_S2_insert_rp;	 // "exagon.S2.insert.rp"
          case 'v':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "splice", 6))
              break;
            switch (NameR[17]) {
            default: break;
            case 'i':	 // 1 string to match.
              if (NameR[18] != 'b')
                break;
              return Intrinsic::hexagon_S2_vspliceib;	 // "exagon.S2.vspliceib"
            case 'r':	 // 1 string to match.
              if (NameR[18] != 'b')
                break;
              return Intrinsic::hexagon_S2_vsplicerb;	 // "exagon.S2.vsplicerb"
            }
            break;
          }
          break;
        case '4':	 // 7 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'n':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "tstbit.", 7))
              break;
            switch (NameR[18]) {
            default: break;
            case 'i':	 // 1 string to match.
              return Intrinsic::hexagon_S4_ntstbit_i;	 // "exagon.S4.ntstbit.i"
            case 'r':	 // 1 string to match.
              return Intrinsic::hexagon_S4_ntstbit_r;	 // "exagon.S4.ntstbit.r"
            }
            break;
          case 'v':	 // 5 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'r':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "crotate", 7))
                break;
              return Intrinsic::hexagon_S4_vrcrotate;	 // "exagon.S4.vrcrotate"
            case 'x':	 // 4 strings to match.
              switch (NameR[12]) {
              default: break;
              case 'a':	 // 2 strings to match.
                if (memcmp(NameR.data()+13, "ddsub", 5))
                  break;
                switch (NameR[18]) {
                default: break;
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_S4_vxaddsubh;	 // "exagon.S4.vxaddsubh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::hexagon_S4_vxaddsubw;	 // "exagon.S4.vxaddsubw"
                }
                break;
              case 's':	 // 2 strings to match.
                if (memcmp(NameR.data()+13, "ubadd", 5))
                  break;
                switch (NameR[18]) {
                default: break;
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_S4_vxsubaddh;	 // "exagon.S4.vxsubaddh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::hexagon_S4_vxsubaddw;	 // "exagon.S4.vxsubaddw"
                }
                break;
              }
              break;
            }
            break;
          }
          break;
        case '5':	 // 1 string to match.
          if (memcmp(NameR.data()+9, ".popcountp", 10))
            break;
          return Intrinsic::hexagon_S5_popcountp;	 // "exagon.S5.popcountp"
        }
        break;
      }
      break;
    case 20:	 // 95 strings to match.
      if (memcmp(NameR.data()+0, "exagon.", 7))
        break;
      switch (NameR[7]) {
      default: break;
      case 'A':	 // 4 strings to match.
        if (memcmp(NameR.data()+8, "2.combine.", 10))
          break;
        switch (NameR[18]) {
        default: break;
        case 'h':	 // 2 strings to match.
          switch (NameR[19]) {
          default: break;
          case 'h':	 // 1 string to match.
            return Intrinsic::hexagon_A2_combine_hh;	 // "exagon.A2.combine.hh"
          case 'l':	 // 1 string to match.
            return Intrinsic::hexagon_A2_combine_hl;	 // "exagon.A2.combine.hl"
          }
          break;
        case 'l':	 // 2 strings to match.
          switch (NameR[19]) {
          default: break;
          case 'h':	 // 1 string to match.
            return Intrinsic::hexagon_A2_combine_lh;	 // "exagon.A2.combine.lh"
          case 'l':	 // 1 string to match.
            return Intrinsic::hexagon_A2_combine_ll;	 // "exagon.A2.combine.ll"
          }
          break;
        }
        break;
      case 'F':	 // 10 strings to match.
        if (memcmp(NameR.data()+8, "2.conv.", 7))
          break;
        switch (NameR[15]) {
        default: break;
        case 'd':	 // 3 strings to match.
          if (memcmp(NameR.data()+16, "f2", 2))
            break;
          switch (NameR[18]) {
          default: break;
          case 's':	 // 1 string to match.
            if (NameR[19] != 'f')
              break;
            return Intrinsic::hexagon_F2_conv_df2sf;	 // "exagon.F2.conv.df2sf"
          case 'u':	 // 2 strings to match.
            switch (NameR[19]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::hexagon_F2_conv_df2ud;	 // "exagon.F2.conv.df2ud"
            case 'w':	 // 1 string to match.
              return Intrinsic::hexagon_F2_conv_df2uw;	 // "exagon.F2.conv.df2uw"
            }
            break;
          }
          break;
        case 's':	 // 3 strings to match.
          if (memcmp(NameR.data()+16, "f2", 2))
            break;
          switch (NameR[18]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (NameR[19] != 'f')
              break;
            return Intrinsic::hexagon_F2_conv_sf2df;	 // "exagon.F2.conv.sf2df"
          case 'u':	 // 2 strings to match.
            switch (NameR[19]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::hexagon_F2_conv_sf2ud;	 // "exagon.F2.conv.sf2ud"
            case 'w':	 // 1 string to match.
              return Intrinsic::hexagon_F2_conv_sf2uw;	 // "exagon.F2.conv.sf2uw"
            }
            break;
          }
          break;
        case 'u':	 // 4 strings to match.
          switch (NameR[16]) {
          default: break;
          case 'd':	 // 2 strings to match.
            if (NameR[17] != '2')
              break;
            switch (NameR[18]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (NameR[19] != 'f')
                break;
              return Intrinsic::hexagon_F2_conv_ud2df;	 // "exagon.F2.conv.ud2df"
            case 's':	 // 1 string to match.
              if (NameR[19] != 'f')
                break;
              return Intrinsic::hexagon_F2_conv_ud2sf;	 // "exagon.F2.conv.ud2sf"
            }
            break;
          case 'w':	 // 2 strings to match.
            if (NameR[17] != '2')
              break;
            switch (NameR[18]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (NameR[19] != 'f')
                break;
              return Intrinsic::hexagon_F2_conv_uw2df;	 // "exagon.F2.conv.uw2df"
            case 's':	 // 1 string to match.
              if (NameR[19] != 'f')
                break;
              return Intrinsic::hexagon_F2_conv_uw2sf;	 // "exagon.F2.conv.uw2sf"
            }
            break;
          }
          break;
        }
        break;
      case 'M':	 // 58 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 49 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'c':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "mpyrsc.s", 8))
              break;
            switch (NameR[19]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_cmpyrsc_s0;	 // "exagon.M2.cmpyrsc.s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_cmpyrsc_s1;	 // "exagon.M2.cmpyrsc.s1"
            }
            break;
          case 'd':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "pmpy", 4))
              break;
            switch (NameR[15]) {
            default: break;
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+16, "s.s0", 4))
                break;
              return Intrinsic::hexagon_M2_dpmpyss_s0;	 // "exagon.M2.dpmpyss.s0"
            case 'u':	 // 1 string to match.
              if (memcmp(NameR.data()+16, "u.s0", 4))
                break;
              return Intrinsic::hexagon_M2_dpmpyuu_s0;	 // "exagon.M2.dpmpyuu.s0"
            }
            break;
          case 'h':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "mmpy", 4))
              break;
            switch (NameR[15]) {
            default: break;
            case 'h':	 // 1 string to match.
              if (memcmp(NameR.data()+16, ".rs1", 4))
                break;
              return Intrinsic::hexagon_M2_hmmpyh_rs1;	 // "exagon.M2.hmmpyh.rs1"
            case 'l':	 // 1 string to match.
              if (memcmp(NameR.data()+16, ".rs1", 4))
                break;
              return Intrinsic::hexagon_M2_hmmpyl_rs1;	 // "exagon.M2.hmmpyl.rs1"
            }
            break;
          case 'm':	 // 28 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'm':	 // 12 strings to match.
              switch (NameR[12]) {
              default: break;
              case 'a':	 // 8 strings to match.
                if (NameR[13] != 'c')
                  break;
                switch (NameR[14]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(NameR.data()+15, "s.rs", 4))
                    break;
                  switch (NameR[19]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mmachs_rs0;	 // "exagon.M2.mmachs.rs0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mmachs_rs1;	 // "exagon.M2.mmachs.rs1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(NameR.data()+15, "s.rs", 4))
                    break;
                  switch (NameR[19]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mmacls_rs0;	 // "exagon.M2.mmacls.rs0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mmacls_rs1;	 // "exagon.M2.mmacls.rs1"
                  }
                  break;
                case 'u':	 // 4 strings to match.
                  switch (NameR[15]) {
                  default: break;
                  case 'h':	 // 2 strings to match.
                    if (memcmp(NameR.data()+16, "s.s", 3))
                      break;
                    switch (NameR[19]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mmacuhs_s0;	 // "exagon.M2.mmacuhs.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mmacuhs_s1;	 // "exagon.M2.mmacuhs.s1"
                    }
                    break;
                  case 'l':	 // 2 strings to match.
                    if (memcmp(NameR.data()+16, "s.s", 3))
                      break;
                    switch (NameR[19]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mmaculs_s0;	 // "exagon.M2.mmaculs.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mmaculs_s1;	 // "exagon.M2.mmaculs.s1"
                    }
                    break;
                  }
                  break;
                }
                break;
              case 'p':	 // 4 strings to match.
                if (memcmp(NameR.data()+13, "yu", 2))
                  break;
                switch (NameR[15]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(NameR.data()+16, ".rs", 3))
                    break;
                  switch (NameR[19]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mmpyuh_rs0;	 // "exagon.M2.mmpyuh.rs0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mmpyuh_rs1;	 // "exagon.M2.mmpyuh.rs1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(NameR.data()+16, ".rs", 3))
                    break;
                  switch (NameR[19]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mmpyul_rs0;	 // "exagon.M2.mmpyul.rs0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mmpyul_rs1;	 // "exagon.M2.mmpyul.rs1"
                  }
                  break;
                }
                break;
              }
              break;
            case 'p':	 // 16 strings to match.
              if (NameR[12] != 'y')
                break;
              switch (NameR[13]) {
              default: break;
              case 'd':	 // 8 strings to match.
                if (NameR[14] != '.')
                  break;
                switch (NameR[15]) {
                default: break;
                case 'h':	 // 4 strings to match.
                  switch (NameR[16]) {
                  default: break;
                  case 'h':	 // 2 strings to match.
                    if (memcmp(NameR.data()+17, ".s", 2))
                      break;
                    switch (NameR[19]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_hh_s0;	 // "exagon.M2.mpyd.hh.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_hh_s1;	 // "exagon.M2.mpyd.hh.s1"
                    }
                    break;
                  case 'l':	 // 2 strings to match.
                    if (memcmp(NameR.data()+17, ".s", 2))
                      break;
                    switch (NameR[19]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_hl_s0;	 // "exagon.M2.mpyd.hl.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_hl_s1;	 // "exagon.M2.mpyd.hl.s1"
                    }
                    break;
                  }
                  break;
                case 'l':	 // 4 strings to match.
                  switch (NameR[16]) {
                  default: break;
                  case 'h':	 // 2 strings to match.
                    if (memcmp(NameR.data()+17, ".s", 2))
                      break;
                    switch (NameR[19]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_lh_s0;	 // "exagon.M2.mpyd.lh.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_lh_s1;	 // "exagon.M2.mpyd.lh.s1"
                    }
                    break;
                  case 'l':	 // 2 strings to match.
                    if (memcmp(NameR.data()+17, ".s", 2))
                      break;
                    switch (NameR[19]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_ll_s0;	 // "exagon.M2.mpyd.ll.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_ll_s1;	 // "exagon.M2.mpyd.ll.s1"
                    }
                    break;
                  }
                  break;
                }
                break;
              case 'u':	 // 8 strings to match.
                if (NameR[14] != '.')
                  break;
                switch (NameR[15]) {
                default: break;
                case 'h':	 // 4 strings to match.
                  switch (NameR[16]) {
                  default: break;
                  case 'h':	 // 2 strings to match.
                    if (memcmp(NameR.data()+17, ".s", 2))
                      break;
                    switch (NameR[19]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyu_hh_s0;	 // "exagon.M2.mpyu.hh.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyu_hh_s1;	 // "exagon.M2.mpyu.hh.s1"
                    }
                    break;
                  case 'l':	 // 2 strings to match.
                    if (memcmp(NameR.data()+17, ".s", 2))
                      break;
                    switch (NameR[19]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyu_hl_s0;	 // "exagon.M2.mpyu.hl.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyu_hl_s1;	 // "exagon.M2.mpyu.hl.s1"
                    }
                    break;
                  }
                  break;
                case 'l':	 // 4 strings to match.
                  switch (NameR[16]) {
                  default: break;
                  case 'h':	 // 2 strings to match.
                    if (memcmp(NameR.data()+17, ".s", 2))
                      break;
                    switch (NameR[19]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyu_lh_s0;	 // "exagon.M2.mpyu.lh.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyu_lh_s1;	 // "exagon.M2.mpyu.lh.s1"
                    }
                    break;
                  case 'l':	 // 2 strings to match.
                    if (memcmp(NameR.data()+17, ".s", 2))
                      break;
                    switch (NameR[19]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyu_ll_s0;	 // "exagon.M2.mpyu.ll.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyu_ll_s1;	 // "exagon.M2.mpyu.ll.s1"
                    }
                    break;
                  }
                  break;
                }
                break;
              }
              break;
            }
            break;
          case 'v':	 // 15 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'd':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "mpyrs.s", 7))
                break;
              switch (NameR[19]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M2_vdmpyrs_s0;	 // "exagon.M2.vdmpyrs.s0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M2_vdmpyrs_s1;	 // "exagon.M2.vdmpyrs.s1"
              }
              break;
            case 'm':	 // 8 strings to match.
              switch (NameR[12]) {
              default: break;
              case 'a':	 // 4 strings to match.
                if (memcmp(NameR.data()+13, "c2", 2))
                  break;
                switch (NameR[15]) {
                default: break;
                case 'e':	 // 2 strings to match.
                  if (memcmp(NameR.data()+16, "s.s", 3))
                    break;
                  switch (NameR[19]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_vmac2es_s0;	 // "exagon.M2.vmac2es.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_vmac2es_s1;	 // "exagon.M2.vmac2es.s1"
                  }
                  break;
                case 's':	 // 2 strings to match.
                  if (memcmp(NameR.data()+16, "u.s", 3))
                    break;
                  switch (NameR[19]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_vmac2su_s0;	 // "exagon.M2.vmac2su.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_vmac2su_s1;	 // "exagon.M2.vmac2su.s1"
                  }
                  break;
                }
                break;
              case 'p':	 // 4 strings to match.
                if (memcmp(NameR.data()+13, "y2", 2))
                  break;
                switch (NameR[15]) {
                default: break;
                case 'e':	 // 2 strings to match.
                  if (memcmp(NameR.data()+16, "s.s", 3))
                    break;
                  switch (NameR[19]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_vmpy2es_s0;	 // "exagon.M2.vmpy2es.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_vmpy2es_s1;	 // "exagon.M2.vmpy2es.s1"
                  }
                  break;
                case 's':	 // 2 strings to match.
                  if (memcmp(NameR.data()+16, "u.s", 3))
                    break;
                  switch (NameR[19]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_vmpy2su_s0;	 // "exagon.M2.vmpy2su.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_vmpy2su_s1;	 // "exagon.M2.vmpy2su.s1"
                  }
                  break;
                }
                break;
              }
              break;
            case 'r':	 // 5 strings to match.
              if (memcmp(NameR.data()+12, "cm", 2))
                break;
              switch (NameR[14]) {
              default: break;
              case 'a':	 // 2 strings to match.
                if (NameR[15] != 'c')
                  break;
                switch (NameR[16]) {
                default: break;
                case 'i':	 // 1 string to match.
                  if (memcmp(NameR.data()+17, ".s0", 3))
                    break;
                  return Intrinsic::hexagon_M2_vrcmaci_s0;	 // "exagon.M2.vrcmaci.s0"
                case 'r':	 // 1 string to match.
                  if (memcmp(NameR.data()+17, ".s0", 3))
                    break;
                  return Intrinsic::hexagon_M2_vrcmacr_s0;	 // "exagon.M2.vrcmacr.s0"
                }
                break;
              case 'p':	 // 3 strings to match.
                if (NameR[15] != 'y')
                  break;
                switch (NameR[16]) {
                default: break;
                case 'i':	 // 1 string to match.
                  if (memcmp(NameR.data()+17, ".s0", 3))
                    break;
                  return Intrinsic::hexagon_M2_vrcmpyi_s0;	 // "exagon.M2.vrcmpyi.s0"
                case 'r':	 // 1 string to match.
                  if (memcmp(NameR.data()+17, ".s0", 3))
                    break;
                  return Intrinsic::hexagon_M2_vrcmpyr_s0;	 // "exagon.M2.vrcmpyr.s0"
                case 's':	 // 1 string to match.
                  if (memcmp(NameR.data()+17, ".s1", 3))
                    break;
                  return Intrinsic::hexagon_M2_vrcmpys_s1;	 // "exagon.M2.vrcmpys.s1"
                }
                break;
              }
              break;
            }
            break;
          }
          break;
        case '4':	 // 9 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'm':	 // 4 strings to match.
            if (memcmp(NameR.data()+11, "pyr", 3))
              break;
            switch (NameR[14]) {
            default: break;
            case 'i':	 // 2 strings to match.
              if (memcmp(NameR.data()+15, ".add", 4))
                break;
              switch (NameR[19]) {
              default: break;
              case 'i':	 // 1 string to match.
                return Intrinsic::hexagon_M4_mpyri_addi;	 // "exagon.M4.mpyri.addi"
              case 'r':	 // 1 string to match.
                return Intrinsic::hexagon_M4_mpyri_addr;	 // "exagon.M4.mpyri.addr"
              }
              break;
            case 'r':	 // 2 strings to match.
              if (memcmp(NameR.data()+15, ".add", 4))
                break;
              switch (NameR[19]) {
              default: break;
              case 'i':	 // 1 string to match.
                return Intrinsic::hexagon_M4_mpyrr_addi;	 // "exagon.M4.mpyrr.addi"
              case 'r':	 // 1 string to match.
                return Intrinsic::hexagon_M4_mpyrr_addr;	 // "exagon.M4.mpyrr.addr"
              }
              break;
            }
            break;
          case 'v':	 // 5 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'p':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "mpyh.acc", 8))
                break;
              return Intrinsic::hexagon_M4_vpmpyh_acc;	 // "exagon.M4.vpmpyh.acc"
            case 'r':	 // 4 strings to match.
              if (memcmp(NameR.data()+12, "mpy", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case 'e':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "h.s", 3))
                  break;
                switch (NameR[19]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M4_vrmpyeh_s0;	 // "exagon.M4.vrmpyeh.s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M4_vrmpyeh_s1;	 // "exagon.M4.vrmpyeh.s1"
                }
                break;
              case 'o':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "h.s", 3))
                  break;
                switch (NameR[19]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M4_vrmpyoh_s0;	 // "exagon.M4.vrmpyoh.s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M4_vrmpyoh_s1;	 // "exagon.M4.vrmpyoh.s1"
                }
                break;
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 'S':	 // 23 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 17 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'a':	 // 8 strings to match.
            if (NameR[11] != 's')
              break;
            switch (NameR[12]) {
            default: break;
            case 'l':	 // 4 strings to match.
              if (NameR[13] != '.')
                break;
              switch (NameR[14]) {
              default: break;
              case 'i':	 // 2 strings to match.
                if (NameR[15] != '.')
                  break;
                switch (NameR[16]) {
                default: break;
                case 'p':	 // 1 string to match.
                  if (memcmp(NameR.data()+17, ".or", 3))
                    break;
                  return Intrinsic::hexagon_S2_asl_i_p_or;	 // "exagon.S2.asl.i.p.or"
                case 'r':	 // 1 string to match.
                  if (memcmp(NameR.data()+17, ".or", 3))
                    break;
                  return Intrinsic::hexagon_S2_asl_i_r_or;	 // "exagon.S2.asl.i.r.or"
                }
                break;
              case 'r':	 // 2 strings to match.
                if (NameR[15] != '.')
                  break;
                switch (NameR[16]) {
                default: break;
                case 'p':	 // 1 string to match.
                  if (memcmp(NameR.data()+17, ".or", 3))
                    break;
                  return Intrinsic::hexagon_S2_asl_r_p_or;	 // "exagon.S2.asl.r.p.or"
                case 'r':	 // 1 string to match.
                  if (memcmp(NameR.data()+17, ".or", 3))
                    break;
                  return Intrinsic::hexagon_S2_asl_r_r_or;	 // "exagon.S2.asl.r.r.or"
                }
                break;
              }
              break;
            case 'r':	 // 4 strings to match.
              if (NameR[13] != '.')
                break;
              switch (NameR[14]) {
              default: break;
              case 'i':	 // 2 strings to match.
                if (NameR[15] != '.')
                  break;
                switch (NameR[16]) {
                default: break;
                case 'p':	 // 1 string to match.
                  if (memcmp(NameR.data()+17, ".or", 3))
                    break;
                  return Intrinsic::hexagon_S2_asr_i_p_or;	 // "exagon.S2.asr.i.p.or"
                case 'r':	 // 1 string to match.
                  if (memcmp(NameR.data()+17, ".or", 3))
                    break;
                  return Intrinsic::hexagon_S2_asr_i_r_or;	 // "exagon.S2.asr.i.r.or"
                }
                break;
              case 'r':	 // 2 strings to match.
                if (NameR[15] != '.')
                  break;
                switch (NameR[16]) {
                default: break;
                case 'p':	 // 1 string to match.
                  if (memcmp(NameR.data()+17, ".or", 3))
                    break;
                  return Intrinsic::hexagon_S2_asr_r_p_or;	 // "exagon.S2.asr.r.p.or"
                case 'r':	 // 1 string to match.
                  if (memcmp(NameR.data()+17, ".or", 3))
                    break;
                  return Intrinsic::hexagon_S2_asr_r_r_or;	 // "exagon.S2.asr.r.r.or"
                }
                break;
              }
              break;
            }
            break;
          case 'i':	 // 2 strings to match.
            if (NameR[11] != 'n')
              break;
            switch (NameR[12]) {
            default: break;
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+13, "ertp.rp", 7))
                break;
              return Intrinsic::hexagon_S2_insertp_rp;	 // "exagon.S2.insertp.rp"
            case 't':	 // 1 string to match.
              if (memcmp(NameR.data()+13, "erleave", 7))
                break;
              return Intrinsic::hexagon_S2_interleave;	 // "exagon.S2.interleave"
            }
            break;
          case 'l':	 // 6 strings to match.
            if (NameR[11] != 's')
              break;
            switch (NameR[12]) {
            default: break;
            case 'l':	 // 2 strings to match.
              if (memcmp(NameR.data()+13, ".r.", 3))
                break;
              switch (NameR[16]) {
              default: break;
              case 'p':	 // 1 string to match.
                if (memcmp(NameR.data()+17, ".or", 3))
                  break;
                return Intrinsic::hexagon_S2_lsl_r_p_or;	 // "exagon.S2.lsl.r.p.or"
              case 'r':	 // 1 string to match.
                if (memcmp(NameR.data()+17, ".or", 3))
                  break;
                return Intrinsic::hexagon_S2_lsl_r_r_or;	 // "exagon.S2.lsl.r.r.or"
              }
              break;
            case 'r':	 // 4 strings to match.
              if (NameR[13] != '.')
                break;
              switch (NameR[14]) {
              default: break;
              case 'i':	 // 2 strings to match.
                if (NameR[15] != '.')
                  break;
                switch (NameR[16]) {
                default: break;
                case 'p':	 // 1 string to match.
                  if (memcmp(NameR.data()+17, ".or", 3))
                    break;
                  return Intrinsic::hexagon_S2_lsr_i_p_or;	 // "exagon.S2.lsr.i.p.or"
                case 'r':	 // 1 string to match.
                  if (memcmp(NameR.data()+17, ".or", 3))
                    break;
                  return Intrinsic::hexagon_S2_lsr_i_r_or;	 // "exagon.S2.lsr.i.r.or"
                }
                break;
              case 'r':	 // 2 strings to match.
                if (NameR[15] != '.')
                  break;
                switch (NameR[16]) {
                default: break;
                case 'p':	 // 1 string to match.
                  if (memcmp(NameR.data()+17, ".or", 3))
                    break;
                  return Intrinsic::hexagon_S2_lsr_r_p_or;	 // "exagon.S2.lsr.r.p.or"
                case 'r':	 // 1 string to match.
                  if (memcmp(NameR.data()+17, ".or", 3))
                    break;
                  return Intrinsic::hexagon_S2_lsr_r_r_or;	 // "exagon.S2.lsr.r.r.or"
                }
                break;
              }
              break;
            }
            break;
          case 'v':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "rndpackwh", 9))
              break;
            return Intrinsic::hexagon_S2_vrndpackwh;	 // "exagon.S2.vrndpackwh"
          }
          break;
        case '4':	 // 5 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'e':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "xtract.rp", 9))
              break;
            return Intrinsic::hexagon_S4_extract_rp;	 // "exagon.S4.extract.rp"
          case 'o':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "ri.", 3))
              break;
            switch (NameR[14]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(NameR.data()+15, "sl.ri", 5))
                break;
              return Intrinsic::hexagon_S4_ori_asl_ri;	 // "exagon.S4.ori.asl.ri"
            case 'l':	 // 1 string to match.
              if (memcmp(NameR.data()+15, "sr.ri", 5))
                break;
              return Intrinsic::hexagon_S4_ori_lsr_ri;	 // "exagon.S4.ori.lsr.ri"
            }
            break;
          case 'v':	 // 2 strings to match.
            if (NameR[11] != 'x')
              break;
            switch (NameR[12]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(NameR.data()+13, "ddsubhr", 7))
                break;
              return Intrinsic::hexagon_S4_vxaddsubhr;	 // "exagon.S4.vxaddsubhr"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+13, "ubaddhr", 7))
                break;
              return Intrinsic::hexagon_S4_vxsubaddhr;	 // "exagon.S4.vxsubaddhr"
            }
            break;
          }
          break;
        case '5':	 // 1 string to match.
          if (memcmp(NameR.data()+9, ".asrhub.sat", 11))
            break;
          return Intrinsic::hexagon_S5_asrhub_sat;	 // "exagon.S5.asrhub.sat"
        }
        break;
      }
      break;
    case 21:	 // 96 strings to match.
      if (memcmp(NameR.data()+0, "exagon.", 7))
        break;
      switch (NameR[7]) {
      default: break;
      case 'A':	 // 16 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 14 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'a':	 // 6 strings to match.
            if (memcmp(NameR.data()+11, "ddh.", 4))
              break;
            switch (NameR[15]) {
            default: break;
            case 'h':	 // 4 strings to match.
              if (memcmp(NameR.data()+16, "16.", 3))
                break;
              switch (NameR[19]) {
              default: break;
              case 'h':	 // 2 strings to match.
                switch (NameR[20]) {
                default: break;
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_addh_h16_hh;	 // "exagon.A2.addh.h16.hh"
                case 'l':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_addh_h16_hl;	 // "exagon.A2.addh.h16.hl"
                }
                break;
              case 'l':	 // 2 strings to match.
                switch (NameR[20]) {
                default: break;
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_addh_h16_lh;	 // "exagon.A2.addh.h16.lh"
                case 'l':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_addh_h16_ll;	 // "exagon.A2.addh.h16.ll"
                }
                break;
              }
              break;
            case 'l':	 // 2 strings to match.
              if (memcmp(NameR.data()+16, "16.", 3))
                break;
              switch (NameR[19]) {
              default: break;
              case 'h':	 // 1 string to match.
                if (NameR[20] != 'l')
                  break;
                return Intrinsic::hexagon_A2_addh_l16_hl;	 // "exagon.A2.addh.l16.hl"
              case 'l':	 // 1 string to match.
                if (NameR[20] != 'l')
                  break;
                return Intrinsic::hexagon_A2_addh_l16_ll;	 // "exagon.A2.addh.l16.ll"
              }
              break;
            }
            break;
          case 's':	 // 6 strings to match.
            if (memcmp(NameR.data()+11, "ubh.", 4))
              break;
            switch (NameR[15]) {
            default: break;
            case 'h':	 // 4 strings to match.
              if (memcmp(NameR.data()+16, "16.", 3))
                break;
              switch (NameR[19]) {
              default: break;
              case 'h':	 // 2 strings to match.
                switch (NameR[20]) {
                default: break;
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_subh_h16_hh;	 // "exagon.A2.subh.h16.hh"
                case 'l':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_subh_h16_hl;	 // "exagon.A2.subh.h16.hl"
                }
                break;
              case 'l':	 // 2 strings to match.
                switch (NameR[20]) {
                default: break;
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_subh_h16_lh;	 // "exagon.A2.subh.h16.lh"
                case 'l':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_subh_h16_ll;	 // "exagon.A2.subh.h16.ll"
                }
                break;
              }
              break;
            case 'l':	 // 2 strings to match.
              if (memcmp(NameR.data()+16, "16.", 3))
                break;
              switch (NameR[19]) {
              default: break;
              case 'h':	 // 1 string to match.
                if (NameR[20] != 'l')
                  break;
                return Intrinsic::hexagon_A2_subh_l16_hl;	 // "exagon.A2.subh.l16.hl"
              case 'l':	 // 1 string to match.
                if (NameR[20] != 'l')
                  break;
                return Intrinsic::hexagon_A2_subh_l16_ll;	 // "exagon.A2.subh.l16.ll"
              }
              break;
            }
            break;
          case 'v':	 // 2 strings to match.
            if (NameR[11] != 'r')
              break;
            switch (NameR[12]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(NameR.data()+13, "ddub.acc", 8))
                break;
              return Intrinsic::hexagon_A2_vraddub_acc;	 // "exagon.A2.vraddub.acc"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+13, "adub.acc", 8))
                break;
              return Intrinsic::hexagon_A2_vrsadub_acc;	 // "exagon.A2.vrsadub.acc"
            }
            break;
          }
          break;
        case '4':	 // 2 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'b':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "oundscheck", 10))
              break;
            return Intrinsic::hexagon_A4_boundscheck;	 // "exagon.A4.boundscheck"
          case 'v':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "cmpbeq.any", 10))
              break;
            return Intrinsic::hexagon_A4_vcmpbeq_any;	 // "exagon.A4.vcmpbeq.any"
          }
          break;
        }
        break;
      case 'C':	 // 1 string to match.
        if (memcmp(NameR.data()+8, "4.fastcorner9", 13))
          break;
        return Intrinsic::hexagon_C4_fastcorner9;	 // "exagon.C4.fastcorner9"
      case 'M':	 // 16 strings to match.
        if (memcmp(NameR.data()+8, "2.", 2))
          break;
        switch (NameR[10]) {
        default: break;
        case 'm':	 // 12 strings to match.
          switch (NameR[11]) {
          default: break;
          case 'm':	 // 4 strings to match.
            if (memcmp(NameR.data()+12, "acu", 3))
              break;
            switch (NameR[15]) {
            default: break;
            case 'h':	 // 2 strings to match.
              if (memcmp(NameR.data()+16, "s.rs", 4))
                break;
              switch (NameR[20]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mmacuhs_rs0;	 // "exagon.M2.mmacuhs.rs0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mmacuhs_rs1;	 // "exagon.M2.mmacuhs.rs1"
              }
              break;
            case 'l':	 // 2 strings to match.
              if (memcmp(NameR.data()+16, "s.rs", 4))
                break;
              switch (NameR[20]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mmaculs_rs0;	 // "exagon.M2.mmaculs.rs0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mmaculs_rs1;	 // "exagon.M2.mmaculs.rs1"
              }
              break;
            }
            break;
          case 'p':	 // 8 strings to match.
            if (memcmp(NameR.data()+12, "yud.", 4))
              break;
            switch (NameR[16]) {
            default: break;
            case 'h':	 // 4 strings to match.
              switch (NameR[17]) {
              default: break;
              case 'h':	 // 2 strings to match.
                if (memcmp(NameR.data()+18, ".s", 2))
                  break;
                switch (NameR[20]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpyud_hh_s0;	 // "exagon.M2.mpyud.hh.s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpyud_hh_s1;	 // "exagon.M2.mpyud.hh.s1"
                }
                break;
              case 'l':	 // 2 strings to match.
                if (memcmp(NameR.data()+18, ".s", 2))
                  break;
                switch (NameR[20]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpyud_hl_s0;	 // "exagon.M2.mpyud.hl.s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpyud_hl_s1;	 // "exagon.M2.mpyud.hl.s1"
                }
                break;
              }
              break;
            case 'l':	 // 4 strings to match.
              switch (NameR[17]) {
              default: break;
              case 'h':	 // 2 strings to match.
                if (memcmp(NameR.data()+18, ".s", 2))
                  break;
                switch (NameR[20]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpyud_lh_s0;	 // "exagon.M2.mpyud.lh.s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpyud_lh_s1;	 // "exagon.M2.mpyud.lh.s1"
                }
                break;
              case 'l':	 // 2 strings to match.
                if (memcmp(NameR.data()+18, ".s", 2))
                  break;
                switch (NameR[20]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpyud_ll_s0;	 // "exagon.M2.mpyud.ll.s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpyud_ll_s1;	 // "exagon.M2.mpyud.ll.s1"
                }
                break;
              }
              break;
            }
            break;
          }
          break;
        case 'v':	 // 4 strings to match.
          if (memcmp(NameR.data()+11, "rcm", 3))
            break;
          switch (NameR[14]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (NameR[15] != 'c')
              break;
            switch (NameR[16]) {
            default: break;
            case 'i':	 // 1 string to match.
              if (memcmp(NameR.data()+17, ".s0c", 4))
                break;
              return Intrinsic::hexagon_M2_vrcmaci_s0c;	 // "exagon.M2.vrcmaci.s0c"
            case 'r':	 // 1 string to match.
              if (memcmp(NameR.data()+17, ".s0c", 4))
                break;
              return Intrinsic::hexagon_M2_vrcmacr_s0c;	 // "exagon.M2.vrcmacr.s0c"
            }
            break;
          case 'p':	 // 2 strings to match.
            if (NameR[15] != 'y')
              break;
            switch (NameR[16]) {
            default: break;
            case 'i':	 // 1 string to match.
              if (memcmp(NameR.data()+17, ".s0c", 4))
                break;
              return Intrinsic::hexagon_M2_vrcmpyi_s0c;	 // "exagon.M2.vrcmpyi.s0c"
            case 'r':	 // 1 string to match.
              if (memcmp(NameR.data()+17, ".s0c", 4))
                break;
              return Intrinsic::hexagon_M2_vrcmpyr_s0c;	 // "exagon.M2.vrcmpyr.s0c"
            }
            break;
          }
          break;
        }
        break;
      case 'S':	 // 63 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 56 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'a':	 // 32 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "dasl.rrri", 9))
                break;
              return Intrinsic::hexagon_S2_addasl_rrri;	 // "exagon.S2.addasl.rrri"
            case 's':	 // 31 strings to match.
              switch (NameR[12]) {
              default: break;
              case 'l':	 // 15 strings to match.
                if (NameR[13] != '.')
                  break;
                switch (NameR[14]) {
                default: break;
                case 'i':	 // 7 strings to match.
                  if (NameR[15] != '.')
                    break;
                  switch (NameR[16]) {
                  default: break;
                  case 'p':	 // 3 strings to match.
                    if (NameR[17] != '.')
                      break;
                    switch (NameR[18]) {
                    default: break;
                    case 'a':	 // 2 strings to match.
                      switch (NameR[19]) {
                      default: break;
                      case 'c':	 // 1 string to match.
                        if (NameR[20] != 'c')
                          break;
                        return Intrinsic::hexagon_S2_asl_i_p_acc;	 // "exagon.S2.asl.i.p.acc"
                      case 'n':	 // 1 string to match.
                        if (NameR[20] != 'd')
                          break;
                        return Intrinsic::hexagon_S2_asl_i_p_and;	 // "exagon.S2.asl.i.p.and"
                      }
                      break;
                    case 'n':	 // 1 string to match.
                      if (memcmp(NameR.data()+19, "ac", 2))
                        break;
                      return Intrinsic::hexagon_S2_asl_i_p_nac;	 // "exagon.S2.asl.i.p.nac"
                    }
                    break;
                  case 'r':	 // 4 strings to match.
                    if (NameR[17] != '.')
                      break;
                    switch (NameR[18]) {
                    default: break;
                    case 'a':	 // 2 strings to match.
                      switch (NameR[19]) {
                      default: break;
                      case 'c':	 // 1 string to match.
                        if (NameR[20] != 'c')
                          break;
                        return Intrinsic::hexagon_S2_asl_i_r_acc;	 // "exagon.S2.asl.i.r.acc"
                      case 'n':	 // 1 string to match.
                        if (NameR[20] != 'd')
                          break;
                        return Intrinsic::hexagon_S2_asl_i_r_and;	 // "exagon.S2.asl.i.r.and"
                      }
                      break;
                    case 'n':	 // 1 string to match.
                      if (memcmp(NameR.data()+19, "ac", 2))
                        break;
                      return Intrinsic::hexagon_S2_asl_i_r_nac;	 // "exagon.S2.asl.i.r.nac"
                    case 's':	 // 1 string to match.
                      if (memcmp(NameR.data()+19, "at", 2))
                        break;
                      return Intrinsic::hexagon_S2_asl_i_r_sat;	 // "exagon.S2.asl.i.r.sat"
                    }
                    break;
                  }
                  break;
                case 'r':	 // 8 strings to match.
                  if (NameR[15] != '.')
                    break;
                  switch (NameR[16]) {
                  default: break;
                  case 'p':	 // 4 strings to match.
                    if (NameR[17] != '.')
                      break;
                    switch (NameR[18]) {
                    default: break;
                    case 'a':	 // 2 strings to match.
                      switch (NameR[19]) {
                      default: break;
                      case 'c':	 // 1 string to match.
                        if (NameR[20] != 'c')
                          break;
                        return Intrinsic::hexagon_S2_asl_r_p_acc;	 // "exagon.S2.asl.r.p.acc"
                      case 'n':	 // 1 string to match.
                        if (NameR[20] != 'd')
                          break;
                        return Intrinsic::hexagon_S2_asl_r_p_and;	 // "exagon.S2.asl.r.p.and"
                      }
                      break;
                    case 'n':	 // 1 string to match.
                      if (memcmp(NameR.data()+19, "ac", 2))
                        break;
                      return Intrinsic::hexagon_S2_asl_r_p_nac;	 // "exagon.S2.asl.r.p.nac"
                    case 'x':	 // 1 string to match.
                      if (memcmp(NameR.data()+19, "or", 2))
                        break;
                      return Intrinsic::hexagon_S2_asl_r_p_xor;	 // "exagon.S2.asl.r.p.xor"
                    }
                    break;
                  case 'r':	 // 4 strings to match.
                    if (NameR[17] != '.')
                      break;
                    switch (NameR[18]) {
                    default: break;
                    case 'a':	 // 2 strings to match.
                      switch (NameR[19]) {
                      default: break;
                      case 'c':	 // 1 string to match.
                        if (NameR[20] != 'c')
                          break;
                        return Intrinsic::hexagon_S2_asl_r_r_acc;	 // "exagon.S2.asl.r.r.acc"
                      case 'n':	 // 1 string to match.
                        if (NameR[20] != 'd')
                          break;
                        return Intrinsic::hexagon_S2_asl_r_r_and;	 // "exagon.S2.asl.r.r.and"
                      }
                      break;
                    case 'n':	 // 1 string to match.
                      if (memcmp(NameR.data()+19, "ac", 2))
                        break;
                      return Intrinsic::hexagon_S2_asl_r_r_nac;	 // "exagon.S2.asl.r.r.nac"
                    case 's':	 // 1 string to match.
                      if (memcmp(NameR.data()+19, "at", 2))
                        break;
                      return Intrinsic::hexagon_S2_asl_r_r_sat;	 // "exagon.S2.asl.r.r.sat"
                    }
                    break;
                  }
                  break;
                }
                break;
              case 'r':	 // 16 strings to match.
                if (NameR[13] != '.')
                  break;
                switch (NameR[14]) {
                default: break;
                case 'i':	 // 8 strings to match.
                  if (NameR[15] != '.')
                    break;
                  switch (NameR[16]) {
                  default: break;
                  case 'p':	 // 4 strings to match.
                    if (NameR[17] != '.')
                      break;
                    switch (NameR[18]) {
                    default: break;
                    case 'a':	 // 2 strings to match.
                      switch (NameR[19]) {
                      default: break;
                      case 'c':	 // 1 string to match.
                        if (NameR[20] != 'c')
                          break;
                        return Intrinsic::hexagon_S2_asr_i_p_acc;	 // "exagon.S2.asr.i.p.acc"
                      case 'n':	 // 1 string to match.
                        if (NameR[20] != 'd')
                          break;
                        return Intrinsic::hexagon_S2_asr_i_p_and;	 // "exagon.S2.asr.i.p.and"
                      }
                      break;
                    case 'n':	 // 1 string to match.
                      if (memcmp(NameR.data()+19, "ac", 2))
                        break;
                      return Intrinsic::hexagon_S2_asr_i_p_nac;	 // "exagon.S2.asr.i.p.nac"
                    case 'r':	 // 1 string to match.
                      if (memcmp(NameR.data()+19, "nd", 2))
                        break;
                      return Intrinsic::hexagon_S2_asr_i_p_rnd;	 // "exagon.S2.asr.i.p.rnd"
                    }
                    break;
                  case 'r':	 // 4 strings to match.
                    if (NameR[17] != '.')
                      break;
                    switch (NameR[18]) {
                    default: break;
                    case 'a':	 // 2 strings to match.
                      switch (NameR[19]) {
                      default: break;
                      case 'c':	 // 1 string to match.
                        if (NameR[20] != 'c')
                          break;
                        return Intrinsic::hexagon_S2_asr_i_r_acc;	 // "exagon.S2.asr.i.r.acc"
                      case 'n':	 // 1 string to match.
                        if (NameR[20] != 'd')
                          break;
                        return Intrinsic::hexagon_S2_asr_i_r_and;	 // "exagon.S2.asr.i.r.and"
                      }
                      break;
                    case 'n':	 // 1 string to match.
                      if (memcmp(NameR.data()+19, "ac", 2))
                        break;
                      return Intrinsic::hexagon_S2_asr_i_r_nac;	 // "exagon.S2.asr.i.r.nac"
                    case 'r':	 // 1 string to match.
                      if (memcmp(NameR.data()+19, "nd", 2))
                        break;
                      return Intrinsic::hexagon_S2_asr_i_r_rnd;	 // "exagon.S2.asr.i.r.rnd"
                    }
                    break;
                  }
                  break;
                case 'r':	 // 8 strings to match.
                  if (NameR[15] != '.')
                    break;
                  switch (NameR[16]) {
                  default: break;
                  case 'p':	 // 4 strings to match.
                    if (NameR[17] != '.')
                      break;
                    switch (NameR[18]) {
                    default: break;
                    case 'a':	 // 2 strings to match.
                      switch (NameR[19]) {
                      default: break;
                      case 'c':	 // 1 string to match.
                        if (NameR[20] != 'c')
                          break;
                        return Intrinsic::hexagon_S2_asr_r_p_acc;	 // "exagon.S2.asr.r.p.acc"
                      case 'n':	 // 1 string to match.
                        if (NameR[20] != 'd')
                          break;
                        return Intrinsic::hexagon_S2_asr_r_p_and;	 // "exagon.S2.asr.r.p.and"
                      }
                      break;
                    case 'n':	 // 1 string to match.
                      if (memcmp(NameR.data()+19, "ac", 2))
                        break;
                      return Intrinsic::hexagon_S2_asr_r_p_nac;	 // "exagon.S2.asr.r.p.nac"
                    case 'x':	 // 1 string to match.
                      if (memcmp(NameR.data()+19, "or", 2))
                        break;
                      return Intrinsic::hexagon_S2_asr_r_p_xor;	 // "exagon.S2.asr.r.p.xor"
                    }
                    break;
                  case 'r':	 // 4 strings to match.
                    if (NameR[17] != '.')
                      break;
                    switch (NameR[18]) {
                    default: break;
                    case 'a':	 // 2 strings to match.
                      switch (NameR[19]) {
                      default: break;
                      case 'c':	 // 1 string to match.
                        if (NameR[20] != 'c')
                          break;
                        return Intrinsic::hexagon_S2_asr_r_r_acc;	 // "exagon.S2.asr.r.r.acc"
                      case 'n':	 // 1 string to match.
                        if (NameR[20] != 'd')
                          break;
                        return Intrinsic::hexagon_S2_asr_r_r_and;	 // "exagon.S2.asr.r.r.and"
                      }
                      break;
                    case 'n':	 // 1 string to match.
                      if (memcmp(NameR.data()+19, "ac", 2))
                        break;
                      return Intrinsic::hexagon_S2_asr_r_r_nac;	 // "exagon.S2.asr.r.r.nac"
                    case 's':	 // 1 string to match.
                      if (memcmp(NameR.data()+19, "at", 2))
                        break;
                      return Intrinsic::hexagon_S2_asr_r_r_sat;	 // "exagon.S2.asr.r.r.sat"
                    }
                    break;
                  }
                  break;
                }
                break;
              }
              break;
            }
            break;
          case 'e':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "xtractu.rp", 10))
              break;
            return Intrinsic::hexagon_S2_extractu_rp;	 // "exagon.S2.extractu.rp"
          case 'l':	 // 20 strings to match.
            if (NameR[11] != 's')
              break;
            switch (NameR[12]) {
            default: break;
            case 'l':	 // 7 strings to match.
              if (memcmp(NameR.data()+13, ".r.", 3))
                break;
              switch (NameR[16]) {
              default: break;
              case 'p':	 // 4 strings to match.
                if (NameR[17] != '.')
                  break;
                switch (NameR[18]) {
                default: break;
                case 'a':	 // 2 strings to match.
                  switch (NameR[19]) {
                  default: break;
                  case 'c':	 // 1 string to match.
                    if (NameR[20] != 'c')
                      break;
                    return Intrinsic::hexagon_S2_lsl_r_p_acc;	 // "exagon.S2.lsl.r.p.acc"
                  case 'n':	 // 1 string to match.
                    if (NameR[20] != 'd')
                      break;
                    return Intrinsic::hexagon_S2_lsl_r_p_and;	 // "exagon.S2.lsl.r.p.and"
                  }
                  break;
                case 'n':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ac", 2))
                    break;
                  return Intrinsic::hexagon_S2_lsl_r_p_nac;	 // "exagon.S2.lsl.r.p.nac"
                case 'x':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "or", 2))
                    break;
                  return Intrinsic::hexagon_S2_lsl_r_p_xor;	 // "exagon.S2.lsl.r.p.xor"
                }
                break;
              case 'r':	 // 3 strings to match.
                if (NameR[17] != '.')
                  break;
                switch (NameR[18]) {
                default: break;
                case 'a':	 // 2 strings to match.
                  switch (NameR[19]) {
                  default: break;
                  case 'c':	 // 1 string to match.
                    if (NameR[20] != 'c')
                      break;
                    return Intrinsic::hexagon_S2_lsl_r_r_acc;	 // "exagon.S2.lsl.r.r.acc"
                  case 'n':	 // 1 string to match.
                    if (NameR[20] != 'd')
                      break;
                    return Intrinsic::hexagon_S2_lsl_r_r_and;	 // "exagon.S2.lsl.r.r.and"
                  }
                  break;
                case 'n':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ac", 2))
                    break;
                  return Intrinsic::hexagon_S2_lsl_r_r_nac;	 // "exagon.S2.lsl.r.r.nac"
                }
                break;
              }
              break;
            case 'r':	 // 13 strings to match.
              if (NameR[13] != '.')
                break;
              switch (NameR[14]) {
              default: break;
              case 'i':	 // 6 strings to match.
                if (NameR[15] != '.')
                  break;
                switch (NameR[16]) {
                default: break;
                case 'p':	 // 3 strings to match.
                  if (NameR[17] != '.')
                    break;
                  switch (NameR[18]) {
                  default: break;
                  case 'a':	 // 2 strings to match.
                    switch (NameR[19]) {
                    default: break;
                    case 'c':	 // 1 string to match.
                      if (NameR[20] != 'c')
                        break;
                      return Intrinsic::hexagon_S2_lsr_i_p_acc;	 // "exagon.S2.lsr.i.p.acc"
                    case 'n':	 // 1 string to match.
                      if (NameR[20] != 'd')
                        break;
                      return Intrinsic::hexagon_S2_lsr_i_p_and;	 // "exagon.S2.lsr.i.p.and"
                    }
                    break;
                  case 'n':	 // 1 string to match.
                    if (memcmp(NameR.data()+19, "ac", 2))
                      break;
                    return Intrinsic::hexagon_S2_lsr_i_p_nac;	 // "exagon.S2.lsr.i.p.nac"
                  }
                  break;
                case 'r':	 // 3 strings to match.
                  if (NameR[17] != '.')
                    break;
                  switch (NameR[18]) {
                  default: break;
                  case 'a':	 // 2 strings to match.
                    switch (NameR[19]) {
                    default: break;
                    case 'c':	 // 1 string to match.
                      if (NameR[20] != 'c')
                        break;
                      return Intrinsic::hexagon_S2_lsr_i_r_acc;	 // "exagon.S2.lsr.i.r.acc"
                    case 'n':	 // 1 string to match.
                      if (NameR[20] != 'd')
                        break;
                      return Intrinsic::hexagon_S2_lsr_i_r_and;	 // "exagon.S2.lsr.i.r.and"
                    }
                    break;
                  case 'n':	 // 1 string to match.
                    if (memcmp(NameR.data()+19, "ac", 2))
                      break;
                    return Intrinsic::hexagon_S2_lsr_i_r_nac;	 // "exagon.S2.lsr.i.r.nac"
                  }
                  break;
                }
                break;
              case 'r':	 // 7 strings to match.
                if (NameR[15] != '.')
                  break;
                switch (NameR[16]) {
                default: break;
                case 'p':	 // 4 strings to match.
                  if (NameR[17] != '.')
                    break;
                  switch (NameR[18]) {
                  default: break;
                  case 'a':	 // 2 strings to match.
                    switch (NameR[19]) {
                    default: break;
                    case 'c':	 // 1 string to match.
                      if (NameR[20] != 'c')
                        break;
                      return Intrinsic::hexagon_S2_lsr_r_p_acc;	 // "exagon.S2.lsr.r.p.acc"
                    case 'n':	 // 1 string to match.
                      if (NameR[20] != 'd')
                        break;
                      return Intrinsic::hexagon_S2_lsr_r_p_and;	 // "exagon.S2.lsr.r.p.and"
                    }
                    break;
                  case 'n':	 // 1 string to match.
                    if (memcmp(NameR.data()+19, "ac", 2))
                      break;
                    return Intrinsic::hexagon_S2_lsr_r_p_nac;	 // "exagon.S2.lsr.r.p.nac"
                  case 'x':	 // 1 string to match.
                    if (memcmp(NameR.data()+19, "or", 2))
                      break;
                    return Intrinsic::hexagon_S2_lsr_r_p_xor;	 // "exagon.S2.lsr.r.p.xor"
                  }
                  break;
                case 'r':	 // 3 strings to match.
                  if (NameR[17] != '.')
                    break;
                  switch (NameR[18]) {
                  default: break;
                  case 'a':	 // 2 strings to match.
                    switch (NameR[19]) {
                    default: break;
                    case 'c':	 // 1 string to match.
                      if (NameR[20] != 'c')
                        break;
                      return Intrinsic::hexagon_S2_lsr_r_r_acc;	 // "exagon.S2.lsr.r.r.acc"
                    case 'n':	 // 1 string to match.
                      if (NameR[20] != 'd')
                        break;
                      return Intrinsic::hexagon_S2_lsr_r_r_and;	 // "exagon.S2.lsr.r.r.and"
                    }
                    break;
                  case 'n':	 // 1 string to match.
                    if (memcmp(NameR.data()+19, "ac", 2))
                      break;
                    return Intrinsic::hexagon_S2_lsr_r_r_nac;	 // "exagon.S2.lsr.r.r.nac"
                  }
                  break;
                }
                break;
              }
              break;
            }
            break;
          case 't':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "ogglebit.", 9))
              break;
            switch (NameR[20]) {
            default: break;
            case 'i':	 // 1 string to match.
              return Intrinsic::hexagon_S2_togglebit_i;	 // "exagon.S2.togglebit.i"
            case 'r':	 // 1 string to match.
              return Intrinsic::hexagon_S2_togglebit_r;	 // "exagon.S2.togglebit.r"
            }
            break;
          case 'v':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "rndpackwhs", 10))
              break;
            return Intrinsic::hexagon_S2_vrndpackwhs;	 // "exagon.S2.vrndpackwhs"
          }
          break;
        case '4':	 // 7 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'a':	 // 4 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'd':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "di.", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case 'a':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "sl.ri", 5))
                  break;
                return Intrinsic::hexagon_S4_addi_asl_ri;	 // "exagon.S4.addi.asl.ri"
              case 'l':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "sr.ri", 5))
                  break;
                return Intrinsic::hexagon_S4_addi_lsr_ri;	 // "exagon.S4.addi.lsr.ri"
              }
              break;
            case 'n':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "di.", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case 'a':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "sl.ri", 5))
                  break;
                return Intrinsic::hexagon_S4_andi_asl_ri;	 // "exagon.S4.andi.asl.ri"
              case 'l':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "sr.ri", 5))
                  break;
                return Intrinsic::hexagon_S4_andi_lsr_ri;	 // "exagon.S4.andi.lsr.ri"
              }
              break;
            }
            break;
          case 'e':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "xtractp.rp", 10))
              break;
            return Intrinsic::hexagon_S4_extractp_rp;	 // "exagon.S4.extractp.rp"
          case 's':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "ubi.", 4))
              break;
            switch (NameR[15]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(NameR.data()+16, "sl.ri", 5))
                break;
              return Intrinsic::hexagon_S4_subi_asl_ri;	 // "exagon.S4.subi.asl.ri"
            case 'l':	 // 1 string to match.
              if (memcmp(NameR.data()+16, "sr.ri", 5))
                break;
              return Intrinsic::hexagon_S4_subi_lsr_ri;	 // "exagon.S4.subi.lsr.ri"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 22:	 // 9 strings to match.
      if (memcmp(NameR.data()+0, "exagon.", 7))
        break;
      switch (NameR[7]) {
      default: break;
      case 'A':	 // 2 strings to match.
        if (memcmp(NameR.data()+8, "4.round.r", 9))
          break;
        switch (NameR[17]) {
        default: break;
        case 'i':	 // 1 string to match.
          if (memcmp(NameR.data()+18, ".sat", 4))
            break;
          return Intrinsic::hexagon_A4_round_ri_sat;	 // "exagon.A4.round.ri.sat"
        case 'r':	 // 1 string to match.
          if (memcmp(NameR.data()+18, ".sat", 4))
            break;
          return Intrinsic::hexagon_A4_round_rr_sat;	 // "exagon.A4.round.rr.sat"
        }
        break;
      case 'M':	 // 1 string to match.
        if (memcmp(NameR.data()+8, "2.vrcmpys.s1rp", 14))
          break;
        return Intrinsic::hexagon_M2_vrcmpys_s1rp;	 // "exagon.M2.vrcmpys.s1rp"
      case 'S':	 // 6 strings to match.
        if (memcmp(NameR.data()+8, "2.", 2))
          break;
        switch (NameR[10]) {
        default: break;
        case 'a':	 // 2 strings to match.
          if (memcmp(NameR.data()+11, "sl.i.", 5))
            break;
          switch (NameR[16]) {
          default: break;
          case 'p':	 // 1 string to match.
            if (memcmp(NameR.data()+17, ".xacc", 5))
              break;
            return Intrinsic::hexagon_S2_asl_i_p_xacc;	 // "exagon.S2.asl.i.p.xacc"
          case 'r':	 // 1 string to match.
            if (memcmp(NameR.data()+17, ".xacc", 5))
              break;
            return Intrinsic::hexagon_S2_asl_i_r_xacc;	 // "exagon.S2.asl.i.r.xacc"
          }
          break;
        case 'd':	 // 1 string to match.
          if (memcmp(NameR.data()+11, "einterleave", 11))
            break;
          return Intrinsic::hexagon_S2_deinterleave;	 // "exagon.S2.deinterleave"
        case 'e':	 // 1 string to match.
          if (memcmp(NameR.data()+11, "xtractup.rp", 11))
            break;
          return Intrinsic::hexagon_S2_extractup_rp;	 // "exagon.S2.extractup.rp"
        case 'l':	 // 2 strings to match.
          if (memcmp(NameR.data()+11, "sr.i.", 5))
            break;
          switch (NameR[16]) {
          default: break;
          case 'p':	 // 1 string to match.
            if (memcmp(NameR.data()+17, ".xacc", 5))
              break;
            return Intrinsic::hexagon_S2_lsr_i_p_xacc;	 // "exagon.S2.lsr.i.p.xacc"
          case 'r':	 // 1 string to match.
            if (memcmp(NameR.data()+17, ".xacc", 5))
              break;
            return Intrinsic::hexagon_S2_lsr_i_r_xacc;	 // "exagon.S2.lsr.i.r.xacc"
          }
          break;
        }
        break;
      }
      break;
    case 23:	 // 42 strings to match.
      if (memcmp(NameR.data()+0, "exagon.", 7))
        break;
      switch (NameR[7]) {
      default: break;
      case 'M':	 // 38 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 35 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'm':	 // 33 strings to match.
            if (memcmp(NameR.data()+11, "py.", 3))
              break;
            switch (NameR[14]) {
            default: break;
            case 'a':	 // 8 strings to match.
              if (memcmp(NameR.data()+15, "cc.", 3))
                break;
              switch (NameR[18]) {
              default: break;
              case 'h':	 // 4 strings to match.
                switch (NameR[19]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(NameR.data()+20, ".s", 2))
                    break;
                  switch (NameR[22]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_acc_hh_s0;	 // "exagon.M2.mpy.acc.hh.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_acc_hh_s1;	 // "exagon.M2.mpy.acc.hh.s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(NameR.data()+20, ".s", 2))
                    break;
                  switch (NameR[22]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_acc_hl_s0;	 // "exagon.M2.mpy.acc.hl.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_acc_hl_s1;	 // "exagon.M2.mpy.acc.hl.s1"
                  }
                  break;
                }
                break;
              case 'l':	 // 4 strings to match.
                switch (NameR[19]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(NameR.data()+20, ".s", 2))
                    break;
                  switch (NameR[22]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_acc_lh_s0;	 // "exagon.M2.mpy.acc.lh.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_acc_lh_s1;	 // "exagon.M2.mpy.acc.lh.s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(NameR.data()+20, ".s", 2))
                    break;
                  switch (NameR[22]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_acc_ll_s0;	 // "exagon.M2.mpy.acc.ll.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_acc_ll_s1;	 // "exagon.M2.mpy.acc.ll.s1"
                  }
                  break;
                }
                break;
              }
              break;
            case 'n':	 // 8 strings to match.
              if (memcmp(NameR.data()+15, "ac.", 3))
                break;
              switch (NameR[18]) {
              default: break;
              case 'h':	 // 4 strings to match.
                switch (NameR[19]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(NameR.data()+20, ".s", 2))
                    break;
                  switch (NameR[22]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_nac_hh_s0;	 // "exagon.M2.mpy.nac.hh.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_nac_hh_s1;	 // "exagon.M2.mpy.nac.hh.s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(NameR.data()+20, ".s", 2))
                    break;
                  switch (NameR[22]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_nac_hl_s0;	 // "exagon.M2.mpy.nac.hl.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_nac_hl_s1;	 // "exagon.M2.mpy.nac.hl.s1"
                  }
                  break;
                }
                break;
              case 'l':	 // 4 strings to match.
                switch (NameR[19]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(NameR.data()+20, ".s", 2))
                    break;
                  switch (NameR[22]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_nac_lh_s0;	 // "exagon.M2.mpy.nac.lh.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_nac_lh_s1;	 // "exagon.M2.mpy.nac.lh.s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(NameR.data()+20, ".s", 2))
                    break;
                  switch (NameR[22]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_nac_ll_s0;	 // "exagon.M2.mpy.nac.ll.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_nac_ll_s1;	 // "exagon.M2.mpy.nac.ll.s1"
                  }
                  break;
                }
                break;
              }
              break;
            case 'r':	 // 8 strings to match.
              if (memcmp(NameR.data()+15, "nd.", 3))
                break;
              switch (NameR[18]) {
              default: break;
              case 'h':	 // 4 strings to match.
                switch (NameR[19]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(NameR.data()+20, ".s", 2))
                    break;
                  switch (NameR[22]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_rnd_hh_s0;	 // "exagon.M2.mpy.rnd.hh.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_rnd_hh_s1;	 // "exagon.M2.mpy.rnd.hh.s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(NameR.data()+20, ".s", 2))
                    break;
                  switch (NameR[22]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_rnd_hl_s0;	 // "exagon.M2.mpy.rnd.hl.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_rnd_hl_s1;	 // "exagon.M2.mpy.rnd.hl.s1"
                  }
                  break;
                }
                break;
              case 'l':	 // 4 strings to match.
                switch (NameR[19]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(NameR.data()+20, ".s", 2))
                    break;
                  switch (NameR[22]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_rnd_lh_s0;	 // "exagon.M2.mpy.rnd.lh.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_rnd_lh_s1;	 // "exagon.M2.mpy.rnd.lh.s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(NameR.data()+20, ".s", 2))
                    break;
                  switch (NameR[22]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_rnd_ll_s0;	 // "exagon.M2.mpy.rnd.ll.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_rnd_ll_s1;	 // "exagon.M2.mpy.rnd.ll.s1"
                  }
                  break;
                }
                break;
              }
              break;
            case 's':	 // 8 strings to match.
              if (memcmp(NameR.data()+15, "at.", 3))
                break;
              switch (NameR[18]) {
              default: break;
              case 'h':	 // 4 strings to match.
                switch (NameR[19]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(NameR.data()+20, ".s", 2))
                    break;
                  switch (NameR[22]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_sat_hh_s0;	 // "exagon.M2.mpy.sat.hh.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_sat_hh_s1;	 // "exagon.M2.mpy.sat.hh.s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(NameR.data()+20, ".s", 2))
                    break;
                  switch (NameR[22]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_sat_hl_s0;	 // "exagon.M2.mpy.sat.hl.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_sat_hl_s1;	 // "exagon.M2.mpy.sat.hl.s1"
                  }
                  break;
                }
                break;
              case 'l':	 // 4 strings to match.
                switch (NameR[19]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(NameR.data()+20, ".s", 2))
                    break;
                  switch (NameR[22]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_sat_lh_s0;	 // "exagon.M2.mpy.sat.lh.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_sat_lh_s1;	 // "exagon.M2.mpy.sat.lh.s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(NameR.data()+20, ".s", 2))
                    break;
                  switch (NameR[22]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_sat_ll_s0;	 // "exagon.M2.mpy.sat.ll.s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpy_sat_ll_s1;	 // "exagon.M2.mpy.sat.ll.s1"
                  }
                  break;
                }
                break;
              }
              break;
            case 'u':	 // 1 string to match.
              if (memcmp(NameR.data()+15, "p.s1.sat", 8))
                break;
              return Intrinsic::hexagon_M2_mpy_up_s1_sat;	 // "exagon.M2.mpy.up.s1.sat"
            }
            break;
          case 'v':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "mpy2s.s", 7))
              break;
            switch (NameR[18]) {
            default: break;
            case '0':	 // 1 string to match.
              if (memcmp(NameR.data()+19, "pack", 4))
                break;
              return Intrinsic::hexagon_M2_vmpy2s_s0pack;	 // "exagon.M2.vmpy2s.s0pack"
            case '1':	 // 1 string to match.
              if (memcmp(NameR.data()+19, "pack", 4))
                break;
              return Intrinsic::hexagon_M2_vmpy2s_s1pack;	 // "exagon.M2.vmpy2s.s1pack"
            }
            break;
          }
          break;
        case '4':	 // 3 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'm':	 // 2 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "c.up.s1.sat", 11))
                break;
              return Intrinsic::hexagon_M4_mac_up_s1_sat;	 // "exagon.M4.mac.up.s1.sat"
            case 'p':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "yri.addr.u2", 11))
                break;
              return Intrinsic::hexagon_M4_mpyri_addr_u2;	 // "exagon.M4.mpyri.addr.u2"
            }
            break;
          case 'n':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "ac.up.s1.sat", 12))
              break;
            return Intrinsic::hexagon_M4_nac_up_s1_sat;	 // "exagon.M4.nac.up.s1.sat"
          }
          break;
        }
        break;
      case 'S':	 // 4 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 2 strings to match.
          if (memcmp(NameR.data()+9, ".vsat", 5))
            break;
          switch (NameR[14]) {
          default: break;
          case 'h':	 // 1 string to match.
            if (memcmp(NameR.data()+15, "b.nopack", 8))
              break;
            return Intrinsic::hexagon_S2_vsathb_nopack;	 // "exagon.S2.vsathb.nopack"
          case 'w':	 // 1 string to match.
            if (memcmp(NameR.data()+15, "h.nopack", 8))
              break;
            return Intrinsic::hexagon_S2_vsatwh_nopack;	 // "exagon.S2.vsatwh.nopack"
          }
          break;
        case '4':	 // 1 string to match.
          if (memcmp(NameR.data()+9, ".vrcrotate.acc", 14))
            break;
          return Intrinsic::hexagon_S4_vrcrotate_acc;	 // "exagon.S4.vrcrotate.acc"
        case 'I':	 // 1 string to match.
          if (memcmp(NameR.data()+9, ".to.SXTHI.asrh", 14))
            break;
          return Intrinsic::hexagon_SI_to_SXTHI_asrh;	 // "exagon.SI.to.SXTHI.asrh"
        }
        break;
      }
      break;
    case 24:	 // 64 strings to match.
      if (memcmp(NameR.data()+0, "exagon.", 7))
        break;
      switch (NameR[7]) {
      default: break;
      case 'F':	 // 4 strings to match.
        if (memcmp(NameR.data()+8, "2.conv.", 7))
          break;
        switch (NameR[15]) {
        default: break;
        case 'd':	 // 2 strings to match.
          if (memcmp(NameR.data()+16, "f2", 2))
            break;
          switch (NameR[18]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(NameR.data()+19, ".chop", 5))
              break;
            return Intrinsic::hexagon_F2_conv_df2d_chop;	 // "exagon.F2.conv.df2d.chop"
          case 'w':	 // 1 string to match.
            if (memcmp(NameR.data()+19, ".chop", 5))
              break;
            return Intrinsic::hexagon_F2_conv_df2w_chop;	 // "exagon.F2.conv.df2w.chop"
          }
          break;
        case 's':	 // 2 strings to match.
          if (memcmp(NameR.data()+16, "f2", 2))
            break;
          switch (NameR[18]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(NameR.data()+19, ".chop", 5))
              break;
            return Intrinsic::hexagon_F2_conv_sf2d_chop;	 // "exagon.F2.conv.sf2d.chop"
          case 'w':	 // 1 string to match.
            if (memcmp(NameR.data()+19, ".chop", 5))
              break;
            return Intrinsic::hexagon_F2_conv_sf2w_chop;	 // "exagon.F2.conv.sf2w.chop"
          }
          break;
        }
        break;
      case 'M':	 // 56 strings to match.
        switch (NameR[8]) {
        default: break;
        case '2':	 // 52 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'd':	 // 5 strings to match.
            if (memcmp(NameR.data()+11, "pmpy", 4))
              break;
            switch (NameR[15]) {
            default: break;
            case 's':	 // 3 strings to match.
              if (memcmp(NameR.data()+16, "s.", 2))
                break;
              switch (NameR[18]) {
              default: break;
              case 'a':	 // 1 string to match.
                if (memcmp(NameR.data()+19, "cc.s0", 5))
                  break;
                return Intrinsic::hexagon_M2_dpmpyss_acc_s0;	 // "exagon.M2.dpmpyss.acc.s0"
              case 'n':	 // 1 string to match.
                if (memcmp(NameR.data()+19, "ac.s0", 5))
                  break;
                return Intrinsic::hexagon_M2_dpmpyss_nac_s0;	 // "exagon.M2.dpmpyss.nac.s0"
              case 'r':	 // 1 string to match.
                if (memcmp(NameR.data()+19, "nd.s0", 5))
                  break;
                return Intrinsic::hexagon_M2_dpmpyss_rnd_s0;	 // "exagon.M2.dpmpyss.rnd.s0"
              }
              break;
            case 'u':	 // 2 strings to match.
              if (memcmp(NameR.data()+16, "u.", 2))
                break;
              switch (NameR[18]) {
              default: break;
              case 'a':	 // 1 string to match.
                if (memcmp(NameR.data()+19, "cc.s0", 5))
                  break;
                return Intrinsic::hexagon_M2_dpmpyuu_acc_s0;	 // "exagon.M2.dpmpyuu.acc.s0"
              case 'n':	 // 1 string to match.
                if (memcmp(NameR.data()+19, "ac.s0", 5))
                  break;
                return Intrinsic::hexagon_M2_dpmpyuu_nac_s0;	 // "exagon.M2.dpmpyuu.nac.s0"
              }
              break;
            }
            break;
          case 'm':	 // 40 strings to match.
            if (memcmp(NameR.data()+11, "py", 2))
              break;
            switch (NameR[13]) {
            default: break;
            case 'd':	 // 24 strings to match.
              if (NameR[14] != '.')
                break;
              switch (NameR[15]) {
              default: break;
              case 'a':	 // 8 strings to match.
                if (memcmp(NameR.data()+16, "cc.", 3))
                  break;
                switch (NameR[19]) {
                default: break;
                case 'h':	 // 4 strings to match.
                  switch (NameR[20]) {
                  default: break;
                  case 'h':	 // 2 strings to match.
                    if (memcmp(NameR.data()+21, ".s", 2))
                      break;
                    switch (NameR[23]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_acc_hh_s0;	 // "exagon.M2.mpyd.acc.hh.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_acc_hh_s1;	 // "exagon.M2.mpyd.acc.hh.s1"
                    }
                    break;
                  case 'l':	 // 2 strings to match.
                    if (memcmp(NameR.data()+21, ".s", 2))
                      break;
                    switch (NameR[23]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_acc_hl_s0;	 // "exagon.M2.mpyd.acc.hl.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_acc_hl_s1;	 // "exagon.M2.mpyd.acc.hl.s1"
                    }
                    break;
                  }
                  break;
                case 'l':	 // 4 strings to match.
                  switch (NameR[20]) {
                  default: break;
                  case 'h':	 // 2 strings to match.
                    if (memcmp(NameR.data()+21, ".s", 2))
                      break;
                    switch (NameR[23]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_acc_lh_s0;	 // "exagon.M2.mpyd.acc.lh.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_acc_lh_s1;	 // "exagon.M2.mpyd.acc.lh.s1"
                    }
                    break;
                  case 'l':	 // 2 strings to match.
                    if (memcmp(NameR.data()+21, ".s", 2))
                      break;
                    switch (NameR[23]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_acc_ll_s0;	 // "exagon.M2.mpyd.acc.ll.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_acc_ll_s1;	 // "exagon.M2.mpyd.acc.ll.s1"
                    }
                    break;
                  }
                  break;
                }
                break;
              case 'n':	 // 8 strings to match.
                if (memcmp(NameR.data()+16, "ac.", 3))
                  break;
                switch (NameR[19]) {
                default: break;
                case 'h':	 // 4 strings to match.
                  switch (NameR[20]) {
                  default: break;
                  case 'h':	 // 2 strings to match.
                    if (memcmp(NameR.data()+21, ".s", 2))
                      break;
                    switch (NameR[23]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_nac_hh_s0;	 // "exagon.M2.mpyd.nac.hh.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_nac_hh_s1;	 // "exagon.M2.mpyd.nac.hh.s1"
                    }
                    break;
                  case 'l':	 // 2 strings to match.
                    if (memcmp(NameR.data()+21, ".s", 2))
                      break;
                    switch (NameR[23]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_nac_hl_s0;	 // "exagon.M2.mpyd.nac.hl.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_nac_hl_s1;	 // "exagon.M2.mpyd.nac.hl.s1"
                    }
                    break;
                  }
                  break;
                case 'l':	 // 4 strings to match.
                  switch (NameR[20]) {
                  default: break;
                  case 'h':	 // 2 strings to match.
                    if (memcmp(NameR.data()+21, ".s", 2))
                      break;
                    switch (NameR[23]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_nac_lh_s0;	 // "exagon.M2.mpyd.nac.lh.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_nac_lh_s1;	 // "exagon.M2.mpyd.nac.lh.s1"
                    }
                    break;
                  case 'l':	 // 2 strings to match.
                    if (memcmp(NameR.data()+21, ".s", 2))
                      break;
                    switch (NameR[23]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_nac_ll_s0;	 // "exagon.M2.mpyd.nac.ll.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_nac_ll_s1;	 // "exagon.M2.mpyd.nac.ll.s1"
                    }
                    break;
                  }
                  break;
                }
                break;
              case 'r':	 // 8 strings to match.
                if (memcmp(NameR.data()+16, "nd.", 3))
                  break;
                switch (NameR[19]) {
                default: break;
                case 'h':	 // 4 strings to match.
                  switch (NameR[20]) {
                  default: break;
                  case 'h':	 // 2 strings to match.
                    if (memcmp(NameR.data()+21, ".s", 2))
                      break;
                    switch (NameR[23]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_rnd_hh_s0;	 // "exagon.M2.mpyd.rnd.hh.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_rnd_hh_s1;	 // "exagon.M2.mpyd.rnd.hh.s1"
                    }
                    break;
                  case 'l':	 // 2 strings to match.
                    if (memcmp(NameR.data()+21, ".s", 2))
                      break;
                    switch (NameR[23]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_rnd_hl_s0;	 // "exagon.M2.mpyd.rnd.hl.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_rnd_hl_s1;	 // "exagon.M2.mpyd.rnd.hl.s1"
                    }
                    break;
                  }
                  break;
                case 'l':	 // 4 strings to match.
                  switch (NameR[20]) {
                  default: break;
                  case 'h':	 // 2 strings to match.
                    if (memcmp(NameR.data()+21, ".s", 2))
                      break;
                    switch (NameR[23]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_rnd_lh_s0;	 // "exagon.M2.mpyd.rnd.lh.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_rnd_lh_s1;	 // "exagon.M2.mpyd.rnd.lh.s1"
                    }
                    break;
                  case 'l':	 // 2 strings to match.
                    if (memcmp(NameR.data()+21, ".s", 2))
                      break;
                    switch (NameR[23]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_rnd_ll_s0;	 // "exagon.M2.mpyd.rnd.ll.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyd_rnd_ll_s1;	 // "exagon.M2.mpyd.rnd.ll.s1"
                    }
                    break;
                  }
                  break;
                }
                break;
              }
              break;
            case 'u':	 // 16 strings to match.
              if (NameR[14] != '.')
                break;
              switch (NameR[15]) {
              default: break;
              case 'a':	 // 8 strings to match.
                if (memcmp(NameR.data()+16, "cc.", 3))
                  break;
                switch (NameR[19]) {
                default: break;
                case 'h':	 // 4 strings to match.
                  switch (NameR[20]) {
                  default: break;
                  case 'h':	 // 2 strings to match.
                    if (memcmp(NameR.data()+21, ".s", 2))
                      break;
                    switch (NameR[23]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyu_acc_hh_s0;	 // "exagon.M2.mpyu.acc.hh.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyu_acc_hh_s1;	 // "exagon.M2.mpyu.acc.hh.s1"
                    }
                    break;
                  case 'l':	 // 2 strings to match.
                    if (memcmp(NameR.data()+21, ".s", 2))
                      break;
                    switch (NameR[23]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyu_acc_hl_s0;	 // "exagon.M2.mpyu.acc.hl.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyu_acc_hl_s1;	 // "exagon.M2.mpyu.acc.hl.s1"
                    }
                    break;
                  }
                  break;
                case 'l':	 // 4 strings to match.
                  switch (NameR[20]) {
                  default: break;
                  case 'h':	 // 2 strings to match.
                    if (memcmp(NameR.data()+21, ".s", 2))
                      break;
                    switch (NameR[23]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyu_acc_lh_s0;	 // "exagon.M2.mpyu.acc.lh.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyu_acc_lh_s1;	 // "exagon.M2.mpyu.acc.lh.s1"
                    }
                    break;
                  case 'l':	 // 2 strings to match.
                    if (memcmp(NameR.data()+21, ".s", 2))
                      break;
                    switch (NameR[23]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyu_acc_ll_s0;	 // "exagon.M2.mpyu.acc.ll.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyu_acc_ll_s1;	 // "exagon.M2.mpyu.acc.ll.s1"
                    }
                    break;
                  }
                  break;
                }
                break;
              case 'n':	 // 8 strings to match.
                if (memcmp(NameR.data()+16, "ac.", 3))
                  break;
                switch (NameR[19]) {
                default: break;
                case 'h':	 // 4 strings to match.
                  switch (NameR[20]) {
                  default: break;
                  case 'h':	 // 2 strings to match.
                    if (memcmp(NameR.data()+21, ".s", 2))
                      break;
                    switch (NameR[23]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyu_nac_hh_s0;	 // "exagon.M2.mpyu.nac.hh.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyu_nac_hh_s1;	 // "exagon.M2.mpyu.nac.hh.s1"
                    }
                    break;
                  case 'l':	 // 2 strings to match.
                    if (memcmp(NameR.data()+21, ".s", 2))
                      break;
                    switch (NameR[23]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyu_nac_hl_s0;	 // "exagon.M2.mpyu.nac.hl.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyu_nac_hl_s1;	 // "exagon.M2.mpyu.nac.hl.s1"
                    }
                    break;
                  }
                  break;
                case 'l':	 // 4 strings to match.
                  switch (NameR[20]) {
                  default: break;
                  case 'h':	 // 2 strings to match.
                    if (memcmp(NameR.data()+21, ".s", 2))
                      break;
                    switch (NameR[23]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyu_nac_lh_s0;	 // "exagon.M2.mpyu.nac.lh.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyu_nac_lh_s1;	 // "exagon.M2.mpyu.nac.lh.s1"
                    }
                    break;
                  case 'l':	 // 2 strings to match.
                    if (memcmp(NameR.data()+21, ".s", 2))
                      break;
                    switch (NameR[23]) {
                    default: break;
                    case '0':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyu_nac_ll_s0;	 // "exagon.M2.mpyu.nac.ll.s0"
                    case '1':	 // 1 string to match.
                      return Intrinsic::hexagon_M2_mpyu_nac_ll_s1;	 // "exagon.M2.mpyu.nac.ll.s1"
                    }
                    break;
                  }
                  break;
                }
                break;
              }
              break;
            }
            break;
          case 'v':	 // 7 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'c':	 // 6 strings to match.
              if (NameR[12] != 'm')
                break;
              switch (NameR[13]) {
              default: break;
              case 'a':	 // 2 strings to match.
                if (memcmp(NameR.data()+14, "c.s0.sat.", 9))
                  break;
                switch (NameR[23]) {
                default: break;
                case 'i':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_vcmac_s0_sat_i;	 // "exagon.M2.vcmac.s0.sat.i"
                case 'r':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_vcmac_s0_sat_r;	 // "exagon.M2.vcmac.s0.sat.r"
                }
                break;
              case 'p':	 // 4 strings to match.
                if (memcmp(NameR.data()+14, "y.s", 3))
                  break;
                switch (NameR[17]) {
                default: break;
                case '0':	 // 2 strings to match.
                  if (memcmp(NameR.data()+18, ".sat.", 5))
                    break;
                  switch (NameR[23]) {
                  default: break;
                  case 'i':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_vcmpy_s0_sat_i;	 // "exagon.M2.vcmpy.s0.sat.i"
                  case 'r':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_vcmpy_s0_sat_r;	 // "exagon.M2.vcmpy.s0.sat.r"
                  }
                  break;
                case '1':	 // 2 strings to match.
                  if (memcmp(NameR.data()+18, ".sat.", 5))
                    break;
                  switch (NameR[23]) {
                  default: break;
                  case 'i':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_vcmpy_s1_sat_i;	 // "exagon.M2.vcmpy.s1.sat.i"
                  case 'r':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_vcmpy_s1_sat_r;	 // "exagon.M2.vcmpy.s1.sat.r"
                  }
                  break;
                }
                break;
              }
              break;
            case 'r':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "cmpys.acc.s1", 12))
                break;
              return Intrinsic::hexagon_M2_vrcmpys_acc_s1;	 // "exagon.M2.vrcmpys.acc.s1"
            }
            break;
          }
          break;
        case '4':	 // 4 strings to match.
          if (memcmp(NameR.data()+9, ".vrmpy", 6))
            break;
          switch (NameR[15]) {
          default: break;
          case 'e':	 // 2 strings to match.
            if (memcmp(NameR.data()+16, "h.acc.s", 7))
              break;
            switch (NameR[23]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M4_vrmpyeh_acc_s0;	 // "exagon.M4.vrmpyeh.acc.s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M4_vrmpyeh_acc_s1;	 // "exagon.M4.vrmpyeh.acc.s1"
            }
            break;
          case 'o':	 // 2 strings to match.
            if (memcmp(NameR.data()+16, "h.acc.s", 7))
              break;
            switch (NameR[23]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M4_vrmpyoh_acc_s0;	 // "exagon.M4.vrmpyoh.acc.s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M4_vrmpyoh_acc_s1;	 // "exagon.M4.vrmpyoh.acc.s1"
            }
            break;
          }
          break;
        }
        break;
      case 'S':	 // 4 strings to match.
        if (memcmp(NameR.data()+8, "2.", 2))
          break;
        switch (NameR[10]) {
        default: break;
        case 'a':	 // 2 strings to match.
          if (memcmp(NameR.data()+11, "sr.", 3))
            break;
          switch (NameR[14]) {
          default: break;
          case 'i':	 // 1 string to match.
            if (memcmp(NameR.data()+15, ".svw.trun", 9))
              break;
            return Intrinsic::hexagon_S2_asr_i_svw_trun;	 // "exagon.S2.asr.i.svw.trun"
          case 'r':	 // 1 string to match.
            if (memcmp(NameR.data()+15, ".svw.trun", 9))
              break;
            return Intrinsic::hexagon_S2_asr_r_svw_trun;	 // "exagon.S2.asr.r.svw.trun"
          }
          break;
        case 'v':	 // 2 strings to match.
          if (memcmp(NameR.data()+11, "sat", 3))
            break;
          switch (NameR[14]) {
          default: break;
          case 'h':	 // 1 string to match.
            if (memcmp(NameR.data()+15, "ub.nopack", 9))
              break;
            return Intrinsic::hexagon_S2_vsathub_nopack;	 // "exagon.S2.vsathub.nopack"
          case 'w':	 // 1 string to match.
            if (memcmp(NameR.data()+15, "uh.nopack", 9))
              break;
            return Intrinsic::hexagon_S2_vsatwuh_nopack;	 // "exagon.S2.vsatwuh.nopack"
          }
          break;
        }
        break;
      }
      break;
    case 25:	 // 33 strings to match.
      if (memcmp(NameR.data()+0, "exagon.", 7))
        break;
      switch (NameR[7]) {
      default: break;
      case 'A':	 // 12 strings to match.
        if (memcmp(NameR.data()+8, "2.", 2))
          break;
        switch (NameR[10]) {
        default: break;
        case 'a':	 // 6 strings to match.
          if (memcmp(NameR.data()+11, "ddh.", 4))
            break;
          switch (NameR[15]) {
          default: break;
          case 'h':	 // 4 strings to match.
            if (memcmp(NameR.data()+16, "16.sat.", 7))
              break;
            switch (NameR[23]) {
            default: break;
            case 'h':	 // 2 strings to match.
              switch (NameR[24]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_A2_addh_h16_sat_hh;	 // "exagon.A2.addh.h16.sat.hh"
              case 'l':	 // 1 string to match.
                return Intrinsic::hexagon_A2_addh_h16_sat_hl;	 // "exagon.A2.addh.h16.sat.hl"
              }
              break;
            case 'l':	 // 2 strings to match.
              switch (NameR[24]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_A2_addh_h16_sat_lh;	 // "exagon.A2.addh.h16.sat.lh"
              case 'l':	 // 1 string to match.
                return Intrinsic::hexagon_A2_addh_h16_sat_ll;	 // "exagon.A2.addh.h16.sat.ll"
              }
              break;
            }
            break;
          case 'l':	 // 2 strings to match.
            if (memcmp(NameR.data()+16, "16.sat.", 7))
              break;
            switch (NameR[23]) {
            default: break;
            case 'h':	 // 1 string to match.
              if (NameR[24] != 'l')
                break;
              return Intrinsic::hexagon_A2_addh_l16_sat_hl;	 // "exagon.A2.addh.l16.sat.hl"
            case 'l':	 // 1 string to match.
              if (NameR[24] != 'l')
                break;
              return Intrinsic::hexagon_A2_addh_l16_sat_ll;	 // "exagon.A2.addh.l16.sat.ll"
            }
            break;
          }
          break;
        case 's':	 // 6 strings to match.
          if (memcmp(NameR.data()+11, "ubh.", 4))
            break;
          switch (NameR[15]) {
          default: break;
          case 'h':	 // 4 strings to match.
            if (memcmp(NameR.data()+16, "16.sat.", 7))
              break;
            switch (NameR[23]) {
            default: break;
            case 'h':	 // 2 strings to match.
              switch (NameR[24]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_A2_subh_h16_sat_hh;	 // "exagon.A2.subh.h16.sat.hh"
              case 'l':	 // 1 string to match.
                return Intrinsic::hexagon_A2_subh_h16_sat_hl;	 // "exagon.A2.subh.h16.sat.hl"
              }
              break;
            case 'l':	 // 2 strings to match.
              switch (NameR[24]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_A2_subh_h16_sat_lh;	 // "exagon.A2.subh.h16.sat.lh"
              case 'l':	 // 1 string to match.
                return Intrinsic::hexagon_A2_subh_h16_sat_ll;	 // "exagon.A2.subh.h16.sat.ll"
              }
              break;
            }
            break;
          case 'l':	 // 2 strings to match.
            if (memcmp(NameR.data()+16, "16.sat.", 7))
              break;
            switch (NameR[23]) {
            default: break;
            case 'h':	 // 1 string to match.
              if (NameR[24] != 'l')
                break;
              return Intrinsic::hexagon_A2_subh_l16_sat_hl;	 // "exagon.A2.subh.l16.sat.hl"
            case 'l':	 // 1 string to match.
              if (NameR[24] != 'l')
                break;
              return Intrinsic::hexagon_A2_subh_l16_sat_ll;	 // "exagon.A2.subh.l16.sat.ll"
            }
            break;
          }
          break;
        }
        break;
      case 'C':	 // 1 string to match.
        if (memcmp(NameR.data()+8, "4.fastcorner9.not", 17))
          break;
        return Intrinsic::hexagon_C4_fastcorner9_not;	 // "exagon.C4.fastcorner9.not"
      case 'F':	 // 4 strings to match.
        if (memcmp(NameR.data()+8, "2.conv.", 7))
          break;
        switch (NameR[15]) {
        default: break;
        case 'd':	 // 2 strings to match.
          if (memcmp(NameR.data()+16, "f2u", 3))
            break;
          switch (NameR[19]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(NameR.data()+20, ".chop", 5))
              break;
            return Intrinsic::hexagon_F2_conv_df2ud_chop;	 // "exagon.F2.conv.df2ud.chop"
          case 'w':	 // 1 string to match.
            if (memcmp(NameR.data()+20, ".chop", 5))
              break;
            return Intrinsic::hexagon_F2_conv_df2uw_chop;	 // "exagon.F2.conv.df2uw.chop"
          }
          break;
        case 's':	 // 2 strings to match.
          if (memcmp(NameR.data()+16, "f2u", 3))
            break;
          switch (NameR[19]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(NameR.data()+20, ".chop", 5))
              break;
            return Intrinsic::hexagon_F2_conv_sf2ud_chop;	 // "exagon.F2.conv.sf2ud.chop"
          case 'w':	 // 1 string to match.
            if (memcmp(NameR.data()+20, ".chop", 5))
              break;
            return Intrinsic::hexagon_F2_conv_sf2uw_chop;	 // "exagon.F2.conv.sf2uw.chop"
          }
          break;
        }
        break;
      case 'M':	 // 16 strings to match.
        if (memcmp(NameR.data()+8, "2.mpyud.", 8))
          break;
        switch (NameR[16]) {
        default: break;
        case 'a':	 // 8 strings to match.
          if (memcmp(NameR.data()+17, "cc.", 3))
            break;
          switch (NameR[20]) {
          default: break;
          case 'h':	 // 4 strings to match.
            switch (NameR[21]) {
            default: break;
            case 'h':	 // 2 strings to match.
              if (memcmp(NameR.data()+22, ".s", 2))
                break;
              switch (NameR[24]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mpyud_acc_hh_s0;	 // "exagon.M2.mpyud.acc.hh.s0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mpyud_acc_hh_s1;	 // "exagon.M2.mpyud.acc.hh.s1"
              }
              break;
            case 'l':	 // 2 strings to match.
              if (memcmp(NameR.data()+22, ".s", 2))
                break;
              switch (NameR[24]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mpyud_acc_hl_s0;	 // "exagon.M2.mpyud.acc.hl.s0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mpyud_acc_hl_s1;	 // "exagon.M2.mpyud.acc.hl.s1"
              }
              break;
            }
            break;
          case 'l':	 // 4 strings to match.
            switch (NameR[21]) {
            default: break;
            case 'h':	 // 2 strings to match.
              if (memcmp(NameR.data()+22, ".s", 2))
                break;
              switch (NameR[24]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mpyud_acc_lh_s0;	 // "exagon.M2.mpyud.acc.lh.s0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mpyud_acc_lh_s1;	 // "exagon.M2.mpyud.acc.lh.s1"
              }
              break;
            case 'l':	 // 2 strings to match.
              if (memcmp(NameR.data()+22, ".s", 2))
                break;
              switch (NameR[24]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mpyud_acc_ll_s0;	 // "exagon.M2.mpyud.acc.ll.s0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mpyud_acc_ll_s1;	 // "exagon.M2.mpyud.acc.ll.s1"
              }
              break;
            }
            break;
          }
          break;
        case 'n':	 // 8 strings to match.
          if (memcmp(NameR.data()+17, "ac.", 3))
            break;
          switch (NameR[20]) {
          default: break;
          case 'h':	 // 4 strings to match.
            switch (NameR[21]) {
            default: break;
            case 'h':	 // 2 strings to match.
              if (memcmp(NameR.data()+22, ".s", 2))
                break;
              switch (NameR[24]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mpyud_nac_hh_s0;	 // "exagon.M2.mpyud.nac.hh.s0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mpyud_nac_hh_s1;	 // "exagon.M2.mpyud.nac.hh.s1"
              }
              break;
            case 'l':	 // 2 strings to match.
              if (memcmp(NameR.data()+22, ".s", 2))
                break;
              switch (NameR[24]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mpyud_nac_hl_s0;	 // "exagon.M2.mpyud.nac.hl.s0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mpyud_nac_hl_s1;	 // "exagon.M2.mpyud.nac.hl.s1"
              }
              break;
            }
            break;
          case 'l':	 // 4 strings to match.
            switch (NameR[21]) {
            default: break;
            case 'h':	 // 2 strings to match.
              if (memcmp(NameR.data()+22, ".s", 2))
                break;
              switch (NameR[24]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mpyud_nac_lh_s0;	 // "exagon.M2.mpyud.nac.lh.s0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mpyud_nac_lh_s1;	 // "exagon.M2.mpyud.nac.lh.s1"
              }
              break;
            case 'l':	 // 2 strings to match.
              if (memcmp(NameR.data()+22, ".s", 2))
                break;
              switch (NameR[24]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mpyud_nac_ll_s0;	 // "exagon.M2.mpyud.nac.ll.s0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mpyud_nac_ll_s1;	 // "exagon.M2.mpyud.nac.ll.s1"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 27:	 // 24 strings to match.
      if (memcmp(NameR.data()+0, "exagon.M2.mpy.", 14))
        break;
      switch (NameR[14]) {
      default: break;
      case 'a':	 // 8 strings to match.
        if (memcmp(NameR.data()+15, "cc.sat.", 7))
          break;
        switch (NameR[22]) {
        default: break;
        case 'h':	 // 4 strings to match.
          switch (NameR[23]) {
          default: break;
          case 'h':	 // 2 strings to match.
            if (memcmp(NameR.data()+24, ".s", 2))
              break;
            switch (NameR[26]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpy_acc_sat_hh_s0;	 // "exagon.M2.mpy.acc.sat.hh.s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpy_acc_sat_hh_s1;	 // "exagon.M2.mpy.acc.sat.hh.s1"
            }
            break;
          case 'l':	 // 2 strings to match.
            if (memcmp(NameR.data()+24, ".s", 2))
              break;
            switch (NameR[26]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpy_acc_sat_hl_s0;	 // "exagon.M2.mpy.acc.sat.hl.s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpy_acc_sat_hl_s1;	 // "exagon.M2.mpy.acc.sat.hl.s1"
            }
            break;
          }
          break;
        case 'l':	 // 4 strings to match.
          switch (NameR[23]) {
          default: break;
          case 'h':	 // 2 strings to match.
            if (memcmp(NameR.data()+24, ".s", 2))
              break;
            switch (NameR[26]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpy_acc_sat_lh_s0;	 // "exagon.M2.mpy.acc.sat.lh.s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpy_acc_sat_lh_s1;	 // "exagon.M2.mpy.acc.sat.lh.s1"
            }
            break;
          case 'l':	 // 2 strings to match.
            if (memcmp(NameR.data()+24, ".s", 2))
              break;
            switch (NameR[26]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpy_acc_sat_ll_s0;	 // "exagon.M2.mpy.acc.sat.ll.s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpy_acc_sat_ll_s1;	 // "exagon.M2.mpy.acc.sat.ll.s1"
            }
            break;
          }
          break;
        }
        break;
      case 'n':	 // 8 strings to match.
        if (memcmp(NameR.data()+15, "ac.sat.", 7))
          break;
        switch (NameR[22]) {
        default: break;
        case 'h':	 // 4 strings to match.
          switch (NameR[23]) {
          default: break;
          case 'h':	 // 2 strings to match.
            if (memcmp(NameR.data()+24, ".s", 2))
              break;
            switch (NameR[26]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpy_nac_sat_hh_s0;	 // "exagon.M2.mpy.nac.sat.hh.s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpy_nac_sat_hh_s1;	 // "exagon.M2.mpy.nac.sat.hh.s1"
            }
            break;
          case 'l':	 // 2 strings to match.
            if (memcmp(NameR.data()+24, ".s", 2))
              break;
            switch (NameR[26]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpy_nac_sat_hl_s0;	 // "exagon.M2.mpy.nac.sat.hl.s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpy_nac_sat_hl_s1;	 // "exagon.M2.mpy.nac.sat.hl.s1"
            }
            break;
          }
          break;
        case 'l':	 // 4 strings to match.
          switch (NameR[23]) {
          default: break;
          case 'h':	 // 2 strings to match.
            if (memcmp(NameR.data()+24, ".s", 2))
              break;
            switch (NameR[26]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpy_nac_sat_lh_s0;	 // "exagon.M2.mpy.nac.sat.lh.s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpy_nac_sat_lh_s1;	 // "exagon.M2.mpy.nac.sat.lh.s1"
            }
            break;
          case 'l':	 // 2 strings to match.
            if (memcmp(NameR.data()+24, ".s", 2))
              break;
            switch (NameR[26]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpy_nac_sat_ll_s0;	 // "exagon.M2.mpy.nac.sat.ll.s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpy_nac_sat_ll_s1;	 // "exagon.M2.mpy.nac.sat.ll.s1"
            }
            break;
          }
          break;
        }
        break;
      case 's':	 // 8 strings to match.
        if (memcmp(NameR.data()+15, "at.rnd.", 7))
          break;
        switch (NameR[22]) {
        default: break;
        case 'h':	 // 4 strings to match.
          switch (NameR[23]) {
          default: break;
          case 'h':	 // 2 strings to match.
            if (memcmp(NameR.data()+24, ".s", 2))
              break;
            switch (NameR[26]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpy_sat_rnd_hh_s0;	 // "exagon.M2.mpy.sat.rnd.hh.s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpy_sat_rnd_hh_s1;	 // "exagon.M2.mpy.sat.rnd.hh.s1"
            }
            break;
          case 'l':	 // 2 strings to match.
            if (memcmp(NameR.data()+24, ".s", 2))
              break;
            switch (NameR[26]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpy_sat_rnd_hl_s0;	 // "exagon.M2.mpy.sat.rnd.hl.s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpy_sat_rnd_hl_s1;	 // "exagon.M2.mpy.sat.rnd.hl.s1"
            }
            break;
          }
          break;
        case 'l':	 // 4 strings to match.
          switch (NameR[23]) {
          default: break;
          case 'h':	 // 2 strings to match.
            if (memcmp(NameR.data()+24, ".s", 2))
              break;
            switch (NameR[26]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpy_sat_rnd_lh_s0;	 // "exagon.M2.mpy.sat.rnd.lh.s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpy_sat_rnd_lh_s1;	 // "exagon.M2.mpy.sat.rnd.lh.s1"
            }
            break;
          case 'l':	 // 2 strings to match.
            if (memcmp(NameR.data()+24, ".s", 2))
              break;
            switch (NameR[26]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpy_sat_rnd_ll_s0;	 // "exagon.M2.mpy.sat.rnd.ll.s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpy_sat_rnd_ll_s1;	 // "exagon.M2.mpy.sat.rnd.ll.s1"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 29:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "exagon.S5.vasrhrnd.goodsyntax", 29))
        break;
      return Intrinsic::hexagon_S5_vasrhrnd_goodsyntax;	 // "exagon.S5.vasrhrnd.goodsyntax"
    case 30:	 // 4 strings to match.
      if (memcmp(NameR.data()+0, "exagon.S2.tableidx", 18))
        break;
      switch (NameR[18]) {
      default: break;
      case 'b':	 // 1 string to match.
        if (memcmp(NameR.data()+19, ".goodsyntax", 11))
          break;
        return Intrinsic::hexagon_S2_tableidxb_goodsyntax;	 // "exagon.S2.tableidxb.goodsyntax"
      case 'd':	 // 1 string to match.
        if (memcmp(NameR.data()+19, ".goodsyntax", 11))
          break;
        return Intrinsic::hexagon_S2_tableidxd_goodsyntax;	 // "exagon.S2.tableidxd.goodsyntax"
      case 'h':	 // 1 string to match.
        if (memcmp(NameR.data()+19, ".goodsyntax", 11))
          break;
        return Intrinsic::hexagon_S2_tableidxh_goodsyntax;	 // "exagon.S2.tableidxh.goodsyntax"
      case 'w':	 // 1 string to match.
        if (memcmp(NameR.data()+19, ".goodsyntax", 11))
          break;
        return Intrinsic::hexagon_S2_tableidxw_goodsyntax;	 // "exagon.S2.tableidxw.goodsyntax"
      }
      break;
    case 32:	 // 2 strings to match.
      if (memcmp(NameR.data()+0, "exagon.S2.asr.i.", 16))
        break;
      switch (NameR[16]) {
      default: break;
      case 'p':	 // 1 string to match.
        if (memcmp(NameR.data()+17, ".rnd.goodsyntax", 15))
          break;
        return Intrinsic::hexagon_S2_asr_i_p_rnd_goodsyntax;	 // "exagon.S2.asr.i.p.rnd.goodsyntax"
      case 'r':	 // 1 string to match.
        if (memcmp(NameR.data()+17, ".rnd.goodsyntax", 15))
          break;
        return Intrinsic::hexagon_S2_asr_i_r_rnd_goodsyntax;	 // "exagon.S2.asr.i.r.rnd.goodsyntax"
      }
      break;
    case 35:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "exagon.S5.asrhub.rnd.sat.goodsyntax", 35))
        break;
      return Intrinsic::hexagon_S5_asrhub_rnd_sat_goodsyntax;	 // "exagon.S5.asrhub.rnd.sat.goodsyntax"
    }
    break;  // end of 'h' case.
  case 'i':
    switch (NameR.size()) {
    default: break;
    case 12:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "nvariant.end", 12))
        break;
      return Intrinsic::invariant_end;	 // "nvariant.end"
    case 14:	 // 2 strings to match.
      if (NameR[0] != 'n')
        break;
      switch (NameR[1]) {
      default: break;
      case 'i':	 // 1 string to match.
        if (memcmp(NameR.data()+2, "t.trampoline", 12))
          break;
        return Intrinsic::init_trampoline;	 // "nit.trampoline"
      case 'v':	 // 1 string to match.
        if (memcmp(NameR.data()+2, "ariant.start", 12))
          break;
        return Intrinsic::invariant_start;	 // "nvariant.start"
      }
      break;
    }
    break;  // end of 'i' case.
  case 'l':
    if (NameR.startswith("og2.")) return Intrinsic::log2;
    if (NameR.startswith("og10.")) return Intrinsic::log10;
    if (NameR.startswith("og.")) return Intrinsic::log;
    switch (NameR.size()) {
    default: break;
    case 6:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "ongjmp", 6))
        break;
      return Intrinsic::longjmp;	 // "ongjmp"
    case 11:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "ifetime.end", 11))
        break;
      return Intrinsic::lifetime_end;	 // "ifetime.end"
    case 13:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "ifetime.start", 13))
        break;
      return Intrinsic::lifetime_start;	 // "ifetime.start"
    }
    break;  // end of 'l' case.
  case 'm':
    if (NameR.startswith("emset.")) return Intrinsic::memset;
    if (NameR.startswith("emmove.")) return Intrinsic::memmove;
    if (NameR.startswith("emcpy.")) return Intrinsic::memcpy;
    switch (NameR.size()) {
    default: break;
    case 7:	 // 3 strings to match.
      if (memcmp(NameR.data()+0, "ips.l", 5))
        break;
      switch (NameR[5]) {
      default: break;
      case 'h':	 // 1 string to match.
        if (NameR[6] != 'x')
          break;
        return Intrinsic::mips_lhx;	 // "ips.lhx"
      case 's':	 // 1 string to match.
        if (NameR[6] != 'a')
          break;
        return Intrinsic::mips_lsa;	 // "ips.lsa"
      case 'w':	 // 1 string to match.
        if (NameR[6] != 'x')
          break;
        return Intrinsic::mips_lwx;	 // "ips.lwx"
      }
      break;
    case 8:	 // 21 strings to match.
      if (memcmp(NameR.data()+0, "ips.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'b':	 // 5 strings to match.
        if (memcmp(NameR.data()+5, "z.", 2))
          break;
        switch (NameR[7]) {
        default: break;
        case 'b':	 // 1 string to match.
          return Intrinsic::mips_bz_b;	 // "ips.bz.b"
        case 'd':	 // 1 string to match.
          return Intrinsic::mips_bz_d;	 // "ips.bz.d"
        case 'h':	 // 1 string to match.
          return Intrinsic::mips_bz_h;	 // "ips.bz.h"
        case 'v':	 // 1 string to match.
          return Intrinsic::mips_bz_v;	 // "ips.bz.v"
        case 'w':	 // 1 string to match.
          return Intrinsic::mips_bz_w;	 // "ips.bz.w"
        }
        break;
      case 'd':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "lsa", 3))
          break;
        return Intrinsic::mips_dlsa;	 // "ips.dlsa"
      case 'e':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "xtp", 3))
          break;
        return Intrinsic::mips_extp;	 // "ips.extp"
      case 'i':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "nsv", 3))
          break;
        return Intrinsic::mips_insv;	 // "ips.insv"
      case 'l':	 // 5 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'b':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "ux", 2))
            break;
          return Intrinsic::mips_lbux;	 // "ips.lbux"
        case 'd':	 // 4 strings to match.
          if (NameR[6] != '.')
            break;
          switch (NameR[7]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_ld_b;	 // "ips.ld.b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_ld_d;	 // "ips.ld.d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_ld_h;	 // "ips.ld.h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_ld_w;	 // "ips.ld.w"
          }
          break;
        }
        break;
      case 'm':	 // 3 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "dd", 2))
            break;
          return Intrinsic::mips_madd;	 // "ips.madd"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "ub", 2))
            break;
          return Intrinsic::mips_msub;	 // "ips.msub"
        case 'u':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "lt", 2))
            break;
          return Intrinsic::mips_mult;	 // "ips.mult"
        }
        break;
      case 'o':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "r.v", 3))
          break;
        return Intrinsic::mips_or_v;	 // "ips.or.v"
      case 's':	 // 4 strings to match.
        if (memcmp(NameR.data()+5, "t.", 2))
          break;
        switch (NameR[7]) {
        default: break;
        case 'b':	 // 1 string to match.
          return Intrinsic::mips_st_b;	 // "ips.st.b"
        case 'd':	 // 1 string to match.
          return Intrinsic::mips_st_d;	 // "ips.st.d"
        case 'h':	 // 1 string to match.
          return Intrinsic::mips_st_h;	 // "ips.st.h"
        case 'w':	 // 1 string to match.
          return Intrinsic::mips_st_w;	 // "ips.st.w"
        }
        break;
      }
      break;
    case 9:	 // 47 strings to match.
      if (memcmp(NameR.data()+0, "ips.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'a':	 // 3 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'd':	 // 2 strings to match.
          if (NameR[6] != 'd')
            break;
          switch (NameR[7]) {
          default: break;
          case 's':	 // 1 string to match.
            if (NameR[8] != 'c')
              break;
            return Intrinsic::mips_addsc;	 // "ips.addsc"
          case 'w':	 // 1 string to match.
            if (NameR[8] != 'c')
              break;
            return Intrinsic::mips_addwc;	 // "ips.addwc"
          }
          break;
        case 'n':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "d.v", 3))
            break;
          return Intrinsic::mips_and_v;	 // "ips.and.v"
        }
        break;
      case 'b':	 // 6 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'm':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "z.v", 3))
            break;
          return Intrinsic::mips_bmz_v;	 // "ips.bmz.v"
        case 'n':	 // 5 strings to match.
          if (memcmp(NameR.data()+6, "z.", 2))
            break;
          switch (NameR[8]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_bnz_b;	 // "ips.bnz.b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_bnz_d;	 // "ips.bnz.d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_bnz_h;	 // "ips.bnz.h"
          case 'v':	 // 1 string to match.
            return Intrinsic::mips_bnz_v;	 // "ips.bnz.v"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_bnz_w;	 // "ips.bnz.w"
          }
          break;
        }
        break;
      case 'c':	 // 4 strings to match.
        if (memcmp(NameR.data()+5, "eq.", 3))
          break;
        switch (NameR[8]) {
        default: break;
        case 'b':	 // 1 string to match.
          return Intrinsic::mips_ceq_b;	 // "ips.ceq.b"
        case 'd':	 // 1 string to match.
          return Intrinsic::mips_ceq_d;	 // "ips.ceq.d"
        case 'h':	 // 1 string to match.
          return Intrinsic::mips_ceq_h;	 // "ips.ceq.h"
        case 'w':	 // 1 string to match.
          return Intrinsic::mips_ceq_w;	 // "ips.ceq.w"
        }
        break;
      case 'f':	 // 2 strings to match.
        if (memcmp(NameR.data()+5, "tq.", 3))
          break;
        switch (NameR[8]) {
        default: break;
        case 'h':	 // 1 string to match.
          return Intrinsic::mips_ftq_h;	 // "ips.ftq.h"
        case 'w':	 // 1 string to match.
          return Intrinsic::mips_ftq_w;	 // "ips.ftq.w"
        }
        break;
      case 'l':	 // 4 strings to match.
        if (memcmp(NameR.data()+5, "di.", 3))
          break;
        switch (NameR[8]) {
        default: break;
        case 'b':	 // 1 string to match.
          return Intrinsic::mips_ldi_b;	 // "ips.ldi.b"
        case 'd':	 // 1 string to match.
          return Intrinsic::mips_ldi_d;	 // "ips.ldi.d"
        case 'h':	 // 1 string to match.
          return Intrinsic::mips_ldi_h;	 // "ips.ldi.h"
        case 'w':	 // 1 string to match.
          return Intrinsic::mips_ldi_w;	 // "ips.ldi.w"
        }
        break;
      case 'm':	 // 3 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "ddu", 3))
            break;
          return Intrinsic::mips_maddu;	 // "ips.maddu"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "ubu", 3))
            break;
          return Intrinsic::mips_msubu;	 // "ips.msubu"
        case 'u':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "ltu", 3))
            break;
          return Intrinsic::mips_multu;	 // "ips.multu"
        }
        break;
      case 'n':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "or.v", 4))
          break;
        return Intrinsic::mips_nor_v;	 // "ips.nor.v"
      case 'o':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "ri.b", 4))
          break;
        return Intrinsic::mips_ori_b;	 // "ips.ori.b"
      case 'r':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "ddsp", 4))
          break;
        return Intrinsic::mips_rddsp;	 // "ips.rddsp"
      case 's':	 // 20 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'h':	 // 4 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'f':	 // 3 strings to match.
            if (NameR[7] != '.')
              break;
            switch (NameR[8]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_shf_b;	 // "ips.shf.b"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_shf_h;	 // "ips.shf.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_shf_w;	 // "ips.shf.w"
            }
            break;
          case 'i':	 // 1 string to match.
            if (memcmp(NameR.data()+7, "lo", 2))
              break;
            return Intrinsic::mips_shilo;	 // "ips.shilo"
          }
          break;
        case 'l':	 // 8 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'd':	 // 4 strings to match.
            if (NameR[7] != '.')
              break;
            switch (NameR[8]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_sld_b;	 // "ips.sld.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_sld_d;	 // "ips.sld.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_sld_h;	 // "ips.sld.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_sld_w;	 // "ips.sld.w"
            }
            break;
          case 'l':	 // 4 strings to match.
            if (NameR[7] != '.')
              break;
            switch (NameR[8]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_sll_b;	 // "ips.sll.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_sll_d;	 // "ips.sll.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_sll_h;	 // "ips.sll.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_sll_w;	 // "ips.sll.w"
            }
            break;
          }
          break;
        case 'r':	 // 8 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'a':	 // 4 strings to match.
            if (NameR[7] != '.')
              break;
            switch (NameR[8]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_sra_b;	 // "ips.sra.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_sra_d;	 // "ips.sra.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_sra_h;	 // "ips.sra.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_sra_w;	 // "ips.sra.w"
            }
            break;
          case 'l':	 // 4 strings to match.
            if (NameR[7] != '.')
              break;
            switch (NameR[8]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_srl_b;	 // "ips.srl.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_srl_d;	 // "ips.srl.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_srl_h;	 // "ips.srl.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_srl_w;	 // "ips.srl.w"
            }
            break;
          }
          break;
        }
        break;
      case 'w':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "rdsp", 4))
          break;
        return Intrinsic::mips_wrdsp;	 // "ips.wrdsp"
      case 'x':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "or.v", 4))
          break;
        return Intrinsic::mips_xor_v;	 // "ips.xor.v"
      }
      break;
    case 10:	 // 143 strings to match.
      if (memcmp(NameR.data()+0, "ips.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'a':	 // 6 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'd':	 // 4 strings to match.
          if (memcmp(NameR.data()+6, "dv.", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_addv_b;	 // "ips.addv.b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_addv_d;	 // "ips.addv.d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_addv_h;	 // "ips.addv.h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_addv_w;	 // "ips.addv.w"
          }
          break;
        case 'n':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "di.b", 4))
            break;
          return Intrinsic::mips_andi_b;	 // "ips.andi.b"
        case 'p':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "pend", 4))
            break;
          return Intrinsic::mips_append;	 // "ips.append"
        }
        break;
      case 'b':	 // 17 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "lign", 4))
            break;
          return Intrinsic::mips_balign;	 // "ips.balign"
        case 'c':	 // 4 strings to match.
          if (memcmp(NameR.data()+6, "lr.", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_bclr_b;	 // "ips.bclr.b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_bclr_d;	 // "ips.bclr.d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_bclr_h;	 // "ips.bclr.h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_bclr_w;	 // "ips.bclr.w"
          }
          break;
        case 'i':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "trev", 4))
            break;
          return Intrinsic::mips_bitrev;	 // "ips.bitrev"
        case 'm':	 // 2 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'n':	 // 1 string to match.
            if (memcmp(NameR.data()+7, "z.v", 3))
              break;
            return Intrinsic::mips_bmnz_v;	 // "ips.bmnz.v"
          case 'z':	 // 1 string to match.
            if (memcmp(NameR.data()+7, "i.b", 3))
              break;
            return Intrinsic::mips_bmzi_b;	 // "ips.bmzi.b"
          }
          break;
        case 'n':	 // 4 strings to match.
          if (memcmp(NameR.data()+6, "eg.", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_bneg_b;	 // "ips.bneg.b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_bneg_d;	 // "ips.bneg.d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_bneg_h;	 // "ips.bneg.h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_bneg_w;	 // "ips.bneg.w"
          }
          break;
        case 's':	 // 5 strings to match.
          if (NameR[6] != 'e')
            break;
          switch (NameR[7]) {
          default: break;
          case 'l':	 // 1 string to match.
            if (memcmp(NameR.data()+8, ".v", 2))
              break;
            return Intrinsic::mips_bsel_v;	 // "ips.bsel.v"
          case 't':	 // 4 strings to match.
            if (NameR[8] != '.')
              break;
            switch (NameR[9]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_bset_b;	 // "ips.bset.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_bset_d;	 // "ips.bset.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_bset_h;	 // "ips.bset.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_bset_w;	 // "ips.bset.w"
            }
            break;
          }
          break;
        }
        break;
      case 'c':	 // 6 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'e':	 // 4 strings to match.
          if (memcmp(NameR.data()+6, "qi.", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_ceqi_b;	 // "ips.ceqi.b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_ceqi_d;	 // "ips.ceqi.d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_ceqi_h;	 // "ips.ceqi.h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_ceqi_w;	 // "ips.ceqi.w"
          }
          break;
        case 'f':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "cmsa", 4))
            break;
          return Intrinsic::mips_cfcmsa;	 // "ips.cfcmsa"
        case 't':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "cmsa", 4))
            break;
          return Intrinsic::mips_ctcmsa;	 // "ips.ctcmsa"
        }
        break;
      case 'e':	 // 2 strings to match.
        if (memcmp(NameR.data()+5, "xt", 2))
          break;
        switch (NameR[7]) {
        default: break;
        case 'p':	 // 1 string to match.
          if (memcmp(NameR.data()+8, "dp", 2))
            break;
          return Intrinsic::mips_extpdp;	 // "ips.extpdp"
        case 'r':	 // 1 string to match.
          if (memcmp(NameR.data()+8, ".w", 2))
            break;
          return Intrinsic::mips_extr_w;	 // "ips.extr.w"
        }
        break;
      case 'f':	 // 50 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'a':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "dd.", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_fadd_d;	 // "ips.fadd.d"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_fadd_w;	 // "ips.fadd.w"
          }
          break;
        case 'c':	 // 14 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (memcmp(NameR.data()+7, "f.", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fcaf_d;	 // "ips.fcaf.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fcaf_w;	 // "ips.fcaf.w"
            }
            break;
          case 'e':	 // 2 strings to match.
            if (memcmp(NameR.data()+7, "q.", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fceq_d;	 // "ips.fceq.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fceq_w;	 // "ips.fceq.w"
            }
            break;
          case 'l':	 // 4 strings to match.
            switch (NameR[7]) {
            default: break;
            case 'e':	 // 2 strings to match.
              if (NameR[8] != '.')
                break;
              switch (NameR[9]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_fcle_d;	 // "ips.fcle.d"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_fcle_w;	 // "ips.fcle.w"
              }
              break;
            case 't':	 // 2 strings to match.
              if (NameR[8] != '.')
                break;
              switch (NameR[9]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_fclt_d;	 // "ips.fclt.d"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_fclt_w;	 // "ips.fclt.w"
              }
              break;
            }
            break;
          case 'n':	 // 2 strings to match.
            if (memcmp(NameR.data()+7, "e.", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fcne_d;	 // "ips.fcne.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fcne_w;	 // "ips.fcne.w"
            }
            break;
          case 'o':	 // 2 strings to match.
            if (memcmp(NameR.data()+7, "r.", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fcor_d;	 // "ips.fcor.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fcor_w;	 // "ips.fcor.w"
            }
            break;
          case 'u':	 // 2 strings to match.
            if (memcmp(NameR.data()+7, "n.", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fcun_d;	 // "ips.fcun.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fcun_w;	 // "ips.fcun.w"
            }
            break;
          }
          break;
        case 'd':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "iv.", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_fdiv_d;	 // "ips.fdiv.d"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_fdiv_w;	 // "ips.fdiv.w"
          }
          break;
        case 'f':	 // 4 strings to match.
          if (NameR[6] != 'q')
            break;
          switch (NameR[7]) {
          default: break;
          case 'l':	 // 2 strings to match.
            if (NameR[8] != '.')
              break;
            switch (NameR[9]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_ffql_d;	 // "ips.ffql.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_ffql_w;	 // "ips.ffql.w"
            }
            break;
          case 'r':	 // 2 strings to match.
            if (NameR[8] != '.')
              break;
            switch (NameR[9]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_ffqr_d;	 // "ips.ffqr.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_ffqr_w;	 // "ips.ffqr.w"
            }
            break;
          }
          break;
        case 'i':	 // 4 strings to match.
          if (memcmp(NameR.data()+6, "ll.", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_fill_b;	 // "ips.fill.b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_fill_d;	 // "ips.fill.d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_fill_h;	 // "ips.fill.h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_fill_w;	 // "ips.fill.w"
          }
          break;
        case 'm':	 // 6 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (memcmp(NameR.data()+7, "x.", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fmax_d;	 // "ips.fmax.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fmax_w;	 // "ips.fmax.w"
            }
            break;
          case 'i':	 // 2 strings to match.
            if (memcmp(NameR.data()+7, "n.", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fmin_d;	 // "ips.fmin.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fmin_w;	 // "ips.fmin.w"
            }
            break;
          case 'u':	 // 2 strings to match.
            if (memcmp(NameR.data()+7, "l.", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fmul_d;	 // "ips.fmul.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fmul_w;	 // "ips.fmul.w"
            }
            break;
          }
          break;
        case 'r':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "cp.", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_frcp_d;	 // "ips.frcp.d"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_frcp_w;	 // "ips.frcp.w"
          }
          break;
        case 's':	 // 16 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (memcmp(NameR.data()+7, "f.", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fsaf_d;	 // "ips.fsaf.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fsaf_w;	 // "ips.fsaf.w"
            }
            break;
          case 'e':	 // 2 strings to match.
            if (memcmp(NameR.data()+7, "q.", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fseq_d;	 // "ips.fseq.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fseq_w;	 // "ips.fseq.w"
            }
            break;
          case 'l':	 // 4 strings to match.
            switch (NameR[7]) {
            default: break;
            case 'e':	 // 2 strings to match.
              if (NameR[8] != '.')
                break;
              switch (NameR[9]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_fsle_d;	 // "ips.fsle.d"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_fsle_w;	 // "ips.fsle.w"
              }
              break;
            case 't':	 // 2 strings to match.
              if (NameR[8] != '.')
                break;
              switch (NameR[9]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_fslt_d;	 // "ips.fslt.d"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_fslt_w;	 // "ips.fslt.w"
              }
              break;
            }
            break;
          case 'n':	 // 2 strings to match.
            if (memcmp(NameR.data()+7, "e.", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fsne_d;	 // "ips.fsne.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fsne_w;	 // "ips.fsne.w"
            }
            break;
          case 'o':	 // 2 strings to match.
            if (memcmp(NameR.data()+7, "r.", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fsor_d;	 // "ips.fsor.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fsor_w;	 // "ips.fsor.w"
            }
            break;
          case 'u':	 // 4 strings to match.
            switch (NameR[7]) {
            default: break;
            case 'b':	 // 2 strings to match.
              if (NameR[8] != '.')
                break;
              switch (NameR[9]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_fsub_d;	 // "ips.fsub.d"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_fsub_w;	 // "ips.fsub.w"
              }
              break;
            case 'n':	 // 2 strings to match.
              if (NameR[8] != '.')
                break;
              switch (NameR[9]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_fsun_d;	 // "ips.fsun.d"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_fsun_w;	 // "ips.fsun.w"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 'i':	 // 8 strings to match.
        if (memcmp(NameR.data()+5, "lv", 2))
          break;
        switch (NameR[7]) {
        default: break;
        case 'l':	 // 4 strings to match.
          if (NameR[8] != '.')
            break;
          switch (NameR[9]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_ilvl_b;	 // "ips.ilvl.b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_ilvl_d;	 // "ips.ilvl.d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_ilvl_h;	 // "ips.ilvl.h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_ilvl_w;	 // "ips.ilvl.w"
          }
          break;
        case 'r':	 // 4 strings to match.
          if (NameR[8] != '.')
            break;
          switch (NameR[9]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_ilvr_b;	 // "ips.ilvr.b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_ilvr_d;	 // "ips.ilvr.d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_ilvr_h;	 // "ips.ilvr.h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_ilvr_w;	 // "ips.ilvr.w"
          }
          break;
        }
        break;
      case 'm':	 // 8 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'o':	 // 2 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(NameR.data()+7, "sub", 3))
              break;
            return Intrinsic::mips_modsub;	 // "ips.modsub"
          case 'v':	 // 1 string to match.
            if (memcmp(NameR.data()+7, "e.v", 3))
              break;
            return Intrinsic::mips_move_v;	 // "ips.move.v"
          }
          break;
        case 't':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "hlip", 4))
            break;
          return Intrinsic::mips_mthlip;	 // "ips.mthlip"
        case 'u':	 // 5 strings to match.
          if (NameR[6] != 'l')
            break;
          switch (NameR[7]) {
          default: break;
          case '.':	 // 1 string to match.
            if (memcmp(NameR.data()+8, "ph", 2))
              break;
            return Intrinsic::mips_mul_ph;	 // "ips.mul.ph"
          case 'v':	 // 4 strings to match.
            if (NameR[8] != '.')
              break;
            switch (NameR[9]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_mulv_b;	 // "ips.mulv.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_mulv_d;	 // "ips.mulv.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_mulv_h;	 // "ips.mulv.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_mulv_w;	 // "ips.mulv.w"
            }
            break;
          }
          break;
        }
        break;
      case 'n':	 // 9 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'l':	 // 8 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'o':	 // 4 strings to match.
            if (memcmp(NameR.data()+7, "c.", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_nloc_b;	 // "ips.nloc.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_nloc_d;	 // "ips.nloc.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_nloc_h;	 // "ips.nloc.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_nloc_w;	 // "ips.nloc.w"
            }
            break;
          case 'z':	 // 4 strings to match.
            if (memcmp(NameR.data()+7, "c.", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_nlzc_b;	 // "ips.nlzc.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_nlzc_d;	 // "ips.nlzc.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_nlzc_h;	 // "ips.nlzc.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_nlzc_w;	 // "ips.nlzc.w"
            }
            break;
          }
          break;
        case 'o':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "ri.b", 4))
            break;
          return Intrinsic::mips_nori_b;	 // "ips.nori.b"
        }
        break;
      case 'p':	 // 4 strings to match.
        if (memcmp(NameR.data()+5, "cnt.", 4))
          break;
        switch (NameR[9]) {
        default: break;
        case 'b':	 // 1 string to match.
          return Intrinsic::mips_pcnt_b;	 // "ips.pcnt.b"
        case 'd':	 // 1 string to match.
          return Intrinsic::mips_pcnt_d;	 // "ips.pcnt.d"
        case 'h':	 // 1 string to match.
          return Intrinsic::mips_pcnt_h;	 // "ips.pcnt.h"
        case 'w':	 // 1 string to match.
          return Intrinsic::mips_pcnt_w;	 // "ips.pcnt.w"
        }
        break;
      case 's':	 // 28 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'l':	 // 8 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'd':	 // 4 strings to match.
            if (memcmp(NameR.data()+7, "i.", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_sldi_b;	 // "ips.sldi.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_sldi_d;	 // "ips.sldi.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_sldi_h;	 // "ips.sldi.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_sldi_w;	 // "ips.sldi.w"
            }
            break;
          case 'l':	 // 4 strings to match.
            if (memcmp(NameR.data()+7, "i.", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_slli_b;	 // "ips.slli.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_slli_d;	 // "ips.slli.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_slli_h;	 // "ips.slli.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_slli_w;	 // "ips.slli.w"
            }
            break;
          }
          break;
        case 'r':	 // 16 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'a':	 // 8 strings to match.
            switch (NameR[7]) {
            default: break;
            case 'i':	 // 4 strings to match.
              if (NameR[8] != '.')
                break;
              switch (NameR[9]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_srai_b;	 // "ips.srai.b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_srai_d;	 // "ips.srai.d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_srai_h;	 // "ips.srai.h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_srai_w;	 // "ips.srai.w"
              }
              break;
            case 'r':	 // 4 strings to match.
              if (NameR[8] != '.')
                break;
              switch (NameR[9]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_srar_b;	 // "ips.srar.b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_srar_d;	 // "ips.srar.d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_srar_h;	 // "ips.srar.h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_srar_w;	 // "ips.srar.w"
              }
              break;
            }
            break;
          case 'l':	 // 8 strings to match.
            switch (NameR[7]) {
            default: break;
            case 'i':	 // 4 strings to match.
              if (NameR[8] != '.')
                break;
              switch (NameR[9]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_srli_b;	 // "ips.srli.b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_srli_d;	 // "ips.srli.d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_srli_h;	 // "ips.srli.h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_srli_w;	 // "ips.srli.w"
              }
              break;
            case 'r':	 // 4 strings to match.
              if (NameR[8] != '.')
                break;
              switch (NameR[9]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_srlr_b;	 // "ips.srlr.b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_srlr_d;	 // "ips.srlr.d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_srlr_h;	 // "ips.srlr.h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_srlr_w;	 // "ips.srlr.w"
              }
              break;
            }
            break;
          }
          break;
        case 'u':	 // 4 strings to match.
          if (memcmp(NameR.data()+6, "bv.", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_subv_b;	 // "ips.subv.b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_subv_d;	 // "ips.subv.d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_subv_h;	 // "ips.subv.h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_subv_w;	 // "ips.subv.w"
          }
          break;
        }
        break;
      case 'v':	 // 4 strings to match.
        if (memcmp(NameR.data()+5, "shf.", 4))
          break;
        switch (NameR[9]) {
        default: break;
        case 'b':	 // 1 string to match.
          return Intrinsic::mips_vshf_b;	 // "ips.vshf.b"
        case 'd':	 // 1 string to match.
          return Intrinsic::mips_vshf_d;	 // "ips.vshf.d"
        case 'h':	 // 1 string to match.
          return Intrinsic::mips_vshf_h;	 // "ips.vshf.h"
        case 'w':	 // 1 string to match.
          return Intrinsic::mips_vshf_w;	 // "ips.vshf.w"
        }
        break;
      case 'x':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "ori.b", 5))
          break;
        return Intrinsic::mips_xori_b;	 // "ips.xori.b"
      }
      break;
    case 11:	 // 197 strings to match.
      if (memcmp(NameR.data()+0, "ips.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'a':	 // 20 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'd':	 // 12 strings to match.
          if (NameR[6] != 'd')
            break;
          switch (NameR[7]) {
          default: break;
          case '.':	 // 4 strings to match.
            if (memcmp(NameR.data()+8, "a.", 2))
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_add_a_b;	 // "ips.add.a.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_add_a_d;	 // "ips.add.a.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_add_a_h;	 // "ips.add.a.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_add_a_w;	 // "ips.add.a.w"
            }
            break;
          case 'q':	 // 2 strings to match.
            switch (NameR[8]) {
            default: break;
            case '.':	 // 1 string to match.
              if (memcmp(NameR.data()+9, "ph", 2))
                break;
              return Intrinsic::mips_addq_ph;	 // "ips.addq.ph"
            case 'h':	 // 1 string to match.
              if (memcmp(NameR.data()+9, ".w", 2))
                break;
              return Intrinsic::mips_addqh_w;	 // "ips.addqh.w"
            }
            break;
          case 'u':	 // 2 strings to match.
            if (NameR[8] != '.')
              break;
            switch (NameR[9]) {
            default: break;
            case 'p':	 // 1 string to match.
              if (NameR[10] != 'h')
                break;
              return Intrinsic::mips_addu_ph;	 // "ips.addu.ph"
            case 'q':	 // 1 string to match.
              if (NameR[10] != 'b')
                break;
              return Intrinsic::mips_addu_qb;	 // "ips.addu.qb"
            }
            break;
          case 'v':	 // 4 strings to match.
            if (memcmp(NameR.data()+8, "i.", 2))
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_addvi_b;	 // "ips.addvi.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_addvi_d;	 // "ips.addvi.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_addvi_h;	 // "ips.addvi.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_addvi_w;	 // "ips.addvi.w"
            }
            break;
          }
          break;
        case 'v':	 // 8 strings to match.
          if (memcmp(NameR.data()+6, "e.", 2))
            break;
          switch (NameR[8]) {
          default: break;
          case 's':	 // 4 strings to match.
            if (NameR[9] != '.')
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_ave_s_b;	 // "ips.ave.s.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_ave_s_d;	 // "ips.ave.s.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_ave_s_h;	 // "ips.ave.s.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_ave_s_w;	 // "ips.ave.s.w"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (NameR[9] != '.')
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_ave_u_b;	 // "ips.ave.u.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_ave_u_d;	 // "ips.ave.u.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_ave_u_h;	 // "ips.ave.u.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_ave_u_w;	 // "ips.ave.u.w"
            }
            break;
          }
          break;
        }
        break;
      case 'b':	 // 22 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'c':	 // 4 strings to match.
          if (memcmp(NameR.data()+6, "lri.", 4))
            break;
          switch (NameR[10]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_bclri_b;	 // "ips.bclri.b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_bclri_d;	 // "ips.bclri.d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_bclri_h;	 // "ips.bclri.h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_bclri_w;	 // "ips.bclri.w"
          }
          break;
        case 'i':	 // 8 strings to match.
          if (memcmp(NameR.data()+6, "ns", 2))
            break;
          switch (NameR[8]) {
          default: break;
          case 'l':	 // 4 strings to match.
            if (NameR[9] != '.')
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_binsl_b;	 // "ips.binsl.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_binsl_d;	 // "ips.binsl.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_binsl_h;	 // "ips.binsl.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_binsl_w;	 // "ips.binsl.w"
            }
            break;
          case 'r':	 // 4 strings to match.
            if (NameR[9] != '.')
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_binsr_b;	 // "ips.binsr.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_binsr_d;	 // "ips.binsr.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_binsr_h;	 // "ips.binsr.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_binsr_w;	 // "ips.binsr.w"
            }
            break;
          }
          break;
        case 'm':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "nzi.b", 5))
            break;
          return Intrinsic::mips_bmnzi_b;	 // "ips.bmnzi.b"
        case 'n':	 // 4 strings to match.
          if (memcmp(NameR.data()+6, "egi.", 4))
            break;
          switch (NameR[10]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_bnegi_b;	 // "ips.bnegi.b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_bnegi_d;	 // "ips.bnegi.d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_bnegi_h;	 // "ips.bnegi.h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_bnegi_w;	 // "ips.bnegi.w"
          }
          break;
        case 's':	 // 5 strings to match.
          if (NameR[6] != 'e')
            break;
          switch (NameR[7]) {
          default: break;
          case 'l':	 // 1 string to match.
            if (memcmp(NameR.data()+8, "i.b", 3))
              break;
            return Intrinsic::mips_bseli_b;	 // "ips.bseli.b"
          case 't':	 // 4 strings to match.
            if (memcmp(NameR.data()+8, "i.", 2))
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_bseti_b;	 // "ips.bseti.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_bseti_d;	 // "ips.bseti.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_bseti_h;	 // "ips.bseti.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_bseti_w;	 // "ips.bseti.w"
            }
            break;
          }
          break;
        }
        break;
      case 'c':	 // 16 strings to match.
        if (NameR[5] != 'l')
          break;
        switch (NameR[6]) {
        default: break;
        case 'e':	 // 8 strings to match.
          if (NameR[7] != '.')
            break;
          switch (NameR[8]) {
          default: break;
          case 's':	 // 4 strings to match.
            if (NameR[9] != '.')
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_cle_s_b;	 // "ips.cle.s.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_cle_s_d;	 // "ips.cle.s.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_cle_s_h;	 // "ips.cle.s.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_cle_s_w;	 // "ips.cle.s.w"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (NameR[9] != '.')
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_cle_u_b;	 // "ips.cle.u.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_cle_u_d;	 // "ips.cle.u.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_cle_u_h;	 // "ips.cle.u.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_cle_u_w;	 // "ips.cle.u.w"
            }
            break;
          }
          break;
        case 't':	 // 8 strings to match.
          if (NameR[7] != '.')
            break;
          switch (NameR[8]) {
          default: break;
          case 's':	 // 4 strings to match.
            if (NameR[9] != '.')
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_clt_s_b;	 // "ips.clt.s.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_clt_s_d;	 // "ips.clt.s.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_clt_s_h;	 // "ips.clt.s.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_clt_s_w;	 // "ips.clt.s.w"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (NameR[9] != '.')
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_clt_u_b;	 // "ips.clt.u.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_clt_u_d;	 // "ips.clt.u.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_clt_u_h;	 // "ips.clt.u.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_clt_u_w;	 // "ips.clt.u.w"
            }
            break;
          }
          break;
        }
        break;
      case 'd':	 // 8 strings to match.
        if (memcmp(NameR.data()+5, "iv.", 3))
          break;
        switch (NameR[8]) {
        default: break;
        case 's':	 // 4 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_div_s_b;	 // "ips.div.s.b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_div_s_d;	 // "ips.div.s.d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_div_s_h;	 // "ips.div.s.h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_div_s_w;	 // "ips.div.s.w"
          }
          break;
        case 'u':	 // 4 strings to match.
          if (NameR[9] != '.')
            break;
          switch (NameR[10]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_div_u_b;	 // "ips.div.u.b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_div_u_d;	 // "ips.div.u.d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_div_u_h;	 // "ips.div.u.h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_div_u_w;	 // "ips.div.u.w"
          }
          break;
        }
        break;
      case 'f':	 // 30 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'c':	 // 8 strings to match.
          if (NameR[6] != 'u')
            break;
          switch (NameR[7]) {
          default: break;
          case 'e':	 // 2 strings to match.
            if (memcmp(NameR.data()+8, "q.", 2))
              break;
            switch (NameR[10]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fcueq_d;	 // "ips.fcueq.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fcueq_w;	 // "ips.fcueq.w"
            }
            break;
          case 'l':	 // 4 strings to match.
            switch (NameR[8]) {
            default: break;
            case 'e':	 // 2 strings to match.
              if (NameR[9] != '.')
                break;
              switch (NameR[10]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_fcule_d;	 // "ips.fcule.d"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_fcule_w;	 // "ips.fcule.w"
              }
              break;
            case 't':	 // 2 strings to match.
              if (NameR[9] != '.')
                break;
              switch (NameR[10]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_fcult_d;	 // "ips.fcult.d"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_fcult_w;	 // "ips.fcult.w"
              }
              break;
            }
            break;
          case 'n':	 // 2 strings to match.
            if (memcmp(NameR.data()+8, "e.", 2))
              break;
            switch (NameR[10]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fcune_d;	 // "ips.fcune.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fcune_w;	 // "ips.fcune.w"
            }
            break;
          }
          break;
        case 'e':	 // 4 strings to match.
          if (NameR[6] != 'x')
            break;
          switch (NameR[7]) {
          default: break;
          case 'd':	 // 2 strings to match.
            if (memcmp(NameR.data()+8, "o.", 2))
              break;
            switch (NameR[10]) {
            default: break;
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_fexdo_h;	 // "ips.fexdo.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fexdo_w;	 // "ips.fexdo.w"
            }
            break;
          case 'p':	 // 2 strings to match.
            if (memcmp(NameR.data()+8, "2.", 2))
              break;
            switch (NameR[10]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fexp2_d;	 // "ips.fexp2.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fexp2_w;	 // "ips.fexp2.w"
            }
            break;
          }
          break;
        case 'l':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "og2.", 4))
            break;
          switch (NameR[10]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_flog2_d;	 // "ips.flog2.d"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_flog2_w;	 // "ips.flog2.w"
          }
          break;
        case 'm':	 // 4 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (memcmp(NameR.data()+7, "dd.", 3))
              break;
            switch (NameR[10]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fmadd_d;	 // "ips.fmadd.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fmadd_w;	 // "ips.fmadd.w"
            }
            break;
          case 's':	 // 2 strings to match.
            if (memcmp(NameR.data()+7, "ub.", 3))
              break;
            switch (NameR[10]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fmsub_d;	 // "ips.fmsub.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fmsub_w;	 // "ips.fmsub.w"
            }
            break;
          }
          break;
        case 'r':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "int.", 4))
            break;
          switch (NameR[10]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_frint_d;	 // "ips.frint.d"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_frint_w;	 // "ips.frint.w"
          }
          break;
        case 's':	 // 10 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'q':	 // 2 strings to match.
            if (memcmp(NameR.data()+7, "rt.", 3))
              break;
            switch (NameR[10]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fsqrt_d;	 // "ips.fsqrt.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fsqrt_w;	 // "ips.fsqrt.w"
            }
            break;
          case 'u':	 // 8 strings to match.
            switch (NameR[7]) {
            default: break;
            case 'e':	 // 2 strings to match.
              if (memcmp(NameR.data()+8, "q.", 2))
                break;
              switch (NameR[10]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_fsueq_d;	 // "ips.fsueq.d"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_fsueq_w;	 // "ips.fsueq.w"
              }
              break;
            case 'l':	 // 4 strings to match.
              switch (NameR[8]) {
              default: break;
              case 'e':	 // 2 strings to match.
                if (NameR[9] != '.')
                  break;
                switch (NameR[10]) {
                default: break;
                case 'd':	 // 1 string to match.
                  return Intrinsic::mips_fsule_d;	 // "ips.fsule.d"
                case 'w':	 // 1 string to match.
                  return Intrinsic::mips_fsule_w;	 // "ips.fsule.w"
                }
                break;
              case 't':	 // 2 strings to match.
                if (NameR[9] != '.')
                  break;
                switch (NameR[10]) {
                default: break;
                case 'd':	 // 1 string to match.
                  return Intrinsic::mips_fsult_d;	 // "ips.fsult.d"
                case 'w':	 // 1 string to match.
                  return Intrinsic::mips_fsult_w;	 // "ips.fsult.w"
                }
                break;
              }
              break;
            case 'n':	 // 2 strings to match.
              if (memcmp(NameR.data()+8, "e.", 2))
                break;
              switch (NameR[10]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_fsune_d;	 // "ips.fsune.d"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_fsune_w;	 // "ips.fsune.w"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 'i':	 // 12 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'l':	 // 8 strings to match.
          if (NameR[6] != 'v')
            break;
          switch (NameR[7]) {
          default: break;
          case 'e':	 // 4 strings to match.
            if (memcmp(NameR.data()+8, "v.", 2))
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_ilvev_b;	 // "ips.ilvev.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_ilvev_d;	 // "ips.ilvev.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_ilvev_h;	 // "ips.ilvev.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_ilvev_w;	 // "ips.ilvev.w"
            }
            break;
          case 'o':	 // 4 strings to match.
            if (memcmp(NameR.data()+8, "d.", 2))
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_ilvod_b;	 // "ips.ilvod.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_ilvod_d;	 // "ips.ilvod.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_ilvod_h;	 // "ips.ilvod.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_ilvod_w;	 // "ips.ilvod.w"
            }
            break;
          }
          break;
        case 'n':	 // 4 strings to match.
          if (memcmp(NameR.data()+6, "sve.", 4))
            break;
          switch (NameR[10]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_insve_b;	 // "ips.insve.b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_insve_d;	 // "ips.insve.d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_insve_h;	 // "ips.insve.h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_insve_w;	 // "ips.insve.w"
          }
          break;
        }
        break;
      case 'm':	 // 42 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'a':	 // 16 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'd':	 // 4 strings to match.
            if (memcmp(NameR.data()+7, "dv.", 3))
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_maddv_b;	 // "ips.maddv.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_maddv_d;	 // "ips.maddv.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_maddv_h;	 // "ips.maddv.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_maddv_w;	 // "ips.maddv.w"
            }
            break;
          case 'x':	 // 12 strings to match.
            if (NameR[7] != '.')
              break;
            switch (NameR[8]) {
            default: break;
            case 'a':	 // 4 strings to match.
              if (NameR[9] != '.')
                break;
              switch (NameR[10]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_max_a_b;	 // "ips.max.a.b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_max_a_d;	 // "ips.max.a.d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_max_a_h;	 // "ips.max.a.h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_max_a_w;	 // "ips.max.a.w"
              }
              break;
            case 's':	 // 4 strings to match.
              if (NameR[9] != '.')
                break;
              switch (NameR[10]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_max_s_b;	 // "ips.max.s.b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_max_s_d;	 // "ips.max.s.d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_max_s_h;	 // "ips.max.s.h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_max_s_w;	 // "ips.max.s.w"
              }
              break;
            case 'u':	 // 4 strings to match.
              if (NameR[9] != '.')
                break;
              switch (NameR[10]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_max_u_b;	 // "ips.max.u.b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_max_u_d;	 // "ips.max.u.d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_max_u_h;	 // "ips.max.u.h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_max_u_w;	 // "ips.max.u.w"
              }
              break;
            }
            break;
          }
          break;
        case 'i':	 // 12 strings to match.
          if (memcmp(NameR.data()+6, "n.", 2))
            break;
          switch (NameR[8]) {
          default: break;
          case 'a':	 // 4 strings to match.
            if (NameR[9] != '.')
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_min_a_b;	 // "ips.min.a.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_min_a_d;	 // "ips.min.a.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_min_a_h;	 // "ips.min.a.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_min_a_w;	 // "ips.min.a.w"
            }
            break;
          case 's':	 // 4 strings to match.
            if (NameR[9] != '.')
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_min_s_b;	 // "ips.min.s.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_min_s_d;	 // "ips.min.s.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_min_s_h;	 // "ips.min.s.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_min_s_w;	 // "ips.min.s.w"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (NameR[9] != '.')
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_min_u_b;	 // "ips.min.u.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_min_u_d;	 // "ips.min.u.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_min_u_h;	 // "ips.min.u.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_min_u_w;	 // "ips.min.u.w"
            }
            break;
          }
          break;
        case 'o':	 // 8 strings to match.
          if (memcmp(NameR.data()+6, "d.", 2))
            break;
          switch (NameR[8]) {
          default: break;
          case 's':	 // 4 strings to match.
            if (NameR[9] != '.')
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_mod_s_b;	 // "ips.mod.s.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_mod_s_d;	 // "ips.mod.s.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_mod_s_h;	 // "ips.mod.s.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_mod_s_w;	 // "ips.mod.s.w"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (NameR[9] != '.')
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_mod_u_b;	 // "ips.mod.u.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_mod_u_d;	 // "ips.mod.u.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_mod_u_h;	 // "ips.mod.u.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_mod_u_w;	 // "ips.mod.u.w"
            }
            break;
          }
          break;
        case 's':	 // 4 strings to match.
          if (memcmp(NameR.data()+6, "ubv.", 4))
            break;
          switch (NameR[10]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_msubv_b;	 // "ips.msubv.b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_msubv_d;	 // "ips.msubv.d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_msubv_h;	 // "ips.msubv.h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_msubv_w;	 // "ips.msubv.w"
          }
          break;
        case 'u':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "l.q.", 4))
            break;
          switch (NameR[10]) {
          default: break;
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_mul_q_h;	 // "ips.mul.q.h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_mul_q_w;	 // "ips.mul.q.w"
          }
          break;
        }
        break;
      case 'p':	 // 11 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'c':	 // 8 strings to match.
          if (NameR[6] != 'k')
            break;
          switch (NameR[7]) {
          default: break;
          case 'e':	 // 4 strings to match.
            if (memcmp(NameR.data()+8, "v.", 2))
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_pckev_b;	 // "ips.pckev.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_pckev_d;	 // "ips.pckev.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_pckev_h;	 // "ips.pckev.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_pckev_w;	 // "ips.pckev.w"
            }
            break;
          case 'o':	 // 4 strings to match.
            if (memcmp(NameR.data()+8, "d.", 2))
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_pckod_b;	 // "ips.pckod.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_pckod_d;	 // "ips.pckod.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_pckod_h;	 // "ips.pckod.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_pckod_w;	 // "ips.pckod.w"
            }
            break;
          }
          break;
        case 'i':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "ck.", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case 'p':	 // 1 string to match.
            if (NameR[10] != 'h')
              break;
            return Intrinsic::mips_pick_ph;	 // "ips.pick.ph"
          case 'q':	 // 1 string to match.
            if (NameR[10] != 'b')
              break;
            return Intrinsic::mips_pick_qb;	 // "ips.pick.qb"
          }
          break;
        case 'r':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "epend", 5))
            break;
          return Intrinsic::mips_prepend;	 // "ips.prepend"
        }
        break;
      case 'r':	 // 2 strings to match.
        if (memcmp(NameR.data()+5, "epl.", 4))
          break;
        switch (NameR[9]) {
        default: break;
        case 'p':	 // 1 string to match.
          if (NameR[10] != 'h')
            break;
          return Intrinsic::mips_repl_ph;	 // "ips.repl.ph"
        case 'q':	 // 1 string to match.
          if (NameR[10] != 'b')
            break;
          return Intrinsic::mips_repl_qb;	 // "ips.repl.qb"
        }
        break;
      case 's':	 // 34 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'a':	 // 8 strings to match.
          if (memcmp(NameR.data()+6, "t.", 2))
            break;
          switch (NameR[8]) {
          default: break;
          case 's':	 // 4 strings to match.
            if (NameR[9] != '.')
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_sat_s_b;	 // "ips.sat.s.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_sat_s_d;	 // "ips.sat.s.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_sat_s_h;	 // "ips.sat.s.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_sat_s_w;	 // "ips.sat.s.w"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (NameR[9] != '.')
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_sat_u_b;	 // "ips.sat.u.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_sat_u_d;	 // "ips.sat.u.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_sat_u_h;	 // "ips.sat.u.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_sat_u_w;	 // "ips.sat.u.w"
            }
            break;
          }
          break;
        case 'h':	 // 6 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'l':	 // 2 strings to match.
            if (memcmp(NameR.data()+7, "l.", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 'p':	 // 1 string to match.
              if (NameR[10] != 'h')
                break;
              return Intrinsic::mips_shll_ph;	 // "ips.shll.ph"
            case 'q':	 // 1 string to match.
              if (NameR[10] != 'b')
                break;
              return Intrinsic::mips_shll_qb;	 // "ips.shll.qb"
            }
            break;
          case 'r':	 // 4 strings to match.
            switch (NameR[7]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (NameR[8] != '.')
                break;
              switch (NameR[9]) {
              default: break;
              case 'p':	 // 1 string to match.
                if (NameR[10] != 'h')
                  break;
                return Intrinsic::mips_shra_ph;	 // "ips.shra.ph"
              case 'q':	 // 1 string to match.
                if (NameR[10] != 'b')
                  break;
                return Intrinsic::mips_shra_qb;	 // "ips.shra.qb"
              }
              break;
            case 'l':	 // 2 strings to match.
              if (NameR[8] != '.')
                break;
              switch (NameR[9]) {
              default: break;
              case 'p':	 // 1 string to match.
                if (NameR[10] != 'h')
                  break;
                return Intrinsic::mips_shrl_ph;	 // "ips.shrl.ph"
              case 'q':	 // 1 string to match.
                if (NameR[10] != 'b')
                  break;
                return Intrinsic::mips_shrl_qb;	 // "ips.shrl.qb"
              }
              break;
            }
            break;
          }
          break;
        case 'p':	 // 4 strings to match.
          if (memcmp(NameR.data()+6, "lat.", 4))
            break;
          switch (NameR[10]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_splat_b;	 // "ips.splat.b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_splat_d;	 // "ips.splat.d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_splat_h;	 // "ips.splat.h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_splat_w;	 // "ips.splat.w"
          }
          break;
        case 'r':	 // 8 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'a':	 // 4 strings to match.
            if (memcmp(NameR.data()+7, "ri.", 3))
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_srari_b;	 // "ips.srari.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_srari_d;	 // "ips.srari.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_srari_h;	 // "ips.srari.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_srari_w;	 // "ips.srari.w"
            }
            break;
          case 'l':	 // 4 strings to match.
            if (memcmp(NameR.data()+7, "ri.", 3))
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_srlri_b;	 // "ips.srlri.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_srlri_d;	 // "ips.srlri.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_srlri_h;	 // "ips.srlri.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_srlri_w;	 // "ips.srlri.w"
            }
            break;
          }
          break;
        case 'u':	 // 8 strings to match.
          if (NameR[6] != 'b')
            break;
          switch (NameR[7]) {
          default: break;
          case 'q':	 // 2 strings to match.
            switch (NameR[8]) {
            default: break;
            case '.':	 // 1 string to match.
              if (memcmp(NameR.data()+9, "ph", 2))
                break;
              return Intrinsic::mips_subq_ph;	 // "ips.subq.ph"
            case 'h':	 // 1 string to match.
              if (memcmp(NameR.data()+9, ".w", 2))
                break;
              return Intrinsic::mips_subqh_w;	 // "ips.subqh.w"
            }
            break;
          case 'u':	 // 2 strings to match.
            if (NameR[8] != '.')
              break;
            switch (NameR[9]) {
            default: break;
            case 'p':	 // 1 string to match.
              if (NameR[10] != 'h')
                break;
              return Intrinsic::mips_subu_ph;	 // "ips.subu.ph"
            case 'q':	 // 1 string to match.
              if (NameR[10] != 'b')
                break;
              return Intrinsic::mips_subu_qb;	 // "ips.subu.qb"
            }
            break;
          case 'v':	 // 4 strings to match.
            if (memcmp(NameR.data()+8, "i.", 2))
              break;
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_subvi_b;	 // "ips.subvi.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_subvi_d;	 // "ips.subvi.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_subvi_h;	 // "ips.subvi.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_subvi_w;	 // "ips.subvi.w"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 12:	 // 144 strings to match.
      if (memcmp(NameR.data()+0, "ips.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'a':	 // 32 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'b':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "sq.s.w", 6))
            break;
          return Intrinsic::mips_absq_s_w;	 // "ips.absq.s.w"
        case 'd':	 // 15 strings to match.
          if (NameR[6] != 'd')
            break;
          switch (NameR[7]) {
          default: break;
          case 'q':	 // 2 strings to match.
            switch (NameR[8]) {
            default: break;
            case '.':	 // 1 string to match.
              if (memcmp(NameR.data()+9, "s.w", 3))
                break;
              return Intrinsic::mips_addq_s_w;	 // "ips.addq.s.w"
            case 'h':	 // 1 string to match.
              if (memcmp(NameR.data()+9, ".ph", 3))
                break;
              return Intrinsic::mips_addqh_ph;	 // "ips.addqh.ph"
            }
            break;
          case 's':	 // 12 strings to match.
            if (NameR[8] != '.')
              break;
            switch (NameR[9]) {
            default: break;
            case 'a':	 // 4 strings to match.
              if (NameR[10] != '.')
                break;
              switch (NameR[11]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_adds_a_b;	 // "ips.adds.a.b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_adds_a_d;	 // "ips.adds.a.d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_adds_a_h;	 // "ips.adds.a.h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_adds_a_w;	 // "ips.adds.a.w"
              }
              break;
            case 's':	 // 4 strings to match.
              if (NameR[10] != '.')
                break;
              switch (NameR[11]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_adds_s_b;	 // "ips.adds.s.b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_adds_s_d;	 // "ips.adds.s.d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_adds_s_h;	 // "ips.adds.s.h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_adds_s_w;	 // "ips.adds.s.w"
              }
              break;
            case 'u':	 // 4 strings to match.
              if (NameR[10] != '.')
                break;
              switch (NameR[11]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_adds_u_b;	 // "ips.adds.u.b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_adds_u_d;	 // "ips.adds.u.d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_adds_u_h;	 // "ips.adds.u.h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_adds_u_w;	 // "ips.adds.u.w"
              }
              break;
            }
            break;
          case 'u':	 // 1 string to match.
            if (memcmp(NameR.data()+8, "h.qb", 4))
              break;
            return Intrinsic::mips_adduh_qb;	 // "ips.adduh.qb"
          }
          break;
        case 's':	 // 8 strings to match.
          if (memcmp(NameR.data()+6, "ub.", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case 's':	 // 4 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_asub_s_b;	 // "ips.asub.s.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_asub_s_d;	 // "ips.asub.s.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_asub_s_h;	 // "ips.asub.s.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_asub_s_w;	 // "ips.asub.s.w"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_asub_u_b;	 // "ips.asub.u.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_asub_u_d;	 // "ips.asub.u.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_asub_u_h;	 // "ips.asub.u.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_asub_u_w;	 // "ips.asub.u.w"
            }
            break;
          }
          break;
        case 'v':	 // 8 strings to match.
          if (memcmp(NameR.data()+6, "er.", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case 's':	 // 4 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_aver_s_b;	 // "ips.aver.s.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_aver_s_d;	 // "ips.aver.s.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_aver_s_h;	 // "ips.aver.s.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_aver_s_w;	 // "ips.aver.s.w"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_aver_u_b;	 // "ips.aver.u.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_aver_u_d;	 // "ips.aver.u.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_aver_u_h;	 // "ips.aver.u.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_aver_u_w;	 // "ips.aver.u.w"
            }
            break;
          }
          break;
        }
        break;
      case 'b':	 // 9 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'i':	 // 8 strings to match.
          if (memcmp(NameR.data()+6, "ns", 2))
            break;
          switch (NameR[8]) {
          default: break;
          case 'l':	 // 4 strings to match.
            if (memcmp(NameR.data()+9, "i.", 2))
              break;
            switch (NameR[11]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_binsli_b;	 // "ips.binsli.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_binsli_d;	 // "ips.binsli.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_binsli_h;	 // "ips.binsli.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_binsli_w;	 // "ips.binsli.w"
            }
            break;
          case 'r':	 // 4 strings to match.
            if (memcmp(NameR.data()+9, "i.", 2))
              break;
            switch (NameR[11]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_binsri_b;	 // "ips.binsri.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_binsri_d;	 // "ips.binsri.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_binsri_h;	 // "ips.binsri.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_binsri_w;	 // "ips.binsri.w"
            }
            break;
          }
          break;
        case 'p':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "osge32", 6))
            break;
          return Intrinsic::mips_bposge32;	 // "ips.bposge32"
        }
        break;
      case 'c':	 // 24 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'l':	 // 16 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'e':	 // 8 strings to match.
            if (memcmp(NameR.data()+7, "i.", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 's':	 // 4 strings to match.
              if (NameR[10] != '.')
                break;
              switch (NameR[11]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_clei_s_b;	 // "ips.clei.s.b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_clei_s_d;	 // "ips.clei.s.d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_clei_s_h;	 // "ips.clei.s.h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_clei_s_w;	 // "ips.clei.s.w"
              }
              break;
            case 'u':	 // 4 strings to match.
              if (NameR[10] != '.')
                break;
              switch (NameR[11]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_clei_u_b;	 // "ips.clei.u.b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_clei_u_d;	 // "ips.clei.u.d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_clei_u_h;	 // "ips.clei.u.h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_clei_u_w;	 // "ips.clei.u.w"
              }
              break;
            }
            break;
          case 't':	 // 8 strings to match.
            if (memcmp(NameR.data()+7, "i.", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 's':	 // 4 strings to match.
              if (NameR[10] != '.')
                break;
              switch (NameR[11]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_clti_s_b;	 // "ips.clti.s.b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_clti_s_d;	 // "ips.clti.s.d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_clti_s_h;	 // "ips.clti.s.h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_clti_s_w;	 // "ips.clti.s.w"
              }
              break;
            case 'u':	 // 4 strings to match.
              if (NameR[10] != '.')
                break;
              switch (NameR[11]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_clti_u_b;	 // "ips.clti.u.b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_clti_u_d;	 // "ips.clti.u.d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_clti_u_h;	 // "ips.clti.u.h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_clti_u_w;	 // "ips.clti.u.w"
              }
              break;
            }
            break;
          }
          break;
        case 'o':	 // 8 strings to match.
          if (memcmp(NameR.data()+6, "py.", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case 's':	 // 4 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_copy_s_b;	 // "ips.copy.s.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_copy_s_d;	 // "ips.copy.s.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_copy_s_h;	 // "ips.copy.s.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_copy_s_w;	 // "ips.copy.s.w"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_copy_u_b;	 // "ips.copy.u.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_copy_u_d;	 // "ips.copy.u.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_copy_u_h;	 // "ips.copy.u.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_copy_u_w;	 // "ips.copy.u.w"
            }
            break;
          }
          break;
        }
        break;
      case 'd':	 // 8 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'o':	 // 6 strings to match.
          if (memcmp(NameR.data()+6, "tp.", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case 's':	 // 3 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_dotp_s_d;	 // "ips.dotp.s.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_dotp_s_h;	 // "ips.dotp.s.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_dotp_s_w;	 // "ips.dotp.s.w"
            }
            break;
          case 'u':	 // 3 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_dotp_u_d;	 // "ips.dotp.u.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_dotp_u_h;	 // "ips.dotp.u.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_dotp_u_w;	 // "ips.dotp.u.w"
            }
            break;
          }
          break;
        case 'p':	 // 2 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(NameR.data()+7, ".w.ph", 5))
              break;
            return Intrinsic::mips_dpa_w_ph;	 // "ips.dpa.w.ph"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+7, ".w.ph", 5))
              break;
            return Intrinsic::mips_dps_w_ph;	 // "ips.dps.w.ph"
          }
          break;
        }
        break;
      case 'e':	 // 2 strings to match.
        if (memcmp(NameR.data()+5, "xtr.", 4))
          break;
        switch (NameR[9]) {
        default: break;
        case 'r':	 // 1 string to match.
          if (memcmp(NameR.data()+10, ".w", 2))
            break;
          return Intrinsic::mips_extr_r_w;	 // "ips.extr.r.w"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+10, ".h", 2))
            break;
          return Intrinsic::mips_extr_s_h;	 // "ips.extr.s.h"
        }
        break;
      case 'f':	 // 12 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'c':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "lass.", 5))
            break;
          switch (NameR[11]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_fclass_d;	 // "ips.fclass.d"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_fclass_w;	 // "ips.fclass.w"
          }
          break;
        case 'e':	 // 4 strings to match.
          if (memcmp(NameR.data()+6, "xup", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case 'l':	 // 2 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fexupl_d;	 // "ips.fexupl.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fexupl_w;	 // "ips.fexupl.w"
            }
            break;
          case 'r':	 // 2 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fexupr_d;	 // "ips.fexupr.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fexupr_w;	 // "ips.fexupr.w"
            }
            break;
          }
          break;
        case 'm':	 // 4 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (memcmp(NameR.data()+7, "x.a.", 4))
              break;
            switch (NameR[11]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fmax_a_d;	 // "ips.fmax.a.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fmax_a_w;	 // "ips.fmax.a.w"
            }
            break;
          case 'i':	 // 2 strings to match.
            if (memcmp(NameR.data()+7, "n.a.", 4))
              break;
            switch (NameR[11]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fmin_a_d;	 // "ips.fmin.a.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fmin_a_w;	 // "ips.fmin.a.w"
            }
            break;
          }
          break;
        case 'r':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "sqrt.", 5))
            break;
          switch (NameR[11]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_frsqrt_d;	 // "ips.frsqrt.d"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_frsqrt_w;	 // "ips.frsqrt.w"
          }
          break;
        }
        break;
      case 'h':	 // 12 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'a':	 // 6 strings to match.
          if (memcmp(NameR.data()+6, "dd.", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case 's':	 // 3 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_hadd_s_d;	 // "ips.hadd.s.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_hadd_s_h;	 // "ips.hadd.s.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_hadd_s_w;	 // "ips.hadd.s.w"
            }
            break;
          case 'u':	 // 3 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_hadd_u_d;	 // "ips.hadd.u.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_hadd_u_h;	 // "ips.hadd.u.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_hadd_u_w;	 // "ips.hadd.u.w"
            }
            break;
          }
          break;
        case 's':	 // 6 strings to match.
          if (memcmp(NameR.data()+6, "ub.", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case 's':	 // 3 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_hsub_s_d;	 // "ips.hsub.s.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_hsub_s_h;	 // "ips.hsub.s.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_hsub_s_w;	 // "ips.hsub.s.w"
            }
            break;
          case 'u':	 // 3 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_hsub_u_d;	 // "ips.hsub.u.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_hsub_u_h;	 // "ips.hsub.u.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_hsub_u_w;	 // "ips.hsub.u.w"
            }
            break;
          }
          break;
        }
        break;
      case 'i':	 // 4 strings to match.
        if (memcmp(NameR.data()+5, "nsert.", 6))
          break;
        switch (NameR[11]) {
        default: break;
        case 'b':	 // 1 string to match.
          return Intrinsic::mips_insert_b;	 // "ips.insert.b"
        case 'd':	 // 1 string to match.
          return Intrinsic::mips_insert_d;	 // "ips.insert.d"
        case 'h':	 // 1 string to match.
          return Intrinsic::mips_insert_h;	 // "ips.insert.h"
        case 'w':	 // 1 string to match.
          return Intrinsic::mips_insert_w;	 // "ips.insert.w"
        }
        break;
      case 'm':	 // 24 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'a':	 // 10 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'd':	 // 2 strings to match.
            if (memcmp(NameR.data()+7, "d.q.", 4))
              break;
            switch (NameR[11]) {
            default: break;
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_madd_q_h;	 // "ips.madd.q.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_madd_q_w;	 // "ips.madd.q.w"
            }
            break;
          case 'x':	 // 8 strings to match.
            if (memcmp(NameR.data()+7, "i.", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 's':	 // 4 strings to match.
              if (NameR[10] != '.')
                break;
              switch (NameR[11]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_maxi_s_b;	 // "ips.maxi.s.b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_maxi_s_d;	 // "ips.maxi.s.d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_maxi_s_h;	 // "ips.maxi.s.h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_maxi_s_w;	 // "ips.maxi.s.w"
              }
              break;
            case 'u':	 // 4 strings to match.
              if (NameR[10] != '.')
                break;
              switch (NameR[11]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_maxi_u_b;	 // "ips.maxi.u.b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_maxi_u_d;	 // "ips.maxi.u.d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_maxi_u_h;	 // "ips.maxi.u.h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_maxi_u_w;	 // "ips.maxi.u.w"
              }
              break;
            }
            break;
          }
          break;
        case 'i':	 // 8 strings to match.
          if (memcmp(NameR.data()+6, "ni.", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case 's':	 // 4 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_mini_s_b;	 // "ips.mini.s.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_mini_s_d;	 // "ips.mini.s.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_mini_s_h;	 // "ips.mini.s.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_mini_s_w;	 // "ips.mini.s.w"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_mini_u_b;	 // "ips.mini.u.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_mini_u_d;	 // "ips.mini.u.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_mini_u_h;	 // "ips.mini.u.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_mini_u_w;	 // "ips.mini.u.w"
            }
            break;
          }
          break;
        case 's':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "ub.q.", 5))
            break;
          switch (NameR[11]) {
          default: break;
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_msub_q_h;	 // "ips.msub.q.h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_msub_q_w;	 // "ips.msub.q.w"
          }
          break;
        case 'u':	 // 4 strings to match.
          if (NameR[6] != 'l')
            break;
          switch (NameR[7]) {
          default: break;
          case '.':	 // 1 string to match.
            if (memcmp(NameR.data()+8, "s.ph", 4))
              break;
            return Intrinsic::mips_mul_s_ph;	 // "ips.mul.s.ph"
          case 'q':	 // 1 string to match.
            if (memcmp(NameR.data()+8, ".s.w", 4))
              break;
            return Intrinsic::mips_mulq_s_w;	 // "ips.mulq.s.w"
          case 'r':	 // 2 strings to match.
            if (memcmp(NameR.data()+8, ".q.", 3))
              break;
            switch (NameR[11]) {
            default: break;
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_mulr_q_h;	 // "ips.mulr.q.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_mulr_q_w;	 // "ips.mulr.q.w"
            }
            break;
          }
          break;
        }
        break;
      case 's':	 // 17 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'h':	 // 2 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'l':	 // 1 string to match.
            if (memcmp(NameR.data()+7, "l.s.w", 5))
              break;
            return Intrinsic::mips_shll_s_w;	 // "ips.shll.s.w"
          case 'r':	 // 1 string to match.
            if (memcmp(NameR.data()+7, "a.r.w", 5))
              break;
            return Intrinsic::mips_shra_r_w;	 // "ips.shra.r.w"
          }
          break;
        case 'p':	 // 4 strings to match.
          if (memcmp(NameR.data()+6, "lati.", 5))
            break;
          switch (NameR[11]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_splati_b;	 // "ips.splati.b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_splati_d;	 // "ips.splati.d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_splati_h;	 // "ips.splati.h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_splati_w;	 // "ips.splati.w"
          }
          break;
        case 'u':	 // 11 strings to match.
          if (NameR[6] != 'b')
            break;
          switch (NameR[7]) {
          default: break;
          case 'q':	 // 2 strings to match.
            switch (NameR[8]) {
            default: break;
            case '.':	 // 1 string to match.
              if (memcmp(NameR.data()+9, "s.w", 3))
                break;
              return Intrinsic::mips_subq_s_w;	 // "ips.subq.s.w"
            case 'h':	 // 1 string to match.
              if (memcmp(NameR.data()+9, ".ph", 3))
                break;
              return Intrinsic::mips_subqh_ph;	 // "ips.subqh.ph"
            }
            break;
          case 's':	 // 8 strings to match.
            if (NameR[8] != '.')
              break;
            switch (NameR[9]) {
            default: break;
            case 's':	 // 4 strings to match.
              if (NameR[10] != '.')
                break;
              switch (NameR[11]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_subs_s_b;	 // "ips.subs.s.b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_subs_s_d;	 // "ips.subs.s.d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_subs_s_h;	 // "ips.subs.s.h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_subs_s_w;	 // "ips.subs.s.w"
              }
              break;
            case 'u':	 // 4 strings to match.
              if (NameR[10] != '.')
                break;
              switch (NameR[11]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_subs_u_b;	 // "ips.subs.u.b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_subs_u_d;	 // "ips.subs.u.d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_subs_u_h;	 // "ips.subs.u.h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_subs_u_w;	 // "ips.subs.u.w"
              }
              break;
            }
            break;
          case 'u':	 // 1 string to match.
            if (memcmp(NameR.data()+8, "h.qb", 4))
              break;
            return Intrinsic::mips_subuh_qb;	 // "ips.subuh.qb"
          }
          break;
        }
        break;
      }
      break;
    case 13:	 // 46 strings to match.
      if (memcmp(NameR.data()+0, "ips.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'a':	 // 6 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'b':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "sq.s.", 5))
            break;
          switch (NameR[11]) {
          default: break;
          case 'p':	 // 1 string to match.
            if (NameR[12] != 'h')
              break;
            return Intrinsic::mips_absq_s_ph;	 // "ips.absq.s.ph"
          case 'q':	 // 1 string to match.
            if (NameR[12] != 'b')
              break;
            return Intrinsic::mips_absq_s_qb;	 // "ips.absq.s.qb"
          }
          break;
        case 'd':	 // 4 strings to match.
          if (NameR[6] != 'd')
            break;
          switch (NameR[7]) {
          default: break;
          case 'q':	 // 2 strings to match.
            switch (NameR[8]) {
            default: break;
            case '.':	 // 1 string to match.
              if (memcmp(NameR.data()+9, "s.ph", 4))
                break;
              return Intrinsic::mips_addq_s_ph;	 // "ips.addq.s.ph"
            case 'h':	 // 1 string to match.
              if (memcmp(NameR.data()+9, ".r.w", 4))
                break;
              return Intrinsic::mips_addqh_r_w;	 // "ips.addqh.r.w"
            }
            break;
          case 'u':	 // 2 strings to match.
            if (memcmp(NameR.data()+8, ".s.", 3))
              break;
            switch (NameR[11]) {
            default: break;
            case 'p':	 // 1 string to match.
              if (NameR[12] != 'h')
                break;
              return Intrinsic::mips_addu_s_ph;	 // "ips.addu.s.ph"
            case 'q':	 // 1 string to match.
              if (NameR[12] != 'b')
                break;
              return Intrinsic::mips_addu_s_qb;	 // "ips.addu.s.qb"
            }
            break;
          }
          break;
        }
        break;
      case 'c':	 // 3 strings to match.
        if (memcmp(NameR.data()+5, "mp.", 3))
          break;
        switch (NameR[8]) {
        default: break;
        case 'e':	 // 1 string to match.
          if (memcmp(NameR.data()+9, "q.ph", 4))
            break;
          return Intrinsic::mips_cmp_eq_ph;	 // "ips.cmp.eq.ph"
        case 'l':	 // 2 strings to match.
          switch (NameR[9]) {
          default: break;
          case 'e':	 // 1 string to match.
            if (memcmp(NameR.data()+10, ".ph", 3))
              break;
            return Intrinsic::mips_cmp_le_ph;	 // "ips.cmp.le.ph"
          case 't':	 // 1 string to match.
            if (memcmp(NameR.data()+10, ".ph", 3))
              break;
            return Intrinsic::mips_cmp_lt_ph;	 // "ips.cmp.lt.ph"
          }
          break;
        }
        break;
      case 'd':	 // 14 strings to match.
        if (NameR[5] != 'p')
          break;
        switch (NameR[6]) {
        default: break;
        case 'a':	 // 7 strings to match.
          switch (NameR[7]) {
          default: break;
          case 'd':	 // 6 strings to match.
            if (memcmp(NameR.data()+8, "d.", 2))
              break;
            switch (NameR[10]) {
            default: break;
            case 's':	 // 3 strings to match.
              if (NameR[11] != '.')
                break;
              switch (NameR[12]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_dpadd_s_d;	 // "ips.dpadd.s.d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_dpadd_s_h;	 // "ips.dpadd.s.h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_dpadd_s_w;	 // "ips.dpadd.s.w"
              }
              break;
            case 'u':	 // 3 strings to match.
              if (NameR[11] != '.')
                break;
              switch (NameR[12]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_dpadd_u_d;	 // "ips.dpadd.u.d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_dpadd_u_h;	 // "ips.dpadd.u.h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_dpadd_u_w;	 // "ips.dpadd.u.w"
              }
              break;
            }
            break;
          case 'x':	 // 1 string to match.
            if (memcmp(NameR.data()+8, ".w.ph", 5))
              break;
            return Intrinsic::mips_dpax_w_ph;	 // "ips.dpax.w.ph"
          }
          break;
        case 's':	 // 7 strings to match.
          switch (NameR[7]) {
          default: break;
          case 'u':	 // 6 strings to match.
            if (memcmp(NameR.data()+8, "b.", 2))
              break;
            switch (NameR[10]) {
            default: break;
            case 's':	 // 3 strings to match.
              if (NameR[11] != '.')
                break;
              switch (NameR[12]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_dpsub_s_d;	 // "ips.dpsub.s.d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_dpsub_s_h;	 // "ips.dpsub.s.h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_dpsub_s_w;	 // "ips.dpsub.s.w"
              }
              break;
            case 'u':	 // 3 strings to match.
              if (NameR[11] != '.')
                break;
              switch (NameR[12]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_dpsub_u_d;	 // "ips.dpsub.u.d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_dpsub_u_h;	 // "ips.dpsub.u.h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_dpsub_u_w;	 // "ips.dpsub.u.w"
              }
              break;
            }
            break;
          case 'x':	 // 1 string to match.
            if (memcmp(NameR.data()+8, ".w.ph", 5))
              break;
            return Intrinsic::mips_dpsx_w_ph;	 // "ips.dpsx.w.ph"
          }
          break;
        }
        break;
      case 'e':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "xtr.rs.w", 8))
          break;
        return Intrinsic::mips_extr_rs_w;	 // "ips.extr.rs.w"
      case 'f':	 // 8 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'f':	 // 4 strings to match.
          if (memcmp(NameR.data()+6, "int.", 4))
            break;
          switch (NameR[10]) {
          default: break;
          case 's':	 // 2 strings to match.
            if (NameR[11] != '.')
              break;
            switch (NameR[12]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_ffint_s_d;	 // "ips.ffint.s.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_ffint_s_w;	 // "ips.ffint.s.w"
            }
            break;
          case 'u':	 // 2 strings to match.
            if (NameR[11] != '.')
              break;
            switch (NameR[12]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_ffint_u_d;	 // "ips.ffint.u.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_ffint_u_w;	 // "ips.ffint.u.w"
            }
            break;
          }
          break;
        case 't':	 // 4 strings to match.
          if (memcmp(NameR.data()+6, "int.", 4))
            break;
          switch (NameR[10]) {
          default: break;
          case 's':	 // 2 strings to match.
            if (NameR[11] != '.')
              break;
            switch (NameR[12]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_ftint_s_d;	 // "ips.ftint.s.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_ftint_s_w;	 // "ips.ftint.s.w"
            }
            break;
          case 'u':	 // 2 strings to match.
            if (NameR[11] != '.')
              break;
            switch (NameR[12]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_ftint_u_d;	 // "ips.ftint.u.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_ftint_u_w;	 // "ips.ftint.u.w"
            }
            break;
          }
          break;
        }
        break;
      case 'm':	 // 6 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'a':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "ddr.q.", 6))
            break;
          switch (NameR[12]) {
          default: break;
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_maddr_q_h;	 // "ips.maddr.q.h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_maddr_q_w;	 // "ips.maddr.q.w"
          }
          break;
        case 's':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "ubr.q.", 6))
            break;
          switch (NameR[12]) {
          default: break;
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_msubr_q_h;	 // "ips.msubr.q.h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_msubr_q_w;	 // "ips.msubr.q.w"
          }
          break;
        case 'u':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "lq.", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case 'r':	 // 1 string to match.
            if (memcmp(NameR.data()+10, "s.w", 3))
              break;
            return Intrinsic::mips_mulq_rs_w;	 // "ips.mulq.rs.w"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+10, ".ph", 3))
              break;
            return Intrinsic::mips_mulq_s_ph;	 // "ips.mulq.s.ph"
          }
          break;
        }
        break;
      case 'p':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "ackrl.ph", 8))
          break;
        return Intrinsic::mips_packrl_ph;	 // "ips.packrl.ph"
      case 's':	 // 7 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'h':	 // 3 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'l':	 // 1 string to match.
            if (memcmp(NameR.data()+7, "l.s.ph", 6))
              break;
            return Intrinsic::mips_shll_s_ph;	 // "ips.shll.s.ph"
          case 'r':	 // 2 strings to match.
            if (memcmp(NameR.data()+7, "a.r.", 4))
              break;
            switch (NameR[11]) {
            default: break;
            case 'p':	 // 1 string to match.
              if (NameR[12] != 'h')
                break;
              return Intrinsic::mips_shra_r_ph;	 // "ips.shra.r.ph"
            case 'q':	 // 1 string to match.
              if (NameR[12] != 'b')
                break;
              return Intrinsic::mips_shra_r_qb;	 // "ips.shra.r.qb"
            }
            break;
          }
          break;
        case 'u':	 // 4 strings to match.
          if (NameR[6] != 'b')
            break;
          switch (NameR[7]) {
          default: break;
          case 'q':	 // 2 strings to match.
            switch (NameR[8]) {
            default: break;
            case '.':	 // 1 string to match.
              if (memcmp(NameR.data()+9, "s.ph", 4))
                break;
              return Intrinsic::mips_subq_s_ph;	 // "ips.subq.s.ph"
            case 'h':	 // 1 string to match.
              if (memcmp(NameR.data()+9, ".r.w", 4))
                break;
              return Intrinsic::mips_subqh_r_w;	 // "ips.subqh.r.w"
            }
            break;
          case 'u':	 // 2 strings to match.
            if (memcmp(NameR.data()+8, ".s.", 3))
              break;
            switch (NameR[11]) {
            default: break;
            case 'p':	 // 1 string to match.
              if (NameR[12] != 'h')
                break;
              return Intrinsic::mips_subu_s_ph;	 // "ips.subu.s.ph"
            case 'q':	 // 1 string to match.
              if (NameR[12] != 'b')
                break;
              return Intrinsic::mips_subu_s_qb;	 // "ips.subu.s.qb"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 14:	 // 26 strings to match.
      if (memcmp(NameR.data()+0, "ips.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'a':	 // 2 strings to match.
        if (memcmp(NameR.data()+5, "dd", 2))
          break;
        switch (NameR[7]) {
        default: break;
        case 'q':	 // 1 string to match.
          if (memcmp(NameR.data()+8, "h.r.ph", 6))
            break;
          return Intrinsic::mips_addqh_r_ph;	 // "ips.addqh.r.ph"
        case 'u':	 // 1 string to match.
          if (memcmp(NameR.data()+8, "h.r.qb", 6))
            break;
          return Intrinsic::mips_adduh_r_qb;	 // "ips.adduh.r.qb"
        }
        break;
      case 'c':	 // 3 strings to match.
        if (memcmp(NameR.data()+5, "mpu.", 4))
          break;
        switch (NameR[9]) {
        default: break;
        case 'e':	 // 1 string to match.
          if (memcmp(NameR.data()+10, "q.qb", 4))
            break;
          return Intrinsic::mips_cmpu_eq_qb;	 // "ips.cmpu.eq.qb"
        case 'l':	 // 2 strings to match.
          switch (NameR[10]) {
          default: break;
          case 'e':	 // 1 string to match.
            if (memcmp(NameR.data()+11, ".qb", 3))
              break;
            return Intrinsic::mips_cmpu_le_qb;	 // "ips.cmpu.le.qb"
          case 't':	 // 1 string to match.
            if (memcmp(NameR.data()+11, ".qb", 3))
              break;
            return Intrinsic::mips_cmpu_lt_qb;	 // "ips.cmpu.lt.qb"
          }
          break;
        }
        break;
      case 'd':	 // 4 strings to match.
        if (NameR[5] != 'p')
          break;
        switch (NameR[6]) {
        default: break;
        case 'a':	 // 2 strings to match.
          if (memcmp(NameR.data()+7, "u.h.qb", 6))
            break;
          switch (NameR[13]) {
          default: break;
          case 'l':	 // 1 string to match.
            return Intrinsic::mips_dpau_h_qbl;	 // "ips.dpau.h.qbl"
          case 'r':	 // 1 string to match.
            return Intrinsic::mips_dpau_h_qbr;	 // "ips.dpau.h.qbr"
          }
          break;
        case 's':	 // 2 strings to match.
          if (memcmp(NameR.data()+7, "u.h.qb", 6))
            break;
          switch (NameR[13]) {
          default: break;
          case 'l':	 // 1 string to match.
            return Intrinsic::mips_dpsu_h_qbl;	 // "ips.dpsu.h.qbl"
          case 'r':	 // 1 string to match.
            return Intrinsic::mips_dpsu_h_qbr;	 // "ips.dpsu.h.qbr"
          }
          break;
        }
        break;
      case 'f':	 // 4 strings to match.
        if (memcmp(NameR.data()+5, "trunc.", 6))
          break;
        switch (NameR[11]) {
        default: break;
        case 's':	 // 2 strings to match.
          if (NameR[12] != '.')
            break;
          switch (NameR[13]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_ftrunc_s_d;	 // "ips.ftrunc.s.d"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_ftrunc_s_w;	 // "ips.ftrunc.s.w"
          }
          break;
        case 'u':	 // 2 strings to match.
          if (NameR[12] != '.')
            break;
          switch (NameR[13]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_ftrunc_u_d;	 // "ips.ftrunc.u.d"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_ftrunc_u_w;	 // "ips.ftrunc.u.w"
          }
          break;
        }
        break;
      case 'm':	 // 2 strings to match.
        if (memcmp(NameR.data()+5, "ul", 2))
          break;
        switch (NameR[7]) {
        default: break;
        case 'q':	 // 1 string to match.
          if (memcmp(NameR.data()+8, ".rs.ph", 6))
            break;
          return Intrinsic::mips_mulq_rs_ph;	 // "ips.mulq.rs.ph"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+8, "a.w.ph", 6))
            break;
          return Intrinsic::mips_mulsa_w_ph;	 // "ips.mulsa.w.ph"
        }
        break;
      case 'r':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "addu.w.qb", 9))
          break;
        return Intrinsic::mips_raddu_w_qb;	 // "ips.raddu.w.qb"
      case 's':	 // 10 strings to match.
        if (memcmp(NameR.data()+5, "ub", 2))
          break;
        switch (NameR[7]) {
        default: break;
        case 'q':	 // 1 string to match.
          if (memcmp(NameR.data()+8, "h.r.ph", 6))
            break;
          return Intrinsic::mips_subqh_r_ph;	 // "ips.subqh.r.ph"
        case 's':	 // 8 strings to match.
          if (NameR[8] != 'u')
            break;
          switch (NameR[9]) {
          default: break;
          case 's':	 // 4 strings to match.
            if (memcmp(NameR.data()+10, ".u.", 3))
              break;
            switch (NameR[13]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_subsus_u_b;	 // "ips.subsus.u.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_subsus_u_d;	 // "ips.subsus.u.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_subsus_u_h;	 // "ips.subsus.u.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_subsus_u_w;	 // "ips.subsus.u.w"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (memcmp(NameR.data()+10, ".s.", 3))
              break;
            switch (NameR[13]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_subsuu_s_b;	 // "ips.subsuu.s.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_subsuu_s_d;	 // "ips.subsuu.s.d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_subsuu_s_h;	 // "ips.subsuu.s.h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_subsuu_s_w;	 // "ips.subsuu.s.w"
            }
            break;
          }
          break;
        case 'u':	 // 1 string to match.
          if (memcmp(NameR.data()+8, "h.r.qb", 6))
            break;
          return Intrinsic::mips_subuh_r_qb;	 // "ips.subuh.r.qb"
        }
        break;
      }
      break;
    case 15:	 // 11 strings to match.
      if (memcmp(NameR.data()+0, "ips.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'c':	 // 3 strings to match.
        if (memcmp(NameR.data()+5, "mpgu.", 5))
          break;
        switch (NameR[10]) {
        default: break;
        case 'e':	 // 1 string to match.
          if (memcmp(NameR.data()+11, "q.qb", 4))
            break;
          return Intrinsic::mips_cmpgu_eq_qb;	 // "ips.cmpgu.eq.qb"
        case 'l':	 // 2 strings to match.
          switch (NameR[11]) {
          default: break;
          case 'e':	 // 1 string to match.
            if (memcmp(NameR.data()+12, ".qb", 3))
              break;
            return Intrinsic::mips_cmpgu_le_qb;	 // "ips.cmpgu.le.qb"
          case 't':	 // 1 string to match.
            if (memcmp(NameR.data()+12, ".qb", 3))
              break;
            return Intrinsic::mips_cmpgu_lt_qb;	 // "ips.cmpgu.lt.qb"
          }
          break;
        }
        break;
      case 'd':	 // 4 strings to match.
        if (NameR[5] != 'p')
          break;
        switch (NameR[6]) {
        default: break;
        case 'a':	 // 2 strings to match.
          if (memcmp(NameR.data()+7, "q.s", 3))
            break;
          switch (NameR[10]) {
          default: break;
          case '.':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "w.ph", 4))
              break;
            return Intrinsic::mips_dpaq_s_w_ph;	 // "ips.dpaq.s.w.ph"
          case 'a':	 // 1 string to match.
            if (memcmp(NameR.data()+11, ".l.w", 4))
              break;
            return Intrinsic::mips_dpaq_sa_l_w;	 // "ips.dpaq.sa.l.w"
          }
          break;
        case 's':	 // 2 strings to match.
          if (memcmp(NameR.data()+7, "q.s", 3))
            break;
          switch (NameR[10]) {
          default: break;
          case '.':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "w.ph", 4))
              break;
            return Intrinsic::mips_dpsq_s_w_ph;	 // "ips.dpsq.s.w.ph"
          case 'a':	 // 1 string to match.
            if (memcmp(NameR.data()+11, ".l.w", 4))
              break;
            return Intrinsic::mips_dpsq_sa_l_w;	 // "ips.dpsq.sa.l.w"
          }
          break;
        }
        break;
      case 'm':	 // 2 strings to match.
        if (memcmp(NameR.data()+5, "aq.s.w.ph", 9))
          break;
        switch (NameR[14]) {
        default: break;
        case 'l':	 // 1 string to match.
          return Intrinsic::mips_maq_s_w_phl;	 // "ips.maq.s.w.phl"
        case 'r':	 // 1 string to match.
          return Intrinsic::mips_maq_s_w_phr;	 // "ips.maq.s.w.phr"
        }
        break;
      case 'p':	 // 2 strings to match.
        if (memcmp(NameR.data()+5, "recr", 4))
          break;
        switch (NameR[9]) {
        default: break;
        case '.':	 // 1 string to match.
          if (memcmp(NameR.data()+10, "qb.ph", 5))
            break;
          return Intrinsic::mips_precr_qb_ph;	 // "ips.precr.qb.ph"
        case 'q':	 // 1 string to match.
          if (memcmp(NameR.data()+10, ".ph.w", 5))
            break;
          return Intrinsic::mips_precrq_ph_w;	 // "ips.precrq.ph.w"
        }
        break;
      }
      break;
    case 16:	 // 10 strings to match.
      if (memcmp(NameR.data()+0, "ips.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'c':	 // 3 strings to match.
        if (memcmp(NameR.data()+5, "mpgdu.", 6))
          break;
        switch (NameR[11]) {
        default: break;
        case 'e':	 // 1 string to match.
          if (memcmp(NameR.data()+12, "q.qb", 4))
            break;
          return Intrinsic::mips_cmpgdu_eq_qb;	 // "ips.cmpgdu.eq.qb"
        case 'l':	 // 2 strings to match.
          switch (NameR[12]) {
          default: break;
          case 'e':	 // 1 string to match.
            if (memcmp(NameR.data()+13, ".qb", 3))
              break;
            return Intrinsic::mips_cmpgdu_le_qb;	 // "ips.cmpgdu.le.qb"
          case 't':	 // 1 string to match.
            if (memcmp(NameR.data()+13, ".qb", 3))
              break;
            return Intrinsic::mips_cmpgdu_lt_qb;	 // "ips.cmpgdu.lt.qb"
          }
          break;
        }
        break;
      case 'd':	 // 2 strings to match.
        if (NameR[5] != 'p')
          break;
        switch (NameR[6]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(NameR.data()+7, "qx.s.w.ph", 9))
            break;
          return Intrinsic::mips_dpaqx_s_w_ph;	 // "ips.dpaqx.s.w.ph"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+7, "qx.s.w.ph", 9))
            break;
          return Intrinsic::mips_dpsqx_s_w_ph;	 // "ips.dpsqx.s.w.ph"
        }
        break;
      case 'm':	 // 2 strings to match.
        if (memcmp(NameR.data()+5, "aq.sa.w.ph", 10))
          break;
        switch (NameR[15]) {
        default: break;
        case 'l':	 // 1 string to match.
          return Intrinsic::mips_maq_sa_w_phl;	 // "ips.maq.sa.w.phl"
        case 'r':	 // 1 string to match.
          return Intrinsic::mips_maq_sa_w_phr;	 // "ips.maq.sa.w.phr"
        }
        break;
      case 'p':	 // 3 strings to match.
        if (memcmp(NameR.data()+5, "rec", 3))
          break;
        switch (NameR[8]) {
        default: break;
        case 'e':	 // 2 strings to match.
          if (memcmp(NameR.data()+9, "q.w.ph", 6))
            break;
          switch (NameR[15]) {
          default: break;
          case 'l':	 // 1 string to match.
            return Intrinsic::mips_preceq_w_phl;	 // "ips.preceq.w.phl"
          case 'r':	 // 1 string to match.
            return Intrinsic::mips_preceq_w_phr;	 // "ips.preceq.w.phr"
          }
          break;
        case 'r':	 // 1 string to match.
          if (memcmp(NameR.data()+9, "q.qb.ph", 7))
            break;
          return Intrinsic::mips_precrq_qb_ph;	 // "ips.precrq.qb.ph"
        }
        break;
      }
      break;
    case 17:	 // 7 strings to match.
      if (memcmp(NameR.data()+0, "ips.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'd':	 // 2 strings to match.
        if (NameR[5] != 'p')
          break;
        switch (NameR[6]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(NameR.data()+7, "qx.sa.w.ph", 10))
            break;
          return Intrinsic::mips_dpaqx_sa_w_ph;	 // "ips.dpaqx.sa.w.ph"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+7, "qx.sa.w.ph", 10))
            break;
          return Intrinsic::mips_dpsqx_sa_w_ph;	 // "ips.dpsqx.sa.w.ph"
        }
        break;
      case 'm':	 // 3 strings to match.
        if (memcmp(NameR.data()+5, "ul", 2))
          break;
        switch (NameR[7]) {
        default: break;
        case 'e':	 // 2 strings to match.
          if (memcmp(NameR.data()+8, "q.s.w.ph", 8))
            break;
          switch (NameR[16]) {
          default: break;
          case 'l':	 // 1 string to match.
            return Intrinsic::mips_muleq_s_w_phl;	 // "ips.muleq.s.w.phl"
          case 'r':	 // 1 string to match.
            return Intrinsic::mips_muleq_s_w_phr;	 // "ips.muleq.s.w.phr"
          }
          break;
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+8, "aq.s.w.ph", 9))
            break;
          return Intrinsic::mips_mulsaq_s_w_ph;	 // "ips.mulsaq.s.w.ph"
        }
        break;
      case 'p':	 // 2 strings to match.
        if (memcmp(NameR.data()+5, "receu.ph.qb", 11))
          break;
        switch (NameR[16]) {
        default: break;
        case 'l':	 // 1 string to match.
          return Intrinsic::mips_preceu_ph_qbl;	 // "ips.preceu.ph.qbl"
        case 'r':	 // 1 string to match.
          return Intrinsic::mips_preceu_ph_qbr;	 // "ips.preceu.ph.qbr"
        }
        break;
      }
      break;
    case 18:	 // 8 strings to match.
      if (memcmp(NameR.data()+0, "ips.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'm':	 // 2 strings to match.
        if (memcmp(NameR.data()+5, "uleu.s.ph.qb", 12))
          break;
        switch (NameR[17]) {
        default: break;
        case 'l':	 // 1 string to match.
          return Intrinsic::mips_muleu_s_ph_qbl;	 // "ips.muleu.s.ph.qbl"
        case 'r':	 // 1 string to match.
          return Intrinsic::mips_muleu_s_ph_qbr;	 // "ips.muleu.s.ph.qbr"
        }
        break;
      case 'p':	 // 6 strings to match.
        if (memcmp(NameR.data()+5, "rec", 3))
          break;
        switch (NameR[8]) {
        default: break;
        case 'e':	 // 4 strings to match.
          switch (NameR[9]) {
          default: break;
          case 'q':	 // 2 strings to match.
            if (memcmp(NameR.data()+10, "u.ph.qb", 7))
              break;
            switch (NameR[17]) {
            default: break;
            case 'l':	 // 1 string to match.
              return Intrinsic::mips_precequ_ph_qbl;	 // "ips.precequ.ph.qbl"
            case 'r':	 // 1 string to match.
              return Intrinsic::mips_precequ_ph_qbr;	 // "ips.precequ.ph.qbr"
            }
            break;
          case 'u':	 // 2 strings to match.
            if (memcmp(NameR.data()+10, ".ph.qb", 6))
              break;
            switch (NameR[16]) {
            default: break;
            case 'l':	 // 1 string to match.
              if (NameR[17] != 'a')
                break;
              return Intrinsic::mips_preceu_ph_qbla;	 // "ips.preceu.ph.qbla"
            case 'r':	 // 1 string to match.
              if (NameR[17] != 'a')
                break;
              return Intrinsic::mips_preceu_ph_qbra;	 // "ips.preceu.ph.qbra"
            }
            break;
          }
          break;
        case 'r':	 // 2 strings to match.
          switch (NameR[9]) {
          default: break;
          case '.':	 // 1 string to match.
            if (memcmp(NameR.data()+10, "sra.ph.w", 8))
              break;
            return Intrinsic::mips_precr_sra_ph_w;	 // "ips.precr.sra.ph.w"
          case 'q':	 // 1 string to match.
            if (memcmp(NameR.data()+10, ".rs.ph.w", 8))
              break;
            return Intrinsic::mips_precrq_rs_ph_w;	 // "ips.precrq.rs.ph.w"
          }
          break;
        }
        break;
      }
      break;
    case 19:	 // 3 strings to match.
      if (memcmp(NameR.data()+0, "ips.prec", 8))
        break;
      switch (NameR[8]) {
      default: break;
      case 'e':	 // 2 strings to match.
        if (memcmp(NameR.data()+9, "qu.ph.qb", 8))
          break;
        switch (NameR[17]) {
        default: break;
        case 'l':	 // 1 string to match.
          if (NameR[18] != 'a')
            break;
          return Intrinsic::mips_precequ_ph_qbla;	 // "ips.precequ.ph.qbla"
        case 'r':	 // 1 string to match.
          if (NameR[18] != 'a')
            break;
          return Intrinsic::mips_precequ_ph_qbra;	 // "ips.precequ.ph.qbra"
        }
        break;
      case 'r':	 // 1 string to match.
        if (memcmp(NameR.data()+9, "qu.s.qb.ph", 10))
          break;
        return Intrinsic::mips_precrqu_s_qb_ph;	 // "ips.precrqu.s.qb.ph"
      }
      break;
    case 20:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "ips.precr.sra.r.ph.w", 20))
        break;
      return Intrinsic::mips_precr_sra_r_ph_w;	 // "ips.precr.sra.r.ph.w"
    }
    break;  // end of 'm' case.
  case 'n':
    if (NameR.startswith("vvm.texsurf.handle.internal.")) return Intrinsic::nvvm_texsurf_handle_internal;
    if (NameR.startswith("vvm.texsurf.handle.")) return Intrinsic::nvvm_texsurf_handle;
    if (NameR.startswith("vvm.reflect.")) return Intrinsic::nvvm_reflect;
    if (NameR.startswith("vvm.ptr.shared.to.gen.")) return Intrinsic::nvvm_ptr_shared_to_gen;
    if (NameR.startswith("vvm.ptr.local.to.gen.")) return Intrinsic::nvvm_ptr_local_to_gen;
    if (NameR.startswith("vvm.ptr.global.to.gen.")) return Intrinsic::nvvm_ptr_global_to_gen;
    if (NameR.startswith("vvm.ptr.gen.to.shared.")) return Intrinsic::nvvm_ptr_gen_to_shared;
    if (NameR.startswith("vvm.ptr.gen.to.param.")) return Intrinsic::nvvm_ptr_gen_to_param;
    if (NameR.startswith("vvm.ptr.gen.to.local.")) return Intrinsic::nvvm_ptr_gen_to_local;
    if (NameR.startswith("vvm.ptr.gen.to.global.")) return Intrinsic::nvvm_ptr_gen_to_global;
    if (NameR.startswith("vvm.ptr.gen.to.constant.")) return Intrinsic::nvvm_ptr_gen_to_constant;
    if (NameR.startswith("vvm.ptr.constant.to.gen.")) return Intrinsic::nvvm_ptr_constant_to_gen;
    if (NameR.startswith("vvm.move.ptr.")) return Intrinsic::nvvm_move_ptr;
    if (NameR.startswith("vvm.ldu.global.p.")) return Intrinsic::nvvm_ldu_global_p;
    if (NameR.startswith("vvm.ldu.global.i.")) return Intrinsic::nvvm_ldu_global_i;
    if (NameR.startswith("vvm.ldu.global.f.")) return Intrinsic::nvvm_ldu_global_f;
    if (NameR.startswith("vvm.ldg.global.p.")) return Intrinsic::nvvm_ldg_global_p;
    if (NameR.startswith("vvm.ldg.global.i.")) return Intrinsic::nvvm_ldg_global_i;
    if (NameR.startswith("vvm.ldg.global.f.")) return Intrinsic::nvvm_ldg_global_f;
    if (NameR.startswith("vvm.compiler.warn.")) return Intrinsic::nvvm_compiler_warn;
    if (NameR.startswith("vvm.compiler.error.")) return Intrinsic::nvvm_compiler_error;
    if (NameR.startswith("vvm.atomic.load.inc.32.")) return Intrinsic::nvvm_atomic_load_inc_32;
    if (NameR.startswith("vvm.atomic.load.dec.32.")) return Intrinsic::nvvm_atomic_load_dec_32;
    if (NameR.startswith("vvm.atomic.load.add.f32.")) return Intrinsic::nvvm_atomic_load_add_f32;
    if (NameR.startswith("earbyint.")) return Intrinsic::nearbyint;
    switch (NameR.size()) {
    default: break;
    case 7:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "vvm.h2f", 7))
        break;
      return Intrinsic::nvvm_h2f;	 // "vvm.h2f"
    case 8:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "vvm.prmt", 8))
        break;
      return Intrinsic::nvvm_prmt;	 // "vvm.prmt"
    case 9:	 // 5 strings to match.
      if (memcmp(NameR.data()+0, "vvm.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'a':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "bs.i", 4))
          break;
        return Intrinsic::nvvm_abs_i;	 // "vvm.abs.i"
      case 'c':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "lz.i", 4))
          break;
        return Intrinsic::nvvm_clz_i;	 // "vvm.clz.i"
      case 'm':	 // 2 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "x.i", 3))
            break;
          return Intrinsic::nvvm_max_i;	 // "vvm.max.i"
        case 'i':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "n.i", 3))
            break;
          return Intrinsic::nvvm_min_i;	 // "vvm.min.i"
        }
        break;
      case 's':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "ad.i", 4))
          break;
        return Intrinsic::nvvm_sad_i;	 // "vvm.sad.i"
      }
      break;
    case 10:	 // 42 strings to match.
      if (memcmp(NameR.data()+0, "vvm.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'a':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "bs.ll", 5))
          break;
        return Intrinsic::nvvm_abs_ll;	 // "vvm.abs.ll"
      case 'b':	 // 2 strings to match.
        if (memcmp(NameR.data()+5, "rev", 3))
          break;
        switch (NameR[8]) {
        default: break;
        case '3':	 // 1 string to match.
          if (NameR[9] != '2')
            break;
          return Intrinsic::nvvm_brev32;	 // "vvm.brev32"
        case '6':	 // 1 string to match.
          if (NameR[9] != '4')
            break;
          return Intrinsic::nvvm_brev64;	 // "vvm.brev64"
        }
        break;
      case 'c':	 // 3 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'e':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "il.", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_ceil_d;	 // "vvm.ceil.d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_ceil_f;	 // "vvm.ceil.f"
          }
          break;
        case 'l':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "z.ll", 4))
            break;
          return Intrinsic::nvvm_clz_ll;	 // "vvm.clz.ll"
        }
        break;
      case 'd':	 // 10 strings to match.
        if (NameR[5] != '2')
          break;
        switch (NameR[6]) {
        default: break;
        case 'f':	 // 4 strings to match.
          if (memcmp(NameR.data()+7, ".r", 2))
            break;
          switch (NameR[9]) {
          default: break;
          case 'm':	 // 1 string to match.
            return Intrinsic::nvvm_d2f_rm;	 // "vvm.d2f.rm"
          case 'n':	 // 1 string to match.
            return Intrinsic::nvvm_d2f_rn;	 // "vvm.d2f.rn"
          case 'p':	 // 1 string to match.
            return Intrinsic::nvvm_d2f_rp;	 // "vvm.d2f.rp"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_d2f_rz;	 // "vvm.d2f.rz"
          }
          break;
        case 'i':	 // 6 strings to match.
          if (NameR[7] != '.')
            break;
          switch (NameR[8]) {
          default: break;
          case 'h':	 // 1 string to match.
            if (NameR[9] != 'i')
              break;
            return Intrinsic::nvvm_d2i_hi;	 // "vvm.d2i.hi"
          case 'l':	 // 1 string to match.
            if (NameR[9] != 'o')
              break;
            return Intrinsic::nvvm_d2i_lo;	 // "vvm.d2i.lo"
          case 'r':	 // 4 strings to match.
            switch (NameR[9]) {
            default: break;
            case 'm':	 // 1 string to match.
              return Intrinsic::nvvm_d2i_rm;	 // "vvm.d2i.rm"
            case 'n':	 // 1 string to match.
              return Intrinsic::nvvm_d2i_rn;	 // "vvm.d2i.rn"
            case 'p':	 // 1 string to match.
              return Intrinsic::nvvm_d2i_rp;	 // "vvm.d2i.rp"
            case 'z':	 // 1 string to match.
              return Intrinsic::nvvm_d2i_rz;	 // "vvm.d2i.rz"
            }
            break;
          }
          break;
        }
        break;
      case 'f':	 // 11 strings to match.
        switch (NameR[5]) {
        default: break;
        case '2':	 // 5 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'h':	 // 1 string to match.
            if (memcmp(NameR.data()+7, ".rn", 3))
              break;
            return Intrinsic::nvvm_f2h_rn;	 // "vvm.f2h.rn"
          case 'i':	 // 4 strings to match.
            if (memcmp(NameR.data()+7, ".r", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 'm':	 // 1 string to match.
              return Intrinsic::nvvm_f2i_rm;	 // "vvm.f2i.rm"
            case 'n':	 // 1 string to match.
              return Intrinsic::nvvm_f2i_rn;	 // "vvm.f2i.rn"
            case 'p':	 // 1 string to match.
              return Intrinsic::nvvm_f2i_rp;	 // "vvm.f2i.rp"
            case 'z':	 // 1 string to match.
              return Intrinsic::nvvm_f2i_rz;	 // "vvm.f2i.rz"
            }
            break;
          }
          break;
        case 'a':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "bs.", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_fabs_d;	 // "vvm.fabs.d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_fabs_f;	 // "vvm.fabs.f"
          }
          break;
        case 'm':	 // 4 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (memcmp(NameR.data()+7, "x.", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::nvvm_fmax_d;	 // "vvm.fmax.d"
            case 'f':	 // 1 string to match.
              return Intrinsic::nvvm_fmax_f;	 // "vvm.fmax.f"
            }
            break;
          case 'i':	 // 2 strings to match.
            if (memcmp(NameR.data()+7, "n.", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::nvvm_fmin_d;	 // "vvm.fmin.d"
            case 'f':	 // 1 string to match.
              return Intrinsic::nvvm_fmin_f;	 // "vvm.fmin.f"
            }
            break;
          }
          break;
        }
        break;
      case 'i':	 // 8 strings to match.
        if (NameR[5] != '2')
          break;
        switch (NameR[6]) {
        default: break;
        case 'd':	 // 4 strings to match.
          if (memcmp(NameR.data()+7, ".r", 2))
            break;
          switch (NameR[9]) {
          default: break;
          case 'm':	 // 1 string to match.
            return Intrinsic::nvvm_i2d_rm;	 // "vvm.i2d.rm"
          case 'n':	 // 1 string to match.
            return Intrinsic::nvvm_i2d_rn;	 // "vvm.i2d.rn"
          case 'p':	 // 1 string to match.
            return Intrinsic::nvvm_i2d_rp;	 // "vvm.i2d.rp"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_i2d_rz;	 // "vvm.i2d.rz"
          }
          break;
        case 'f':	 // 4 strings to match.
          if (memcmp(NameR.data()+7, ".r", 2))
            break;
          switch (NameR[9]) {
          default: break;
          case 'm':	 // 1 string to match.
            return Intrinsic::nvvm_i2f_rm;	 // "vvm.i2f.rm"
          case 'n':	 // 1 string to match.
            return Intrinsic::nvvm_i2f_rn;	 // "vvm.i2f.rn"
          case 'p':	 // 1 string to match.
            return Intrinsic::nvvm_i2f_rp;	 // "vvm.i2f.rp"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_i2f_rz;	 // "vvm.i2f.rz"
          }
          break;
        }
        break;
      case 'm':	 // 4 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'a':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "x.", 2))
            break;
          switch (NameR[8]) {
          default: break;
          case 'l':	 // 1 string to match.
            if (NameR[9] != 'l')
              break;
            return Intrinsic::nvvm_max_ll;	 // "vvm.max.ll"
          case 'u':	 // 1 string to match.
            if (NameR[9] != 'i')
              break;
            return Intrinsic::nvvm_max_ui;	 // "vvm.max.ui"
          }
          break;
        case 'i':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "n.", 2))
            break;
          switch (NameR[8]) {
          default: break;
          case 'l':	 // 1 string to match.
            if (NameR[9] != 'l')
              break;
            return Intrinsic::nvvm_min_ll;	 // "vvm.min.ll"
          case 'u':	 // 1 string to match.
            if (NameR[9] != 'i')
              break;
            return Intrinsic::nvvm_min_ui;	 // "vvm.min.ui"
          }
          break;
        }
        break;
      case 'p':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "opc.i", 5))
          break;
        return Intrinsic::nvvm_popc_i;	 // "vvm.popc.i"
      case 's':	 // 2 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "d.ui", 4))
            break;
          return Intrinsic::nvvm_sad_ui;	 // "vvm.sad.ui"
        case 'q':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "rt.f", 4))
            break;
          return Intrinsic::nvvm_sqrt_f;	 // "vvm.sqrt.f"
        }
        break;
      }
      break;
    case 11:	 // 43 strings to match.
      if (memcmp(NameR.data()+0, "vvm.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'd':	 // 8 strings to match.
        if (NameR[5] != '2')
          break;
        switch (NameR[6]) {
        default: break;
        case 'l':	 // 4 strings to match.
          if (memcmp(NameR.data()+7, "l.r", 3))
            break;
          switch (NameR[10]) {
          default: break;
          case 'm':	 // 1 string to match.
            return Intrinsic::nvvm_d2ll_rm;	 // "vvm.d2ll.rm"
          case 'n':	 // 1 string to match.
            return Intrinsic::nvvm_d2ll_rn;	 // "vvm.d2ll.rn"
          case 'p':	 // 1 string to match.
            return Intrinsic::nvvm_d2ll_rp;	 // "vvm.d2ll.rp"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_d2ll_rz;	 // "vvm.d2ll.rz"
          }
          break;
        case 'u':	 // 4 strings to match.
          if (memcmp(NameR.data()+7, "i.r", 3))
            break;
          switch (NameR[10]) {
          default: break;
          case 'm':	 // 1 string to match.
            return Intrinsic::nvvm_d2ui_rm;	 // "vvm.d2ui.rm"
          case 'n':	 // 1 string to match.
            return Intrinsic::nvvm_d2ui_rn;	 // "vvm.d2ui.rn"
          case 'p':	 // 1 string to match.
            return Intrinsic::nvvm_d2ui_rp;	 // "vvm.d2ui.rp"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_d2ui_rz;	 // "vvm.d2ui.rz"
          }
          break;
        }
        break;
      case 'f':	 // 10 strings to match.
        switch (NameR[5]) {
        default: break;
        case '2':	 // 8 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'l':	 // 4 strings to match.
            if (memcmp(NameR.data()+7, "l.r", 3))
              break;
            switch (NameR[10]) {
            default: break;
            case 'm':	 // 1 string to match.
              return Intrinsic::nvvm_f2ll_rm;	 // "vvm.f2ll.rm"
            case 'n':	 // 1 string to match.
              return Intrinsic::nvvm_f2ll_rn;	 // "vvm.f2ll.rn"
            case 'p':	 // 1 string to match.
              return Intrinsic::nvvm_f2ll_rp;	 // "vvm.f2ll.rp"
            case 'z':	 // 1 string to match.
              return Intrinsic::nvvm_f2ll_rz;	 // "vvm.f2ll.rz"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (memcmp(NameR.data()+7, "i.r", 3))
              break;
            switch (NameR[10]) {
            default: break;
            case 'm':	 // 1 string to match.
              return Intrinsic::nvvm_f2ui_rm;	 // "vvm.f2ui.rm"
            case 'n':	 // 1 string to match.
              return Intrinsic::nvvm_f2ui_rn;	 // "vvm.f2ui.rn"
            case 'p':	 // 1 string to match.
              return Intrinsic::nvvm_f2ui_rp;	 // "vvm.f2ui.rp"
            case 'z':	 // 1 string to match.
              return Intrinsic::nvvm_f2ui_rz;	 // "vvm.f2ui.rz"
            }
            break;
          }
          break;
        case 'l':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "oor.", 4))
            break;
          switch (NameR[10]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_floor_d;	 // "vvm.floor.d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_floor_f;	 // "vvm.floor.f"
          }
          break;
        }
        break;
      case 'l':	 // 8 strings to match.
        if (memcmp(NameR.data()+5, "l2", 2))
          break;
        switch (NameR[7]) {
        default: break;
        case 'd':	 // 4 strings to match.
          if (memcmp(NameR.data()+8, ".r", 2))
            break;
          switch (NameR[10]) {
          default: break;
          case 'm':	 // 1 string to match.
            return Intrinsic::nvvm_ll2d_rm;	 // "vvm.ll2d.rm"
          case 'n':	 // 1 string to match.
            return Intrinsic::nvvm_ll2d_rn;	 // "vvm.ll2d.rn"
          case 'p':	 // 1 string to match.
            return Intrinsic::nvvm_ll2d_rp;	 // "vvm.ll2d.rp"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_ll2d_rz;	 // "vvm.ll2d.rz"
          }
          break;
        case 'f':	 // 4 strings to match.
          if (memcmp(NameR.data()+8, ".r", 2))
            break;
          switch (NameR[10]) {
          default: break;
          case 'm':	 // 1 string to match.
            return Intrinsic::nvvm_ll2f_rm;	 // "vvm.ll2f.rm"
          case 'n':	 // 1 string to match.
            return Intrinsic::nvvm_ll2f_rn;	 // "vvm.ll2f.rn"
          case 'p':	 // 1 string to match.
            return Intrinsic::nvvm_ll2f_rp;	 // "vvm.ll2f.rp"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_ll2f_rz;	 // "vvm.ll2f.rz"
          }
          break;
        }
        break;
      case 'm':	 // 4 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "x.ull", 5))
            break;
          return Intrinsic::nvvm_max_ull;	 // "vvm.max.ull"
        case 'i':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "n.ull", 5))
            break;
          return Intrinsic::nvvm_min_ull;	 // "vvm.min.ull"
        case 'u':	 // 2 strings to match.
          if (NameR[6] != 'l')
            break;
          switch (NameR[7]) {
          default: break;
          case '2':	 // 1 string to match.
            if (memcmp(NameR.data()+8, "4.i", 3))
              break;
            return Intrinsic::nvvm_mul24_i;	 // "vvm.mul24.i"
          case 'h':	 // 1 string to match.
            if (memcmp(NameR.data()+8, "i.i", 3))
              break;
            return Intrinsic::nvvm_mulhi_i;	 // "vvm.mulhi.i"
          }
          break;
        }
        break;
      case 'p':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "opc.ll", 6))
          break;
        return Intrinsic::nvvm_popc_ll;	 // "vvm.popc.ll"
      case 'r':	 // 2 strings to match.
        if (memcmp(NameR.data()+5, "ound.", 5))
          break;
        switch (NameR[10]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::nvvm_round_d;	 // "vvm.round.d"
        case 'f':	 // 1 string to match.
          return Intrinsic::nvvm_round_f;	 // "vvm.round.f"
        }
        break;
      case 't':	 // 2 strings to match.
        if (memcmp(NameR.data()+5, "runc.", 5))
          break;
        switch (NameR[10]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::nvvm_trunc_d;	 // "vvm.trunc.d"
        case 'f':	 // 1 string to match.
          return Intrinsic::nvvm_trunc_f;	 // "vvm.trunc.f"
        }
        break;
      case 'u':	 // 8 strings to match.
        if (memcmp(NameR.data()+5, "i2", 2))
          break;
        switch (NameR[7]) {
        default: break;
        case 'd':	 // 4 strings to match.
          if (memcmp(NameR.data()+8, ".r", 2))
            break;
          switch (NameR[10]) {
          default: break;
          case 'm':	 // 1 string to match.
            return Intrinsic::nvvm_ui2d_rm;	 // "vvm.ui2d.rm"
          case 'n':	 // 1 string to match.
            return Intrinsic::nvvm_ui2d_rn;	 // "vvm.ui2d.rn"
          case 'p':	 // 1 string to match.
            return Intrinsic::nvvm_ui2d_rp;	 // "vvm.ui2d.rp"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_ui2d_rz;	 // "vvm.ui2d.rz"
          }
          break;
        case 'f':	 // 4 strings to match.
          if (memcmp(NameR.data()+8, ".r", 2))
            break;
          switch (NameR[10]) {
          default: break;
          case 'm':	 // 1 string to match.
            return Intrinsic::nvvm_ui2f_rm;	 // "vvm.ui2f.rm"
          case 'n':	 // 1 string to match.
            return Intrinsic::nvvm_ui2f_rn;	 // "vvm.ui2f.rn"
          case 'p':	 // 1 string to match.
            return Intrinsic::nvvm_ui2f_rp;	 // "vvm.ui2f.rp"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_ui2f_rz;	 // "vvm.ui2f.rz"
          }
          break;
        }
        break;
      }
      break;
    case 12:	 // 64 strings to match.
      if (memcmp(NameR.data()+0, "vvm.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'a':	 // 8 strings to match.
        if (memcmp(NameR.data()+5, "dd.r", 4))
          break;
        switch (NameR[9]) {
        default: break;
        case 'm':	 // 2 strings to match.
          if (NameR[10] != '.')
            break;
          switch (NameR[11]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_add_rm_d;	 // "vvm.add.rm.d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_add_rm_f;	 // "vvm.add.rm.f"
          }
          break;
        case 'n':	 // 2 strings to match.
          if (NameR[10] != '.')
            break;
          switch (NameR[11]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_add_rn_d;	 // "vvm.add.rn.d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_add_rn_f;	 // "vvm.add.rn.f"
          }
          break;
        case 'p':	 // 2 strings to match.
          if (NameR[10] != '.')
            break;
          switch (NameR[11]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_add_rp_d;	 // "vvm.add.rp.d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_add_rp_f;	 // "vvm.add.rp.f"
          }
          break;
        case 'z':	 // 2 strings to match.
          if (NameR[10] != '.')
            break;
          switch (NameR[11]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_add_rz_d;	 // "vvm.add.rz.d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_add_rz_f;	 // "vvm.add.rz.f"
          }
          break;
        }
        break;
      case 'b':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "arrier0", 7))
          break;
        return Intrinsic::nvvm_barrier0;	 // "vvm.barrier0"
      case 'd':	 // 12 strings to match.
        switch (NameR[5]) {
        default: break;
        case '2':	 // 4 strings to match.
          if (memcmp(NameR.data()+6, "ull.r", 5))
            break;
          switch (NameR[11]) {
          default: break;
          case 'm':	 // 1 string to match.
            return Intrinsic::nvvm_d2ull_rm;	 // "vvm.d2ull.rm"
          case 'n':	 // 1 string to match.
            return Intrinsic::nvvm_d2ull_rn;	 // "vvm.d2ull.rn"
          case 'p':	 // 1 string to match.
            return Intrinsic::nvvm_d2ull_rp;	 // "vvm.d2ull.rp"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_d2ull_rz;	 // "vvm.d2ull.rz"
          }
          break;
        case 'i':	 // 8 strings to match.
          if (memcmp(NameR.data()+6, "v.r", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case 'm':	 // 2 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::nvvm_div_rm_d;	 // "vvm.div.rm.d"
            case 'f':	 // 1 string to match.
              return Intrinsic::nvvm_div_rm_f;	 // "vvm.div.rm.f"
            }
            break;
          case 'n':	 // 2 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::nvvm_div_rn_d;	 // "vvm.div.rn.d"
            case 'f':	 // 1 string to match.
              return Intrinsic::nvvm_div_rn_f;	 // "vvm.div.rn.f"
            }
            break;
          case 'p':	 // 2 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::nvvm_div_rp_d;	 // "vvm.div.rp.d"
            case 'f':	 // 1 string to match.
              return Intrinsic::nvvm_div_rp_f;	 // "vvm.div.rp.f"
            }
            break;
          case 'z':	 // 2 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::nvvm_div_rz_d;	 // "vvm.div.rz.d"
            case 'f':	 // 1 string to match.
              return Intrinsic::nvvm_div_rz_f;	 // "vvm.div.rz.f"
            }
            break;
          }
          break;
        }
        break;
      case 'f':	 // 12 strings to match.
        switch (NameR[5]) {
        default: break;
        case '2':	 // 4 strings to match.
          if (memcmp(NameR.data()+6, "ull.r", 5))
            break;
          switch (NameR[11]) {
          default: break;
          case 'm':	 // 1 string to match.
            return Intrinsic::nvvm_f2ull_rm;	 // "vvm.f2ull.rm"
          case 'n':	 // 1 string to match.
            return Intrinsic::nvvm_f2ull_rn;	 // "vvm.f2ull.rn"
          case 'p':	 // 1 string to match.
            return Intrinsic::nvvm_f2ull_rp;	 // "vvm.f2ull.rp"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_f2ull_rz;	 // "vvm.f2ull.rz"
          }
          break;
        case 'm':	 // 8 strings to match.
          if (memcmp(NameR.data()+6, "a.r", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case 'm':	 // 2 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::nvvm_fma_rm_d;	 // "vvm.fma.rm.d"
            case 'f':	 // 1 string to match.
              return Intrinsic::nvvm_fma_rm_f;	 // "vvm.fma.rm.f"
            }
            break;
          case 'n':	 // 2 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::nvvm_fma_rn_d;	 // "vvm.fma.rn.d"
            case 'f':	 // 1 string to match.
              return Intrinsic::nvvm_fma_rn_f;	 // "vvm.fma.rn.f"
            }
            break;
          case 'p':	 // 2 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::nvvm_fma_rp_d;	 // "vvm.fma.rp.d"
            case 'f':	 // 1 string to match.
              return Intrinsic::nvvm_fma_rp_f;	 // "vvm.fma.rp.f"
            }
            break;
          case 'z':	 // 2 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::nvvm_fma_rz_d;	 // "vvm.fma.rz.d"
            case 'f':	 // 1 string to match.
              return Intrinsic::nvvm_fma_rz_f;	 // "vvm.fma.rz.f"
            }
            break;
          }
          break;
        }
        break;
      case 'l':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "ohi.i2d", 7))
          break;
        return Intrinsic::nvvm_lohi_i2d;	 // "vvm.lohi.i2d"
      case 'm':	 // 14 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'o':	 // 3 strings to match.
          if (memcmp(NameR.data()+6, "ve.i", 4))
            break;
          switch (NameR[10]) {
          default: break;
          case '1':	 // 1 string to match.
            if (NameR[11] != '6')
              break;
            return Intrinsic::nvvm_move_i16;	 // "vvm.move.i16"
          case '3':	 // 1 string to match.
            if (NameR[11] != '2')
              break;
            return Intrinsic::nvvm_move_i32;	 // "vvm.move.i32"
          case '6':	 // 1 string to match.
            if (NameR[11] != '4')
              break;
            return Intrinsic::nvvm_move_i64;	 // "vvm.move.i64"
          }
          break;
        case 'u':	 // 11 strings to match.
          if (NameR[6] != 'l')
            break;
          switch (NameR[7]) {
          default: break;
          case '.':	 // 8 strings to match.
            if (NameR[8] != 'r')
              break;
            switch (NameR[9]) {
            default: break;
            case 'm':	 // 2 strings to match.
              if (NameR[10] != '.')
                break;
              switch (NameR[11]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::nvvm_mul_rm_d;	 // "vvm.mul.rm.d"
              case 'f':	 // 1 string to match.
                return Intrinsic::nvvm_mul_rm_f;	 // "vvm.mul.rm.f"
              }
              break;
            case 'n':	 // 2 strings to match.
              if (NameR[10] != '.')
                break;
              switch (NameR[11]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::nvvm_mul_rn_d;	 // "vvm.mul.rn.d"
              case 'f':	 // 1 string to match.
                return Intrinsic::nvvm_mul_rn_f;	 // "vvm.mul.rn.f"
              }
              break;
            case 'p':	 // 2 strings to match.
              if (NameR[10] != '.')
                break;
              switch (NameR[11]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::nvvm_mul_rp_d;	 // "vvm.mul.rp.d"
              case 'f':	 // 1 string to match.
                return Intrinsic::nvvm_mul_rp_f;	 // "vvm.mul.rp.f"
              }
              break;
            case 'z':	 // 2 strings to match.
              if (NameR[10] != '.')
                break;
              switch (NameR[11]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::nvvm_mul_rz_d;	 // "vvm.mul.rz.d"
              case 'f':	 // 1 string to match.
                return Intrinsic::nvvm_mul_rz_f;	 // "vvm.mul.rz.f"
              }
              break;
            }
            break;
          case '2':	 // 1 string to match.
            if (memcmp(NameR.data()+8, "4.ui", 4))
              break;
            return Intrinsic::nvvm_mul24_ui;	 // "vvm.mul24.ui"
          case 'h':	 // 2 strings to match.
            if (memcmp(NameR.data()+8, "i.", 2))
              break;
            switch (NameR[10]) {
            default: break;
            case 'l':	 // 1 string to match.
              if (NameR[11] != 'l')
                break;
              return Intrinsic::nvvm_mulhi_ll;	 // "vvm.mulhi.ll"
            case 'u':	 // 1 string to match.
              if (NameR[11] != 'i')
                break;
              return Intrinsic::nvvm_mulhi_ui;	 // "vvm.mulhi.ui"
            }
            break;
          }
          break;
        }
        break;
      case 'r':	 // 8 strings to match.
        if (memcmp(NameR.data()+5, "cp.r", 4))
          break;
        switch (NameR[9]) {
        default: break;
        case 'm':	 // 2 strings to match.
          if (NameR[10] != '.')
            break;
          switch (NameR[11]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_rcp_rm_d;	 // "vvm.rcp.rm.d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_rcp_rm_f;	 // "vvm.rcp.rm.f"
          }
          break;
        case 'n':	 // 2 strings to match.
          if (NameR[10] != '.')
            break;
          switch (NameR[11]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_rcp_rn_d;	 // "vvm.rcp.rn.d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_rcp_rn_f;	 // "vvm.rcp.rn.f"
          }
          break;
        case 'p':	 // 2 strings to match.
          if (NameR[10] != '.')
            break;
          switch (NameR[11]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_rcp_rp_d;	 // "vvm.rcp.rp.d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_rcp_rp_f;	 // "vvm.rcp.rp.f"
          }
          break;
        case 'z':	 // 2 strings to match.
          if (NameR[10] != '.')
            break;
          switch (NameR[11]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_rcp_rz_d;	 // "vvm.rcp.rz.d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_rcp_rz_f;	 // "vvm.rcp.rz.f"
          }
          break;
        }
        break;
      case 'u':	 // 8 strings to match.
        if (memcmp(NameR.data()+5, "ll2", 3))
          break;
        switch (NameR[8]) {
        default: break;
        case 'd':	 // 4 strings to match.
          if (memcmp(NameR.data()+9, ".r", 2))
            break;
          switch (NameR[11]) {
          default: break;
          case 'm':	 // 1 string to match.
            return Intrinsic::nvvm_ull2d_rm;	 // "vvm.ull2d.rm"
          case 'n':	 // 1 string to match.
            return Intrinsic::nvvm_ull2d_rn;	 // "vvm.ull2d.rn"
          case 'p':	 // 1 string to match.
            return Intrinsic::nvvm_ull2d_rp;	 // "vvm.ull2d.rp"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_ull2d_rz;	 // "vvm.ull2d.rz"
          }
          break;
        case 'f':	 // 4 strings to match.
          if (memcmp(NameR.data()+9, ".r", 2))
            break;
          switch (NameR[11]) {
          default: break;
          case 'm':	 // 1 string to match.
            return Intrinsic::nvvm_ull2f_rm;	 // "vvm.ull2f.rm"
          case 'n':	 // 1 string to match.
            return Intrinsic::nvvm_ull2f_rn;	 // "vvm.ull2f.rn"
          case 'p':	 // 1 string to match.
            return Intrinsic::nvvm_ull2f_rp;	 // "vvm.ull2f.rp"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_ull2f_rz;	 // "vvm.ull2f.rz"
          }
          break;
        }
        break;
      }
      break;
    case 13:	 // 14 strings to match.
      if (memcmp(NameR.data()+0, "vvm.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'm':	 // 2 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'e':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "mbar.gl", 7))
            break;
          return Intrinsic::nvvm_membar_gl;	 // "vvm.membar.gl"
        case 'u':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "lhi.ull", 7))
            break;
          return Intrinsic::nvvm_mulhi_ull;	 // "vvm.mulhi.ull"
        }
        break;
      case 's':	 // 10 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'q':	 // 8 strings to match.
          if (memcmp(NameR.data()+6, "rt.r", 4))
            break;
          switch (NameR[10]) {
          default: break;
          case 'm':	 // 2 strings to match.
            if (NameR[11] != '.')
              break;
            switch (NameR[12]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::nvvm_sqrt_rm_d;	 // "vvm.sqrt.rm.d"
            case 'f':	 // 1 string to match.
              return Intrinsic::nvvm_sqrt_rm_f;	 // "vvm.sqrt.rm.f"
            }
            break;
          case 'n':	 // 2 strings to match.
            if (NameR[11] != '.')
              break;
            switch (NameR[12]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::nvvm_sqrt_rn_d;	 // "vvm.sqrt.rn.d"
            case 'f':	 // 1 string to match.
              return Intrinsic::nvvm_sqrt_rn_f;	 // "vvm.sqrt.rn.f"
            }
            break;
          case 'p':	 // 2 strings to match.
            if (NameR[11] != '.')
              break;
            switch (NameR[12]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::nvvm_sqrt_rp_d;	 // "vvm.sqrt.rp.d"
            case 'f':	 // 1 string to match.
              return Intrinsic::nvvm_sqrt_rp_f;	 // "vvm.sqrt.rp.f"
            }
            break;
          case 'z':	 // 2 strings to match.
            if (NameR[11] != '.')
              break;
            switch (NameR[12]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::nvvm_sqrt_rz_d;	 // "vvm.sqrt.rz.d"
            case 'f':	 // 1 string to match.
              return Intrinsic::nvvm_sqrt_rz_f;	 // "vvm.sqrt.rz.f"
            }
            break;
          }
          break;
        case 'u':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "q.", 2))
            break;
          switch (NameR[8]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(NameR.data()+9, "epth", 4))
              break;
            return Intrinsic::nvvm_suq_depth;	 // "vvm.suq.depth"
          case 'w':	 // 1 string to match.
            if (memcmp(NameR.data()+9, "idth", 4))
              break;
            return Intrinsic::nvvm_suq_width;	 // "vvm.suq.width"
          }
          break;
        }
        break;
      case 't':	 // 2 strings to match.
        if (memcmp(NameR.data()+5, "xq.", 3))
          break;
        switch (NameR[8]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(NameR.data()+9, "epth", 4))
            break;
          return Intrinsic::nvvm_txq_depth;	 // "vvm.txq.depth"
        case 'w':	 // 1 string to match.
          if (memcmp(NameR.data()+9, "idth", 4))
            break;
          return Intrinsic::nvvm_txq_width;	 // "vvm.txq.width"
        }
        break;
      }
      break;
    case 14:	 // 22 strings to match.
      if (memcmp(NameR.data()+0, "vvm.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'c':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "eil.ftz.f", 9))
          break;
        return Intrinsic::nvvm_ceil_ftz_f;	 // "vvm.ceil.ftz.f"
      case 'd':	 // 4 strings to match.
        if (memcmp(NameR.data()+5, "2f.r", 4))
          break;
        switch (NameR[9]) {
        default: break;
        case 'm':	 // 1 string to match.
          if (memcmp(NameR.data()+10, ".ftz", 4))
            break;
          return Intrinsic::nvvm_d2f_rm_ftz;	 // "vvm.d2f.rm.ftz"
        case 'n':	 // 1 string to match.
          if (memcmp(NameR.data()+10, ".ftz", 4))
            break;
          return Intrinsic::nvvm_d2f_rn_ftz;	 // "vvm.d2f.rn.ftz"
        case 'p':	 // 1 string to match.
          if (memcmp(NameR.data()+10, ".ftz", 4))
            break;
          return Intrinsic::nvvm_d2f_rp_ftz;	 // "vvm.d2f.rp.ftz"
        case 'z':	 // 1 string to match.
          if (memcmp(NameR.data()+10, ".ftz", 4))
            break;
          return Intrinsic::nvvm_d2f_rz_ftz;	 // "vvm.d2f.rz.ftz"
        }
        break;
      case 'f':	 // 8 strings to match.
        switch (NameR[5]) {
        default: break;
        case '2':	 // 5 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'h':	 // 1 string to match.
            if (memcmp(NameR.data()+7, ".rn.ftz", 7))
              break;
            return Intrinsic::nvvm_f2h_rn_ftz;	 // "vvm.f2h.rn.ftz"
          case 'i':	 // 4 strings to match.
            if (memcmp(NameR.data()+7, ".r", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 'm':	 // 1 string to match.
              if (memcmp(NameR.data()+10, ".ftz", 4))
                break;
              return Intrinsic::nvvm_f2i_rm_ftz;	 // "vvm.f2i.rm.ftz"
            case 'n':	 // 1 string to match.
              if (memcmp(NameR.data()+10, ".ftz", 4))
                break;
              return Intrinsic::nvvm_f2i_rn_ftz;	 // "vvm.f2i.rn.ftz"
            case 'p':	 // 1 string to match.
              if (memcmp(NameR.data()+10, ".ftz", 4))
                break;
              return Intrinsic::nvvm_f2i_rp_ftz;	 // "vvm.f2i.rp.ftz"
            case 'z':	 // 1 string to match.
              if (memcmp(NameR.data()+10, ".ftz", 4))
                break;
              return Intrinsic::nvvm_f2i_rz_ftz;	 // "vvm.f2i.rz.ftz"
            }
            break;
          }
          break;
        case 'a':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "bs.ftz.f", 8))
            break;
          return Intrinsic::nvvm_fabs_ftz_f;	 // "vvm.fabs.ftz.f"
        case 'm':	 // 2 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(NameR.data()+7, "x.ftz.f", 7))
              break;
            return Intrinsic::nvvm_fmax_ftz_f;	 // "vvm.fmax.ftz.f"
          case 'i':	 // 1 string to match.
            if (memcmp(NameR.data()+7, "n.ftz.f", 7))
              break;
            return Intrinsic::nvvm_fmin_ftz_f;	 // "vvm.fmin.ftz.f"
          }
          break;
        }
        break;
      case 'm':	 // 3 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'e':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "mbar.", 5))
            break;
          switch (NameR[11]) {
          default: break;
          case 'c':	 // 1 string to match.
            if (memcmp(NameR.data()+12, "ta", 2))
              break;
            return Intrinsic::nvvm_membar_cta;	 // "vvm.membar.cta"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+12, "ys", 2))
              break;
            return Intrinsic::nvvm_membar_sys;	 // "vvm.membar.sys"
          }
          break;
        case 'o':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "ve.float", 8))
            break;
          return Intrinsic::nvvm_move_float;	 // "vvm.move.float"
        }
        break;
      case 'r':	 // 2 strings to match.
        if (memcmp(NameR.data()+5, "otate.b", 7))
          break;
        switch (NameR[12]) {
        default: break;
        case '3':	 // 1 string to match.
          if (NameR[13] != '2')
            break;
          return Intrinsic::nvvm_rotate_b32;	 // "vvm.rotate.b32"
        case '6':	 // 1 string to match.
          if (NameR[13] != '4')
            break;
          return Intrinsic::nvvm_rotate_b64;	 // "vvm.rotate.b64"
        }
        break;
      case 's':	 // 3 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'a':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "turate.", 7))
            break;
          switch (NameR[13]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_saturate_d;	 // "vvm.saturate.d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_saturate_f;	 // "vvm.saturate.f"
          }
          break;
        case 'u':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "q.height", 8))
            break;
          return Intrinsic::nvvm_suq_height;	 // "vvm.suq.height"
        }
        break;
      case 't':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "xq.height", 9))
          break;
        return Intrinsic::nvvm_txq_height;	 // "vvm.txq.height"
      }
      break;
    case 15:	 // 15 strings to match.
      if (memcmp(NameR.data()+0, "vvm.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'b':	 // 3 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "rrier0.or", 9))
            break;
          return Intrinsic::nvvm_barrier0_or;	 // "vvm.barrier0.or"
        case 'i':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "tcast.", 6))
            break;
          switch (NameR[12]) {
          default: break;
          case 'f':	 // 1 string to match.
            if (memcmp(NameR.data()+13, "2i", 2))
              break;
            return Intrinsic::nvvm_bitcast_f2i;	 // "vvm.bitcast.f2i"
          case 'i':	 // 1 string to match.
            if (memcmp(NameR.data()+13, "2f", 2))
              break;
            return Intrinsic::nvvm_bitcast_i2f;	 // "vvm.bitcast.i2f"
          }
          break;
        }
        break;
      case 'f':	 // 9 strings to match.
        switch (NameR[5]) {
        default: break;
        case '2':	 // 8 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'l':	 // 4 strings to match.
            if (memcmp(NameR.data()+7, "l.r", 3))
              break;
            switch (NameR[10]) {
            default: break;
            case 'm':	 // 1 string to match.
              if (memcmp(NameR.data()+11, ".ftz", 4))
                break;
              return Intrinsic::nvvm_f2ll_rm_ftz;	 // "vvm.f2ll.rm.ftz"
            case 'n':	 // 1 string to match.
              if (memcmp(NameR.data()+11, ".ftz", 4))
                break;
              return Intrinsic::nvvm_f2ll_rn_ftz;	 // "vvm.f2ll.rn.ftz"
            case 'p':	 // 1 string to match.
              if (memcmp(NameR.data()+11, ".ftz", 4))
                break;
              return Intrinsic::nvvm_f2ll_rp_ftz;	 // "vvm.f2ll.rp.ftz"
            case 'z':	 // 1 string to match.
              if (memcmp(NameR.data()+11, ".ftz", 4))
                break;
              return Intrinsic::nvvm_f2ll_rz_ftz;	 // "vvm.f2ll.rz.ftz"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (memcmp(NameR.data()+7, "i.r", 3))
              break;
            switch (NameR[10]) {
            default: break;
            case 'm':	 // 1 string to match.
              if (memcmp(NameR.data()+11, ".ftz", 4))
                break;
              return Intrinsic::nvvm_f2ui_rm_ftz;	 // "vvm.f2ui.rm.ftz"
            case 'n':	 // 1 string to match.
              if (memcmp(NameR.data()+11, ".ftz", 4))
                break;
              return Intrinsic::nvvm_f2ui_rn_ftz;	 // "vvm.f2ui.rn.ftz"
            case 'p':	 // 1 string to match.
              if (memcmp(NameR.data()+11, ".ftz", 4))
                break;
              return Intrinsic::nvvm_f2ui_rp_ftz;	 // "vvm.f2ui.rp.ftz"
            case 'z':	 // 1 string to match.
              if (memcmp(NameR.data()+11, ".ftz", 4))
                break;
              return Intrinsic::nvvm_f2ui_rz_ftz;	 // "vvm.f2ui.rz.ftz"
            }
            break;
          }
          break;
        case 'l':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "oor.ftz.f", 9))
            break;
          return Intrinsic::nvvm_floor_ftz_f;	 // "vvm.floor.ftz.f"
        }
        break;
      case 'm':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "ove.double", 10))
          break;
        return Intrinsic::nvvm_move_double;	 // "vvm.move.double"
      case 'r':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "ound.ftz.f", 10))
          break;
        return Intrinsic::nvvm_round_ftz_f;	 // "vvm.round.ftz.f"
      case 't':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "runc.ftz.f", 10))
          break;
        return Intrinsic::nvvm_trunc_ftz_f;	 // "vvm.trunc.ftz.f"
      }
      break;
    case 16:	 // 34 strings to match.
      if (memcmp(NameR.data()+0, "vvm.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'a':	 // 4 strings to match.
        if (memcmp(NameR.data()+5, "dd.r", 4))
          break;
        switch (NameR[9]) {
        default: break;
        case 'm':	 // 1 string to match.
          if (memcmp(NameR.data()+10, ".ftz.f", 6))
            break;
          return Intrinsic::nvvm_add_rm_ftz_f;	 // "vvm.add.rm.ftz.f"
        case 'n':	 // 1 string to match.
          if (memcmp(NameR.data()+10, ".ftz.f", 6))
            break;
          return Intrinsic::nvvm_add_rn_ftz_f;	 // "vvm.add.rn.ftz.f"
        case 'p':	 // 1 string to match.
          if (memcmp(NameR.data()+10, ".ftz.f", 6))
            break;
          return Intrinsic::nvvm_add_rp_ftz_f;	 // "vvm.add.rp.ftz.f"
        case 'z':	 // 1 string to match.
          if (memcmp(NameR.data()+10, ".ftz.f", 6))
            break;
          return Intrinsic::nvvm_add_rz_ftz_f;	 // "vvm.add.rz.ftz.f"
        }
        break;
      case 'b':	 // 3 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "rrier0.and", 10))
            break;
          return Intrinsic::nvvm_barrier0_and;	 // "vvm.barrier0.and"
        case 'i':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "tcast.", 6))
            break;
          switch (NameR[12]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(NameR.data()+13, "2ll", 3))
              break;
            return Intrinsic::nvvm_bitcast_d2ll;	 // "vvm.bitcast.d2ll"
          case 'l':	 // 1 string to match.
            if (memcmp(NameR.data()+13, "l2d", 3))
              break;
            return Intrinsic::nvvm_bitcast_ll2d;	 // "vvm.bitcast.ll2d"
          }
          break;
        }
        break;
      case 'c':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "os.approx.f", 11))
          break;
        return Intrinsic::nvvm_cos_approx_f;	 // "vvm.cos.approx.f"
      case 'd':	 // 5 strings to match.
        if (memcmp(NameR.data()+5, "iv.", 3))
          break;
        switch (NameR[8]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(NameR.data()+9, "pprox.f", 7))
            break;
          return Intrinsic::nvvm_div_approx_f;	 // "vvm.div.approx.f"
        case 'r':	 // 4 strings to match.
          switch (NameR[9]) {
          default: break;
          case 'm':	 // 1 string to match.
            if (memcmp(NameR.data()+10, ".ftz.f", 6))
              break;
            return Intrinsic::nvvm_div_rm_ftz_f;	 // "vvm.div.rm.ftz.f"
          case 'n':	 // 1 string to match.
            if (memcmp(NameR.data()+10, ".ftz.f", 6))
              break;
            return Intrinsic::nvvm_div_rn_ftz_f;	 // "vvm.div.rn.ftz.f"
          case 'p':	 // 1 string to match.
            if (memcmp(NameR.data()+10, ".ftz.f", 6))
              break;
            return Intrinsic::nvvm_div_rp_ftz_f;	 // "vvm.div.rp.ftz.f"
          case 'z':	 // 1 string to match.
            if (memcmp(NameR.data()+10, ".ftz.f", 6))
              break;
            return Intrinsic::nvvm_div_rz_ftz_f;	 // "vvm.div.rz.ftz.f"
          }
          break;
        }
        break;
      case 'e':	 // 2 strings to match.
        if (memcmp(NameR.data()+5, "x2.approx.", 10))
          break;
        switch (NameR[15]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::nvvm_ex2_approx_d;	 // "vvm.ex2.approx.d"
        case 'f':	 // 1 string to match.
          return Intrinsic::nvvm_ex2_approx_f;	 // "vvm.ex2.approx.f"
        }
        break;
      case 'f':	 // 8 strings to match.
        switch (NameR[5]) {
        default: break;
        case '2':	 // 4 strings to match.
          if (memcmp(NameR.data()+6, "ull.r", 5))
            break;
          switch (NameR[11]) {
          default: break;
          case 'm':	 // 1 string to match.
            if (memcmp(NameR.data()+12, ".ftz", 4))
              break;
            return Intrinsic::nvvm_f2ull_rm_ftz;	 // "vvm.f2ull.rm.ftz"
          case 'n':	 // 1 string to match.
            if (memcmp(NameR.data()+12, ".ftz", 4))
              break;
            return Intrinsic::nvvm_f2ull_rn_ftz;	 // "vvm.f2ull.rn.ftz"
          case 'p':	 // 1 string to match.
            if (memcmp(NameR.data()+12, ".ftz", 4))
              break;
            return Intrinsic::nvvm_f2ull_rp_ftz;	 // "vvm.f2ull.rp.ftz"
          case 'z':	 // 1 string to match.
            if (memcmp(NameR.data()+12, ".ftz", 4))
              break;
            return Intrinsic::nvvm_f2ull_rz_ftz;	 // "vvm.f2ull.rz.ftz"
          }
          break;
        case 'm':	 // 4 strings to match.
          if (memcmp(NameR.data()+6, "a.r", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case 'm':	 // 1 string to match.
            if (memcmp(NameR.data()+10, ".ftz.f", 6))
              break;
            return Intrinsic::nvvm_fma_rm_ftz_f;	 // "vvm.fma.rm.ftz.f"
          case 'n':	 // 1 string to match.
            if (memcmp(NameR.data()+10, ".ftz.f", 6))
              break;
            return Intrinsic::nvvm_fma_rn_ftz_f;	 // "vvm.fma.rn.ftz.f"
          case 'p':	 // 1 string to match.
            if (memcmp(NameR.data()+10, ".ftz.f", 6))
              break;
            return Intrinsic::nvvm_fma_rp_ftz_f;	 // "vvm.fma.rp.ftz.f"
          case 'z':	 // 1 string to match.
            if (memcmp(NameR.data()+10, ".ftz.f", 6))
              break;
            return Intrinsic::nvvm_fma_rz_ftz_f;	 // "vvm.fma.rz.ftz.f"
          }
          break;
        }
        break;
      case 'l':	 // 2 strings to match.
        if (memcmp(NameR.data()+5, "g2.approx.", 10))
          break;
        switch (NameR[15]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::nvvm_lg2_approx_d;	 // "vvm.lg2.approx.d"
        case 'f':	 // 1 string to match.
          return Intrinsic::nvvm_lg2_approx_f;	 // "vvm.lg2.approx.f"
        }
        break;
      case 'm':	 // 4 strings to match.
        if (memcmp(NameR.data()+5, "ul.r", 4))
          break;
        switch (NameR[9]) {
        default: break;
        case 'm':	 // 1 string to match.
          if (memcmp(NameR.data()+10, ".ftz.f", 6))
            break;
          return Intrinsic::nvvm_mul_rm_ftz_f;	 // "vvm.mul.rm.ftz.f"
        case 'n':	 // 1 string to match.
          if (memcmp(NameR.data()+10, ".ftz.f", 6))
            break;
          return Intrinsic::nvvm_mul_rn_ftz_f;	 // "vvm.mul.rn.ftz.f"
        case 'p':	 // 1 string to match.
          if (memcmp(NameR.data()+10, ".ftz.f", 6))
            break;
          return Intrinsic::nvvm_mul_rp_ftz_f;	 // "vvm.mul.rp.ftz.f"
        case 'z':	 // 1 string to match.
          if (memcmp(NameR.data()+10, ".ftz.f", 6))
            break;
          return Intrinsic::nvvm_mul_rz_ftz_f;	 // "vvm.mul.rz.ftz.f"
        }
        break;
      case 'r':	 // 4 strings to match.
        if (memcmp(NameR.data()+5, "cp.r", 4))
          break;
        switch (NameR[9]) {
        default: break;
        case 'm':	 // 1 string to match.
          if (memcmp(NameR.data()+10, ".ftz.f", 6))
            break;
          return Intrinsic::nvvm_rcp_rm_ftz_f;	 // "vvm.rcp.rm.ftz.f"
        case 'n':	 // 1 string to match.
          if (memcmp(NameR.data()+10, ".ftz.f", 6))
            break;
          return Intrinsic::nvvm_rcp_rn_ftz_f;	 // "vvm.rcp.rn.ftz.f"
        case 'p':	 // 1 string to match.
          if (memcmp(NameR.data()+10, ".ftz.f", 6))
            break;
          return Intrinsic::nvvm_rcp_rp_ftz_f;	 // "vvm.rcp.rp.ftz.f"
        case 'z':	 // 1 string to match.
          if (memcmp(NameR.data()+10, ".ftz.f", 6))
            break;
          return Intrinsic::nvvm_rcp_rz_ftz_f;	 // "vvm.rcp.rz.ftz.f"
        }
        break;
      case 's':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "in.approx.f", 11))
          break;
        return Intrinsic::nvvm_sin_approx_f;	 // "vvm.sin.approx.f"
      }
      break;
    case 17:	 // 6 strings to match.
      if (memcmp(NameR.data()+0, "vvm.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'b':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "arrier0.popc", 12))
          break;
        return Intrinsic::nvvm_barrier0_popc;	 // "vvm.barrier0.popc"
      case 's':	 // 5 strings to match.
        if (memcmp(NameR.data()+5, "qrt.", 4))
          break;
        switch (NameR[9]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(NameR.data()+10, "pprox.f", 7))
            break;
          return Intrinsic::nvvm_sqrt_approx_f;	 // "vvm.sqrt.approx.f"
        case 'r':	 // 4 strings to match.
          switch (NameR[10]) {
          default: break;
          case 'm':	 // 1 string to match.
            if (memcmp(NameR.data()+11, ".ftz.f", 6))
              break;
            return Intrinsic::nvvm_sqrt_rm_ftz_f;	 // "vvm.sqrt.rm.ftz.f"
          case 'n':	 // 1 string to match.
            if (memcmp(NameR.data()+11, ".ftz.f", 6))
              break;
            return Intrinsic::nvvm_sqrt_rn_ftz_f;	 // "vvm.sqrt.rn.ftz.f"
          case 'p':	 // 1 string to match.
            if (memcmp(NameR.data()+11, ".ftz.f", 6))
              break;
            return Intrinsic::nvvm_sqrt_rp_ftz_f;	 // "vvm.sqrt.rp.ftz.f"
          case 'z':	 // 1 string to match.
            if (memcmp(NameR.data()+11, ".ftz.f", 6))
              break;
            return Intrinsic::nvvm_sqrt_rz_ftz_f;	 // "vvm.sqrt.rz.ftz.f"
          }
          break;
        }
        break;
      }
      break;
    case 18:	 // 8 strings to match.
      if (memcmp(NameR.data()+0, "vvm.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'i':	 // 2 strings to match.
        if (memcmp(NameR.data()+5, "sspacep.", 8))
          break;
        switch (NameR[13]) {
        default: break;
        case 'c':	 // 1 string to match.
          if (memcmp(NameR.data()+14, "onst", 4))
            break;
          return Intrinsic::nvvm_isspacep_const;	 // "vvm.isspacep.const"
        case 'l':	 // 1 string to match.
          if (memcmp(NameR.data()+14, "ocal", 4))
            break;
          return Intrinsic::nvvm_isspacep_local;	 // "vvm.isspacep.local"
        }
        break;
      case 'r':	 // 2 strings to match.
        if (memcmp(NameR.data()+5, "sqrt.approx.", 12))
          break;
        switch (NameR[17]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::nvvm_rsqrt_approx_d;	 // "vvm.rsqrt.approx.d"
        case 'f':	 // 1 string to match.
          return Intrinsic::nvvm_rsqrt_approx_f;	 // "vvm.rsqrt.approx.f"
        }
        break;
      case 's':	 // 3 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "turate.ftz.f", 12))
            break;
          return Intrinsic::nvvm_saturate_ftz_f;	 // "vvm.saturate.ftz.f"
        case 'u':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "q.array.size", 12))
            break;
          return Intrinsic::nvvm_suq_array_size;	 // "vvm.suq.array.size"
        case 'w':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "ap.lo.hi.b64", 12))
            break;
          return Intrinsic::nvvm_swap_lo_hi_b64;	 // "vvm.swap.lo.hi.b64"
        }
        break;
      case 't':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "xq.array.size", 13))
          break;
        return Intrinsic::nvvm_txq_array_size;	 // "vvm.txq.array.size"
      }
      break;
    case 19:	 // 12 strings to match.
      if (memcmp(NameR.data()+0, "vvm.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'i':	 // 5 strings to match.
        if (NameR[5] != 's')
          break;
        switch (NameR[6]) {
        default: break;
        case 's':	 // 2 strings to match.
          if (memcmp(NameR.data()+7, "pacep.", 6))
            break;
          switch (NameR[13]) {
          default: break;
          case 'g':	 // 1 string to match.
            if (memcmp(NameR.data()+14, "lobal", 5))
              break;
            return Intrinsic::nvvm_isspacep_global;	 // "vvm.isspacep.global"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+14, "hared", 5))
              break;
            return Intrinsic::nvvm_isspacep_shared;	 // "vvm.isspacep.shared"
          }
          break;
        case 't':	 // 3 strings to match.
          if (memcmp(NameR.data()+7, "ypep.", 5))
            break;
          switch (NameR[12]) {
          default: break;
          case 's':	 // 2 strings to match.
            switch (NameR[13]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(NameR.data()+14, "mpler", 5))
                break;
              return Intrinsic::nvvm_istypep_sampler;	 // "vvm.istypep.sampler"
            case 'u':	 // 1 string to match.
              if (memcmp(NameR.data()+14, "rface", 5))
                break;
              return Intrinsic::nvvm_istypep_surface;	 // "vvm.istypep.surface"
            }
            break;
          case 't':	 // 1 string to match.
            if (memcmp(NameR.data()+13, "exture", 6))
              break;
            return Intrinsic::nvvm_istypep_texture;	 // "vvm.istypep.texture"
          }
          break;
        }
        break;
      case 's':	 // 6 strings to match.
        if (memcmp(NameR.data()+5, "uld.", 4))
          break;
        switch (NameR[9]) {
        default: break;
        case '1':	 // 2 strings to match.
          if (memcmp(NameR.data()+10, "d.i8.", 5))
            break;
          switch (NameR[15]) {
          default: break;
          case 't':	 // 1 string to match.
            if (memcmp(NameR.data()+16, "rap", 3))
              break;
            return Intrinsic::nvvm_suld_1d_i8_trap;	 // "vvm.suld.1d.i8.trap"
          case 'z':	 // 1 string to match.
            if (memcmp(NameR.data()+16, "ero", 3))
              break;
            return Intrinsic::nvvm_suld_1d_i8_zero;	 // "vvm.suld.1d.i8.zero"
          }
          break;
        case '2':	 // 2 strings to match.
          if (memcmp(NameR.data()+10, "d.i8.", 5))
            break;
          switch (NameR[15]) {
          default: break;
          case 't':	 // 1 string to match.
            if (memcmp(NameR.data()+16, "rap", 3))
              break;
            return Intrinsic::nvvm_suld_2d_i8_trap;	 // "vvm.suld.2d.i8.trap"
          case 'z':	 // 1 string to match.
            if (memcmp(NameR.data()+16, "ero", 3))
              break;
            return Intrinsic::nvvm_suld_2d_i8_zero;	 // "vvm.suld.2d.i8.zero"
          }
          break;
        case '3':	 // 2 strings to match.
          if (memcmp(NameR.data()+10, "d.i8.", 5))
            break;
          switch (NameR[15]) {
          default: break;
          case 't':	 // 1 string to match.
            if (memcmp(NameR.data()+16, "rap", 3))
              break;
            return Intrinsic::nvvm_suld_3d_i8_trap;	 // "vvm.suld.3d.i8.trap"
          case 'z':	 // 1 string to match.
            if (memcmp(NameR.data()+16, "ero", 3))
              break;
            return Intrinsic::nvvm_suld_3d_i8_zero;	 // "vvm.suld.3d.i8.zero"
          }
          break;
        }
        break;
      case 't':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "xq.num.samples", 14))
          break;
        return Intrinsic::nvvm_txq_num_samples;	 // "vvm.txq.num.samples"
      }
      break;
    case 20:	 // 46 strings to match.
      if (memcmp(NameR.data()+0, "vvm.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'c':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "os.approx.ftz.f", 15))
          break;
        return Intrinsic::nvvm_cos_approx_ftz_f;	 // "vvm.cos.approx.ftz.f"
      case 'd':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "iv.approx.ftz.f", 15))
          break;
        return Intrinsic::nvvm_div_approx_ftz_f;	 // "vvm.div.approx.ftz.f"
      case 'e':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "x2.approx.ftz.f", 15))
          break;
        return Intrinsic::nvvm_ex2_approx_ftz_f;	 // "vvm.ex2.approx.ftz.f"
      case 'l':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "g2.approx.ftz.f", 15))
          break;
        return Intrinsic::nvvm_lg2_approx_ftz_f;	 // "vvm.lg2.approx.ftz.f"
      case 'r':	 // 2 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'c':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "p.approx.ftz.d", 14))
            break;
          return Intrinsic::nvvm_rcp_approx_ftz_d;	 // "vvm.rcp.approx.ftz.d"
        case 'o':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "tate.right.b64", 14))
            break;
          return Intrinsic::nvvm_rotate_right_b64;	 // "vvm.rotate.right.b64"
        }
        break;
      case 's':	 // 22 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'i':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "n.approx.ftz.f", 14))
            break;
          return Intrinsic::nvvm_sin_approx_ftz_f;	 // "vvm.sin.approx.ftz.f"
        case 'u':	 // 21 strings to match.
          if (memcmp(NameR.data()+6, "ld.", 3))
            break;
          switch (NameR[9]) {
          default: break;
          case '1':	 // 7 strings to match.
            if (memcmp(NameR.data()+10, "d.i", 3))
              break;
            switch (NameR[13]) {
            default: break;
            case '1':	 // 2 strings to match.
              if (memcmp(NameR.data()+14, "6.", 2))
                break;
              switch (NameR[16]) {
              default: break;
              case 't':	 // 1 string to match.
                if (memcmp(NameR.data()+17, "rap", 3))
                  break;
                return Intrinsic::nvvm_suld_1d_i16_trap;	 // "vvm.suld.1d.i16.trap"
              case 'z':	 // 1 string to match.
                if (memcmp(NameR.data()+17, "ero", 3))
                  break;
                return Intrinsic::nvvm_suld_1d_i16_zero;	 // "vvm.suld.1d.i16.zero"
              }
              break;
            case '3':	 // 2 strings to match.
              if (memcmp(NameR.data()+14, "2.", 2))
                break;
              switch (NameR[16]) {
              default: break;
              case 't':	 // 1 string to match.
                if (memcmp(NameR.data()+17, "rap", 3))
                  break;
                return Intrinsic::nvvm_suld_1d_i32_trap;	 // "vvm.suld.1d.i32.trap"
              case 'z':	 // 1 string to match.
                if (memcmp(NameR.data()+17, "ero", 3))
                  break;
                return Intrinsic::nvvm_suld_1d_i32_zero;	 // "vvm.suld.1d.i32.zero"
              }
              break;
            case '6':	 // 2 strings to match.
              if (memcmp(NameR.data()+14, "4.", 2))
                break;
              switch (NameR[16]) {
              default: break;
              case 't':	 // 1 string to match.
                if (memcmp(NameR.data()+17, "rap", 3))
                  break;
                return Intrinsic::nvvm_suld_1d_i64_trap;	 // "vvm.suld.1d.i64.trap"
              case 'z':	 // 1 string to match.
                if (memcmp(NameR.data()+17, "ero", 3))
                  break;
                return Intrinsic::nvvm_suld_1d_i64_zero;	 // "vvm.suld.1d.i64.zero"
              }
              break;
            case '8':	 // 1 string to match.
              if (memcmp(NameR.data()+14, ".clamp", 6))
                break;
              return Intrinsic::nvvm_suld_1d_i8_clamp;	 // "vvm.suld.1d.i8.clamp"
            }
            break;
          case '2':	 // 7 strings to match.
            if (memcmp(NameR.data()+10, "d.i", 3))
              break;
            switch (NameR[13]) {
            default: break;
            case '1':	 // 2 strings to match.
              if (memcmp(NameR.data()+14, "6.", 2))
                break;
              switch (NameR[16]) {
              default: break;
              case 't':	 // 1 string to match.
                if (memcmp(NameR.data()+17, "rap", 3))
                  break;
                return Intrinsic::nvvm_suld_2d_i16_trap;	 // "vvm.suld.2d.i16.trap"
              case 'z':	 // 1 string to match.
                if (memcmp(NameR.data()+17, "ero", 3))
                  break;
                return Intrinsic::nvvm_suld_2d_i16_zero;	 // "vvm.suld.2d.i16.zero"
              }
              break;
            case '3':	 // 2 strings to match.
              if (memcmp(NameR.data()+14, "2.", 2))
                break;
              switch (NameR[16]) {
              default: break;
              case 't':	 // 1 string to match.
                if (memcmp(NameR.data()+17, "rap", 3))
                  break;
                return Intrinsic::nvvm_suld_2d_i32_trap;	 // "vvm.suld.2d.i32.trap"
              case 'z':	 // 1 string to match.
                if (memcmp(NameR.data()+17, "ero", 3))
                  break;
                return Intrinsic::nvvm_suld_2d_i32_zero;	 // "vvm.suld.2d.i32.zero"
              }
              break;
            case '6':	 // 2 strings to match.
              if (memcmp(NameR.data()+14, "4.", 2))
                break;
              switch (NameR[16]) {
              default: break;
              case 't':	 // 1 string to match.
                if (memcmp(NameR.data()+17, "rap", 3))
                  break;
                return Intrinsic::nvvm_suld_2d_i64_trap;	 // "vvm.suld.2d.i64.trap"
              case 'z':	 // 1 string to match.
                if (memcmp(NameR.data()+17, "ero", 3))
                  break;
                return Intrinsic::nvvm_suld_2d_i64_zero;	 // "vvm.suld.2d.i64.zero"
              }
              break;
            case '8':	 // 1 string to match.
              if (memcmp(NameR.data()+14, ".clamp", 6))
                break;
              return Intrinsic::nvvm_suld_2d_i8_clamp;	 // "vvm.suld.2d.i8.clamp"
            }
            break;
          case '3':	 // 7 strings to match.
            if (memcmp(NameR.data()+10, "d.i", 3))
              break;
            switch (NameR[13]) {
            default: break;
            case '1':	 // 2 strings to match.
              if (memcmp(NameR.data()+14, "6.", 2))
                break;
              switch (NameR[16]) {
              default: break;
              case 't':	 // 1 string to match.
                if (memcmp(NameR.data()+17, "rap", 3))
                  break;
                return Intrinsic::nvvm_suld_3d_i16_trap;	 // "vvm.suld.3d.i16.trap"
              case 'z':	 // 1 string to match.
                if (memcmp(NameR.data()+17, "ero", 3))
                  break;
                return Intrinsic::nvvm_suld_3d_i16_zero;	 // "vvm.suld.3d.i16.zero"
              }
              break;
            case '3':	 // 2 strings to match.
              if (memcmp(NameR.data()+14, "2.", 2))
                break;
              switch (NameR[16]) {
              default: break;
              case 't':	 // 1 string to match.
                if (memcmp(NameR.data()+17, "rap", 3))
                  break;
                return Intrinsic::nvvm_suld_3d_i32_trap;	 // "vvm.suld.3d.i32.trap"
              case 'z':	 // 1 string to match.
                if (memcmp(NameR.data()+17, "ero", 3))
                  break;
                return Intrinsic::nvvm_suld_3d_i32_zero;	 // "vvm.suld.3d.i32.zero"
              }
              break;
            case '6':	 // 2 strings to match.
              if (memcmp(NameR.data()+14, "4.", 2))
                break;
              switch (NameR[16]) {
              default: break;
              case 't':	 // 1 string to match.
                if (memcmp(NameR.data()+17, "rap", 3))
                  break;
                return Intrinsic::nvvm_suld_3d_i64_trap;	 // "vvm.suld.3d.i64.trap"
              case 'z':	 // 1 string to match.
                if (memcmp(NameR.data()+17, "ero", 3))
                  break;
                return Intrinsic::nvvm_suld_3d_i64_zero;	 // "vvm.suld.3d.i64.zero"
              }
              break;
            case '8':	 // 1 string to match.
              if (memcmp(NameR.data()+14, ".clamp", 6))
                break;
              return Intrinsic::nvvm_suld_3d_i8_clamp;	 // "vvm.suld.3d.i8.clamp"
            }
            break;
          }
          break;
        }
        break;
      case 't':	 // 18 strings to match.
        if (memcmp(NameR.data()+5, "ex.", 3))
          break;
        switch (NameR[8]) {
        default: break;
        case '1':	 // 6 strings to match.
          if (memcmp(NameR.data()+9, "d.v4", 4))
            break;
          switch (NameR[13]) {
          default: break;
          case 'f':	 // 2 strings to match.
            if (memcmp(NameR.data()+14, "32.", 3))
              break;
            switch (NameR[17]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "32", 2))
                break;
              return Intrinsic::nvvm_tex_1d_v4f32_f32;	 // "vvm.tex.1d.v4f32.f32"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "32", 2))
                break;
              return Intrinsic::nvvm_tex_1d_v4f32_s32;	 // "vvm.tex.1d.v4f32.s32"
            }
            break;
          case 's':	 // 2 strings to match.
            if (memcmp(NameR.data()+14, "32.", 3))
              break;
            switch (NameR[17]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "32", 2))
                break;
              return Intrinsic::nvvm_tex_1d_v4s32_f32;	 // "vvm.tex.1d.v4s32.f32"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "32", 2))
                break;
              return Intrinsic::nvvm_tex_1d_v4s32_s32;	 // "vvm.tex.1d.v4s32.s32"
            }
            break;
          case 'u':	 // 2 strings to match.
            if (memcmp(NameR.data()+14, "32.", 3))
              break;
            switch (NameR[17]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "32", 2))
                break;
              return Intrinsic::nvvm_tex_1d_v4u32_f32;	 // "vvm.tex.1d.v4u32.f32"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "32", 2))
                break;
              return Intrinsic::nvvm_tex_1d_v4u32_s32;	 // "vvm.tex.1d.v4u32.s32"
            }
            break;
          }
          break;
        case '2':	 // 6 strings to match.
          if (memcmp(NameR.data()+9, "d.v4", 4))
            break;
          switch (NameR[13]) {
          default: break;
          case 'f':	 // 2 strings to match.
            if (memcmp(NameR.data()+14, "32.", 3))
              break;
            switch (NameR[17]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "32", 2))
                break;
              return Intrinsic::nvvm_tex_2d_v4f32_f32;	 // "vvm.tex.2d.v4f32.f32"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "32", 2))
                break;
              return Intrinsic::nvvm_tex_2d_v4f32_s32;	 // "vvm.tex.2d.v4f32.s32"
            }
            break;
          case 's':	 // 2 strings to match.
            if (memcmp(NameR.data()+14, "32.", 3))
              break;
            switch (NameR[17]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "32", 2))
                break;
              return Intrinsic::nvvm_tex_2d_v4s32_f32;	 // "vvm.tex.2d.v4s32.f32"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "32", 2))
                break;
              return Intrinsic::nvvm_tex_2d_v4s32_s32;	 // "vvm.tex.2d.v4s32.s32"
            }
            break;
          case 'u':	 // 2 strings to match.
            if (memcmp(NameR.data()+14, "32.", 3))
              break;
            switch (NameR[17]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "32", 2))
                break;
              return Intrinsic::nvvm_tex_2d_v4u32_f32;	 // "vvm.tex.2d.v4u32.f32"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "32", 2))
                break;
              return Intrinsic::nvvm_tex_2d_v4u32_s32;	 // "vvm.tex.2d.v4u32.s32"
            }
            break;
          }
          break;
        case '3':	 // 6 strings to match.
          if (memcmp(NameR.data()+9, "d.v4", 4))
            break;
          switch (NameR[13]) {
          default: break;
          case 'f':	 // 2 strings to match.
            if (memcmp(NameR.data()+14, "32.", 3))
              break;
            switch (NameR[17]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "32", 2))
                break;
              return Intrinsic::nvvm_tex_3d_v4f32_f32;	 // "vvm.tex.3d.v4f32.f32"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "32", 2))
                break;
              return Intrinsic::nvvm_tex_3d_v4f32_s32;	 // "vvm.tex.3d.v4f32.s32"
            }
            break;
          case 's':	 // 2 strings to match.
            if (memcmp(NameR.data()+14, "32.", 3))
              break;
            switch (NameR[17]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "32", 2))
                break;
              return Intrinsic::nvvm_tex_3d_v4s32_f32;	 // "vvm.tex.3d.v4s32.f32"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "32", 2))
                break;
              return Intrinsic::nvvm_tex_3d_v4s32_s32;	 // "vvm.tex.3d.v4s32.s32"
            }
            break;
          case 'u':	 // 2 strings to match.
            if (memcmp(NameR.data()+14, "32.", 3))
              break;
            switch (NameR[17]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "32", 2))
                break;
              return Intrinsic::nvvm_tex_3d_v4u32_f32;	 // "vvm.tex.3d.v4u32.f32"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "32", 2))
                break;
              return Intrinsic::nvvm_tex_3d_v4u32_s32;	 // "vvm.tex.3d.v4u32.s32"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 21:	 // 33 strings to match.
      if (memcmp(NameR.data()+0, "vvm.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 's':	 // 32 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'q':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "rt.approx.ftz.f", 15))
            break;
          return Intrinsic::nvvm_sqrt_approx_ftz_f;	 // "vvm.sqrt.approx.ftz.f"
        case 'u':	 // 31 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'l':	 // 21 strings to match.
            if (memcmp(NameR.data()+7, "d.", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case '1':	 // 7 strings to match.
              if (memcmp(NameR.data()+10, "d.", 2))
                break;
              switch (NameR[12]) {
              default: break;
              case 'i':	 // 3 strings to match.
                switch (NameR[13]) {
                default: break;
                case '1':	 // 1 string to match.
                  if (memcmp(NameR.data()+14, "6.clamp", 7))
                    break;
                  return Intrinsic::nvvm_suld_1d_i16_clamp;	 // "vvm.suld.1d.i16.clamp"
                case '3':	 // 1 string to match.
                  if (memcmp(NameR.data()+14, "2.clamp", 7))
                    break;
                  return Intrinsic::nvvm_suld_1d_i32_clamp;	 // "vvm.suld.1d.i32.clamp"
                case '6':	 // 1 string to match.
                  if (memcmp(NameR.data()+14, "4.clamp", 7))
                    break;
                  return Intrinsic::nvvm_suld_1d_i64_clamp;	 // "vvm.suld.1d.i64.clamp"
                }
                break;
              case 'v':	 // 4 strings to match.
                switch (NameR[13]) {
                default: break;
                case '2':	 // 2 strings to match.
                  if (memcmp(NameR.data()+14, "i8.", 3))
                    break;
                  switch (NameR[17]) {
                  default: break;
                  case 't':	 // 1 string to match.
                    if (memcmp(NameR.data()+18, "rap", 3))
                      break;
                    return Intrinsic::nvvm_suld_1d_v2i8_trap;	 // "vvm.suld.1d.v2i8.trap"
                  case 'z':	 // 1 string to match.
                    if (memcmp(NameR.data()+18, "ero", 3))
                      break;
                    return Intrinsic::nvvm_suld_1d_v2i8_zero;	 // "vvm.suld.1d.v2i8.zero"
                  }
                  break;
                case '4':	 // 2 strings to match.
                  if (memcmp(NameR.data()+14, "i8.", 3))
                    break;
                  switch (NameR[17]) {
                  default: break;
                  case 't':	 // 1 string to match.
                    if (memcmp(NameR.data()+18, "rap", 3))
                      break;
                    return Intrinsic::nvvm_suld_1d_v4i8_trap;	 // "vvm.suld.1d.v4i8.trap"
                  case 'z':	 // 1 string to match.
                    if (memcmp(NameR.data()+18, "ero", 3))
                      break;
                    return Intrinsic::nvvm_suld_1d_v4i8_zero;	 // "vvm.suld.1d.v4i8.zero"
                  }
                  break;
                }
                break;
              }
              break;
            case '2':	 // 7 strings to match.
              if (memcmp(NameR.data()+10, "d.", 2))
                break;
              switch (NameR[12]) {
              default: break;
              case 'i':	 // 3 strings to match.
                switch (NameR[13]) {
                default: break;
                case '1':	 // 1 string to match.
                  if (memcmp(NameR.data()+14, "6.clamp", 7))
                    break;
                  return Intrinsic::nvvm_suld_2d_i16_clamp;	 // "vvm.suld.2d.i16.clamp"
                case '3':	 // 1 string to match.
                  if (memcmp(NameR.data()+14, "2.clamp", 7))
                    break;
                  return Intrinsic::nvvm_suld_2d_i32_clamp;	 // "vvm.suld.2d.i32.clamp"
                case '6':	 // 1 string to match.
                  if (memcmp(NameR.data()+14, "4.clamp", 7))
                    break;
                  return Intrinsic::nvvm_suld_2d_i64_clamp;	 // "vvm.suld.2d.i64.clamp"
                }
                break;
              case 'v':	 // 4 strings to match.
                switch (NameR[13]) {
                default: break;
                case '2':	 // 2 strings to match.
                  if (memcmp(NameR.data()+14, "i8.", 3))
                    break;
                  switch (NameR[17]) {
                  default: break;
                  case 't':	 // 1 string to match.
                    if (memcmp(NameR.data()+18, "rap", 3))
                      break;
                    return Intrinsic::nvvm_suld_2d_v2i8_trap;	 // "vvm.suld.2d.v2i8.trap"
                  case 'z':	 // 1 string to match.
                    if (memcmp(NameR.data()+18, "ero", 3))
                      break;
                    return Intrinsic::nvvm_suld_2d_v2i8_zero;	 // "vvm.suld.2d.v2i8.zero"
                  }
                  break;
                case '4':	 // 2 strings to match.
                  if (memcmp(NameR.data()+14, "i8.", 3))
                    break;
                  switch (NameR[17]) {
                  default: break;
                  case 't':	 // 1 string to match.
                    if (memcmp(NameR.data()+18, "rap", 3))
                      break;
                    return Intrinsic::nvvm_suld_2d_v4i8_trap;	 // "vvm.suld.2d.v4i8.trap"
                  case 'z':	 // 1 string to match.
                    if (memcmp(NameR.data()+18, "ero", 3))
                      break;
                    return Intrinsic::nvvm_suld_2d_v4i8_zero;	 // "vvm.suld.2d.v4i8.zero"
                  }
                  break;
                }
                break;
              }
              break;
            case '3':	 // 7 strings to match.
              if (memcmp(NameR.data()+10, "d.", 2))
                break;
              switch (NameR[12]) {
              default: break;
              case 'i':	 // 3 strings to match.
                switch (NameR[13]) {
                default: break;
                case '1':	 // 1 string to match.
                  if (memcmp(NameR.data()+14, "6.clamp", 7))
                    break;
                  return Intrinsic::nvvm_suld_3d_i16_clamp;	 // "vvm.suld.3d.i16.clamp"
                case '3':	 // 1 string to match.
                  if (memcmp(NameR.data()+14, "2.clamp", 7))
                    break;
                  return Intrinsic::nvvm_suld_3d_i32_clamp;	 // "vvm.suld.3d.i32.clamp"
                case '6':	 // 1 string to match.
                  if (memcmp(NameR.data()+14, "4.clamp", 7))
                    break;
                  return Intrinsic::nvvm_suld_3d_i64_clamp;	 // "vvm.suld.3d.i64.clamp"
                }
                break;
              case 'v':	 // 4 strings to match.
                switch (NameR[13]) {
                default: break;
                case '2':	 // 2 strings to match.
                  if (memcmp(NameR.data()+14, "i8.", 3))
                    break;
                  switch (NameR[17]) {
                  default: break;
                  case 't':	 // 1 string to match.
                    if (memcmp(NameR.data()+18, "rap", 3))
                      break;
                    return Intrinsic::nvvm_suld_3d_v2i8_trap;	 // "vvm.suld.3d.v2i8.trap"
                  case 'z':	 // 1 string to match.
                    if (memcmp(NameR.data()+18, "ero", 3))
                      break;
                    return Intrinsic::nvvm_suld_3d_v2i8_zero;	 // "vvm.suld.3d.v2i8.zero"
                  }
                  break;
                case '4':	 // 2 strings to match.
                  if (memcmp(NameR.data()+14, "i8.", 3))
                    break;
                  switch (NameR[17]) {
                  default: break;
                  case 't':	 // 1 string to match.
                    if (memcmp(NameR.data()+18, "rap", 3))
                      break;
                    return Intrinsic::nvvm_suld_3d_v4i8_trap;	 // "vvm.suld.3d.v4i8.trap"
                  case 'z':	 // 1 string to match.
                    if (memcmp(NameR.data()+18, "ero", 3))
                      break;
                    return Intrinsic::nvvm_suld_3d_v4i8_zero;	 // "vvm.suld.3d.v4i8.zero"
                  }
                  break;
                }
                break;
              }
              break;
            }
            break;
          case 'q':	 // 1 string to match.
            if (memcmp(NameR.data()+7, ".channel.order", 14))
              break;
            return Intrinsic::nvvm_suq_channel_order;	 // "vvm.suq.channel.order"
          case 's':	 // 9 strings to match.
            if (memcmp(NameR.data()+7, "t.", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 'b':	 // 6 strings to match.
              if (NameR[10] != '.')
                break;
              switch (NameR[11]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+12, "d.i8.", 5))
                  break;
                switch (NameR[17]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+18, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_i8_trap;	 // "vvm.sust.b.1d.i8.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+18, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_i8_zero;	 // "vvm.sust.b.1d.i8.zero"
                }
                break;
              case '2':	 // 2 strings to match.
                if (memcmp(NameR.data()+12, "d.i8.", 5))
                  break;
                switch (NameR[17]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+18, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_i8_trap;	 // "vvm.sust.b.2d.i8.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+18, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_i8_zero;	 // "vvm.sust.b.2d.i8.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+12, "d.i8.", 5))
                  break;
                switch (NameR[17]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+18, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_i8_trap;	 // "vvm.sust.b.3d.i8.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+18, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_i8_zero;	 // "vvm.sust.b.3d.i8.zero"
                }
                break;
              }
              break;
            case 'p':	 // 3 strings to match.
              if (NameR[10] != '.')
                break;
              switch (NameR[11]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+12, "d.i8.trap", 9))
                  break;
                return Intrinsic::nvvm_sust_p_1d_i8_trap;	 // "vvm.sust.p.1d.i8.trap"
              case '2':	 // 1 string to match.
                if (memcmp(NameR.data()+12, "d.i8.trap", 9))
                  break;
                return Intrinsic::nvvm_sust_p_2d_i8_trap;	 // "vvm.sust.p.2d.i8.trap"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+12, "d.i8.trap", 9))
                  break;
                return Intrinsic::nvvm_sust_p_3d_i8_trap;	 // "vvm.sust.p.3d.i8.trap"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 't':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "xq.channel.order", 16))
          break;
        return Intrinsic::nvvm_txq_channel_order;	 // "vvm.txq.channel.order"
      }
      break;
    case 22:	 // 67 strings to match.
      if (memcmp(NameR.data()+0, "vvm.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'r':	 // 1 string to match.
        if (memcmp(NameR.data()+5, "sqrt.approx.ftz.f", 17))
          break;
        return Intrinsic::nvvm_rsqrt_approx_ftz_f;	 // "vvm.rsqrt.approx.ftz.f"
      case 's':	 // 63 strings to match.
        if (NameR[5] != 'u')
          break;
        switch (NameR[6]) {
        default: break;
        case 'l':	 // 36 strings to match.
          if (memcmp(NameR.data()+7, "d.", 2))
            break;
          switch (NameR[9]) {
          default: break;
          case '1':	 // 12 strings to match.
            if (memcmp(NameR.data()+10, "d.v", 3))
              break;
            switch (NameR[13]) {
            default: break;
            case '2':	 // 7 strings to match.
              if (NameR[14] != 'i')
                break;
              switch (NameR[15]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "6.", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_1d_v2i16_trap;	 // "vvm.suld.1d.v2i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_1d_v2i16_zero;	 // "vvm.suld.1d.v2i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "2.", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_1d_v2i32_trap;	 // "vvm.suld.1d.v2i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_1d_v2i32_zero;	 // "vvm.suld.1d.v2i32.zero"
                }
                break;
              case '6':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "4.", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_1d_v2i64_trap;	 // "vvm.suld.1d.v2i64.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_1d_v2i64_zero;	 // "vvm.suld.1d.v2i64.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+16, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_suld_1d_v2i8_clamp;	 // "vvm.suld.1d.v2i8.clamp"
              }
              break;
            case '4':	 // 5 strings to match.
              if (NameR[14] != 'i')
                break;
              switch (NameR[15]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "6.", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_1d_v4i16_trap;	 // "vvm.suld.1d.v4i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_1d_v4i16_zero;	 // "vvm.suld.1d.v4i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "2.", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_1d_v4i32_trap;	 // "vvm.suld.1d.v4i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_1d_v4i32_zero;	 // "vvm.suld.1d.v4i32.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+16, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_suld_1d_v4i8_clamp;	 // "vvm.suld.1d.v4i8.clamp"
              }
              break;
            }
            break;
          case '2':	 // 12 strings to match.
            if (memcmp(NameR.data()+10, "d.v", 3))
              break;
            switch (NameR[13]) {
            default: break;
            case '2':	 // 7 strings to match.
              if (NameR[14] != 'i')
                break;
              switch (NameR[15]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "6.", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_2d_v2i16_trap;	 // "vvm.suld.2d.v2i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_2d_v2i16_zero;	 // "vvm.suld.2d.v2i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "2.", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_2d_v2i32_trap;	 // "vvm.suld.2d.v2i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_2d_v2i32_zero;	 // "vvm.suld.2d.v2i32.zero"
                }
                break;
              case '6':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "4.", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_2d_v2i64_trap;	 // "vvm.suld.2d.v2i64.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_2d_v2i64_zero;	 // "vvm.suld.2d.v2i64.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+16, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_suld_2d_v2i8_clamp;	 // "vvm.suld.2d.v2i8.clamp"
              }
              break;
            case '4':	 // 5 strings to match.
              if (NameR[14] != 'i')
                break;
              switch (NameR[15]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "6.", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_2d_v4i16_trap;	 // "vvm.suld.2d.v4i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_2d_v4i16_zero;	 // "vvm.suld.2d.v4i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "2.", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_2d_v4i32_trap;	 // "vvm.suld.2d.v4i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_2d_v4i32_zero;	 // "vvm.suld.2d.v4i32.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+16, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_suld_2d_v4i8_clamp;	 // "vvm.suld.2d.v4i8.clamp"
              }
              break;
            }
            break;
          case '3':	 // 12 strings to match.
            if (memcmp(NameR.data()+10, "d.v", 3))
              break;
            switch (NameR[13]) {
            default: break;
            case '2':	 // 7 strings to match.
              if (NameR[14] != 'i')
                break;
              switch (NameR[15]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "6.", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_3d_v2i16_trap;	 // "vvm.suld.3d.v2i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_3d_v2i16_zero;	 // "vvm.suld.3d.v2i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "2.", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_3d_v2i32_trap;	 // "vvm.suld.3d.v2i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_3d_v2i32_zero;	 // "vvm.suld.3d.v2i32.zero"
                }
                break;
              case '6':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "4.", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_3d_v2i64_trap;	 // "vvm.suld.3d.v2i64.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_3d_v2i64_zero;	 // "vvm.suld.3d.v2i64.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+16, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_suld_3d_v2i8_clamp;	 // "vvm.suld.3d.v2i8.clamp"
              }
              break;
            case '4':	 // 5 strings to match.
              if (NameR[14] != 'i')
                break;
              switch (NameR[15]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "6.", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_3d_v4i16_trap;	 // "vvm.suld.3d.v4i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_3d_v4i16_zero;	 // "vvm.suld.3d.v4i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "2.", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_3d_v4i32_trap;	 // "vvm.suld.3d.v4i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_3d_v4i32_zero;	 // "vvm.suld.3d.v4i32.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+16, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_suld_3d_v4i8_clamp;	 // "vvm.suld.3d.v4i8.clamp"
              }
              break;
            }
            break;
          }
          break;
        case 's':	 // 27 strings to match.
          if (memcmp(NameR.data()+7, "t.", 2))
            break;
          switch (NameR[9]) {
          default: break;
          case 'b':	 // 21 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case '1':	 // 7 strings to match.
              if (memcmp(NameR.data()+12, "d.i", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "6.", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_i16_trap;	 // "vvm.sust.b.1d.i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_i16_zero;	 // "vvm.sust.b.1d.i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "2.", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_i32_trap;	 // "vvm.sust.b.1d.i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_i32_zero;	 // "vvm.sust.b.1d.i32.zero"
                }
                break;
              case '6':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "4.", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_i64_trap;	 // "vvm.sust.b.1d.i64.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_i64_zero;	 // "vvm.sust.b.1d.i64.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+16, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_sust_b_1d_i8_clamp;	 // "vvm.sust.b.1d.i8.clamp"
              }
              break;
            case '2':	 // 7 strings to match.
              if (memcmp(NameR.data()+12, "d.i", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "6.", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_i16_trap;	 // "vvm.sust.b.2d.i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_i16_zero;	 // "vvm.sust.b.2d.i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "2.", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_i32_trap;	 // "vvm.sust.b.2d.i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_i32_zero;	 // "vvm.sust.b.2d.i32.zero"
                }
                break;
              case '6':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "4.", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_i64_trap;	 // "vvm.sust.b.2d.i64.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_i64_zero;	 // "vvm.sust.b.2d.i64.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+16, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_sust_b_2d_i8_clamp;	 // "vvm.sust.b.2d.i8.clamp"
              }
              break;
            case '3':	 // 7 strings to match.
              if (memcmp(NameR.data()+12, "d.i", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "6.", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_i16_trap;	 // "vvm.sust.b.3d.i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_i16_zero;	 // "vvm.sust.b.3d.i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "2.", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_i32_trap;	 // "vvm.sust.b.3d.i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_i32_zero;	 // "vvm.sust.b.3d.i32.zero"
                }
                break;
              case '6':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, "4.", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_i64_trap;	 // "vvm.sust.b.3d.i64.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+19, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_i64_zero;	 // "vvm.sust.b.3d.i64.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+16, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_sust_b_3d_i8_clamp;	 // "vvm.sust.b.3d.i8.clamp"
              }
              break;
            }
            break;
          case 'p':	 // 6 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case '1':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "d.i", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "6.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_1d_i16_trap;	 // "vvm.sust.p.1d.i16.trap"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "2.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_1d_i32_trap;	 // "vvm.sust.p.1d.i32.trap"
              }
              break;
            case '2':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "d.i", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "6.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_2d_i16_trap;	 // "vvm.sust.p.2d.i16.trap"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "2.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_2d_i32_trap;	 // "vvm.sust.p.2d.i32.trap"
              }
              break;
            case '3':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "d.i", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "6.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_3d_i16_trap;	 // "vvm.sust.p.3d.i16.trap"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "2.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_3d_i32_trap;	 // "vvm.sust.p.3d.i32.trap"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 't':	 // 3 strings to match.
        if (memcmp(NameR.data()+5, "ex.cube.v4", 10))
          break;
        switch (NameR[15]) {
        default: break;
        case 'f':	 // 1 string to match.
          if (memcmp(NameR.data()+16, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_cube_v4f32_f32;	 // "vvm.tex.cube.v4f32.f32"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+16, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_cube_v4s32_f32;	 // "vvm.tex.cube.v4s32.f32"
        case 'u':	 // 1 string to match.
          if (memcmp(NameR.data()+16, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_cube_v4u32_f32;	 // "vvm.tex.cube.v4u32.f32"
        }
        break;
      }
      break;
    case 23:	 // 57 strings to match.
      if (memcmp(NameR.data()+0, "vvm.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'r':	 // 3 strings to match.
        if (memcmp(NameR.data()+5, "ead.ptx.sreg.tid.", 17))
          break;
        switch (NameR[22]) {
        default: break;
        case 'x':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_tid_x;	 // "vvm.read.ptx.sreg.tid.x"
        case 'y':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_tid_y;	 // "vvm.read.ptx.sreg.tid.y"
        case 'z':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_tid_z;	 // "vvm.read.ptx.sreg.tid.z"
        }
        break;
      case 's':	 // 42 strings to match.
        if (NameR[5] != 'u')
          break;
        switch (NameR[6]) {
        default: break;
        case 'l':	 // 15 strings to match.
          if (memcmp(NameR.data()+7, "d.", 2))
            break;
          switch (NameR[9]) {
          default: break;
          case '1':	 // 5 strings to match.
            if (memcmp(NameR.data()+10, "d.v", 3))
              break;
            switch (NameR[13]) {
            default: break;
            case '2':	 // 3 strings to match.
              if (NameR[14] != 'i')
                break;
              switch (NameR[15]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "6.clamp", 7))
                  break;
                return Intrinsic::nvvm_suld_1d_v2i16_clamp;	 // "vvm.suld.1d.v2i16.clamp"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "2.clamp", 7))
                  break;
                return Intrinsic::nvvm_suld_1d_v2i32_clamp;	 // "vvm.suld.1d.v2i32.clamp"
              case '6':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "4.clamp", 7))
                  break;
                return Intrinsic::nvvm_suld_1d_v2i64_clamp;	 // "vvm.suld.1d.v2i64.clamp"
              }
              break;
            case '4':	 // 2 strings to match.
              if (NameR[14] != 'i')
                break;
              switch (NameR[15]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "6.clamp", 7))
                  break;
                return Intrinsic::nvvm_suld_1d_v4i16_clamp;	 // "vvm.suld.1d.v4i16.clamp"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "2.clamp", 7))
                  break;
                return Intrinsic::nvvm_suld_1d_v4i32_clamp;	 // "vvm.suld.1d.v4i32.clamp"
              }
              break;
            }
            break;
          case '2':	 // 5 strings to match.
            if (memcmp(NameR.data()+10, "d.v", 3))
              break;
            switch (NameR[13]) {
            default: break;
            case '2':	 // 3 strings to match.
              if (NameR[14] != 'i')
                break;
              switch (NameR[15]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "6.clamp", 7))
                  break;
                return Intrinsic::nvvm_suld_2d_v2i16_clamp;	 // "vvm.suld.2d.v2i16.clamp"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "2.clamp", 7))
                  break;
                return Intrinsic::nvvm_suld_2d_v2i32_clamp;	 // "vvm.suld.2d.v2i32.clamp"
              case '6':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "4.clamp", 7))
                  break;
                return Intrinsic::nvvm_suld_2d_v2i64_clamp;	 // "vvm.suld.2d.v2i64.clamp"
              }
              break;
            case '4':	 // 2 strings to match.
              if (NameR[14] != 'i')
                break;
              switch (NameR[15]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "6.clamp", 7))
                  break;
                return Intrinsic::nvvm_suld_2d_v4i16_clamp;	 // "vvm.suld.2d.v4i16.clamp"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "2.clamp", 7))
                  break;
                return Intrinsic::nvvm_suld_2d_v4i32_clamp;	 // "vvm.suld.2d.v4i32.clamp"
              }
              break;
            }
            break;
          case '3':	 // 5 strings to match.
            if (memcmp(NameR.data()+10, "d.v", 3))
              break;
            switch (NameR[13]) {
            default: break;
            case '2':	 // 3 strings to match.
              if (NameR[14] != 'i')
                break;
              switch (NameR[15]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "6.clamp", 7))
                  break;
                return Intrinsic::nvvm_suld_3d_v2i16_clamp;	 // "vvm.suld.3d.v2i16.clamp"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "2.clamp", 7))
                  break;
                return Intrinsic::nvvm_suld_3d_v2i32_clamp;	 // "vvm.suld.3d.v2i32.clamp"
              case '6':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "4.clamp", 7))
                  break;
                return Intrinsic::nvvm_suld_3d_v2i64_clamp;	 // "vvm.suld.3d.v2i64.clamp"
              }
              break;
            case '4':	 // 2 strings to match.
              if (NameR[14] != 'i')
                break;
              switch (NameR[15]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "6.clamp", 7))
                  break;
                return Intrinsic::nvvm_suld_3d_v4i16_clamp;	 // "vvm.suld.3d.v4i16.clamp"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "2.clamp", 7))
                  break;
                return Intrinsic::nvvm_suld_3d_v4i32_clamp;	 // "vvm.suld.3d.v4i32.clamp"
              }
              break;
            }
            break;
          }
          break;
        case 's':	 // 27 strings to match.
          if (memcmp(NameR.data()+7, "t.", 2))
            break;
          switch (NameR[9]) {
          default: break;
          case 'b':	 // 21 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case '1':	 // 7 strings to match.
              if (memcmp(NameR.data()+12, "d.", 2))
                break;
              switch (NameR[14]) {
              default: break;
              case 'i':	 // 3 strings to match.
                switch (NameR[15]) {
                default: break;
                case '1':	 // 1 string to match.
                  if (memcmp(NameR.data()+16, "6.clamp", 7))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_i16_clamp;	 // "vvm.sust.b.1d.i16.clamp"
                case '3':	 // 1 string to match.
                  if (memcmp(NameR.data()+16, "2.clamp", 7))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_i32_clamp;	 // "vvm.sust.b.1d.i32.clamp"
                case '6':	 // 1 string to match.
                  if (memcmp(NameR.data()+16, "4.clamp", 7))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_i64_clamp;	 // "vvm.sust.b.1d.i64.clamp"
                }
                break;
              case 'v':	 // 4 strings to match.
                switch (NameR[15]) {
                default: break;
                case '2':	 // 2 strings to match.
                  if (memcmp(NameR.data()+16, "i8.", 3))
                    break;
                  switch (NameR[19]) {
                  default: break;
                  case 't':	 // 1 string to match.
                    if (memcmp(NameR.data()+20, "rap", 3))
                      break;
                    return Intrinsic::nvvm_sust_b_1d_v2i8_trap;	 // "vvm.sust.b.1d.v2i8.trap"
                  case 'z':	 // 1 string to match.
                    if (memcmp(NameR.data()+20, "ero", 3))
                      break;
                    return Intrinsic::nvvm_sust_b_1d_v2i8_zero;	 // "vvm.sust.b.1d.v2i8.zero"
                  }
                  break;
                case '4':	 // 2 strings to match.
                  if (memcmp(NameR.data()+16, "i8.", 3))
                    break;
                  switch (NameR[19]) {
                  default: break;
                  case 't':	 // 1 string to match.
                    if (memcmp(NameR.data()+20, "rap", 3))
                      break;
                    return Intrinsic::nvvm_sust_b_1d_v4i8_trap;	 // "vvm.sust.b.1d.v4i8.trap"
                  case 'z':	 // 1 string to match.
                    if (memcmp(NameR.data()+20, "ero", 3))
                      break;
                    return Intrinsic::nvvm_sust_b_1d_v4i8_zero;	 // "vvm.sust.b.1d.v4i8.zero"
                  }
                  break;
                }
                break;
              }
              break;
            case '2':	 // 7 strings to match.
              if (memcmp(NameR.data()+12, "d.", 2))
                break;
              switch (NameR[14]) {
              default: break;
              case 'i':	 // 3 strings to match.
                switch (NameR[15]) {
                default: break;
                case '1':	 // 1 string to match.
                  if (memcmp(NameR.data()+16, "6.clamp", 7))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_i16_clamp;	 // "vvm.sust.b.2d.i16.clamp"
                case '3':	 // 1 string to match.
                  if (memcmp(NameR.data()+16, "2.clamp", 7))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_i32_clamp;	 // "vvm.sust.b.2d.i32.clamp"
                case '6':	 // 1 string to match.
                  if (memcmp(NameR.data()+16, "4.clamp", 7))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_i64_clamp;	 // "vvm.sust.b.2d.i64.clamp"
                }
                break;
              case 'v':	 // 4 strings to match.
                switch (NameR[15]) {
                default: break;
                case '2':	 // 2 strings to match.
                  if (memcmp(NameR.data()+16, "i8.", 3))
                    break;
                  switch (NameR[19]) {
                  default: break;
                  case 't':	 // 1 string to match.
                    if (memcmp(NameR.data()+20, "rap", 3))
                      break;
                    return Intrinsic::nvvm_sust_b_2d_v2i8_trap;	 // "vvm.sust.b.2d.v2i8.trap"
                  case 'z':	 // 1 string to match.
                    if (memcmp(NameR.data()+20, "ero", 3))
                      break;
                    return Intrinsic::nvvm_sust_b_2d_v2i8_zero;	 // "vvm.sust.b.2d.v2i8.zero"
                  }
                  break;
                case '4':	 // 2 strings to match.
                  if (memcmp(NameR.data()+16, "i8.", 3))
                    break;
                  switch (NameR[19]) {
                  default: break;
                  case 't':	 // 1 string to match.
                    if (memcmp(NameR.data()+20, "rap", 3))
                      break;
                    return Intrinsic::nvvm_sust_b_2d_v4i8_trap;	 // "vvm.sust.b.2d.v4i8.trap"
                  case 'z':	 // 1 string to match.
                    if (memcmp(NameR.data()+20, "ero", 3))
                      break;
                    return Intrinsic::nvvm_sust_b_2d_v4i8_zero;	 // "vvm.sust.b.2d.v4i8.zero"
                  }
                  break;
                }
                break;
              }
              break;
            case '3':	 // 7 strings to match.
              if (memcmp(NameR.data()+12, "d.", 2))
                break;
              switch (NameR[14]) {
              default: break;
              case 'i':	 // 3 strings to match.
                switch (NameR[15]) {
                default: break;
                case '1':	 // 1 string to match.
                  if (memcmp(NameR.data()+16, "6.clamp", 7))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_i16_clamp;	 // "vvm.sust.b.3d.i16.clamp"
                case '3':	 // 1 string to match.
                  if (memcmp(NameR.data()+16, "2.clamp", 7))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_i32_clamp;	 // "vvm.sust.b.3d.i32.clamp"
                case '6':	 // 1 string to match.
                  if (memcmp(NameR.data()+16, "4.clamp", 7))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_i64_clamp;	 // "vvm.sust.b.3d.i64.clamp"
                }
                break;
              case 'v':	 // 4 strings to match.
                switch (NameR[15]) {
                default: break;
                case '2':	 // 2 strings to match.
                  if (memcmp(NameR.data()+16, "i8.", 3))
                    break;
                  switch (NameR[19]) {
                  default: break;
                  case 't':	 // 1 string to match.
                    if (memcmp(NameR.data()+20, "rap", 3))
                      break;
                    return Intrinsic::nvvm_sust_b_3d_v2i8_trap;	 // "vvm.sust.b.3d.v2i8.trap"
                  case 'z':	 // 1 string to match.
                    if (memcmp(NameR.data()+20, "ero", 3))
                      break;
                    return Intrinsic::nvvm_sust_b_3d_v2i8_zero;	 // "vvm.sust.b.3d.v2i8.zero"
                  }
                  break;
                case '4':	 // 2 strings to match.
                  if (memcmp(NameR.data()+16, "i8.", 3))
                    break;
                  switch (NameR[19]) {
                  default: break;
                  case 't':	 // 1 string to match.
                    if (memcmp(NameR.data()+20, "rap", 3))
                      break;
                    return Intrinsic::nvvm_sust_b_3d_v4i8_trap;	 // "vvm.sust.b.3d.v4i8.trap"
                  case 'z':	 // 1 string to match.
                    if (memcmp(NameR.data()+20, "ero", 3))
                      break;
                    return Intrinsic::nvvm_sust_b_3d_v4i8_zero;	 // "vvm.sust.b.3d.v4i8.zero"
                  }
                  break;
                }
                break;
              }
              break;
            }
            break;
          case 'p':	 // 6 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case '1':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "d.v", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case '2':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "i8.trap", 7))
                  break;
                return Intrinsic::nvvm_sust_p_1d_v2i8_trap;	 // "vvm.sust.p.1d.v2i8.trap"
              case '4':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "i8.trap", 7))
                  break;
                return Intrinsic::nvvm_sust_p_1d_v4i8_trap;	 // "vvm.sust.p.1d.v4i8.trap"
              }
              break;
            case '2':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "d.v", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case '2':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "i8.trap", 7))
                  break;
                return Intrinsic::nvvm_sust_p_2d_v2i8_trap;	 // "vvm.sust.p.2d.v2i8.trap"
              case '4':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "i8.trap", 7))
                  break;
                return Intrinsic::nvvm_sust_p_2d_v4i8_trap;	 // "vvm.sust.p.2d.v4i8.trap"
              }
              break;
            case '3':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "d.v", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case '2':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "i8.trap", 7))
                  break;
                return Intrinsic::nvvm_sust_p_3d_v2i8_trap;	 // "vvm.sust.p.3d.v2i8.trap"
              case '4':	 // 1 string to match.
                if (memcmp(NameR.data()+16, "i8.trap", 7))
                  break;
                return Intrinsic::nvvm_sust_p_3d_v4i8_trap;	 // "vvm.sust.p.3d.v4i8.trap"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 't':	 // 12 strings to match.
        if (memcmp(NameR.data()+5, "ld4.", 4))
          break;
        switch (NameR[9]) {
        default: break;
        case 'a':	 // 3 strings to match.
          if (memcmp(NameR.data()+10, ".2d.v4", 6))
            break;
          switch (NameR[16]) {
          default: break;
          case 'f':	 // 1 string to match.
            if (memcmp(NameR.data()+17, "32.f32", 6))
              break;
            return Intrinsic::nvvm_tld4_a_2d_v4f32_f32;	 // "vvm.tld4.a.2d.v4f32.f32"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+17, "32.f32", 6))
              break;
            return Intrinsic::nvvm_tld4_a_2d_v4s32_f32;	 // "vvm.tld4.a.2d.v4s32.f32"
          case 'u':	 // 1 string to match.
            if (memcmp(NameR.data()+17, "32.f32", 6))
              break;
            return Intrinsic::nvvm_tld4_a_2d_v4u32_f32;	 // "vvm.tld4.a.2d.v4u32.f32"
          }
          break;
        case 'b':	 // 3 strings to match.
          if (memcmp(NameR.data()+10, ".2d.v4", 6))
            break;
          switch (NameR[16]) {
          default: break;
          case 'f':	 // 1 string to match.
            if (memcmp(NameR.data()+17, "32.f32", 6))
              break;
            return Intrinsic::nvvm_tld4_b_2d_v4f32_f32;	 // "vvm.tld4.b.2d.v4f32.f32"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+17, "32.f32", 6))
              break;
            return Intrinsic::nvvm_tld4_b_2d_v4s32_f32;	 // "vvm.tld4.b.2d.v4s32.f32"
          case 'u':	 // 1 string to match.
            if (memcmp(NameR.data()+17, "32.f32", 6))
              break;
            return Intrinsic::nvvm_tld4_b_2d_v4u32_f32;	 // "vvm.tld4.b.2d.v4u32.f32"
          }
          break;
        case 'g':	 // 3 strings to match.
          if (memcmp(NameR.data()+10, ".2d.v4", 6))
            break;
          switch (NameR[16]) {
          default: break;
          case 'f':	 // 1 string to match.
            if (memcmp(NameR.data()+17, "32.f32", 6))
              break;
            return Intrinsic::nvvm_tld4_g_2d_v4f32_f32;	 // "vvm.tld4.g.2d.v4f32.f32"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+17, "32.f32", 6))
              break;
            return Intrinsic::nvvm_tld4_g_2d_v4s32_f32;	 // "vvm.tld4.g.2d.v4s32.f32"
          case 'u':	 // 1 string to match.
            if (memcmp(NameR.data()+17, "32.f32", 6))
              break;
            return Intrinsic::nvvm_tld4_g_2d_v4u32_f32;	 // "vvm.tld4.g.2d.v4u32.f32"
          }
          break;
        case 'r':	 // 3 strings to match.
          if (memcmp(NameR.data()+10, ".2d.v4", 6))
            break;
          switch (NameR[16]) {
          default: break;
          case 'f':	 // 1 string to match.
            if (memcmp(NameR.data()+17, "32.f32", 6))
              break;
            return Intrinsic::nvvm_tld4_r_2d_v4f32_f32;	 // "vvm.tld4.r.2d.v4f32.f32"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+17, "32.f32", 6))
              break;
            return Intrinsic::nvvm_tld4_r_2d_v4s32_f32;	 // "vvm.tld4.r.2d.v4s32.f32"
          case 'u':	 // 1 string to match.
            if (memcmp(NameR.data()+17, "32.f32", 6))
              break;
            return Intrinsic::nvvm_tld4_r_2d_v4u32_f32;	 // "vvm.tld4.r.2d.v4u32.f32"
          }
          break;
        }
        break;
      }
      break;
    case 24:	 // 51 strings to match.
      if (memcmp(NameR.data()+0, "vvm.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'r':	 // 3 strings to match.
        if (memcmp(NameR.data()+5, "ead.ptx.sreg.ntid.", 18))
          break;
        switch (NameR[23]) {
        default: break;
        case 'x':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_ntid_x;	 // "vvm.read.ptx.sreg.ntid.x"
        case 'y':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_ntid_y;	 // "vvm.read.ptx.sreg.ntid.y"
        case 'z':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_ntid_z;	 // "vvm.read.ptx.sreg.ntid.z"
        }
        break;
      case 's':	 // 48 strings to match.
        if (memcmp(NameR.data()+5, "ust.", 4))
          break;
        switch (NameR[9]) {
        default: break;
        case 'b':	 // 36 strings to match.
          if (NameR[10] != '.')
            break;
          switch (NameR[11]) {
          default: break;
          case '1':	 // 12 strings to match.
            if (memcmp(NameR.data()+12, "d.v", 3))
              break;
            switch (NameR[15]) {
            default: break;
            case '2':	 // 7 strings to match.
              if (NameR[16] != 'i')
                break;
              switch (NameR[17]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+18, "6.", 2))
                  break;
                switch (NameR[20]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_v2i16_trap;	 // "vvm.sust.b.1d.v2i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_v2i16_zero;	 // "vvm.sust.b.1d.v2i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+18, "2.", 2))
                  break;
                switch (NameR[20]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_v2i32_trap;	 // "vvm.sust.b.1d.v2i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_v2i32_zero;	 // "vvm.sust.b.1d.v2i32.zero"
                }
                break;
              case '6':	 // 2 strings to match.
                if (memcmp(NameR.data()+18, "4.", 2))
                  break;
                switch (NameR[20]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_v2i64_trap;	 // "vvm.sust.b.1d.v2i64.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_v2i64_zero;	 // "vvm.sust.b.1d.v2i64.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+18, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_sust_b_1d_v2i8_clamp;	 // "vvm.sust.b.1d.v2i8.clamp"
              }
              break;
            case '4':	 // 5 strings to match.
              if (NameR[16] != 'i')
                break;
              switch (NameR[17]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+18, "6.", 2))
                  break;
                switch (NameR[20]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_v4i16_trap;	 // "vvm.sust.b.1d.v4i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_v4i16_zero;	 // "vvm.sust.b.1d.v4i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+18, "2.", 2))
                  break;
                switch (NameR[20]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_v4i32_trap;	 // "vvm.sust.b.1d.v4i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_v4i32_zero;	 // "vvm.sust.b.1d.v4i32.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+18, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_sust_b_1d_v4i8_clamp;	 // "vvm.sust.b.1d.v4i8.clamp"
              }
              break;
            }
            break;
          case '2':	 // 12 strings to match.
            if (memcmp(NameR.data()+12, "d.v", 3))
              break;
            switch (NameR[15]) {
            default: break;
            case '2':	 // 7 strings to match.
              if (NameR[16] != 'i')
                break;
              switch (NameR[17]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+18, "6.", 2))
                  break;
                switch (NameR[20]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_v2i16_trap;	 // "vvm.sust.b.2d.v2i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_v2i16_zero;	 // "vvm.sust.b.2d.v2i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+18, "2.", 2))
                  break;
                switch (NameR[20]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_v2i32_trap;	 // "vvm.sust.b.2d.v2i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_v2i32_zero;	 // "vvm.sust.b.2d.v2i32.zero"
                }
                break;
              case '6':	 // 2 strings to match.
                if (memcmp(NameR.data()+18, "4.", 2))
                  break;
                switch (NameR[20]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_v2i64_trap;	 // "vvm.sust.b.2d.v2i64.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_v2i64_zero;	 // "vvm.sust.b.2d.v2i64.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+18, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_sust_b_2d_v2i8_clamp;	 // "vvm.sust.b.2d.v2i8.clamp"
              }
              break;
            case '4':	 // 5 strings to match.
              if (NameR[16] != 'i')
                break;
              switch (NameR[17]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+18, "6.", 2))
                  break;
                switch (NameR[20]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_v4i16_trap;	 // "vvm.sust.b.2d.v4i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_v4i16_zero;	 // "vvm.sust.b.2d.v4i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+18, "2.", 2))
                  break;
                switch (NameR[20]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_v4i32_trap;	 // "vvm.sust.b.2d.v4i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_v4i32_zero;	 // "vvm.sust.b.2d.v4i32.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+18, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_sust_b_2d_v4i8_clamp;	 // "vvm.sust.b.2d.v4i8.clamp"
              }
              break;
            }
            break;
          case '3':	 // 12 strings to match.
            if (memcmp(NameR.data()+12, "d.v", 3))
              break;
            switch (NameR[15]) {
            default: break;
            case '2':	 // 7 strings to match.
              if (NameR[16] != 'i')
                break;
              switch (NameR[17]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+18, "6.", 2))
                  break;
                switch (NameR[20]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_v2i16_trap;	 // "vvm.sust.b.3d.v2i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_v2i16_zero;	 // "vvm.sust.b.3d.v2i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+18, "2.", 2))
                  break;
                switch (NameR[20]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_v2i32_trap;	 // "vvm.sust.b.3d.v2i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_v2i32_zero;	 // "vvm.sust.b.3d.v2i32.zero"
                }
                break;
              case '6':	 // 2 strings to match.
                if (memcmp(NameR.data()+18, "4.", 2))
                  break;
                switch (NameR[20]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_v2i64_trap;	 // "vvm.sust.b.3d.v2i64.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_v2i64_zero;	 // "vvm.sust.b.3d.v2i64.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+18, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_sust_b_3d_v2i8_clamp;	 // "vvm.sust.b.3d.v2i8.clamp"
              }
              break;
            case '4':	 // 5 strings to match.
              if (NameR[16] != 'i')
                break;
              switch (NameR[17]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+18, "6.", 2))
                  break;
                switch (NameR[20]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_v4i16_trap;	 // "vvm.sust.b.3d.v4i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_v4i16_zero;	 // "vvm.sust.b.3d.v4i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+18, "2.", 2))
                  break;
                switch (NameR[20]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_v4i32_trap;	 // "vvm.sust.b.3d.v4i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+21, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_v4i32_zero;	 // "vvm.sust.b.3d.v4i32.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+18, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_sust_b_3d_v4i8_clamp;	 // "vvm.sust.b.3d.v4i8.clamp"
              }
              break;
            }
            break;
          }
          break;
        case 'p':	 // 12 strings to match.
          if (NameR[10] != '.')
            break;
          switch (NameR[11]) {
          default: break;
          case '1':	 // 4 strings to match.
            if (memcmp(NameR.data()+12, "d.v", 3))
              break;
            switch (NameR[15]) {
            default: break;
            case '2':	 // 2 strings to match.
              if (NameR[16] != 'i')
                break;
              switch (NameR[17]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "6.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_1d_v2i16_trap;	 // "vvm.sust.p.1d.v2i16.trap"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "2.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_1d_v2i32_trap;	 // "vvm.sust.p.1d.v2i32.trap"
              }
              break;
            case '4':	 // 2 strings to match.
              if (NameR[16] != 'i')
                break;
              switch (NameR[17]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "6.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_1d_v4i16_trap;	 // "vvm.sust.p.1d.v4i16.trap"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "2.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_1d_v4i32_trap;	 // "vvm.sust.p.1d.v4i32.trap"
              }
              break;
            }
            break;
          case '2':	 // 4 strings to match.
            if (memcmp(NameR.data()+12, "d.v", 3))
              break;
            switch (NameR[15]) {
            default: break;
            case '2':	 // 2 strings to match.
              if (NameR[16] != 'i')
                break;
              switch (NameR[17]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "6.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_2d_v2i16_trap;	 // "vvm.sust.p.2d.v2i16.trap"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "2.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_2d_v2i32_trap;	 // "vvm.sust.p.2d.v2i32.trap"
              }
              break;
            case '4':	 // 2 strings to match.
              if (NameR[16] != 'i')
                break;
              switch (NameR[17]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "6.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_2d_v4i16_trap;	 // "vvm.sust.p.2d.v4i16.trap"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "2.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_2d_v4i32_trap;	 // "vvm.sust.p.2d.v4i32.trap"
              }
              break;
            }
            break;
          case '3':	 // 4 strings to match.
            if (memcmp(NameR.data()+12, "d.v", 3))
              break;
            switch (NameR[15]) {
            default: break;
            case '2':	 // 2 strings to match.
              if (NameR[16] != 'i')
                break;
              switch (NameR[17]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "6.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_3d_v2i16_trap;	 // "vvm.sust.p.3d.v2i16.trap"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "2.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_3d_v2i32_trap;	 // "vvm.sust.p.3d.v2i32.trap"
              }
              break;
            case '4':	 // 2 strings to match.
              if (NameR[16] != 'i')
                break;
              switch (NameR[17]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "6.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_3d_v4i16_trap;	 // "vvm.sust.p.3d.v4i16.trap"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "2.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_3d_v4i32_trap;	 // "vvm.sust.p.3d.v4i32.trap"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 25:	 // 44 strings to match.
      if (memcmp(NameR.data()+0, "vvm.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'r':	 // 13 strings to match.
        if (memcmp(NameR.data()+5, "ead.ptx.sreg.", 13))
          break;
        switch (NameR[18]) {
        default: break;
        case 'c':	 // 3 strings to match.
          if (memcmp(NameR.data()+19, "taid.", 5))
            break;
          switch (NameR[24]) {
          default: break;
          case 'x':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_ctaid_x;	 // "vvm.read.ptx.sreg.ctaid.x"
          case 'y':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_ctaid_y;	 // "vvm.read.ptx.sreg.ctaid.y"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_ctaid_z;	 // "vvm.read.ptx.sreg.ctaid.z"
          }
          break;
        case 'e':	 // 10 strings to match.
          if (memcmp(NameR.data()+19, "nvreg", 5))
            break;
          switch (NameR[24]) {
          default: break;
          case '0':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_envreg0;	 // "vvm.read.ptx.sreg.envreg0"
          case '1':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_envreg1;	 // "vvm.read.ptx.sreg.envreg1"
          case '2':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_envreg2;	 // "vvm.read.ptx.sreg.envreg2"
          case '3':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_envreg3;	 // "vvm.read.ptx.sreg.envreg3"
          case '4':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_envreg4;	 // "vvm.read.ptx.sreg.envreg4"
          case '5':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_envreg5;	 // "vvm.read.ptx.sreg.envreg5"
          case '6':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_envreg6;	 // "vvm.read.ptx.sreg.envreg6"
          case '7':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_envreg7;	 // "vvm.read.ptx.sreg.envreg7"
          case '8':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_envreg8;	 // "vvm.read.ptx.sreg.envreg8"
          case '9':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_envreg9;	 // "vvm.read.ptx.sreg.envreg9"
          }
          break;
        }
        break;
      case 's':	 // 20 strings to match.
        if (NameR[5] != 'u')
          break;
        switch (NameR[6]) {
        default: break;
        case 'l':	 // 4 strings to match.
          if (memcmp(NameR.data()+7, "d.", 2))
            break;
          switch (NameR[9]) {
          default: break;
          case '1':	 // 2 strings to match.
            if (memcmp(NameR.data()+10, "d.array.i8.", 11))
              break;
            switch (NameR[21]) {
            default: break;
            case 't':	 // 1 string to match.
              if (memcmp(NameR.data()+22, "rap", 3))
                break;
              return Intrinsic::nvvm_suld_1d_array_i8_trap;	 // "vvm.suld.1d.array.i8.trap"
            case 'z':	 // 1 string to match.
              if (memcmp(NameR.data()+22, "ero", 3))
                break;
              return Intrinsic::nvvm_suld_1d_array_i8_zero;	 // "vvm.suld.1d.array.i8.zero"
            }
            break;
          case '2':	 // 2 strings to match.
            if (memcmp(NameR.data()+10, "d.array.i8.", 11))
              break;
            switch (NameR[21]) {
            default: break;
            case 't':	 // 1 string to match.
              if (memcmp(NameR.data()+22, "rap", 3))
                break;
              return Intrinsic::nvvm_suld_2d_array_i8_trap;	 // "vvm.suld.2d.array.i8.trap"
            case 'z':	 // 1 string to match.
              if (memcmp(NameR.data()+22, "ero", 3))
                break;
              return Intrinsic::nvvm_suld_2d_array_i8_zero;	 // "vvm.suld.2d.array.i8.zero"
            }
            break;
          }
          break;
        case 'q':	 // 1 string to match.
          if (memcmp(NameR.data()+7, ".channel.data.type", 18))
            break;
          return Intrinsic::nvvm_suq_channel_data_type;	 // "vvm.suq.channel.data.type"
        case 's':	 // 15 strings to match.
          if (memcmp(NameR.data()+7, "t.b.", 4))
            break;
          switch (NameR[11]) {
          default: break;
          case '1':	 // 5 strings to match.
            if (memcmp(NameR.data()+12, "d.v", 3))
              break;
            switch (NameR[15]) {
            default: break;
            case '2':	 // 3 strings to match.
              if (NameR[16] != 'i')
                break;
              switch (NameR[17]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "6.clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_1d_v2i16_clamp;	 // "vvm.sust.b.1d.v2i16.clamp"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "2.clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_1d_v2i32_clamp;	 // "vvm.sust.b.1d.v2i32.clamp"
              case '6':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "4.clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_1d_v2i64_clamp;	 // "vvm.sust.b.1d.v2i64.clamp"
              }
              break;
            case '4':	 // 2 strings to match.
              if (NameR[16] != 'i')
                break;
              switch (NameR[17]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "6.clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_1d_v4i16_clamp;	 // "vvm.sust.b.1d.v4i16.clamp"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "2.clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_1d_v4i32_clamp;	 // "vvm.sust.b.1d.v4i32.clamp"
              }
              break;
            }
            break;
          case '2':	 // 5 strings to match.
            if (memcmp(NameR.data()+12, "d.v", 3))
              break;
            switch (NameR[15]) {
            default: break;
            case '2':	 // 3 strings to match.
              if (NameR[16] != 'i')
                break;
              switch (NameR[17]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "6.clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_2d_v2i16_clamp;	 // "vvm.sust.b.2d.v2i16.clamp"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "2.clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_2d_v2i32_clamp;	 // "vvm.sust.b.2d.v2i32.clamp"
              case '6':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "4.clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_2d_v2i64_clamp;	 // "vvm.sust.b.2d.v2i64.clamp"
              }
              break;
            case '4':	 // 2 strings to match.
              if (NameR[16] != 'i')
                break;
              switch (NameR[17]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "6.clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_2d_v4i16_clamp;	 // "vvm.sust.b.2d.v4i16.clamp"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "2.clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_2d_v4i32_clamp;	 // "vvm.sust.b.2d.v4i32.clamp"
              }
              break;
            }
            break;
          case '3':	 // 5 strings to match.
            if (memcmp(NameR.data()+12, "d.v", 3))
              break;
            switch (NameR[15]) {
            default: break;
            case '2':	 // 3 strings to match.
              if (NameR[16] != 'i')
                break;
              switch (NameR[17]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "6.clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_3d_v2i16_clamp;	 // "vvm.sust.b.3d.v2i16.clamp"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "2.clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_3d_v2i32_clamp;	 // "vvm.sust.b.3d.v2i32.clamp"
              case '6':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "4.clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_3d_v2i64_clamp;	 // "vvm.sust.b.3d.v2i64.clamp"
              }
              break;
            case '4':	 // 2 strings to match.
              if (NameR[16] != 'i')
                break;
              switch (NameR[17]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "6.clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_3d_v4i16_clamp;	 // "vvm.sust.b.3d.v4i16.clamp"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+18, "2.clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_3d_v4i32_clamp;	 // "vvm.sust.b.3d.v4i32.clamp"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 't':	 // 11 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'e':	 // 9 strings to match.
          if (memcmp(NameR.data()+6, "x.", 2))
            break;
          switch (NameR[8]) {
          default: break;
          case '1':	 // 3 strings to match.
            if (memcmp(NameR.data()+9, "d.grad.v4", 9))
              break;
            switch (NameR[18]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+19, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_1d_grad_v4f32_f32;	 // "vvm.tex.1d.grad.v4f32.f32"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+19, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_1d_grad_v4s32_f32;	 // "vvm.tex.1d.grad.v4s32.f32"
            case 'u':	 // 1 string to match.
              if (memcmp(NameR.data()+19, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_1d_grad_v4u32_f32;	 // "vvm.tex.1d.grad.v4u32.f32"
            }
            break;
          case '2':	 // 3 strings to match.
            if (memcmp(NameR.data()+9, "d.grad.v4", 9))
              break;
            switch (NameR[18]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+19, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_2d_grad_v4f32_f32;	 // "vvm.tex.2d.grad.v4f32.f32"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+19, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_2d_grad_v4s32_f32;	 // "vvm.tex.2d.grad.v4s32.f32"
            case 'u':	 // 1 string to match.
              if (memcmp(NameR.data()+19, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_2d_grad_v4u32_f32;	 // "vvm.tex.2d.grad.v4u32.f32"
            }
            break;
          case '3':	 // 3 strings to match.
            if (memcmp(NameR.data()+9, "d.grad.v4", 9))
              break;
            switch (NameR[18]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+19, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_3d_grad_v4f32_f32;	 // "vvm.tex.3d.grad.v4f32.f32"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+19, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_3d_grad_v4s32_f32;	 // "vvm.tex.3d.grad.v4s32.f32"
            case 'u':	 // 1 string to match.
              if (memcmp(NameR.data()+19, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_3d_grad_v4u32_f32;	 // "vvm.tex.3d.grad.v4u32.f32"
            }
            break;
          }
          break;
        case 'x':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "q.", 2))
            break;
          switch (NameR[8]) {
          default: break;
          case 'c':	 // 1 string to match.
            if (memcmp(NameR.data()+9, "hannel.data.type", 16))
              break;
            return Intrinsic::nvvm_txq_channel_data_type;	 // "vvm.txq.channel.data.type"
          case 'n':	 // 1 string to match.
            if (memcmp(NameR.data()+9, "um.mipmap.levels", 16))
              break;
            return Intrinsic::nvvm_txq_num_mipmap_levels;	 // "vvm.txq.num.mipmap.levels"
          }
          break;
        }
        break;
      }
      break;
    case 26:	 // 61 strings to match.
      if (memcmp(NameR.data()+0, "vvm.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 'r':	 // 26 strings to match.
        if (memcmp(NameR.data()+5, "ead.ptx.sreg.", 13))
          break;
        switch (NameR[18]) {
        default: break;
        case 'e':	 // 22 strings to match.
          if (memcmp(NameR.data()+19, "nvreg", 5))
            break;
          switch (NameR[24]) {
          default: break;
          case '1':	 // 10 strings to match.
            switch (NameR[25]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::nvvm_read_ptx_sreg_envreg10;	 // "vvm.read.ptx.sreg.envreg10"
            case '1':	 // 1 string to match.
              return Intrinsic::nvvm_read_ptx_sreg_envreg11;	 // "vvm.read.ptx.sreg.envreg11"
            case '2':	 // 1 string to match.
              return Intrinsic::nvvm_read_ptx_sreg_envreg12;	 // "vvm.read.ptx.sreg.envreg12"
            case '3':	 // 1 string to match.
              return Intrinsic::nvvm_read_ptx_sreg_envreg13;	 // "vvm.read.ptx.sreg.envreg13"
            case '4':	 // 1 string to match.
              return Intrinsic::nvvm_read_ptx_sreg_envreg14;	 // "vvm.read.ptx.sreg.envreg14"
            case '5':	 // 1 string to match.
              return Intrinsic::nvvm_read_ptx_sreg_envreg15;	 // "vvm.read.ptx.sreg.envreg15"
            case '6':	 // 1 string to match.
              return Intrinsic::nvvm_read_ptx_sreg_envreg16;	 // "vvm.read.ptx.sreg.envreg16"
            case '7':	 // 1 string to match.
              return Intrinsic::nvvm_read_ptx_sreg_envreg17;	 // "vvm.read.ptx.sreg.envreg17"
            case '8':	 // 1 string to match.
              return Intrinsic::nvvm_read_ptx_sreg_envreg18;	 // "vvm.read.ptx.sreg.envreg18"
            case '9':	 // 1 string to match.
              return Intrinsic::nvvm_read_ptx_sreg_envreg19;	 // "vvm.read.ptx.sreg.envreg19"
            }
            break;
          case '2':	 // 10 strings to match.
            switch (NameR[25]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::nvvm_read_ptx_sreg_envreg20;	 // "vvm.read.ptx.sreg.envreg20"
            case '1':	 // 1 string to match.
              return Intrinsic::nvvm_read_ptx_sreg_envreg21;	 // "vvm.read.ptx.sreg.envreg21"
            case '2':	 // 1 string to match.
              return Intrinsic::nvvm_read_ptx_sreg_envreg22;	 // "vvm.read.ptx.sreg.envreg22"
            case '3':	 // 1 string to match.
              return Intrinsic::nvvm_read_ptx_sreg_envreg23;	 // "vvm.read.ptx.sreg.envreg23"
            case '4':	 // 1 string to match.
              return Intrinsic::nvvm_read_ptx_sreg_envreg24;	 // "vvm.read.ptx.sreg.envreg24"
            case '5':	 // 1 string to match.
              return Intrinsic::nvvm_read_ptx_sreg_envreg25;	 // "vvm.read.ptx.sreg.envreg25"
            case '6':	 // 1 string to match.
              return Intrinsic::nvvm_read_ptx_sreg_envreg26;	 // "vvm.read.ptx.sreg.envreg26"
            case '7':	 // 1 string to match.
              return Intrinsic::nvvm_read_ptx_sreg_envreg27;	 // "vvm.read.ptx.sreg.envreg27"
            case '8':	 // 1 string to match.
              return Intrinsic::nvvm_read_ptx_sreg_envreg28;	 // "vvm.read.ptx.sreg.envreg28"
            case '9':	 // 1 string to match.
              return Intrinsic::nvvm_read_ptx_sreg_envreg29;	 // "vvm.read.ptx.sreg.envreg29"
            }
            break;
          case '3':	 // 2 strings to match.
            switch (NameR[25]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::nvvm_read_ptx_sreg_envreg30;	 // "vvm.read.ptx.sreg.envreg30"
            case '1':	 // 1 string to match.
              return Intrinsic::nvvm_read_ptx_sreg_envreg31;	 // "vvm.read.ptx.sreg.envreg31"
            }
            break;
          }
          break;
        case 'n':	 // 3 strings to match.
          if (memcmp(NameR.data()+19, "ctaid.", 6))
            break;
          switch (NameR[25]) {
          default: break;
          case 'x':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_nctaid_x;	 // "vvm.read.ptx.sreg.nctaid.x"
          case 'y':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_nctaid_y;	 // "vvm.read.ptx.sreg.nctaid.y"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_nctaid_z;	 // "vvm.read.ptx.sreg.nctaid.z"
          }
          break;
        case 'w':	 // 1 string to match.
          if (memcmp(NameR.data()+19, "arpsize", 7))
            break;
          return Intrinsic::nvvm_read_ptx_sreg_warpsize;	 // "vvm.read.ptx.sreg.warpsize"
        }
        break;
      case 's':	 // 14 strings to match.
        if (memcmp(NameR.data()+5, "uld.", 4))
          break;
        switch (NameR[9]) {
        default: break;
        case '1':	 // 7 strings to match.
          if (memcmp(NameR.data()+10, "d.array.i", 9))
            break;
          switch (NameR[19]) {
          default: break;
          case '1':	 // 2 strings to match.
            if (memcmp(NameR.data()+20, "6.", 2))
              break;
            switch (NameR[22]) {
            default: break;
            case 't':	 // 1 string to match.
              if (memcmp(NameR.data()+23, "rap", 3))
                break;
              return Intrinsic::nvvm_suld_1d_array_i16_trap;	 // "vvm.suld.1d.array.i16.trap"
            case 'z':	 // 1 string to match.
              if (memcmp(NameR.data()+23, "ero", 3))
                break;
              return Intrinsic::nvvm_suld_1d_array_i16_zero;	 // "vvm.suld.1d.array.i16.zero"
            }
            break;
          case '3':	 // 2 strings to match.
            if (memcmp(NameR.data()+20, "2.", 2))
              break;
            switch (NameR[22]) {
            default: break;
            case 't':	 // 1 string to match.
              if (memcmp(NameR.data()+23, "rap", 3))
                break;
              return Intrinsic::nvvm_suld_1d_array_i32_trap;	 // "vvm.suld.1d.array.i32.trap"
            case 'z':	 // 1 string to match.
              if (memcmp(NameR.data()+23, "ero", 3))
                break;
              return Intrinsic::nvvm_suld_1d_array_i32_zero;	 // "vvm.suld.1d.array.i32.zero"
            }
            break;
          case '6':	 // 2 strings to match.
            if (memcmp(NameR.data()+20, "4.", 2))
              break;
            switch (NameR[22]) {
            default: break;
            case 't':	 // 1 string to match.
              if (memcmp(NameR.data()+23, "rap", 3))
                break;
              return Intrinsic::nvvm_suld_1d_array_i64_trap;	 // "vvm.suld.1d.array.i64.trap"
            case 'z':	 // 1 string to match.
              if (memcmp(NameR.data()+23, "ero", 3))
                break;
              return Intrinsic::nvvm_suld_1d_array_i64_zero;	 // "vvm.suld.1d.array.i64.zero"
            }
            break;
          case '8':	 // 1 string to match.
            if (memcmp(NameR.data()+20, ".clamp", 6))
              break;
            return Intrinsic::nvvm_suld_1d_array_i8_clamp;	 // "vvm.suld.1d.array.i8.clamp"
          }
          break;
        case '2':	 // 7 strings to match.
          if (memcmp(NameR.data()+10, "d.array.i", 9))
            break;
          switch (NameR[19]) {
          default: break;
          case '1':	 // 2 strings to match.
            if (memcmp(NameR.data()+20, "6.", 2))
              break;
            switch (NameR[22]) {
            default: break;
            case 't':	 // 1 string to match.
              if (memcmp(NameR.data()+23, "rap", 3))
                break;
              return Intrinsic::nvvm_suld_2d_array_i16_trap;	 // "vvm.suld.2d.array.i16.trap"
            case 'z':	 // 1 string to match.
              if (memcmp(NameR.data()+23, "ero", 3))
                break;
              return Intrinsic::nvvm_suld_2d_array_i16_zero;	 // "vvm.suld.2d.array.i16.zero"
            }
            break;
          case '3':	 // 2 strings to match.
            if (memcmp(NameR.data()+20, "2.", 2))
              break;
            switch (NameR[22]) {
            default: break;
            case 't':	 // 1 string to match.
              if (memcmp(NameR.data()+23, "rap", 3))
                break;
              return Intrinsic::nvvm_suld_2d_array_i32_trap;	 // "vvm.suld.2d.array.i32.trap"
            case 'z':	 // 1 string to match.
              if (memcmp(NameR.data()+23, "ero", 3))
                break;
              return Intrinsic::nvvm_suld_2d_array_i32_zero;	 // "vvm.suld.2d.array.i32.zero"
            }
            break;
          case '6':	 // 2 strings to match.
            if (memcmp(NameR.data()+20, "4.", 2))
              break;
            switch (NameR[22]) {
            default: break;
            case 't':	 // 1 string to match.
              if (memcmp(NameR.data()+23, "rap", 3))
                break;
              return Intrinsic::nvvm_suld_2d_array_i64_trap;	 // "vvm.suld.2d.array.i64.trap"
            case 'z':	 // 1 string to match.
              if (memcmp(NameR.data()+23, "ero", 3))
                break;
              return Intrinsic::nvvm_suld_2d_array_i64_zero;	 // "vvm.suld.2d.array.i64.zero"
            }
            break;
          case '8':	 // 1 string to match.
            if (memcmp(NameR.data()+20, ".clamp", 6))
              break;
            return Intrinsic::nvvm_suld_2d_array_i8_clamp;	 // "vvm.suld.2d.array.i8.clamp"
          }
          break;
        }
        break;
      case 't':	 // 21 strings to match.
        if (memcmp(NameR.data()+5, "ex.", 3))
          break;
        switch (NameR[8]) {
        default: break;
        case '1':	 // 9 strings to match.
          if (memcmp(NameR.data()+9, "d.", 2))
            break;
          switch (NameR[11]) {
          default: break;
          case 'a':	 // 6 strings to match.
            if (memcmp(NameR.data()+12, "rray.v4", 7))
              break;
            switch (NameR[19]) {
            default: break;
            case 'f':	 // 2 strings to match.
              if (memcmp(NameR.data()+20, "32.", 3))
                break;
              switch (NameR[23]) {
              default: break;
              case 'f':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_1d_array_v4f32_f32;	 // "vvm.tex.1d.array.v4f32.f32"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_1d_array_v4f32_s32;	 // "vvm.tex.1d.array.v4f32.s32"
              }
              break;
            case 's':	 // 2 strings to match.
              if (memcmp(NameR.data()+20, "32.", 3))
                break;
              switch (NameR[23]) {
              default: break;
              case 'f':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_1d_array_v4s32_f32;	 // "vvm.tex.1d.array.v4s32.f32"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_1d_array_v4s32_s32;	 // "vvm.tex.1d.array.v4s32.s32"
              }
              break;
            case 'u':	 // 2 strings to match.
              if (memcmp(NameR.data()+20, "32.", 3))
                break;
              switch (NameR[23]) {
              default: break;
              case 'f':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_1d_array_v4u32_f32;	 // "vvm.tex.1d.array.v4u32.f32"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_1d_array_v4u32_s32;	 // "vvm.tex.1d.array.v4u32.s32"
              }
              break;
            }
            break;
          case 'l':	 // 3 strings to match.
            if (memcmp(NameR.data()+12, "evel.v4", 7))
              break;
            switch (NameR[19]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+20, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_1d_level_v4f32_f32;	 // "vvm.tex.1d.level.v4f32.f32"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+20, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_1d_level_v4s32_f32;	 // "vvm.tex.1d.level.v4s32.f32"
            case 'u':	 // 1 string to match.
              if (memcmp(NameR.data()+20, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_1d_level_v4u32_f32;	 // "vvm.tex.1d.level.v4u32.f32"
            }
            break;
          }
          break;
        case '2':	 // 9 strings to match.
          if (memcmp(NameR.data()+9, "d.", 2))
            break;
          switch (NameR[11]) {
          default: break;
          case 'a':	 // 6 strings to match.
            if (memcmp(NameR.data()+12, "rray.v4", 7))
              break;
            switch (NameR[19]) {
            default: break;
            case 'f':	 // 2 strings to match.
              if (memcmp(NameR.data()+20, "32.", 3))
                break;
              switch (NameR[23]) {
              default: break;
              case 'f':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_2d_array_v4f32_f32;	 // "vvm.tex.2d.array.v4f32.f32"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_2d_array_v4f32_s32;	 // "vvm.tex.2d.array.v4f32.s32"
              }
              break;
            case 's':	 // 2 strings to match.
              if (memcmp(NameR.data()+20, "32.", 3))
                break;
              switch (NameR[23]) {
              default: break;
              case 'f':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_2d_array_v4s32_f32;	 // "vvm.tex.2d.array.v4s32.f32"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_2d_array_v4s32_s32;	 // "vvm.tex.2d.array.v4s32.s32"
              }
              break;
            case 'u':	 // 2 strings to match.
              if (memcmp(NameR.data()+20, "32.", 3))
                break;
              switch (NameR[23]) {
              default: break;
              case 'f':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_2d_array_v4u32_f32;	 // "vvm.tex.2d.array.v4u32.f32"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_2d_array_v4u32_s32;	 // "vvm.tex.2d.array.v4u32.s32"
              }
              break;
            }
            break;
          case 'l':	 // 3 strings to match.
            if (memcmp(NameR.data()+12, "evel.v4", 7))
              break;
            switch (NameR[19]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+20, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_2d_level_v4f32_f32;	 // "vvm.tex.2d.level.v4f32.f32"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+20, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_2d_level_v4s32_f32;	 // "vvm.tex.2d.level.v4s32.f32"
            case 'u':	 // 1 string to match.
              if (memcmp(NameR.data()+20, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_2d_level_v4u32_f32;	 // "vvm.tex.2d.level.v4u32.f32"
            }
            break;
          }
          break;
        case '3':	 // 3 strings to match.
          if (memcmp(NameR.data()+9, "d.level.v4", 10))
            break;
          switch (NameR[19]) {
          default: break;
          case 'f':	 // 1 string to match.
            if (memcmp(NameR.data()+20, "32.f32", 6))
              break;
            return Intrinsic::nvvm_tex_3d_level_v4f32_f32;	 // "vvm.tex.3d.level.v4f32.f32"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+20, "32.f32", 6))
              break;
            return Intrinsic::nvvm_tex_3d_level_v4s32_f32;	 // "vvm.tex.3d.level.v4s32.f32"
          case 'u':	 // 1 string to match.
            if (memcmp(NameR.data()+20, "32.f32", 6))
              break;
            return Intrinsic::nvvm_tex_3d_level_v4u32_f32;	 // "vvm.tex.3d.level.v4u32.f32"
          }
          break;
        }
        break;
      }
      break;
    case 27:	 // 20 strings to match.
      if (memcmp(NameR.data()+0, "vvm.su", 6))
        break;
      switch (NameR[6]) {
      default: break;
      case 'l':	 // 14 strings to match.
        if (memcmp(NameR.data()+7, "d.", 2))
          break;
        switch (NameR[9]) {
        default: break;
        case '1':	 // 7 strings to match.
          if (memcmp(NameR.data()+10, "d.array.", 8))
            break;
          switch (NameR[18]) {
          default: break;
          case 'i':	 // 3 strings to match.
            switch (NameR[19]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(NameR.data()+20, "6.clamp", 7))
                break;
              return Intrinsic::nvvm_suld_1d_array_i16_clamp;	 // "vvm.suld.1d.array.i16.clamp"
            case '3':	 // 1 string to match.
              if (memcmp(NameR.data()+20, "2.clamp", 7))
                break;
              return Intrinsic::nvvm_suld_1d_array_i32_clamp;	 // "vvm.suld.1d.array.i32.clamp"
            case '6':	 // 1 string to match.
              if (memcmp(NameR.data()+20, "4.clamp", 7))
                break;
              return Intrinsic::nvvm_suld_1d_array_i64_clamp;	 // "vvm.suld.1d.array.i64.clamp"
            }
            break;
          case 'v':	 // 4 strings to match.
            switch (NameR[19]) {
            default: break;
            case '2':	 // 2 strings to match.
              if (memcmp(NameR.data()+20, "i8.", 3))
                break;
              switch (NameR[23]) {
              default: break;
              case 't':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "rap", 3))
                  break;
                return Intrinsic::nvvm_suld_1d_array_v2i8_trap;	 // "vvm.suld.1d.array.v2i8.trap"
              case 'z':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "ero", 3))
                  break;
                return Intrinsic::nvvm_suld_1d_array_v2i8_zero;	 // "vvm.suld.1d.array.v2i8.zero"
              }
              break;
            case '4':	 // 2 strings to match.
              if (memcmp(NameR.data()+20, "i8.", 3))
                break;
              switch (NameR[23]) {
              default: break;
              case 't':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "rap", 3))
                  break;
                return Intrinsic::nvvm_suld_1d_array_v4i8_trap;	 // "vvm.suld.1d.array.v4i8.trap"
              case 'z':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "ero", 3))
                  break;
                return Intrinsic::nvvm_suld_1d_array_v4i8_zero;	 // "vvm.suld.1d.array.v4i8.zero"
              }
              break;
            }
            break;
          }
          break;
        case '2':	 // 7 strings to match.
          if (memcmp(NameR.data()+10, "d.array.", 8))
            break;
          switch (NameR[18]) {
          default: break;
          case 'i':	 // 3 strings to match.
            switch (NameR[19]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(NameR.data()+20, "6.clamp", 7))
                break;
              return Intrinsic::nvvm_suld_2d_array_i16_clamp;	 // "vvm.suld.2d.array.i16.clamp"
            case '3':	 // 1 string to match.
              if (memcmp(NameR.data()+20, "2.clamp", 7))
                break;
              return Intrinsic::nvvm_suld_2d_array_i32_clamp;	 // "vvm.suld.2d.array.i32.clamp"
            case '6':	 // 1 string to match.
              if (memcmp(NameR.data()+20, "4.clamp", 7))
                break;
              return Intrinsic::nvvm_suld_2d_array_i64_clamp;	 // "vvm.suld.2d.array.i64.clamp"
            }
            break;
          case 'v':	 // 4 strings to match.
            switch (NameR[19]) {
            default: break;
            case '2':	 // 2 strings to match.
              if (memcmp(NameR.data()+20, "i8.", 3))
                break;
              switch (NameR[23]) {
              default: break;
              case 't':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "rap", 3))
                  break;
                return Intrinsic::nvvm_suld_2d_array_v2i8_trap;	 // "vvm.suld.2d.array.v2i8.trap"
              case 'z':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "ero", 3))
                  break;
                return Intrinsic::nvvm_suld_2d_array_v2i8_zero;	 // "vvm.suld.2d.array.v2i8.zero"
              }
              break;
            case '4':	 // 2 strings to match.
              if (memcmp(NameR.data()+20, "i8.", 3))
                break;
              switch (NameR[23]) {
              default: break;
              case 't':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "rap", 3))
                  break;
                return Intrinsic::nvvm_suld_2d_array_v4i8_trap;	 // "vvm.suld.2d.array.v4i8.trap"
              case 'z':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "ero", 3))
                  break;
                return Intrinsic::nvvm_suld_2d_array_v4i8_zero;	 // "vvm.suld.2d.array.v4i8.zero"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 's':	 // 6 strings to match.
        if (memcmp(NameR.data()+7, "t.", 2))
          break;
        switch (NameR[9]) {
        default: break;
        case 'b':	 // 4 strings to match.
          if (NameR[10] != '.')
            break;
          switch (NameR[11]) {
          default: break;
          case '1':	 // 2 strings to match.
            if (memcmp(NameR.data()+12, "d.array.i8.", 11))
              break;
            switch (NameR[23]) {
            default: break;
            case 't':	 // 1 string to match.
              if (memcmp(NameR.data()+24, "rap", 3))
                break;
              return Intrinsic::nvvm_sust_b_1d_array_i8_trap;	 // "vvm.sust.b.1d.array.i8.trap"
            case 'z':	 // 1 string to match.
              if (memcmp(NameR.data()+24, "ero", 3))
                break;
              return Intrinsic::nvvm_sust_b_1d_array_i8_zero;	 // "vvm.sust.b.1d.array.i8.zero"
            }
            break;
          case '2':	 // 2 strings to match.
            if (memcmp(NameR.data()+12, "d.array.i8.", 11))
              break;
            switch (NameR[23]) {
            default: break;
            case 't':	 // 1 string to match.
              if (memcmp(NameR.data()+24, "rap", 3))
                break;
              return Intrinsic::nvvm_sust_b_2d_array_i8_trap;	 // "vvm.sust.b.2d.array.i8.trap"
            case 'z':	 // 1 string to match.
              if (memcmp(NameR.data()+24, "ero", 3))
                break;
              return Intrinsic::nvvm_sust_b_2d_array_i8_zero;	 // "vvm.sust.b.2d.array.i8.zero"
            }
            break;
          }
          break;
        case 'p':	 // 2 strings to match.
          if (NameR[10] != '.')
            break;
          switch (NameR[11]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(NameR.data()+12, "d.array.i8.trap", 15))
              break;
            return Intrinsic::nvvm_sust_p_1d_array_i8_trap;	 // "vvm.sust.p.1d.array.i8.trap"
          case '2':	 // 1 string to match.
            if (memcmp(NameR.data()+12, "d.array.i8.trap", 15))
              break;
            return Intrinsic::nvvm_sust_p_2d_array_i8_trap;	 // "vvm.sust.p.2d.array.i8.trap"
          }
          break;
        }
        break;
      }
      break;
    case 28:	 // 66 strings to match.
      if (memcmp(NameR.data()+0, "vvm.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 's':	 // 42 strings to match.
        if (NameR[5] != 'u')
          break;
        switch (NameR[6]) {
        default: break;
        case 'l':	 // 24 strings to match.
          if (memcmp(NameR.data()+7, "d.", 2))
            break;
          switch (NameR[9]) {
          default: break;
          case '1':	 // 12 strings to match.
            if (memcmp(NameR.data()+10, "d.array.v", 9))
              break;
            switch (NameR[19]) {
            default: break;
            case '2':	 // 7 strings to match.
              if (NameR[20] != 'i')
                break;
              switch (NameR[21]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+22, "6.", 2))
                  break;
                switch (NameR[24]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_1d_array_v2i16_trap;	 // "vvm.suld.1d.array.v2i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_1d_array_v2i16_zero;	 // "vvm.suld.1d.array.v2i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+22, "2.", 2))
                  break;
                switch (NameR[24]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_1d_array_v2i32_trap;	 // "vvm.suld.1d.array.v2i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_1d_array_v2i32_zero;	 // "vvm.suld.1d.array.v2i32.zero"
                }
                break;
              case '6':	 // 2 strings to match.
                if (memcmp(NameR.data()+22, "4.", 2))
                  break;
                switch (NameR[24]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_1d_array_v2i64_trap;	 // "vvm.suld.1d.array.v2i64.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_1d_array_v2i64_zero;	 // "vvm.suld.1d.array.v2i64.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+22, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_suld_1d_array_v2i8_clamp;	 // "vvm.suld.1d.array.v2i8.clamp"
              }
              break;
            case '4':	 // 5 strings to match.
              if (NameR[20] != 'i')
                break;
              switch (NameR[21]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+22, "6.", 2))
                  break;
                switch (NameR[24]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_1d_array_v4i16_trap;	 // "vvm.suld.1d.array.v4i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_1d_array_v4i16_zero;	 // "vvm.suld.1d.array.v4i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+22, "2.", 2))
                  break;
                switch (NameR[24]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_1d_array_v4i32_trap;	 // "vvm.suld.1d.array.v4i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_1d_array_v4i32_zero;	 // "vvm.suld.1d.array.v4i32.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+22, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_suld_1d_array_v4i8_clamp;	 // "vvm.suld.1d.array.v4i8.clamp"
              }
              break;
            }
            break;
          case '2':	 // 12 strings to match.
            if (memcmp(NameR.data()+10, "d.array.v", 9))
              break;
            switch (NameR[19]) {
            default: break;
            case '2':	 // 7 strings to match.
              if (NameR[20] != 'i')
                break;
              switch (NameR[21]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+22, "6.", 2))
                  break;
                switch (NameR[24]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_2d_array_v2i16_trap;	 // "vvm.suld.2d.array.v2i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_2d_array_v2i16_zero;	 // "vvm.suld.2d.array.v2i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+22, "2.", 2))
                  break;
                switch (NameR[24]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_2d_array_v2i32_trap;	 // "vvm.suld.2d.array.v2i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_2d_array_v2i32_zero;	 // "vvm.suld.2d.array.v2i32.zero"
                }
                break;
              case '6':	 // 2 strings to match.
                if (memcmp(NameR.data()+22, "4.", 2))
                  break;
                switch (NameR[24]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_2d_array_v2i64_trap;	 // "vvm.suld.2d.array.v2i64.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_2d_array_v2i64_zero;	 // "vvm.suld.2d.array.v2i64.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+22, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_suld_2d_array_v2i8_clamp;	 // "vvm.suld.2d.array.v2i8.clamp"
              }
              break;
            case '4':	 // 5 strings to match.
              if (NameR[20] != 'i')
                break;
              switch (NameR[21]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+22, "6.", 2))
                  break;
                switch (NameR[24]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_2d_array_v4i16_trap;	 // "vvm.suld.2d.array.v4i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_2d_array_v4i16_zero;	 // "vvm.suld.2d.array.v4i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+22, "2.", 2))
                  break;
                switch (NameR[24]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "rap", 3))
                    break;
                  return Intrinsic::nvvm_suld_2d_array_v4i32_trap;	 // "vvm.suld.2d.array.v4i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "ero", 3))
                    break;
                  return Intrinsic::nvvm_suld_2d_array_v4i32_zero;	 // "vvm.suld.2d.array.v4i32.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+22, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_suld_2d_array_v4i8_clamp;	 // "vvm.suld.2d.array.v4i8.clamp"
              }
              break;
            }
            break;
          }
          break;
        case 's':	 // 18 strings to match.
          if (memcmp(NameR.data()+7, "t.", 2))
            break;
          switch (NameR[9]) {
          default: break;
          case 'b':	 // 14 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case '1':	 // 7 strings to match.
              if (memcmp(NameR.data()+12, "d.array.i", 9))
                break;
              switch (NameR[21]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+22, "6.", 2))
                  break;
                switch (NameR[24]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_array_i16_trap;	 // "vvm.sust.b.1d.array.i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_array_i16_zero;	 // "vvm.sust.b.1d.array.i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+22, "2.", 2))
                  break;
                switch (NameR[24]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_array_i32_trap;	 // "vvm.sust.b.1d.array.i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_array_i32_zero;	 // "vvm.sust.b.1d.array.i32.zero"
                }
                break;
              case '6':	 // 2 strings to match.
                if (memcmp(NameR.data()+22, "4.", 2))
                  break;
                switch (NameR[24]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_array_i64_trap;	 // "vvm.sust.b.1d.array.i64.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_array_i64_zero;	 // "vvm.sust.b.1d.array.i64.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+22, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_sust_b_1d_array_i8_clamp;	 // "vvm.sust.b.1d.array.i8.clamp"
              }
              break;
            case '2':	 // 7 strings to match.
              if (memcmp(NameR.data()+12, "d.array.i", 9))
                break;
              switch (NameR[21]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+22, "6.", 2))
                  break;
                switch (NameR[24]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_array_i16_trap;	 // "vvm.sust.b.2d.array.i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_array_i16_zero;	 // "vvm.sust.b.2d.array.i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+22, "2.", 2))
                  break;
                switch (NameR[24]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_array_i32_trap;	 // "vvm.sust.b.2d.array.i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_array_i32_zero;	 // "vvm.sust.b.2d.array.i32.zero"
                }
                break;
              case '6':	 // 2 strings to match.
                if (memcmp(NameR.data()+22, "4.", 2))
                  break;
                switch (NameR[24]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_array_i64_trap;	 // "vvm.sust.b.2d.array.i64.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+25, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_array_i64_zero;	 // "vvm.sust.b.2d.array.i64.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+22, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_sust_b_2d_array_i8_clamp;	 // "vvm.sust.b.2d.array.i8.clamp"
              }
              break;
            }
            break;
          case 'p':	 // 4 strings to match.
            if (NameR[10] != '.')
              break;
            switch (NameR[11]) {
            default: break;
            case '1':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "d.array.i", 9))
                break;
              switch (NameR[21]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+22, "6.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_1d_array_i16_trap;	 // "vvm.sust.p.1d.array.i16.trap"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+22, "2.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_1d_array_i32_trap;	 // "vvm.sust.p.1d.array.i32.trap"
              }
              break;
            case '2':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "d.array.i", 9))
                break;
              switch (NameR[21]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+22, "6.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_2d_array_i16_trap;	 // "vvm.sust.p.2d.array.i16.trap"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+22, "2.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_2d_array_i32_trap;	 // "vvm.sust.p.2d.array.i32.trap"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 't':	 // 24 strings to match.
        if (memcmp(NameR.data()+5, "ex.", 3))
          break;
        switch (NameR[8]) {
        default: break;
        case 'c':	 // 6 strings to match.
          if (memcmp(NameR.data()+9, "ube.", 4))
            break;
          switch (NameR[13]) {
          default: break;
          case 'a':	 // 3 strings to match.
            if (memcmp(NameR.data()+14, "rray.v4", 7))
              break;
            switch (NameR[21]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+22, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_cube_array_v4f32_f32;	 // "vvm.tex.cube.array.v4f32.f32"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+22, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_cube_array_v4s32_f32;	 // "vvm.tex.cube.array.v4s32.f32"
            case 'u':	 // 1 string to match.
              if (memcmp(NameR.data()+22, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_cube_array_v4u32_f32;	 // "vvm.tex.cube.array.v4u32.f32"
            }
            break;
          case 'l':	 // 3 strings to match.
            if (memcmp(NameR.data()+14, "evel.v4", 7))
              break;
            switch (NameR[21]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+22, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_cube_level_v4f32_f32;	 // "vvm.tex.cube.level.v4f32.f32"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+22, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_cube_level_v4s32_f32;	 // "vvm.tex.cube.level.v4s32.f32"
            case 'u':	 // 1 string to match.
              if (memcmp(NameR.data()+22, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_cube_level_v4u32_f32;	 // "vvm.tex.cube.level.v4u32.f32"
            }
            break;
          }
          break;
        case 'u':	 // 18 strings to match.
          if (memcmp(NameR.data()+9, "nified.", 7))
            break;
          switch (NameR[16]) {
          default: break;
          case '1':	 // 6 strings to match.
            if (memcmp(NameR.data()+17, "d.v4", 4))
              break;
            switch (NameR[21]) {
            default: break;
            case 'f':	 // 2 strings to match.
              if (memcmp(NameR.data()+22, "32.", 3))
                break;
              switch (NameR[25]) {
              default: break;
              case 'f':	 // 1 string to match.
                if (memcmp(NameR.data()+26, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_1d_v4f32_f32;	 // "vvm.tex.unified.1d.v4f32.f32"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+26, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_1d_v4f32_s32;	 // "vvm.tex.unified.1d.v4f32.s32"
              }
              break;
            case 's':	 // 2 strings to match.
              if (memcmp(NameR.data()+22, "32.", 3))
                break;
              switch (NameR[25]) {
              default: break;
              case 'f':	 // 1 string to match.
                if (memcmp(NameR.data()+26, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_1d_v4s32_f32;	 // "vvm.tex.unified.1d.v4s32.f32"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+26, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_1d_v4s32_s32;	 // "vvm.tex.unified.1d.v4s32.s32"
              }
              break;
            case 'u':	 // 2 strings to match.
              if (memcmp(NameR.data()+22, "32.", 3))
                break;
              switch (NameR[25]) {
              default: break;
              case 'f':	 // 1 string to match.
                if (memcmp(NameR.data()+26, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_1d_v4u32_f32;	 // "vvm.tex.unified.1d.v4u32.f32"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+26, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_1d_v4u32_s32;	 // "vvm.tex.unified.1d.v4u32.s32"
              }
              break;
            }
            break;
          case '2':	 // 6 strings to match.
            if (memcmp(NameR.data()+17, "d.v4", 4))
              break;
            switch (NameR[21]) {
            default: break;
            case 'f':	 // 2 strings to match.
              if (memcmp(NameR.data()+22, "32.", 3))
                break;
              switch (NameR[25]) {
              default: break;
              case 'f':	 // 1 string to match.
                if (memcmp(NameR.data()+26, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_2d_v4f32_f32;	 // "vvm.tex.unified.2d.v4f32.f32"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+26, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_2d_v4f32_s32;	 // "vvm.tex.unified.2d.v4f32.s32"
              }
              break;
            case 's':	 // 2 strings to match.
              if (memcmp(NameR.data()+22, "32.", 3))
                break;
              switch (NameR[25]) {
              default: break;
              case 'f':	 // 1 string to match.
                if (memcmp(NameR.data()+26, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_2d_v4s32_f32;	 // "vvm.tex.unified.2d.v4s32.f32"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+26, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_2d_v4s32_s32;	 // "vvm.tex.unified.2d.v4s32.s32"
              }
              break;
            case 'u':	 // 2 strings to match.
              if (memcmp(NameR.data()+22, "32.", 3))
                break;
              switch (NameR[25]) {
              default: break;
              case 'f':	 // 1 string to match.
                if (memcmp(NameR.data()+26, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_2d_v4u32_f32;	 // "vvm.tex.unified.2d.v4u32.f32"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+26, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_2d_v4u32_s32;	 // "vvm.tex.unified.2d.v4u32.s32"
              }
              break;
            }
            break;
          case '3':	 // 6 strings to match.
            if (memcmp(NameR.data()+17, "d.v4", 4))
              break;
            switch (NameR[21]) {
            default: break;
            case 'f':	 // 2 strings to match.
              if (memcmp(NameR.data()+22, "32.", 3))
                break;
              switch (NameR[25]) {
              default: break;
              case 'f':	 // 1 string to match.
                if (memcmp(NameR.data()+26, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_3d_v4f32_f32;	 // "vvm.tex.unified.3d.v4f32.f32"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+26, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_3d_v4f32_s32;	 // "vvm.tex.unified.3d.v4f32.s32"
              }
              break;
            case 's':	 // 2 strings to match.
              if (memcmp(NameR.data()+22, "32.", 3))
                break;
              switch (NameR[25]) {
              default: break;
              case 'f':	 // 1 string to match.
                if (memcmp(NameR.data()+26, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_3d_v4s32_f32;	 // "vvm.tex.unified.3d.v4s32.f32"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+26, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_3d_v4s32_s32;	 // "vvm.tex.unified.3d.v4s32.s32"
              }
              break;
            case 'u':	 // 2 strings to match.
              if (memcmp(NameR.data()+22, "32.", 3))
                break;
              switch (NameR[25]) {
              default: break;
              case 'f':	 // 1 string to match.
                if (memcmp(NameR.data()+26, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_3d_v4u32_f32;	 // "vvm.tex.unified.3d.v4u32.f32"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+26, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_3d_v4u32_s32;	 // "vvm.tex.unified.3d.v4u32.s32"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 29:	 // 28 strings to match.
      if (memcmp(NameR.data()+0, "vvm.su", 6))
        break;
      switch (NameR[6]) {
      default: break;
      case 'l':	 // 10 strings to match.
        if (memcmp(NameR.data()+7, "d.", 2))
          break;
        switch (NameR[9]) {
        default: break;
        case '1':	 // 5 strings to match.
          if (memcmp(NameR.data()+10, "d.array.v", 9))
            break;
          switch (NameR[19]) {
          default: break;
          case '2':	 // 3 strings to match.
            if (NameR[20] != 'i')
              break;
            switch (NameR[21]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(NameR.data()+22, "6.clamp", 7))
                break;
              return Intrinsic::nvvm_suld_1d_array_v2i16_clamp;	 // "vvm.suld.1d.array.v2i16.clamp"
            case '3':	 // 1 string to match.
              if (memcmp(NameR.data()+22, "2.clamp", 7))
                break;
              return Intrinsic::nvvm_suld_1d_array_v2i32_clamp;	 // "vvm.suld.1d.array.v2i32.clamp"
            case '6':	 // 1 string to match.
              if (memcmp(NameR.data()+22, "4.clamp", 7))
                break;
              return Intrinsic::nvvm_suld_1d_array_v2i64_clamp;	 // "vvm.suld.1d.array.v2i64.clamp"
            }
            break;
          case '4':	 // 2 strings to match.
            if (NameR[20] != 'i')
              break;
            switch (NameR[21]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(NameR.data()+22, "6.clamp", 7))
                break;
              return Intrinsic::nvvm_suld_1d_array_v4i16_clamp;	 // "vvm.suld.1d.array.v4i16.clamp"
            case '3':	 // 1 string to match.
              if (memcmp(NameR.data()+22, "2.clamp", 7))
                break;
              return Intrinsic::nvvm_suld_1d_array_v4i32_clamp;	 // "vvm.suld.1d.array.v4i32.clamp"
            }
            break;
          }
          break;
        case '2':	 // 5 strings to match.
          if (memcmp(NameR.data()+10, "d.array.v", 9))
            break;
          switch (NameR[19]) {
          default: break;
          case '2':	 // 3 strings to match.
            if (NameR[20] != 'i')
              break;
            switch (NameR[21]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(NameR.data()+22, "6.clamp", 7))
                break;
              return Intrinsic::nvvm_suld_2d_array_v2i16_clamp;	 // "vvm.suld.2d.array.v2i16.clamp"
            case '3':	 // 1 string to match.
              if (memcmp(NameR.data()+22, "2.clamp", 7))
                break;
              return Intrinsic::nvvm_suld_2d_array_v2i32_clamp;	 // "vvm.suld.2d.array.v2i32.clamp"
            case '6':	 // 1 string to match.
              if (memcmp(NameR.data()+22, "4.clamp", 7))
                break;
              return Intrinsic::nvvm_suld_2d_array_v2i64_clamp;	 // "vvm.suld.2d.array.v2i64.clamp"
            }
            break;
          case '4':	 // 2 strings to match.
            if (NameR[20] != 'i')
              break;
            switch (NameR[21]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(NameR.data()+22, "6.clamp", 7))
                break;
              return Intrinsic::nvvm_suld_2d_array_v4i16_clamp;	 // "vvm.suld.2d.array.v4i16.clamp"
            case '3':	 // 1 string to match.
              if (memcmp(NameR.data()+22, "2.clamp", 7))
                break;
              return Intrinsic::nvvm_suld_2d_array_v4i32_clamp;	 // "vvm.suld.2d.array.v4i32.clamp"
            }
            break;
          }
          break;
        }
        break;
      case 's':	 // 18 strings to match.
        if (memcmp(NameR.data()+7, "t.", 2))
          break;
        switch (NameR[9]) {
        default: break;
        case 'b':	 // 14 strings to match.
          if (NameR[10] != '.')
            break;
          switch (NameR[11]) {
          default: break;
          case '1':	 // 7 strings to match.
            if (memcmp(NameR.data()+12, "d.array.", 8))
              break;
            switch (NameR[20]) {
            default: break;
            case 'i':	 // 3 strings to match.
              switch (NameR[21]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+22, "6.clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_1d_array_i16_clamp;	 // "vvm.sust.b.1d.array.i16.clamp"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+22, "2.clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_1d_array_i32_clamp;	 // "vvm.sust.b.1d.array.i32.clamp"
              case '6':	 // 1 string to match.
                if (memcmp(NameR.data()+22, "4.clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_1d_array_i64_clamp;	 // "vvm.sust.b.1d.array.i64.clamp"
              }
              break;
            case 'v':	 // 4 strings to match.
              switch (NameR[21]) {
              default: break;
              case '2':	 // 2 strings to match.
                if (memcmp(NameR.data()+22, "i8.", 3))
                  break;
                switch (NameR[25]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+26, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_array_v2i8_trap;	 // "vvm.sust.b.1d.array.v2i8.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+26, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_array_v2i8_zero;	 // "vvm.sust.b.1d.array.v2i8.zero"
                }
                break;
              case '4':	 // 2 strings to match.
                if (memcmp(NameR.data()+22, "i8.", 3))
                  break;
                switch (NameR[25]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+26, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_array_v4i8_trap;	 // "vvm.sust.b.1d.array.v4i8.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+26, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_array_v4i8_zero;	 // "vvm.sust.b.1d.array.v4i8.zero"
                }
                break;
              }
              break;
            }
            break;
          case '2':	 // 7 strings to match.
            if (memcmp(NameR.data()+12, "d.array.", 8))
              break;
            switch (NameR[20]) {
            default: break;
            case 'i':	 // 3 strings to match.
              switch (NameR[21]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+22, "6.clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_2d_array_i16_clamp;	 // "vvm.sust.b.2d.array.i16.clamp"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+22, "2.clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_2d_array_i32_clamp;	 // "vvm.sust.b.2d.array.i32.clamp"
              case '6':	 // 1 string to match.
                if (memcmp(NameR.data()+22, "4.clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_2d_array_i64_clamp;	 // "vvm.sust.b.2d.array.i64.clamp"
              }
              break;
            case 'v':	 // 4 strings to match.
              switch (NameR[21]) {
              default: break;
              case '2':	 // 2 strings to match.
                if (memcmp(NameR.data()+22, "i8.", 3))
                  break;
                switch (NameR[25]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+26, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_array_v2i8_trap;	 // "vvm.sust.b.2d.array.v2i8.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+26, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_array_v2i8_zero;	 // "vvm.sust.b.2d.array.v2i8.zero"
                }
                break;
              case '4':	 // 2 strings to match.
                if (memcmp(NameR.data()+22, "i8.", 3))
                  break;
                switch (NameR[25]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+26, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_array_v4i8_trap;	 // "vvm.sust.b.2d.array.v4i8.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+26, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_array_v4i8_zero;	 // "vvm.sust.b.2d.array.v4i8.zero"
                }
                break;
              }
              break;
            }
            break;
          }
          break;
        case 'p':	 // 4 strings to match.
          if (NameR[10] != '.')
            break;
          switch (NameR[11]) {
          default: break;
          case '1':	 // 2 strings to match.
            if (memcmp(NameR.data()+12, "d.array.v", 9))
              break;
            switch (NameR[21]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(NameR.data()+22, "i8.trap", 7))
                break;
              return Intrinsic::nvvm_sust_p_1d_array_v2i8_trap;	 // "vvm.sust.p.1d.array.v2i8.trap"
            case '4':	 // 1 string to match.
              if (memcmp(NameR.data()+22, "i8.trap", 7))
                break;
              return Intrinsic::nvvm_sust_p_1d_array_v4i8_trap;	 // "vvm.sust.p.1d.array.v4i8.trap"
            }
            break;
          case '2':	 // 2 strings to match.
            if (memcmp(NameR.data()+12, "d.array.v", 9))
              break;
            switch (NameR[21]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(NameR.data()+22, "i8.trap", 7))
                break;
              return Intrinsic::nvvm_sust_p_2d_array_v2i8_trap;	 // "vvm.sust.p.2d.array.v2i8.trap"
            case '4':	 // 1 string to match.
              if (memcmp(NameR.data()+22, "i8.trap", 7))
                break;
              return Intrinsic::nvvm_sust_p_2d_array_v4i8_trap;	 // "vvm.sust.p.2d.array.v4i8.trap"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 30:	 // 35 strings to match.
      if (memcmp(NameR.data()+0, "vvm.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 's':	 // 32 strings to match.
        if (memcmp(NameR.data()+5, "ust.", 4))
          break;
        switch (NameR[9]) {
        default: break;
        case 'b':	 // 24 strings to match.
          if (NameR[10] != '.')
            break;
          switch (NameR[11]) {
          default: break;
          case '1':	 // 12 strings to match.
            if (memcmp(NameR.data()+12, "d.array.v", 9))
              break;
            switch (NameR[21]) {
            default: break;
            case '2':	 // 7 strings to match.
              if (NameR[22] != 'i')
                break;
              switch (NameR[23]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+24, "6.", 2))
                  break;
                switch (NameR[26]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+27, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_array_v2i16_trap;	 // "vvm.sust.b.1d.array.v2i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+27, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_array_v2i16_zero;	 // "vvm.sust.b.1d.array.v2i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+24, "2.", 2))
                  break;
                switch (NameR[26]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+27, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_array_v2i32_trap;	 // "vvm.sust.b.1d.array.v2i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+27, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_array_v2i32_zero;	 // "vvm.sust.b.1d.array.v2i32.zero"
                }
                break;
              case '6':	 // 2 strings to match.
                if (memcmp(NameR.data()+24, "4.", 2))
                  break;
                switch (NameR[26]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+27, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_array_v2i64_trap;	 // "vvm.sust.b.1d.array.v2i64.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+27, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_array_v2i64_zero;	 // "vvm.sust.b.1d.array.v2i64.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+24, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_sust_b_1d_array_v2i8_clamp;	 // "vvm.sust.b.1d.array.v2i8.clamp"
              }
              break;
            case '4':	 // 5 strings to match.
              if (NameR[22] != 'i')
                break;
              switch (NameR[23]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+24, "6.", 2))
                  break;
                switch (NameR[26]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+27, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_array_v4i16_trap;	 // "vvm.sust.b.1d.array.v4i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+27, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_array_v4i16_zero;	 // "vvm.sust.b.1d.array.v4i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+24, "2.", 2))
                  break;
                switch (NameR[26]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+27, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_array_v4i32_trap;	 // "vvm.sust.b.1d.array.v4i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+27, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_array_v4i32_zero;	 // "vvm.sust.b.1d.array.v4i32.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+24, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_sust_b_1d_array_v4i8_clamp;	 // "vvm.sust.b.1d.array.v4i8.clamp"
              }
              break;
            }
            break;
          case '2':	 // 12 strings to match.
            if (memcmp(NameR.data()+12, "d.array.v", 9))
              break;
            switch (NameR[21]) {
            default: break;
            case '2':	 // 7 strings to match.
              if (NameR[22] != 'i')
                break;
              switch (NameR[23]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+24, "6.", 2))
                  break;
                switch (NameR[26]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+27, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_array_v2i16_trap;	 // "vvm.sust.b.2d.array.v2i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+27, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_array_v2i16_zero;	 // "vvm.sust.b.2d.array.v2i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+24, "2.", 2))
                  break;
                switch (NameR[26]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+27, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_array_v2i32_trap;	 // "vvm.sust.b.2d.array.v2i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+27, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_array_v2i32_zero;	 // "vvm.sust.b.2d.array.v2i32.zero"
                }
                break;
              case '6':	 // 2 strings to match.
                if (memcmp(NameR.data()+24, "4.", 2))
                  break;
                switch (NameR[26]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+27, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_array_v2i64_trap;	 // "vvm.sust.b.2d.array.v2i64.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+27, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_array_v2i64_zero;	 // "vvm.sust.b.2d.array.v2i64.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+24, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_sust_b_2d_array_v2i8_clamp;	 // "vvm.sust.b.2d.array.v2i8.clamp"
              }
              break;
            case '4':	 // 5 strings to match.
              if (NameR[22] != 'i')
                break;
              switch (NameR[23]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(NameR.data()+24, "6.", 2))
                  break;
                switch (NameR[26]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+27, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_array_v4i16_trap;	 // "vvm.sust.b.2d.array.v4i16.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+27, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_array_v4i16_zero;	 // "vvm.sust.b.2d.array.v4i16.zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(NameR.data()+24, "2.", 2))
                  break;
                switch (NameR[26]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+27, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_array_v4i32_trap;	 // "vvm.sust.b.2d.array.v4i32.trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(NameR.data()+27, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_array_v4i32_zero;	 // "vvm.sust.b.2d.array.v4i32.zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(NameR.data()+24, ".clamp", 6))
                  break;
                return Intrinsic::nvvm_sust_b_2d_array_v4i8_clamp;	 // "vvm.sust.b.2d.array.v4i8.clamp"
              }
              break;
            }
            break;
          }
          break;
        case 'p':	 // 8 strings to match.
          if (NameR[10] != '.')
            break;
          switch (NameR[11]) {
          default: break;
          case '1':	 // 4 strings to match.
            if (memcmp(NameR.data()+12, "d.array.v", 9))
              break;
            switch (NameR[21]) {
            default: break;
            case '2':	 // 2 strings to match.
              if (NameR[22] != 'i')
                break;
              switch (NameR[23]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "6.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_1d_array_v2i16_trap;	 // "vvm.sust.p.1d.array.v2i16.trap"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "2.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_1d_array_v2i32_trap;	 // "vvm.sust.p.1d.array.v2i32.trap"
              }
              break;
            case '4':	 // 2 strings to match.
              if (NameR[22] != 'i')
                break;
              switch (NameR[23]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "6.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_1d_array_v4i16_trap;	 // "vvm.sust.p.1d.array.v4i16.trap"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "2.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_1d_array_v4i32_trap;	 // "vvm.sust.p.1d.array.v4i32.trap"
              }
              break;
            }
            break;
          case '2':	 // 4 strings to match.
            if (memcmp(NameR.data()+12, "d.array.v", 9))
              break;
            switch (NameR[21]) {
            default: break;
            case '2':	 // 2 strings to match.
              if (NameR[22] != 'i')
                break;
              switch (NameR[23]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "6.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_2d_array_v2i16_trap;	 // "vvm.sust.p.2d.array.v2i16.trap"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "2.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_2d_array_v2i32_trap;	 // "vvm.sust.p.2d.array.v2i32.trap"
              }
              break;
            case '4':	 // 2 strings to match.
              if (NameR[22] != 'i')
                break;
              switch (NameR[23]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "6.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_2d_array_v4i16_trap;	 // "vvm.sust.p.2d.array.v4i16.trap"
              case '3':	 // 1 string to match.
                if (memcmp(NameR.data()+24, "2.trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_2d_array_v4i32_trap;	 // "vvm.sust.p.2d.array.v4i32.trap"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 't':	 // 3 strings to match.
        if (memcmp(NameR.data()+5, "ex.unified.cube.v4", 18))
          break;
        switch (NameR[23]) {
        default: break;
        case 'f':	 // 1 string to match.
          if (memcmp(NameR.data()+24, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_cube_v4f32_f32;	 // "vvm.tex.unified.cube.v4f32.f32"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+24, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_cube_v4s32_f32;	 // "vvm.tex.unified.cube.v4s32.f32"
        case 'u':	 // 1 string to match.
          if (memcmp(NameR.data()+24, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_cube_v4u32_f32;	 // "vvm.tex.unified.cube.v4u32.f32"
        }
        break;
      }
      break;
    case 31:	 // 28 strings to match.
      if (memcmp(NameR.data()+0, "vvm.", 4))
        break;
      switch (NameR[4]) {
      default: break;
      case 's':	 // 10 strings to match.
        if (memcmp(NameR.data()+5, "ust.b.", 6))
          break;
        switch (NameR[11]) {
        default: break;
        case '1':	 // 5 strings to match.
          if (memcmp(NameR.data()+12, "d.array.v", 9))
            break;
          switch (NameR[21]) {
          default: break;
          case '2':	 // 3 strings to match.
            if (NameR[22] != 'i')
              break;
            switch (NameR[23]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(NameR.data()+24, "6.clamp", 7))
                break;
              return Intrinsic::nvvm_sust_b_1d_array_v2i16_clamp;	 // "vvm.sust.b.1d.array.v2i16.clamp"
            case '3':	 // 1 string to match.
              if (memcmp(NameR.data()+24, "2.clamp", 7))
                break;
              return Intrinsic::nvvm_sust_b_1d_array_v2i32_clamp;	 // "vvm.sust.b.1d.array.v2i32.clamp"
            case '6':	 // 1 string to match.
              if (memcmp(NameR.data()+24, "4.clamp", 7))
                break;
              return Intrinsic::nvvm_sust_b_1d_array_v2i64_clamp;	 // "vvm.sust.b.1d.array.v2i64.clamp"
            }
            break;
          case '4':	 // 2 strings to match.
            if (NameR[22] != 'i')
              break;
            switch (NameR[23]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(NameR.data()+24, "6.clamp", 7))
                break;
              return Intrinsic::nvvm_sust_b_1d_array_v4i16_clamp;	 // "vvm.sust.b.1d.array.v4i16.clamp"
            case '3':	 // 1 string to match.
              if (memcmp(NameR.data()+24, "2.clamp", 7))
                break;
              return Intrinsic::nvvm_sust_b_1d_array_v4i32_clamp;	 // "vvm.sust.b.1d.array.v4i32.clamp"
            }
            break;
          }
          break;
        case '2':	 // 5 strings to match.
          if (memcmp(NameR.data()+12, "d.array.v", 9))
            break;
          switch (NameR[21]) {
          default: break;
          case '2':	 // 3 strings to match.
            if (NameR[22] != 'i')
              break;
            switch (NameR[23]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(NameR.data()+24, "6.clamp", 7))
                break;
              return Intrinsic::nvvm_sust_b_2d_array_v2i16_clamp;	 // "vvm.sust.b.2d.array.v2i16.clamp"
            case '3':	 // 1 string to match.
              if (memcmp(NameR.data()+24, "2.clamp", 7))
                break;
              return Intrinsic::nvvm_sust_b_2d_array_v2i32_clamp;	 // "vvm.sust.b.2d.array.v2i32.clamp"
            case '6':	 // 1 string to match.
              if (memcmp(NameR.data()+24, "4.clamp", 7))
                break;
              return Intrinsic::nvvm_sust_b_2d_array_v2i64_clamp;	 // "vvm.sust.b.2d.array.v2i64.clamp"
            }
            break;
          case '4':	 // 2 strings to match.
            if (NameR[22] != 'i')
              break;
            switch (NameR[23]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(NameR.data()+24, "6.clamp", 7))
                break;
              return Intrinsic::nvvm_sust_b_2d_array_v4i16_clamp;	 // "vvm.sust.b.2d.array.v4i16.clamp"
            case '3':	 // 1 string to match.
              if (memcmp(NameR.data()+24, "2.clamp", 7))
                break;
              return Intrinsic::nvvm_sust_b_2d_array_v4i32_clamp;	 // "vvm.sust.b.2d.array.v4i32.clamp"
            }
            break;
          }
          break;
        }
        break;
      case 't':	 // 18 strings to match.
        switch (NameR[5]) {
        default: break;
        case 'e':	 // 6 strings to match.
          if (memcmp(NameR.data()+6, "x.", 2))
            break;
          switch (NameR[8]) {
          default: break;
          case '1':	 // 3 strings to match.
            if (memcmp(NameR.data()+9, "d.array.grad.v4", 15))
              break;
            switch (NameR[24]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+25, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_1d_array_grad_v4f32_f32;	 // "vvm.tex.1d.array.grad.v4f32.f32"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+25, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_1d_array_grad_v4s32_f32;	 // "vvm.tex.1d.array.grad.v4s32.f32"
            case 'u':	 // 1 string to match.
              if (memcmp(NameR.data()+25, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_1d_array_grad_v4u32_f32;	 // "vvm.tex.1d.array.grad.v4u32.f32"
            }
            break;
          case '2':	 // 3 strings to match.
            if (memcmp(NameR.data()+9, "d.array.grad.v4", 15))
              break;
            switch (NameR[24]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+25, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_2d_array_grad_v4f32_f32;	 // "vvm.tex.2d.array.grad.v4f32.f32"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+25, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_2d_array_grad_v4s32_f32;	 // "vvm.tex.2d.array.grad.v4s32.f32"
            case 'u':	 // 1 string to match.
              if (memcmp(NameR.data()+25, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_2d_array_grad_v4u32_f32;	 // "vvm.tex.2d.array.grad.v4u32.f32"
            }
            break;
          }
          break;
        case 'l':	 // 12 strings to match.
          if (memcmp(NameR.data()+6, "d4.unified.", 11))
            break;
          switch (NameR[17]) {
          default: break;
          case 'a':	 // 3 strings to match.
            if (memcmp(NameR.data()+18, ".2d.v4", 6))
              break;
            switch (NameR[24]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+25, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tld4_unified_a_2d_v4f32_f32;	 // "vvm.tld4.unified.a.2d.v4f32.f32"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+25, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tld4_unified_a_2d_v4s32_f32;	 // "vvm.tld4.unified.a.2d.v4s32.f32"
            case 'u':	 // 1 string to match.
              if (memcmp(NameR.data()+25, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tld4_unified_a_2d_v4u32_f32;	 // "vvm.tld4.unified.a.2d.v4u32.f32"
            }
            break;
          case 'b':	 // 3 strings to match.
            if (memcmp(NameR.data()+18, ".2d.v4", 6))
              break;
            switch (NameR[24]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+25, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tld4_unified_b_2d_v4f32_f32;	 // "vvm.tld4.unified.b.2d.v4f32.f32"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+25, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tld4_unified_b_2d_v4s32_f32;	 // "vvm.tld4.unified.b.2d.v4s32.f32"
            case 'u':	 // 1 string to match.
              if (memcmp(NameR.data()+25, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tld4_unified_b_2d_v4u32_f32;	 // "vvm.tld4.unified.b.2d.v4u32.f32"
            }
            break;
          case 'g':	 // 3 strings to match.
            if (memcmp(NameR.data()+18, ".2d.v4", 6))
              break;
            switch (NameR[24]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+25, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tld4_unified_g_2d_v4f32_f32;	 // "vvm.tld4.unified.g.2d.v4f32.f32"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+25, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tld4_unified_g_2d_v4s32_f32;	 // "vvm.tld4.unified.g.2d.v4s32.f32"
            case 'u':	 // 1 string to match.
              if (memcmp(NameR.data()+25, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tld4_unified_g_2d_v4u32_f32;	 // "vvm.tld4.unified.g.2d.v4u32.f32"
            }
            break;
          case 'r':	 // 3 strings to match.
            if (memcmp(NameR.data()+18, ".2d.v4", 6))
              break;
            switch (NameR[24]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+25, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tld4_unified_r_2d_v4f32_f32;	 // "vvm.tld4.unified.r.2d.v4f32.f32"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+25, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tld4_unified_r_2d_v4s32_f32;	 // "vvm.tld4.unified.r.2d.v4s32.f32"
            case 'u':	 // 1 string to match.
              if (memcmp(NameR.data()+25, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tld4_unified_r_2d_v4u32_f32;	 // "vvm.tld4.unified.r.2d.v4u32.f32"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 32:	 // 6 strings to match.
      if (memcmp(NameR.data()+0, "vvm.tex.", 8))
        break;
      switch (NameR[8]) {
      default: break;
      case '1':	 // 3 strings to match.
        if (memcmp(NameR.data()+9, "d.array.level.v4", 16))
          break;
        switch (NameR[25]) {
        default: break;
        case 'f':	 // 1 string to match.
          if (memcmp(NameR.data()+26, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_1d_array_level_v4f32_f32;	 // "vvm.tex.1d.array.level.v4f32.f32"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+26, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_1d_array_level_v4s32_f32;	 // "vvm.tex.1d.array.level.v4s32.f32"
        case 'u':	 // 1 string to match.
          if (memcmp(NameR.data()+26, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_1d_array_level_v4u32_f32;	 // "vvm.tex.1d.array.level.v4u32.f32"
        }
        break;
      case '2':	 // 3 strings to match.
        if (memcmp(NameR.data()+9, "d.array.level.v4", 16))
          break;
        switch (NameR[25]) {
        default: break;
        case 'f':	 // 1 string to match.
          if (memcmp(NameR.data()+26, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_2d_array_level_v4f32_f32;	 // "vvm.tex.2d.array.level.v4f32.f32"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+26, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_2d_array_level_v4s32_f32;	 // "vvm.tex.2d.array.level.v4s32.f32"
        case 'u':	 // 1 string to match.
          if (memcmp(NameR.data()+26, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_2d_array_level_v4u32_f32;	 // "vvm.tex.2d.array.level.v4u32.f32"
        }
        break;
      }
      break;
    case 33:	 // 9 strings to match.
      if (memcmp(NameR.data()+0, "vvm.tex.unified.", 16))
        break;
      switch (NameR[16]) {
      default: break;
      case '1':	 // 3 strings to match.
        if (memcmp(NameR.data()+17, "d.grad.v4", 9))
          break;
        switch (NameR[26]) {
        default: break;
        case 'f':	 // 1 string to match.
          if (memcmp(NameR.data()+27, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_1d_grad_v4f32_f32;	 // "vvm.tex.unified.1d.grad.v4f32.f32"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+27, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_1d_grad_v4s32_f32;	 // "vvm.tex.unified.1d.grad.v4s32.f32"
        case 'u':	 // 1 string to match.
          if (memcmp(NameR.data()+27, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_1d_grad_v4u32_f32;	 // "vvm.tex.unified.1d.grad.v4u32.f32"
        }
        break;
      case '2':	 // 3 strings to match.
        if (memcmp(NameR.data()+17, "d.grad.v4", 9))
          break;
        switch (NameR[26]) {
        default: break;
        case 'f':	 // 1 string to match.
          if (memcmp(NameR.data()+27, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_2d_grad_v4f32_f32;	 // "vvm.tex.unified.2d.grad.v4f32.f32"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+27, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_2d_grad_v4s32_f32;	 // "vvm.tex.unified.2d.grad.v4s32.f32"
        case 'u':	 // 1 string to match.
          if (memcmp(NameR.data()+27, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_2d_grad_v4u32_f32;	 // "vvm.tex.unified.2d.grad.v4u32.f32"
        }
        break;
      case '3':	 // 3 strings to match.
        if (memcmp(NameR.data()+17, "d.grad.v4", 9))
          break;
        switch (NameR[26]) {
        default: break;
        case 'f':	 // 1 string to match.
          if (memcmp(NameR.data()+27, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_3d_grad_v4f32_f32;	 // "vvm.tex.unified.3d.grad.v4f32.f32"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+27, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_3d_grad_v4s32_f32;	 // "vvm.tex.unified.3d.grad.v4s32.f32"
        case 'u':	 // 1 string to match.
          if (memcmp(NameR.data()+27, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_3d_grad_v4u32_f32;	 // "vvm.tex.unified.3d.grad.v4u32.f32"
        }
        break;
      }
      break;
    case 34:	 // 24 strings to match.
      if (memcmp(NameR.data()+0, "vvm.tex.", 8))
        break;
      switch (NameR[8]) {
      default: break;
      case 'c':	 // 3 strings to match.
        if (memcmp(NameR.data()+9, "ube.array.level.v4", 18))
          break;
        switch (NameR[27]) {
        default: break;
        case 'f':	 // 1 string to match.
          if (memcmp(NameR.data()+28, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_cube_array_level_v4f32_f32;	 // "vvm.tex.cube.array.level.v4f32.f32"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+28, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_cube_array_level_v4s32_f32;	 // "vvm.tex.cube.array.level.v4s32.f32"
        case 'u':	 // 1 string to match.
          if (memcmp(NameR.data()+28, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_cube_array_level_v4u32_f32;	 // "vvm.tex.cube.array.level.v4u32.f32"
        }
        break;
      case 'u':	 // 21 strings to match.
        if (memcmp(NameR.data()+9, "nified.", 7))
          break;
        switch (NameR[16]) {
        default: break;
        case '1':	 // 9 strings to match.
          if (memcmp(NameR.data()+17, "d.", 2))
            break;
          switch (NameR[19]) {
          default: break;
          case 'a':	 // 6 strings to match.
            if (memcmp(NameR.data()+20, "rray.v4", 7))
              break;
            switch (NameR[27]) {
            default: break;
            case 'f':	 // 2 strings to match.
              if (memcmp(NameR.data()+28, "32.", 3))
                break;
              switch (NameR[31]) {
              default: break;
              case 'f':	 // 1 string to match.
                if (memcmp(NameR.data()+32, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_1d_array_v4f32_f32;	 // "vvm.tex.unified.1d.array.v4f32.f32"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+32, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_1d_array_v4f32_s32;	 // "vvm.tex.unified.1d.array.v4f32.s32"
              }
              break;
            case 's':	 // 2 strings to match.
              if (memcmp(NameR.data()+28, "32.", 3))
                break;
              switch (NameR[31]) {
              default: break;
              case 'f':	 // 1 string to match.
                if (memcmp(NameR.data()+32, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_1d_array_v4s32_f32;	 // "vvm.tex.unified.1d.array.v4s32.f32"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+32, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_1d_array_v4s32_s32;	 // "vvm.tex.unified.1d.array.v4s32.s32"
              }
              break;
            case 'u':	 // 2 strings to match.
              if (memcmp(NameR.data()+28, "32.", 3))
                break;
              switch (NameR[31]) {
              default: break;
              case 'f':	 // 1 string to match.
                if (memcmp(NameR.data()+32, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_1d_array_v4u32_f32;	 // "vvm.tex.unified.1d.array.v4u32.f32"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+32, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_1d_array_v4u32_s32;	 // "vvm.tex.unified.1d.array.v4u32.s32"
              }
              break;
            }
            break;
          case 'l':	 // 3 strings to match.
            if (memcmp(NameR.data()+20, "evel.v4", 7))
              break;
            switch (NameR[27]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+28, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_unified_1d_level_v4f32_f32;	 // "vvm.tex.unified.1d.level.v4f32.f32"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+28, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_unified_1d_level_v4s32_f32;	 // "vvm.tex.unified.1d.level.v4s32.f32"
            case 'u':	 // 1 string to match.
              if (memcmp(NameR.data()+28, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_unified_1d_level_v4u32_f32;	 // "vvm.tex.unified.1d.level.v4u32.f32"
            }
            break;
          }
          break;
        case '2':	 // 9 strings to match.
          if (memcmp(NameR.data()+17, "d.", 2))
            break;
          switch (NameR[19]) {
          default: break;
          case 'a':	 // 6 strings to match.
            if (memcmp(NameR.data()+20, "rray.v4", 7))
              break;
            switch (NameR[27]) {
            default: break;
            case 'f':	 // 2 strings to match.
              if (memcmp(NameR.data()+28, "32.", 3))
                break;
              switch (NameR[31]) {
              default: break;
              case 'f':	 // 1 string to match.
                if (memcmp(NameR.data()+32, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_2d_array_v4f32_f32;	 // "vvm.tex.unified.2d.array.v4f32.f32"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+32, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_2d_array_v4f32_s32;	 // "vvm.tex.unified.2d.array.v4f32.s32"
              }
              break;
            case 's':	 // 2 strings to match.
              if (memcmp(NameR.data()+28, "32.", 3))
                break;
              switch (NameR[31]) {
              default: break;
              case 'f':	 // 1 string to match.
                if (memcmp(NameR.data()+32, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_2d_array_v4s32_f32;	 // "vvm.tex.unified.2d.array.v4s32.f32"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+32, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_2d_array_v4s32_s32;	 // "vvm.tex.unified.2d.array.v4s32.s32"
              }
              break;
            case 'u':	 // 2 strings to match.
              if (memcmp(NameR.data()+28, "32.", 3))
                break;
              switch (NameR[31]) {
              default: break;
              case 'f':	 // 1 string to match.
                if (memcmp(NameR.data()+32, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_2d_array_v4u32_f32;	 // "vvm.tex.unified.2d.array.v4u32.f32"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+32, "32", 2))
                  break;
                return Intrinsic::nvvm_tex_unified_2d_array_v4u32_s32;	 // "vvm.tex.unified.2d.array.v4u32.s32"
              }
              break;
            }
            break;
          case 'l':	 // 3 strings to match.
            if (memcmp(NameR.data()+20, "evel.v4", 7))
              break;
            switch (NameR[27]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+28, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_unified_2d_level_v4f32_f32;	 // "vvm.tex.unified.2d.level.v4f32.f32"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+28, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_unified_2d_level_v4s32_f32;	 // "vvm.tex.unified.2d.level.v4s32.f32"
            case 'u':	 // 1 string to match.
              if (memcmp(NameR.data()+28, "32.f32", 6))
                break;
              return Intrinsic::nvvm_tex_unified_2d_level_v4u32_f32;	 // "vvm.tex.unified.2d.level.v4u32.f32"
            }
            break;
          }
          break;
        case '3':	 // 3 strings to match.
          if (memcmp(NameR.data()+17, "d.level.v4", 10))
            break;
          switch (NameR[27]) {
          default: break;
          case 'f':	 // 1 string to match.
            if (memcmp(NameR.data()+28, "32.f32", 6))
              break;
            return Intrinsic::nvvm_tex_unified_3d_level_v4f32_f32;	 // "vvm.tex.unified.3d.level.v4f32.f32"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+28, "32.f32", 6))
              break;
            return Intrinsic::nvvm_tex_unified_3d_level_v4s32_f32;	 // "vvm.tex.unified.3d.level.v4s32.f32"
          case 'u':	 // 1 string to match.
            if (memcmp(NameR.data()+28, "32.f32", 6))
              break;
            return Intrinsic::nvvm_tex_unified_3d_level_v4u32_f32;	 // "vvm.tex.unified.3d.level.v4u32.f32"
          }
          break;
        }
        break;
      }
      break;
    case 36:	 // 6 strings to match.
      if (memcmp(NameR.data()+0, "vvm.tex.unified.cube.", 21))
        break;
      switch (NameR[21]) {
      default: break;
      case 'a':	 // 3 strings to match.
        if (memcmp(NameR.data()+22, "rray.v4", 7))
          break;
        switch (NameR[29]) {
        default: break;
        case 'f':	 // 1 string to match.
          if (memcmp(NameR.data()+30, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_cube_array_v4f32_f32;	 // "vvm.tex.unified.cube.array.v4f32.f32"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+30, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_cube_array_v4s32_f32;	 // "vvm.tex.unified.cube.array.v4s32.f32"
        case 'u':	 // 1 string to match.
          if (memcmp(NameR.data()+30, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_cube_array_v4u32_f32;	 // "vvm.tex.unified.cube.array.v4u32.f32"
        }
        break;
      case 'l':	 // 3 strings to match.
        if (memcmp(NameR.data()+22, "evel.v4", 7))
          break;
        switch (NameR[29]) {
        default: break;
        case 'f':	 // 1 string to match.
          if (memcmp(NameR.data()+30, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_cube_level_v4f32_f32;	 // "vvm.tex.unified.cube.level.v4f32.f32"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+30, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_cube_level_v4s32_f32;	 // "vvm.tex.unified.cube.level.v4s32.f32"
        case 'u':	 // 1 string to match.
          if (memcmp(NameR.data()+30, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_cube_level_v4u32_f32;	 // "vvm.tex.unified.cube.level.v4u32.f32"
        }
        break;
      }
      break;
    case 39:	 // 6 strings to match.
      if (memcmp(NameR.data()+0, "vvm.tex.unified.", 16))
        break;
      switch (NameR[16]) {
      default: break;
      case '1':	 // 3 strings to match.
        if (memcmp(NameR.data()+17, "d.array.grad.v4", 15))
          break;
        switch (NameR[32]) {
        default: break;
        case 'f':	 // 1 string to match.
          if (memcmp(NameR.data()+33, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_1d_array_grad_v4f32_f32;	 // "vvm.tex.unified.1d.array.grad.v4f32.f32"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+33, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_1d_array_grad_v4s32_f32;	 // "vvm.tex.unified.1d.array.grad.v4s32.f32"
        case 'u':	 // 1 string to match.
          if (memcmp(NameR.data()+33, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_1d_array_grad_v4u32_f32;	 // "vvm.tex.unified.1d.array.grad.v4u32.f32"
        }
        break;
      case '2':	 // 3 strings to match.
        if (memcmp(NameR.data()+17, "d.array.grad.v4", 15))
          break;
        switch (NameR[32]) {
        default: break;
        case 'f':	 // 1 string to match.
          if (memcmp(NameR.data()+33, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_2d_array_grad_v4f32_f32;	 // "vvm.tex.unified.2d.array.grad.v4f32.f32"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+33, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_2d_array_grad_v4s32_f32;	 // "vvm.tex.unified.2d.array.grad.v4s32.f32"
        case 'u':	 // 1 string to match.
          if (memcmp(NameR.data()+33, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_2d_array_grad_v4u32_f32;	 // "vvm.tex.unified.2d.array.grad.v4u32.f32"
        }
        break;
      }
      break;
    case 40:	 // 6 strings to match.
      if (memcmp(NameR.data()+0, "vvm.tex.unified.", 16))
        break;
      switch (NameR[16]) {
      default: break;
      case '1':	 // 3 strings to match.
        if (memcmp(NameR.data()+17, "d.array.level.v4", 16))
          break;
        switch (NameR[33]) {
        default: break;
        case 'f':	 // 1 string to match.
          if (memcmp(NameR.data()+34, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_1d_array_level_v4f32_f32;	 // "vvm.tex.unified.1d.array.level.v4f32.f32"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+34, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_1d_array_level_v4s32_f32;	 // "vvm.tex.unified.1d.array.level.v4s32.f32"
        case 'u':	 // 1 string to match.
          if (memcmp(NameR.data()+34, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_1d_array_level_v4u32_f32;	 // "vvm.tex.unified.1d.array.level.v4u32.f32"
        }
        break;
      case '2':	 // 3 strings to match.
        if (memcmp(NameR.data()+17, "d.array.level.v4", 16))
          break;
        switch (NameR[33]) {
        default: break;
        case 'f':	 // 1 string to match.
          if (memcmp(NameR.data()+34, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_2d_array_level_v4f32_f32;	 // "vvm.tex.unified.2d.array.level.v4f32.f32"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+34, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_2d_array_level_v4s32_f32;	 // "vvm.tex.unified.2d.array.level.v4s32.f32"
        case 'u':	 // 1 string to match.
          if (memcmp(NameR.data()+34, "32.f32", 6))
            break;
          return Intrinsic::nvvm_tex_unified_2d_array_level_v4u32_f32;	 // "vvm.tex.unified.2d.array.level.v4u32.f32"
        }
        break;
      }
      break;
    case 42:	 // 3 strings to match.
      if (memcmp(NameR.data()+0, "vvm.tex.unified.cube.array.level.v4", 35))
        break;
      switch (NameR[35]) {
      default: break;
      case 'f':	 // 1 string to match.
        if (memcmp(NameR.data()+36, "32.f32", 6))
          break;
        return Intrinsic::nvvm_tex_unified_cube_array_level_v4f32_f32;	 // "vvm.tex.unified.cube.array.level.v4f32.f32"
      case 's':	 // 1 string to match.
        if (memcmp(NameR.data()+36, "32.f32", 6))
          break;
        return Intrinsic::nvvm_tex_unified_cube_array_level_v4s32_f32;	 // "vvm.tex.unified.cube.array.level.v4s32.f32"
      case 'u':	 // 1 string to match.
        if (memcmp(NameR.data()+36, "32.f32", 6))
          break;
        return Intrinsic::nvvm_tex_unified_cube_array_level_v4u32_f32;	 // "vvm.tex.unified.cube.array.level.v4u32.f32"
      }
      break;
    }
    break;  // end of 'n' case.
  case 'o':
    if (NameR.startswith("bjectsize.")) return Intrinsic::objectsize;
    break;  // end of 'o' case.
  case 'p':
    if (NameR.startswith("tr.annotation.")) return Intrinsic::ptr_annotation;
    if (NameR.startswith("pc.mtctr.")) return Intrinsic::ppc_mtctr;
    if (NameR.startswith("owi.")) return Intrinsic::powi;
    if (NameR.startswith("ow.")) return Intrinsic::pow;
    switch (NameR.size()) {
    default: break;
    case 7:	 // 8 strings to match.
      switch (NameR[0]) {
      default: break;
      case 'c':	 // 1 string to match.
        if (memcmp(NameR.data()+1, "marker", 6))
          break;
        return Intrinsic::pcmarker;	 // "cmarker"
      case 'p':	 // 6 strings to match.
        if (memcmp(NameR.data()+1, "c.", 2))
          break;
        switch (NameR[3]) {
        default: break;
        case 'd':	 // 5 strings to match.
          if (memcmp(NameR.data()+4, "cb", 2))
            break;
          switch (NameR[6]) {
          default: break;
          case 'a':	 // 1 string to match.
            return Intrinsic::ppc_dcba;	 // "pc.dcba"
          case 'f':	 // 1 string to match.
            return Intrinsic::ppc_dcbf;	 // "pc.dcbf"
          case 'i':	 // 1 string to match.
            return Intrinsic::ppc_dcbi;	 // "pc.dcbi"
          case 't':	 // 1 string to match.
            return Intrinsic::ppc_dcbt;	 // "pc.dcbt"
          case 'z':	 // 1 string to match.
            return Intrinsic::ppc_dcbz;	 // "pc.dcbz"
          }
          break;
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+4, "ync", 3))
            break;
          return Intrinsic::ppc_sync;	 // "pc.sync"
        }
        break;
      case 'r':	 // 1 string to match.
        if (memcmp(NameR.data()+1, "efetch", 6))
          break;
        return Intrinsic::prefetch;	 // "refetch"
      }
      break;
    case 8:	 // 2 strings to match.
      if (memcmp(NameR.data()+0, "pc.dcb", 6))
        break;
      switch (NameR[6]) {
      default: break;
      case 's':	 // 1 string to match.
        if (NameR[7] != 't')
          break;
        return Intrinsic::ppc_dcbst;	 // "pc.dcbst"
      case 'z':	 // 1 string to match.
        if (NameR[7] != 'l')
          break;
        return Intrinsic::ppc_dcbzl;	 // "pc.dcbzl"
      }
      break;
    case 9:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "pc.dcbtst", 9))
        break;
      return Intrinsic::ppc_dcbtst;	 // "pc.dcbtst"
    case 11:	 // 5 strings to match.
      if (memcmp(NameR.data()+0, "tx.", 3))
        break;
      switch (NameR[3]) {
      default: break;
      case 'b':	 // 1 string to match.
        if (memcmp(NameR.data()+4, "ar.sync", 7))
          break;
        return Intrinsic::ptx_bar_sync;	 // "tx.bar.sync"
      case 'r':	 // 4 strings to match.
        if (memcmp(NameR.data()+4, "ead.pm", 6))
          break;
        switch (NameR[10]) {
        default: break;
        case '0':	 // 1 string to match.
          return Intrinsic::ptx_read_pm0;	 // "tx.read.pm0"
        case '1':	 // 1 string to match.
          return Intrinsic::ptx_read_pm1;	 // "tx.read.pm1"
        case '2':	 // 1 string to match.
          return Intrinsic::ptx_read_pm2;	 // "tx.read.pm2"
        case '3':	 // 1 string to match.
          return Intrinsic::ptx_read_pm3;	 // "tx.read.pm3"
        }
        break;
      }
      break;
    case 12:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "tx.read.smid", 12))
        break;
      return Intrinsic::ptx_read_smid;	 // "tx.read.smid"
    case 13:	 // 6 strings to match.
      if (memcmp(NameR.data()+0, "tx.read.", 8))
        break;
      switch (NameR[8]) {
      default: break;
      case 'c':	 // 1 string to match.
        if (memcmp(NameR.data()+9, "lock", 4))
          break;
        return Intrinsic::ptx_read_clock;	 // "tx.read.clock"
      case 'n':	 // 1 string to match.
        if (memcmp(NameR.data()+9, "smid", 4))
          break;
        return Intrinsic::ptx_read_nsmid;	 // "tx.read.nsmid"
      case 't':	 // 4 strings to match.
        if (memcmp(NameR.data()+9, "id.", 3))
          break;
        switch (NameR[12]) {
        default: break;
        case 'w':	 // 1 string to match.
          return Intrinsic::ptx_read_tid_w;	 // "tx.read.tid.w"
        case 'x':	 // 1 string to match.
          return Intrinsic::ptx_read_tid_x;	 // "tx.read.tid.x"
        case 'y':	 // 1 string to match.
          return Intrinsic::ptx_read_tid_y;	 // "tx.read.tid.y"
        case 'z':	 // 1 string to match.
          return Intrinsic::ptx_read_tid_z;	 // "tx.read.tid.z"
        }
        break;
      }
      break;
    case 14:	 // 12 strings to match.
      switch (NameR[0]) {
      default: break;
      case 'p':	 // 5 strings to match.
        if (memcmp(NameR.data()+1, "c.altivec.", 10))
          break;
        switch (NameR[11]) {
        default: break;
        case 'd':	 // 2 strings to match.
          if (NameR[12] != 's')
            break;
          switch (NameR[13]) {
          default: break;
          case 's':	 // 1 string to match.
            return Intrinsic::ppc_altivec_dss;	 // "pc.altivec.dss"
          case 't':	 // 1 string to match.
            return Intrinsic::ppc_altivec_dst;	 // "pc.altivec.dst"
          }
          break;
        case 'l':	 // 1 string to match.
          if (memcmp(NameR.data()+12, "vx", 2))
            break;
          return Intrinsic::ppc_altivec_lvx;	 // "pc.altivec.lvx"
        case 'v':	 // 2 strings to match.
          if (NameR[12] != 's')
            break;
          switch (NameR[13]) {
          default: break;
          case 'l':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vsl;	 // "pc.altivec.vsl"
          case 'r':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vsr;	 // "pc.altivec.vsr"
          }
          break;
        }
        break;
      case 't':	 // 7 strings to match.
        if (memcmp(NameR.data()+1, "x.read.", 7))
          break;
        switch (NameR[8]) {
        default: break;
        case 'g':	 // 1 string to match.
          if (memcmp(NameR.data()+9, "ridid", 5))
            break;
          return Intrinsic::ptx_read_gridid;	 // "tx.read.gridid"
        case 'l':	 // 1 string to match.
          if (memcmp(NameR.data()+9, "aneid", 5))
            break;
          return Intrinsic::ptx_read_laneid;	 // "tx.read.laneid"
        case 'n':	 // 4 strings to match.
          if (memcmp(NameR.data()+9, "tid.", 4))
            break;
          switch (NameR[13]) {
          default: break;
          case 'w':	 // 1 string to match.
            return Intrinsic::ptx_read_ntid_w;	 // "tx.read.ntid.w"
          case 'x':	 // 1 string to match.
            return Intrinsic::ptx_read_ntid_x;	 // "tx.read.ntid.x"
          case 'y':	 // 1 string to match.
            return Intrinsic::ptx_read_ntid_y;	 // "tx.read.ntid.y"
          case 'z':	 // 1 string to match.
            return Intrinsic::ptx_read_ntid_z;	 // "tx.read.ntid.z"
          }
          break;
        case 'w':	 // 1 string to match.
          if (memcmp(NameR.data()+9, "arpid", 5))
            break;
          return Intrinsic::ptx_read_warpid;	 // "tx.read.warpid"
        }
        break;
      }
      break;
    case 15:	 // 23 strings to match.
      switch (NameR[0]) {
      default: break;
      case 'p':	 // 17 strings to match.
        if (memcmp(NameR.data()+1, "c.altivec.", 10))
          break;
        switch (NameR[11]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(NameR.data()+12, "stt", 3))
            break;
          return Intrinsic::ppc_altivec_dstt;	 // "pc.altivec.dstt"
        case 'l':	 // 3 strings to match.
          if (NameR[12] != 'v')
            break;
          switch (NameR[13]) {
          default: break;
          case 's':	 // 2 strings to match.
            switch (NameR[14]) {
            default: break;
            case 'l':	 // 1 string to match.
              return Intrinsic::ppc_altivec_lvsl;	 // "pc.altivec.lvsl"
            case 'r':	 // 1 string to match.
              return Intrinsic::ppc_altivec_lvsr;	 // "pc.altivec.lvsr"
            }
            break;
          case 'x':	 // 1 string to match.
            if (NameR[14] != 'l')
              break;
            return Intrinsic::ppc_altivec_lvxl;	 // "pc.altivec.lvxl"
          }
          break;
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+12, "tvx", 3))
            break;
          return Intrinsic::ppc_altivec_stvx;	 // "pc.altivec.stvx"
        case 'v':	 // 12 strings to match.
          switch (NameR[12]) {
          default: break;
          case 'r':	 // 3 strings to match.
            if (NameR[13] != 'l')
              break;
            switch (NameR[14]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vrlb;	 // "pc.altivec.vrlb"
            case 'h':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vrlh;	 // "pc.altivec.vrlh"
            case 'w':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vrlw;	 // "pc.altivec.vrlw"
            }
            break;
          case 's':	 // 9 strings to match.
            switch (NameR[13]) {
            default: break;
            case 'e':	 // 1 string to match.
              if (NameR[14] != 'l')
                break;
              return Intrinsic::ppc_altivec_vsel;	 // "pc.altivec.vsel"
            case 'l':	 // 4 strings to match.
              switch (NameR[14]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vslb;	 // "pc.altivec.vslb"
              case 'h':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vslh;	 // "pc.altivec.vslh"
              case 'o':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vslo;	 // "pc.altivec.vslo"
              case 'w':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vslw;	 // "pc.altivec.vslw"
              }
              break;
            case 'r':	 // 4 strings to match.
              switch (NameR[14]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vsrb;	 // "pc.altivec.vsrb"
              case 'h':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vsrh;	 // "pc.altivec.vsrh"
              case 'o':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vsro;	 // "pc.altivec.vsro"
              case 'w':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vsrw;	 // "pc.altivec.vsrw"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 't':	 // 6 strings to match.
        if (memcmp(NameR.data()+1, "x.read.", 7))
          break;
        switch (NameR[8]) {
        default: break;
        case 'c':	 // 5 strings to match.
          switch (NameR[9]) {
          default: break;
          case 'l':	 // 1 string to match.
            if (memcmp(NameR.data()+10, "ock64", 5))
              break;
            return Intrinsic::ptx_read_clock64;	 // "tx.read.clock64"
          case 't':	 // 4 strings to match.
            if (memcmp(NameR.data()+10, "aid.", 4))
              break;
            switch (NameR[14]) {
            default: break;
            case 'w':	 // 1 string to match.
              return Intrinsic::ptx_read_ctaid_w;	 // "tx.read.ctaid.w"
            case 'x':	 // 1 string to match.
              return Intrinsic::ptx_read_ctaid_x;	 // "tx.read.ctaid.x"
            case 'y':	 // 1 string to match.
              return Intrinsic::ptx_read_ctaid_y;	 // "tx.read.ctaid.y"
            case 'z':	 // 1 string to match.
              return Intrinsic::ptx_read_ctaid_z;	 // "tx.read.ctaid.z"
            }
            break;
          }
          break;
        case 'n':	 // 1 string to match.
          if (memcmp(NameR.data()+9, "warpid", 6))
            break;
          return Intrinsic::ptx_read_nwarpid;	 // "tx.read.nwarpid"
        }
        break;
      }
      break;
    case 16:	 // 21 strings to match.
      switch (NameR[0]) {
      default: break;
      case 'p':	 // 17 strings to match.
        if (memcmp(NameR.data()+1, "c.altivec.", 10))
          break;
        switch (NameR[11]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(NameR.data()+12, "stst", 4))
            break;
          return Intrinsic::ppc_altivec_dstst;	 // "pc.altivec.dstst"
        case 'l':	 // 3 strings to match.
          if (memcmp(NameR.data()+12, "ve", 2))
            break;
          switch (NameR[14]) {
          default: break;
          case 'b':	 // 1 string to match.
            if (NameR[15] != 'x')
              break;
            return Intrinsic::ppc_altivec_lvebx;	 // "pc.altivec.lvebx"
          case 'h':	 // 1 string to match.
            if (NameR[15] != 'x')
              break;
            return Intrinsic::ppc_altivec_lvehx;	 // "pc.altivec.lvehx"
          case 'w':	 // 1 string to match.
            if (NameR[15] != 'x')
              break;
            return Intrinsic::ppc_altivec_lvewx;	 // "pc.altivec.lvewx"
          }
          break;
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+12, "tvxl", 4))
            break;
          return Intrinsic::ppc_altivec_stvxl;	 // "pc.altivec.stvxl"
        case 'v':	 // 12 strings to match.
          switch (NameR[12]) {
          default: break;
          case 'c':	 // 2 strings to match.
            if (NameR[13] != 'f')
              break;
            switch (NameR[14]) {
            default: break;
            case 's':	 // 1 string to match.
              if (NameR[15] != 'x')
                break;
              return Intrinsic::ppc_altivec_vcfsx;	 // "pc.altivec.vcfsx"
            case 'u':	 // 1 string to match.
              if (NameR[15] != 'x')
                break;
              return Intrinsic::ppc_altivec_vcfux;	 // "pc.altivec.vcfux"
            }
            break;
          case 'p':	 // 2 strings to match.
            switch (NameR[13]) {
            default: break;
            case 'e':	 // 1 string to match.
              if (memcmp(NameR.data()+14, "rm", 2))
                break;
              return Intrinsic::ppc_altivec_vperm;	 // "pc.altivec.vperm"
            case 'k':	 // 1 string to match.
              if (memcmp(NameR.data()+14, "px", 2))
                break;
              return Intrinsic::ppc_altivec_vpkpx;	 // "pc.altivec.vpkpx"
            }
            break;
          case 'r':	 // 5 strings to match.
            switch (NameR[13]) {
            default: break;
            case 'e':	 // 1 string to match.
              if (memcmp(NameR.data()+14, "fp", 2))
                break;
              return Intrinsic::ppc_altivec_vrefp;	 // "pc.altivec.vrefp"
            case 'f':	 // 4 strings to match.
              if (NameR[14] != 'i')
                break;
              switch (NameR[15]) {
              default: break;
              case 'm':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vrfim;	 // "pc.altivec.vrfim"
              case 'n':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vrfin;	 // "pc.altivec.vrfin"
              case 'p':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vrfip;	 // "pc.altivec.vrfip"
              case 'z':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vrfiz;	 // "pc.altivec.vrfiz"
              }
              break;
            }
            break;
          case 's':	 // 3 strings to match.
            if (memcmp(NameR.data()+13, "ra", 2))
              break;
            switch (NameR[15]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vsrab;	 // "pc.altivec.vsrab"
            case 'h':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vsrah;	 // "pc.altivec.vsrah"
            case 'w':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vsraw;	 // "pc.altivec.vsraw"
            }
            break;
          }
          break;
        }
        break;
      case 't':	 // 4 strings to match.
        if (memcmp(NameR.data()+1, "x.read.nctaid.", 14))
          break;
        switch (NameR[15]) {
        default: break;
        case 'w':	 // 1 string to match.
          return Intrinsic::ptx_read_nctaid_w;	 // "tx.read.nctaid.w"
        case 'x':	 // 1 string to match.
          return Intrinsic::ptx_read_nctaid_x;	 // "tx.read.nctaid.x"
        case 'y':	 // 1 string to match.
          return Intrinsic::ptx_read_nctaid_y;	 // "tx.read.nctaid.y"
        case 'z':	 // 1 string to match.
          return Intrinsic::ptx_read_nctaid_z;	 // "tx.read.nctaid.z"
        }
        break;
      }
      break;
    case 17:	 // 29 strings to match.
      if (memcmp(NameR.data()+0, "pc.altivec.", 11))
        break;
      switch (NameR[11]) {
      default: break;
      case 'd':	 // 2 strings to match.
        if (NameR[12] != 's')
          break;
        switch (NameR[13]) {
        default: break;
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+14, "all", 3))
            break;
          return Intrinsic::ppc_altivec_dssall;	 // "pc.altivec.dssall"
        case 't':	 // 1 string to match.
          if (memcmp(NameR.data()+14, "stt", 3))
            break;
          return Intrinsic::ppc_altivec_dststt;	 // "pc.altivec.dststt"
        }
        break;
      case 'm':	 // 2 strings to match.
        switch (NameR[12]) {
        default: break;
        case 'f':	 // 1 string to match.
          if (memcmp(NameR.data()+13, "vscr", 4))
            break;
          return Intrinsic::ppc_altivec_mfvscr;	 // "pc.altivec.mfvscr"
        case 't':	 // 1 string to match.
          if (memcmp(NameR.data()+13, "vscr", 4))
            break;
          return Intrinsic::ppc_altivec_mtvscr;	 // "pc.altivec.mtvscr"
        }
        break;
      case 's':	 // 3 strings to match.
        if (memcmp(NameR.data()+12, "tve", 3))
          break;
        switch (NameR[15]) {
        default: break;
        case 'b':	 // 1 string to match.
          if (NameR[16] != 'x')
            break;
          return Intrinsic::ppc_altivec_stvebx;	 // "pc.altivec.stvebx"
        case 'h':	 // 1 string to match.
          if (NameR[16] != 'x')
            break;
          return Intrinsic::ppc_altivec_stvehx;	 // "pc.altivec.stvehx"
        case 'w':	 // 1 string to match.
          if (NameR[16] != 'x')
            break;
          return Intrinsic::ppc_altivec_stvewx;	 // "pc.altivec.stvewx"
        }
        break;
      case 'v':	 // 22 strings to match.
        switch (NameR[12]) {
        default: break;
        case 'a':	 // 6 strings to match.
          if (memcmp(NameR.data()+13, "vg", 2))
            break;
          switch (NameR[15]) {
          default: break;
          case 's':	 // 3 strings to match.
            switch (NameR[16]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vavgsb;	 // "pc.altivec.vavgsb"
            case 'h':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vavgsh;	 // "pc.altivec.vavgsh"
            case 'w':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vavgsw;	 // "pc.altivec.vavgsw"
            }
            break;
          case 'u':	 // 3 strings to match.
            switch (NameR[16]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vavgub;	 // "pc.altivec.vavgub"
            case 'h':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vavguh;	 // "pc.altivec.vavguh"
            case 'w':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vavguw;	 // "pc.altivec.vavguw"
            }
            break;
          }
          break;
        case 'c':	 // 2 strings to match.
          if (NameR[13] != 't')
            break;
          switch (NameR[14]) {
          default: break;
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+15, "xs", 2))
              break;
            return Intrinsic::ppc_altivec_vctsxs;	 // "pc.altivec.vctsxs"
          case 'u':	 // 1 string to match.
            if (memcmp(NameR.data()+15, "xs", 2))
              break;
            return Intrinsic::ppc_altivec_vctuxs;	 // "pc.altivec.vctuxs"
          }
          break;
        case 'm':	 // 14 strings to match.
          switch (NameR[13]) {
          default: break;
          case 'a':	 // 7 strings to match.
            if (NameR[14] != 'x')
              break;
            switch (NameR[15]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (NameR[16] != 'p')
                break;
              return Intrinsic::ppc_altivec_vmaxfp;	 // "pc.altivec.vmaxfp"
            case 's':	 // 3 strings to match.
              switch (NameR[16]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vmaxsb;	 // "pc.altivec.vmaxsb"
              case 'h':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vmaxsh;	 // "pc.altivec.vmaxsh"
              case 'w':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vmaxsw;	 // "pc.altivec.vmaxsw"
              }
              break;
            case 'u':	 // 3 strings to match.
              switch (NameR[16]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vmaxub;	 // "pc.altivec.vmaxub"
              case 'h':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vmaxuh;	 // "pc.altivec.vmaxuh"
              case 'w':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vmaxuw;	 // "pc.altivec.vmaxuw"
              }
              break;
            }
            break;
          case 'i':	 // 7 strings to match.
            if (NameR[14] != 'n')
              break;
            switch (NameR[15]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (NameR[16] != 'p')
                break;
              return Intrinsic::ppc_altivec_vminfp;	 // "pc.altivec.vminfp"
            case 's':	 // 3 strings to match.
              switch (NameR[16]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vminsb;	 // "pc.altivec.vminsb"
              case 'h':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vminsh;	 // "pc.altivec.vminsh"
              case 'w':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vminsw;	 // "pc.altivec.vminsw"
              }
              break;
            case 'u':	 // 3 strings to match.
              switch (NameR[16]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vminub;	 // "pc.altivec.vminub"
              case 'h':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vminuh;	 // "pc.altivec.vminuh"
              case 'w':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vminuw;	 // "pc.altivec.vminuw"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 18:	 // 38 strings to match.
      if (memcmp(NameR.data()+0, "pc.altivec.v", 12))
        break;
      switch (NameR[12]) {
      default: break;
      case 'a':	 // 7 strings to match.
        if (memcmp(NameR.data()+13, "dd", 2))
          break;
        switch (NameR[15]) {
        default: break;
        case 'c':	 // 1 string to match.
          if (memcmp(NameR.data()+16, "uw", 2))
            break;
          return Intrinsic::ppc_altivec_vaddcuw;	 // "pc.altivec.vaddcuw"
        case 's':	 // 3 strings to match.
          switch (NameR[16]) {
          default: break;
          case 'b':	 // 1 string to match.
            if (NameR[17] != 's')
              break;
            return Intrinsic::ppc_altivec_vaddsbs;	 // "pc.altivec.vaddsbs"
          case 'h':	 // 1 string to match.
            if (NameR[17] != 's')
              break;
            return Intrinsic::ppc_altivec_vaddshs;	 // "pc.altivec.vaddshs"
          case 'w':	 // 1 string to match.
            if (NameR[17] != 's')
              break;
            return Intrinsic::ppc_altivec_vaddsws;	 // "pc.altivec.vaddsws"
          }
          break;
        case 'u':	 // 3 strings to match.
          switch (NameR[16]) {
          default: break;
          case 'b':	 // 1 string to match.
            if (NameR[17] != 's')
              break;
            return Intrinsic::ppc_altivec_vaddubs;	 // "pc.altivec.vaddubs"
          case 'h':	 // 1 string to match.
            if (NameR[17] != 's')
              break;
            return Intrinsic::ppc_altivec_vadduhs;	 // "pc.altivec.vadduhs"
          case 'w':	 // 1 string to match.
            if (NameR[17] != 's')
              break;
            return Intrinsic::ppc_altivec_vadduws;	 // "pc.altivec.vadduws"
          }
          break;
        }
        break;
      case 'c':	 // 1 string to match.
        if (memcmp(NameR.data()+13, "mpbfp", 5))
          break;
        return Intrinsic::ppc_altivec_vcmpbfp;	 // "pc.altivec.vcmpbfp"
      case 'l':	 // 1 string to match.
        if (memcmp(NameR.data()+13, "ogefp", 5))
          break;
        return Intrinsic::ppc_altivec_vlogefp;	 // "pc.altivec.vlogefp"
      case 'm':	 // 9 strings to match.
        switch (NameR[13]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(NameR.data()+14, "ddfp", 4))
            break;
          return Intrinsic::ppc_altivec_vmaddfp;	 // "pc.altivec.vmaddfp"
        case 'u':	 // 8 strings to match.
          if (NameR[14] != 'l')
            break;
          switch (NameR[15]) {
          default: break;
          case 'e':	 // 4 strings to match.
            switch (NameR[16]) {
            default: break;
            case 's':	 // 2 strings to match.
              switch (NameR[17]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vmulesb;	 // "pc.altivec.vmulesb"
              case 'h':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vmulesh;	 // "pc.altivec.vmulesh"
              }
              break;
            case 'u':	 // 2 strings to match.
              switch (NameR[17]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vmuleub;	 // "pc.altivec.vmuleub"
              case 'h':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vmuleuh;	 // "pc.altivec.vmuleuh"
              }
              break;
            }
            break;
          case 'o':	 // 4 strings to match.
            switch (NameR[16]) {
            default: break;
            case 's':	 // 2 strings to match.
              switch (NameR[17]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vmulosb;	 // "pc.altivec.vmulosb"
              case 'h':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vmulosh;	 // "pc.altivec.vmulosh"
              }
              break;
            case 'u':	 // 2 strings to match.
              switch (NameR[17]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vmuloub;	 // "pc.altivec.vmuloub"
              case 'h':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vmulouh;	 // "pc.altivec.vmulouh"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 'p':	 // 6 strings to match.
        if (NameR[13] != 'k')
          break;
        switch (NameR[14]) {
        default: break;
        case 's':	 // 4 strings to match.
          switch (NameR[15]) {
          default: break;
          case 'h':	 // 2 strings to match.
            switch (NameR[16]) {
            default: break;
            case 's':	 // 1 string to match.
              if (NameR[17] != 's')
                break;
              return Intrinsic::ppc_altivec_vpkshss;	 // "pc.altivec.vpkshss"
            case 'u':	 // 1 string to match.
              if (NameR[17] != 's')
                break;
              return Intrinsic::ppc_altivec_vpkshus;	 // "pc.altivec.vpkshus"
            }
            break;
          case 'w':	 // 2 strings to match.
            switch (NameR[16]) {
            default: break;
            case 's':	 // 1 string to match.
              if (NameR[17] != 's')
                break;
              return Intrinsic::ppc_altivec_vpkswss;	 // "pc.altivec.vpkswss"
            case 'u':	 // 1 string to match.
              if (NameR[17] != 's')
                break;
              return Intrinsic::ppc_altivec_vpkswus;	 // "pc.altivec.vpkswus"
            }
            break;
          }
          break;
        case 'u':	 // 2 strings to match.
          switch (NameR[15]) {
          default: break;
          case 'h':	 // 1 string to match.
            if (memcmp(NameR.data()+16, "us", 2))
              break;
            return Intrinsic::ppc_altivec_vpkuhus;	 // "pc.altivec.vpkuhus"
          case 'w':	 // 1 string to match.
            if (memcmp(NameR.data()+16, "us", 2))
              break;
            return Intrinsic::ppc_altivec_vpkuwus;	 // "pc.altivec.vpkuwus"
          }
          break;
        }
        break;
      case 's':	 // 8 strings to match.
        if (NameR[13] != 'u')
          break;
        switch (NameR[14]) {
        default: break;
        case 'b':	 // 7 strings to match.
          switch (NameR[15]) {
          default: break;
          case 'c':	 // 1 string to match.
            if (memcmp(NameR.data()+16, "uw", 2))
              break;
            return Intrinsic::ppc_altivec_vsubcuw;	 // "pc.altivec.vsubcuw"
          case 's':	 // 3 strings to match.
            switch (NameR[16]) {
            default: break;
            case 'b':	 // 1 string to match.
              if (NameR[17] != 's')
                break;
              return Intrinsic::ppc_altivec_vsubsbs;	 // "pc.altivec.vsubsbs"
            case 'h':	 // 1 string to match.
              if (NameR[17] != 's')
                break;
              return Intrinsic::ppc_altivec_vsubshs;	 // "pc.altivec.vsubshs"
            case 'w':	 // 1 string to match.
              if (NameR[17] != 's')
                break;
              return Intrinsic::ppc_altivec_vsubsws;	 // "pc.altivec.vsubsws"
            }
            break;
          case 'u':	 // 3 strings to match.
            switch (NameR[16]) {
            default: break;
            case 'b':	 // 1 string to match.
              if (NameR[17] != 's')
                break;
              return Intrinsic::ppc_altivec_vsububs;	 // "pc.altivec.vsububs"
            case 'h':	 // 1 string to match.
              if (NameR[17] != 's')
                break;
              return Intrinsic::ppc_altivec_vsubuhs;	 // "pc.altivec.vsubuhs"
            case 'w':	 // 1 string to match.
              if (NameR[17] != 's')
                break;
              return Intrinsic::ppc_altivec_vsubuws;	 // "pc.altivec.vsubuws"
            }
            break;
          }
          break;
        case 'm':	 // 1 string to match.
          if (memcmp(NameR.data()+15, "sws", 3))
            break;
          return Intrinsic::ppc_altivec_vsumsws;	 // "pc.altivec.vsumsws"
        }
        break;
      case 'u':	 // 6 strings to match.
        if (memcmp(NameR.data()+13, "pk", 2))
          break;
        switch (NameR[15]) {
        default: break;
        case 'h':	 // 3 strings to match.
          switch (NameR[16]) {
          default: break;
          case 'p':	 // 1 string to match.
            if (NameR[17] != 'x')
              break;
            return Intrinsic::ppc_altivec_vupkhpx;	 // "pc.altivec.vupkhpx"
          case 's':	 // 2 strings to match.
            switch (NameR[17]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vupkhsb;	 // "pc.altivec.vupkhsb"
            case 'h':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vupkhsh;	 // "pc.altivec.vupkhsh"
            }
            break;
          }
          break;
        case 'l':	 // 3 strings to match.
          switch (NameR[16]) {
          default: break;
          case 'p':	 // 1 string to match.
            if (NameR[17] != 'x')
              break;
            return Intrinsic::ppc_altivec_vupklpx;	 // "pc.altivec.vupklpx"
          case 's':	 // 2 strings to match.
            switch (NameR[17]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vupklsb;	 // "pc.altivec.vupklsb"
            case 'h':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vupklsh;	 // "pc.altivec.vupklsh"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 19:	 // 29 strings to match.
      switch (NameR[0]) {
      default: break;
      case 'p':	 // 24 strings to match.
        if (memcmp(NameR.data()+1, "c.altivec.v", 11))
          break;
        switch (NameR[12]) {
        default: break;
        case 'c':	 // 12 strings to match.
          if (memcmp(NameR.data()+13, "mp", 2))
            break;
          switch (NameR[15]) {
          default: break;
          case 'e':	 // 4 strings to match.
            if (NameR[16] != 'q')
              break;
            switch (NameR[17]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (NameR[18] != 'p')
                break;
              return Intrinsic::ppc_altivec_vcmpeqfp;	 // "pc.altivec.vcmpeqfp"
            case 'u':	 // 3 strings to match.
              switch (NameR[18]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vcmpequb;	 // "pc.altivec.vcmpequb"
              case 'h':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vcmpequh;	 // "pc.altivec.vcmpequh"
              case 'w':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vcmpequw;	 // "pc.altivec.vcmpequw"
              }
              break;
            }
            break;
          case 'g':	 // 8 strings to match.
            switch (NameR[16]) {
            default: break;
            case 'e':	 // 1 string to match.
              if (memcmp(NameR.data()+17, "fp", 2))
                break;
              return Intrinsic::ppc_altivec_vcmpgefp;	 // "pc.altivec.vcmpgefp"
            case 't':	 // 7 strings to match.
              switch (NameR[17]) {
              default: break;
              case 'f':	 // 1 string to match.
                if (NameR[18] != 'p')
                  break;
                return Intrinsic::ppc_altivec_vcmpgtfp;	 // "pc.altivec.vcmpgtfp"
              case 's':	 // 3 strings to match.
                switch (NameR[18]) {
                default: break;
                case 'b':	 // 1 string to match.
                  return Intrinsic::ppc_altivec_vcmpgtsb;	 // "pc.altivec.vcmpgtsb"
                case 'h':	 // 1 string to match.
                  return Intrinsic::ppc_altivec_vcmpgtsh;	 // "pc.altivec.vcmpgtsh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::ppc_altivec_vcmpgtsw;	 // "pc.altivec.vcmpgtsw"
                }
                break;
              case 'u':	 // 3 strings to match.
                switch (NameR[18]) {
                default: break;
                case 'b':	 // 1 string to match.
                  return Intrinsic::ppc_altivec_vcmpgtub;	 // "pc.altivec.vcmpgtub"
                case 'h':	 // 1 string to match.
                  return Intrinsic::ppc_altivec_vcmpgtuh;	 // "pc.altivec.vcmpgtuh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::ppc_altivec_vcmpgtuw;	 // "pc.altivec.vcmpgtuw"
                }
                break;
              }
              break;
            }
            break;
          }
          break;
        case 'e':	 // 1 string to match.
          if (memcmp(NameR.data()+13, "xptefp", 6))
            break;
          return Intrinsic::ppc_altivec_vexptefp;	 // "pc.altivec.vexptefp"
        case 'm':	 // 6 strings to match.
          if (memcmp(NameR.data()+13, "sum", 3))
            break;
          switch (NameR[16]) {
          default: break;
          case 'm':	 // 1 string to match.
            if (memcmp(NameR.data()+17, "bm", 2))
              break;
            return Intrinsic::ppc_altivec_vmsummbm;	 // "pc.altivec.vmsummbm"
          case 's':	 // 2 strings to match.
            if (NameR[17] != 'h')
              break;
            switch (NameR[18]) {
            default: break;
            case 'm':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vmsumshm;	 // "pc.altivec.vmsumshm"
            case 's':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vmsumshs;	 // "pc.altivec.vmsumshs"
            }
            break;
          case 'u':	 // 3 strings to match.
            switch (NameR[17]) {
            default: break;
            case 'b':	 // 1 string to match.
              if (NameR[18] != 'm')
                break;
              return Intrinsic::ppc_altivec_vmsumubm;	 // "pc.altivec.vmsumubm"
            case 'h':	 // 2 strings to match.
              switch (NameR[18]) {
              default: break;
              case 'm':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vmsumuhm;	 // "pc.altivec.vmsumuhm"
              case 's':	 // 1 string to match.
                return Intrinsic::ppc_altivec_vmsumuhs;	 // "pc.altivec.vmsumuhs"
              }
              break;
            }
            break;
          }
          break;
        case 'n':	 // 1 string to match.
          if (memcmp(NameR.data()+13, "msubfp", 6))
            break;
          return Intrinsic::ppc_altivec_vnmsubfp;	 // "pc.altivec.vnmsubfp"
        case 's':	 // 4 strings to match.
          if (memcmp(NameR.data()+13, "um", 2))
            break;
          switch (NameR[15]) {
          default: break;
          case '2':	 // 1 string to match.
            if (memcmp(NameR.data()+16, "sws", 3))
              break;
            return Intrinsic::ppc_altivec_vsum2sws;	 // "pc.altivec.vsum2sws"
          case '4':	 // 3 strings to match.
            switch (NameR[16]) {
            default: break;
            case 's':	 // 2 strings to match.
              switch (NameR[17]) {
              default: break;
              case 'b':	 // 1 string to match.
                if (NameR[18] != 's')
                  break;
                return Intrinsic::ppc_altivec_vsum4sbs;	 // "pc.altivec.vsum4sbs"
              case 'h':	 // 1 string to match.
                if (NameR[18] != 's')
                  break;
                return Intrinsic::ppc_altivec_vsum4shs;	 // "pc.altivec.vsum4shs"
              }
              break;
            case 'u':	 // 1 string to match.
              if (memcmp(NameR.data()+17, "bs", 2))
                break;
              return Intrinsic::ppc_altivec_vsum4ubs;	 // "pc.altivec.vsum4ubs"
            }
            break;
          }
          break;
        }
        break;
      case 't':	 // 5 strings to match.
        if (memcmp(NameR.data()+1, "x.read.lanemask.", 16))
          break;
        switch (NameR[17]) {
        default: break;
        case 'e':	 // 1 string to match.
          if (NameR[18] != 'q')
            break;
          return Intrinsic::ptx_read_lanemask_eq;	 // "tx.read.lanemask.eq"
        case 'g':	 // 2 strings to match.
          switch (NameR[18]) {
          default: break;
          case 'e':	 // 1 string to match.
            return Intrinsic::ptx_read_lanemask_ge;	 // "tx.read.lanemask.ge"
          case 't':	 // 1 string to match.
            return Intrinsic::ptx_read_lanemask_gt;	 // "tx.read.lanemask.gt"
          }
          break;
        case 'l':	 // 2 strings to match.
          switch (NameR[18]) {
          default: break;
          case 'e':	 // 1 string to match.
            return Intrinsic::ptx_read_lanemask_le;	 // "tx.read.lanemask.le"
          case 't':	 // 1 string to match.
            return Intrinsic::ptx_read_lanemask_lt;	 // "tx.read.lanemask.lt"
          }
          break;
        }
        break;
      }
      break;
    case 20:	 // 4 strings to match.
      if (memcmp(NameR.data()+0, "pc.altivec.v", 12))
        break;
      switch (NameR[12]) {
      default: break;
      case 'c':	 // 1 string to match.
        if (memcmp(NameR.data()+13, "mpbfp.p", 7))
          break;
        return Intrinsic::ppc_altivec_vcmpbfp_p;	 // "pc.altivec.vcmpbfp.p"
      case 'm':	 // 2 strings to match.
        switch (NameR[13]) {
        default: break;
        case 'h':	 // 1 string to match.
          if (memcmp(NameR.data()+14, "addshs", 6))
            break;
          return Intrinsic::ppc_altivec_vmhaddshs;	 // "pc.altivec.vmhaddshs"
        case 'l':	 // 1 string to match.
          if (memcmp(NameR.data()+14, "adduhm", 6))
            break;
          return Intrinsic::ppc_altivec_vmladduhm;	 // "pc.altivec.vmladduhm"
        }
        break;
      case 'r':	 // 1 string to match.
        if (memcmp(NameR.data()+13, "sqrtefp", 7))
          break;
        return Intrinsic::ppc_altivec_vrsqrtefp;	 // "pc.altivec.vrsqrtefp"
      }
      break;
    case 21:	 // 13 strings to match.
      if (memcmp(NameR.data()+0, "pc.altivec.v", 12))
        break;
      switch (NameR[12]) {
      default: break;
      case 'c':	 // 12 strings to match.
        if (memcmp(NameR.data()+13, "mp", 2))
          break;
        switch (NameR[15]) {
        default: break;
        case 'e':	 // 4 strings to match.
          if (NameR[16] != 'q')
            break;
          switch (NameR[17]) {
          default: break;
          case 'f':	 // 1 string to match.
            if (memcmp(NameR.data()+18, "p.p", 3))
              break;
            return Intrinsic::ppc_altivec_vcmpeqfp_p;	 // "pc.altivec.vcmpeqfp.p"
          case 'u':	 // 3 strings to match.
            switch (NameR[18]) {
            default: break;
            case 'b':	 // 1 string to match.
              if (memcmp(NameR.data()+19, ".p", 2))
                break;
              return Intrinsic::ppc_altivec_vcmpequb_p;	 // "pc.altivec.vcmpequb.p"
            case 'h':	 // 1 string to match.
              if (memcmp(NameR.data()+19, ".p", 2))
                break;
              return Intrinsic::ppc_altivec_vcmpequh_p;	 // "pc.altivec.vcmpequh.p"
            case 'w':	 // 1 string to match.
              if (memcmp(NameR.data()+19, ".p", 2))
                break;
              return Intrinsic::ppc_altivec_vcmpequw_p;	 // "pc.altivec.vcmpequw.p"
            }
            break;
          }
          break;
        case 'g':	 // 8 strings to match.
          switch (NameR[16]) {
          default: break;
          case 'e':	 // 1 string to match.
            if (memcmp(NameR.data()+17, "fp.p", 4))
              break;
            return Intrinsic::ppc_altivec_vcmpgefp_p;	 // "pc.altivec.vcmpgefp.p"
          case 't':	 // 7 strings to match.
            switch (NameR[17]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "p.p", 3))
                break;
              return Intrinsic::ppc_altivec_vcmpgtfp_p;	 // "pc.altivec.vcmpgtfp.p"
            case 's':	 // 3 strings to match.
              switch (NameR[18]) {
              default: break;
              case 'b':	 // 1 string to match.
                if (memcmp(NameR.data()+19, ".p", 2))
                  break;
                return Intrinsic::ppc_altivec_vcmpgtsb_p;	 // "pc.altivec.vcmpgtsb.p"
              case 'h':	 // 1 string to match.
                if (memcmp(NameR.data()+19, ".p", 2))
                  break;
                return Intrinsic::ppc_altivec_vcmpgtsh_p;	 // "pc.altivec.vcmpgtsh.p"
              case 'w':	 // 1 string to match.
                if (memcmp(NameR.data()+19, ".p", 2))
                  break;
                return Intrinsic::ppc_altivec_vcmpgtsw_p;	 // "pc.altivec.vcmpgtsw.p"
              }
              break;
            case 'u':	 // 3 strings to match.
              switch (NameR[18]) {
              default: break;
              case 'b':	 // 1 string to match.
                if (memcmp(NameR.data()+19, ".p", 2))
                  break;
                return Intrinsic::ppc_altivec_vcmpgtub_p;	 // "pc.altivec.vcmpgtub.p"
              case 'h':	 // 1 string to match.
                if (memcmp(NameR.data()+19, ".p", 2))
                  break;
                return Intrinsic::ppc_altivec_vcmpgtuh_p;	 // "pc.altivec.vcmpgtuh.p"
              case 'w':	 // 1 string to match.
                if (memcmp(NameR.data()+19, ".p", 2))
                  break;
                return Intrinsic::ppc_altivec_vcmpgtuw_p;	 // "pc.altivec.vcmpgtuw.p"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 'm':	 // 1 string to match.
        if (memcmp(NameR.data()+13, "hraddshs", 8))
          break;
        return Intrinsic::ppc_altivec_vmhraddshs;	 // "pc.altivec.vmhraddshs"
      }
      break;
    case 29:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "pc.is.decremented.ctr.nonzero", 29))
        break;
      return Intrinsic::ppc_is_decremented_ctr_nonzero;	 // "pc.is.decremented.ctr.nonzero"
    }
    break;  // end of 'p' case.
  case 'r':
    if (NameR.startswith("ound.")) return Intrinsic::round;
    if (NameR.startswith("int.")) return Intrinsic::rint;
    if (NameR.startswith("ead_register.")) return Intrinsic::read_register;
    switch (NameR.size()) {
    default: break;
    case 12:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "eturnaddress", 12))
        break;
      return Intrinsic::returnaddress;	 // "eturnaddress"
    case 15:	 // 4 strings to match.
      switch (NameR[0]) {
      default: break;
      case '6':	 // 3 strings to match.
        if (memcmp(NameR.data()+1, "00.read.tgid.", 13))
          break;
        switch (NameR[14]) {
        default: break;
        case 'x':	 // 1 string to match.
          return Intrinsic::r600_read_tgid_x;	 // "600.read.tgid.x"
        case 'y':	 // 1 string to match.
          return Intrinsic::r600_read_tgid_y;	 // "600.read.tgid.y"
        case 'z':	 // 1 string to match.
          return Intrinsic::r600_read_tgid_z;	 // "600.read.tgid.z"
        }
        break;
      case 'e':	 // 1 string to match.
        if (memcmp(NameR.data()+1, "adcyclecounter", 14))
          break;
        return Intrinsic::readcyclecounter;	 // "eadcyclecounter"
      }
      break;
    case 16:	 // 3 strings to match.
      if (memcmp(NameR.data()+0, "600.read.tidig.", 15))
        break;
      switch (NameR[15]) {
      default: break;
      case 'x':	 // 1 string to match.
        return Intrinsic::r600_read_tidig_x;	 // "600.read.tidig.x"
      case 'y':	 // 1 string to match.
        return Intrinsic::r600_read_tidig_y;	 // "600.read.tidig.y"
      case 'z':	 // 1 string to match.
        return Intrinsic::r600_read_tidig_z;	 // "600.read.tidig.z"
      }
      break;
    case 18:	 // 3 strings to match.
      if (memcmp(NameR.data()+0, "600.read.ngroups.", 17))
        break;
      switch (NameR[17]) {
      default: break;
      case 'x':	 // 1 string to match.
        return Intrinsic::r600_read_ngroups_x;	 // "600.read.ngroups.x"
      case 'y':	 // 1 string to match.
        return Intrinsic::r600_read_ngroups_y;	 // "600.read.ngroups.y"
      case 'z':	 // 1 string to match.
        return Intrinsic::r600_read_ngroups_z;	 // "600.read.ngroups.z"
      }
      break;
    case 21:	 // 3 strings to match.
      if (memcmp(NameR.data()+0, "600.read.local.size.", 20))
        break;
      switch (NameR[20]) {
      default: break;
      case 'x':	 // 1 string to match.
        return Intrinsic::r600_read_local_size_x;	 // "600.read.local.size.x"
      case 'y':	 // 1 string to match.
        return Intrinsic::r600_read_local_size_y;	 // "600.read.local.size.y"
      case 'z':	 // 1 string to match.
        return Intrinsic::r600_read_local_size_z;	 // "600.read.local.size.z"
      }
      break;
    case 22:	 // 3 strings to match.
      if (memcmp(NameR.data()+0, "600.read.global.size.", 21))
        break;
      switch (NameR[21]) {
      default: break;
      case 'x':	 // 1 string to match.
        return Intrinsic::r600_read_global_size_x;	 // "600.read.global.size.x"
      case 'y':	 // 1 string to match.
        return Intrinsic::r600_read_global_size_y;	 // "600.read.global.size.y"
      case 'z':	 // 1 string to match.
        return Intrinsic::r600_read_global_size_z;	 // "600.read.global.size.z"
      }
      break;
    }
    break;  // end of 'r' case.
  case 's':
    if (NameR.startswith("sub.with.overflow.")) return Intrinsic::ssub_with_overflow;
    if (NameR.startswith("qrt.")) return Intrinsic::sqrt;
    if (NameR.startswith("mul.with.overflow.")) return Intrinsic::smul_with_overflow;
    if (NameR.startswith("in.")) return Intrinsic::sin;
    if (NameR.startswith("add.with.overflow.")) return Intrinsic::sadd_with_overflow;
    switch (NameR.size()) {
    default: break;
    case 5:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "etjmp", 5))
        break;
      return Intrinsic::setjmp;	 // "etjmp"
    case 8:	 // 2 strings to match.
      switch (NameR[0]) {
      default: break;
      case 'i':	 // 1 string to match.
        if (memcmp(NameR.data()+1, "gsetjmp", 7))
          break;
        return Intrinsic::sigsetjmp;	 // "igsetjmp"
      case 't':	 // 1 string to match.
        if (memcmp(NameR.data()+1, "acksave", 7))
          break;
        return Intrinsic::stacksave;	 // "tacksave"
      }
      break;
    case 9:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "iglongjmp", 9))
        break;
      return Intrinsic::siglongjmp;	 // "iglongjmp"
    case 11:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "tackrestore", 11))
        break;
      return Intrinsic::stackrestore;	 // "tackrestore"
    case 13:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "tackprotector", 13))
        break;
      return Intrinsic::stackprotector;	 // "tackprotector"
    case 18:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "tackprotectorcheck", 18))
        break;
      return Intrinsic::stackprotectorcheck;	 // "tackprotectorcheck"
    }
    break;  // end of 's' case.
  case 't':
    if (NameR.startswith("runc.")) return Intrinsic::trunc;
    switch (NameR.size()) {
    default: break;
    case 3:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "rap", 3))
        break;
      return Intrinsic::trap;	 // "rap"
    }
    break;  // end of 't' case.
  case 'u':
    if (NameR.startswith("sub.with.overflow.")) return Intrinsic::usub_with_overflow;
    if (NameR.startswith("mul.with.overflow.")) return Intrinsic::umul_with_overflow;
    if (NameR.startswith("add.with.overflow.")) return Intrinsic::uadd_with_overflow;
    break;  // end of 'u' case.
  case 'v':
    switch (NameR.size()) {
    default: break;
    case 5:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "a_end", 5))
        break;
      return Intrinsic::vaend;	 // "a_end"
    case 6:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "a_copy", 6))
        break;
      return Intrinsic::vacopy;	 // "a_copy"
    case 7:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "a_start", 7))
        break;
      return Intrinsic::vastart;	 // "a_start"
    case 13:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "ar.annotation", 13))
        break;
      return Intrinsic::var_annotation;	 // "ar.annotation"
    }
    break;  // end of 'v' case.
  case 'w':
    if (NameR.startswith("rite_register.")) return Intrinsic::write_register;
    break;  // end of 'w' case.
  case 'x':
    if (NameR.startswith("core.testwct.")) return Intrinsic::xcore_testwct;
    if (NameR.startswith("core.testct.")) return Intrinsic::xcore_testct;
    if (NameR.startswith("core.syncr.")) return Intrinsic::xcore_syncr;
    if (NameR.startswith("core.setv.")) return Intrinsic::xcore_setv;
    if (NameR.startswith("core.settw.")) return Intrinsic::xcore_settw;
    if (NameR.startswith("core.setrdy.")) return Intrinsic::xcore_setrdy;
    if (NameR.startswith("core.setpt.")) return Intrinsic::xcore_setpt;
    if (NameR.startswith("core.setpsc.")) return Intrinsic::xcore_setpsc;
    if (NameR.startswith("core.setev.")) return Intrinsic::xcore_setev;
    if (NameR.startswith("core.setd.")) return Intrinsic::xcore_setd;
    if (NameR.startswith("core.setclk.")) return Intrinsic::xcore_setclk;
    if (NameR.startswith("core.setc.")) return Intrinsic::xcore_setc;
    if (NameR.startswith("core.peek.")) return Intrinsic::xcore_peek;
    if (NameR.startswith("core.outt.")) return Intrinsic::xcore_outt;
    if (NameR.startswith("core.outshr.")) return Intrinsic::xcore_outshr;
    if (NameR.startswith("core.outct.")) return Intrinsic::xcore_outct;
    if (NameR.startswith("core.out.")) return Intrinsic::xcore_out;
    if (NameR.startswith("core.msync.")) return Intrinsic::xcore_msync;
    if (NameR.startswith("core.mjoin.")) return Intrinsic::xcore_mjoin;
    if (NameR.startswith("core.int.")) return Intrinsic::xcore_int;
    if (NameR.startswith("core.inshr.")) return Intrinsic::xcore_inshr;
    if (NameR.startswith("core.initsp.")) return Intrinsic::xcore_initsp;
    if (NameR.startswith("core.initpc.")) return Intrinsic::xcore_initpc;
    if (NameR.startswith("core.initlr.")) return Intrinsic::xcore_initlr;
    if (NameR.startswith("core.initdp.")) return Intrinsic::xcore_initdp;
    if (NameR.startswith("core.initcp.")) return Intrinsic::xcore_initcp;
    if (NameR.startswith("core.inct.")) return Intrinsic::xcore_inct;
    if (NameR.startswith("core.in.")) return Intrinsic::xcore_in;
    if (NameR.startswith("core.getts.")) return Intrinsic::xcore_getts;
    if (NameR.startswith("core.getst.")) return Intrinsic::xcore_getst;
    if (NameR.startswith("core.getr.")) return Intrinsic::xcore_getr;
    if (NameR.startswith("core.freer.")) return Intrinsic::xcore_freer;
    if (NameR.startswith("core.endin.")) return Intrinsic::xcore_endin;
    if (NameR.startswith("core.eeu.")) return Intrinsic::xcore_eeu;
    if (NameR.startswith("core.edu.")) return Intrinsic::xcore_edu;
    if (NameR.startswith("core.clrpt.")) return Intrinsic::xcore_clrpt;
    if (NameR.startswith("core.chkct.")) return Intrinsic::xcore_chkct;
    switch (NameR.size()) {
    default: break;
    case 6:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "86.int", 6))
        break;
      return Intrinsic::x86_int;	 // "86.int"
    case 7:	 // 1 string to match.
      if (memcmp(NameR.data()+0, "86.xend", 7))
        break;
      return Intrinsic::x86_xend;	 // "86.xend"
    case 8:	 // 3 strings to match.
      if (memcmp(NameR.data()+0, "86.", 3))
        break;
      switch (NameR[3]) {
      default: break;
      case 'r':	 // 2 strings to match.
        if (NameR[4] != 'd')
          break;
        switch (NameR[5]) {
        default: break;
        case 'p':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "mc", 2))
            break;
          return Intrinsic::x86_rdpmc;	 // "86.rdpmc"
        case 't':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "sc", 2))
            break;
          return Intrinsic::x86_rdtsc;	 // "86.rdtsc"
        }
        break;
      case 'x':	 // 1 string to match.
        if (memcmp(NameR.data()+4, "test", 4))
          break;
        return Intrinsic::x86_xtest;	 // "86.xtest"
      }
      break;
    case 9:	 // 7 strings to match.
      switch (NameR[0]) {
      default: break;
      case '8':	 // 3 strings to match.
        if (memcmp(NameR.data()+1, "6.", 2))
          break;
        switch (NameR[3]) {
        default: break;
        case 'r':	 // 1 string to match.
          if (memcmp(NameR.data()+4, "dtscp", 5))
            break;
          return Intrinsic::x86_rdtscp;	 // "86.rdtscp"
        case 'x':	 // 2 strings to match.
          switch (NameR[4]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(NameR.data()+5, "bort", 4))
              break;
            return Intrinsic::x86_xabort;	 // "86.xabort"
          case 'b':	 // 1 string to match.
            if (memcmp(NameR.data()+5, "egin", 4))
              break;
            return Intrinsic::x86_xbegin;	 // "86.xbegin"
          }
          break;
        }
        break;
      case 'c':	 // 4 strings to match.
        if (memcmp(NameR.data()+1, "ore.", 4))
          break;
        switch (NameR[5]) {
        default: break;
        case 'c':	 // 2 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'l':	 // 1 string to match.
            if (memcmp(NameR.data()+7, "re", 2))
              break;
            return Intrinsic::xcore_clre;	 // "core.clre"
          case 'r':	 // 1 string to match.
            if (memcmp(NameR.data()+7, "c8", 2))
              break;
            return Intrinsic::xcore_crc8;	 // "core.crc8"
          }
          break;
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "ext", 3))
            break;
          return Intrinsic::xcore_sext;	 // "core.sext"
        case 'z':	 // 1 string to match.
          if (memcmp(NameR.data()+6, "ext", 3))
            break;
          return Intrinsic::xcore_zext;	 // "core.zext"
        }
        break;
      }
      break;
    case 10:	 // 10 strings to match.
      switch (NameR[0]) {
      default: break;
      case '8':	 // 1 string to match.
        if (memcmp(NameR.data()+1, "6.mmx.por", 9))
          break;
        return Intrinsic::x86_mmx_por;	 // "86.mmx.por"
      case 'c':	 // 9 strings to match.
        if (memcmp(NameR.data()+1, "ore.", 4))
          break;
        switch (NameR[5]) {
        default: break;
        case 'c':	 // 2 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'l':	 // 1 string to match.
            if (memcmp(NameR.data()+7, "rsr", 3))
              break;
            return Intrinsic::xcore_clrsr;	 // "core.clrsr"
          case 'r':	 // 1 string to match.
            if (memcmp(NameR.data()+7, "c32", 3))
              break;
            return Intrinsic::xcore_crc32;	 // "core.crc32"
          }
          break;
        case 'g':	 // 4 strings to match.
          if (memcmp(NameR.data()+6, "et", 2))
            break;
          switch (NameR[8]) {
          default: break;
          case 'e':	 // 2 strings to match.
            switch (NameR[9]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::xcore_geted;	 // "core.geted"
            case 't':	 // 1 string to match.
              return Intrinsic::xcore_getet;	 // "core.getet"
            }
            break;
          case 'i':	 // 1 string to match.
            if (NameR[9] != 'd')
              break;
            return Intrinsic::xcore_getid;	 // "core.getid"
          case 'p':	 // 1 string to match.
            if (NameR[9] != 's')
              break;
            return Intrinsic::xcore_getps;	 // "core.getps"
          }
          break;
        case 's':	 // 3 strings to match.
          switch (NameR[6]) {
          default: break;
          case 'e':	 // 2 strings to match.
            if (NameR[7] != 't')
              break;
            switch (NameR[8]) {
            default: break;
            case 'p':	 // 1 string to match.
              if (NameR[9] != 's')
                break;
              return Intrinsic::xcore_setps;	 // "core.setps"
            case 's':	 // 1 string to match.
              if (NameR[9] != 'r')
                break;
              return Intrinsic::xcore_setsr;	 // "core.setsr"
            }
            break;
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+7, "ync", 3))
              break;
            return Intrinsic::xcore_ssync;	 // "core.ssync"
          }
          break;
        }
        break;
      }
      break;
    case 11:	 // 6 strings to match.
      switch (NameR[0]) {
      default: break;
      case '8':	 // 5 strings to match.
        if (memcmp(NameR.data()+1, "6.", 2))
          break;
        switch (NameR[3]) {
        default: break;
        case 'm':	 // 3 strings to match.
          if (memcmp(NameR.data()+4, "mx.", 3))
            break;
          switch (NameR[7]) {
          default: break;
          case 'e':	 // 1 string to match.
            if (memcmp(NameR.data()+8, "mms", 3))
              break;
            return Intrinsic::x86_mmx_emms;	 // "86.mmx.emms"
          case 'p':	 // 2 strings to match.
            switch (NameR[8]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(NameR.data()+9, "nd", 2))
                break;
              return Intrinsic::x86_mmx_pand;	 // "86.mmx.pand"
            case 'x':	 // 1 string to match.
              if (memcmp(NameR.data()+9, "or", 2))
                break;
              return Intrinsic::x86_mmx_pxor;	 // "86.mmx.pxor"
            }
            break;
          }
          break;
        case 's':	 // 2 strings to match.
          if (memcmp(NameR.data()+4, "ha1msg", 6))
            break;
          switch (NameR[10]) {
          default: break;
          case '1':	 // 1 string to match.
            return Intrinsic::x86_sha1msg1;	 // "86.sha1msg1"
          case '2':	 // 1 string to match.
            return Intrinsic::x86_sha1msg2;	 // "86.sha1msg2"
          }
          break;
        }
        break;
      case 'c':	 // 1 string to match.
        if (memcmp(NameR.data()+1, "ore.bitrev", 10))
          break;
        return Intrinsic::xcore_bitrev;	 // "core.bitrev"
      }
      break;
    case 12:	 // 11 strings to match.
      if (memcmp(NameR.data()+0, "86.", 3))
        break;
      switch (NameR[3]) {
      default: break;
      case 'm':	 // 2 strings to match.
        if (memcmp(NameR.data()+4, "mx.", 3))
          break;
        switch (NameR[7]) {
        default: break;
        case 'f':	 // 1 string to match.
          if (memcmp(NameR.data()+8, "emms", 4))
            break;
          return Intrinsic::x86_mmx_femms;	 // "86.mmx.femms"
        case 'p':	 // 1 string to match.
          if (memcmp(NameR.data()+8, "andn", 4))
            break;
          return Intrinsic::x86_mmx_pandn;	 // "86.mmx.pandn"
        }
        break;
      case 'p':	 // 1 string to match.
        if (memcmp(NameR.data()+4, "clmulqdq", 8))
          break;
        return Intrinsic::x86_pclmulqdq;	 // "86.pclmulqdq"
      case 'r':	 // 6 strings to match.
        if (NameR[4] != 'd')
          break;
        switch (NameR[5]) {
        default: break;
        case 'r':	 // 3 strings to match.
          if (memcmp(NameR.data()+6, "and.", 4))
            break;
          switch (NameR[10]) {
          default: break;
          case '1':	 // 1 string to match.
            if (NameR[11] != '6')
              break;
            return Intrinsic::x86_rdrand_16;	 // "86.rdrand.16"
          case '3':	 // 1 string to match.
            if (NameR[11] != '2')
              break;
            return Intrinsic::x86_rdrand_32;	 // "86.rdrand.32"
          case '6':	 // 1 string to match.
            if (NameR[11] != '4')
              break;
            return Intrinsic::x86_rdrand_64;	 // "86.rdrand.64"
          }
          break;
        case 's':	 // 3 strings to match.
          if (memcmp(NameR.data()+6, "eed.", 4))
            break;
          switch (NameR[10]) {
          default: break;
          case '1':	 // 1 string to match.
            if (NameR[11] != '6')
              break;
            return Intrinsic::x86_rdseed_16;	 // "86.rdseed.16"
          case '3':	 // 1 string to match.
            if (NameR[11] != '2')
              break;
            return Intrinsic::x86_rdseed_32;	 // "86.rdseed.32"
          case '6':	 // 1 string to match.
            if (NameR[11] != '4')
              break;
            return Intrinsic::x86_rdseed_64;	 // "86.rdseed.64"
          }
          break;
        }
        break;
      case 's':	 // 2 strings to match.
        if (memcmp(NameR.data()+4, "ha1", 3))
          break;
        switch (NameR[7]) {
        default: break;
        case 'n':	 // 1 string to match.
          if (memcmp(NameR.data()+8, "exte", 4))
            break;
          return Intrinsic::x86_sha1nexte;	 // "86.sha1nexte"
        case 'r':	 // 1 string to match.
          if (memcmp(NameR.data()+8, "nds4", 4))
            break;
          return Intrinsic::x86_sha1rnds4;	 // "86.sha1rnds4"
        }
        break;
      }
      break;
    case 13:	 // 56 strings to match.
      if (memcmp(NameR.data()+0, "86.", 3))
        break;
      switch (NameR[3]) {
      default: break;
      case 'a':	 // 1 string to match.
        if (memcmp(NameR.data()+4, "vx2.permd", 9))
          break;
        return Intrinsic::x86_avx2_permd;	 // "86.avx2.permd"
      case 'm':	 // 18 strings to match.
        if (memcmp(NameR.data()+4, "mx.p", 4))
          break;
        switch (NameR[8]) {
        default: break;
        case 'a':	 // 6 strings to match.
          switch (NameR[9]) {
          default: break;
          case 'd':	 // 4 strings to match.
            if (memcmp(NameR.data()+10, "d.", 2))
              break;
            switch (NameR[12]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::x86_mmx_padd_b;	 // "86.mmx.padd.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_mmx_padd_d;	 // "86.mmx.padd.d"
            case 'q':	 // 1 string to match.
              return Intrinsic::x86_mmx_padd_q;	 // "86.mmx.padd.q"
            case 'w':	 // 1 string to match.
              return Intrinsic::x86_mmx_padd_w;	 // "86.mmx.padd.w"
            }
            break;
          case 'v':	 // 2 strings to match.
            if (memcmp(NameR.data()+10, "g.", 2))
              break;
            switch (NameR[12]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::x86_mmx_pavg_b;	 // "86.mmx.pavg.b"
            case 'w':	 // 1 string to match.
              return Intrinsic::x86_mmx_pavg_w;	 // "86.mmx.pavg.w"
            }
            break;
          }
          break;
        case 's':	 // 12 strings to match.
          switch (NameR[9]) {
          default: break;
          case 'l':	 // 3 strings to match.
            if (memcmp(NameR.data()+10, "l.", 2))
              break;
            switch (NameR[12]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_mmx_psll_d;	 // "86.mmx.psll.d"
            case 'q':	 // 1 string to match.
              return Intrinsic::x86_mmx_psll_q;	 // "86.mmx.psll.q"
            case 'w':	 // 1 string to match.
              return Intrinsic::x86_mmx_psll_w;	 // "86.mmx.psll.w"
            }
            break;
          case 'r':	 // 5 strings to match.
            switch (NameR[10]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (NameR[11] != '.')
                break;
              switch (NameR[12]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_mmx_psra_d;	 // "86.mmx.psra.d"
              case 'w':	 // 1 string to match.
                return Intrinsic::x86_mmx_psra_w;	 // "86.mmx.psra.w"
              }
              break;
            case 'l':	 // 3 strings to match.
              if (NameR[11] != '.')
                break;
              switch (NameR[12]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_mmx_psrl_d;	 // "86.mmx.psrl.d"
              case 'q':	 // 1 string to match.
                return Intrinsic::x86_mmx_psrl_q;	 // "86.mmx.psrl.q"
              case 'w':	 // 1 string to match.
                return Intrinsic::x86_mmx_psrl_w;	 // "86.mmx.psrl.w"
              }
              break;
            }
            break;
          case 'u':	 // 4 strings to match.
            if (memcmp(NameR.data()+10, "b.", 2))
              break;
            switch (NameR[12]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::x86_mmx_psub_b;	 // "86.mmx.psub.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_mmx_psub_d;	 // "86.mmx.psub.d"
            case 'q':	 // 1 string to match.
              return Intrinsic::x86_mmx_psub_q;	 // "86.mmx.psub.q"
            case 'w':	 // 1 string to match.
              return Intrinsic::x86_mmx_psub_w;	 // "86.mmx.psub.w"
            }
            break;
          }
          break;
        }
        break;
      case 's':	 // 19 strings to match.
        switch (NameR[4]) {
        default: break;
        case 'h':	 // 2 strings to match.
          if (memcmp(NameR.data()+5, "a256msg", 7))
            break;
          switch (NameR[12]) {
          default: break;
          case '1':	 // 1 string to match.
            return Intrinsic::x86_sha256msg1;	 // "86.sha256msg1"
          case '2':	 // 1 string to match.
            return Intrinsic::x86_sha256msg2;	 // "86.sha256msg2"
          }
          break;
        case 's':	 // 17 strings to match.
          if (NameR[5] != 'e')
            break;
          switch (NameR[6]) {
          default: break;
          case '.':	 // 13 strings to match.
            switch (NameR[7]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(NameR.data()+8, "dd.ss", 5))
                break;
              return Intrinsic::x86_sse_add_ss;	 // "86.sse.add.ss"
            case 'c':	 // 2 strings to match.
              if (memcmp(NameR.data()+8, "mp.", 3))
                break;
              switch (NameR[11]) {
              default: break;
              case 'p':	 // 1 string to match.
                if (NameR[12] != 's')
                  break;
                return Intrinsic::x86_sse_cmp_ps;	 // "86.sse.cmp.ps"
              case 's':	 // 1 string to match.
                if (NameR[12] != 's')
                  break;
                return Intrinsic::x86_sse_cmp_ss;	 // "86.sse.cmp.ss"
              }
              break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+8, "iv.ss", 5))
                break;
              return Intrinsic::x86_sse_div_ss;	 // "86.sse.div.ss"
            case 'm':	 // 5 strings to match.
              switch (NameR[8]) {
              default: break;
              case 'a':	 // 2 strings to match.
                if (memcmp(NameR.data()+9, "x.", 2))
                  break;
                switch (NameR[11]) {
                default: break;
                case 'p':	 // 1 string to match.
                  if (NameR[12] != 's')
                    break;
                  return Intrinsic::x86_sse_max_ps;	 // "86.sse.max.ps"
                case 's':	 // 1 string to match.
                  if (NameR[12] != 's')
                    break;
                  return Intrinsic::x86_sse_max_ss;	 // "86.sse.max.ss"
                }
                break;
              case 'i':	 // 2 strings to match.
                if (memcmp(NameR.data()+9, "n.", 2))
                  break;
                switch (NameR[11]) {
                default: break;
                case 'p':	 // 1 string to match.
                  if (NameR[12] != 's')
                    break;
                  return Intrinsic::x86_sse_min_ps;	 // "86.sse.min.ps"
                case 's':	 // 1 string to match.
                  if (NameR[12] != 's')
                    break;
                  return Intrinsic::x86_sse_min_ss;	 // "86.sse.min.ss"
                }
                break;
              case 'u':	 // 1 string to match.
                if (memcmp(NameR.data()+9, "l.ss", 4))
                  break;
                return Intrinsic::x86_sse_mul_ss;	 // "86.sse.mul.ss"
              }
              break;
            case 'r':	 // 2 strings to match.
              if (memcmp(NameR.data()+8, "cp.", 3))
                break;
              switch (NameR[11]) {
              default: break;
              case 'p':	 // 1 string to match.
                if (NameR[12] != 's')
                  break;
                return Intrinsic::x86_sse_rcp_ps;	 // "86.sse.rcp.ps"
              case 's':	 // 1 string to match.
                if (NameR[12] != 's')
                  break;
                return Intrinsic::x86_sse_rcp_ss;	 // "86.sse.rcp.ss"
              }
              break;
            case 's':	 // 2 strings to match.
              switch (NameR[8]) {
              default: break;
              case 'f':	 // 1 string to match.
                if (memcmp(NameR.data()+9, "ence", 4))
                  break;
                return Intrinsic::x86_sse_sfence;	 // "86.sse.sfence"
              case 'u':	 // 1 string to match.
                if (memcmp(NameR.data()+9, "b.ss", 4))
                  break;
                return Intrinsic::x86_sse_sub_ss;	 // "86.sse.sub.ss"
              }
              break;
            }
            break;
          case '2':	 // 1 string to match.
            if (memcmp(NameR.data()+7, ".pause", 6))
              break;
            return Intrinsic::x86_sse2_pause;	 // "86.sse2.pause"
          case '3':	 // 1 string to match.
            if (memcmp(NameR.data()+7, ".mwait", 6))
              break;
            return Intrinsic::x86_sse3_mwait;	 // "86.sse3.mwait"
          case '4':	 // 2 strings to match.
            if (memcmp(NameR.data()+7, "1.dpp", 5))
              break;
            switch (NameR[12]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_sse41_dppd;	 // "86.sse41.dppd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_sse41_dpps;	 // "86.sse41.dpps"
            }
            break;
          }
          break;
        }
        break;
      case 'x':	 // 18 strings to match.
        if (memcmp(NameR.data()+4, "op.vp", 5))
          break;
        switch (NameR[9]) {
        default: break;
        case 'c':	 // 5 strings to match.
          switch (NameR[10]) {
          default: break;
          case 'm':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "ov", 2))
              break;
            return Intrinsic::x86_xop_vpcmov;	 // "86.xop.vpcmov"
          case 'o':	 // 4 strings to match.
            if (NameR[11] != 'm')
              break;
            switch (NameR[12]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::x86_xop_vpcomb;	 // "86.xop.vpcomb"
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_xop_vpcomd;	 // "86.xop.vpcomd"
            case 'q':	 // 1 string to match.
              return Intrinsic::x86_xop_vpcomq;	 // "86.xop.vpcomq"
            case 'w':	 // 1 string to match.
              return Intrinsic::x86_xop_vpcomw;	 // "86.xop.vpcomw"
            }
            break;
          }
          break;
        case 'p':	 // 1 string to match.
          if (memcmp(NameR.data()+10, "erm", 3))
            break;
          return Intrinsic::x86_xop_vpperm;	 // "86.xop.vpperm"
        case 'r':	 // 4 strings to match.
          if (memcmp(NameR.data()+10, "ot", 2))
            break;
          switch (NameR[12]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::x86_xop_vprotb;	 // "86.xop.vprotb"
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_xop_vprotd;	 // "86.xop.vprotd"
          case 'q':	 // 1 string to match.
            return Intrinsic::x86_xop_vprotq;	 // "86.xop.vprotq"
          case 'w':	 // 1 string to match.
            return Intrinsic::x86_xop_vprotw;	 // "86.xop.vprotw"
          }
          break;
        case 's':	 // 8 strings to match.
          if (NameR[10] != 'h')
            break;
          switch (NameR[11]) {
          default: break;
          case 'a':	 // 4 strings to match.
            switch (NameR[12]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::x86_xop_vpshab;	 // "86.xop.vpshab"
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_xop_vpshad;	 // "86.xop.vpshad"
            case 'q':	 // 1 string to match.
              return Intrinsic::x86_xop_vpshaq;	 // "86.xop.vpshaq"
            case 'w':	 // 1 string to match.
              return Intrinsic::x86_xop_vpshaw;	 // "86.xop.vpshaw"
            }
            break;
          case 'l':	 // 4 strings to match.
            switch (NameR[12]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::x86_xop_vpshlb;	 // "86.xop.vpshlb"
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_xop_vpshld;	 // "86.xop.vpshld"
            case 'q':	 // 1 string to match.
              return Intrinsic::x86_xop_vpshlq;	 // "86.xop.vpshlq"
            case 'w':	 // 1 string to match.
              return Intrinsic::x86_xop_vpshlw;	 // "86.xop.vpshlw"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 14:	 // 97 strings to match.
      switch (NameR[0]) {
      default: break;
      case '8':	 // 96 strings to match.
        if (memcmp(NameR.data()+1, "6.", 2))
          break;
        switch (NameR[3]) {
        default: break;
        case '3':	 // 9 strings to match.
          if (memcmp(NameR.data()+4, "dnow.p", 6))
            break;
          switch (NameR[10]) {
          default: break;
          case 'f':	 // 8 strings to match.
            switch (NameR[11]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "id", 2))
                break;
              return Intrinsic::x86_3dnow_pf2id;	 // "86.3dnow.pf2id"
            case 'a':	 // 2 strings to match.
              switch (NameR[12]) {
              default: break;
              case 'c':	 // 1 string to match.
                if (NameR[13] != 'c')
                  break;
                return Intrinsic::x86_3dnow_pfacc;	 // "86.3dnow.pfacc"
              case 'd':	 // 1 string to match.
                if (NameR[13] != 'd')
                  break;
                return Intrinsic::x86_3dnow_pfadd;	 // "86.3dnow.pfadd"
              }
              break;
            case 'm':	 // 3 strings to match.
              switch (NameR[12]) {
              default: break;
              case 'a':	 // 1 string to match.
                if (NameR[13] != 'x')
                  break;
                return Intrinsic::x86_3dnow_pfmax;	 // "86.3dnow.pfmax"
              case 'i':	 // 1 string to match.
                if (NameR[13] != 'n')
                  break;
                return Intrinsic::x86_3dnow_pfmin;	 // "86.3dnow.pfmin"
              case 'u':	 // 1 string to match.
                if (NameR[13] != 'l')
                  break;
                return Intrinsic::x86_3dnow_pfmul;	 // "86.3dnow.pfmul"
              }
              break;
            case 'r':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "cp", 2))
                break;
              return Intrinsic::x86_3dnow_pfrcp;	 // "86.3dnow.pfrcp"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "ub", 2))
                break;
              return Intrinsic::x86_3dnow_pfsub;	 // "86.3dnow.pfsub"
            }
            break;
          case 'i':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "2fd", 3))
              break;
            return Intrinsic::x86_3dnow_pi2fd;	 // "86.3dnow.pi2fd"
          }
          break;
        case 'a':	 // 14 strings to match.
          if (memcmp(NameR.data()+4, "vx2.p", 5))
            break;
          switch (NameR[9]) {
          default: break;
          case 'a':	 // 5 strings to match.
            switch (NameR[10]) {
            default: break;
            case 'b':	 // 3 strings to match.
              if (memcmp(NameR.data()+11, "s.", 2))
                break;
              switch (NameR[13]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::x86_avx2_pabs_b;	 // "86.avx2.pabs.b"
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_avx2_pabs_d;	 // "86.avx2.pabs.d"
              case 'w':	 // 1 string to match.
                return Intrinsic::x86_avx2_pabs_w;	 // "86.avx2.pabs.w"
              }
              break;
            case 'v':	 // 2 strings to match.
              if (memcmp(NameR.data()+11, "g.", 2))
                break;
              switch (NameR[13]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::x86_avx2_pavg_b;	 // "86.avx2.pavg.b"
              case 'w':	 // 1 string to match.
                return Intrinsic::x86_avx2_pavg_w;	 // "86.avx2.pavg.w"
              }
              break;
            }
            break;
          case 'e':	 // 1 string to match.
            if (memcmp(NameR.data()+10, "rmps", 4))
              break;
            return Intrinsic::x86_avx2_permps;	 // "86.avx2.permps"
          case 's':	 // 8 strings to match.
            switch (NameR[10]) {
            default: break;
            case 'l':	 // 3 strings to match.
              if (memcmp(NameR.data()+11, "l.", 2))
                break;
              switch (NameR[13]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_avx2_psll_d;	 // "86.avx2.psll.d"
              case 'q':	 // 1 string to match.
                return Intrinsic::x86_avx2_psll_q;	 // "86.avx2.psll.q"
              case 'w':	 // 1 string to match.
                return Intrinsic::x86_avx2_psll_w;	 // "86.avx2.psll.w"
              }
              break;
            case 'r':	 // 5 strings to match.
              switch (NameR[11]) {
              default: break;
              case 'a':	 // 2 strings to match.
                if (NameR[12] != '.')
                  break;
                switch (NameR[13]) {
                default: break;
                case 'd':	 // 1 string to match.
                  return Intrinsic::x86_avx2_psra_d;	 // "86.avx2.psra.d"
                case 'w':	 // 1 string to match.
                  return Intrinsic::x86_avx2_psra_w;	 // "86.avx2.psra.w"
                }
                break;
              case 'l':	 // 3 strings to match.
                if (NameR[12] != '.')
                  break;
                switch (NameR[13]) {
                default: break;
                case 'd':	 // 1 string to match.
                  return Intrinsic::x86_avx2_psrl_d;	 // "86.avx2.psrl.d"
                case 'q':	 // 1 string to match.
                  return Intrinsic::x86_avx2_psrl_q;	 // "86.avx2.psrl.q"
                case 'w':	 // 1 string to match.
                  return Intrinsic::x86_avx2_psrl_w;	 // "86.avx2.psrl.w"
                }
                break;
              }
              break;
            }
            break;
          }
          break;
        case 'b':	 // 6 strings to match.
          if (memcmp(NameR.data()+4, "mi.", 3))
            break;
          switch (NameR[7]) {
          default: break;
          case 'b':	 // 2 strings to match.
            if (memcmp(NameR.data()+8, "zhi.", 4))
              break;
            switch (NameR[12]) {
            default: break;
            case '3':	 // 1 string to match.
              if (NameR[13] != '2')
                break;
              return Intrinsic::x86_bmi_bzhi_32;	 // "86.bmi.bzhi.32"
            case '6':	 // 1 string to match.
              if (NameR[13] != '4')
                break;
              return Intrinsic::x86_bmi_bzhi_64;	 // "86.bmi.bzhi.64"
            }
            break;
          case 'p':	 // 4 strings to match.
            switch (NameR[8]) {
            default: break;
            case 'd':	 // 2 strings to match.
              if (memcmp(NameR.data()+9, "ep.", 3))
                break;
              switch (NameR[12]) {
              default: break;
              case '3':	 // 1 string to match.
                if (NameR[13] != '2')
                  break;
                return Intrinsic::x86_bmi_pdep_32;	 // "86.bmi.pdep.32"
              case '6':	 // 1 string to match.
                if (NameR[13] != '4')
                  break;
                return Intrinsic::x86_bmi_pdep_64;	 // "86.bmi.pdep.64"
              }
              break;
            case 'e':	 // 2 strings to match.
              if (memcmp(NameR.data()+9, "xt.", 3))
                break;
              switch (NameR[12]) {
              default: break;
              case '3':	 // 1 string to match.
                if (NameR[13] != '2')
                  break;
                return Intrinsic::x86_bmi_pext_32;	 // "86.bmi.pext.32"
              case '6':	 // 1 string to match.
                if (NameR[13] != '4')
                  break;
                return Intrinsic::x86_bmi_pext_64;	 // "86.bmi.pext.64"
              }
              break;
            }
            break;
          }
          break;
        case 'm':	 // 21 strings to match.
          if (memcmp(NameR.data()+4, "mx.p", 4))
            break;
          switch (NameR[8]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (memcmp(NameR.data()+9, "dds.", 4))
              break;
            switch (NameR[13]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::x86_mmx_padds_b;	 // "86.mmx.padds.b"
            case 'w':	 // 1 string to match.
              return Intrinsic::x86_mmx_padds_w;	 // "86.mmx.padds.w"
            }
            break;
          case 'e':	 // 1 string to match.
            if (memcmp(NameR.data()+9, "xtr.w", 5))
              break;
            return Intrinsic::x86_mmx_pextr_w;	 // "86.mmx.pextr.w"
          case 'i':	 // 1 string to match.
            if (memcmp(NameR.data()+9, "nsr.w", 5))
              break;
            return Intrinsic::x86_mmx_pinsr_w;	 // "86.mmx.pinsr.w"
          case 'm':	 // 6 strings to match.
            switch (NameR[9]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (NameR[10] != 'x')
                break;
              switch (NameR[11]) {
              default: break;
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+12, ".w", 2))
                  break;
                return Intrinsic::x86_mmx_pmaxs_w;	 // "86.mmx.pmaxs.w"
              case 'u':	 // 1 string to match.
                if (memcmp(NameR.data()+12, ".b", 2))
                  break;
                return Intrinsic::x86_mmx_pmaxu_b;	 // "86.mmx.pmaxu.b"
              }
              break;
            case 'i':	 // 2 strings to match.
              if (NameR[10] != 'n')
                break;
              switch (NameR[11]) {
              default: break;
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+12, ".w", 2))
                  break;
                return Intrinsic::x86_mmx_pmins_w;	 // "86.mmx.pmins.w"
              case 'u':	 // 1 string to match.
                if (memcmp(NameR.data()+12, ".b", 2))
                  break;
                return Intrinsic::x86_mmx_pminu_b;	 // "86.mmx.pminu.b"
              }
              break;
            case 'u':	 // 2 strings to match.
              if (NameR[10] != 'l')
                break;
              switch (NameR[11]) {
              default: break;
              case 'h':	 // 1 string to match.
                if (memcmp(NameR.data()+12, ".w", 2))
                  break;
                return Intrinsic::x86_mmx_pmulh_w;	 // "86.mmx.pmulh.w"
              case 'l':	 // 1 string to match.
                if (memcmp(NameR.data()+12, ".w", 2))
                  break;
                return Intrinsic::x86_mmx_pmull_w;	 // "86.mmx.pmull.w"
              }
              break;
            }
            break;
          case 's':	 // 11 strings to match.
            switch (NameR[9]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(NameR.data()+10, "d.bw", 4))
                break;
              return Intrinsic::x86_mmx_psad_bw;	 // "86.mmx.psad.bw"
            case 'l':	 // 3 strings to match.
              if (memcmp(NameR.data()+10, "li.", 3))
                break;
              switch (NameR[13]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_mmx_pslli_d;	 // "86.mmx.pslli.d"
              case 'q':	 // 1 string to match.
                return Intrinsic::x86_mmx_pslli_q;	 // "86.mmx.pslli.q"
              case 'w':	 // 1 string to match.
                return Intrinsic::x86_mmx_pslli_w;	 // "86.mmx.pslli.w"
              }
              break;
            case 'r':	 // 5 strings to match.
              switch (NameR[10]) {
              default: break;
              case 'a':	 // 2 strings to match.
                if (memcmp(NameR.data()+11, "i.", 2))
                  break;
                switch (NameR[13]) {
                default: break;
                case 'd':	 // 1 string to match.
                  return Intrinsic::x86_mmx_psrai_d;	 // "86.mmx.psrai.d"
                case 'w':	 // 1 string to match.
                  return Intrinsic::x86_mmx_psrai_w;	 // "86.mmx.psrai.w"
                }
                break;
              case 'l':	 // 3 strings to match.
                if (memcmp(NameR.data()+11, "i.", 2))
                  break;
                switch (NameR[13]) {
                default: break;
                case 'd':	 // 1 string to match.
                  return Intrinsic::x86_mmx_psrli_d;	 // "86.mmx.psrli.d"
                case 'q':	 // 1 string to match.
                  return Intrinsic::x86_mmx_psrli_q;	 // "86.mmx.psrli.q"
                case 'w':	 // 1 string to match.
                  return Intrinsic::x86_mmx_psrli_w;	 // "86.mmx.psrli.w"
                }
                break;
              }
              break;
            case 'u':	 // 2 strings to match.
              if (memcmp(NameR.data()+10, "bs.", 3))
                break;
              switch (NameR[13]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::x86_mmx_psubs_b;	 // "86.mmx.psubs.b"
              case 'w':	 // 1 string to match.
                return Intrinsic::x86_mmx_psubs_w;	 // "86.mmx.psubs.w"
              }
              break;
            }
            break;
          }
          break;
        case 'r':	 // 4 strings to match.
          if (NameR[4] != 'd')
            break;
          switch (NameR[5]) {
          default: break;
          case 'f':	 // 2 strings to match.
            if (memcmp(NameR.data()+6, "sbase.", 6))
              break;
            switch (NameR[12]) {
            default: break;
            case '3':	 // 1 string to match.
              if (NameR[13] != '2')
                break;
              return Intrinsic::x86_rdfsbase_32;	 // "86.rdfsbase.32"
            case '6':	 // 1 string to match.
              if (NameR[13] != '4')
                break;
              return Intrinsic::x86_rdfsbase_64;	 // "86.rdfsbase.64"
            }
            break;
          case 'g':	 // 2 strings to match.
            if (memcmp(NameR.data()+6, "sbase.", 6))
              break;
            switch (NameR[12]) {
            default: break;
            case '3':	 // 1 string to match.
              if (NameR[13] != '2')
                break;
              return Intrinsic::x86_rdgsbase_32;	 // "86.rdgsbase.32"
            case '6':	 // 1 string to match.
              if (NameR[13] != '4')
                break;
              return Intrinsic::x86_rdgsbase_64;	 // "86.rdgsbase.64"
            }
            break;
          }
          break;
        case 's':	 // 30 strings to match.
          switch (NameR[4]) {
          default: break;
          case 'h':	 // 1 string to match.
            if (memcmp(NameR.data()+5, "a256rnds2", 9))
              break;
            return Intrinsic::x86_sha256rnds2;	 // "86.sha256rnds2"
          case 's':	 // 29 strings to match.
            if (NameR[5] != 'e')
              break;
            switch (NameR[6]) {
            default: break;
            case '.':	 // 5 strings to match.
              switch (NameR[7]) {
              default: break;
              case 'l':	 // 1 string to match.
                if (memcmp(NameR.data()+8, "dmxcsr", 6))
                  break;
                return Intrinsic::x86_sse_ldmxcsr;	 // "86.sse.ldmxcsr"
              case 'p':	 // 1 string to match.
                if (memcmp(NameR.data()+8, "shuf.w", 6))
                  break;
                return Intrinsic::x86_sse_pshuf_w;	 // "86.sse.pshuf.w"
              case 's':	 // 3 strings to match.
                switch (NameR[8]) {
                default: break;
                case 'q':	 // 2 strings to match.
                  if (memcmp(NameR.data()+9, "rt.", 3))
                    break;
                  switch (NameR[12]) {
                  default: break;
                  case 'p':	 // 1 string to match.
                    if (NameR[13] != 's')
                      break;
                    return Intrinsic::x86_sse_sqrt_ps;	 // "86.sse.sqrt.ps"
                  case 's':	 // 1 string to match.
                    if (NameR[13] != 's')
                      break;
                    return Intrinsic::x86_sse_sqrt_ss;	 // "86.sse.sqrt.ss"
                  }
                  break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+9, "mxcsr", 5))
                    break;
                  return Intrinsic::x86_sse_stmxcsr;	 // "86.sse.stmxcsr"
                }
                break;
              }
              break;
            case '2':	 // 22 strings to match.
              if (NameR[7] != '.')
                break;
              switch (NameR[8]) {
              default: break;
              case 'a':	 // 1 string to match.
                if (memcmp(NameR.data()+9, "dd.sd", 5))
                  break;
                return Intrinsic::x86_sse2_add_sd;	 // "86.sse2.add.sd"
              case 'c':	 // 2 strings to match.
                if (memcmp(NameR.data()+9, "mp.", 3))
                  break;
                switch (NameR[12]) {
                default: break;
                case 'p':	 // 1 string to match.
                  if (NameR[13] != 'd')
                    break;
                  return Intrinsic::x86_sse2_cmp_pd;	 // "86.sse2.cmp.pd"
                case 's':	 // 1 string to match.
                  if (NameR[13] != 'd')
                    break;
                  return Intrinsic::x86_sse2_cmp_sd;	 // "86.sse2.cmp.sd"
                }
                break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+9, "iv.sd", 5))
                  break;
                return Intrinsic::x86_sse2_div_sd;	 // "86.sse2.div.sd"
              case 'l':	 // 1 string to match.
                if (memcmp(NameR.data()+9, "fence", 5))
                  break;
                return Intrinsic::x86_sse2_lfence;	 // "86.sse2.lfence"
              case 'm':	 // 6 strings to match.
                switch (NameR[9]) {
                default: break;
                case 'a':	 // 2 strings to match.
                  if (memcmp(NameR.data()+10, "x.", 2))
                    break;
                  switch (NameR[12]) {
                  default: break;
                  case 'p':	 // 1 string to match.
                    if (NameR[13] != 'd')
                      break;
                    return Intrinsic::x86_sse2_max_pd;	 // "86.sse2.max.pd"
                  case 's':	 // 1 string to match.
                    if (NameR[13] != 'd')
                      break;
                    return Intrinsic::x86_sse2_max_sd;	 // "86.sse2.max.sd"
                  }
                  break;
                case 'f':	 // 1 string to match.
                  if (memcmp(NameR.data()+10, "ence", 4))
                    break;
                  return Intrinsic::x86_sse2_mfence;	 // "86.sse2.mfence"
                case 'i':	 // 2 strings to match.
                  if (memcmp(NameR.data()+10, "n.", 2))
                    break;
                  switch (NameR[12]) {
                  default: break;
                  case 'p':	 // 1 string to match.
                    if (NameR[13] != 'd')
                      break;
                    return Intrinsic::x86_sse2_min_pd;	 // "86.sse2.min.pd"
                  case 's':	 // 1 string to match.
                    if (NameR[13] != 'd')
                      break;
                    return Intrinsic::x86_sse2_min_sd;	 // "86.sse2.min.sd"
                  }
                  break;
                case 'u':	 // 1 string to match.
                  if (memcmp(NameR.data()+10, "l.sd", 4))
                    break;
                  return Intrinsic::x86_sse2_mul_sd;	 // "86.sse2.mul.sd"
                }
                break;
              case 'p':	 // 10 strings to match.
                switch (NameR[9]) {
                default: break;
                case 'a':	 // 2 strings to match.
                  if (memcmp(NameR.data()+10, "vg.", 3))
                    break;
                  switch (NameR[13]) {
                  default: break;
                  case 'b':	 // 1 string to match.
                    return Intrinsic::x86_sse2_pavg_b;	 // "86.sse2.pavg.b"
                  case 'w':	 // 1 string to match.
                    return Intrinsic::x86_sse2_pavg_w;	 // "86.sse2.pavg.w"
                  }
                  break;
                case 's':	 // 8 strings to match.
                  switch (NameR[10]) {
                  default: break;
                  case 'l':	 // 3 strings to match.
                    if (memcmp(NameR.data()+11, "l.", 2))
                      break;
                    switch (NameR[13]) {
                    default: break;
                    case 'd':	 // 1 string to match.
                      return Intrinsic::x86_sse2_psll_d;	 // "86.sse2.psll.d"
                    case 'q':	 // 1 string to match.
                      return Intrinsic::x86_sse2_psll_q;	 // "86.sse2.psll.q"
                    case 'w':	 // 1 string to match.
                      return Intrinsic::x86_sse2_psll_w;	 // "86.sse2.psll.w"
                    }
                    break;
                  case 'r':	 // 5 strings to match.
                    switch (NameR[11]) {
                    default: break;
                    case 'a':	 // 2 strings to match.
                      if (NameR[12] != '.')
                        break;
                      switch (NameR[13]) {
                      default: break;
                      case 'd':	 // 1 string to match.
                        return Intrinsic::x86_sse2_psra_d;	 // "86.sse2.psra.d"
                      case 'w':	 // 1 string to match.
                        return Intrinsic::x86_sse2_psra_w;	 // "86.sse2.psra.w"
                      }
                      break;
                    case 'l':	 // 3 strings to match.
                      if (NameR[12] != '.')
                        break;
                      switch (NameR[13]) {
                      default: break;
                      case 'd':	 // 1 string to match.
                        return Intrinsic::x86_sse2_psrl_d;	 // "86.sse2.psrl.d"
                      case 'q':	 // 1 string to match.
                        return Intrinsic::x86_sse2_psrl_q;	 // "86.sse2.psrl.q"
                      case 'w':	 // 1 string to match.
                        return Intrinsic::x86_sse2_psrl_w;	 // "86.sse2.psrl.w"
                      }
                      break;
                    }
                    break;
                  }
                  break;
                }
                break;
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+9, "ub.sd", 5))
                  break;
                return Intrinsic::x86_sse2_sub_sd;	 // "86.sse2.sub.sd"
              }
              break;
            case '3':	 // 1 string to match.
              if (memcmp(NameR.data()+7, ".ldu.dq", 7))
                break;
              return Intrinsic::x86_sse3_ldu_dq;	 // "86.sse3.ldu.dq"
            case '4':	 // 1 string to match.
              if (memcmp(NameR.data()+7, "a.extrq", 7))
                break;
              return Intrinsic::x86_sse4a_extrq;	 // "86.sse4a.extrq"
            }
            break;
          }
          break;
        case 'w':	 // 4 strings to match.
          if (NameR[4] != 'r')
            break;
          switch (NameR[5]) {
          default: break;
          case 'f':	 // 2 strings to match.
            if (memcmp(NameR.data()+6, "sbase.", 6))
              break;
            switch (NameR[12]) {
            default: break;
            case '3':	 // 1 string to match.
              if (NameR[13] != '2')
                break;
              return Intrinsic::x86_wrfsbase_32;	 // "86.wrfsbase.32"
            case '6':	 // 1 string to match.
              if (NameR[13] != '4')
                break;
              return Intrinsic::x86_wrfsbase_64;	 // "86.wrfsbase.64"
            }
            break;
          case 'g':	 // 2 strings to match.
            if (memcmp(NameR.data()+6, "sbase.", 6))
              break;
            switch (NameR[12]) {
            default: break;
            case '3':	 // 1 string to match.
              if (NameR[13] != '2')
                break;
              return Intrinsic::x86_wrgsbase_32;	 // "86.wrgsbase.32"
            case '6':	 // 1 string to match.
              if (NameR[13] != '4')
                break;
              return Intrinsic::x86_wrgsbase_64;	 // "86.wrgsbase.64"
            }
            break;
          }
          break;
        case 'x':	 // 8 strings to match.
          if (memcmp(NameR.data()+4, "op.vp", 5))
            break;
          switch (NameR[9]) {
          default: break;
          case 'c':	 // 4 strings to match.
            if (memcmp(NameR.data()+10, "omu", 3))
              break;
            switch (NameR[13]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::x86_xop_vpcomub;	 // "86.xop.vpcomub"
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_xop_vpcomud;	 // "86.xop.vpcomud"
            case 'q':	 // 1 string to match.
              return Intrinsic::x86_xop_vpcomuq;	 // "86.xop.vpcomuq"
            case 'w':	 // 1 string to match.
              return Intrinsic::x86_xop_vpcomuw;	 // "86.xop.vpcomuw"
            }
            break;
          case 'r':	 // 4 strings to match.
            if (memcmp(NameR.data()+10, "ot", 2))
              break;
            switch (NameR[12]) {
            default: break;
            case 'b':	 // 1 string to match.
              if (NameR[13] != 'i')
                break;
              return Intrinsic::x86_xop_vprotbi;	 // "86.xop.vprotbi"
            case 'd':	 // 1 string to match.
              if (NameR[13] != 'i')
                break;
              return Intrinsic::x86_xop_vprotdi;	 // "86.xop.vprotdi"
            case 'q':	 // 1 string to match.
              if (NameR[13] != 'i')
                break;
              return Intrinsic::x86_xop_vprotqi;	 // "86.xop.vprotqi"
            case 'w':	 // 1 string to match.
              if (NameR[13] != 'i')
                break;
              return Intrinsic::x86_xop_vprotwi;	 // "86.xop.vprotwi"
            }
            break;
          }
          break;
        }
        break;
      case 'c':	 // 1 string to match.
        if (memcmp(NameR.data()+1, "ore.waitevent", 13))
          break;
        return Intrinsic::xcore_waitevent;	 // "core.waitevent"
      }
      break;
    case 15:	 // 145 strings to match.
      switch (NameR[0]) {
      default: break;
      case '8':	 // 144 strings to match.
        if (memcmp(NameR.data()+1, "6.", 2))
          break;
        switch (NameR[3]) {
        default: break;
        case '3':	 // 3 strings to match.
          if (memcmp(NameR.data()+4, "dnow", 4))
            break;
          switch (NameR[8]) {
          default: break;
          case '.':	 // 1 string to match.
            if (memcmp(NameR.data()+9, "pfsubr", 6))
              break;
            return Intrinsic::x86_3dnow_pfsubr;	 // "86.3dnow.pfsubr"
          case 'a':	 // 2 strings to match.
            if (memcmp(NameR.data()+9, ".p", 2))
              break;
            switch (NameR[11]) {
            default: break;
            case 'f':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "2iw", 3))
                break;
              return Intrinsic::x86_3dnowa_pf2iw;	 // "86.3dnowa.pf2iw"
            case 'i':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "2fw", 3))
                break;
              return Intrinsic::x86_3dnowa_pi2fw;	 // "86.3dnowa.pi2fw"
            }
            break;
          }
          break;
        case 'a':	 // 49 strings to match.
          switch (NameR[4]) {
          default: break;
          case 'e':	 // 3 strings to match.
            if (memcmp(NameR.data()+5, "sni.aes", 7))
              break;
            switch (NameR[12]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+13, "ec", 2))
                break;
              return Intrinsic::x86_aesni_aesdec;	 // "86.aesni.aesdec"
            case 'e':	 // 1 string to match.
              if (memcmp(NameR.data()+13, "nc", 2))
                break;
              return Intrinsic::x86_aesni_aesenc;	 // "86.aesni.aesenc"
            case 'i':	 // 1 string to match.
              if (memcmp(NameR.data()+13, "mc", 2))
                break;
              return Intrinsic::x86_aesni_aesimc;	 // "86.aesni.aesimc"
            }
            break;
          case 'v':	 // 46 strings to match.
            if (NameR[5] != 'x')
              break;
            switch (NameR[6]) {
            default: break;
            case '.':	 // 1 string to match.
              if (memcmp(NameR.data()+7, "vzeroall", 8))
                break;
              return Intrinsic::x86_avx_vzeroall;	 // "86.avx.vzeroall"
            case '2':	 // 44 strings to match.
              if (NameR[7] != '.')
                break;
              switch (NameR[8]) {
              default: break;
              case 'm':	 // 1 string to match.
                if (memcmp(NameR.data()+9, "psadbw", 6))
                  break;
                return Intrinsic::x86_avx2_mpsadbw;	 // "86.avx2.mpsadbw"
              case 'p':	 // 43 strings to match.
                switch (NameR[9]) {
                default: break;
                case 'a':	 // 2 strings to match.
                  if (memcmp(NameR.data()+10, "dds.", 4))
                    break;
                  switch (NameR[14]) {
                  default: break;
                  case 'b':	 // 1 string to match.
                    return Intrinsic::x86_avx2_padds_b;	 // "86.avx2.padds.b"
                  case 'w':	 // 1 string to match.
                    return Intrinsic::x86_avx2_padds_w;	 // "86.avx2.padds.w"
                  }
                  break;
                case 'b':	 // 1 string to match.
                  if (memcmp(NameR.data()+10, "lendw", 5))
                    break;
                  return Intrinsic::x86_avx2_pblendw;	 // "86.avx2.pblendw"
                case 'h':	 // 4 strings to match.
                  switch (NameR[10]) {
                  default: break;
                  case 'a':	 // 2 strings to match.
                    if (memcmp(NameR.data()+11, "dd.", 3))
                      break;
                    switch (NameR[14]) {
                    default: break;
                    case 'd':	 // 1 string to match.
                      return Intrinsic::x86_avx2_phadd_d;	 // "86.avx2.phadd.d"
                    case 'w':	 // 1 string to match.
                      return Intrinsic::x86_avx2_phadd_w;	 // "86.avx2.phadd.w"
                    }
                    break;
                  case 's':	 // 2 strings to match.
                    if (memcmp(NameR.data()+11, "ub.", 3))
                      break;
                    switch (NameR[14]) {
                    default: break;
                    case 'd':	 // 1 string to match.
                      return Intrinsic::x86_avx2_phsub_d;	 // "86.avx2.phsub.d"
                    case 'w':	 // 1 string to match.
                      return Intrinsic::x86_avx2_phsub_w;	 // "86.avx2.phsub.w"
                    }
                    break;
                  }
                  break;
                case 'm':	 // 14 strings to match.
                  switch (NameR[10]) {
                  default: break;
                  case 'a':	 // 6 strings to match.
                    if (NameR[11] != 'x')
                      break;
                    switch (NameR[12]) {
                    default: break;
                    case 's':	 // 3 strings to match.
                      if (NameR[13] != '.')
                        break;
                      switch (NameR[14]) {
                      default: break;
                      case 'b':	 // 1 string to match.
                        return Intrinsic::x86_avx2_pmaxs_b;	 // "86.avx2.pmaxs.b"
                      case 'd':	 // 1 string to match.
                        return Intrinsic::x86_avx2_pmaxs_d;	 // "86.avx2.pmaxs.d"
                      case 'w':	 // 1 string to match.
                        return Intrinsic::x86_avx2_pmaxs_w;	 // "86.avx2.pmaxs.w"
                      }
                      break;
                    case 'u':	 // 3 strings to match.
                      if (NameR[13] != '.')
                        break;
                      switch (NameR[14]) {
                      default: break;
                      case 'b':	 // 1 string to match.
                        return Intrinsic::x86_avx2_pmaxu_b;	 // "86.avx2.pmaxu.b"
                      case 'd':	 // 1 string to match.
                        return Intrinsic::x86_avx2_pmaxu_d;	 // "86.avx2.pmaxu.d"
                      case 'w':	 // 1 string to match.
                        return Intrinsic::x86_avx2_pmaxu_w;	 // "86.avx2.pmaxu.w"
                      }
                      break;
                    }
                    break;
                  case 'i':	 // 6 strings to match.
                    if (NameR[11] != 'n')
                      break;
                    switch (NameR[12]) {
                    default: break;
                    case 's':	 // 3 strings to match.
                      if (NameR[13] != '.')
                        break;
                      switch (NameR[14]) {
                      default: break;
                      case 'b':	 // 1 string to match.
                        return Intrinsic::x86_avx2_pmins_b;	 // "86.avx2.pmins.b"
                      case 'd':	 // 1 string to match.
                        return Intrinsic::x86_avx2_pmins_d;	 // "86.avx2.pmins.d"
                      case 'w':	 // 1 string to match.
                        return Intrinsic::x86_avx2_pmins_w;	 // "86.avx2.pmins.w"
                      }
                      break;
                    case 'u':	 // 3 strings to match.
                      if (NameR[13] != '.')
                        break;
                      switch (NameR[14]) {
                      default: break;
                      case 'b':	 // 1 string to match.
                        return Intrinsic::x86_avx2_pminu_b;	 // "86.avx2.pminu.b"
                      case 'd':	 // 1 string to match.
                        return Intrinsic::x86_avx2_pminu_d;	 // "86.avx2.pminu.d"
                      case 'w':	 // 1 string to match.
                        return Intrinsic::x86_avx2_pminu_w;	 // "86.avx2.pminu.w"
                      }
                      break;
                    }
                    break;
                  case 'u':	 // 2 strings to match.
                    if (NameR[11] != 'l')
                      break;
                    switch (NameR[12]) {
                    default: break;
                    case '.':	 // 1 string to match.
                      if (memcmp(NameR.data()+13, "dq", 2))
                        break;
                      return Intrinsic::x86_avx2_pmul_dq;	 // "86.avx2.pmul.dq"
                    case 'h':	 // 1 string to match.
                      if (memcmp(NameR.data()+13, ".w", 2))
                        break;
                      return Intrinsic::x86_avx2_pmulh_w;	 // "86.avx2.pmulh.w"
                    }
                    break;
                  }
                  break;
                case 's':	 // 22 strings to match.
                  switch (NameR[10]) {
                  default: break;
                  case 'a':	 // 1 string to match.
                    if (memcmp(NameR.data()+11, "d.bw", 4))
                      break;
                    return Intrinsic::x86_avx2_psad_bw;	 // "86.avx2.psad.bw"
                  case 'h':	 // 1 string to match.
                    if (memcmp(NameR.data()+11, "uf.b", 4))
                      break;
                    return Intrinsic::x86_avx2_pshuf_b;	 // "86.avx2.pshuf.b"
                  case 'i':	 // 3 strings to match.
                    if (memcmp(NameR.data()+11, "gn.", 3))
                      break;
                    switch (NameR[14]) {
                    default: break;
                    case 'b':	 // 1 string to match.
                      return Intrinsic::x86_avx2_psign_b;	 // "86.avx2.psign.b"
                    case 'd':	 // 1 string to match.
                      return Intrinsic::x86_avx2_psign_d;	 // "86.avx2.psign.d"
                    case 'w':	 // 1 string to match.
                      return Intrinsic::x86_avx2_psign_w;	 // "86.avx2.psign.w"
                    }
                    break;
                  case 'l':	 // 6 strings to match.
                    if (NameR[11] != 'l')
                      break;
                    switch (NameR[12]) {
                    default: break;
                    case '.':	 // 1 string to match.
                      if (memcmp(NameR.data()+13, "dq", 2))
                        break;
                      return Intrinsic::x86_avx2_psll_dq;	 // "86.avx2.psll.dq"
                    case 'i':	 // 3 strings to match.
                      if (NameR[13] != '.')
                        break;
                      switch (NameR[14]) {
                      default: break;
                      case 'd':	 // 1 string to match.
                        return Intrinsic::x86_avx2_pslli_d;	 // "86.avx2.pslli.d"
                      case 'q':	 // 1 string to match.
                        return Intrinsic::x86_avx2_pslli_q;	 // "86.avx2.pslli.q"
                      case 'w':	 // 1 string to match.
                        return Intrinsic::x86_avx2_pslli_w;	 // "86.avx2.pslli.w"
                      }
                      break;
                    case 'v':	 // 2 strings to match.
                      if (NameR[13] != '.')
                        break;
                      switch (NameR[14]) {
                      default: break;
                      case 'd':	 // 1 string to match.
                        return Intrinsic::x86_avx2_psllv_d;	 // "86.avx2.psllv.d"
                      case 'q':	 // 1 string to match.
                        return Intrinsic::x86_avx2_psllv_q;	 // "86.avx2.psllv.q"
                      }
                      break;
                    }
                    break;
                  case 'r':	 // 9 strings to match.
                    switch (NameR[11]) {
                    default: break;
                    case 'a':	 // 3 strings to match.
                      switch (NameR[12]) {
                      default: break;
                      case 'i':	 // 2 strings to match.
                        if (NameR[13] != '.')
                          break;
                        switch (NameR[14]) {
                        default: break;
                        case 'd':	 // 1 string to match.
                          return Intrinsic::x86_avx2_psrai_d;	 // "86.avx2.psrai.d"
                        case 'w':	 // 1 string to match.
                          return Intrinsic::x86_avx2_psrai_w;	 // "86.avx2.psrai.w"
                        }
                        break;
                      case 'v':	 // 1 string to match.
                        if (memcmp(NameR.data()+13, ".d", 2))
                          break;
                        return Intrinsic::x86_avx2_psrav_d;	 // "86.avx2.psrav.d"
                      }
                      break;
                    case 'l':	 // 6 strings to match.
                      switch (NameR[12]) {
                      default: break;
                      case '.':	 // 1 string to match.
                        if (memcmp(NameR.data()+13, "dq", 2))
                          break;
                        return Intrinsic::x86_avx2_psrl_dq;	 // "86.avx2.psrl.dq"
                      case 'i':	 // 3 strings to match.
                        if (NameR[13] != '.')
                          break;
                        switch (NameR[14]) {
                        default: break;
                        case 'd':	 // 1 string to match.
                          return Intrinsic::x86_avx2_psrli_d;	 // "86.avx2.psrli.d"
                        case 'q':	 // 1 string to match.
                          return Intrinsic::x86_avx2_psrli_q;	 // "86.avx2.psrli.q"
                        case 'w':	 // 1 string to match.
                          return Intrinsic::x86_avx2_psrli_w;	 // "86.avx2.psrli.w"
                        }
                        break;
                      case 'v':	 // 2 strings to match.
                        if (NameR[13] != '.')
                          break;
                        switch (NameR[14]) {
                        default: break;
                        case 'd':	 // 1 string to match.
                          return Intrinsic::x86_avx2_psrlv_d;	 // "86.avx2.psrlv.d"
                        case 'q':	 // 1 string to match.
                          return Intrinsic::x86_avx2_psrlv_q;	 // "86.avx2.psrlv.q"
                        }
                        break;
                      }
                      break;
                    }
                    break;
                  case 'u':	 // 2 strings to match.
                    if (memcmp(NameR.data()+11, "bs.", 3))
                      break;
                    switch (NameR[14]) {
                    default: break;
                    case 'b':	 // 1 string to match.
                      return Intrinsic::x86_avx2_psubs_b;	 // "86.avx2.psubs.b"
                    case 'w':	 // 1 string to match.
                      return Intrinsic::x86_avx2_psubs_w;	 // "86.avx2.psubs.w"
                    }
                    break;
                  }
                  break;
                }
                break;
              }
              break;
            case '5':	 // 1 string to match.
              if (memcmp(NameR.data()+7, "12.kor.w", 8))
                break;
              return Intrinsic::x86_avx512_kor_w;	 // "86.avx512.kor.w"
            }
            break;
          }
          break;
        case 'b':	 // 2 strings to match.
          if (memcmp(NameR.data()+4, "mi.bextr.", 9))
            break;
          switch (NameR[13]) {
          default: break;
          case '3':	 // 1 string to match.
            if (NameR[14] != '2')
              break;
            return Intrinsic::x86_bmi_bextr_32;	 // "86.bmi.bextr.32"
          case '6':	 // 1 string to match.
            if (NameR[14] != '4')
              break;
            return Intrinsic::x86_bmi_bextr_64;	 // "86.bmi.bextr.64"
          }
          break;
        case 'm':	 // 19 strings to match.
          if (memcmp(NameR.data()+4, "mx.", 3))
            break;
          switch (NameR[7]) {
          default: break;
          case 'm':	 // 2 strings to match.
            switch (NameR[8]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(NameR.data()+9, "skmovq", 6))
                break;
              return Intrinsic::x86_mmx_maskmovq;	 // "86.mmx.maskmovq"
            case 'o':	 // 1 string to match.
              if (memcmp(NameR.data()+9, "vnt.dq", 6))
                break;
              return Intrinsic::x86_mmx_movnt_dq;	 // "86.mmx.movnt.dq"
            }
            break;
          case 'p':	 // 17 strings to match.
            switch (NameR[8]) {
            default: break;
            case 'a':	 // 5 strings to match.
              switch (NameR[9]) {
              default: break;
              case 'c':	 // 3 strings to match.
                if (NameR[10] != 'k')
                  break;
                switch (NameR[11]) {
                default: break;
                case 's':	 // 2 strings to match.
                  if (NameR[12] != 's')
                    break;
                  switch (NameR[13]) {
                  default: break;
                  case 'd':	 // 1 string to match.
                    if (NameR[14] != 'w')
                      break;
                    return Intrinsic::x86_mmx_packssdw;	 // "86.mmx.packssdw"
                  case 'w':	 // 1 string to match.
                    if (NameR[14] != 'b')
                      break;
                    return Intrinsic::x86_mmx_packsswb;	 // "86.mmx.packsswb"
                  }
                  break;
                case 'u':	 // 1 string to match.
                  if (memcmp(NameR.data()+12, "swb", 3))
                    break;
                  return Intrinsic::x86_mmx_packuswb;	 // "86.mmx.packuswb"
                }
                break;
              case 'd':	 // 2 strings to match.
                if (memcmp(NameR.data()+10, "dus.", 4))
                  break;
                switch (NameR[14]) {
                default: break;
                case 'b':	 // 1 string to match.
                  return Intrinsic::x86_mmx_paddus_b;	 // "86.mmx.paddus.b"
                case 'w':	 // 1 string to match.
                  return Intrinsic::x86_mmx_paddus_w;	 // "86.mmx.paddus.w"
                }
                break;
              }
              break;
            case 'c':	 // 6 strings to match.
              if (memcmp(NameR.data()+9, "mp", 2))
                break;
              switch (NameR[11]) {
              default: break;
              case 'e':	 // 3 strings to match.
                if (memcmp(NameR.data()+12, "q.", 2))
                  break;
                switch (NameR[14]) {
                default: break;
                case 'b':	 // 1 string to match.
                  return Intrinsic::x86_mmx_pcmpeq_b;	 // "86.mmx.pcmpeq.b"
                case 'd':	 // 1 string to match.
                  return Intrinsic::x86_mmx_pcmpeq_d;	 // "86.mmx.pcmpeq.d"
                case 'w':	 // 1 string to match.
                  return Intrinsic::x86_mmx_pcmpeq_w;	 // "86.mmx.pcmpeq.w"
                }
                break;
              case 'g':	 // 3 strings to match.
                if (memcmp(NameR.data()+12, "t.", 2))
                  break;
                switch (NameR[14]) {
                default: break;
                case 'b':	 // 1 string to match.
                  return Intrinsic::x86_mmx_pcmpgt_b;	 // "86.mmx.pcmpgt.b"
                case 'd':	 // 1 string to match.
                  return Intrinsic::x86_mmx_pcmpgt_d;	 // "86.mmx.pcmpgt.d"
                case 'w':	 // 1 string to match.
                  return Intrinsic::x86_mmx_pcmpgt_w;	 // "86.mmx.pcmpgt.w"
                }
                break;
              }
              break;
            case 'm':	 // 4 strings to match.
              switch (NameR[9]) {
              default: break;
              case 'a':	 // 1 string to match.
                if (memcmp(NameR.data()+10, "dd.wd", 5))
                  break;
                return Intrinsic::x86_mmx_pmadd_wd;	 // "86.mmx.pmadd.wd"
              case 'o':	 // 1 string to match.
                if (memcmp(NameR.data()+10, "vmskb", 5))
                  break;
                return Intrinsic::x86_mmx_pmovmskb;	 // "86.mmx.pmovmskb"
              case 'u':	 // 2 strings to match.
                if (NameR[10] != 'l')
                  break;
                switch (NameR[11]) {
                default: break;
                case 'h':	 // 1 string to match.
                  if (memcmp(NameR.data()+12, "u.w", 3))
                    break;
                  return Intrinsic::x86_mmx_pmulhu_w;	 // "86.mmx.pmulhu.w"
                case 'u':	 // 1 string to match.
                  if (memcmp(NameR.data()+12, ".dq", 3))
                    break;
                  return Intrinsic::x86_mmx_pmulu_dq;	 // "86.mmx.pmulu.dq"
                }
                break;
              }
              break;
            case 's':	 // 2 strings to match.
              if (memcmp(NameR.data()+9, "ubus.", 5))
                break;
              switch (NameR[14]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::x86_mmx_psubus_b;	 // "86.mmx.psubus.b"
              case 'w':	 // 1 string to match.
                return Intrinsic::x86_mmx_psubus_w;	 // "86.mmx.psubus.w"
              }
              break;
            }
            break;
          }
          break;
        case 's':	 // 55 strings to match.
          if (NameR[4] != 's')
            break;
          switch (NameR[5]) {
          default: break;
          case 'e':	 // 52 strings to match.
            switch (NameR[6]) {
            default: break;
            case '.':	 // 8 strings to match.
              switch (NameR[7]) {
              default: break;
              case 'c':	 // 6 strings to match.
                if (memcmp(NameR.data()+8, "vt", 2))
                  break;
                switch (NameR[10]) {
                default: break;
                case 'p':	 // 4 strings to match.
                  switch (NameR[11]) {
                  default: break;
                  case 'd':	 // 1 string to match.
                    if (memcmp(NameR.data()+12, "2pi", 3))
                      break;
                    return Intrinsic::x86_sse_cvtpd2pi;	 // "86.sse.cvtpd2pi"
                  case 'i':	 // 2 strings to match.
                    if (memcmp(NameR.data()+12, "2p", 2))
                      break;
                    switch (NameR[14]) {
                    default: break;
                    case 'd':	 // 1 string to match.
                      return Intrinsic::x86_sse_cvtpi2pd;	 // "86.sse.cvtpi2pd"
                    case 's':	 // 1 string to match.
                      return Intrinsic::x86_sse_cvtpi2ps;	 // "86.sse.cvtpi2ps"
                    }
                    break;
                  case 's':	 // 1 string to match.
                    if (memcmp(NameR.data()+12, "2pi", 3))
                      break;
                    return Intrinsic::x86_sse_cvtps2pi;	 // "86.sse.cvtps2pi"
                  }
                  break;
                case 's':	 // 2 strings to match.
                  switch (NameR[11]) {
                  default: break;
                  case 'i':	 // 1 string to match.
                    if (memcmp(NameR.data()+12, "2ss", 3))
                      break;
                    return Intrinsic::x86_sse_cvtsi2ss;	 // "86.sse.cvtsi2ss"
                  case 's':	 // 1 string to match.
                    if (memcmp(NameR.data()+12, "2si", 3))
                      break;
                    return Intrinsic::x86_sse_cvtss2si;	 // "86.sse.cvtss2si"
                  }
                  break;
                }
                break;
              case 'r':	 // 2 strings to match.
                if (memcmp(NameR.data()+8, "sqrt.", 5))
                  break;
                switch (NameR[13]) {
                default: break;
                case 'p':	 // 1 string to match.
                  if (NameR[14] != 's')
                    break;
                  return Intrinsic::x86_sse_rsqrt_ps;	 // "86.sse.rsqrt.ps"
                case 's':	 // 1 string to match.
                  if (NameR[14] != 's')
                    break;
                  return Intrinsic::x86_sse_rsqrt_ss;	 // "86.sse.rsqrt.ss"
                }
                break;
              }
              break;
            case '2':	 // 24 strings to match.
              if (NameR[7] != '.')
                break;
              switch (NameR[8]) {
              default: break;
              case 'c':	 // 1 string to match.
                if (memcmp(NameR.data()+9, "lflush", 6))
                  break;
                return Intrinsic::x86_sse2_clflush;	 // "86.sse2.clflush"
              case 'p':	 // 21 strings to match.
                switch (NameR[9]) {
                default: break;
                case 'a':	 // 2 strings to match.
                  if (memcmp(NameR.data()+10, "dds.", 4))
                    break;
                  switch (NameR[14]) {
                  default: break;
                  case 'b':	 // 1 string to match.
                    return Intrinsic::x86_sse2_padds_b;	 // "86.sse2.padds.b"
                  case 'w':	 // 1 string to match.
                    return Intrinsic::x86_sse2_padds_w;	 // "86.sse2.padds.w"
                  }
                  break;
                case 'm':	 // 5 strings to match.
                  switch (NameR[10]) {
                  default: break;
                  case 'a':	 // 2 strings to match.
                    if (NameR[11] != 'x')
                      break;
                    switch (NameR[12]) {
                    default: break;
                    case 's':	 // 1 string to match.
                      if (memcmp(NameR.data()+13, ".w", 2))
                        break;
                      return Intrinsic::x86_sse2_pmaxs_w;	 // "86.sse2.pmaxs.w"
                    case 'u':	 // 1 string to match.
                      if (memcmp(NameR.data()+13, ".b", 2))
                        break;
                      return Intrinsic::x86_sse2_pmaxu_b;	 // "86.sse2.pmaxu.b"
                    }
                    break;
                  case 'i':	 // 2 strings to match.
                    if (NameR[11] != 'n')
                      break;
                    switch (NameR[12]) {
                    default: break;
                    case 's':	 // 1 string to match.
                      if (memcmp(NameR.data()+13, ".w", 2))
                        break;
                      return Intrinsic::x86_sse2_pmins_w;	 // "86.sse2.pmins.w"
                    case 'u':	 // 1 string to match.
                      if (memcmp(NameR.data()+13, ".b", 2))
                        break;
                      return Intrinsic::x86_sse2_pminu_b;	 // "86.sse2.pminu.b"
                    }
                    break;
                  case 'u':	 // 1 string to match.
                    if (memcmp(NameR.data()+11, "lh.w", 4))
                      break;
                    return Intrinsic::x86_sse2_pmulh_w;	 // "86.sse2.pmulh.w"
                  }
                  break;
                case 's':	 // 14 strings to match.
                  switch (NameR[10]) {
                  default: break;
                  case 'a':	 // 1 string to match.
                    if (memcmp(NameR.data()+11, "d.bw", 4))
                      break;
                    return Intrinsic::x86_sse2_psad_bw;	 // "86.sse2.psad.bw"
                  case 'h':	 // 1 string to match.
                    if (memcmp(NameR.data()+11, "uf.d", 4))
                      break;
                    return Intrinsic::x86_sse2_pshuf_d;	 // "86.sse2.pshuf.d"
                  case 'l':	 // 4 strings to match.
                    if (NameR[11] != 'l')
                      break;
                    switch (NameR[12]) {
                    default: break;
                    case '.':	 // 1 string to match.
                      if (memcmp(NameR.data()+13, "dq", 2))
                        break;
                      return Intrinsic::x86_sse2_psll_dq;	 // "86.sse2.psll.dq"
                    case 'i':	 // 3 strings to match.
                      if (NameR[13] != '.')
                        break;
                      switch (NameR[14]) {
                      default: break;
                      case 'd':	 // 1 string to match.
                        return Intrinsic::x86_sse2_pslli_d;	 // "86.sse2.pslli.d"
                      case 'q':	 // 1 string to match.
                        return Intrinsic::x86_sse2_pslli_q;	 // "86.sse2.pslli.q"
                      case 'w':	 // 1 string to match.
                        return Intrinsic::x86_sse2_pslli_w;	 // "86.sse2.pslli.w"
                      }
                      break;
                    }
                    break;
                  case 'r':	 // 6 strings to match.
                    switch (NameR[11]) {
                    default: break;
                    case 'a':	 // 2 strings to match.
                      if (memcmp(NameR.data()+12, "i.", 2))
                        break;
                      switch (NameR[14]) {
                      default: break;
                      case 'd':	 // 1 string to match.
                        return Intrinsic::x86_sse2_psrai_d;	 // "86.sse2.psrai.d"
                      case 'w':	 // 1 string to match.
                        return Intrinsic::x86_sse2_psrai_w;	 // "86.sse2.psrai.w"
                      }
                      break;
                    case 'l':	 // 4 strings to match.
                      switch (NameR[12]) {
                      default: break;
                      case '.':	 // 1 string to match.
                        if (memcmp(NameR.data()+13, "dq", 2))
                          break;
                        return Intrinsic::x86_sse2_psrl_dq;	 // "86.sse2.psrl.dq"
                      case 'i':	 // 3 strings to match.
                        if (NameR[13] != '.')
                          break;
                        switch (NameR[14]) {
                        default: break;
                        case 'd':	 // 1 string to match.
                          return Intrinsic::x86_sse2_psrli_d;	 // "86.sse2.psrli.d"
                        case 'q':	 // 1 string to match.
                          return Intrinsic::x86_sse2_psrli_q;	 // "86.sse2.psrli.q"
                        case 'w':	 // 1 string to match.
                          return Intrinsic::x86_sse2_psrli_w;	 // "86.sse2.psrli.w"
                        }
                        break;
                      }
                      break;
                    }
                    break;
                  case 'u':	 // 2 strings to match.
                    if (memcmp(NameR.data()+11, "bs.", 3))
                      break;
                    switch (NameR[14]) {
                    default: break;
                    case 'b':	 // 1 string to match.
                      return Intrinsic::x86_sse2_psubs_b;	 // "86.sse2.psubs.b"
                    case 'w':	 // 1 string to match.
                      return Intrinsic::x86_sse2_psubs_w;	 // "86.sse2.psubs.w"
                    }
                    break;
                  }
                  break;
                }
                break;
              case 's':	 // 2 strings to match.
                if (memcmp(NameR.data()+9, "qrt.", 4))
                  break;
                switch (NameR[13]) {
                default: break;
                case 'p':	 // 1 string to match.
                  if (NameR[14] != 'd')
                    break;
                  return Intrinsic::x86_sse2_sqrt_pd;	 // "86.sse2.sqrt.pd"
                case 's':	 // 1 string to match.
                  if (NameR[14] != 'd')
                    break;
                  return Intrinsic::x86_sse2_sqrt_sd;	 // "86.sse2.sqrt.sd"
                }
                break;
              }
              break;
            case '3':	 // 5 strings to match.
              if (NameR[7] != '.')
                break;
              switch (NameR[8]) {
              default: break;
              case 'h':	 // 4 strings to match.
                switch (NameR[9]) {
                default: break;
                case 'a':	 // 2 strings to match.
                  if (memcmp(NameR.data()+10, "dd.p", 4))
                    break;
                  switch (NameR[14]) {
                  default: break;
                  case 'd':	 // 1 string to match.
                    return Intrinsic::x86_sse3_hadd_pd;	 // "86.sse3.hadd.pd"
                  case 's':	 // 1 string to match.
                    return Intrinsic::x86_sse3_hadd_ps;	 // "86.sse3.hadd.ps"
                  }
                  break;
                case 's':	 // 2 strings to match.
                  if (memcmp(NameR.data()+10, "ub.p", 4))
                    break;
                  switch (NameR[14]) {
                  default: break;
                  case 'd':	 // 1 string to match.
                    return Intrinsic::x86_sse3_hsub_pd;	 // "86.sse3.hsub.pd"
                  case 's':	 // 1 string to match.
                    return Intrinsic::x86_sse3_hsub_ps;	 // "86.sse3.hsub.ps"
                  }
                  break;
                }
                break;
              case 'm':	 // 1 string to match.
                if (memcmp(NameR.data()+9, "onitor", 6))
                  break;
                return Intrinsic::x86_sse3_monitor;	 // "86.sse3.monitor"
              }
              break;
            case '4':	 // 15 strings to match.
              switch (NameR[7]) {
              default: break;
              case '1':	 // 14 strings to match.
                if (memcmp(NameR.data()+8, ".p", 2))
                  break;
                switch (NameR[10]) {
                default: break;
                case 'e':	 // 3 strings to match.
                  if (memcmp(NameR.data()+11, "xtr", 3))
                    break;
                  switch (NameR[14]) {
                  default: break;
                  case 'b':	 // 1 string to match.
                    return Intrinsic::x86_sse41_pextrb;	 // "86.sse41.pextrb"
                  case 'd':	 // 1 string to match.
                    return Intrinsic::x86_sse41_pextrd;	 // "86.sse41.pextrd"
                  case 'q':	 // 1 string to match.
                    return Intrinsic::x86_sse41_pextrq;	 // "86.sse41.pextrq"
                  }
                  break;
                case 'm':	 // 9 strings to match.
                  switch (NameR[11]) {
                  default: break;
                  case 'a':	 // 4 strings to match.
                    if (NameR[12] != 'x')
                      break;
                    switch (NameR[13]) {
                    default: break;
                    case 's':	 // 2 strings to match.
                      switch (NameR[14]) {
                      default: break;
                      case 'b':	 // 1 string to match.
                        return Intrinsic::x86_sse41_pmaxsb;	 // "86.sse41.pmaxsb"
                      case 'd':	 // 1 string to match.
                        return Intrinsic::x86_sse41_pmaxsd;	 // "86.sse41.pmaxsd"
                      }
                      break;
                    case 'u':	 // 2 strings to match.
                      switch (NameR[14]) {
                      default: break;
                      case 'd':	 // 1 string to match.
                        return Intrinsic::x86_sse41_pmaxud;	 // "86.sse41.pmaxud"
                      case 'w':	 // 1 string to match.
                        return Intrinsic::x86_sse41_pmaxuw;	 // "86.sse41.pmaxuw"
                      }
                      break;
                    }
                    break;
                  case 'i':	 // 4 strings to match.
                    if (NameR[12] != 'n')
                      break;
                    switch (NameR[13]) {
                    default: break;
                    case 's':	 // 2 strings to match.
                      switch (NameR[14]) {
                      default: break;
                      case 'b':	 // 1 string to match.
                        return Intrinsic::x86_sse41_pminsb;	 // "86.sse41.pminsb"
                      case 'd':	 // 1 string to match.
                        return Intrinsic::x86_sse41_pminsd;	 // "86.sse41.pminsd"
                      }
                      break;
                    case 'u':	 // 2 strings to match.
                      switch (NameR[14]) {
                      default: break;
                      case 'd':	 // 1 string to match.
                        return Intrinsic::x86_sse41_pminud;	 // "86.sse41.pminud"
                      case 'w':	 // 1 string to match.
                        return Intrinsic::x86_sse41_pminuw;	 // "86.sse41.pminuw"
                      }
                      break;
                    }
                    break;
                  case 'u':	 // 1 string to match.
                    if (memcmp(NameR.data()+12, "ldq", 3))
                      break;
                    return Intrinsic::x86_sse41_pmuldq;	 // "86.sse41.pmuldq"
                  }
                  break;
                case 't':	 // 2 strings to match.
                  if (memcmp(NameR.data()+11, "est", 3))
                    break;
                  switch (NameR[14]) {
                  default: break;
                  case 'c':	 // 1 string to match.
                    return Intrinsic::x86_sse41_ptestc;	 // "86.sse41.ptestc"
                  case 'z':	 // 1 string to match.
                    return Intrinsic::x86_sse41_ptestz;	 // "86.sse41.ptestz"
                  }
                  break;
                }
                break;
              case 'a':	 // 1 string to match.
                if (memcmp(NameR.data()+8, ".extrqi", 7))
                  break;
                return Intrinsic::x86_sse4a_extrqi;	 // "86.sse4a.extrqi"
              }
              break;
            }
            break;
          case 's':	 // 3 strings to match.
            if (memcmp(NameR.data()+6, "e3.pabs.", 8))
              break;
            switch (NameR[14]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::x86_ssse3_pabs_b;	 // "86.ssse3.pabs.b"
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_ssse3_pabs_d;	 // "86.ssse3.pabs.d"
            case 'w':	 // 1 string to match.
              return Intrinsic::x86_ssse3_pabs_w;	 // "86.ssse3.pabs.w"
            }
            break;
          }
          break;
        case 'x':	 // 16 strings to match.
          if (memcmp(NameR.data()+4, "op.v", 4))
            break;
          switch (NameR[8]) {
          default: break;
          case 'f':	 // 4 strings to match.
            if (memcmp(NameR.data()+9, "rcz.", 4))
              break;
            switch (NameR[13]) {
            default: break;
            case 'p':	 // 2 strings to match.
              switch (NameR[14]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_xop_vfrcz_pd;	 // "86.xop.vfrcz.pd"
              case 's':	 // 1 string to match.
                return Intrinsic::x86_xop_vfrcz_ps;	 // "86.xop.vfrcz.ps"
              }
              break;
            case 's':	 // 2 strings to match.
              switch (NameR[14]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_xop_vfrcz_sd;	 // "86.xop.vfrcz.sd"
              case 's':	 // 1 string to match.
                return Intrinsic::x86_xop_vfrcz_ss;	 // "86.xop.vfrcz.ss"
              }
              break;
            }
            break;
          case 'p':	 // 12 strings to match.
            switch (NameR[9]) {
            default: break;
            case 'h':	 // 9 strings to match.
              switch (NameR[10]) {
              default: break;
              case 'a':	 // 6 strings to match.
                if (memcmp(NameR.data()+11, "dd", 2))
                  break;
                switch (NameR[13]) {
                default: break;
                case 'b':	 // 3 strings to match.
                  switch (NameR[14]) {
                  default: break;
                  case 'd':	 // 1 string to match.
                    return Intrinsic::x86_xop_vphaddbd;	 // "86.xop.vphaddbd"
                  case 'q':	 // 1 string to match.
                    return Intrinsic::x86_xop_vphaddbq;	 // "86.xop.vphaddbq"
                  case 'w':	 // 1 string to match.
                    return Intrinsic::x86_xop_vphaddbw;	 // "86.xop.vphaddbw"
                  }
                  break;
                case 'd':	 // 1 string to match.
                  if (NameR[14] != 'q')
                    break;
                  return Intrinsic::x86_xop_vphadddq;	 // "86.xop.vphadddq"
                case 'w':	 // 2 strings to match.
                  switch (NameR[14]) {
                  default: break;
                  case 'd':	 // 1 string to match.
                    return Intrinsic::x86_xop_vphaddwd;	 // "86.xop.vphaddwd"
                  case 'q':	 // 1 string to match.
                    return Intrinsic::x86_xop_vphaddwq;	 // "86.xop.vphaddwq"
                  }
                  break;
                }
                break;
              case 's':	 // 3 strings to match.
                if (memcmp(NameR.data()+11, "ub", 2))
                  break;
                switch (NameR[13]) {
                default: break;
                case 'b':	 // 1 string to match.
                  if (NameR[14] != 'w')
                    break;
                  return Intrinsic::x86_xop_vphsubbw;	 // "86.xop.vphsubbw"
                case 'd':	 // 1 string to match.
                  if (NameR[14] != 'q')
                    break;
                  return Intrinsic::x86_xop_vphsubdq;	 // "86.xop.vphsubdq"
                case 'w':	 // 1 string to match.
                  if (NameR[14] != 'd')
                    break;
                  return Intrinsic::x86_xop_vphsubwd;	 // "86.xop.vphsubwd"
                }
                break;
              }
              break;
            case 'm':	 // 3 strings to match.
              if (memcmp(NameR.data()+10, "acs", 3))
                break;
              switch (NameR[13]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (NameR[14] != 'd')
                  break;
                return Intrinsic::x86_xop_vpmacsdd;	 // "86.xop.vpmacsdd"
              case 'w':	 // 2 strings to match.
                switch (NameR[14]) {
                default: break;
                case 'd':	 // 1 string to match.
                  return Intrinsic::x86_xop_vpmacswd;	 // "86.xop.vpmacswd"
                case 'w':	 // 1 string to match.
                  return Intrinsic::x86_xop_vpmacsww;	 // "86.xop.vpmacsww"
                }
                break;
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 'c':	 // 1 string to match.
        if (memcmp(NameR.data()+1, "ore.checkevent", 14))
          break;
        return Intrinsic::xcore_checkevent;	 // "core.checkevent"
      }
      break;
    case 16:	 // 117 strings to match.
      if (memcmp(NameR.data()+0, "86.", 3))
        break;
      switch (NameR[3]) {
      default: break;
      case '3':	 // 8 strings to match.
        if (memcmp(NameR.data()+4, "dnow", 4))
          break;
        switch (NameR[8]) {
        default: break;
        case '.':	 // 6 strings to match.
          if (NameR[9] != 'p')
            break;
          switch (NameR[10]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "vgusb", 5))
              break;
            return Intrinsic::x86_3dnow_pavgusb;	 // "86.3dnow.pavgusb"
          case 'f':	 // 4 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'c':	 // 3 strings to match.
              if (memcmp(NameR.data()+12, "mp", 2))
                break;
              switch (NameR[14]) {
              default: break;
              case 'e':	 // 1 string to match.
                if (NameR[15] != 'q')
                  break;
                return Intrinsic::x86_3dnow_pfcmpeq;	 // "86.3dnow.pfcmpeq"
              case 'g':	 // 2 strings to match.
                switch (NameR[15]) {
                default: break;
                case 'e':	 // 1 string to match.
                  return Intrinsic::x86_3dnow_pfcmpge;	 // "86.3dnow.pfcmpge"
                case 't':	 // 1 string to match.
                  return Intrinsic::x86_3dnow_pfcmpgt;	 // "86.3dnow.pfcmpgt"
                }
                break;
              }
              break;
            case 'r':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "sqrt", 4))
                break;
              return Intrinsic::x86_3dnow_pfrsqrt;	 // "86.3dnow.pfrsqrt"
            }
            break;
          case 'm':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "ulhrw", 5))
              break;
            return Intrinsic::x86_3dnow_pmulhrw;	 // "86.3dnow.pmulhrw"
          }
          break;
        case 'a':	 // 2 strings to match.
          if (memcmp(NameR.data()+9, ".p", 2))
            break;
          switch (NameR[11]) {
          default: break;
          case 'f':	 // 1 string to match.
            if (memcmp(NameR.data()+12, "nacc", 4))
              break;
            return Intrinsic::x86_3dnowa_pfnacc;	 // "86.3dnowa.pfnacc"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+12, "wapd", 4))
              break;
            return Intrinsic::x86_3dnowa_pswapd;	 // "86.3dnowa.pswapd"
          }
          break;
        }
        break;
      case 'a':	 // 36 strings to match.
        if (memcmp(NameR.data()+4, "vx", 2))
          break;
        switch (NameR[6]) {
        default: break;
        case '.':	 // 5 strings to match.
          switch (NameR[7]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(NameR.data()+8, "p.ps.256", 8))
              break;
            return Intrinsic::x86_avx_dp_ps_256;	 // "86.avx.dp.ps.256"
          case 'v':	 // 4 strings to match.
            if (memcmp(NameR.data()+8, "test", 4))
              break;
            switch (NameR[12]) {
            default: break;
            case 'c':	 // 2 strings to match.
              if (memcmp(NameR.data()+13, ".p", 2))
                break;
              switch (NameR[15]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_avx_vtestc_pd;	 // "86.avx.vtestc.pd"
              case 's':	 // 1 string to match.
                return Intrinsic::x86_avx_vtestc_ps;	 // "86.avx.vtestc.ps"
              }
              break;
            case 'z':	 // 2 strings to match.
              if (memcmp(NameR.data()+13, ".p", 2))
                break;
              switch (NameR[15]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_avx_vtestz_pd;	 // "86.avx.vtestz.pd"
              case 's':	 // 1 string to match.
                return Intrinsic::x86_avx_vtestz_ps;	 // "86.avx.vtestz.ps"
              }
              break;
            }
            break;
          }
          break;
        case '2':	 // 28 strings to match.
          if (NameR[7] != '.')
            break;
          switch (NameR[8]) {
          default: break;
          case 'm':	 // 1 string to match.
            if (memcmp(NameR.data()+9, "ovntdqa", 7))
              break;
            return Intrinsic::x86_avx2_movntdqa;	 // "86.avx2.movntdqa"
          case 'p':	 // 27 strings to match.
            switch (NameR[9]) {
            default: break;
            case 'a':	 // 6 strings to match.
              switch (NameR[10]) {
              default: break;
              case 'c':	 // 4 strings to match.
                if (NameR[11] != 'k')
                  break;
                switch (NameR[12]) {
                default: break;
                case 's':	 // 2 strings to match.
                  if (NameR[13] != 's')
                    break;
                  switch (NameR[14]) {
                  default: break;
                  case 'd':	 // 1 string to match.
                    if (NameR[15] != 'w')
                      break;
                    return Intrinsic::x86_avx2_packssdw;	 // "86.avx2.packssdw"
                  case 'w':	 // 1 string to match.
                    if (NameR[15] != 'b')
                      break;
                    return Intrinsic::x86_avx2_packsswb;	 // "86.avx2.packsswb"
                  }
                  break;
                case 'u':	 // 2 strings to match.
                  if (NameR[13] != 's')
                    break;
                  switch (NameR[14]) {
                  default: break;
                  case 'd':	 // 1 string to match.
                    if (NameR[15] != 'w')
                      break;
                    return Intrinsic::x86_avx2_packusdw;	 // "86.avx2.packusdw"
                  case 'w':	 // 1 string to match.
                    if (NameR[15] != 'b')
                      break;
                    return Intrinsic::x86_avx2_packuswb;	 // "86.avx2.packuswb"
                  }
                  break;
                }
                break;
              case 'd':	 // 2 strings to match.
                if (memcmp(NameR.data()+11, "dus.", 4))
                  break;
                switch (NameR[15]) {
                default: break;
                case 'b':	 // 1 string to match.
                  return Intrinsic::x86_avx2_paddus_b;	 // "86.avx2.paddus.b"
                case 'w':	 // 1 string to match.
                  return Intrinsic::x86_avx2_paddus_w;	 // "86.avx2.paddus.w"
                }
                break;
              }
              break;
            case 'b':	 // 1 string to match.
              if (memcmp(NameR.data()+10, "lendvb", 6))
                break;
              return Intrinsic::x86_avx2_pblendvb;	 // "86.avx2.pblendvb"
            case 'h':	 // 2 strings to match.
              switch (NameR[10]) {
              default: break;
              case 'a':	 // 1 string to match.
                if (memcmp(NameR.data()+11, "dd.sw", 5))
                  break;
                return Intrinsic::x86_avx2_phadd_sw;	 // "86.avx2.phadd.sw"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+11, "ub.sw", 5))
                  break;
                return Intrinsic::x86_avx2_phsub_sw;	 // "86.avx2.phsub.sw"
              }
              break;
            case 'm':	 // 16 strings to match.
              switch (NameR[10]) {
              default: break;
              case 'a':	 // 1 string to match.
                if (memcmp(NameR.data()+11, "dd.wd", 5))
                  break;
                return Intrinsic::x86_avx2_pmadd_wd;	 // "86.avx2.pmadd.wd"
              case 'o':	 // 13 strings to match.
                if (NameR[11] != 'v')
                  break;
                switch (NameR[12]) {
                default: break;
                case 'm':	 // 1 string to match.
                  if (memcmp(NameR.data()+13, "skb", 3))
                    break;
                  return Intrinsic::x86_avx2_pmovmskb;	 // "86.avx2.pmovmskb"
                case 's':	 // 6 strings to match.
                  if (NameR[13] != 'x')
                    break;
                  switch (NameR[14]) {
                  default: break;
                  case 'b':	 // 3 strings to match.
                    switch (NameR[15]) {
                    default: break;
                    case 'd':	 // 1 string to match.
                      return Intrinsic::x86_avx2_pmovsxbd;	 // "86.avx2.pmovsxbd"
                    case 'q':	 // 1 string to match.
                      return Intrinsic::x86_avx2_pmovsxbq;	 // "86.avx2.pmovsxbq"
                    case 'w':	 // 1 string to match.
                      return Intrinsic::x86_avx2_pmovsxbw;	 // "86.avx2.pmovsxbw"
                    }
                    break;
                  case 'd':	 // 1 string to match.
                    if (NameR[15] != 'q')
                      break;
                    return Intrinsic::x86_avx2_pmovsxdq;	 // "86.avx2.pmovsxdq"
                  case 'w':	 // 2 strings to match.
                    switch (NameR[15]) {
                    default: break;
                    case 'd':	 // 1 string to match.
                      return Intrinsic::x86_avx2_pmovsxwd;	 // "86.avx2.pmovsxwd"
                    case 'q':	 // 1 string to match.
                      return Intrinsic::x86_avx2_pmovsxwq;	 // "86.avx2.pmovsxwq"
                    }
                    break;
                  }
                  break;
                case 'z':	 // 6 strings to match.
                  if (NameR[13] != 'x')
                    break;
                  switch (NameR[14]) {
                  default: break;
                  case 'b':	 // 3 strings to match.
                    switch (NameR[15]) {
                    default: break;
                    case 'd':	 // 1 string to match.
                      return Intrinsic::x86_avx2_pmovzxbd;	 // "86.avx2.pmovzxbd"
                    case 'q':	 // 1 string to match.
                      return Intrinsic::x86_avx2_pmovzxbq;	 // "86.avx2.pmovzxbq"
                    case 'w':	 // 1 string to match.
                      return Intrinsic::x86_avx2_pmovzxbw;	 // "86.avx2.pmovzxbw"
                    }
                    break;
                  case 'd':	 // 1 string to match.
                    if (NameR[15] != 'q')
                      break;
                    return Intrinsic::x86_avx2_pmovzxdq;	 // "86.avx2.pmovzxdq"
                  case 'w':	 // 2 strings to match.
                    switch (NameR[15]) {
                    default: break;
                    case 'd':	 // 1 string to match.
                      return Intrinsic::x86_avx2_pmovzxwd;	 // "86.avx2.pmovzxwd"
                    case 'q':	 // 1 string to match.
                      return Intrinsic::x86_avx2_pmovzxwq;	 // "86.avx2.pmovzxwq"
                    }
                    break;
                  }
                  break;
                }
                break;
              case 'u':	 // 2 strings to match.
                if (NameR[11] != 'l')
                  break;
                switch (NameR[12]) {
                default: break;
                case 'h':	 // 1 string to match.
                  if (memcmp(NameR.data()+13, "u.w", 3))
                    break;
                  return Intrinsic::x86_avx2_pmulhu_w;	 // "86.avx2.pmulhu.w"
                case 'u':	 // 1 string to match.
                  if (memcmp(NameR.data()+13, ".dq", 3))
                    break;
                  return Intrinsic::x86_avx2_pmulu_dq;	 // "86.avx2.pmulu.dq"
                }
                break;
              }
              break;
            case 's':	 // 2 strings to match.
              if (memcmp(NameR.data()+10, "ubus.", 5))
                break;
              switch (NameR[15]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::x86_avx2_psubus_b;	 // "86.avx2.psubus.b"
              case 'w':	 // 1 string to match.
                return Intrinsic::x86_avx2_psubus_w;	 // "86.avx2.psubus.w"
              }
              break;
            }
            break;
          }
          break;
        case '5':	 // 3 strings to match.
          if (memcmp(NameR.data()+7, "12.k", 4))
            break;
          switch (NameR[11]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(NameR.data()+12, "nd.w", 4))
              break;
            return Intrinsic::x86_avx512_kand_w;	 // "86.avx512.kand.w"
          case 'n':	 // 1 string to match.
            if (memcmp(NameR.data()+12, "ot.w", 4))
              break;
            return Intrinsic::x86_avx512_knot_w;	 // "86.avx512.knot.w"
          case 'x':	 // 1 string to match.
            if (memcmp(NameR.data()+12, "or.w", 4))
              break;
            return Intrinsic::x86_avx512_kxor_w;	 // "86.avx512.kxor.w"
          }
          break;
        }
        break;
      case 'f':	 // 8 strings to match.
        if (memcmp(NameR.data()+4, "ma.vfm", 6))
          break;
        switch (NameR[10]) {
        default: break;
        case 'a':	 // 4 strings to match.
          if (memcmp(NameR.data()+11, "dd.", 3))
            break;
          switch (NameR[14]) {
          default: break;
          case 'p':	 // 2 strings to match.
            switch (NameR[15]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_fma_vfmadd_pd;	 // "86.fma.vfmadd.pd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_fma_vfmadd_ps;	 // "86.fma.vfmadd.ps"
            }
            break;
          case 's':	 // 2 strings to match.
            switch (NameR[15]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_fma_vfmadd_sd;	 // "86.fma.vfmadd.sd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_fma_vfmadd_ss;	 // "86.fma.vfmadd.ss"
            }
            break;
          }
          break;
        case 's':	 // 4 strings to match.
          if (memcmp(NameR.data()+11, "ub.", 3))
            break;
          switch (NameR[14]) {
          default: break;
          case 'p':	 // 2 strings to match.
            switch (NameR[15]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_fma_vfmsub_pd;	 // "86.fma.vfmsub.pd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_fma_vfmsub_ps;	 // "86.fma.vfmsub.ps"
            }
            break;
          case 's':	 // 2 strings to match.
            switch (NameR[15]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_fma_vfmsub_sd;	 // "86.fma.vfmsub.sd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_fma_vfmsub_ss;	 // "86.fma.vfmsub.ss"
            }
            break;
          }
          break;
        }
        break;
      case 'm':	 // 7 strings to match.
        if (memcmp(NameR.data()+4, "mx.p", 4))
          break;
        switch (NameR[8]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(NameR.data()+9, "lignr.b", 7))
            break;
          return Intrinsic::x86_mmx_palignr_b;	 // "86.mmx.palignr.b"
        case 'u':	 // 6 strings to match.
          if (memcmp(NameR.data()+9, "npck", 4))
            break;
          switch (NameR[13]) {
          default: break;
          case 'h':	 // 3 strings to match.
            switch (NameR[14]) {
            default: break;
            case 'b':	 // 1 string to match.
              if (NameR[15] != 'w')
                break;
              return Intrinsic::x86_mmx_punpckhbw;	 // "86.mmx.punpckhbw"
            case 'd':	 // 1 string to match.
              if (NameR[15] != 'q')
                break;
              return Intrinsic::x86_mmx_punpckhdq;	 // "86.mmx.punpckhdq"
            case 'w':	 // 1 string to match.
              if (NameR[15] != 'd')
                break;
              return Intrinsic::x86_mmx_punpckhwd;	 // "86.mmx.punpckhwd"
            }
            break;
          case 'l':	 // 3 strings to match.
            switch (NameR[14]) {
            default: break;
            case 'b':	 // 1 string to match.
              if (NameR[15] != 'w')
                break;
              return Intrinsic::x86_mmx_punpcklbw;	 // "86.mmx.punpcklbw"
            case 'd':	 // 1 string to match.
              if (NameR[15] != 'q')
                break;
              return Intrinsic::x86_mmx_punpckldq;	 // "86.mmx.punpckldq"
            case 'w':	 // 1 string to match.
              if (NameR[15] != 'd')
                break;
              return Intrinsic::x86_mmx_punpcklwd;	 // "86.mmx.punpcklwd"
            }
            break;
          }
          break;
        }
        break;
      case 's':	 // 42 strings to match.
        if (NameR[4] != 's')
          break;
        switch (NameR[5]) {
        default: break;
        case 'e':	 // 34 strings to match.
          switch (NameR[6]) {
          default: break;
          case '.':	 // 10 strings to match.
            switch (NameR[7]) {
            default: break;
            case 'c':	 // 8 strings to match.
              switch (NameR[8]) {
              default: break;
              case 'o':	 // 5 strings to match.
                if (memcmp(NameR.data()+9, "mi", 2))
                  break;
                switch (NameR[11]) {
                default: break;
                case 'e':	 // 1 string to match.
                  if (memcmp(NameR.data()+12, "q.ss", 4))
                    break;
                  return Intrinsic::x86_sse_comieq_ss;	 // "86.sse.comieq.ss"
                case 'g':	 // 2 strings to match.
                  switch (NameR[12]) {
                  default: break;
                  case 'e':	 // 1 string to match.
                    if (memcmp(NameR.data()+13, ".ss", 3))
                      break;
                    return Intrinsic::x86_sse_comige_ss;	 // "86.sse.comige.ss"
                  case 't':	 // 1 string to match.
                    if (memcmp(NameR.data()+13, ".ss", 3))
                      break;
                    return Intrinsic::x86_sse_comigt_ss;	 // "86.sse.comigt.ss"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  switch (NameR[12]) {
                  default: break;
                  case 'e':	 // 1 string to match.
                    if (memcmp(NameR.data()+13, ".ss", 3))
                      break;
                    return Intrinsic::x86_sse_comile_ss;	 // "86.sse.comile.ss"
                  case 't':	 // 1 string to match.
                    if (memcmp(NameR.data()+13, ".ss", 3))
                      break;
                    return Intrinsic::x86_sse_comilt_ss;	 // "86.sse.comilt.ss"
                  }
                  break;
                }
                break;
              case 'v':	 // 3 strings to match.
                if (memcmp(NameR.data()+9, "tt", 2))
                  break;
                switch (NameR[11]) {
                default: break;
                case 'p':	 // 2 strings to match.
                  switch (NameR[12]) {
                  default: break;
                  case 'd':	 // 1 string to match.
                    if (memcmp(NameR.data()+13, "2pi", 3))
                      break;
                    return Intrinsic::x86_sse_cvttpd2pi;	 // "86.sse.cvttpd2pi"
                  case 's':	 // 1 string to match.
                    if (memcmp(NameR.data()+13, "2pi", 3))
                      break;
                    return Intrinsic::x86_sse_cvttps2pi;	 // "86.sse.cvttps2pi"
                  }
                  break;
                case 's':	 // 1 string to match.
                  if (memcmp(NameR.data()+12, "s2si", 4))
                    break;
                  return Intrinsic::x86_sse_cvttss2si;	 // "86.sse.cvttss2si"
                }
                break;
              }
              break;
            case 'm':	 // 1 string to match.
              if (memcmp(NameR.data()+8, "ovmsk.ps", 8))
                break;
              return Intrinsic::x86_sse_movmsk_ps;	 // "86.sse.movmsk.ps"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+8, "toreu.ps", 8))
                break;
              return Intrinsic::x86_sse_storeu_ps;	 // "86.sse.storeu.ps"
            }
            break;
          case '2':	 // 19 strings to match.
            if (NameR[7] != '.')
              break;
            switch (NameR[8]) {
            default: break;
            case 'c':	 // 10 strings to match.
              if (memcmp(NameR.data()+9, "vt", 2))
                break;
              switch (NameR[11]) {
              default: break;
              case 'd':	 // 2 strings to match.
                if (memcmp(NameR.data()+12, "q2p", 3))
                  break;
                switch (NameR[15]) {
                default: break;
                case 'd':	 // 1 string to match.
                  return Intrinsic::x86_sse2_cvtdq2pd;	 // "86.sse2.cvtdq2pd"
                case 's':	 // 1 string to match.
                  return Intrinsic::x86_sse2_cvtdq2ps;	 // "86.sse2.cvtdq2ps"
                }
                break;
              case 'p':	 // 4 strings to match.
                switch (NameR[12]) {
                default: break;
                case 'd':	 // 2 strings to match.
                  if (NameR[13] != '2')
                    break;
                  switch (NameR[14]) {
                  default: break;
                  case 'd':	 // 1 string to match.
                    if (NameR[15] != 'q')
                      break;
                    return Intrinsic::x86_sse2_cvtpd2dq;	 // "86.sse2.cvtpd2dq"
                  case 'p':	 // 1 string to match.
                    if (NameR[15] != 's')
                      break;
                    return Intrinsic::x86_sse2_cvtpd2ps;	 // "86.sse2.cvtpd2ps"
                  }
                  break;
                case 's':	 // 2 strings to match.
                  if (NameR[13] != '2')
                    break;
                  switch (NameR[14]) {
                  default: break;
                  case 'd':	 // 1 string to match.
                    if (NameR[15] != 'q')
                      break;
                    return Intrinsic::x86_sse2_cvtps2dq;	 // "86.sse2.cvtps2dq"
                  case 'p':	 // 1 string to match.
                    if (NameR[15] != 'd')
                      break;
                    return Intrinsic::x86_sse2_cvtps2pd;	 // "86.sse2.cvtps2pd"
                  }
                  break;
                }
                break;
              case 's':	 // 4 strings to match.
                switch (NameR[12]) {
                default: break;
                case 'd':	 // 2 strings to match.
                  if (memcmp(NameR.data()+13, "2s", 2))
                    break;
                  switch (NameR[15]) {
                  default: break;
                  case 'i':	 // 1 string to match.
                    return Intrinsic::x86_sse2_cvtsd2si;	 // "86.sse2.cvtsd2si"
                  case 's':	 // 1 string to match.
                    return Intrinsic::x86_sse2_cvtsd2ss;	 // "86.sse2.cvtsd2ss"
                  }
                  break;
                case 'i':	 // 1 string to match.
                  if (memcmp(NameR.data()+13, "2sd", 3))
                    break;
                  return Intrinsic::x86_sse2_cvtsi2sd;	 // "86.sse2.cvtsi2sd"
                case 's':	 // 1 string to match.
                  if (memcmp(NameR.data()+13, "2sd", 3))
                    break;
                  return Intrinsic::x86_sse2_cvtss2sd;	 // "86.sse2.cvtss2sd"
                }
                break;
              }
              break;
            case 'p':	 // 9 strings to match.
              switch (NameR[9]) {
              default: break;
              case 'a':	 // 2 strings to match.
                if (memcmp(NameR.data()+10, "ddus.", 5))
                  break;
                switch (NameR[15]) {
                default: break;
                case 'b':	 // 1 string to match.
                  return Intrinsic::x86_sse2_paddus_b;	 // "86.sse2.paddus.b"
                case 'w':	 // 1 string to match.
                  return Intrinsic::x86_sse2_paddus_w;	 // "86.sse2.paddus.w"
                }
                break;
              case 'm':	 // 3 strings to match.
                switch (NameR[10]) {
                default: break;
                case 'a':	 // 1 string to match.
                  if (memcmp(NameR.data()+11, "dd.wd", 5))
                    break;
                  return Intrinsic::x86_sse2_pmadd_wd;	 // "86.sse2.pmadd.wd"
                case 'u':	 // 2 strings to match.
                  if (NameR[11] != 'l')
                    break;
                  switch (NameR[12]) {
                  default: break;
                  case 'h':	 // 1 string to match.
                    if (memcmp(NameR.data()+13, "u.w", 3))
                      break;
                    return Intrinsic::x86_sse2_pmulhu_w;	 // "86.sse2.pmulhu.w"
                  case 'u':	 // 1 string to match.
                    if (memcmp(NameR.data()+13, ".dq", 3))
                      break;
                    return Intrinsic::x86_sse2_pmulu_dq;	 // "86.sse2.pmulu.dq"
                  }
                  break;
                }
                break;
              case 's':	 // 4 strings to match.
                switch (NameR[10]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(NameR.data()+11, "uf", 2))
                    break;
                  switch (NameR[13]) {
                  default: break;
                  case 'h':	 // 1 string to match.
                    if (memcmp(NameR.data()+14, ".w", 2))
                      break;
                    return Intrinsic::x86_sse2_pshufh_w;	 // "86.sse2.pshufh.w"
                  case 'l':	 // 1 string to match.
                    if (memcmp(NameR.data()+14, ".w", 2))
                      break;
                    return Intrinsic::x86_sse2_pshufl_w;	 // "86.sse2.pshufl.w"
                  }
                  break;
                case 'u':	 // 2 strings to match.
                  if (memcmp(NameR.data()+11, "bus.", 4))
                    break;
                  switch (NameR[15]) {
                  default: break;
                  case 'b':	 // 1 string to match.
                    return Intrinsic::x86_sse2_psubus_b;	 // "86.sse2.psubus.b"
                  case 'w':	 // 1 string to match.
                    return Intrinsic::x86_sse2_psubus_w;	 // "86.sse2.psubus.w"
                  }
                  break;
                }
                break;
              }
              break;
            }
            break;
          case '4':	 // 5 strings to match.
            switch (NameR[7]) {
            default: break;
            case '1':	 // 4 strings to match.
              if (NameR[8] != '.')
                break;
              switch (NameR[9]) {
              default: break;
              case 'b':	 // 2 strings to match.
                if (memcmp(NameR.data()+10, "lendp", 5))
                  break;
                switch (NameR[15]) {
                default: break;
                case 'd':	 // 1 string to match.
                  return Intrinsic::x86_sse41_blendpd;	 // "86.sse41.blendpd"
                case 's':	 // 1 string to match.
                  return Intrinsic::x86_sse41_blendps;	 // "86.sse41.blendps"
                }
                break;
              case 'm':	 // 1 string to match.
                if (memcmp(NameR.data()+10, "psadbw", 6))
                  break;
                return Intrinsic::x86_sse41_mpsadbw;	 // "86.sse41.mpsadbw"
              case 'p':	 // 1 string to match.
                if (memcmp(NameR.data()+10, "blendw", 6))
                  break;
                return Intrinsic::x86_sse41_pblendw;	 // "86.sse41.pblendw"
              }
              break;
            case 'a':	 // 1 string to match.
              if (memcmp(NameR.data()+8, ".insertq", 8))
                break;
              return Intrinsic::x86_sse4a_insertq;	 // "86.sse4a.insertq"
            }
            break;
          }
          break;
        case 's':	 // 8 strings to match.
          if (memcmp(NameR.data()+6, "e3.p", 4))
            break;
          switch (NameR[10]) {
          default: break;
          case 'h':	 // 4 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "dd.", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_ssse3_phadd_d;	 // "86.ssse3.phadd.d"
              case 'w':	 // 1 string to match.
                return Intrinsic::x86_ssse3_phadd_w;	 // "86.ssse3.phadd.w"
              }
              break;
            case 's':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "ub.", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_ssse3_phsub_d;	 // "86.ssse3.phsub.d"
              case 'w':	 // 1 string to match.
                return Intrinsic::x86_ssse3_phsub_w;	 // "86.ssse3.phsub.w"
              }
              break;
            }
            break;
          case 's':	 // 4 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'h':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "uf.b", 4))
                break;
              return Intrinsic::x86_ssse3_pshuf_b;	 // "86.ssse3.pshuf.b"
            case 'i':	 // 3 strings to match.
              if (memcmp(NameR.data()+12, "gn.", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::x86_ssse3_psign_b;	 // "86.ssse3.psign.b"
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_ssse3_psign_d;	 // "86.ssse3.psign.d"
              case 'w':	 // 1 string to match.
                return Intrinsic::x86_ssse3_psign_w;	 // "86.ssse3.psign.w"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 'v':	 // 4 strings to match.
        if (memcmp(NameR.data()+4, "cvtp", 4))
          break;
        switch (NameR[8]) {
        default: break;
        case 'h':	 // 2 strings to match.
          if (memcmp(NameR.data()+9, "2ps.", 4))
            break;
          switch (NameR[13]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(NameR.data()+14, "28", 2))
              break;
            return Intrinsic::x86_vcvtph2ps_128;	 // "86.vcvtph2ps.128"
          case '2':	 // 1 string to match.
            if (memcmp(NameR.data()+14, "56", 2))
              break;
            return Intrinsic::x86_vcvtph2ps_256;	 // "86.vcvtph2ps.256"
          }
          break;
        case 's':	 // 2 strings to match.
          if (memcmp(NameR.data()+9, "2ph.", 4))
            break;
          switch (NameR[13]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(NameR.data()+14, "28", 2))
              break;
            return Intrinsic::x86_vcvtps2ph_128;	 // "86.vcvtps2ph.128"
          case '2':	 // 1 string to match.
            if (memcmp(NameR.data()+14, "56", 2))
              break;
            return Intrinsic::x86_vcvtps2ph_256;	 // "86.vcvtps2ph.256"
          }
          break;
        }
        break;
      case 'x':	 // 12 strings to match.
        if (memcmp(NameR.data()+4, "op.vp", 5))
          break;
        switch (NameR[9]) {
        default: break;
        case 'h':	 // 6 strings to match.
          if (memcmp(NameR.data()+10, "addu", 4))
            break;
          switch (NameR[14]) {
          default: break;
          case 'b':	 // 3 strings to match.
            switch (NameR[15]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_xop_vphaddubd;	 // "86.xop.vphaddubd"
            case 'q':	 // 1 string to match.
              return Intrinsic::x86_xop_vphaddubq;	 // "86.xop.vphaddubq"
            case 'w':	 // 1 string to match.
              return Intrinsic::x86_xop_vphaddubw;	 // "86.xop.vphaddubw"
            }
            break;
          case 'd':	 // 1 string to match.
            if (NameR[15] != 'q')
              break;
            return Intrinsic::x86_xop_vphaddudq;	 // "86.xop.vphaddudq"
          case 'w':	 // 2 strings to match.
            switch (NameR[15]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_xop_vphadduwd;	 // "86.xop.vphadduwd"
            case 'q':	 // 1 string to match.
              return Intrinsic::x86_xop_vphadduwq;	 // "86.xop.vphadduwq"
            }
            break;
          }
          break;
        case 'm':	 // 6 strings to match.
          if (NameR[10] != 'a')
            break;
          switch (NameR[11]) {
          default: break;
          case 'c':	 // 5 strings to match.
            if (NameR[12] != 's')
              break;
            switch (NameR[13]) {
            default: break;
            case 'd':	 // 2 strings to match.
              if (NameR[14] != 'q')
                break;
              switch (NameR[15]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::x86_xop_vpmacsdqh;	 // "86.xop.vpmacsdqh"
              case 'l':	 // 1 string to match.
                return Intrinsic::x86_xop_vpmacsdql;	 // "86.xop.vpmacsdql"
              }
              break;
            case 's':	 // 3 strings to match.
              switch (NameR[14]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (NameR[15] != 'd')
                  break;
                return Intrinsic::x86_xop_vpmacssdd;	 // "86.xop.vpmacssdd"
              case 'w':	 // 2 strings to match.
                switch (NameR[15]) {
                default: break;
                case 'd':	 // 1 string to match.
                  return Intrinsic::x86_xop_vpmacsswd;	 // "86.xop.vpmacsswd"
                case 'w':	 // 1 string to match.
                  return Intrinsic::x86_xop_vpmacssww;	 // "86.xop.vpmacssww"
                }
                break;
              }
              break;
            }
            break;
          case 'd':	 // 1 string to match.
            if (memcmp(NameR.data()+12, "cswd", 4))
              break;
            return Intrinsic::x86_xop_vpmadcswd;	 // "86.xop.vpmadcswd"
          }
          break;
        }
        break;
      }
      break;
    case 17:	 // 87 strings to match.
      if (memcmp(NameR.data()+0, "86.", 3))
        break;
      switch (NameR[3]) {
      default: break;
      case '3':	 // 4 strings to match.
        if (memcmp(NameR.data()+4, "dnow", 4))
          break;
        switch (NameR[8]) {
        default: break;
        case '.':	 // 3 strings to match.
          if (memcmp(NameR.data()+9, "pfr", 3))
            break;
          switch (NameR[12]) {
          default: break;
          case 'c':	 // 2 strings to match.
            if (memcmp(NameR.data()+13, "pit", 3))
              break;
            switch (NameR[16]) {
            default: break;
            case '1':	 // 1 string to match.
              return Intrinsic::x86_3dnow_pfrcpit1;	 // "86.3dnow.pfrcpit1"
            case '2':	 // 1 string to match.
              return Intrinsic::x86_3dnow_pfrcpit2;	 // "86.3dnow.pfrcpit2"
            }
            break;
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+13, "qit1", 4))
              break;
            return Intrinsic::x86_3dnow_pfrsqit1;	 // "86.3dnow.pfrsqit1"
          }
          break;
        case 'a':	 // 1 string to match.
          if (memcmp(NameR.data()+9, ".pfpnacc", 8))
            break;
          return Intrinsic::x86_3dnowa_pfpnacc;	 // "86.3dnowa.pfpnacc"
        }
        break;
      case 'a':	 // 17 strings to match.
        if (memcmp(NameR.data()+4, "vx", 2))
          break;
        switch (NameR[6]) {
        default: break;
        case '.':	 // 11 strings to match.
          switch (NameR[7]) {
          default: break;
          case 'c':	 // 2 strings to match.
            if (memcmp(NameR.data()+8, "mp.p", 4))
              break;
            switch (NameR[12]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+13, ".256", 4))
                break;
              return Intrinsic::x86_avx_cmp_pd_256;	 // "86.avx.cmp.pd.256"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+13, ".256", 4))
                break;
              return Intrinsic::x86_avx_cmp_ps_256;	 // "86.avx.cmp.ps.256"
            }
            break;
          case 'l':	 // 1 string to match.
            if (memcmp(NameR.data()+8, "du.dq.256", 9))
              break;
            return Intrinsic::x86_avx_ldu_dq_256;	 // "86.avx.ldu.dq.256"
          case 'm':	 // 4 strings to match.
            switch (NameR[8]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (memcmp(NameR.data()+9, "x.p", 3))
                break;
              switch (NameR[12]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+13, ".256", 4))
                  break;
                return Intrinsic::x86_avx_max_pd_256;	 // "86.avx.max.pd.256"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+13, ".256", 4))
                  break;
                return Intrinsic::x86_avx_max_ps_256;	 // "86.avx.max.ps.256"
              }
              break;
            case 'i':	 // 2 strings to match.
              if (memcmp(NameR.data()+9, "n.p", 3))
                break;
              switch (NameR[12]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+13, ".256", 4))
                  break;
                return Intrinsic::x86_avx_min_pd_256;	 // "86.avx.min.pd.256"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+13, ".256", 4))
                  break;
                return Intrinsic::x86_avx_min_ps_256;	 // "86.avx.min.ps.256"
              }
              break;
            }
            break;
          case 'p':	 // 2 strings to match.
            if (memcmp(NameR.data()+8, "test", 4))
              break;
            switch (NameR[12]) {
            default: break;
            case 'c':	 // 1 string to match.
              if (memcmp(NameR.data()+13, ".256", 4))
                break;
              return Intrinsic::x86_avx_ptestc_256;	 // "86.avx.ptestc.256"
            case 'z':	 // 1 string to match.
              if (memcmp(NameR.data()+13, ".256", 4))
                break;
              return Intrinsic::x86_avx_ptestz_256;	 // "86.avx.ptestz.256"
            }
            break;
          case 'r':	 // 1 string to match.
            if (memcmp(NameR.data()+8, "cp.ps.256", 9))
              break;
            return Intrinsic::x86_avx_rcp_ps_256;	 // "86.avx.rcp.ps.256"
          case 'v':	 // 1 string to match.
            if (memcmp(NameR.data()+8, "zeroupper", 9))
              break;
            return Intrinsic::x86_avx_vzeroupper;	 // "86.avx.vzeroupper"
          }
          break;
        case '5':	 // 6 strings to match.
          if (memcmp(NameR.data()+7, "12.", 3))
            break;
          switch (NameR[10]) {
          default: break;
          case 'k':	 // 2 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "ndn.w", 5))
                break;
              return Intrinsic::x86_avx512_kandn_w;	 // "86.avx512.kandn.w"
            case 'x':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "nor.w", 5))
                break;
              return Intrinsic::x86_avx512_kxnor_w;	 // "86.avx512.kxnor.w"
            }
            break;
          case 'p':	 // 2 strings to match.
            if (NameR[11] != 's')
              break;
            switch (NameR[12]) {
            default: break;
            case 'l':	 // 1 string to match.
              if (memcmp(NameR.data()+13, "l.dq", 4))
                break;
              return Intrinsic::x86_avx512_psll_dq;	 // "86.avx512.psll.dq"
            case 'r':	 // 1 string to match.
              if (memcmp(NameR.data()+13, "l.dq", 4))
                break;
              return Intrinsic::x86_avx512_psrl_dq;	 // "86.avx512.psrl.dq"
            }
            break;
          case 's':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "qrt.s", 5))
              break;
            switch (NameR[16]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_avx512_sqrt_sd;	 // "86.avx512.sqrt.sd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_avx512_sqrt_ss;	 // "86.avx512.sqrt.ss"
            }
            break;
          }
          break;
        }
        break;
      case 'f':	 // 8 strings to match.
        if (memcmp(NameR.data()+4, "ma.vfnm", 7))
          break;
        switch (NameR[11]) {
        default: break;
        case 'a':	 // 4 strings to match.
          if (memcmp(NameR.data()+12, "dd.", 3))
            break;
          switch (NameR[15]) {
          default: break;
          case 'p':	 // 2 strings to match.
            switch (NameR[16]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_fma_vfnmadd_pd;	 // "86.fma.vfnmadd.pd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_fma_vfnmadd_ps;	 // "86.fma.vfnmadd.ps"
            }
            break;
          case 's':	 // 2 strings to match.
            switch (NameR[16]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_fma_vfnmadd_sd;	 // "86.fma.vfnmadd.sd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_fma_vfnmadd_ss;	 // "86.fma.vfnmadd.ss"
            }
            break;
          }
          break;
        case 's':	 // 4 strings to match.
          if (memcmp(NameR.data()+12, "ub.", 3))
            break;
          switch (NameR[15]) {
          default: break;
          case 'p':	 // 2 strings to match.
            switch (NameR[16]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_fma_vfnmsub_pd;	 // "86.fma.vfnmsub.pd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_fma_vfnmsub_ps;	 // "86.fma.vfnmsub.ps"
            }
            break;
          case 's':	 // 2 strings to match.
            switch (NameR[16]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_fma_vfnmsub_sd;	 // "86.fma.vfnmsub.sd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_fma_vfnmsub_ss;	 // "86.fma.vfnmsub.ss"
            }
            break;
          }
          break;
        }
        break;
      case 's':	 // 50 strings to match.
        if (NameR[4] != 's')
          break;
        switch (NameR[5]) {
        default: break;
        case 'e':	 // 48 strings to match.
          switch (NameR[6]) {
          default: break;
          case '.':	 // 8 strings to match.
            switch (NameR[7]) {
            default: break;
            case 'c':	 // 3 strings to match.
              switch (NameR[8]) {
              default: break;
              case 'o':	 // 1 string to match.
                if (memcmp(NameR.data()+9, "mineq.ss", 8))
                  break;
                return Intrinsic::x86_sse_comineq_ss;	 // "86.sse.comineq.ss"
              case 'v':	 // 2 strings to match.
                if (memcmp(NameR.data()+9, "ts", 2))
                  break;
                switch (NameR[11]) {
                default: break;
                case 'i':	 // 1 string to match.
                  if (memcmp(NameR.data()+12, "642ss", 5))
                    break;
                  return Intrinsic::x86_sse_cvtsi642ss;	 // "86.sse.cvtsi642ss"
                case 's':	 // 1 string to match.
                  if (memcmp(NameR.data()+12, "2si64", 5))
                    break;
                  return Intrinsic::x86_sse_cvtss2si64;	 // "86.sse.cvtss2si64"
                }
                break;
              }
              break;
            case 'u':	 // 5 strings to match.
              if (memcmp(NameR.data()+8, "comi", 4))
                break;
              switch (NameR[12]) {
              default: break;
              case 'e':	 // 1 string to match.
                if (memcmp(NameR.data()+13, "q.ss", 4))
                  break;
                return Intrinsic::x86_sse_ucomieq_ss;	 // "86.sse.ucomieq.ss"
              case 'g':	 // 2 strings to match.
                switch (NameR[13]) {
                default: break;
                case 'e':	 // 1 string to match.
                  if (memcmp(NameR.data()+14, ".ss", 3))
                    break;
                  return Intrinsic::x86_sse_ucomige_ss;	 // "86.sse.ucomige.ss"
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+14, ".ss", 3))
                    break;
                  return Intrinsic::x86_sse_ucomigt_ss;	 // "86.sse.ucomigt.ss"
                }
                break;
              case 'l':	 // 2 strings to match.
                switch (NameR[13]) {
                default: break;
                case 'e':	 // 1 string to match.
                  if (memcmp(NameR.data()+14, ".ss", 3))
                    break;
                  return Intrinsic::x86_sse_ucomile_ss;	 // "86.sse.ucomile.ss"
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+14, ".ss", 3))
                    break;
                  return Intrinsic::x86_sse_ucomilt_ss;	 // "86.sse.ucomilt.ss"
                }
                break;
              }
              break;
            }
            break;
          case '2':	 // 12 strings to match.
            if (NameR[7] != '.')
              break;
            switch (NameR[8]) {
            default: break;
            case 'c':	 // 8 strings to match.
              switch (NameR[9]) {
              default: break;
              case 'o':	 // 5 strings to match.
                if (memcmp(NameR.data()+10, "mi", 2))
                  break;
                switch (NameR[12]) {
                default: break;
                case 'e':	 // 1 string to match.
                  if (memcmp(NameR.data()+13, "q.sd", 4))
                    break;
                  return Intrinsic::x86_sse2_comieq_sd;	 // "86.sse2.comieq.sd"
                case 'g':	 // 2 strings to match.
                  switch (NameR[13]) {
                  default: break;
                  case 'e':	 // 1 string to match.
                    if (memcmp(NameR.data()+14, ".sd", 3))
                      break;
                    return Intrinsic::x86_sse2_comige_sd;	 // "86.sse2.comige.sd"
                  case 't':	 // 1 string to match.
                    if (memcmp(NameR.data()+14, ".sd", 3))
                      break;
                    return Intrinsic::x86_sse2_comigt_sd;	 // "86.sse2.comigt.sd"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  switch (NameR[13]) {
                  default: break;
                  case 'e':	 // 1 string to match.
                    if (memcmp(NameR.data()+14, ".sd", 3))
                      break;
                    return Intrinsic::x86_sse2_comile_sd;	 // "86.sse2.comile.sd"
                  case 't':	 // 1 string to match.
                    if (memcmp(NameR.data()+14, ".sd", 3))
                      break;
                    return Intrinsic::x86_sse2_comilt_sd;	 // "86.sse2.comilt.sd"
                  }
                  break;
                }
                break;
              case 'v':	 // 3 strings to match.
                if (memcmp(NameR.data()+10, "tt", 2))
                  break;
                switch (NameR[12]) {
                default: break;
                case 'p':	 // 2 strings to match.
                  switch (NameR[13]) {
                  default: break;
                  case 'd':	 // 1 string to match.
                    if (memcmp(NameR.data()+14, "2dq", 3))
                      break;
                    return Intrinsic::x86_sse2_cvttpd2dq;	 // "86.sse2.cvttpd2dq"
                  case 's':	 // 1 string to match.
                    if (memcmp(NameR.data()+14, "2dq", 3))
                      break;
                    return Intrinsic::x86_sse2_cvttps2dq;	 // "86.sse2.cvttps2dq"
                  }
                  break;
                case 's':	 // 1 string to match.
                  if (memcmp(NameR.data()+13, "d2si", 4))
                    break;
                  return Intrinsic::x86_sse2_cvttsd2si;	 // "86.sse2.cvttsd2si"
                }
                break;
              }
              break;
            case 'm':	 // 1 string to match.
              if (memcmp(NameR.data()+9, "ovmsk.pd", 8))
                break;
              return Intrinsic::x86_sse2_movmsk_pd;	 // "86.sse2.movmsk.pd"
            case 's':	 // 3 strings to match.
              if (memcmp(NameR.data()+9, "tore", 4))
                break;
              switch (NameR[13]) {
              default: break;
              case 'l':	 // 1 string to match.
                if (memcmp(NameR.data()+14, ".dq", 3))
                  break;
                return Intrinsic::x86_sse2_storel_dq;	 // "86.sse2.storel.dq"
              case 'u':	 // 2 strings to match.
                if (NameR[14] != '.')
                  break;
                switch (NameR[15]) {
                default: break;
                case 'd':	 // 1 string to match.
                  if (NameR[16] != 'q')
                    break;
                  return Intrinsic::x86_sse2_storeu_dq;	 // "86.sse2.storeu.dq"
                case 'p':	 // 1 string to match.
                  if (NameR[16] != 'd')
                    break;
                  return Intrinsic::x86_sse2_storeu_pd;	 // "86.sse2.storeu.pd"
                }
                break;
              }
              break;
            }
            break;
          case '3':	 // 2 strings to match.
            if (memcmp(NameR.data()+7, ".addsub.p", 9))
              break;
            switch (NameR[16]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_sse3_addsub_pd;	 // "86.sse3.addsub.pd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_sse3_addsub_ps;	 // "86.sse3.addsub.ps"
            }
            break;
          case '4':	 // 26 strings to match.
            switch (NameR[7]) {
            default: break;
            case '1':	 // 23 strings to match.
              if (NameR[8] != '.')
                break;
              switch (NameR[9]) {
              default: break;
              case 'b':	 // 2 strings to match.
                if (memcmp(NameR.data()+10, "lendvp", 6))
                  break;
                switch (NameR[16]) {
                default: break;
                case 'd':	 // 1 string to match.
                  return Intrinsic::x86_sse41_blendvpd;	 // "86.sse41.blendvpd"
                case 's':	 // 1 string to match.
                  return Intrinsic::x86_sse41_blendvps;	 // "86.sse41.blendvps"
                }
                break;
              case 'i':	 // 1 string to match.
                if (memcmp(NameR.data()+10, "nsertps", 7))
                  break;
                return Intrinsic::x86_sse41_insertps;	 // "86.sse41.insertps"
              case 'm':	 // 1 string to match.
                if (memcmp(NameR.data()+10, "ovntdqa", 7))
                  break;
                return Intrinsic::x86_sse41_movntdqa;	 // "86.sse41.movntdqa"
              case 'p':	 // 15 strings to match.
                switch (NameR[10]) {
                default: break;
                case 'a':	 // 1 string to match.
                  if (memcmp(NameR.data()+11, "ckusdw", 6))
                    break;
                  return Intrinsic::x86_sse41_packusdw;	 // "86.sse41.packusdw"
                case 'b':	 // 1 string to match.
                  if (memcmp(NameR.data()+11, "lendvb", 6))
                    break;
                  return Intrinsic::x86_sse41_pblendvb;	 // "86.sse41.pblendvb"
                case 'm':	 // 12 strings to match.
                  if (memcmp(NameR.data()+11, "ov", 2))
                    break;
                  switch (NameR[13]) {
                  default: break;
                  case 's':	 // 6 strings to match.
                    if (NameR[14] != 'x')
                      break;
                    switch (NameR[15]) {
                    default: break;
                    case 'b':	 // 3 strings to match.
                      switch (NameR[16]) {
                      default: break;
                      case 'd':	 // 1 string to match.
                        return Intrinsic::x86_sse41_pmovsxbd;	 // "86.sse41.pmovsxbd"
                      case 'q':	 // 1 string to match.
                        return Intrinsic::x86_sse41_pmovsxbq;	 // "86.sse41.pmovsxbq"
                      case 'w':	 // 1 string to match.
                        return Intrinsic::x86_sse41_pmovsxbw;	 // "86.sse41.pmovsxbw"
                      }
                      break;
                    case 'd':	 // 1 string to match.
                      if (NameR[16] != 'q')
                        break;
                      return Intrinsic::x86_sse41_pmovsxdq;	 // "86.sse41.pmovsxdq"
                    case 'w':	 // 2 strings to match.
                      switch (NameR[16]) {
                      default: break;
                      case 'd':	 // 1 string to match.
                        return Intrinsic::x86_sse41_pmovsxwd;	 // "86.sse41.pmovsxwd"
                      case 'q':	 // 1 string to match.
                        return Intrinsic::x86_sse41_pmovsxwq;	 // "86.sse41.pmovsxwq"
                      }
                      break;
                    }
                    break;
                  case 'z':	 // 6 strings to match.
                    if (NameR[14] != 'x')
                      break;
                    switch (NameR[15]) {
                    default: break;
                    case 'b':	 // 3 strings to match.
                      switch (NameR[16]) {
                      default: break;
                      case 'd':	 // 1 string to match.
                        return Intrinsic::x86_sse41_pmovzxbd;	 // "86.sse41.pmovzxbd"
                      case 'q':	 // 1 string to match.
                        return Intrinsic::x86_sse41_pmovzxbq;	 // "86.sse41.pmovzxbq"
                      case 'w':	 // 1 string to match.
                        return Intrinsic::x86_sse41_pmovzxbw;	 // "86.sse41.pmovzxbw"
                      }
                      break;
                    case 'd':	 // 1 string to match.
                      if (NameR[16] != 'q')
                        break;
                      return Intrinsic::x86_sse41_pmovzxdq;	 // "86.sse41.pmovzxdq"
                    case 'w':	 // 2 strings to match.
                      switch (NameR[16]) {
                      default: break;
                      case 'd':	 // 1 string to match.
                        return Intrinsic::x86_sse41_pmovzxwd;	 // "86.sse41.pmovzxwd"
                      case 'q':	 // 1 string to match.
                        return Intrinsic::x86_sse41_pmovzxwq;	 // "86.sse41.pmovzxwq"
                      }
                      break;
                    }
                    break;
                  }
                  break;
                case 't':	 // 1 string to match.
                  if (memcmp(NameR.data()+11, "estnzc", 6))
                    break;
                  return Intrinsic::x86_sse41_ptestnzc;	 // "86.sse41.ptestnzc"
                }
                break;
              case 'r':	 // 4 strings to match.
                if (memcmp(NameR.data()+10, "ound.", 5))
                  break;
                switch (NameR[15]) {
                default: break;
                case 'p':	 // 2 strings to match.
                  switch (NameR[16]) {
                  default: break;
                  case 'd':	 // 1 string to match.
                    return Intrinsic::x86_sse41_round_pd;	 // "86.sse41.round.pd"
                  case 's':	 // 1 string to match.
                    return Intrinsic::x86_sse41_round_ps;	 // "86.sse41.round.ps"
                  }
                  break;
                case 's':	 // 2 strings to match.
                  switch (NameR[16]) {
                  default: break;
                  case 'd':	 // 1 string to match.
                    return Intrinsic::x86_sse41_round_sd;	 // "86.sse41.round.sd"
                  case 's':	 // 1 string to match.
                    return Intrinsic::x86_sse41_round_ss;	 // "86.sse41.round.ss"
                  }
                  break;
                }
                break;
              }
              break;
            case 'a':	 // 3 strings to match.
              if (NameR[8] != '.')
                break;
              switch (NameR[9]) {
              default: break;
              case 'i':	 // 1 string to match.
                if (memcmp(NameR.data()+10, "nsertqi", 7))
                  break;
                return Intrinsic::x86_sse4a_insertqi;	 // "86.sse4a.insertqi"
              case 'm':	 // 2 strings to match.
                if (memcmp(NameR.data()+10, "ovnt.s", 6))
                  break;
                switch (NameR[16]) {
                default: break;
                case 'd':	 // 1 string to match.
                  return Intrinsic::x86_sse4a_movnt_sd;	 // "86.sse4a.movnt.sd"
                case 's':	 // 1 string to match.
                  return Intrinsic::x86_sse4a_movnt_ss;	 // "86.sse4a.movnt.ss"
                }
                break;
              }
              break;
            }
            break;
          }
          break;
        case 's':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "e3.ph", 5))
            break;
          switch (NameR[11]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(NameR.data()+12, "dd.sw", 5))
              break;
            return Intrinsic::x86_ssse3_phadd_sw;	 // "86.ssse3.phadd.sw"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+12, "ub.sw", 5))
              break;
            return Intrinsic::x86_ssse3_phsub_sw;	 // "86.ssse3.phsub.sw"
          }
          break;
        }
        break;
      case 't':	 // 2 strings to match.
        if (memcmp(NameR.data()+4, "bm.bextri.u", 11))
          break;
        switch (NameR[15]) {
        default: break;
        case '3':	 // 1 string to match.
          if (NameR[16] != '2')
            break;
          return Intrinsic::x86_tbm_bextri_u32;	 // "86.tbm.bextri.u32"
        case '6':	 // 1 string to match.
          if (NameR[16] != '4')
            break;
          return Intrinsic::x86_tbm_bextri_u64;	 // "86.tbm.bextri.u64"
        }
        break;
      case 'x':	 // 6 strings to match.
        if (memcmp(NameR.data()+4, "op.vp", 5))
          break;
        switch (NameR[9]) {
        default: break;
        case 'c':	 // 1 string to match.
          if (memcmp(NameR.data()+10, "mov.256", 7))
            break;
          return Intrinsic::x86_xop_vpcmov_256;	 // "86.xop.vpcmov.256"
        case 'e':	 // 2 strings to match.
          if (memcmp(NameR.data()+10, "rmil2p", 6))
            break;
          switch (NameR[16]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_xop_vpermil2pd;	 // "86.xop.vpermil2pd"
          case 's':	 // 1 string to match.
            return Intrinsic::x86_xop_vpermil2ps;	 // "86.xop.vpermil2ps"
          }
          break;
        case 'm':	 // 3 strings to match.
          if (NameR[10] != 'a')
            break;
          switch (NameR[11]) {
          default: break;
          case 'c':	 // 2 strings to match.
            if (memcmp(NameR.data()+12, "ssdq", 4))
              break;
            switch (NameR[16]) {
            default: break;
            case 'h':	 // 1 string to match.
              return Intrinsic::x86_xop_vpmacssdqh;	 // "86.xop.vpmacssdqh"
            case 'l':	 // 1 string to match.
              return Intrinsic::x86_xop_vpmacssdql;	 // "86.xop.vpmacssdql"
            }
            break;
          case 'd':	 // 1 string to match.
            if (memcmp(NameR.data()+12, "csswd", 5))
              break;
            return Intrinsic::x86_xop_vpmadcsswd;	 // "86.xop.vpmadcsswd"
          }
          break;
        }
        break;
      }
      break;
    case 18:	 // 45 strings to match.
      if (memcmp(NameR.data()+0, "86.", 3))
        break;
      switch (NameR[3]) {
      default: break;
      case 'a':	 // 32 strings to match.
        if (memcmp(NameR.data()+4, "vx", 2))
          break;
        switch (NameR[6]) {
        default: break;
        case '.':	 // 10 strings to match.
          switch (NameR[7]) {
          default: break;
          case 'h':	 // 4 strings to match.
            switch (NameR[8]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (memcmp(NameR.data()+9, "dd.p", 4))
                break;
              switch (NameR[13]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+14, ".256", 4))
                  break;
                return Intrinsic::x86_avx_hadd_pd_256;	 // "86.avx.hadd.pd.256"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+14, ".256", 4))
                  break;
                return Intrinsic::x86_avx_hadd_ps_256;	 // "86.avx.hadd.ps.256"
              }
              break;
            case 's':	 // 2 strings to match.
              if (memcmp(NameR.data()+9, "ub.p", 4))
                break;
              switch (NameR[13]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+14, ".256", 4))
                  break;
                return Intrinsic::x86_avx_hsub_pd_256;	 // "86.avx.hsub.pd.256"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+14, ".256", 4))
                  break;
                return Intrinsic::x86_avx_hsub_ps_256;	 // "86.avx.hsub.ps.256"
              }
              break;
            }
            break;
          case 'm':	 // 2 strings to match.
            if (memcmp(NameR.data()+8, "askload.p", 9))
              break;
            switch (NameR[17]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_avx_maskload_pd;	 // "86.avx.maskload.pd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_avx_maskload_ps;	 // "86.avx.maskload.ps"
            }
            break;
          case 's':	 // 2 strings to match.
            if (memcmp(NameR.data()+8, "qrt.p", 5))
              break;
            switch (NameR[13]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+14, ".256", 4))
                break;
              return Intrinsic::x86_avx_sqrt_pd_256;	 // "86.avx.sqrt.pd.256"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+14, ".256", 4))
                break;
              return Intrinsic::x86_avx_sqrt_ps_256;	 // "86.avx.sqrt.ps.256"
            }
            break;
          case 'v':	 // 2 strings to match.
            if (memcmp(NameR.data()+8, "testnzc.p", 9))
              break;
            switch (NameR[17]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_avx_vtestnzc_pd;	 // "86.avx.vtestnzc.pd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_avx_vtestnzc_ps;	 // "86.avx.vtestnzc.ps"
            }
            break;
          }
          break;
        case '2':	 // 10 strings to match.
          if (NameR[7] != '.')
            break;
          switch (NameR[8]) {
          default: break;
          case 'g':	 // 4 strings to match.
            if (memcmp(NameR.data()+9, "ather.", 6))
              break;
            switch (NameR[15]) {
            default: break;
            case 'd':	 // 2 strings to match.
              if (NameR[16] != '.')
                break;
              switch (NameR[17]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_avx2_gather_d_d;	 // "86.avx2.gather.d.d"
              case 'q':	 // 1 string to match.
                return Intrinsic::x86_avx2_gather_d_q;	 // "86.avx2.gather.d.q"
              }
              break;
            case 'q':	 // 2 strings to match.
              if (NameR[16] != '.')
                break;
              switch (NameR[17]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_avx2_gather_q_d;	 // "86.avx2.gather.q.d"
              case 'q':	 // 1 string to match.
                return Intrinsic::x86_avx2_gather_q_q;	 // "86.avx2.gather.q.q"
              }
              break;
            }
            break;
          case 'm':	 // 2 strings to match.
            if (memcmp(NameR.data()+9, "askload.", 8))
              break;
            switch (NameR[17]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_avx2_maskload_d;	 // "86.avx2.maskload.d"
            case 'q':	 // 1 string to match.
              return Intrinsic::x86_avx2_maskload_q;	 // "86.avx2.maskload.q"
            }
            break;
          case 'p':	 // 3 strings to match.
            switch (NameR[9]) {
            default: break;
            case 'm':	 // 1 string to match.
              if (memcmp(NameR.data()+10, "ul.hr.sw", 8))
                break;
              return Intrinsic::x86_avx2_pmul_hr_sw;	 // "86.avx2.pmul.hr.sw"
            case 's':	 // 2 strings to match.
              switch (NameR[10]) {
              default: break;
              case 'l':	 // 1 string to match.
                if (memcmp(NameR.data()+11, "l.dq.bs", 7))
                  break;
                return Intrinsic::x86_avx2_psll_dq_bs;	 // "86.avx2.psll.dq.bs"
              case 'r':	 // 1 string to match.
                if (memcmp(NameR.data()+11, "l.dq.bs", 7))
                  break;
                return Intrinsic::x86_avx2_psrl_dq_bs;	 // "86.avx2.psrl.dq.bs"
              }
              break;
            }
            break;
          case 'v':	 // 1 string to match.
            if (memcmp(NameR.data()+9, "perm2i128", 9))
              break;
            return Intrinsic::x86_avx2_vperm2i128;	 // "86.avx2.vperm2i128"
          }
          break;
        case '5':	 // 12 strings to match.
          if (memcmp(NameR.data()+7, "12.", 3))
            break;
          switch (NameR[10]) {
          default: break;
          case 'm':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "ovntdqa", 7))
              break;
            return Intrinsic::x86_avx512_movntdqa;	 // "86.avx512.movntdqa"
          case 'p':	 // 5 strings to match.
            if (memcmp(NameR.data()+11, "movzx", 5))
              break;
            switch (NameR[16]) {
            default: break;
            case 'b':	 // 2 strings to match.
              switch (NameR[17]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_avx512_pmovzxbd;	 // "86.avx512.pmovzxbd"
              case 'q':	 // 1 string to match.
                return Intrinsic::x86_avx512_pmovzxbq;	 // "86.avx512.pmovzxbq"
              }
              break;
            case 'd':	 // 1 string to match.
              if (NameR[17] != 'q')
                break;
              return Intrinsic::x86_avx512_pmovzxdq;	 // "86.avx512.pmovzxdq"
            case 'w':	 // 2 strings to match.
              switch (NameR[17]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_avx512_pmovzxwd;	 // "86.avx512.pmovzxwd"
              case 'q':	 // 1 string to match.
                return Intrinsic::x86_avx512_pmovzxwq;	 // "86.avx512.pmovzxwq"
              }
              break;
            }
            break;
          case 'r':	 // 6 strings to match.
            if (memcmp(NameR.data()+11, "cp", 2))
              break;
            switch (NameR[13]) {
            default: break;
            case '1':	 // 2 strings to match.
              if (memcmp(NameR.data()+14, "4.s", 3))
                break;
              switch (NameR[17]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_avx512_rcp14_sd;	 // "86.avx512.rcp14.sd"
              case 's':	 // 1 string to match.
                return Intrinsic::x86_avx512_rcp14_ss;	 // "86.avx512.rcp14.ss"
              }
              break;
            case '2':	 // 4 strings to match.
              if (memcmp(NameR.data()+14, "8.", 2))
                break;
              switch (NameR[16]) {
              default: break;
              case 'p':	 // 2 strings to match.
                switch (NameR[17]) {
                default: break;
                case 'd':	 // 1 string to match.
                  return Intrinsic::x86_avx512_rcp28_pd;	 // "86.avx512.rcp28.pd"
                case 's':	 // 1 string to match.
                  return Intrinsic::x86_avx512_rcp28_ps;	 // "86.avx512.rcp28.ps"
                }
                break;
              case 's':	 // 2 strings to match.
                switch (NameR[17]) {
                default: break;
                case 'd':	 // 1 string to match.
                  return Intrinsic::x86_avx512_rcp28_sd;	 // "86.avx512.rcp28.sd"
                case 's':	 // 1 string to match.
                  return Intrinsic::x86_avx512_rcp28_ss;	 // "86.avx512.rcp28.ss"
                }
                break;
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 's':	 // 13 strings to match.
        if (memcmp(NameR.data()+4, "se", 2))
          break;
        switch (NameR[6]) {
        default: break;
        case '.':	 // 2 strings to match.
          switch (NameR[7]) {
          default: break;
          case 'c':	 // 1 string to match.
            if (memcmp(NameR.data()+8, "vttss2si64", 10))
              break;
            return Intrinsic::x86_sse_cvttss2si64;	 // "86.sse.cvttss2si64"
          case 'u':	 // 1 string to match.
            if (memcmp(NameR.data()+8, "comineq.ss", 10))
              break;
            return Intrinsic::x86_sse_ucomineq_ss;	 // "86.sse.ucomineq.ss"
          }
          break;
        case '2':	 // 10 strings to match.
          if (NameR[7] != '.')
            break;
          switch (NameR[8]) {
          default: break;
          case 'c':	 // 3 strings to match.
            switch (NameR[9]) {
            default: break;
            case 'o':	 // 1 string to match.
              if (memcmp(NameR.data()+10, "mineq.sd", 8))
                break;
              return Intrinsic::x86_sse2_comineq_sd;	 // "86.sse2.comineq.sd"
            case 'v':	 // 2 strings to match.
              if (memcmp(NameR.data()+10, "ts", 2))
                break;
              switch (NameR[12]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+13, "2si64", 5))
                  break;
                return Intrinsic::x86_sse2_cvtsd2si64;	 // "86.sse2.cvtsd2si64"
              case 'i':	 // 1 string to match.
                if (memcmp(NameR.data()+13, "642sd", 5))
                  break;
                return Intrinsic::x86_sse2_cvtsi642sd;	 // "86.sse2.cvtsi642sd"
              }
              break;
            }
            break;
          case 'p':	 // 2 strings to match.
            if (NameR[9] != 's')
              break;
            switch (NameR[10]) {
            default: break;
            case 'l':	 // 1 string to match.
              if (memcmp(NameR.data()+11, "l.dq.bs", 7))
                break;
              return Intrinsic::x86_sse2_psll_dq_bs;	 // "86.sse2.psll.dq.bs"
            case 'r':	 // 1 string to match.
              if (memcmp(NameR.data()+11, "l.dq.bs", 7))
                break;
              return Intrinsic::x86_sse2_psrl_dq_bs;	 // "86.sse2.psrl.dq.bs"
            }
            break;
          case 'u':	 // 5 strings to match.
            if (memcmp(NameR.data()+9, "comi", 4))
              break;
            switch (NameR[13]) {
            default: break;
            case 'e':	 // 1 string to match.
              if (memcmp(NameR.data()+14, "q.sd", 4))
                break;
              return Intrinsic::x86_sse2_ucomieq_sd;	 // "86.sse2.ucomieq.sd"
            case 'g':	 // 2 strings to match.
              switch (NameR[14]) {
              default: break;
              case 'e':	 // 1 string to match.
                if (memcmp(NameR.data()+15, ".sd", 3))
                  break;
                return Intrinsic::x86_sse2_ucomige_sd;	 // "86.sse2.ucomige.sd"
              case 't':	 // 1 string to match.
                if (memcmp(NameR.data()+15, ".sd", 3))
                  break;
                return Intrinsic::x86_sse2_ucomigt_sd;	 // "86.sse2.ucomigt.sd"
              }
              break;
            case 'l':	 // 2 strings to match.
              switch (NameR[14]) {
              default: break;
              case 'e':	 // 1 string to match.
                if (memcmp(NameR.data()+15, ".sd", 3))
                  break;
                return Intrinsic::x86_sse2_ucomile_sd;	 // "86.sse2.ucomile.sd"
              case 't':	 // 1 string to match.
                if (memcmp(NameR.data()+15, ".sd", 3))
                  break;
                return Intrinsic::x86_sse2_ucomilt_sd;	 // "86.sse2.ucomilt.sd"
              }
              break;
            }
            break;
          }
          break;
        case '4':	 // 1 string to match.
          if (memcmp(NameR.data()+7, "1.extractps", 11))
            break;
          return Intrinsic::x86_sse41_extractps;	 // "86.sse41.extractps"
        }
        break;
      }
      break;
    case 19:	 // 45 strings to match.
      if (memcmp(NameR.data()+0, "86.", 3))
        break;
      switch (NameR[3]) {
      default: break;
      case 'a':	 // 30 strings to match.
        switch (NameR[4]) {
        default: break;
        case 'e':	 // 2 strings to match.
          if (memcmp(NameR.data()+5, "sni.aes", 7))
            break;
          switch (NameR[12]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(NameR.data()+13, "eclast", 6))
              break;
            return Intrinsic::x86_aesni_aesdeclast;	 // "86.aesni.aesdeclast"
          case 'e':	 // 1 string to match.
            if (memcmp(NameR.data()+13, "nclast", 6))
              break;
            return Intrinsic::x86_aesni_aesenclast;	 // "86.aesni.aesenclast"
          }
          break;
        case 'v':	 // 28 strings to match.
          if (NameR[5] != 'x')
            break;
          switch (NameR[6]) {
          default: break;
          case '.':	 // 8 strings to match.
            switch (NameR[7]) {
            default: break;
            case 'b':	 // 2 strings to match.
              if (memcmp(NameR.data()+8, "lend.p", 6))
                break;
              switch (NameR[14]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+15, ".256", 4))
                  break;
                return Intrinsic::x86_avx_blend_pd_256;	 // "86.avx.blend.pd.256"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+15, ".256", 4))
                  break;
                return Intrinsic::x86_avx_blend_ps_256;	 // "86.avx.blend.ps.256"
              }
              break;
            case 'm':	 // 2 strings to match.
              if (memcmp(NameR.data()+8, "askstore.p", 10))
                break;
              switch (NameR[18]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_avx_maskstore_pd;	 // "86.avx.maskstore.pd"
              case 's':	 // 1 string to match.
                return Intrinsic::x86_avx_maskstore_ps;	 // "86.avx.maskstore.ps"
              }
              break;
            case 'p':	 // 1 string to match.
              if (memcmp(NameR.data()+8, "testnzc.256", 11))
                break;
              return Intrinsic::x86_avx_ptestnzc_256;	 // "86.avx.ptestnzc.256"
            case 'r':	 // 3 strings to match.
              switch (NameR[8]) {
              default: break;
              case 'o':	 // 2 strings to match.
                if (memcmp(NameR.data()+9, "und.p", 5))
                  break;
                switch (NameR[14]) {
                default: break;
                case 'd':	 // 1 string to match.
                  if (memcmp(NameR.data()+15, ".256", 4))
                    break;
                  return Intrinsic::x86_avx_round_pd_256;	 // "86.avx.round.pd.256"
                case 's':	 // 1 string to match.
                  if (memcmp(NameR.data()+15, ".256", 4))
                    break;
                  return Intrinsic::x86_avx_round_ps_256;	 // "86.avx.round.ps.256"
                }
                break;
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+9, "qrt.ps.256", 10))
                  break;
                return Intrinsic::x86_avx_rsqrt_ps_256;	 // "86.avx.rsqrt.ps.256"
              }
              break;
            }
            break;
          case '2':	 // 15 strings to match.
            if (NameR[7] != '.')
              break;
            switch (NameR[8]) {
            default: break;
            case 'g':	 // 4 strings to match.
              if (memcmp(NameR.data()+9, "ather.", 6))
                break;
              switch (NameR[15]) {
              default: break;
              case 'd':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, ".p", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 'd':	 // 1 string to match.
                  return Intrinsic::x86_avx2_gather_d_pd;	 // "86.avx2.gather.d.pd"
                case 's':	 // 1 string to match.
                  return Intrinsic::x86_avx2_gather_d_ps;	 // "86.avx2.gather.d.ps"
                }
                break;
              case 'q':	 // 2 strings to match.
                if (memcmp(NameR.data()+16, ".p", 2))
                  break;
                switch (NameR[18]) {
                default: break;
                case 'd':	 // 1 string to match.
                  return Intrinsic::x86_avx2_gather_q_pd;	 // "86.avx2.gather.q.pd"
                case 's':	 // 1 string to match.
                  return Intrinsic::x86_avx2_gather_q_ps;	 // "86.avx2.gather.q.ps"
                }
                break;
              }
              break;
            case 'm':	 // 2 strings to match.
              if (memcmp(NameR.data()+9, "askstore.", 9))
                break;
              switch (NameR[18]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_avx2_maskstore_d;	 // "86.avx2.maskstore.d"
              case 'q':	 // 1 string to match.
                return Intrinsic::x86_avx2_maskstore_q;	 // "86.avx2.maskstore.q"
              }
              break;
            case 'p':	 // 8 strings to match.
              switch (NameR[9]) {
              default: break;
              case 'b':	 // 2 strings to match.
                if (memcmp(NameR.data()+10, "lendd.", 6))
                  break;
                switch (NameR[16]) {
                default: break;
                case '1':	 // 1 string to match.
                  if (memcmp(NameR.data()+17, "28", 2))
                    break;
                  return Intrinsic::x86_avx2_pblendd_128;	 // "86.avx2.pblendd.128"
                case '2':	 // 1 string to match.
                  if (memcmp(NameR.data()+17, "56", 2))
                    break;
                  return Intrinsic::x86_avx2_pblendd_256;	 // "86.avx2.pblendd.256"
                }
                break;
              case 'm':	 // 1 string to match.
                if (memcmp(NameR.data()+10, "add.ub.sw", 9))
                  break;
                return Intrinsic::x86_avx2_pmadd_ub_sw;	 // "86.avx2.pmadd.ub.sw"
              case 's':	 // 5 strings to match.
                switch (NameR[10]) {
                default: break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(NameR.data()+11, "lv.", 3))
                    break;
                  switch (NameR[14]) {
                  default: break;
                  case 'd':	 // 1 string to match.
                    if (memcmp(NameR.data()+15, ".256", 4))
                      break;
                    return Intrinsic::x86_avx2_psllv_d_256;	 // "86.avx2.psllv.d.256"
                  case 'q':	 // 1 string to match.
                    if (memcmp(NameR.data()+15, ".256", 4))
                      break;
                    return Intrinsic::x86_avx2_psllv_q_256;	 // "86.avx2.psllv.q.256"
                  }
                  break;
                case 'r':	 // 3 strings to match.
                  switch (NameR[11]) {
                  default: break;
                  case 'a':	 // 1 string to match.
                    if (memcmp(NameR.data()+12, "v.d.256", 7))
                      break;
                    return Intrinsic::x86_avx2_psrav_d_256;	 // "86.avx2.psrav.d.256"
                  case 'l':	 // 2 strings to match.
                    if (memcmp(NameR.data()+12, "v.", 2))
                      break;
                    switch (NameR[14]) {
                    default: break;
                    case 'd':	 // 1 string to match.
                      if (memcmp(NameR.data()+15, ".256", 4))
                        break;
                      return Intrinsic::x86_avx2_psrlv_d_256;	 // "86.avx2.psrlv.d.256"
                    case 'q':	 // 1 string to match.
                      if (memcmp(NameR.data()+15, ".256", 4))
                        break;
                      return Intrinsic::x86_avx2_psrlv_q_256;	 // "86.avx2.psrlv.q.256"
                    }
                    break;
                  }
                  break;
                }
                break;
              }
              break;
            case 'v':	 // 1 string to match.
              if (memcmp(NameR.data()+9, "inserti128", 10))
                break;
              return Intrinsic::x86_avx2_vinserti128;	 // "86.avx2.vinserti128"
            }
            break;
          case '5':	 // 5 strings to match.
            if (memcmp(NameR.data()+7, "12.", 3))
              break;
            switch (NameR[10]) {
            default: break;
            case 'c':	 // 4 strings to match.
              if (memcmp(NameR.data()+11, "vt", 2))
                break;
              switch (NameR[13]) {
              default: break;
              case 's':	 // 2 strings to match.
                switch (NameR[14]) {
                default: break;
                case 'd':	 // 1 string to match.
                  if (memcmp(NameR.data()+15, "2usi", 4))
                    break;
                  return Intrinsic::x86_avx512_cvtsd2usi;	 // "86.avx512.cvtsd2usi"
                case 's':	 // 1 string to match.
                  if (memcmp(NameR.data()+15, "2usi", 4))
                    break;
                  return Intrinsic::x86_avx512_cvtss2usi;	 // "86.avx512.cvtss2usi"
                }
                break;
              case 'u':	 // 2 strings to match.
                if (memcmp(NameR.data()+14, "si2s", 4))
                  break;
                switch (NameR[18]) {
                default: break;
                case 'd':	 // 1 string to match.
                  return Intrinsic::x86_avx512_cvtusi2sd;	 // "86.avx512.cvtusi2sd"
                case 's':	 // 1 string to match.
                  return Intrinsic::x86_avx512_cvtusi2ss;	 // "86.avx512.cvtusi2ss"
                }
                break;
              }
              break;
            case 'k':	 // 1 string to match.
              if (memcmp(NameR.data()+11, "unpck.bw", 8))
                break;
              return Intrinsic::x86_avx512_kunpck_bw;	 // "86.avx512.kunpck.bw"
            }
            break;
          }
          break;
        }
        break;
      case 'f':	 // 4 strings to match.
        if (memcmp(NameR.data()+4, "ma.vfm", 6))
          break;
        switch (NameR[10]) {
        default: break;
        case 'a':	 // 2 strings to match.
          if (memcmp(NameR.data()+11, "ddsub.p", 7))
            break;
          switch (NameR[18]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_fma_vfmaddsub_pd;	 // "86.fma.vfmaddsub.pd"
          case 's':	 // 1 string to match.
            return Intrinsic::x86_fma_vfmaddsub_ps;	 // "86.fma.vfmaddsub.ps"
          }
          break;
        case 's':	 // 2 strings to match.
          if (memcmp(NameR.data()+11, "ubadd.p", 7))
            break;
          switch (NameR[18]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_fma_vfmsubadd_pd;	 // "86.fma.vfmsubadd.pd"
          case 's':	 // 1 string to match.
            return Intrinsic::x86_fma_vfmsubadd_ps;	 // "86.fma.vfmsubadd.ps"
          }
          break;
        }
        break;
      case 's':	 // 9 strings to match.
        if (NameR[4] != 's')
          break;
        switch (NameR[5]) {
        default: break;
        case 'e':	 // 5 strings to match.
          switch (NameR[6]) {
          default: break;
          case '2':	 // 3 strings to match.
            if (NameR[7] != '.')
              break;
            switch (NameR[8]) {
            default: break;
            case 'c':	 // 1 string to match.
              if (memcmp(NameR.data()+9, "vttsd2si64", 10))
                break;
              return Intrinsic::x86_sse2_cvttsd2si64;	 // "86.sse2.cvttsd2si64"
            case 'm':	 // 1 string to match.
              if (memcmp(NameR.data()+9, "askmov.dqu", 10))
                break;
              return Intrinsic::x86_sse2_maskmov_dqu;	 // "86.sse2.maskmov.dqu"
            case 'u':	 // 1 string to match.
              if (memcmp(NameR.data()+9, "comineq.sd", 10))
                break;
              return Intrinsic::x86_sse2_ucomineq_sd;	 // "86.sse2.ucomineq.sd"
            }
            break;
          case '4':	 // 2 strings to match.
            switch (NameR[7]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(NameR.data()+8, ".phminposuw", 11))
                break;
              return Intrinsic::x86_sse41_phminposuw;	 // "86.sse41.phminposuw"
            case '2':	 // 1 string to match.
              if (memcmp(NameR.data()+8, ".crc32.32.8", 11))
                break;
              return Intrinsic::x86_sse42_crc32_32_8;	 // "86.sse42.crc32.32.8"
            }
            break;
          }
          break;
        case 's':	 // 4 strings to match.
          if (memcmp(NameR.data()+6, "e3.p", 4))
            break;
          switch (NameR[10]) {
          default: break;
          case 'a':	 // 3 strings to match.
            if (memcmp(NameR.data()+11, "bs.", 3))
              break;
            switch (NameR[14]) {
            default: break;
            case 'b':	 // 1 string to match.
              if (memcmp(NameR.data()+15, ".128", 4))
                break;
              return Intrinsic::x86_ssse3_pabs_b_128;	 // "86.ssse3.pabs.b.128"
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+15, ".128", 4))
                break;
              return Intrinsic::x86_ssse3_pabs_d_128;	 // "86.ssse3.pabs.d.128"
            case 'w':	 // 1 string to match.
              if (memcmp(NameR.data()+15, ".128", 4))
                break;
              return Intrinsic::x86_ssse3_pabs_w_128;	 // "86.ssse3.pabs.w.128"
            }
            break;
          case 'm':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "ul.hr.sw", 8))
              break;
            return Intrinsic::x86_ssse3_pmul_hr_sw;	 // "86.ssse3.pmul.hr.sw"
          }
          break;
        }
        break;
      case 'x':	 // 2 strings to match.
        if (memcmp(NameR.data()+4, "op.vfrcz.p", 10))
          break;
        switch (NameR[14]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(NameR.data()+15, ".256", 4))
            break;
          return Intrinsic::x86_xop_vfrcz_pd_256;	 // "86.xop.vfrcz.pd.256"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+15, ".256", 4))
            break;
          return Intrinsic::x86_xop_vfrcz_ps_256;	 // "86.xop.vfrcz.ps.256"
        }
        break;
      }
      break;
    case 20:	 // 56 strings to match.
      if (memcmp(NameR.data()+0, "86.", 3))
        break;
      switch (NameR[3]) {
      default: break;
      case 'a':	 // 32 strings to match.
        if (memcmp(NameR.data()+4, "vx", 2))
          break;
        switch (NameR[6]) {
        default: break;
        case '.':	 // 19 strings to match.
          switch (NameR[7]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (memcmp(NameR.data()+8, "ddsub.p", 7))
              break;
            switch (NameR[15]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+16, ".256", 4))
                break;
              return Intrinsic::x86_avx_addsub_pd_256;	 // "86.avx.addsub.pd.256"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+16, ".256", 4))
                break;
              return Intrinsic::x86_avx_addsub_ps_256;	 // "86.avx.addsub.ps.256"
            }
            break;
          case 'b':	 // 2 strings to match.
            if (memcmp(NameR.data()+8, "lendv.p", 7))
              break;
            switch (NameR[15]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+16, ".256", 4))
                break;
              return Intrinsic::x86_avx_blendv_pd_256;	 // "86.avx.blendv.pd.256"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+16, ".256", 4))
                break;
              return Intrinsic::x86_avx_blendv_ps_256;	 // "86.avx.blendv.ps.256"
            }
            break;
          case 'c':	 // 4 strings to match.
            if (memcmp(NameR.data()+8, "vt", 2))
              break;
            switch (NameR[10]) {
            default: break;
            case '.':	 // 2 strings to match.
              if (NameR[11] != 'p')
                break;
              switch (NameR[12]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+13, "2dq.256", 7))
                  break;
                return Intrinsic::x86_avx_cvt_pd2dq_256;	 // "86.avx.cvt.pd2dq.256"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+13, "2dq.256", 7))
                  break;
                return Intrinsic::x86_avx_cvt_ps2dq_256;	 // "86.avx.cvt.ps2dq.256"
              }
              break;
            case 'd':	 // 2 strings to match.
              if (memcmp(NameR.data()+11, "q2.p", 4))
                break;
              switch (NameR[15]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+16, ".256", 4))
                  break;
                return Intrinsic::x86_avx_cvtdq2_pd_256;	 // "86.avx.cvtdq2.pd.256"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+16, ".256", 4))
                  break;
                return Intrinsic::x86_avx_cvtdq2_ps_256;	 // "86.avx.cvtdq2.ps.256"
              }
              break;
            }
            break;
          case 'm':	 // 2 strings to match.
            if (memcmp(NameR.data()+8, "ovmsk.p", 7))
              break;
            switch (NameR[15]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+16, ".256", 4))
                break;
              return Intrinsic::x86_avx_movmsk_pd_256;	 // "86.avx.movmsk.pd.256"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+16, ".256", 4))
                break;
              return Intrinsic::x86_avx_movmsk_ps_256;	 // "86.avx.movmsk.ps.256"
            }
            break;
          case 's':	 // 3 strings to match.
            if (memcmp(NameR.data()+8, "toreu.", 6))
              break;
            switch (NameR[14]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+15, "q.256", 5))
                break;
              return Intrinsic::x86_avx_storeu_dq_256;	 // "86.avx.storeu.dq.256"
            case 'p':	 // 2 strings to match.
              switch (NameR[15]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+16, ".256", 4))
                  break;
                return Intrinsic::x86_avx_storeu_pd_256;	 // "86.avx.storeu.pd.256"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+16, ".256", 4))
                  break;
                return Intrinsic::x86_avx_storeu_ps_256;	 // "86.avx.storeu.ps.256"
              }
              break;
            }
            break;
          case 'v':	 // 6 strings to match.
            switch (NameR[8]) {
            default: break;
            case 'p':	 // 2 strings to match.
              if (memcmp(NameR.data()+9, "ermilvar.p", 10))
                break;
              switch (NameR[19]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_avx_vpermilvar_pd;	 // "86.avx.vpermilvar.pd"
              case 's':	 // 1 string to match.
                return Intrinsic::x86_avx_vpermilvar_ps;	 // "86.avx.vpermilvar.ps"
              }
              break;
            case 't':	 // 4 strings to match.
              if (memcmp(NameR.data()+9, "est", 3))
                break;
              switch (NameR[12]) {
              default: break;
              case 'c':	 // 2 strings to match.
                if (memcmp(NameR.data()+13, ".p", 2))
                  break;
                switch (NameR[15]) {
                default: break;
                case 'd':	 // 1 string to match.
                  if (memcmp(NameR.data()+16, ".256", 4))
                    break;
                  return Intrinsic::x86_avx_vtestc_pd_256;	 // "86.avx.vtestc.pd.256"
                case 's':	 // 1 string to match.
                  if (memcmp(NameR.data()+16, ".256", 4))
                    break;
                  return Intrinsic::x86_avx_vtestc_ps_256;	 // "86.avx.vtestc.ps.256"
                }
                break;
              case 'z':	 // 2 strings to match.
                if (memcmp(NameR.data()+13, ".p", 2))
                  break;
                switch (NameR[15]) {
                default: break;
                case 'd':	 // 1 string to match.
                  if (memcmp(NameR.data()+16, ".256", 4))
                    break;
                  return Intrinsic::x86_avx_vtestz_pd_256;	 // "86.avx.vtestz.pd.256"
                case 's':	 // 1 string to match.
                  if (memcmp(NameR.data()+16, ".256", 4))
                    break;
                  return Intrinsic::x86_avx_vtestz_ps_256;	 // "86.avx.vtestz.ps.256"
                }
                break;
              }
              break;
            }
            break;
          }
          break;
        case '2':	 // 1 string to match.
          if (memcmp(NameR.data()+7, ".vextracti128", 13))
            break;
          return Intrinsic::x86_avx2_vextracti128;	 // "86.avx2.vextracti128"
        case '5':	 // 12 strings to match.
          if (memcmp(NameR.data()+7, "12.", 3))
            break;
          switch (NameR[10]) {
          default: break;
          case 'c':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "vtts", 4))
              break;
            switch (NameR[15]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+16, "2usi", 4))
                break;
              return Intrinsic::x86_avx512_cvttsd2usi;	 // "86.avx512.cvttsd2usi"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+16, "2usi", 4))
                break;
              return Intrinsic::x86_avx512_cvttss2usi;	 // "86.avx512.cvttss2usi"
            }
            break;
          case 'k':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "ortest", 6))
              break;
            switch (NameR[17]) {
            default: break;
            case 'c':	 // 1 string to match.
              if (memcmp(NameR.data()+18, ".w", 2))
                break;
              return Intrinsic::x86_avx512_kortestc_w;	 // "86.avx512.kortestc.w"
            case 'z':	 // 1 string to match.
              if (memcmp(NameR.data()+18, ".w", 2))
                break;
              return Intrinsic::x86_avx512_kortestz_w;	 // "86.avx512.kortestz.w"
            }
            break;
          case 'p':	 // 2 strings to match.
            if (NameR[11] != 's')
              break;
            switch (NameR[12]) {
            default: break;
            case 'l':	 // 1 string to match.
              if (memcmp(NameR.data()+13, "l.dq.bs", 7))
                break;
              return Intrinsic::x86_avx512_psll_dq_bs;	 // "86.avx512.psll.dq.bs"
            case 'r':	 // 1 string to match.
              if (memcmp(NameR.data()+13, "l.dq.bs", 7))
                break;
              return Intrinsic::x86_avx512_psrl_dq_bs;	 // "86.avx512.psrl.dq.bs"
            }
            break;
          case 'r':	 // 6 strings to match.
            if (memcmp(NameR.data()+11, "sqrt", 4))
              break;
            switch (NameR[15]) {
            default: break;
            case '1':	 // 2 strings to match.
              if (memcmp(NameR.data()+16, "4.s", 3))
                break;
              switch (NameR[19]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_avx512_rsqrt14_sd;	 // "86.avx512.rsqrt14.sd"
              case 's':	 // 1 string to match.
                return Intrinsic::x86_avx512_rsqrt14_ss;	 // "86.avx512.rsqrt14.ss"
              }
              break;
            case '2':	 // 4 strings to match.
              if (memcmp(NameR.data()+16, "8.", 2))
                break;
              switch (NameR[18]) {
              default: break;
              case 'p':	 // 2 strings to match.
                switch (NameR[19]) {
                default: break;
                case 'd':	 // 1 string to match.
                  return Intrinsic::x86_avx512_rsqrt28_pd;	 // "86.avx512.rsqrt28.pd"
                case 's':	 // 1 string to match.
                  return Intrinsic::x86_avx512_rsqrt28_ps;	 // "86.avx512.rsqrt28.ps"
                }
                break;
              case 's':	 // 2 strings to match.
                switch (NameR[19]) {
                default: break;
                case 'd':	 // 1 string to match.
                  return Intrinsic::x86_avx512_rsqrt28_sd;	 // "86.avx512.rsqrt28.sd"
                case 's':	 // 1 string to match.
                  return Intrinsic::x86_avx512_rsqrt28_ss;	 // "86.avx512.rsqrt28.ss"
                }
                break;
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 'f':	 // 8 strings to match.
        if (memcmp(NameR.data()+4, "ma.vfm", 6))
          break;
        switch (NameR[10]) {
        default: break;
        case 'a':	 // 4 strings to match.
          if (memcmp(NameR.data()+11, "dd.p", 4))
            break;
          switch (NameR[15]) {
          default: break;
          case 'd':	 // 2 strings to match.
            if (NameR[16] != '.')
              break;
            switch (NameR[17]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "56", 2))
                break;
              return Intrinsic::x86_fma_vfmadd_pd_256;	 // "86.fma.vfmadd.pd.256"
            case '5':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "12", 2))
                break;
              return Intrinsic::x86_fma_vfmadd_pd_512;	 // "86.fma.vfmadd.pd.512"
            }
            break;
          case 's':	 // 2 strings to match.
            if (NameR[16] != '.')
              break;
            switch (NameR[17]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "56", 2))
                break;
              return Intrinsic::x86_fma_vfmadd_ps_256;	 // "86.fma.vfmadd.ps.256"
            case '5':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "12", 2))
                break;
              return Intrinsic::x86_fma_vfmadd_ps_512;	 // "86.fma.vfmadd.ps.512"
            }
            break;
          }
          break;
        case 's':	 // 4 strings to match.
          if (memcmp(NameR.data()+11, "ub.p", 4))
            break;
          switch (NameR[15]) {
          default: break;
          case 'd':	 // 2 strings to match.
            if (NameR[16] != '.')
              break;
            switch (NameR[17]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "56", 2))
                break;
              return Intrinsic::x86_fma_vfmsub_pd_256;	 // "86.fma.vfmsub.pd.256"
            case '5':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "12", 2))
                break;
              return Intrinsic::x86_fma_vfmsub_pd_512;	 // "86.fma.vfmsub.pd.512"
            }
            break;
          case 's':	 // 2 strings to match.
            if (NameR[16] != '.')
              break;
            switch (NameR[17]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "56", 2))
                break;
              return Intrinsic::x86_fma_vfmsub_ps_256;	 // "86.fma.vfmsub.ps.256"
            case '5':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "12", 2))
                break;
              return Intrinsic::x86_fma_vfmsub_ps_512;	 // "86.fma.vfmsub.ps.512"
            }
            break;
          }
          break;
        }
        break;
      case 's':	 // 16 strings to match.
        if (NameR[4] != 's')
          break;
        switch (NameR[5]) {
        default: break;
        case 'e':	 // 7 strings to match.
          switch (NameR[6]) {
          default: break;
          case '2':	 // 4 strings to match.
            if (memcmp(NameR.data()+7, ".p", 2))
              break;
            switch (NameR[9]) {
            default: break;
            case 'a':	 // 3 strings to match.
              if (memcmp(NameR.data()+10, "ck", 2))
                break;
              switch (NameR[12]) {
              default: break;
              case 's':	 // 2 strings to match.
                if (NameR[13] != 's')
                  break;
                switch (NameR[14]) {
                default: break;
                case 'd':	 // 1 string to match.
                  if (memcmp(NameR.data()+15, "w.128", 5))
                    break;
                  return Intrinsic::x86_sse2_packssdw_128;	 // "86.sse2.packssdw.128"
                case 'w':	 // 1 string to match.
                  if (memcmp(NameR.data()+15, "b.128", 5))
                    break;
                  return Intrinsic::x86_sse2_packsswb_128;	 // "86.sse2.packsswb.128"
                }
                break;
              case 'u':	 // 1 string to match.
                if (memcmp(NameR.data()+13, "swb.128", 7))
                  break;
                return Intrinsic::x86_sse2_packuswb_128;	 // "86.sse2.packuswb.128"
              }
              break;
            case 'm':	 // 1 string to match.
              if (memcmp(NameR.data()+10, "ovmskb.128", 10))
                break;
              return Intrinsic::x86_sse2_pmovmskb_128;	 // "86.sse2.pmovmskb.128"
            }
            break;
          case '4':	 // 3 strings to match.
            if (memcmp(NameR.data()+7, "2.crc32.", 8))
              break;
            switch (NameR[15]) {
            default: break;
            case '3':	 // 2 strings to match.
              if (memcmp(NameR.data()+16, "2.", 2))
                break;
              switch (NameR[18]) {
              default: break;
              case '1':	 // 1 string to match.
                if (NameR[19] != '6')
                  break;
                return Intrinsic::x86_sse42_crc32_32_16;	 // "86.sse42.crc32.32.16"
              case '3':	 // 1 string to match.
                if (NameR[19] != '2')
                  break;
                return Intrinsic::x86_sse42_crc32_32_32;	 // "86.sse42.crc32.32.32"
              }
              break;
            case '6':	 // 1 string to match.
              if (memcmp(NameR.data()+16, "4.64", 4))
                break;
              return Intrinsic::x86_sse42_crc32_64_64;	 // "86.sse42.crc32.64.64"
            }
            break;
          }
          break;
        case 's':	 // 9 strings to match.
          if (memcmp(NameR.data()+6, "e3.p", 4))
            break;
          switch (NameR[10]) {
          default: break;
          case 'h':	 // 4 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "dd.", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+16, ".128", 4))
                  break;
                return Intrinsic::x86_ssse3_phadd_d_128;	 // "86.ssse3.phadd.d.128"
              case 'w':	 // 1 string to match.
                if (memcmp(NameR.data()+16, ".128", 4))
                  break;
                return Intrinsic::x86_ssse3_phadd_w_128;	 // "86.ssse3.phadd.w.128"
              }
              break;
            case 's':	 // 2 strings to match.
              if (memcmp(NameR.data()+12, "ub.", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+16, ".128", 4))
                  break;
                return Intrinsic::x86_ssse3_phsub_d_128;	 // "86.ssse3.phsub.d.128"
              case 'w':	 // 1 string to match.
                if (memcmp(NameR.data()+16, ".128", 4))
                  break;
                return Intrinsic::x86_ssse3_phsub_w_128;	 // "86.ssse3.phsub.w.128"
              }
              break;
            }
            break;
          case 'm':	 // 1 string to match.
            if (memcmp(NameR.data()+11, "add.ub.sw", 9))
              break;
            return Intrinsic::x86_ssse3_pmadd_ub_sw;	 // "86.ssse3.pmadd.ub.sw"
          case 's':	 // 4 strings to match.
            switch (NameR[11]) {
            default: break;
            case 'h':	 // 1 string to match.
              if (memcmp(NameR.data()+12, "uf.b.128", 8))
                break;
              return Intrinsic::x86_ssse3_pshuf_b_128;	 // "86.ssse3.pshuf.b.128"
            case 'i':	 // 3 strings to match.
              if (memcmp(NameR.data()+12, "gn.", 3))
                break;
              switch (NameR[15]) {
              default: break;
              case 'b':	 // 1 string to match.
                if (memcmp(NameR.data()+16, ".128", 4))
                  break;
                return Intrinsic::x86_ssse3_psign_b_128;	 // "86.ssse3.psign.b.128"
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+16, ".128", 4))
                  break;
                return Intrinsic::x86_ssse3_psign_d_128;	 // "86.ssse3.psign.d.128"
              case 'w':	 // 1 string to match.
                if (memcmp(NameR.data()+16, ".128", 4))
                  break;
                return Intrinsic::x86_ssse3_psign_w_128;	 // "86.ssse3.psign.w.128"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 21:	 // 28 strings to match.
      if (memcmp(NameR.data()+0, "86.", 3))
        break;
      switch (NameR[3]) {
      default: break;
      case 'a':	 // 12 strings to match.
        if (memcmp(NameR.data()+4, "vx", 2))
          break;
        switch (NameR[6]) {
        default: break;
        case '.':	 // 4 strings to match.
          if (memcmp(NameR.data()+7, "cvt", 3))
            break;
          switch (NameR[10]) {
          default: break;
          case '.':	 // 2 strings to match.
            if (NameR[11] != 'p')
              break;
            switch (NameR[12]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+13, "2.ps.256", 8))
                break;
              return Intrinsic::x86_avx_cvt_pd2_ps_256;	 // "86.avx.cvt.pd2.ps.256"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+13, "2.pd.256", 8))
                break;
              return Intrinsic::x86_avx_cvt_ps2_pd_256;	 // "86.avx.cvt.ps2.pd.256"
            }
            break;
          case 't':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, ".p", 2))
              break;
            switch (NameR[13]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+14, "2dq.256", 7))
                break;
              return Intrinsic::x86_avx_cvtt_pd2dq_256;	 // "86.avx.cvtt.pd2dq.256"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+14, "2dq.256", 7))
                break;
              return Intrinsic::x86_avx_cvtt_ps2dq_256;	 // "86.avx.cvtt.ps2dq.256"
            }
            break;
          }
          break;
        case '5':	 // 8 strings to match.
          if (memcmp(NameR.data()+7, "12.", 3))
            break;
          switch (NameR[10]) {
          default: break;
          case 'c':	 // 4 strings to match.
            if (memcmp(NameR.data()+11, "vt", 2))
              break;
            switch (NameR[13]) {
            default: break;
            case 's':	 // 2 strings to match.
              switch (NameR[14]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+15, "2usi64", 6))
                  break;
                return Intrinsic::x86_avx512_cvtsd2usi64;	 // "86.avx512.cvtsd2usi64"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+15, "2usi64", 6))
                  break;
                return Intrinsic::x86_avx512_cvtss2usi64;	 // "86.avx512.cvtss2usi64"
              }
              break;
            case 'u':	 // 2 strings to match.
              if (memcmp(NameR.data()+14, "si642s", 6))
                break;
              switch (NameR[20]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_avx512_cvtusi642sd;	 // "86.avx512.cvtusi642sd"
              case 's':	 // 1 string to match.
                return Intrinsic::x86_avx512_cvtusi642ss;	 // "86.avx512.cvtusi642ss"
              }
              break;
            }
            break;
          case 'r':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "ndscale.s", 9))
              break;
            switch (NameR[20]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_avx512_rndscale_sd;	 // "86.avx512.rndscale.sd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_avx512_rndscale_ss;	 // "86.avx512.rndscale.ss"
            }
            break;
          case 's':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "qrt.p", 5))
              break;
            switch (NameR[16]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+17, ".512", 4))
                break;
              return Intrinsic::x86_avx512_sqrt_pd_512;	 // "86.avx512.sqrt.pd.512"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+17, ".512", 4))
                break;
              return Intrinsic::x86_avx512_sqrt_ps_512;	 // "86.avx512.sqrt.ps.512"
            }
            break;
          }
          break;
        }
        break;
      case 'f':	 // 8 strings to match.
        if (memcmp(NameR.data()+4, "ma.vfnm", 7))
          break;
        switch (NameR[11]) {
        default: break;
        case 'a':	 // 4 strings to match.
          if (memcmp(NameR.data()+12, "dd.p", 4))
            break;
          switch (NameR[16]) {
          default: break;
          case 'd':	 // 2 strings to match.
            if (NameR[17] != '.')
              break;
            switch (NameR[18]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(NameR.data()+19, "56", 2))
                break;
              return Intrinsic::x86_fma_vfnmadd_pd_256;	 // "86.fma.vfnmadd.pd.256"
            case '5':	 // 1 string to match.
              if (memcmp(NameR.data()+19, "12", 2))
                break;
              return Intrinsic::x86_fma_vfnmadd_pd_512;	 // "86.fma.vfnmadd.pd.512"
            }
            break;
          case 's':	 // 2 strings to match.
            if (NameR[17] != '.')
              break;
            switch (NameR[18]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(NameR.data()+19, "56", 2))
                break;
              return Intrinsic::x86_fma_vfnmadd_ps_256;	 // "86.fma.vfnmadd.ps.256"
            case '5':	 // 1 string to match.
              if (memcmp(NameR.data()+19, "12", 2))
                break;
              return Intrinsic::x86_fma_vfnmadd_ps_512;	 // "86.fma.vfnmadd.ps.512"
            }
            break;
          }
          break;
        case 's':	 // 4 strings to match.
          if (memcmp(NameR.data()+12, "ub.p", 4))
            break;
          switch (NameR[16]) {
          default: break;
          case 'd':	 // 2 strings to match.
            if (NameR[17] != '.')
              break;
            switch (NameR[18]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(NameR.data()+19, "56", 2))
                break;
              return Intrinsic::x86_fma_vfnmsub_pd_256;	 // "86.fma.vfnmsub.pd.256"
            case '5':	 // 1 string to match.
              if (memcmp(NameR.data()+19, "12", 2))
                break;
              return Intrinsic::x86_fma_vfnmsub_pd_512;	 // "86.fma.vfnmsub.pd.512"
            }
            break;
          case 's':	 // 2 strings to match.
            if (NameR[17] != '.')
              break;
            switch (NameR[18]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(NameR.data()+19, "56", 2))
                break;
              return Intrinsic::x86_fma_vfnmsub_ps_256;	 // "86.fma.vfnmsub.ps.256"
            case '5':	 // 1 string to match.
              if (memcmp(NameR.data()+19, "12", 2))
                break;
              return Intrinsic::x86_fma_vfnmsub_ps_512;	 // "86.fma.vfnmsub.ps.512"
            }
            break;
          }
          break;
        }
        break;
      case 's':	 // 6 strings to match.
        if (NameR[4] != 's')
          break;
        switch (NameR[5]) {
        default: break;
        case 'e':	 // 4 strings to match.
          if (memcmp(NameR.data()+6, "42.pcmp", 7))
            break;
          switch (NameR[13]) {
          default: break;
          case 'e':	 // 2 strings to match.
            if (memcmp(NameR.data()+14, "str", 3))
              break;
            switch (NameR[17]) {
            default: break;
            case 'i':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "128", 3))
                break;
              return Intrinsic::x86_sse42_pcmpestri128;	 // "86.sse42.pcmpestri128"
            case 'm':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "128", 3))
                break;
              return Intrinsic::x86_sse42_pcmpestrm128;	 // "86.sse42.pcmpestrm128"
            }
            break;
          case 'i':	 // 2 strings to match.
            if (memcmp(NameR.data()+14, "str", 3))
              break;
            switch (NameR[17]) {
            default: break;
            case 'i':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "128", 3))
                break;
              return Intrinsic::x86_sse42_pcmpistri128;	 // "86.sse42.pcmpistri128"
            case 'm':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "128", 3))
                break;
              return Intrinsic::x86_sse42_pcmpistrm128;	 // "86.sse42.pcmpistrm128"
            }
            break;
          }
          break;
        case 's':	 // 2 strings to match.
          if (memcmp(NameR.data()+6, "e3.ph", 5))
            break;
          switch (NameR[11]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(NameR.data()+12, "dd.sw.128", 9))
              break;
            return Intrinsic::x86_ssse3_phadd_sw_128;	 // "86.ssse3.phadd.sw.128"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+12, "ub.sw.128", 9))
              break;
            return Intrinsic::x86_ssse3_phsub_sw_128;	 // "86.ssse3.phsub.sw.128"
          }
          break;
        }
        break;
      case 'x':	 // 2 strings to match.
        if (memcmp(NameR.data()+4, "op.vpermil2p", 12))
          break;
        switch (NameR[16]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(NameR.data()+17, ".256", 4))
            break;
          return Intrinsic::x86_xop_vpermil2pd_256;	 // "86.xop.vpermil2pd.256"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+17, ".256", 4))
            break;
          return Intrinsic::x86_xop_vpermil2ps_256;	 // "86.xop.vpermil2ps.256"
        }
        break;
      }
      break;
    case 22:	 // 25 strings to match.
      if (memcmp(NameR.data()+0, "86.", 3))
        break;
      switch (NameR[3]) {
      default: break;
      case 'a':	 // 15 strings to match.
        if (memcmp(NameR.data()+4, "vx", 2))
          break;
        switch (NameR[6]) {
        default: break;
        case '.':	 // 4 strings to match.
          switch (NameR[7]) {
          default: break;
          case 'm':	 // 2 strings to match.
            if (memcmp(NameR.data()+8, "askload.p", 9))
              break;
            switch (NameR[17]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+18, ".256", 4))
                break;
              return Intrinsic::x86_avx_maskload_pd_256;	 // "86.avx.maskload.pd.256"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+18, ".256", 4))
                break;
              return Intrinsic::x86_avx_maskload_ps_256;	 // "86.avx.maskload.ps.256"
            }
            break;
          case 'v':	 // 2 strings to match.
            if (memcmp(NameR.data()+8, "testnzc.p", 9))
              break;
            switch (NameR[17]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+18, ".256", 4))
                break;
              return Intrinsic::x86_avx_vtestnzc_pd_256;	 // "86.avx.vtestnzc.pd.256"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+18, ".256", 4))
                break;
              return Intrinsic::x86_avx_vtestnzc_ps_256;	 // "86.avx.vtestnzc.ps.256"
            }
            break;
          }
          break;
        case '2':	 // 7 strings to match.
          if (NameR[7] != '.')
            break;
          switch (NameR[8]) {
          default: break;
          case 'g':	 // 4 strings to match.
            if (memcmp(NameR.data()+9, "ather.", 6))
              break;
            switch (NameR[15]) {
            default: break;
            case 'd':	 // 2 strings to match.
              if (NameR[16] != '.')
                break;
              switch (NameR[17]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+18, ".256", 4))
                  break;
                return Intrinsic::x86_avx2_gather_d_d_256;	 // "86.avx2.gather.d.d.256"
              case 'q':	 // 1 string to match.
                if (memcmp(NameR.data()+18, ".256", 4))
                  break;
                return Intrinsic::x86_avx2_gather_d_q_256;	 // "86.avx2.gather.d.q.256"
              }
              break;
            case 'q':	 // 2 strings to match.
              if (NameR[16] != '.')
                break;
              switch (NameR[17]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+18, ".256", 4))
                  break;
                return Intrinsic::x86_avx2_gather_q_d_256;	 // "86.avx2.gather.q.d.256"
              case 'q':	 // 1 string to match.
                if (memcmp(NameR.data()+18, ".256", 4))
                  break;
                return Intrinsic::x86_avx2_gather_q_q_256;	 // "86.avx2.gather.q.q.256"
              }
              break;
            }
            break;
          case 'm':	 // 2 strings to match.
            if (memcmp(NameR.data()+9, "askload.", 8))
              break;
            switch (NameR[17]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+18, ".256", 4))
                break;
              return Intrinsic::x86_avx2_maskload_d_256;	 // "86.avx2.maskload.d.256"
            case 'q':	 // 1 string to match.
              if (memcmp(NameR.data()+18, ".256", 4))
                break;
              return Intrinsic::x86_avx2_maskload_q_256;	 // "86.avx2.maskload.q.256"
            }
            break;
          case 'v':	 // 1 string to match.
            if (memcmp(NameR.data()+9, "broadcasti128", 13))
              break;
            return Intrinsic::x86_avx2_vbroadcasti128;	 // "86.avx2.vbroadcasti128"
          }
          break;
        case '5':	 // 4 strings to match.
          if (memcmp(NameR.data()+7, "12.", 3))
            break;
          switch (NameR[10]) {
          default: break;
          case 'c':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "vtts", 4))
              break;
            switch (NameR[15]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+16, "2usi64", 6))
                break;
              return Intrinsic::x86_avx512_cvttsd2usi64;	 // "86.avx512.cvttsd2usi64"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+16, "2usi64", 6))
                break;
              return Intrinsic::x86_avx512_cvttss2usi64;	 // "86.avx512.cvttss2usi64"
            }
            break;
          case 'r':	 // 2 strings to match.
            if (memcmp(NameR.data()+11, "cp14.p", 6))
              break;
            switch (NameR[17]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+18, ".512", 4))
                break;
              return Intrinsic::x86_avx512_rcp14_pd_512;	 // "86.avx512.rcp14.pd.512"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+18, ".512", 4))
                break;
              return Intrinsic::x86_avx512_rcp14_ps_512;	 // "86.avx512.rcp14.ps.512"
            }
            break;
          }
          break;
        }
        break;
      case 's':	 // 10 strings to match.
        if (memcmp(NameR.data()+4, "se42.pcmp", 9))
          break;
        switch (NameR[13]) {
        default: break;
        case 'e':	 // 5 strings to match.
          if (memcmp(NameR.data()+14, "stri", 4))
            break;
          switch (NameR[18]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(NameR.data()+19, "128", 3))
              break;
            return Intrinsic::x86_sse42_pcmpestria128;	 // "86.sse42.pcmpestria128"
          case 'c':	 // 1 string to match.
            if (memcmp(NameR.data()+19, "128", 3))
              break;
            return Intrinsic::x86_sse42_pcmpestric128;	 // "86.sse42.pcmpestric128"
          case 'o':	 // 1 string to match.
            if (memcmp(NameR.data()+19, "128", 3))
              break;
            return Intrinsic::x86_sse42_pcmpestrio128;	 // "86.sse42.pcmpestrio128"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+19, "128", 3))
              break;
            return Intrinsic::x86_sse42_pcmpestris128;	 // "86.sse42.pcmpestris128"
          case 'z':	 // 1 string to match.
            if (memcmp(NameR.data()+19, "128", 3))
              break;
            return Intrinsic::x86_sse42_pcmpestriz128;	 // "86.sse42.pcmpestriz128"
          }
          break;
        case 'i':	 // 5 strings to match.
          if (memcmp(NameR.data()+14, "stri", 4))
            break;
          switch (NameR[18]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(NameR.data()+19, "128", 3))
              break;
            return Intrinsic::x86_sse42_pcmpistria128;	 // "86.sse42.pcmpistria128"
          case 'c':	 // 1 string to match.
            if (memcmp(NameR.data()+19, "128", 3))
              break;
            return Intrinsic::x86_sse42_pcmpistric128;	 // "86.sse42.pcmpistric128"
          case 'o':	 // 1 string to match.
            if (memcmp(NameR.data()+19, "128", 3))
              break;
            return Intrinsic::x86_sse42_pcmpistrio128;	 // "86.sse42.pcmpistrio128"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+19, "128", 3))
              break;
            return Intrinsic::x86_sse42_pcmpistris128;	 // "86.sse42.pcmpistris128"
          case 'z':	 // 1 string to match.
            if (memcmp(NameR.data()+19, "128", 3))
              break;
            return Intrinsic::x86_sse42_pcmpistriz128;	 // "86.sse42.pcmpistriz128"
          }
          break;
        }
        break;
      }
      break;
    case 23:	 // 25 strings to match.
      if (memcmp(NameR.data()+0, "86.", 3))
        break;
      switch (NameR[3]) {
      default: break;
      case 'a':	 // 16 strings to match.
        if (memcmp(NameR.data()+4, "vx", 2))
          break;
        switch (NameR[6]) {
        default: break;
        case '.':	 // 2 strings to match.
          if (memcmp(NameR.data()+7, "maskstore.p", 11))
            break;
          switch (NameR[18]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(NameR.data()+19, ".256", 4))
              break;
            return Intrinsic::x86_avx_maskstore_pd_256;	 // "86.avx.maskstore.pd.256"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+19, ".256", 4))
              break;
            return Intrinsic::x86_avx_maskstore_ps_256;	 // "86.avx.maskstore.ps.256"
          }
          break;
        case '2':	 // 14 strings to match.
          if (NameR[7] != '.')
            break;
          switch (NameR[8]) {
          default: break;
          case 'g':	 // 4 strings to match.
            if (memcmp(NameR.data()+9, "ather.", 6))
              break;
            switch (NameR[15]) {
            default: break;
            case 'd':	 // 2 strings to match.
              if (memcmp(NameR.data()+16, ".p", 2))
                break;
              switch (NameR[18]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+19, ".256", 4))
                  break;
                return Intrinsic::x86_avx2_gather_d_pd_256;	 // "86.avx2.gather.d.pd.256"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+19, ".256", 4))
                  break;
                return Intrinsic::x86_avx2_gather_d_ps_256;	 // "86.avx2.gather.d.ps.256"
              }
              break;
            case 'q':	 // 2 strings to match.
              if (memcmp(NameR.data()+16, ".p", 2))
                break;
              switch (NameR[18]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+19, ".256", 4))
                  break;
                return Intrinsic::x86_avx2_gather_q_pd_256;	 // "86.avx2.gather.q.pd.256"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+19, ".256", 4))
                  break;
                return Intrinsic::x86_avx2_gather_q_ps_256;	 // "86.avx2.gather.q.ps.256"
              }
              break;
            }
            break;
          case 'm':	 // 2 strings to match.
            if (memcmp(NameR.data()+9, "askstore.", 9))
              break;
            switch (NameR[18]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+19, ".256", 4))
                break;
              return Intrinsic::x86_avx2_maskstore_d_256;	 // "86.avx2.maskstore.d.256"
            case 'q':	 // 1 string to match.
              if (memcmp(NameR.data()+19, ".256", 4))
                break;
              return Intrinsic::x86_avx2_maskstore_q_256;	 // "86.avx2.maskstore.q.256"
            }
            break;
          case 'p':	 // 8 strings to match.
            if (memcmp(NameR.data()+9, "broadcast", 9))
              break;
            switch (NameR[18]) {
            default: break;
            case 'b':	 // 2 strings to match.
              if (NameR[19] != '.')
                break;
              switch (NameR[20]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+21, "28", 2))
                  break;
                return Intrinsic::x86_avx2_pbroadcastb_128;	 // "86.avx2.pbroadcastb.128"
              case '2':	 // 1 string to match.
                if (memcmp(NameR.data()+21, "56", 2))
                  break;
                return Intrinsic::x86_avx2_pbroadcastb_256;	 // "86.avx2.pbroadcastb.256"
              }
              break;
            case 'd':	 // 2 strings to match.
              if (NameR[19] != '.')
                break;
              switch (NameR[20]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+21, "28", 2))
                  break;
                return Intrinsic::x86_avx2_pbroadcastd_128;	 // "86.avx2.pbroadcastd.128"
              case '2':	 // 1 string to match.
                if (memcmp(NameR.data()+21, "56", 2))
                  break;
                return Intrinsic::x86_avx2_pbroadcastd_256;	 // "86.avx2.pbroadcastd.256"
              }
              break;
            case 'q':	 // 2 strings to match.
              if (NameR[19] != '.')
                break;
              switch (NameR[20]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+21, "28", 2))
                  break;
                return Intrinsic::x86_avx2_pbroadcastq_128;	 // "86.avx2.pbroadcastq.128"
              case '2':	 // 1 string to match.
                if (memcmp(NameR.data()+21, "56", 2))
                  break;
                return Intrinsic::x86_avx2_pbroadcastq_256;	 // "86.avx2.pbroadcastq.256"
              }
              break;
            case 'w':	 // 2 strings to match.
              if (NameR[19] != '.')
                break;
              switch (NameR[20]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(NameR.data()+21, "28", 2))
                  break;
                return Intrinsic::x86_avx2_pbroadcastw_128;	 // "86.avx2.pbroadcastw.128"
              case '2':	 // 1 string to match.
                if (memcmp(NameR.data()+21, "56", 2))
                  break;
                return Intrinsic::x86_avx2_pbroadcastw_256;	 // "86.avx2.pbroadcastw.256"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 'f':	 // 8 strings to match.
        if (memcmp(NameR.data()+4, "ma.vfm", 6))
          break;
        switch (NameR[10]) {
        default: break;
        case 'a':	 // 4 strings to match.
          if (memcmp(NameR.data()+11, "ddsub.p", 7))
            break;
          switch (NameR[18]) {
          default: break;
          case 'd':	 // 2 strings to match.
            if (NameR[19] != '.')
              break;
            switch (NameR[20]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(NameR.data()+21, "56", 2))
                break;
              return Intrinsic::x86_fma_vfmaddsub_pd_256;	 // "86.fma.vfmaddsub.pd.256"
            case '5':	 // 1 string to match.
              if (memcmp(NameR.data()+21, "12", 2))
                break;
              return Intrinsic::x86_fma_vfmaddsub_pd_512;	 // "86.fma.vfmaddsub.pd.512"
            }
            break;
          case 's':	 // 2 strings to match.
            if (NameR[19] != '.')
              break;
            switch (NameR[20]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(NameR.data()+21, "56", 2))
                break;
              return Intrinsic::x86_fma_vfmaddsub_ps_256;	 // "86.fma.vfmaddsub.ps.256"
            case '5':	 // 1 string to match.
              if (memcmp(NameR.data()+21, "12", 2))
                break;
              return Intrinsic::x86_fma_vfmaddsub_ps_512;	 // "86.fma.vfmaddsub.ps.512"
            }
            break;
          }
          break;
        case 's':	 // 4 strings to match.
          if (memcmp(NameR.data()+11, "ubadd.p", 7))
            break;
          switch (NameR[18]) {
          default: break;
          case 'd':	 // 2 strings to match.
            if (NameR[19] != '.')
              break;
            switch (NameR[20]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(NameR.data()+21, "56", 2))
                break;
              return Intrinsic::x86_fma_vfmsubadd_pd_256;	 // "86.fma.vfmsubadd.pd.256"
            case '5':	 // 1 string to match.
              if (memcmp(NameR.data()+21, "12", 2))
                break;
              return Intrinsic::x86_fma_vfmsubadd_pd_512;	 // "86.fma.vfmsubadd.pd.512"
            }
            break;
          case 's':	 // 2 strings to match.
            if (NameR[19] != '.')
              break;
            switch (NameR[20]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(NameR.data()+21, "56", 2))
                break;
              return Intrinsic::x86_fma_vfmsubadd_ps_256;	 // "86.fma.vfmsubadd.ps.256"
            case '5':	 // 1 string to match.
              if (memcmp(NameR.data()+21, "12", 2))
                break;
              return Intrinsic::x86_fma_vfmsubadd_ps_512;	 // "86.fma.vfmsubadd.ps.512"
            }
            break;
          }
          break;
        }
        break;
      case 's':	 // 1 string to match.
        if (memcmp(NameR.data()+4, "sse3.pmul.hr.sw.128", 19))
          break;
        return Intrinsic::x86_ssse3_pmul_hr_sw_128;	 // "86.ssse3.pmul.hr.sw.128"
      }
      break;
    case 24:	 // 18 strings to match.
      if (memcmp(NameR.data()+0, "86.", 3))
        break;
      switch (NameR[3]) {
      default: break;
      case 'a':	 // 17 strings to match.
        switch (NameR[4]) {
        default: break;
        case 'e':	 // 1 string to match.
          if (memcmp(NameR.data()+5, "sni.aeskeygenassist", 19))
            break;
          return Intrinsic::x86_aesni_aeskeygenassist;	 // "86.aesni.aeskeygenassist"
        case 'v':	 // 16 strings to match.
          if (NameR[5] != 'x')
            break;
          switch (NameR[6]) {
          default: break;
          case '.':	 // 5 strings to match.
            if (memcmp(NameR.data()+7, "vperm", 5))
              break;
            switch (NameR[12]) {
            default: break;
            case '2':	 // 3 strings to match.
              if (memcmp(NameR.data()+13, "f128.", 5))
                break;
              switch (NameR[18]) {
              default: break;
              case 'p':	 // 2 strings to match.
                switch (NameR[19]) {
                default: break;
                case 'd':	 // 1 string to match.
                  if (memcmp(NameR.data()+20, ".256", 4))
                    break;
                  return Intrinsic::x86_avx_vperm2f128_pd_256;	 // "86.avx.vperm2f128.pd.256"
                case 's':	 // 1 string to match.
                  if (memcmp(NameR.data()+20, ".256", 4))
                    break;
                  return Intrinsic::x86_avx_vperm2f128_ps_256;	 // "86.avx.vperm2f128.ps.256"
                }
                break;
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+19, "i.256", 5))
                  break;
                return Intrinsic::x86_avx_vperm2f128_si_256;	 // "86.avx.vperm2f128.si.256"
              }
              break;
            case 'i':	 // 2 strings to match.
              if (memcmp(NameR.data()+13, "lvar.p", 6))
                break;
              switch (NameR[19]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+20, ".256", 4))
                  break;
                return Intrinsic::x86_avx_vpermilvar_pd_256;	 // "86.avx.vpermilvar.pd.256"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+20, ".256", 4))
                  break;
                return Intrinsic::x86_avx_vpermilvar_ps_256;	 // "86.avx.vpermilvar.ps.256"
              }
              break;
            }
            break;
          case '2':	 // 1 string to match.
            if (memcmp(NameR.data()+7, ".vbroadcast.ss.ps", 17))
              break;
            return Intrinsic::x86_avx2_vbroadcast_ss_ps;	 // "86.avx2.vbroadcast.ss.ps"
          case '5':	 // 10 strings to match.
            if (memcmp(NameR.data()+7, "12.", 3))
              break;
            switch (NameR[10]) {
            default: break;
            case 'g':	 // 8 strings to match.
              if (memcmp(NameR.data()+11, "ather.", 6))
                break;
              switch (NameR[17]) {
              default: break;
              case 'd':	 // 4 strings to match.
                if (NameR[18] != 'p')
                  break;
                switch (NameR[19]) {
                default: break;
                case 'd':	 // 1 string to match.
                  if (memcmp(NameR.data()+20, ".512", 4))
                    break;
                  return Intrinsic::x86_avx512_gather_dpd_512;	 // "86.avx512.gather.dpd.512"
                case 'i':	 // 1 string to match.
                  if (memcmp(NameR.data()+20, ".512", 4))
                    break;
                  return Intrinsic::x86_avx512_gather_dpi_512;	 // "86.avx512.gather.dpi.512"
                case 'q':	 // 1 string to match.
                  if (memcmp(NameR.data()+20, ".512", 4))
                    break;
                  return Intrinsic::x86_avx512_gather_dpq_512;	 // "86.avx512.gather.dpq.512"
                case 's':	 // 1 string to match.
                  if (memcmp(NameR.data()+20, ".512", 4))
                    break;
                  return Intrinsic::x86_avx512_gather_dps_512;	 // "86.avx512.gather.dps.512"
                }
                break;
              case 'q':	 // 4 strings to match.
                if (NameR[18] != 'p')
                  break;
                switch (NameR[19]) {
                default: break;
                case 'd':	 // 1 string to match.
                  if (memcmp(NameR.data()+20, ".512", 4))
                    break;
                  return Intrinsic::x86_avx512_gather_qpd_512;	 // "86.avx512.gather.qpd.512"
                case 'i':	 // 1 string to match.
                  if (memcmp(NameR.data()+20, ".512", 4))
                    break;
                  return Intrinsic::x86_avx512_gather_qpi_512;	 // "86.avx512.gather.qpi.512"
                case 'q':	 // 1 string to match.
                  if (memcmp(NameR.data()+20, ".512", 4))
                    break;
                  return Intrinsic::x86_avx512_gather_qpq_512;	 // "86.avx512.gather.qpq.512"
                case 's':	 // 1 string to match.
                  if (memcmp(NameR.data()+20, ".512", 4))
                    break;
                  return Intrinsic::x86_avx512_gather_qps_512;	 // "86.avx512.gather.qps.512"
                }
                break;
              }
              break;
            case 'r':	 // 2 strings to match.
              if (memcmp(NameR.data()+11, "sqrt14.p", 8))
                break;
              switch (NameR[19]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+20, ".512", 4))
                  break;
                return Intrinsic::x86_avx512_rsqrt14_pd_512;	 // "86.avx512.rsqrt14.pd.512"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+20, ".512", 4))
                  break;
                return Intrinsic::x86_avx512_rsqrt14_ps_512;	 // "86.avx512.rsqrt14.ps.512"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 's':	 // 1 string to match.
        if (memcmp(NameR.data()+4, "sse3.pmadd.ub.sw.128", 20))
          break;
        return Intrinsic::x86_ssse3_pmadd_ub_sw_128;	 // "86.ssse3.pmadd.ub.sw.128"
      }
      break;
    case 25:	 // 23 strings to match.
      if (memcmp(NameR.data()+0, "86.avx", 6))
        break;
      switch (NameR[6]) {
      default: break;
      case '.':	 // 3 strings to match.
        if (memcmp(NameR.data()+7, "vinsertf128.", 12))
          break;
        switch (NameR[19]) {
        default: break;
        case 'p':	 // 2 strings to match.
          switch (NameR[20]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(NameR.data()+21, ".256", 4))
              break;
            return Intrinsic::x86_avx_vinsertf128_pd_256;	 // "86.avx.vinsertf128.pd.256"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+21, ".256", 4))
              break;
            return Intrinsic::x86_avx_vinsertf128_ps_256;	 // "86.avx.vinsertf128.ps.256"
          }
          break;
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+20, "i.256", 5))
            break;
          return Intrinsic::x86_avx_vinsertf128_si_256;	 // "86.avx.vinsertf128.si.256"
        }
        break;
      case '5':	 // 20 strings to match.
        if (memcmp(NameR.data()+7, "12.", 3))
          break;
        switch (NameR[10]) {
        default: break;
        case 'm':	 // 10 strings to match.
          if (memcmp(NameR.data()+11, "ask.", 4))
            break;
          switch (NameR[15]) {
          default: break;
          case 'c':	 // 2 strings to match.
            if (memcmp(NameR.data()+16, "mp.p", 4))
              break;
            switch (NameR[20]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+21, ".512", 4))
                break;
              return Intrinsic::x86_avx512_mask_cmp_pd_512;	 // "86.avx512.mask.cmp.pd.512"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+21, ".512", 4))
                break;
              return Intrinsic::x86_avx512_mask_cmp_ps_512;	 // "86.avx512.mask.cmp.ps.512"
            }
            break;
          case 'm':	 // 4 strings to match.
            switch (NameR[16]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (memcmp(NameR.data()+17, "x.p", 3))
                break;
              switch (NameR[20]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+21, ".512", 4))
                  break;
                return Intrinsic::x86_avx512_mask_max_pd_512;	 // "86.avx512.mask.max.pd.512"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+21, ".512", 4))
                  break;
                return Intrinsic::x86_avx512_mask_max_ps_512;	 // "86.avx512.mask.max.ps.512"
              }
              break;
            case 'i':	 // 2 strings to match.
              if (memcmp(NameR.data()+17, "n.p", 3))
                break;
              switch (NameR[20]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+21, ".512", 4))
                  break;
                return Intrinsic::x86_avx512_mask_min_pd_512;	 // "86.avx512.mask.min.pd.512"
              case 's':	 // 1 string to match.
                if (memcmp(NameR.data()+21, ".512", 4))
                  break;
                return Intrinsic::x86_avx512_mask_min_ps_512;	 // "86.avx512.mask.min.ps.512"
              }
              break;
            }
            break;
          case 'p':	 // 4 strings to match.
            if (NameR[16] != 'a')
              break;
            switch (NameR[17]) {
            default: break;
            case 'b':	 // 2 strings to match.
              if (memcmp(NameR.data()+18, "s.", 2))
                break;
              switch (NameR[20]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+21, ".512", 4))
                  break;
                return Intrinsic::x86_avx512_mask_pabs_d_512;	 // "86.avx512.mask.pabs.d.512"
              case 'q':	 // 1 string to match.
                if (memcmp(NameR.data()+21, ".512", 4))
                  break;
                return Intrinsic::x86_avx512_mask_pabs_q_512;	 // "86.avx512.mask.pabs.q.512"
              }
              break;
            case 'n':	 // 2 strings to match.
              if (memcmp(NameR.data()+18, "d.", 2))
                break;
              switch (NameR[20]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+21, ".512", 4))
                  break;
                return Intrinsic::x86_avx512_mask_pand_d_512;	 // "86.avx512.mask.pand.d.512"
              case 'q':	 // 1 string to match.
                if (memcmp(NameR.data()+21, ".512", 4))
                  break;
                return Intrinsic::x86_avx512_mask_pand_q_512;	 // "86.avx512.mask.pand.q.512"
              }
              break;
            }
            break;
          }
          break;
        case 'p':	 // 2 strings to match.
          if (memcmp(NameR.data()+11, "broadcast", 9))
            break;
          switch (NameR[20]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(NameR.data()+21, ".512", 4))
              break;
            return Intrinsic::x86_avx512_pbroadcastd_512;	 // "86.avx512.pbroadcastd.512"
          case 'q':	 // 1 string to match.
            if (memcmp(NameR.data()+21, ".512", 4))
              break;
            return Intrinsic::x86_avx512_pbroadcastq_512;	 // "86.avx512.pbroadcastq.512"
          }
          break;
        case 's':	 // 8 strings to match.
          if (memcmp(NameR.data()+11, "catter.", 7))
            break;
          switch (NameR[18]) {
          default: break;
          case 'd':	 // 4 strings to match.
            if (NameR[19] != 'p')
              break;
            switch (NameR[20]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+21, ".512", 4))
                break;
              return Intrinsic::x86_avx512_scatter_dpd_512;	 // "86.avx512.scatter.dpd.512"
            case 'i':	 // 1 string to match.
              if (memcmp(NameR.data()+21, ".512", 4))
                break;
              return Intrinsic::x86_avx512_scatter_dpi_512;	 // "86.avx512.scatter.dpi.512"
            case 'q':	 // 1 string to match.
              if (memcmp(NameR.data()+21, ".512", 4))
                break;
              return Intrinsic::x86_avx512_scatter_dpq_512;	 // "86.avx512.scatter.dpq.512"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+21, ".512", 4))
                break;
              return Intrinsic::x86_avx512_scatter_dps_512;	 // "86.avx512.scatter.dps.512"
            }
            break;
          case 'q':	 // 4 strings to match.
            if (NameR[19] != 'p')
              break;
            switch (NameR[20]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+21, ".512", 4))
                break;
              return Intrinsic::x86_avx512_scatter_qpd_512;	 // "86.avx512.scatter.qpd.512"
            case 'i':	 // 1 string to match.
              if (memcmp(NameR.data()+21, ".512", 4))
                break;
              return Intrinsic::x86_avx512_scatter_qpi_512;	 // "86.avx512.scatter.qpi.512"
            case 'q':	 // 1 string to match.
              if (memcmp(NameR.data()+21, ".512", 4))
                break;
              return Intrinsic::x86_avx512_scatter_qpq_512;	 // "86.avx512.scatter.qpq.512"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+21, ".512", 4))
                break;
              return Intrinsic::x86_avx512_scatter_qps_512;	 // "86.avx512.scatter.qps.512"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 26:	 // 22 strings to match.
      if (memcmp(NameR.data()+0, "86.avx", 6))
        break;
      switch (NameR[6]) {
      default: break;
      case '.':	 // 3 strings to match.
        if (memcmp(NameR.data()+7, "vextractf128.", 13))
          break;
        switch (NameR[20]) {
        default: break;
        case 'p':	 // 2 strings to match.
          switch (NameR[21]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(NameR.data()+22, ".256", 4))
              break;
            return Intrinsic::x86_avx_vextractf128_pd_256;	 // "86.avx.vextractf128.pd.256"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+22, ".256", 4))
              break;
            return Intrinsic::x86_avx_vextractf128_ps_256;	 // "86.avx.vextractf128.ps.256"
          }
          break;
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+21, "i.256", 5))
            break;
          return Intrinsic::x86_avx_vextractf128_si_256;	 // "86.avx.vextractf128.si.256"
        }
        break;
      case '5':	 // 19 strings to match.
        if (memcmp(NameR.data()+7, "12.", 3))
          break;
        switch (NameR[10]) {
        default: break;
        case 'g':	 // 4 strings to match.
          if (memcmp(NameR.data()+11, "atherpf.", 8))
            break;
          switch (NameR[19]) {
          default: break;
          case 'd':	 // 2 strings to match.
            if (NameR[20] != 'p')
              break;
            switch (NameR[21]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+22, ".512", 4))
                break;
              return Intrinsic::x86_avx512_gatherpf_dpd_512;	 // "86.avx512.gatherpf.dpd.512"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+22, ".512", 4))
                break;
              return Intrinsic::x86_avx512_gatherpf_dps_512;	 // "86.avx512.gatherpf.dps.512"
            }
            break;
          case 'q':	 // 2 strings to match.
            if (NameR[20] != 'p')
              break;
            switch (NameR[21]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+22, ".512", 4))
                break;
              return Intrinsic::x86_avx512_gatherpf_qpd_512;	 // "86.avx512.gatherpf.qpd.512"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+22, ".512", 4))
                break;
              return Intrinsic::x86_avx512_gatherpf_qps_512;	 // "86.avx512.gatherpf.qps.512"
            }
            break;
          }
          break;
        case 'm':	 // 15 strings to match.
          if (memcmp(NameR.data()+11, "ask.", 4))
            break;
          switch (NameR[15]) {
          default: break;
          case 'b':	 // 2 strings to match.
            if (memcmp(NameR.data()+16, "lend.", 5))
              break;
            switch (NameR[21]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+22, ".512", 4))
                break;
              return Intrinsic::x86_avx512_mask_blend_d_512;	 // "86.avx512.mask.blend.d.512"
            case 'q':	 // 1 string to match.
              if (memcmp(NameR.data()+22, ".512", 4))
                break;
              return Intrinsic::x86_avx512_mask_blend_q_512;	 // "86.avx512.mask.blend.q.512"
            }
            break;
          case 'l':	 // 4 strings to match.
            switch (NameR[16]) {
            default: break;
            case 'o':	 // 2 strings to match.
              if (memcmp(NameR.data()+17, "adu.", 4))
                break;
              switch (NameR[21]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+22, ".512", 4))
                  break;
                return Intrinsic::x86_avx512_mask_loadu_d_512;	 // "86.avx512.mask.loadu.d.512"
              case 'q':	 // 1 string to match.
                if (memcmp(NameR.data()+22, ".512", 4))
                  break;
                return Intrinsic::x86_avx512_mask_loadu_q_512;	 // "86.avx512.mask.loadu.q.512"
              }
              break;
            case 'z':	 // 2 strings to match.
              if (memcmp(NameR.data()+17, "cnt.", 4))
                break;
              switch (NameR[21]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+22, ".512", 4))
                  break;
                return Intrinsic::x86_avx512_mask_lzcnt_d_512;	 // "86.avx512.mask.lzcnt.d.512"
              case 'q':	 // 1 string to match.
                if (memcmp(NameR.data()+22, ".512", 4))
                  break;
                return Intrinsic::x86_avx512_mask_lzcnt_q_512;	 // "86.avx512.mask.lzcnt.q.512"
              }
              break;
            }
            break;
          case 'p':	 // 9 strings to match.
            if (NameR[16] != 'm')
              break;
            switch (NameR[17]) {
            default: break;
            case 'a':	 // 4 strings to match.
              if (NameR[18] != 'x')
                break;
              switch (NameR[19]) {
              default: break;
              case 's':	 // 2 strings to match.
                if (NameR[20] != '.')
                  break;
                switch (NameR[21]) {
                default: break;
                case 'd':	 // 1 string to match.
                  if (memcmp(NameR.data()+22, ".512", 4))
                    break;
                  return Intrinsic::x86_avx512_mask_pmaxs_d_512;	 // "86.avx512.mask.pmaxs.d.512"
                case 'q':	 // 1 string to match.
                  if (memcmp(NameR.data()+22, ".512", 4))
                    break;
                  return Intrinsic::x86_avx512_mask_pmaxs_q_512;	 // "86.avx512.mask.pmaxs.q.512"
                }
                break;
              case 'u':	 // 2 strings to match.
                if (NameR[20] != '.')
                  break;
                switch (NameR[21]) {
                default: break;
                case 'd':	 // 1 string to match.
                  if (memcmp(NameR.data()+22, ".512", 4))
                    break;
                  return Intrinsic::x86_avx512_mask_pmaxu_d_512;	 // "86.avx512.mask.pmaxu.d.512"
                case 'q':	 // 1 string to match.
                  if (memcmp(NameR.data()+22, ".512", 4))
                    break;
                  return Intrinsic::x86_avx512_mask_pmaxu_q_512;	 // "86.avx512.mask.pmaxu.q.512"
                }
                break;
              }
              break;
            case 'i':	 // 4 strings to match.
              if (NameR[18] != 'n')
                break;
              switch (NameR[19]) {
              default: break;
              case 's':	 // 2 strings to match.
                if (NameR[20] != '.')
                  break;
                switch (NameR[21]) {
                default: break;
                case 'd':	 // 1 string to match.
                  if (memcmp(NameR.data()+22, ".512", 4))
                    break;
                  return Intrinsic::x86_avx512_mask_pmins_d_512;	 // "86.avx512.mask.pmins.d.512"
                case 'q':	 // 1 string to match.
                  if (memcmp(NameR.data()+22, ".512", 4))
                    break;
                  return Intrinsic::x86_avx512_mask_pmins_q_512;	 // "86.avx512.mask.pmins.q.512"
                }
                break;
              case 'u':	 // 2 strings to match.
                if (NameR[20] != '.')
                  break;
                switch (NameR[21]) {
                default: break;
                case 'd':	 // 1 string to match.
                  if (memcmp(NameR.data()+22, ".512", 4))
                    break;
                  return Intrinsic::x86_avx512_mask_pminu_d_512;	 // "86.avx512.mask.pminu.d.512"
                case 'q':	 // 1 string to match.
                  if (memcmp(NameR.data()+22, ".512", 4))
                    break;
                  return Intrinsic::x86_avx512_mask_pminu_q_512;	 // "86.avx512.mask.pminu.q.512"
                }
                break;
              }
              break;
            case 'u':	 // 1 string to match.
              if (memcmp(NameR.data()+18, "l.dq.512", 8))
                break;
              return Intrinsic::x86_avx512_mask_pmul_dq_512;	 // "86.avx512.mask.pmul.dq.512"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 27:	 // 24 strings to match.
      if (memcmp(NameR.data()+0, "86.avx512.", 10))
        break;
      switch (NameR[10]) {
      default: break;
      case 'm':	 // 18 strings to match.
        if (memcmp(NameR.data()+11, "ask.", 4))
          break;
        switch (NameR[15]) {
        default: break;
        case 'b':	 // 2 strings to match.
          if (memcmp(NameR.data()+16, "lend.p", 6))
            break;
          switch (NameR[22]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(NameR.data()+23, ".512", 4))
              break;
            return Intrinsic::x86_avx512_mask_blend_pd_512;	 // "86.avx512.mask.blend.pd.512"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+23, ".512", 4))
              break;
            return Intrinsic::x86_avx512_mask_blend_ps_512;	 // "86.avx512.mask.blend.ps.512"
          }
          break;
        case 'c':	 // 5 strings to match.
          if (memcmp(NameR.data()+16, "vt", 2))
            break;
          switch (NameR[18]) {
          default: break;
          case 'd':	 // 2 strings to match.
            if (memcmp(NameR.data()+19, "q2p", 3))
              break;
            switch (NameR[22]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+23, ".512", 4))
                break;
              return Intrinsic::x86_avx512_mask_cvtdq2pd_512;	 // "86.avx512.mask.cvtdq2pd.512"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+23, ".512", 4))
                break;
              return Intrinsic::x86_avx512_mask_cvtdq2ps_512;	 // "86.avx512.mask.cvtdq2ps.512"
            }
            break;
          case 'p':	 // 3 strings to match.
            switch (NameR[19]) {
            default: break;
            case 'd':	 // 2 strings to match.
              if (NameR[20] != '2')
                break;
              switch (NameR[21]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(NameR.data()+22, "q.512", 5))
                  break;
                return Intrinsic::x86_avx512_mask_cvtpd2dq_512;	 // "86.avx512.mask.cvtpd2dq.512"
              case 'p':	 // 1 string to match.
                if (memcmp(NameR.data()+22, "s.512", 5))
                  break;
                return Intrinsic::x86_avx512_mask_cvtpd2ps_512;	 // "86.avx512.mask.cvtpd2ps.512"
              }
              break;
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+20, "2dq.512", 7))
                break;
              return Intrinsic::x86_avx512_mask_cvtps2dq_512;	 // "86.avx512.mask.cvtps2dq.512"
            }
            break;
          }
          break;
        case 'l':	 // 2 strings to match.
          if (memcmp(NameR.data()+16, "oadu.p", 6))
            break;
          switch (NameR[22]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(NameR.data()+23, ".512", 4))
              break;
            return Intrinsic::x86_avx512_mask_loadu_pd_512;	 // "86.avx512.mask.loadu.pd.512"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+23, ".512", 4))
              break;
            return Intrinsic::x86_avx512_mask_loadu_ps_512;	 // "86.avx512.mask.loadu.ps.512"
          }
          break;
        case 'p':	 // 5 strings to match.
          switch (NameR[16]) {
          default: break;
          case 'c':	 // 2 strings to match.
            if (memcmp(NameR.data()+17, "mpeq.", 5))
              break;
            switch (NameR[22]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+23, ".512", 4))
                break;
              return Intrinsic::x86_avx512_mask_pcmpeq_d_512;	 // "86.avx512.mask.pcmpeq.d.512"
            case 'q':	 // 1 string to match.
              if (memcmp(NameR.data()+23, ".512", 4))
                break;
              return Intrinsic::x86_avx512_mask_pcmpeq_q_512;	 // "86.avx512.mask.pcmpeq.q.512"
            }
            break;
          case 'm':	 // 1 string to match.
            if (memcmp(NameR.data()+17, "ulu.dq.512", 10))
              break;
            return Intrinsic::x86_avx512_mask_pmulu_dq_512;	 // "86.avx512.mask.pmulu.dq.512"
          case 't':	 // 2 strings to match.
            if (memcmp(NameR.data()+17, "estm.", 5))
              break;
            switch (NameR[22]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+23, ".512", 4))
                break;
              return Intrinsic::x86_avx512_mask_ptestm_d_512;	 // "86.avx512.mask.ptestm.d.512"
            case 'q':	 // 1 string to match.
              if (memcmp(NameR.data()+23, ".512", 4))
                break;
              return Intrinsic::x86_avx512_mask_ptestm_q_512;	 // "86.avx512.mask.ptestm.q.512"
            }
            break;
          }
          break;
        case 's':	 // 2 strings to match.
          if (memcmp(NameR.data()+16, "toreu.", 6))
            break;
          switch (NameR[22]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(NameR.data()+23, ".512", 4))
              break;
            return Intrinsic::x86_avx512_mask_storeu_d_512;	 // "86.avx512.mask.storeu.d.512"
          case 'q':	 // 1 string to match.
            if (memcmp(NameR.data()+23, ".512", 4))
              break;
            return Intrinsic::x86_avx512_mask_storeu_q_512;	 // "86.avx512.mask.storeu.q.512"
          }
          break;
        case 'v':	 // 2 strings to match.
          if (memcmp(NameR.data()+16, "permt.", 6))
            break;
          switch (NameR[22]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(NameR.data()+23, ".512", 4))
              break;
            return Intrinsic::x86_avx512_mask_vpermt_d_512;	 // "86.avx512.mask.vpermt.d.512"
          case 'q':	 // 1 string to match.
            if (memcmp(NameR.data()+23, ".512", 4))
              break;
            return Intrinsic::x86_avx512_mask_vpermt_q_512;	 // "86.avx512.mask.vpermt.q.512"
          }
          break;
        }
        break;
      case 's':	 // 4 strings to match.
        if (memcmp(NameR.data()+11, "catterpf.", 9))
          break;
        switch (NameR[20]) {
        default: break;
        case 'd':	 // 2 strings to match.
          if (NameR[21] != 'p')
            break;
          switch (NameR[22]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(NameR.data()+23, ".512", 4))
              break;
            return Intrinsic::x86_avx512_scatterpf_dpd_512;	 // "86.avx512.scatterpf.dpd.512"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+23, ".512", 4))
              break;
            return Intrinsic::x86_avx512_scatterpf_dps_512;	 // "86.avx512.scatterpf.dps.512"
          }
          break;
        case 'q':	 // 2 strings to match.
          if (NameR[21] != 'p')
            break;
          switch (NameR[22]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(NameR.data()+23, ".512", 4))
              break;
            return Intrinsic::x86_avx512_scatterpf_qpd_512;	 // "86.avx512.scatterpf.qpd.512"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+23, ".512", 4))
              break;
            return Intrinsic::x86_avx512_scatterpf_qps_512;	 // "86.avx512.scatterpf.qps.512"
          }
          break;
        }
        break;
      case 'v':	 // 2 strings to match.
        if (memcmp(NameR.data()+11, "broadcast.s", 11))
          break;
        switch (NameR[22]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(NameR.data()+23, ".512", 4))
            break;
          return Intrinsic::x86_avx512_vbroadcast_sd_512;	 // "86.avx512.vbroadcast.sd.512"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+23, ".512", 4))
            break;
          return Intrinsic::x86_avx512_vbroadcast_ss_512;	 // "86.avx512.vbroadcast.ss.512"
        }
        break;
      }
      break;
    case 28:	 // 16 strings to match.
      if (memcmp(NameR.data()+0, "86.avx", 6))
        break;
      switch (NameR[6]) {
      default: break;
      case '.':	 // 2 strings to match.
        if (memcmp(NameR.data()+7, "vbroadcastf128.p", 16))
          break;
        switch (NameR[23]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(NameR.data()+24, ".256", 4))
            break;
          return Intrinsic::x86_avx_vbroadcastf128_pd_256;	 // "86.avx.vbroadcastf128.pd.256"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+24, ".256", 4))
            break;
          return Intrinsic::x86_avx_vbroadcastf128_ps_256;	 // "86.avx.vbroadcastf128.ps.256"
        }
        break;
      case '2':	 // 2 strings to match.
        if (memcmp(NameR.data()+7, ".vbroadcast.s", 13))
          break;
        switch (NameR[20]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(NameR.data()+21, ".pd.256", 7))
            break;
          return Intrinsic::x86_avx2_vbroadcast_sd_pd_256;	 // "86.avx2.vbroadcast.sd.pd.256"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+21, ".ps.256", 7))
            break;
          return Intrinsic::x86_avx2_vbroadcast_ss_ps_256;	 // "86.avx2.vbroadcast.ss.ps.256"
        }
        break;
      case '5':	 // 12 strings to match.
        if (memcmp(NameR.data()+7, "12.mask.", 8))
          break;
        switch (NameR[15]) {
        default: break;
        case 'c':	 // 6 strings to match.
          if (memcmp(NameR.data()+16, "vt", 2))
            break;
          switch (NameR[18]) {
          default: break;
          case 'p':	 // 2 strings to match.
            switch (NameR[19]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+20, "2udq.512", 8))
                break;
              return Intrinsic::x86_avx512_mask_cvtpd2udq_512;	 // "86.avx512.mask.cvtpd2udq.512"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+20, "2udq.512", 8))
                break;
              return Intrinsic::x86_avx512_mask_cvtps2udq_512;	 // "86.avx512.mask.cvtps2udq.512"
            }
            break;
          case 't':	 // 2 strings to match.
            if (NameR[19] != 'p')
              break;
            switch (NameR[20]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+21, "2dq.512", 7))
                break;
              return Intrinsic::x86_avx512_mask_cvttpd2dq_512;	 // "86.avx512.mask.cvttpd2dq.512"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+21, "2dq.512", 7))
                break;
              return Intrinsic::x86_avx512_mask_cvttps2dq_512;	 // "86.avx512.mask.cvttps2dq.512"
            }
            break;
          case 'u':	 // 2 strings to match.
            if (memcmp(NameR.data()+19, "dq2p", 4))
              break;
            switch (NameR[23]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+24, ".512", 4))
                break;
              return Intrinsic::x86_avx512_mask_cvtudq2pd_512;	 // "86.avx512.mask.cvtudq2pd.512"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+24, ".512", 4))
                break;
              return Intrinsic::x86_avx512_mask_cvtudq2ps_512;	 // "86.avx512.mask.cvtudq2ps.512"
            }
            break;
          }
          break;
        case 's':	 // 2 strings to match.
          if (memcmp(NameR.data()+16, "toreu.p", 7))
            break;
          switch (NameR[23]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(NameR.data()+24, ".512", 4))
              break;
            return Intrinsic::x86_avx512_mask_storeu_pd_512;	 // "86.avx512.mask.storeu.pd.512"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+24, ".512", 4))
              break;
            return Intrinsic::x86_avx512_mask_storeu_ps_512;	 // "86.avx512.mask.storeu.ps.512"
          }
          break;
        case 'v':	 // 4 strings to match.
          switch (NameR[16]) {
          default: break;
          case 'c':	 // 2 strings to match.
            if (memcmp(NameR.data()+17, "vtp", 3))
              break;
            switch (NameR[20]) {
            default: break;
            case 'h':	 // 1 string to match.
              if (memcmp(NameR.data()+21, "2ps.512", 7))
                break;
              return Intrinsic::x86_avx512_mask_vcvtph2ps_512;	 // "86.avx512.mask.vcvtph2ps.512"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+21, "2ph.512", 7))
                break;
              return Intrinsic::x86_avx512_mask_vcvtps2ph_512;	 // "86.avx512.mask.vcvtps2ph.512"
            }
            break;
          case 'p':	 // 2 strings to match.
            if (memcmp(NameR.data()+17, "ermt.p", 6))
              break;
            switch (NameR[23]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(NameR.data()+24, ".512", 4))
                break;
              return Intrinsic::x86_avx512_mask_vpermt_pd_512;	 // "86.avx512.mask.vpermt.pd.512"
            case 's':	 // 1 string to match.
              if (memcmp(NameR.data()+24, ".512", 4))
                break;
              return Intrinsic::x86_avx512_mask_vpermt_ps_512;	 // "86.avx512.mask.vpermt.ps.512"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 29:	 // 6 strings to match.
      if (memcmp(NameR.data()+0, "86.avx512.", 10))
        break;
      switch (NameR[10]) {
      default: break;
      case 'm':	 // 4 strings to match.
        if (memcmp(NameR.data()+11, "ask.c", 5))
          break;
        switch (NameR[16]) {
        default: break;
        case 'o':	 // 2 strings to match.
          if (memcmp(NameR.data()+17, "nflict.", 7))
            break;
          switch (NameR[24]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(NameR.data()+25, ".512", 4))
              break;
            return Intrinsic::x86_avx512_mask_conflict_d_512;	 // "86.avx512.mask.conflict.d.512"
          case 'q':	 // 1 string to match.
            if (memcmp(NameR.data()+25, ".512", 4))
              break;
            return Intrinsic::x86_avx512_mask_conflict_q_512;	 // "86.avx512.mask.conflict.q.512"
          }
          break;
        case 'v':	 // 2 strings to match.
          if (memcmp(NameR.data()+17, "ttp", 3))
            break;
          switch (NameR[20]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(NameR.data()+21, "2udq.512", 8))
              break;
            return Intrinsic::x86_avx512_mask_cvttpd2udq_512;	 // "86.avx512.mask.cvttpd2udq.512"
          case 's':	 // 1 string to match.
            if (memcmp(NameR.data()+21, "2udq.512", 8))
              break;
            return Intrinsic::x86_avx512_mask_cvttps2udq_512;	 // "86.avx512.mask.cvttps2udq.512"
          }
          break;
        }
        break;
      case 'p':	 // 2 strings to match.
        if (memcmp(NameR.data()+11, "broadcast", 9))
          break;
        switch (NameR[20]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(NameR.data()+21, ".i32.512", 8))
            break;
          return Intrinsic::x86_avx512_pbroadcastd_i32_512;	 // "86.avx512.pbroadcastd.i32.512"
        case 'q':	 // 1 string to match.
          if (memcmp(NameR.data()+21, ".i64.512", 8))
            break;
          return Intrinsic::x86_avx512_pbroadcastq_i64_512;	 // "86.avx512.pbroadcastq.i64.512"
        }
        break;
      }
      break;
    case 30:	 // 4 strings to match.
      if (memcmp(NameR.data()+0, "86.avx512.", 10))
        break;
      switch (NameR[10]) {
      default: break;
      case 'm':	 // 2 strings to match.
        if (memcmp(NameR.data()+11, "ask.rndscale.p", 14))
          break;
        switch (NameR[25]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(NameR.data()+26, ".512", 4))
            break;
          return Intrinsic::x86_avx512_mask_rndscale_pd_512;	 // "86.avx512.mask.rndscale.pd.512"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+26, ".512", 4))
            break;
          return Intrinsic::x86_avx512_mask_rndscale_ps_512;	 // "86.avx512.mask.rndscale.ps.512"
        }
        break;
      case 'v':	 // 2 strings to match.
        if (memcmp(NameR.data()+11, "broadcast.s", 11))
          break;
        switch (NameR[22]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(NameR.data()+23, ".pd.512", 7))
            break;
          return Intrinsic::x86_avx512_vbroadcast_sd_pd_512;	 // "86.avx512.vbroadcast.sd.pd.512"
        case 's':	 // 1 string to match.
          if (memcmp(NameR.data()+23, ".ps.512", 7))
            break;
          return Intrinsic::x86_avx512_vbroadcast_ss_ps_512;	 // "86.avx512.vbroadcast.ss.ps.512"
        }
        break;
      }
      break;
    case 35:	 // 3 strings to match.
      if (memcmp(NameR.data()+0, "86.avx512.mask.pbroadcast.", 26))
        break;
      switch (NameR[26]) {
      default: break;
      case 'd':	 // 1 string to match.
        if (memcmp(NameR.data()+27, ".gpr.512", 8))
          break;
        return Intrinsic::x86_avx512_mask_pbroadcast_d_gpr_512;	 // "86.avx512.mask.pbroadcast.d.gpr.512"
      case 'q':	 // 2 strings to match.
        if (NameR[27] != '.')
          break;
        switch (NameR[28]) {
        default: break;
        case 'g':	 // 1 string to match.
          if (memcmp(NameR.data()+29, "pr.512", 6))
            break;
          return Intrinsic::x86_avx512_mask_pbroadcast_q_gpr_512;	 // "86.avx512.mask.pbroadcast.q.gpr.512"
        case 'm':	 // 1 string to match.
          if (memcmp(NameR.data()+29, "em.512", 6))
            break;
          return Intrinsic::x86_avx512_mask_pbroadcast_q_mem_512;	 // "86.avx512.mask.pbroadcast.q.mem.512"
        }
        break;
      }
      break;
    }
    break;  // end of 'x' case.
  }
#endif

// Global intrinsic function declaration type table.
#ifdef GET_INTRINSIC_GENERATOR_GLOBAL
static const unsigned IIT_Table[] = {
  0x1F1F1F1F, 0x1F1F1F1F, (1U<<31) | 19, 0x1F1F, 0x1F1F, 0x1F1F, 0x41F1F, 
  0x0, 0x444, 0x444, 0x444, 0x444, 0x544, 0x444, 0x444, 
  0x544, 0x2C2C2C, 0x2C2C2C, 0x2C2C, 0x2C2C, 0x4A44A4A, 0x44, 0x4A44A4A, 
  0x4A44A4A, 0x4A4A4A4A, 0x4A4A4A, 0x4A4A4A4A, 0x4A4A4A4A, 0x4A4A4A, 0x4A4A4A4A, 0x40, 
  0x40, 0x40, 0x40, (1U<<31) | 332, 0x3F5, (1U<<31) | 332, 0x3F5, 0xF0F, 
  (1U<<31) | 400, 0x2F2F2F, 0x2F2F, 0x2F2F2F, 0x5F5F0F, 0x5F5F0F, 0x6F1F, 0x5F0F, 
  0x5F0F, 0x5F0F, 0x5F0F, 0x5F0F, 0x5F0F, 0x5F0F, 0x5F0F, 0x6F2F, 
  0x5F0F, 0x5F0F, 0x2F2F2F, 0x1F1F1F, 0x2F2F2F, 0x6F1F, 0x2F2F2F, 0x6F1F, 
  0x2F2F2F, 0x1F1F1F, 0x2F2F2F, 0x6F1F, 0x2F2F2F, 0x6F1F, 0x1F1F1F, 0x1F1F, 
  0x1F1F1F, 0x1F1F, 0x1F1F, 0x1F1F, 0x1F1F1F, (1U<<31) | 1673, (1U<<31) | 1663, (1U<<31) | 1651, 
  (1U<<31) | 1673, (1U<<31) | 1743, (1U<<31) | 1673, (1U<<31) | 1663, (1U<<31) | 1726, (1U<<31) | 1663, (1U<<31) | 1651, (1U<<31) | 1705, 
  (1U<<31) | 1651, 0x2F2F2F, (1U<<31) | 412, 0x552C, (1U<<31) | 400, 0x2F2F, (1U<<31) | 454, (1U<<31) | 400, 
  0x2F2F2F, 0x6F2F, 0x6F0F, 0x6F0F, 0x4F0F, 0x4F0F, 0x4F0F, 0x2F2F2F, 
  (1U<<31) | 407, 0x2F2F2F, 0x2F2F2F, 0x2F2F2F, 0x6F0F, 0x2F2F2F, 0x2F2F2F, 0x6F0F, 
  (1U<<31) | 412, 0xF0F, 0xF0F0F, 0xF0F0F, (1U<<31) | 412, 0x445, 0xF0F, 0xF0F0F, 
  0xF0F0F, (1U<<31) | 454, (1U<<31) | 454, 0xF0F0F, 0xF0F0F, (1U<<31) | 454, (1U<<31) | 454, 0xF0F0F, 
  (1U<<31) | 14, (1U<<31) | 14, 0x2F2F2F, 0xF0F0F, 0xF0F0F, (1U<<31) | 646, 0x7F2F2F0, (1U<<31) | 1629, 
  (1U<<31) | 1639, 0x7F2F2F0, 0x7F52F2F0, (1U<<31) | 1629, (1U<<31) | 1681, (1U<<31) | 1639, (1U<<31) | 1692, (1U<<31) | 400, 
  0xF0F0F, 0x2F2C2F, 0x2F2C2C2F, (1U<<31) | 368, (1U<<31) | 353, 0x2F2C2F2F, (1U<<31) | 379, (1U<<31) | 366, 
  (1U<<31) | 351, 0x2F2F2F, 0x6F2F, 0x6F0F, 0x6F0F, 0x2F2F2F, 0x2F2F2F, 0x2F2F2F, 
  0x2F2F2F, 0x6F0F, 0x2F2F2F, 0x2F2F2F, 0x6F0F, (1U<<31) | 412, 0xF0F0F, 0xF0F0F, 
  (1U<<31) | 454, 0xF0F0F, (1U<<31) | 454, 0xF0F0F, (1U<<31) | 14, 0x2F2F, 0x2F2F2F, 0xF0F0F, 
  0x2F2F, 0xF0F0F, (1U<<31) | 646, 0xF0F0F, 0x52F56F2F, 0x45F0F, 0x45F0F, 0x7A3A, 
  0x44F1F, 0x44F1F, 0x3A7A, 0x42F2F2F, 0x42F2F2F, 0xF0F, 0xF0F0F, 0x1F1F1F, 
  0x87, 0x2E554, 0x3F54, 0x2E554, 0x3F54, 0xF0F0F, 0x2E2E, (1U<<31) | 569, 
  0x4444440, 0x4444440, 0x0, 0x444, 0x444, 0x444, 0x444, 0x444, 
  0x444, 0x40, 0x40, 0x4, 0x40, 0x40, 0x3F4, (1U<<31) | 326, 
  0x3F4, (1U<<31) | 326, 0x4444440, 0x4444440, 0x444440, 0x444440, 0x444444, 0x444444, 
  0x2C2C2C, 0x2C2C2C, 0x2C2C, 0x2C2C, 0x4A44A4A, 0x44, 0x4A44A4A, 0x4A44A4A, 
  0x4A4A4A4A, 0x4A4A4A, 0x4A4A4A4A, 0x4A4A4A4A, 0x4A4A4A, 0x4A4A4A4A, 0x2F2F2F, 0x2F2F2F, 
  0x2F2F, 0x6F6F2F, 0x6F6F2F, 0x2F2F2F2F, 0x2F2F, 0x2F2F, 0x2F2F, 0x6F2F, 
  0x6F2F, 0x45F0F, 0x45F0F, 0x7A3A, 0x44F1F, 0x44F1F, 0x3A7A, 0x6F2F, 
  0x6F2F, 0x6F2F, 0x6F2F, 0x6F2F, 0x6F2F, 0x2F2F2F, 0x2F2F2F, 0x2F2F2F, 
  0x2F2F2F, 0x42E2F, (1U<<31) | 613, (1U<<31) | 709, (1U<<31) | 602, (1U<<31) | 735, (1U<<31) | 589, (1U<<31) | 767, 
  0x2F2F2F, 0x2F2F2F, 0x2F2F2F, 0x2F2F2F, 0x2F2F2F, 0x2F2F2F, (1U<<31) | 412, (1U<<31) | 412, 
  (1U<<31) | 412, 0x2F2F2F, 0x6F2F2F, 0x6F2F2F, 0x2F2F2F, 0x6F2F, 0x6F2F, 0x2F2F2F, 
  0x2F2F2F, 0x2F2F2F, 0x2F2F2F, 0x2F2F, 0x2F2F2F, 0x2F2F2F, 0x2F2F2F, (1U<<31) | 412, 
  (1U<<31) | 395, (1U<<31) | 395, (1U<<31) | 395, 0x2F2F, 0x2F2F2F, (1U<<31) | 400, (1U<<31) | 400, (1U<<31) | 400, 
  0x2F2F2F, 0x2F2F2F, (1U<<31) | 400, (1U<<31) | 400, (1U<<31) | 400, 0x2F2F2F, 0x2F2F2F, 0x2F2F2F, 
  0x2F2F2F, 0x2F2F2F, (1U<<31) | 400, 0x2F2F, 0x2F2F2F, 0x2F2F2F, 0x2F2F2F, 0x2F2F, 
  0x2F2F, 0x2F2F, 0x2F2F, 0x2F2F, 0x2F2F, (1U<<31) | 400, 0x2F2F2F, 0x2F2F2F, 
  0x2F2F, 0x2F2F2F, (1U<<31) | 400, 0x2F2F2F2F, 0x2F2F2F, 0x2F2F2F, 0x42F2E0, 0x42F2F2E0, 
  (1U<<31) | 699, (1U<<31) | 622, (1U<<31) | 723, (1U<<31) | 633, (1U<<31) | 753, 0x2B2B2B, 0x2B2B2B2B, (1U<<31) | 315, 
  (1U<<31) | 313, 0x2B2B2B2B, (1U<<31) | 315, (1U<<31) | 313, (1U<<31) | 311, 0x444, 0x444, 0x44, 
  0x40, 0x444, 0x3F44, 0x2E444, 0x3F44, 0x2E444, 0x2E, 0x40, 
  0x444, 0x1F7, 0x1F7, 0xF0F, 0x1F1F, 0x2E2E0, 0x31F, 0x1F3, 
  0x445F1F, 0x444F1F, 0x444F1F, 0x445F0F, 0x444F0F, 0x444F0F, 0x445F0F, 0x444F0F, 
  0x444F0F, 0x1F1F1F, 0x1F1F, 0x10F0F, 0xF0F, 0x10F0F, 0x0, (1U<<31) | 1818, 
  (1U<<31) | 1813, 0x0, 0x0, 0x42E, 0x2E40, 0x2E50, 0x40, 0x2E0, 
  0x2E0, 0x2E, 0x2E4, 0x2E4, 0x0, 0x1F1F, 0x1F1F, 0xF0F0F, 
  (1U<<31) | 1830, (1U<<31) | 1822, (1U<<31) | 1838, 0x1F1F, 0x1F1F, 0x4, 0x1F1F1F1F, 0x1F1F1F1F, 
  0x42E, 0x2EE2E2E, 0x2E2EE0, 0x2EE2E2E0, 0x44, 0x55, 0x44, 0x444, 
  0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 
  0x444, 0x444, 0x444, 0x444, 0x444, 0x555, 0x555, 0x444, 
  0x545, 0x444, 0x444, 0x555, 0x44, 0x44, 0x444, 0x444, 
  0x444, 0x444, 0x445, 0x445, 0x444, 0x555, 0x444, 0x555, 
  0x444, 0x555, 0x444, 0x555, 0x44, 0x55, 0x44, 0x44, 
  0x55, 0x444, 0x444, 0x555, 0x54, 0x54, 0x44, 0x44, 
  0x44, 0x44, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 
  0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x555, 
  0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 
  0x444, 0x444, 0x444, 0x44, 0x44, 0x44, 0x45, 0x44, 
  0x444, 0x444, 0x55, 0x45, 0x44, 0x55, 0x55, 0x55, 
  0x55, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 
  0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 
  0x555, 0x555, 0x555, 0x555, 0x555, 0x551, 0x551, 0x551, 
  0x551, 0x551, 0x551, 0x551, 0x551, 0x55, 0x555, 0x555, 
  0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 
  0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 
  0x555, 0x5555, 0x555, 0x5555, 0x555, 0x555, 0x555, 0x555, 
  0x555, 0x555, 0x555, 0x555, 0x444, 0x555, 0x44, 0x44, 
  0x444, 0x555, 0x445, 0x445, 0x541, 0x441, 0x441, 0x441, 
  0x441, 0x441, 0x441, 0x441, 0x441, 0x441, 0x441, 0x441, 
  0x441, 0x445, 0x445, 0x444, 0x444, 0x444, 0x444, 0x555, 
  0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 
  0x451, 0x551, 0x451, 0x551, 0x451, 0x451, 0x451, 0x451, 
  0x451, 0x451, 0x451, 0x451, 0x4555, 0x4555, 0x4555, 0x4555, 
  0x4555, 0x4555, 0x4555, 0x4555, 0x554, 0x41, 0x441, 0x441, 
  0x41, 0x441, 0x441, 0x441, 0x441, 0x441, 0x551, 0x441, 
  0x441, 0x441, 0x441, 0x551, 0x441, 0x441, 0x551, 0x441, 
  0x441, 0x45, 0x4444, 0x4444, 0x4444, 0x4444, 0x41, 0x441, 
  0x441, 0x41, 0x44, 0x41, 0x444, 0x5545, 0x441, 0x4441, 
  0x4441, 0x4441, 0x4441, 0x441, 0x441, 0x441, 0x441, 0x441, 
  0x441, 0x441, 0x441, 0x441, 0x441, 0x441, 0x4441, 0x4441, 
  0x4441, 0x4441, 0x58, 0x57, 0x85, 0x85, 0x87, 0x85, 
  0x85, 0x84, 0x84, 0x84, 0x84, 0x75, 0x75, 0x78, 
  0x75, 0x75, 0x74, 0x74, 0x74, 0x74, 0x58, 0x57, 
  0x48, 0x47, 0x48, 0x47, 0x888, 0x481, 0x881, 0x881, 
  0x881, 0x881, 0x888, 0x888, 0x88, 0x8888, 0x8888, 0x48888, 
  0x8888, 0x8888, 0x48, 0x48, 0x888, 0x888, 0x888, 0x888, 
  0x777, 0x471, 0x771, 0x771, 0x771, 0x771, 0x777, 0x777, 
  0x77, 0x7777, 0x7777, 0x47777, 0x7777, 0x7777, 0x47, 0x47, 
  0x777, 0x777, 0x777, 0x777, 0x4444, 0x4444, 0x4455, 0x4455, 
  0x4455, 0x4455, 0x4455, 0x4455, 0x445, 0x445, 0x444, 0x444, 
  0x444, 0x444, 0x445, 0x445, 0x445, 0x445, 0x4455, 0x4455, 
  0x4455, 0x4455, 0x4455, 0x4455, 0x444, 0x445, 0x4455, 0x4455, 
  0x445, 0x444, 0x444, 0x444, 0x444, 0x4444, 0x4444, 0x4444, 
  0x5555, 0x5555, 0x5555, 0x5555, 0x5555, 0x5555, 0x5555, 0x5555, 
  0x5555, 0x5555, 0x5555, 0x5555, 0x5555, 0x5555, 0x5555, 0x5555, 
  0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 
  0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 0x555, 
  0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 
  0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 
  0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 
  0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 
  0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 
  0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 
  0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 
  0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 
  0x444, 0x444, 0x444, 0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 
  0x4455, 0x4455, 0x4455, 0x445, 0x445, 0x445, 0x445, 0x445, 
  0x445, 0x445, 0x445, 0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 
  0x4455, 0x4455, 0x4455, 0x445, 0x445, 0x445, 0x445, 0x445, 
  0x445, 0x445, 0x445, 0x444, 0x444, 0x444, 0x4444, 0x4444, 
  0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x444, 0x444, 
  0x444, 0x444, 0x444, 0x444, 0x444, 0x444, 0x4444, 0x4444, 
  0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x444, 0x4455, 
  0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x445, 
  0x445, 0x445, 0x445, 0x445, 0x445, 0x445, 0x445, 0x4455, 
  0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x4455, 0x444, 
  0x4444, 0x4444, 0x4444, 0x555, 0x555, 0x5555, 0x5555, 0x555, 
  0x555, 0x555, 0x555, 0x5555, 0x5555, 0x554, 0x554, 0x555, 
  0x555, 0x4455, 0x5555, 0x5555, 0x5555, 0x4455, 0x4455, 0x4455, 
  0x4455, 0x555, 0x555, 0x445, 0x444, 0x445, 0x444, 0x445, 
  0x445, 0x554, 0x554, 0x5555, 0x5555, 0x5555, 0x5555, 0x555, 
  0x555, 0x555, 0x555, 0x4555, 0x455, 0x454, 0x5555, 0x555, 
  0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x454, 0x454, 0x454, 
  0x454, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 
  0x4444, 0x4444, 0x4444, 0x4444, 0x445, 0x4455, 0x445, 0x4455, 
  0x5555, 0x5555, 0x555, 0x555, 0x5555, 0x5555, 0x555, 0x555, 
  0x4444, 0x4444, 0x4444, 0x5555, 0x5555, 0x555, 0x4455, 0x4455, 
  0x445, 0x445, 0x5555, 0x5555, 0x555, 0x555, 0x4444, 0x455, 
  0x4555, 0x4555, 0x4555, 0x4555, 0x4555, 0x444, 0x4444, 0x4444, 
  0x4444, 0x4444, 0x444, 0x4444, 0x455, 0x455, 0x455, 0x4555, 
  0x4555, 0x4555, 0x4555, 0x4555, 0x444, 0x4444, 0x4444, 0x4444, 
  0x4444, 0x444, 0x455, 0x455, 0x455, 0x4555, 0x4555, 0x4555, 
  0x4555, 0x455, 0x455, 0x444, 0x4444, 0x4444, 0x4444, 0x4444, 
  0x444, 0x444, 0x454, 0x455, 0x455, 0x455, 0x4555, 0x4555, 
  0x4555, 0x4555, 0x4555, 0x444, 0x4444, 0x4444, 0x4444, 0x4444, 
  0x444, 0x454, 0x455, 0x455, 0x44, 0x55, 0x44, 0x54, 
  0x44, 0x54, 0x44, 0x44, 0x54, 0x444, 0x444, 0x44, 
  0x54, 0x44, 0x54, 0x55, 0x4444, 0x544, 0x4455, 0x555, 
  0x44444, 0x5444, 0x44555, 0x5555, 0x55, 0x555, 0x455, 0x4555, 
  0x4555, 0x4555, 0x4555, 0x4555, 0x444, 0x4444, 0x4444, 0x4444, 
  0x4444, 0x455, 0x455, 0x455, 0x4555, 0x4555, 0x4555, 0x4555, 
  0x4555, 0x444, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x455, 
  0x455, 0x455, 0x4555, 0x4555, 0x4555, 0x4555, 0x4555, 0x444, 
  0x4444, 0x4444, 0x4444, 0x4444, 0x455, 0x455, 0x445, 0x554, 
  0x444, 0x444, 0x555, 0x555, 0x555, 0x555, 0x44, 0x44, 
  0x44444, 0x44444, 0x44444, 0x44444, 0x444, 0x444, 0x441, 0x441, 
  0x4555, 0x4555, 0x455, 0x455, 0x4555, 0x54, 0x54, 0x54, 
  0x55, 0x54, 0x55, 0x54, 0x55, 0x54, 0x55, 0x44, 
  0x45, 0x4555, 0x4555, 0x45, 0x45, 0x54, 0x555, 0x54, 
  0x555, 0x45, 0x45, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 
  0x444, 0x454, 0x54, 0x4444, 0x544, 0x4455, 0x555, 0x444, 
  0x441, 0x441, 0x4444, 0x4444, 0x4444, 0x4444, 0x4444, 0x444, 
  0x4444, 0x4444, 0x4444, 0x4455, 0x44555, 0x555, 0x555, 0x555, 
  0x555, 0x555, 0x555, 0x454, 0x454, 0x54, 0x455, 0x44, 
  0x442E2E2E, 0x2E2E2E0, (1U<<31) | 338, (1U<<31) | 339, 0x2E50, 0x2E50, 0x1F1F, 0x1F1F, 
  0x1F1F, 0x42E0, (1U<<31) | 29, (1U<<31) | 29, 0x144F23F0, 0x3939, 0x2A2A, 0x44, 
  0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x393939, 0x393939, 0x444, 0x393939, 
  0x393939, 0x444, 0x444, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 
  0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x444, 
  0x393939, 0x2A2A2A, 0x393939, 0x2A2A2A, 0x2A2A2A, 0x2A2A2A, 0x2C2C2C, 0x595959, 
  0x3B3B3B, 0x4A4A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 0x444, 0x2C2C2C, 
  0x42C2C, 0x4444, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 
  0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 
  0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 
  0x3B3B3B, 0x4A4A4A, 0x4444, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x42C2C, 
  0x45959, 0x43B3B, 0x44A4A, 0x2C2C2C2C, 0x59595959, 0x3B3B3B3B, 0x4A4A4A4A, 0x42C2C2C, 
  0x4595959, 0x43B3B3B, 0x44A4A4A, 0x2C2C2C2C, 0x59595959, 0x3B3B3B3B, 0x4A4A4A4A, 0x42C2C2C, 
  0x4595959, 0x43B3B3B, 0x44A4A4A, 0x44, 0x2C2C2C2C, 0x42C2C2C, 0x2C2C2C2C, 0x42C2C2C, 
  0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 
  0x2C4, 0x594, 0x3B4, 0x2C4, 0x4A4, 0x4, 0x2C2C2C2C, 0x42C2C2C, 
  0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 
  0x2C4, 0x594, 0x3B4, 0x2C4, 0x4A4, 0x2C2C2C, 0x595959, 0x3B3B3B, 
  0x4A4A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 0x44, 0x2C2C2C, 0x595959, 
  0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x42C2C, 0x45959, 
  0x43B3B, 0x44A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 0x2C2C2C, 0x595959, 
  0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x42C2C, 0x45959, 
  0x43B3B, 0x44A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 0x39390, 0x39390, 
  0x39390, 0x2A2A4, 0x2A2A4, 0x2A2A4, 0x2A2A4, 0x2A2A4, 0x2A2A4, 0x2A2A0, 
  0x2A2A0, 0x2A2A0, 0x42C4, 0x4595, 0x43B4, 0x44A4, 0x42C4, 0x4595, 
  0x43B4, 0x44A4, 0x440, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 
  0x595959, 0x3B3B3B, 0x4A4A4A, 0x4555, 0x4A4A59, 0x2C2C3B, 0x3B3B4A, 0x4A4A59, 
  0x2C2C3B, 0x3B3B4A, 0x393955, 0x4A4A5959, 0x2C2C3B3B, 0x3B3B4A4A, 0x4A4A5959, 0x2C2C3B3B, 
  0x3B3B4A4A, 0x393955, 0x4455, 0x393955, 0x393955, 0x2A2A55, 0x2A2A55, 0x393955, 
  0x393955, 0x393955, 0x4455, 0x393955, 0x393955, 0x2A2A55, 0x2A2A55, 0x4A4A5959, 
  0x2C2C3B3B, 0x3B3B4A4A, 0x4A4A5959, 0x2C2C3B3B, 0x3B3B4A4A, 0x393955, 0x454, 0x454, 
  0x454, 0x454, 0x454, 0x454, 0x898989, 0x7A7A7A, 0x898959, 0x7A7A4A, 
  0x898959, 0x7A7A4A, 0x8959, 0x7A4A, 0x898959, 0x7A7A4A, 0x898959, 0x7A7A4A, 
  0x898959, 0x7A7A4A, 0x898959, 0x7A7A4A, 0x898959, 0x7A7A4A, 0x898959, 0x7A7A4A, 
  0x898959, 0x7A7A4A, 0x898959, 0x7A7A4A, 0x898959, 0x7A7A4A, 0x898989, 0x7A7A7A, 
  0x7A7A6B, 0x89897A, 0x598989, 0x4A7A7A, 0x7A89, 0x6B7A, 0x7A89, 0x6B7A, 
  0x5989, 0x4A7A, 0x5989, 0x4A7A, 0x4A89, 0x3B7A, 0x4A89, 0x3B7A, 
  0x42C, 0x559, 0x43B, 0x44A, 0x8989, 0x7A7A, (1U<<31) | 1756, 0x7A7A7A7A, 
  0x898989, 0x7A7A7A, 0x898989, 0x7A7A7A, 0x898989, 0x7A7A7A, 0x898989, 0x7A7A7A, 
  (1U<<31) | 1756, 0x7A7A7A7A, 0x898989, 0x7A7A7A, 0x8989, 0x7A7A, 0x8989, 0x7A7A, 
  0x8989, 0x7A7A, 0x898959, 0x7A7A4A, 0x898959, 0x7A7A4A, 0x898959, 0x7A7A4A, 
  0x898959, 0x7A7A4A, 0x898959, 0x7A7A4A, 0x898959, 0x7A7A4A, 0x8989, 0x7A7A, 
  0x898989, 0x7A7A7A, 0x898959, 0x7A7A4A, 0x898959, 0x7A7A4A, 0x898959, 0x7A7A4A, 
  0x898959, 0x7A7A4A, 0x898959, 0x7A7A4A, 0x8959, 0x7A4A, 0x8959, 0x7A4A, 
  0x7A7A3B, 0x89894A, 0x8959, 0x7A4A, 0x8959, 0x7A4A, 0x4A4A59, 0x2C2C3B, 
  0x3B3B4A, 0x4A4A59, 0x2C2C3B, 0x3B3B4A, 0x4A4A59, 0x2C2C3B, 0x3B3B4A, 0x4A4A59, 
  0x2C2C3B, 0x3B3B4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 
  0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 
  0x3B3B3B, 0x4A4A4A, 0x442C2C, 0x545959, 0x443B3B, 0x444A4A, 0x444, 0x2C42C2C, 
  0x5945959, 0x3B43B3B, 0x4A44A4A, 0x42E4, 0x42E2C, 0x42E59, 0x42E3B, 0x42E4A, 
  0x42C, 0x459, 0x43B, 0x44A, 0x42E4, 0x4444, 0x42E4, 0x4455, 
  0x3B3B3B3B, 0x4A4A4A4A, 0x3B3B3B3B, 0x4A4A4A4A, 0x4455, 0x2C2C2C2C, 0x59595959, 0x3B3B3B3B, 
  0x4A4A4A4A, 0x393955, 0x393955, 0x393955, 0x393955, 0x2C2C2C, 0x595959, 0x3B3B3B, 
  0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 
  0x4A4A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 0x42C2C, 0x45959, 0x43B3B, 
  0x44A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 
  0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x42C2C, 0x45959, 0x43B3B, 
  0x44A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 
  0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x444, 0x2C2C, 0x4455, 
  0x3B3B3B3B, 0x4A4A4A4A, 0x3B3B3B3B, 0x4A4A4A4A, 0x4455, 0x2C2C2C2C, 0x59595959, 0x3B3B3B3B, 
  0x4A4A4A4A, 0x455, 0x393939, 0x3B3B3B, 0x4A4A4A, 0x393939, 0x39394, 0x39394, 
  0x392A39, 0x392A39, 0x393939, 0x444, 0x393939, 0x444, 0x3B3B3B, 0x4A4A4A, 
  0x393955, 0x393955, 0x445, 0x445, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 
  0x2C2C, 0x5959, 0x3B3B, 0x4A4A, 0x2C2C, 0x5959, 0x3B3B, 0x4A4A, 
  0x2C2C2C, 0x42C2C, 0x2C2C2C, 0x42C2C, 0x393939, 0x2C2C2C, 0x595959, 0x3B3B3B, 
  0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C, 0x5959, 0x3B3B, 
  0x4A4A, 0x393939, 0x2A2A2A, 0x394, 0x394, 0x2A39, 0x2A39, 0x2A39, 
  0x2A39, 0x2A39, 0x2A39, 0x2A39, 0x2A39, 0x39392A, 0x44439, 0x44439, 
  0x4439, 0x39392A, 0x4439, 0x39392A, 0x4444, 0x2A4, 0x44, 0x439, 
  0x42A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 0x42C2C, 0x45959, 0x43B3B, 
  0x44A4A, 0x42C2C, 0x43B3B, 0x44A4A, 0x455, 0x43939, 0x42A2A, 0x43939, 
  0x444, 0x43939, 0x42A2A, 0x43939, 0x42A2A, 0x444, 0x43939, 0x42A2A, 
  0x42C2C2C, 0x4595959, 0x43B3B3B, 0x44A4A4A, 0x42C2C2C, 0x4595959, 0x43B3B3B, 0x44A4A4A, 
  0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 
  0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 
  0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 
  0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 
  0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 
  0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x42C2C, 0x45959, 0x43B3B, 0x44A4A, 
  0x42E2C0, 0x42E590, 0x42E3B0, 0x42E4A0, 0x393939, 0x393939, 0x444, 0x393939, 
  0x393939, 0x444, 0x444, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 
  0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 
  0x595959, 0x3B3B3B, 0x4A4A4A, 0x393939, 0x2A2A2A, 0x393939, 0x2A2A2A, 0x2A2A2A, 
  0x2A2A2A, 0x2C2C2C, 0x595959, 0x3B3B3B, 0x4A4A4A, 0x42C2C, 0x45959, 0x43B3B, 
  0x44A4A, 0x2C2C2C2C, 0x59595959, 0x3B3B3B3B, 0x4A4A4A4A, 0x440, 0x2C2C2C, 0x42C2C, 
  0x1F1F, 0x44, 0x55, 0x888, 0x777, 0x777, 0x888, 0x777, 
  0x777, 0x888, 0x777, 0x777, 0x888, 0x777, 0x777, 0x73F7, 
  0x43F4, 0x43F4, 0x0, 0x44, 0x44, 0x44, 0x85, 0x74, 
  0x47, 0x58, 0x44, 0x55, 0x88, 0x77, 0x77, 0x44, 
  0x54, 0x3F0, 0x3F0, 0x77, 0x77, 0x87, 0x87, 0x87, 
  0x87, 0x87, 0x87, 0x87, 0x87, 0x84, 0x84, 0x84, 
  0x84, 0x84, 0x84, 0x85, 0x85, 0x85, 0x85, 0x84, 
  0x84, 0x84, 0x84, 0x85, 0x85, 0x85, 0x85, 0x777, 
  0x777, 0x888, 0x777, 0x777, 0x888, 0x777, 0x777, 0x888, 
  0x777, 0x777, 0x888, 0x777, 0x777, 0x88, 0x77, 0x77, 
  0x73, 0x73, 0x74, 0x74, 0x74, 0x74, 0x74, 0x74, 
  0x74, 0x74, 0x75, 0x75, 0x75, 0x75, 0x75, 0x75, 
  0x75, 0x75, 0x74, 0x74, 0x74, 0x74, 0x74, 0x74, 
  0x74, 0x74, 0x75, 0x75, 0x75, 0x75, 0x75, 0x75, 
  0x75, 0x75, 0x88, 0x77, 0x77, 0x88, 0x77, 0x77, 
  0x8888, 0x7777, 0x7777, 0x8888, 0x7777, 0x7777, 0x8888, 0x7777, 
  0x7777, 0x8888, 0x7777, 0x7777, 0x888, 0x777, 0x777, 0x888, 
  0x777, 0x777, 0x37, 0x48, 0x48, 0x48, 0x48, 0x47, 
  0x47, 0x47, 0x47, 0x2E1, 0x2E1, 0x2E1, 0x2E1, 0x51, 
  0x51, 0x51, 0x7F1F, 0x7F0F, 0x7F3F, 0x7F1F, 0x7F0F, 0x7F3F, 
  0x88, 0x77, 0x77, 0x58, 0x58, 0x58, 0x58, 0x57, 
  0x57, 0x57, 0x57, 0x448, 0x444, 0x555, 0x444, 0x555, 
  0x0, 0x0, 0x0, 0x444, 0x555, 0x444, 0x555, 0x88, 
  0x77, 0x33, 0x44, 0x55, 0x7F3F, 0x444, 0x444, 0x888, 
  0x777, 0x777, 0x888, 0x777, 0x777, 0x888, 0x777, 0x777, 
  0x888, 0x777, 0x777, 0x444, 0x555, 0x444, 0x555, 0x44, 
  0x54, 0x4444, 0x7F3F, 0x7F3F, 0x7F3F, 0x7F3F, 0x7F3F, 0x7F3F, 
  0x7F3F, 0x7F3F, 0x7F3F, 0x88, 0x88, 0x77, 0x77, 0x88, 
  0x77, 0x77, 0x88, 0x77, 0x77, 0x88, 0x77, 0x77, 
  0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
  0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
  0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
  0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
  0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
  0x4, 0x4, 0x4, 0x4, 0x4, 0x3F4, 0x444, 0x455, 
  0x455, 0x88, 0x77, 0x77, 0x88, 0x77, 0x77, 0x4444, 
  0x4444, 0x88, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 
  0x77, 0x88, 0x77, 0x77, 0x88, 0x77, 0x77, 0x88, 
  0x77, 0x77, 0x88, 0x77, 0x77, 0x4453, 0x4453, 0x4453, 
  0x4454, 0x4454, 0x4454, 0x4455, 0x4455, 0x4455, 0x4453, 0x4453, 
  0x4453, (1U<<31) | 891, (1U<<31) | 891, (1U<<31) | 891, (1U<<31) | 907, (1U<<31) | 907, (1U<<31) | 907, (1U<<31) | 924, 
  (1U<<31) | 924, (1U<<31) | 924, (1U<<31) | 891, (1U<<31) | 891, (1U<<31) | 891, (1U<<31) | 882, (1U<<31) | 882, (1U<<31) | 882, 
  (1U<<31) | 898, (1U<<31) | 898, (1U<<31) | 898, (1U<<31) | 882, (1U<<31) | 882, (1U<<31) | 882, 0x453, 0x453, 
  0x453, 0x454, 0x454, 0x454, 0x455, 0x455, 0x455, 0x453, 
  0x453, 0x453, (1U<<31) | 987, (1U<<31) | 987, (1U<<31) | 987, (1U<<31) | 1001, (1U<<31) | 1001, (1U<<31) | 1001, 
  (1U<<31) | 1016, (1U<<31) | 1016, (1U<<31) | 1016, (1U<<31) | 987, (1U<<31) | 987, (1U<<31) | 987, (1U<<31) | 979, (1U<<31) | 979, 
  (1U<<31) | 979, (1U<<31) | 993, (1U<<31) | 993, (1U<<31) | 993, (1U<<31) | 979, (1U<<31) | 979, (1U<<31) | 979, 0x44453, 
  0x44453, 0x44453, 0x44454, 0x44454, 0x44454, 0x44455, 0x44455, 0x44455, 
  0x44453, 0x44453, 0x44453, (1U<<31) | 816, (1U<<31) | 816, (1U<<31) | 816, (1U<<31) | 834, (1U<<31) | 834, 
  (1U<<31) | 834, (1U<<31) | 853, (1U<<31) | 853, (1U<<31) | 853, (1U<<31) | 816, (1U<<31) | 816, (1U<<31) | 816, (1U<<31) | 806, 
  (1U<<31) | 806, (1U<<31) | 806, (1U<<31) | 824, (1U<<31) | 824, (1U<<31) | 824, (1U<<31) | 806, (1U<<31) | 806, (1U<<31) | 806, 
  0x4453, 0x4453, 0x4453, 0x4454, 0x4454, 0x4454, 0x4455, 0x4455, 
  0x4455, 0x4453, 0x4453, 0x4453, (1U<<31) | 891, (1U<<31) | 891, (1U<<31) | 891, (1U<<31) | 907, 
  (1U<<31) | 907, (1U<<31) | 907, (1U<<31) | 924, (1U<<31) | 924, (1U<<31) | 924, (1U<<31) | 891, (1U<<31) | 891, (1U<<31) | 891, 
  (1U<<31) | 882, (1U<<31) | 882, (1U<<31) | 882, (1U<<31) | 898, (1U<<31) | 898, (1U<<31) | 898, (1U<<31) | 882, (1U<<31) | 882, 
  (1U<<31) | 882, 0x44453, 0x44453, 0x44453, 0x44454, 0x44454, 0x44454, 0x44455, 
  0x44455, 0x44455, 0x44453, 0x44453, 0x44453, (1U<<31) | 816, (1U<<31) | 816, (1U<<31) | 816, 
  (1U<<31) | 834, (1U<<31) | 834, (1U<<31) | 834, (1U<<31) | 853, (1U<<31) | 853, (1U<<31) | 853, (1U<<31) | 816, (1U<<31) | 816, 
  (1U<<31) | 816, (1U<<31) | 806, (1U<<31) | 806, (1U<<31) | 806, (1U<<31) | 824, (1U<<31) | 824, (1U<<31) | 824, (1U<<31) | 806, 
  (1U<<31) | 806, (1U<<31) | 806, 0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 
  0x34450, 0x34450, 0x34450, 0x44450, 0x44450, 0x44450, 0x54450, 0x54450, 
  0x54450, 0x34450, 0x34450, 0x34450, 0x334450, 0x334450, 0x334450, 0x444450, 
  0x444450, 0x444450, 0x554450, 0x554450, 0x554450, 0x334450, 0x334450, 0x334450, 
  0x33334450, 0x33334450, 0x33334450, 0x44444450, 0x44444450, 0x44444450, 0x33334450, 0x33334450, 
  0x33334450, 0x3450, 0x3450, 0x3450, 0x4450, 0x4450, 0x4450, 0x5450, 
  0x5450, 0x5450, 0x3450, 0x3450, 0x3450, 0x33450, 0x33450, 0x33450, 
  0x44450, 0x44450, 0x44450, 0x55450, 0x55450, 0x55450, 0x33450, 0x33450, 
  0x33450, 0x3333450, 0x3333450, 0x3333450, 0x4444450, 0x4444450, 0x4444450, 0x3333450, 
  0x3333450, 0x3333450, 0x344450, 0x344450, 0x344450, 0x444450, 0x444450, 0x444450, 
  0x544450, 0x544450, 0x544450, 0x344450, 0x344450, 0x344450, 0x3344450, 0x3344450, 
  0x3344450, 0x4444450, 0x4444450, 0x4444450, 0x5544450, 0x5544450, 0x5544450, 0x3344450, 
  0x3344450, 0x3344450, (1U<<31) | 419, (1U<<31) | 419, (1U<<31) | 419, (1U<<31) | 789, (1U<<31) | 789, (1U<<31) | 789, 
  (1U<<31) | 419, (1U<<31) | 419, (1U<<31) | 419, 0x34450, 0x34450, 0x34450, 0x44450, 0x44450, 
  0x44450, 0x54450, 0x54450, 0x54450, 0x34450, 0x34450, 0x34450, 0x334450, 
  0x334450, 0x334450, 0x444450, 0x444450, 0x444450, 0x554450, 0x554450, 0x554450, 
  0x334450, 0x334450, 0x334450, 0x33334450, 0x33334450, 0x33334450, 0x44444450, 0x44444450, 
  0x44444450, 0x33334450, 0x33334450, 0x33334450, 0x344450, 0x344450, 0x344450, 0x444450, 
  0x444450, 0x444450, 0x544450, 0x544450, 0x544450, 0x344450, 0x344450, 0x344450, 
  0x3344450, 0x3344450, 0x3344450, 0x4444450, 0x4444450, 0x4444450, 0x5544450, 0x5544450, 
  0x5544450, 0x3344450, 0x3344450, 0x3344450, (1U<<31) | 419, (1U<<31) | 419, (1U<<31) | 419, (1U<<31) | 789, 
  (1U<<31) | 789, (1U<<31) | 789, (1U<<31) | 419, (1U<<31) | 419, (1U<<31) | 419, 0x34450, 0x44450, 0x34450, 
  0x334450, 0x444450, 0x334450, 0x33334450, 0x44444450, 0x33334450, 0x3450, 0x4450, 
  0x3450, 0x33450, 0x44450, 0x33450, 0x3333450, 0x4444450, 0x3333450, 0x344450, 
  0x444450, 0x344450, 0x3344450, 0x4444450, 0x3344450, (1U<<31) | 419, (1U<<31) | 789, (1U<<31) | 419, 
  0x34450, 0x44450, 0x34450, 0x334450, 0x444450, 0x334450, 0x33334450, 0x44444450, 
  0x33334450, 0x344450, 0x444450, 0x344450, 0x3344450, 0x4444450, 0x3344450, (1U<<31) | 419, 
  (1U<<31) | 789, (1U<<31) | 419, 0x55, (1U<<31) | 1286, (1U<<31) | 1274, (1U<<31) | 1274, (1U<<31) | 1204, (1U<<31) | 1193, 
  (1U<<31) | 1193, (1U<<31) | 1130, (1U<<31) | 931, (1U<<31) | 1120, (1U<<31) | 914, (1U<<31) | 1120, (1U<<31) | 914, (1U<<31) | 1330, 
  (1U<<31) | 1319, (1U<<31) | 1319, (1U<<31) | 1244, (1U<<31) | 1234, (1U<<31) | 1234, (1U<<31) | 1166, (1U<<31) | 1022, (1U<<31) | 1157, 
  (1U<<31) | 1007, (1U<<31) | 1157, (1U<<31) | 1007, (1U<<31) | 1476, (1U<<31) | 1461, (1U<<31) | 1461, (1U<<31) | 1286, (1U<<31) | 1274, 
  (1U<<31) | 1274, (1U<<31) | 1204, (1U<<31) | 861, (1U<<31) | 1193, (1U<<31) | 842, (1U<<31) | 1193, (1U<<31) | 842, (1U<<31) | 1532, 
  (1U<<31) | 1518, (1U<<31) | 1518, (1U<<31) | 1330, (1U<<31) | 1319, (1U<<31) | 1319, (1U<<31) | 1244, (1U<<31) | 931, (1U<<31) | 1234, 
  (1U<<31) | 914, (1U<<31) | 1234, (1U<<31) | 914, (1U<<31) | 1592, (1U<<31) | 1575, (1U<<31) | 1575, (1U<<31) | 1424, (1U<<31) | 1412, 
  (1U<<31) | 1412, (1U<<31) | 1330, (1U<<31) | 861, (1U<<31) | 1319, (1U<<31) | 842, (1U<<31) | 1319, (1U<<31) | 842, (1U<<31) | 1376, 
  (1U<<31) | 1363, (1U<<31) | 1363, (1U<<31) | 1286, (1U<<31) | 1274, (1U<<31) | 1274, (1U<<31) | 1424, (1U<<31) | 1412, (1U<<31) | 1412, 
  (1U<<31) | 1330, (1U<<31) | 1319, (1U<<31) | 1319, (1U<<31) | 1298, (1U<<31) | 1263, (1U<<31) | 1263, (1U<<31) | 1215, (1U<<31) | 1183, 
  (1U<<31) | 1183, (1U<<31) | 1140, (1U<<31) | 941, (1U<<31) | 1111, (1U<<31) | 898, (1U<<31) | 1111, (1U<<31) | 898, (1U<<31) | 1341, 
  (1U<<31) | 1309, (1U<<31) | 1309, (1U<<31) | 1254, (1U<<31) | 1225, (1U<<31) | 1225, (1U<<31) | 1175, (1U<<31) | 1031, (1U<<31) | 1149, 
  (1U<<31) | 993, (1U<<31) | 1149, (1U<<31) | 993, (1U<<31) | 1491, (1U<<31) | 1447, (1U<<31) | 1447, (1U<<31) | 1298, (1U<<31) | 1263, 
  (1U<<31) | 1263, (1U<<31) | 1215, (1U<<31) | 872, (1U<<31) | 1183, (1U<<31) | 824, (1U<<31) | 1183, (1U<<31) | 824, (1U<<31) | 1546, 
  (1U<<31) | 1505, (1U<<31) | 1505, (1U<<31) | 1341, (1U<<31) | 1309, (1U<<31) | 1309, (1U<<31) | 1254, (1U<<31) | 941, (1U<<31) | 1225, 
  (1U<<31) | 898, (1U<<31) | 1225, (1U<<31) | 898, (1U<<31) | 1609, (1U<<31) | 1559, (1U<<31) | 1559, (1U<<31) | 1436, (1U<<31) | 1401, 
  (1U<<31) | 1401, (1U<<31) | 1341, (1U<<31) | 872, (1U<<31) | 1309, (1U<<31) | 824, (1U<<31) | 1309, (1U<<31) | 824, (1U<<31) | 1389, 
  (1U<<31) | 1351, (1U<<31) | 1351, (1U<<31) | 1298, (1U<<31) | 1263, (1U<<31) | 1263, (1U<<31) | 1436, (1U<<31) | 1401, (1U<<31) | 1401, 
  (1U<<31) | 1341, (1U<<31) | 1309, (1U<<31) | 1309, (1U<<31) | 449, 0x3F5, (1U<<31) | 1244, (1U<<31) | 1234, (1U<<31) | 1234, 
  (1U<<31) | 1244, (1U<<31) | 1234, (1U<<31) | 1234, (1U<<31) | 1244, (1U<<31) | 1234, (1U<<31) | 1234, (1U<<31) | 1244, (1U<<31) | 1234, 
  (1U<<31) | 1234, (1U<<31) | 1254, (1U<<31) | 1225, (1U<<31) | 1225, (1U<<31) | 1254, (1U<<31) | 1225, (1U<<31) | 1225, (1U<<31) | 1254, 
  (1U<<31) | 1225, (1U<<31) | 1225, (1U<<31) | 1254, (1U<<31) | 1225, (1U<<31) | 1225, 0x88, 0x77, 0x77, 
  0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 
  0x48, 0x48, 0x48, 0x48, 0x47, 0x47, 0x47, 0x47, 
  0x58, 0x58, 0x58, 0x58, 0x57, 0x57, 0x57, 0x57, 
  0x17F0F, 0x40, 0x1F1F1F, 0x41F1F, 0x40, 0x0, 0x442E0, 0x442E0, 
  0x442E0, 0x442E0, 0x2E2C, 0x2E3B, 0x2E4A, 0x2E2C, 0x2E2C, 0x2E4A, 
  0x2E4A, 0x3B, 0x4A0, 0x2E2C0, 0x2E3B0, 0x2E4A0, 0x2E4A0, 0x2E4A0, 
  0x4A4A4A, 0x2C2C2C, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 
  0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x3B3B3B, 0x4A4A4A, 0x44A7A, 0x44A7A, 0x7A7A4A, 
  0x7A7A44, 0x7A7A4A, 0x7A7A44, 0x2C2C2C, 0x2C2C44, 0x3B3B3B, 0x3B3B44, 0x4A4A4A, 
  0x4A4A44, 0x7A7A4A, 0x7A7A44, 0x7A7A4A, 0x7A7A44, 0x2C2C2C, 0x2C2C44, 0x3B3B3B, 
  0x3B3B44, 0x4A4A4A, 0x4A4A44, 0x2C2C2C, 0x2C2C44, 0x3B3B3B, 0x3B3B44, 0x4A4A4A, 
  0x4A4A44, 0x47A4A, 0x47A4A, 0x7A7A, 0x7A7A, 0x7A7A7A7A, 0x7A7A7A, 0x2C2C2C, 
  0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x3B3B3B, 0x4A4A4A, 0x3B3B3B3B, 0x3B3B3B3B, 0x7A7A7A, 
  0x2C2C2C, 0x3B3B3B, 0x4A4A4A, 0x2C2C2C, 0x3B3B3B, 0x4A4A4A, 0x3B3B3B3B, 0x4A2C2C4A, 
  0x4A3B3B4A, 0x4A3B3B4A, 0x4A2C2C4A, 0x4A3B3B4A, 0x4A3B3B4A, 0x2C2C3B, 0x3B3B4A, 0x2C2C3B, 
  0x3B3B4A, 0x2C2C3B, 0x3B3B4A, 0x2C2C3B, 0x3B3B4A, 0x7A7A7A7A, 0x2C4A4A4A, 0x4A4A3B, 
  0x3B3B2C, 0x3B3B2C, 0x4A4A2C, 0x4A4A3B, 0x3B3B2C, 0x4A4A3B, 0x7A7A, 0x7A7A, 
  0x7A7A, 0x7A7A, 0x7A7A, 0x2C2C2C, 0x3B3B3B, 0x4A4A4A, 0x7A7A, 0x4A4A4A4A, 
  0x4A4A4A, 0x2C2C2C, 0x3B3B3B, 0x4A4A4A, 0x4A4A4A, 0x4A4A4A, 0x2C2C2C, 0x3B3B3B, 
  0x4A4A4A, 0x2C2C2C, 0x3B3B3B, 0x4A4A4A, 0x4A4A4A, 0x4A4A4A, 0x2C2C2C, 0x3B3B3B, 
  0x4A4A4A, 0x2C2C2C, 0x3B3B3B, 0x4A4A4A, 0x4A4A4A, 0x4A2C4A, 0x4A3B4A, 0x4A2C4A, 
  0x4A4A4A, 0x3B4A, 0x2C3B, 0x3B4A, 0x3B4A, 0x2C3B, 0x3B4A, 0x2E0, 
  0x2E0, 0x2E0, 0x2E0, 0x2E0, 0x2E0, 0x2E0, 0x2E0, 0x1, 
  0xF0, 0x0, 0x4442E0, (1U<<31) | 579, 0x40, 0x4, 0x5, 0x4, 
  0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
  0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
  0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
  0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
  0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
  0x4, 0x4, 0x4, 0x4, 0x4, (1U<<31) | 1809, 0x5, 0x42E, 
  0x1F1F, 0x1F1F, (1U<<31) | 0, 0x2E4, 0x42E0, 0x42E4, 0x1F1F, (1U<<31) | 0, 
  0x1F1F, (1U<<31) | 0, 0x2EE2E0, 0x2EE0, 0x2E0, 0x2E, 0x0, 0x1F1F, 
  (1U<<31) | 0, (1U<<31) | 0, (1U<<31) | 0, 0x2E2E0, 0x2E0, 0x42E2E2E0, 0x2E0, (1U<<31) | 9, 
  (1U<<31) | 1805, (1U<<31) | 1802, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, 
  (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1802, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1802, (1U<<31) | 1805, 
  (1U<<31) | 1805, (1U<<31) | 1802, (1U<<31) | 1805, (1U<<31) | 1802, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1802, (1U<<31) | 1802, 
  0x595959, 0x595959, 0x595959, 0x595959, 0x5959, 0x25959, (1U<<31) | 49, (1U<<31) | 85, 
  (1U<<31) | 233, (1U<<31) | 267, (1U<<31) | 165, (1U<<31) | 211, (1U<<31) | 97, (1U<<31) | 121, (1U<<31) | 61, (1U<<31) | 73, 
  (1U<<31) | 245, (1U<<31) | 279, (1U<<31) | 177, (1U<<31) | 189, (1U<<31) | 109, (1U<<31) | 133, 0x4A2E4A, 0x4B2E4B, 
  0x592E59, 0x5A2E5A, 0x4A4A2E0, 0x4B4B2E0, 0x59592E0, 0x5A5A2E0, 0x2E5A, 0x42D2D3C, 
  0x2D2D, 0x4B4B, 0x3C3C, 0x4B4B3C, 0x3C3C2D, 0x4B4B3C, 0x3C3C2D, 0x2D2D2D, 
  0x3C3C3C, 0x2D2D2D, 0x3C3C3C, 0x2D2D2D, 0x3C3C3C, 0x44A4A4A, 0x44B4B4B, 0x2D2D2D2D, 
  0x43C3C3C, 0x2C2C, 0x2C2D, 0x4A4A, 0x4A4B, 0x5959, 0x595A, 0x3B3B, 
  0x3B3C, 0x4B4B4B, 0x7B7B7B, 0x4B4B4B, 0x3C3C3C, 0x3C3C3C, 0x4B4B4B, 0x3C3C3C, 
  0x3C3C3C, 0x2D2D3C, 0x3C3C4B, 0x2D2D2D, 0x4B4B4B, 0x3C3C3C, 0x2D2D2D, 0x4B4B4B, 
  0x3C3C3C, 0x2D2D2D, 0x4B4B4B, 0x3C3C3C, 0x2D2D2D, 0x4B4B4B, 0x3C3C3C, 0x2D4, 
  0x2C4B, 0x2C5A, 0x2C3C, 0x4A5A, 0x3B4B, 0x3B5A, 0x2C4B, 0x2C5A, 
  0x2C3C, 0x4A5A, 0x3B4B, 0x3B5A, 0x4B4B5A, 0x3C3C3C, 0x3C3C3C, 0x3C3C3C, 
  0x4B4B5A, 0x2D2D5A, 0x2D2D2D, 0x2D2D2D, 0x4B4B4B, 0x3C3C3C, 0x4A4B4B, 0x45A5A, 
  0x45A5A, 0x595A5A, 0x3B3C3C, 0x44B4B, 0x45A5A, 0x43C3C, 0x4A4A4A, 0x4B4B4B, 
  0x595959, 0x5A5A5A, 0x4A4B4B, 0x3B3C3C, 0x44B4B, 0x43C3C, 0x4A4A4A, 0x4B4B4B, 
  0x4A4B4B, 0x45A5A, 0x45A5A, 0x595A5A, 0x3B3C3C, 0x44B4B, 0x45A5A, 0x43C3C, 
  0x4A4A4A, 0x4B4B4B, 0x595959, 0x5A5A5A, 0x2D2D2D, 0x3C3C3C, 0x2D2D2D, 0x3C3C3C, 
  0x898A, 0x7A7A, 0x7A7B, 0x2E5A, 0x25A59, 0x2595A5A, 0x25A5A5A, 0x894, 
  0x895, 0x7A4, 0x7A5, 0x894, 0x895, 0x7A4, 0x7A5, 0x48989, 
  0x47A7A, 0x58989, 0x57A7A, (1U<<31) | 471, (1U<<31) | 652, (1U<<31) | 460, (1U<<31) | 663, (1U<<31) | 515, 
  (1U<<31) | 482, (1U<<31) | 493, (1U<<31) | 504, 0x442E4B20, 0x442E4C30, 0x442E5B20, 0x442E5B20, 0x333, 
  0x333, 0x33, 0x333, 0x334, 0x334, 0x333, 0x333, 0x333, 
  0x34C4C4C, 0x28B8B8B, 0x37C7C7C, 0x25B5B5B, 0x4248B8B2, 0x4347C7C3, 0x34C4C4C, 0x25B5B5B, 
  0x28B4B8B, 0x437C4C7C, 0x424B8B4B, 0x427B8B7B, 0x424B8B4B, 0x434C7C4C, 0x434C7C4C, 0x424B8B4B, 
  0x424B8B4B, 0x434C7C4C, 0x434C7C4C, 0x28B4B8B, 0x437C4C7C, 0x34C2E4C, 0x28B2E8B, 0x37C2E7C, 
  0x25B2E5B, 0x34C4C4C, 0x25B5B5B, (1U<<31) | 558, (1U<<31) | 684, (1U<<31) | 558, (1U<<31) | 684, 0x34C4C4C, 
  0x25B5B5B, (1U<<31) | 429, (1U<<31) | 155, 0x34C44C, 0x25B55B, 0x25B55B, 0x34C4C3, 0x25B5B2, 
  (1U<<31) | 429, (1U<<31) | 155, (1U<<31) | 429, (1U<<31) | 155, (1U<<31) | 429, (1U<<31) | 155, (1U<<31) | 429, (1U<<31) | 155, 
  (1U<<31) | 145, (1U<<31) | 145, 0x34C4C3, 0x25B5B2, (1U<<31) | 548, (1U<<31) | 674, 0x34C2E0, 0x28B2E0, 
  0x37C2E0, 0x25B2E0, 0x437C3C7C, 0x33C47C3C, (1U<<31) | 429, (1U<<31) | 301, (1U<<31) | 439, (1U<<31) | 155, 
  0x2E5B, 0x4A4C, 0x44C, 0x595B, 0x55B, 0x2C4C, 0x2C5B, 0x4B5B, 
  0x3C4C, 0x3B5B, 0x45B5B, 0x45B5B, 0x45B5B, 0x45B5B, 0x28B8B8B, 0x37C7C7C, 
  (1U<<31) | 257, (1U<<31) | 201, 0x428B8B8B, 0x437C7C7C, (1U<<31) | 537, (1U<<31) | 526, 0x4898989, 0x47A7A7A, 
  0x28B8B8B, 0x37C7C7C, (1U<<31) | 257, (1U<<31) | 201, 0x428B8B8B, 0x437C7C7C, (1U<<31) | 537, (1U<<31) | 526, 
  (1U<<31) | 1083, (1U<<31) | 960, (1U<<31) | 1039, (1U<<31) | 1073, (1U<<31) | 1093, (1U<<31) | 950, (1U<<31) | 1049, (1U<<31) | 1063, 
  0x442E4B20, 0x442E4C30, 0x442E5B20, 0x442E5B20, 0x8B8B, 0x7C7C, 0x898989, 0x7A7A7A, 
  0x2E8B, 0x898B, 0x2E7C, 0x7A7C, 0x8A8A8A, 0x7B7B7B, 0x48A8A8A, 0x47B7B7B, 
  (1U<<31) | 1769, 0x7B7B7B7B, 0x28A8A8A, 0x27B7B7B, 0x8A7A, 0x8A4A, 0x7A8A, 0x7B4B, 
  0x4A8A, 0x4B7B, 0x8A4A, 0x7B4B, 0x47B7B7B, 0x8A8A8A, 0x7B7B7B, 0x8A8A8A, 
  0x7B7B7B, 0x2E2D, 0x892E89, 0x8A2E8A, 0x7A2E7A, 0x7B2E7B, 0x89892E0, 0x8A8A2E0, 
  0x7A7A2E0, 0x7B7B2E0, 0x8A8A8A, 0x7B7B7B, 0x8A8A8A, 0x7B7B7B, 0x8A4, 0x7B4, 
  0x5A5A4, 0x5A5A4, 0x5A5A4, 0x7B7B, 0x48A8A, 0x47B7B, 0x7B7B, 0x8A8A, 
  0x7B7B, 0x2D2E0, 0x8A2E0, 0x7B2E0, 0x2E8A, 0x2E7B, 0x28A89, 0x27B7A, 
  0x24B4A, 0x2898A8A, 0x27A7B7B, 0x24A4B4B, 0x28A8A8A, 0x27B7B7B, 0x24B4B4B, 0x598989, 
  0x5A8A8A, 0x4A7A7A, 0x4B7B7B, 0x89894, 0x8A8A4, 0x7A7A4, 0x7B7B4, 0x89894, 
  0x8A8A4, 0x7A7A4, 0x7B7B4, 0x89894, 0x8A8A4, 0x7A7A4, 0x7B7B4, 0x0, 
  0x0, 0x444, 0x555, 0x444, 0x555, 0x444, 0x555, 0x444, 
  0x555, (1U<<31) | 1756, (1U<<31) | 1769, (1U<<31) | 1778, 0x7A7A7A7A, 0x7B7B7B7B, 0x7C7C7C7C, (1U<<31) | 1756, 
  0x7A7A7A7A, (1U<<31) | 1756, (1U<<31) | 1769, (1U<<31) | 1778, 0x7A7A7A7A, 0x7B7B7B7B, 0x7C7C7C7C, (1U<<31) | 1756, 
  (1U<<31) | 1769, (1U<<31) | 1778, 0x7A7A7A7A, 0x7B7B7B7B, 0x7C7C7C7C, (1U<<31) | 1756, 0x7A7A7A7A, (1U<<31) | 1756, 
  (1U<<31) | 1769, (1U<<31) | 1778, 0x7A7A7A7A, 0x7B7B7B7B, 0x7C7C7C7C, (1U<<31) | 1756, (1U<<31) | 1769, (1U<<31) | 1778, 
  0x7A7A7A7A, 0x7B7B7B7B, 0x7C7C7C7C, (1U<<31) | 1756, 0x7A7A7A7A, (1U<<31) | 1756, (1U<<31) | 1769, (1U<<31) | 1778, 
  0x7A7A7A7A, 0x7B7B7B7B, 0x7C7C7C7C, (1U<<31) | 1756, 0x7A7A7A7A, 0x20, 0x0, 0x0, 
  (1U<<31) | 345, (1U<<31) | 1800, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, 
  (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 390, (1U<<31) | 1805, (1U<<31) | 1805, 
  (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, 
  (1U<<31) | 1103, (1U<<31) | 970, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1787, 
  (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, 
  (1U<<31) | 1805, (1U<<31) | 1107, (1U<<31) | 1107, (1U<<31) | 1107, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1107, (1U<<31) | 1107, 
  (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1107, (1U<<31) | 1107, (1U<<31) | 1107, (1U<<31) | 1805, (1U<<31) | 1805, 
  (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, 
  (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, (1U<<31) | 1805, 0x2595959, 0x4, 0x5, 
  0x4, 0x5, 0x45, (1U<<31) | 695, (1U<<31) | 975, (1U<<31) | 1059, (1U<<31) | 695, (1U<<31) | 975, 
  (1U<<31) | 1059, 0x5, 0x2E5, 0x4A4A4A, 0x4A4A4A, 0x4A4A4A, 0x24A4A4A, 0x4A4A4A, 
  0x4A4A4A, 0x4A4A4A4A, 0x898989, 0x2E0, 0x2898989, 0x2898989, 0x89894, 0x89894, 
  0x89894, 0x89894, 0x89894, 0x89894, 0x4A89, 0x4A7A, 0x894A, 0x897A, 
  0x7A4A, 0x7A89, 0x894, 0x895, 0x897A7A, 0x48989, 0x58989, 0x7A8989, 
  0x894A, 0x7A4A, 0x894, 0x895, 0x898989, 0x0, 0x2E2C2C0, 0x898989, 
  0x898989, 0x0, 0x898989, 0x898989, 0x894, 0x898989, 0x4A4A3B, 0x3B3B2C, 
  0x3B3B2C, 0x2C2C2C, 0x3B3B3B, 0x2C2C2C, 0x3B3B3B, 0x0, 0x2C2C2C, 0x3B3B3B, 
  0x3B3B4A, 0x3B3B3B, 0x2C2C2C, 0x3B3B3B, 0x2C2C2C, 0x2C4, 0x3B3B3B, 0x3B3B3B, 
  0x4A4A59, 0x2C2C59, 0x24A4A, 0x23B3B, 0x23B3B, 0x4A4A4A, 0x45959, 0x45959, 
  0x595959, 0x3B3B3B, 0x44A4A, 0x45959, 0x43B3B, 0x4A4A4A, 0x3B3B3B, 0x44A4A, 
  0x43B3B, 0x4A4A4A, 0x45959, 0x45959, 0x595959, 0x3B3B3B, 0x44A4A, 0x45959, 
  0x43B3B, 0x2C2C2C, 0x3B3B3B, 0x2C2C2C, 0x3B3B3B, 0x8989, 0x8989, 0x4A2E0, 
  0x2C2E0, 0x892E0, 0x898989, 0x89894, 0x89894, 0x89894, 0x89894, 0x89894, 
  0x89894, 0x898989, 0x7A7A7A, 0x898989, 0x7A7A7A, 0x898989, 0x7A7A7A, 0x2E2C, 
  0x442E0, 0x440, 0x4898989, 0x47A7A7A, (1U<<31) | 1756, 0x7A7A7A7A, 0x4898989, 0x47A7A7A, 
  0x47A4, 0x47A7A7A, 0x2E59, 0x42C2C3B, 0x4A4A3B, 0x2C2C2C2C, 0x43B3B3B, 0x42C4, 
  0x44A4, 0x4595, 0x3B3B, 0x2C2C2C, 0x4A4A4A, 0x4A4A4A, 0x3B3B3B, 0x2C2C2C, 
  0x4A4A4A, 0x4A4A4A, 0x3B3B3B, 0x2C4A, 0x2C59, 0x2C3B, 0x4A59, 0x3B4A, 
  0x3B59, 0x2C4A, 0x2C59, 0x2C3B, 0x4A59, 0x3B4A, 0x3B59, 0x4A4A59, 
  0x59594, 0x59594, 0x59594, 0x48989, 0x47A7A, 0x4898989, 0x47A7A7A, 0x344, 
  0x444, 0x244, 0x555, 0x242C42C4, 0x242C42C4, 0x242C42C4, 0x242C42C4, 0x242C42C4, 
  0x242C42C4, (1U<<31) | 39, 0x22C2C4, 0x22C2C4, 0x22C2C4, 0x22C2C4, 0x22C2C4, 0x22C2C4, 
  0x22C2C2C, 0x2C5959, 0x225959, 0x595959, 0x22595959, 0x892E0, 0x7A2E0, 0x7A7A7A, 
  0x27A7A7A, 0x27A7A7A, 0x7A7A4, 0x7A7A4, 0x7A7A4, 0x7A7A4, 0x7A7A4, 0x7A7A4, 
  (1U<<31) | 1765, (1U<<31) | 1796, (1U<<31) | 1790, (1U<<31) | 1625, 0x47A7A, 0x57A7A, 0x7A4, 0x7A5, 
  (1U<<31) | 1765, (1U<<31) | 1625, 0x7A4, 0x7A5, 0x7A7A7A, 0x2E0, 0x7A7A7A, 0x7A7A7A, 
  0x7A7A7A, 0x7A7A7A, 0x7A4, 0x7A7A7A, (1U<<31) | 391, 0x7A7A, 0x7A7A, 0x7A7A, 
  0x7A7A, 0x0, 0x7A7A, 0x7A7A, 0x2E0, 0x7A2E0, 0x7A7A7A, 0x7A7A4, 
  0x7A7A4, 0x7A7A4, 0x7A7A4, 0x7A7A4, 0x7A7A4, (1U<<31) | 1802, 0x2C2C, (1U<<31) | 1802, 
  0x4A4A, (1U<<31) | 1802, 0x3B3B, (1U<<31) | 1805, 0x4A4A4A, (1U<<31) | 1805, 0x3B3B3B, (1U<<31) | 1805, 
  0x3B3B3B, (1U<<31) | 1805, 0x4A4A4A, (1U<<31) | 1805, 0x3B3B3B, (1U<<31) | 1805, 0x3B3B3B, (1U<<31) | 1805, 
  0x2C2C3B, (1U<<31) | 1805, 0x3B3B3B, (1U<<31) | 1805, 0x2C2C2C, (1U<<31) | 1805, 0x2C2C2C, (1U<<31) | 1805, 
  0x4A4A4A, (1U<<31) | 1805, 0x3B3B3B, 0x444, 0x555, 0x3B7A, 0x3B7B, 0x47A3B, 
  0x47B3B, 0x40, 0x50, 0x40, 0x50, 0x20, 0x4, 0x0, 
  0x8989, 0x8A8A, 0x7A7A, 0x7B7B, 0x8989, 0x7A7A, 0x59595959, 0x5A5A5A5A, 
  0x22C2C2C, 0x24A4A4A, 0x2595959, 0x22C2C2C, 0x24A4A4A, 0x2595959, 0x23B3B3B, 0x23B3B3B, 
  (1U<<31) | 257, (1U<<31) | 291, (1U<<31) | 201, (1U<<31) | 223, 0x2C4A, 0x2C59, 0x2C3B, 0x4A59, 
  0x2C4A, 0x2C59, 0x2C3B, 0x4A59, 0x3B4A, 0x3B59, 0x3B4A, 0x3B59, 
  0x2C3B, 0x4A59, 0x3B4A, 0x4A4A4A4A, 0x594A4A59, 0x594A4A59, 0x4A4A4A4A, 0x594A4A59, 
  0x594A4A59, 0x4A3B3B4A, 0x3B3B3B3B, 0x4A3B3B4A, 0x3B3B3B3B, 0x4A3B3B4A, 0x4A3B3B4A, 0x2C2C2C2C, 
  0x2C2C2C, 0x22C2C, 0x4A4A4A, 0x24A4A, 0x595959, 0x25959, 0x3B3B3B, 0x23B3B, 
  0x2C2C2C, 0x4A4A4A, 0x595959, 0x3B3B3B, 0x2C2C2C, 0x4A4A4A, 0x595959, 0x3B3B3B, 
  0x4, 0x44, 0x2E2E, 0x43F0, 0x0, 0x3F0, 0x40, 0x4444, 
  (1U<<31) | 799, 0x3F0, 0x3F0, 0x3F4, 0x3F0, 0x4, 0x4, 0x4, 
  0x44, 0x43F, 0x7F3F, 0x3F4, 0x3F4, 0x3F4, 0x2E3F0, 0x2E3F0, 
  0x2E3F0, 0x2E3F0, 0x2E3F0, 0x43F4, 0x3F4, 0x3F0, 0x3F0, 0x43F0, 
  0x43F0, 0x43F4, 0x43F0, 0x3F4, 0x43F0, 0x7F3F0, 0x43F0, 0x2E3F0, 
  0x440, 0x43F0, 0x43F0, 0x7F3F0, 0x40, 0x43F0, 0x2E3F0, 0x444, 
  0x0, 0x3F0, 0x3F4, 0x3F4, 0x2E, 0x444, 0
};

static const unsigned char IIT_LongEncodingTable[] = {
  /* 0 */ 19, 15, 0, 1, 15, 0, 15, 0, 0,
  /* 9 */ 0, 17, 15, 0, 0,
  /* 14 */ 15, 0, 23, 0, 0,
  /* 19 */ 19, 15, 1, 1, 15, 1, 15, 1, 1, 0,
  /* 29 */ 0, 15, 3, 15, 7, 15, 8, 4, 1, 0,
  /* 39 */ 12, 2, 12, 2, 4, 12, 2, 4, 2, 0,
  /* 49 */ 10, 4, 10, 4, 14, 2, 10, 4, 10, 4, 2, 0,
  /* 61 */ 10, 4, 10, 4, 14, 2, 9, 5, 10, 4, 2, 0,
  /* 73 */ 10, 4, 10, 4, 14, 2, 10, 5, 10, 4, 2, 0,
  /* 85 */ 11, 4, 11, 4, 14, 2, 11, 4, 11, 4, 2, 0,
  /* 97 */ 9, 5, 9, 5, 14, 2, 10, 4, 9, 5, 2, 0,
  /* 109 */ 9, 5, 9, 5, 14, 2, 9, 5, 9, 5, 2, 0,
  /* 121 */ 10, 5, 10, 5, 14, 2, 10, 4, 10, 5, 2, 0,
  /* 133 */ 10, 5, 10, 5, 14, 2, 10, 5, 10, 5, 2, 0,
  /* 145 */ 11, 5, 12, 4, 12, 4, 11, 5, 2, 0,
  /* 155 */ 11, 5, 11, 5, 11, 5, 11, 5, 2, 0,
  /* 165 */ 10, 7, 10, 7, 14, 2, 10, 4, 10, 7, 2, 0,
  /* 177 */ 10, 7, 10, 7, 14, 2, 9, 5, 10, 7, 2, 0,
  /* 189 */ 10, 7, 10, 7, 14, 2, 10, 5, 10, 7, 2, 0,
  /* 201 */ 10, 7, 10, 7, 10, 7, 10, 7, 2, 0,
  /* 211 */ 11, 7, 11, 7, 14, 2, 11, 4, 11, 7, 2, 0,
  /* 223 */ 11, 7, 11, 7, 11, 7, 11, 7, 2, 0,
  /* 233 */ 9, 8, 9, 8, 14, 2, 10, 4, 9, 8, 2, 0,
  /* 245 */ 9, 8, 9, 8, 14, 2, 9, 5, 9, 8, 2, 0,
  /* 257 */ 9, 8, 9, 8, 9, 8, 9, 8, 2, 0,
  /* 267 */ 10, 8, 10, 8, 14, 2, 10, 4, 10, 8, 2, 0,
  /* 279 */ 10, 8, 10, 8, 14, 2, 10, 5, 10, 8, 2, 0,
  /* 291 */ 10, 8, 10, 8, 10, 8, 10, 8, 2, 0,
  /* 301 */ 11, 8, 11, 5, 11, 8, 11, 8, 2, 0,
  /* 311 */ 11, 2, 11, 2, 11, 2, 11, 2, 11, 2, 11, 2, 11, 2, 0,
  /* 326 */ 19, 4, 4, 14, 2, 0,
  /* 332 */ 19, 5, 5, 14, 2, 0,
  /* 338 */ 0, 14, 18, 5, 14, 2, 0,
  /* 345 */ 0, 16, 16, 14, 2, 0,
  /* 351 */ 15, 2, 15, 2, 12, 2, 12, 2, 12, 2, 12, 2, 15, 2, 0,
  /* 366 */ 15, 2, 15, 2, 12, 2, 12, 2, 12, 2, 15, 2, 0,
  /* 379 */ 15, 2, 15, 2, 12, 2, 12, 2, 15, 2, 0,
  /* 390 */ 16, 16, 16, 2, 0,
  /* 395 */ 15, 2, 23, 2, 0,
  /* 400 */ 15, 2, 23, 2, 23, 2, 0,
  /* 407 */ 15, 2, 24, 2, 0,
  /* 412 */ 15, 2, 24, 2, 24, 2, 0,
  /* 419 */ 0, 5, 4, 4, 4, 3, 3, 3, 3, 0,
  /* 429 */ 12, 4, 12, 4, 12, 4, 12, 4, 3, 0,
  /* 439 */ 12, 7, 12, 4, 12, 7, 12, 7, 3, 0,
  /* 449 */ 5, 17, 15, 3, 0,
  /* 454 */ 15, 0, 23, 0, 4, 0,
  /* 460 */ 11, 5, 11, 5, 14, 2, 11, 4, 2, 4, 0,
  /* 471 */ 11, 8, 11, 8, 14, 2, 11, 4, 2, 4, 0,
  /* 482 */ 11, 4, 11, 4, 14, 2, 11, 5, 2, 4, 0,
  /* 493 */ 11, 5, 11, 5, 14, 2, 11, 5, 2, 4, 0,
  /* 504 */ 11, 7, 11, 7, 14, 2, 11, 5, 2, 4, 0,
  /* 515 */ 11, 8, 11, 8, 14, 2, 11, 5, 2, 4, 0,
  /* 526 */ 10, 7, 10, 7, 10, 7, 10, 7, 2, 4, 0,
  /* 537 */ 9, 8, 9, 8, 9, 8, 9, 8, 2, 4, 0,
  /* 548 */ 11, 8, 11, 8, 4, 11, 8, 2, 4, 0,
  /* 558 */ 11, 8, 11, 8, 11, 8, 11, 8, 2, 4, 0,
  /* 569 */ 15, 0, 15, 0, 14, 2, 14, 2, 4, 0,
  /* 579 */ 15, 3, 15, 3, 14, 2, 14, 2, 4, 0,
  /* 589 */ 21, 15, 2, 15, 2, 15, 2, 15, 2, 14, 2, 4, 0,
  /* 602 */ 20, 15, 2, 15, 2, 15, 2, 14, 2, 4, 0,
  /* 613 */ 19, 15, 2, 15, 2, 14, 2, 4, 0,
  /* 622 */ 0, 14, 2, 15, 2, 15, 2, 15, 2, 4, 0,
  /* 633 */ 0, 14, 2, 15, 2, 15, 2, 15, 2, 15, 2, 4, 0,
  /* 646 */ 15, 2, 24, 2, 4, 0,
  /* 652 */ 12, 4, 12, 4, 14, 2, 12, 4, 3, 4, 0,
  /* 663 */ 12, 7, 12, 7, 14, 2, 12, 4, 3, 4, 0,
  /* 674 */ 12, 7, 12, 7, 4, 12, 7, 3, 4, 0,
  /* 684 */ 12, 7, 12, 7, 12, 7, 12, 7, 3, 4, 0,
  /* 695 */ 19, 3, 4, 0,
  /* 699 */ 0, 14, 2, 15, 2, 15, 2, 4, 4, 0,
  /* 709 */ 19, 15, 2, 15, 2, 14, 2, 15, 2, 15, 2, 4, 4, 0,
  /* 723 */ 0, 14, 2, 15, 2, 15, 2, 15, 2, 4, 4, 0,
  /* 735 */ 20, 15, 2, 15, 2, 15, 2, 14, 2, 15, 2, 15, 2, 15, 2, 4, 4, 0,
  /* 753 */ 0, 14, 2, 15, 2, 15, 2, 15, 2, 15, 2, 4, 4, 0,
  /* 767 */ 21, 15, 2, 15, 2, 15, 2, 15, 2, 14, 2, 15, 2, 15, 2, 15, 2, 15, 2, 4, 4, 0,
  /* 789 */ 0, 5, 4, 4, 4, 4, 4, 4, 4, 0,
  /* 799 */ 19, 4, 4, 4, 4, 4, 0,
  /* 806 */ 21, 3, 3, 3, 3, 5, 4, 4, 4, 0,
  /* 816 */ 19, 3, 3, 5, 4, 4, 4, 0,
  /* 824 */ 21, 4, 4, 4, 4, 5, 4, 4, 4, 0,
  /* 834 */ 19, 4, 4, 5, 4, 4, 4, 0,
  /* 842 */ 21, 4, 4, 4, 4, 5, 5, 4, 4, 4, 0,
  /* 853 */ 19, 5, 5, 5, 4, 4, 4, 0,
  /* 861 */ 21, 7, 7, 7, 7, 5, 5, 4, 4, 4, 0,
  /* 872 */ 21, 7, 7, 7, 7, 5, 4, 4, 4, 0,
  /* 882 */ 21, 3, 3, 3, 3, 5, 4, 4, 0,
  /* 891 */ 19, 3, 3, 5, 4, 4, 0,
  /* 898 */ 21, 4, 4, 4, 4, 5, 4, 4, 0,
  /* 907 */ 19, 4, 4, 5, 4, 4, 0,
  /* 914 */ 21, 4, 4, 4, 4, 5, 5, 4, 4, 0,
  /* 924 */ 19, 5, 5, 5, 4, 4, 0,
  /* 931 */ 21, 7, 7, 7, 7, 5, 5, 4, 4, 0,
  /* 941 */ 21, 7, 7, 7, 7, 5, 4, 4, 0,
  /* 950 */ 0, 14, 2, 2, 11, 5, 11, 4, 4, 0,
  /* 960 */ 0, 14, 2, 3, 12, 4, 12, 4, 4, 0,
  /* 970 */ 16, 16, 4, 4, 0,
  /* 975 */ 19, 4, 4, 0,
  /* 979 */ 21, 3, 3, 3, 3, 5, 4, 0,
  /* 987 */ 19, 3, 3, 5, 4, 0,
  /* 993 */ 21, 4, 4, 4, 4, 5, 4, 0,
  /* 1001 */ 19, 4, 4, 5, 4, 0,
  /* 1007 */ 21, 4, 4, 4, 4, 5, 5, 4, 0,
  /* 1016 */ 19, 5, 5, 5, 4, 0,
  /* 1022 */ 21, 7, 7, 7, 7, 5, 5, 4, 0,
  /* 1031 */ 21, 7, 7, 7, 7, 5, 4, 0,
  /* 1039 */ 0, 14, 2, 2, 11, 4, 11, 5, 4, 0,
  /* 1049 */ 0, 14, 2, 2, 11, 5, 11, 5, 4, 0,
  /* 1059 */ 19, 5, 4, 0,
  /* 1063 */ 0, 14, 2, 2, 11, 5, 11, 7, 4, 0,
  /* 1073 */ 0, 14, 2, 3, 12, 4, 12, 7, 4, 0,
  /* 1083 */ 0, 14, 2, 2, 11, 4, 11, 8, 4, 0,
  /* 1093 */ 0, 14, 2, 2, 11, 5, 11, 8, 4, 0,
  /* 1103 */ 4, 16, 4, 0,
  /* 1107 */ 16, 16, 4, 0,
  /* 1111 */ 21, 4, 4, 4, 4, 5, 4, 7, 0,
  /* 1120 */ 21, 4, 4, 4, 4, 5, 5, 4, 7, 0,
  /* 1130 */ 21, 7, 7, 7, 7, 5, 5, 4, 7, 0,
  /* 1140 */ 21, 7, 7, 7, 7, 5, 4, 7, 0,
  /* 1149 */ 21, 4, 4, 4, 4, 5, 7, 0,
  /* 1157 */ 21, 4, 4, 4, 4, 5, 5, 7, 0,
  /* 1166 */ 21, 7, 7, 7, 7, 5, 5, 7, 0,
  /* 1175 */ 21, 7, 7, 7, 7, 5, 7, 0,
  /* 1183 */ 21, 4, 4, 4, 4, 5, 4, 7, 7, 0,
  /* 1193 */ 21, 4, 4, 4, 4, 5, 5, 4, 7, 7, 0,
  /* 1204 */ 21, 7, 7, 7, 7, 5, 5, 4, 7, 7, 0,
  /* 1215 */ 21, 7, 7, 7, 7, 5, 4, 7, 7, 0,
  /* 1225 */ 21, 4, 4, 4, 4, 5, 7, 7, 0,
  /* 1234 */ 21, 4, 4, 4, 4, 5, 5, 7, 7, 0,
  /* 1244 */ 21, 7, 7, 7, 7, 5, 5, 7, 7, 0,
  /* 1254 */ 21, 7, 7, 7, 7, 5, 7, 7, 0,
  /* 1263 */ 21, 4, 4, 4, 4, 5, 4, 7, 7, 7, 0,
  /* 1274 */ 21, 4, 4, 4, 4, 5, 5, 4, 7, 7, 7, 0,
  /* 1286 */ 21, 7, 7, 7, 7, 5, 5, 4, 7, 7, 7, 0,
  /* 1298 */ 21, 7, 7, 7, 7, 5, 4, 7, 7, 7, 0,
  /* 1309 */ 21, 4, 4, 4, 4, 5, 7, 7, 7, 0,
  /* 1319 */ 21, 4, 4, 4, 4, 5, 5, 7, 7, 7, 0,
  /* 1330 */ 21, 7, 7, 7, 7, 5, 5, 7, 7, 7, 0,
  /* 1341 */ 21, 7, 7, 7, 7, 5, 7, 7, 7, 0,
  /* 1351 */ 21, 4, 4, 4, 4, 5, 4, 7, 7, 7, 7, 0,
  /* 1363 */ 21, 4, 4, 4, 4, 5, 5, 4, 7, 7, 7, 7, 0,
  /* 1376 */ 21, 7, 7, 7, 7, 5, 5, 4, 7, 7, 7, 7, 0,
  /* 1389 */ 21, 7, 7, 7, 7, 5, 4, 7, 7, 7, 7, 0,
  /* 1401 */ 21, 4, 4, 4, 4, 5, 7, 7, 7, 7, 0,
  /* 1412 */ 21, 4, 4, 4, 4, 5, 5, 7, 7, 7, 7, 0,
  /* 1424 */ 21, 7, 7, 7, 7, 5, 5, 7, 7, 7, 7, 0,
  /* 1436 */ 21, 7, 7, 7, 7, 5, 7, 7, 7, 7, 0,
  /* 1447 */ 21, 4, 4, 4, 4, 5, 4, 7, 7, 7, 7, 7, 7, 0,
  /* 1461 */ 21, 4, 4, 4, 4, 5, 5, 4, 7, 7, 7, 7, 7, 7, 0,
  /* 1476 */ 21, 7, 7, 7, 7, 5, 5, 4, 7, 7, 7, 7, 7, 7, 0,
  /* 1491 */ 21, 7, 7, 7, 7, 5, 4, 7, 7, 7, 7, 7, 7, 0,
  /* 1505 */ 21, 4, 4, 4, 4, 5, 7, 7, 7, 7, 7, 7, 0,
  /* 1518 */ 21, 4, 4, 4, 4, 5, 5, 7, 7, 7, 7, 7, 7, 0,
  /* 1532 */ 21, 7, 7, 7, 7, 5, 5, 7, 7, 7, 7, 7, 7, 0,
  /* 1546 */ 21, 7, 7, 7, 7, 5, 7, 7, 7, 7, 7, 7, 0,
  /* 1559 */ 21, 4, 4, 4, 4, 5, 7, 7, 7, 7, 7, 7, 7, 7, 7, 0,
  /* 1575 */ 21, 4, 4, 4, 4, 5, 5, 7, 7, 7, 7, 7, 7, 7, 7, 7, 0,
  /* 1592 */ 21, 7, 7, 7, 7, 5, 5, 7, 7, 7, 7, 7, 7, 7, 7, 7, 0,
  /* 1609 */ 21, 7, 7, 7, 7, 5, 7, 7, 7, 7, 7, 7, 7, 7, 7, 0,
  /* 1625 */ 16, 10, 7, 0,
  /* 1629 */ 0, 15, 2, 15, 2, 15, 2, 15, 7, 0,
  /* 1639 */ 0, 15, 2, 15, 2, 15, 2, 15, 2, 15, 7, 0,
  /* 1651 */ 21, 15, 2, 15, 2, 15, 2, 15, 2, 15, 7, 0,
  /* 1663 */ 20, 15, 2, 15, 2, 15, 2, 15, 7, 0,
  /* 1673 */ 19, 15, 2, 15, 2, 15, 7, 0,
  /* 1681 */ 0, 15, 2, 15, 2, 15, 2, 5, 15, 7, 0,
  /* 1692 */ 0, 15, 2, 15, 2, 15, 2, 15, 2, 5, 15, 7, 0,
  /* 1705 */ 21, 15, 2, 15, 2, 15, 2, 15, 2, 15, 2, 15, 2, 15, 2, 15, 2, 5, 15, 7, 0,
  /* 1726 */ 20, 15, 2, 15, 2, 15, 2, 15, 2, 15, 2, 15, 2, 5, 15, 7, 0,
  /* 1743 */ 19, 15, 2, 15, 2, 15, 2, 15, 2, 5, 15, 7, 0,
  /* 1756 */ 9, 8, 9, 8, 9, 8, 9, 8, 0,
  /* 1765 */ 16, 9, 8, 0,
  /* 1769 */ 10, 8, 10, 8, 10, 8, 10, 8, 0,
  /* 1778 */ 11, 8, 11, 8, 11, 8, 11, 8, 0,
  /* 1787 */ 4, 16, 0,
  /* 1790 */ 10, 7, 10, 7, 16, 0,
  /* 1796 */ 9, 8, 16, 0,
  /* 1800 */ 0, 14, 16, 16, 0,
  /* 1805 */ 16, 16, 16, 0,
  /* 1809 */ 15, 0, 17, 0,
  /* 1813 */ 0, 17, 5, 17, 0,
  /* 1818 */ 0, 17, 17, 0,
  /* 1822 */ 0, 5, 4, 14, 2, 4, 27, 0,
  /* 1830 */ 5, 5, 4, 14, 2, 4, 27, 0,
  /* 1838 */ 0, 5, 4, 27, 0,
  255
};

#endif

// Add parameter attributes that are not common to all intrinsics.
#ifdef GET_INTRINSIC_ATTRIBUTES
AttributeSet Intrinsic::getAttributes(LLVMContext &C, ID id) {
  static const uint8_t IntrinsicsToAttributesMap[] = {
    1, // llvm.AMDGPU.div.fixup
    1, // llvm.AMDGPU.div.fmas
    1, // llvm.AMDGPU.div.scale
    1, // llvm.AMDGPU.rcp
    1, // llvm.AMDGPU.rsq
    1, // llvm.AMDGPU.rsq.clamped
    1, // llvm.AMDGPU.trig.preop
    2, // llvm.aarch64.clrex
    1, // llvm.aarch64.crc32b
    1, // llvm.aarch64.crc32cb
    1, // llvm.aarch64.crc32ch
    1, // llvm.aarch64.crc32cw
    1, // llvm.aarch64.crc32cx
    1, // llvm.aarch64.crc32h
    1, // llvm.aarch64.crc32w
    1, // llvm.aarch64.crc32x
    1, // llvm.aarch64.crypto.aesd
    1, // llvm.aarch64.crypto.aese
    1, // llvm.aarch64.crypto.aesimc
    1, // llvm.aarch64.crypto.aesmc
    1, // llvm.aarch64.crypto.sha1c
    1, // llvm.aarch64.crypto.sha1h
    1, // llvm.aarch64.crypto.sha1m
    1, // llvm.aarch64.crypto.sha1p
    1, // llvm.aarch64.crypto.sha1su0
    1, // llvm.aarch64.crypto.sha1su1
    1, // llvm.aarch64.crypto.sha256h
    1, // llvm.aarch64.crypto.sha256h2
    1, // llvm.aarch64.crypto.sha256su0
    1, // llvm.aarch64.crypto.sha256su1
    2, // llvm.aarch64.dmb
    2, // llvm.aarch64.dsb
    2, // llvm.aarch64.hint
    2, // llvm.aarch64.isb
    2, // llvm.aarch64.ldaxp
    2, // llvm.aarch64.ldaxr
    2, // llvm.aarch64.ldxp
    2, // llvm.aarch64.ldxr
    1, // llvm.aarch64.neon.abs
    1, // llvm.aarch64.neon.addhn
    1, // llvm.aarch64.neon.addp
    1, // llvm.aarch64.neon.cls
    1, // llvm.aarch64.neon.fabd
    1, // llvm.aarch64.neon.facge
    1, // llvm.aarch64.neon.facgt
    1, // llvm.aarch64.neon.faddv
    1, // llvm.aarch64.neon.fcvtas
    1, // llvm.aarch64.neon.fcvtau
    1, // llvm.aarch64.neon.fcvtms
    1, // llvm.aarch64.neon.fcvtmu
    1, // llvm.aarch64.neon.fcvtns
    1, // llvm.aarch64.neon.fcvtnu
    1, // llvm.aarch64.neon.fcvtps
    1, // llvm.aarch64.neon.fcvtpu
    1, // llvm.aarch64.neon.fcvtxn
    1, // llvm.aarch64.neon.fcvtzs
    1, // llvm.aarch64.neon.fcvtzu
    1, // llvm.aarch64.neon.fmax
    1, // llvm.aarch64.neon.fmaxnm
    1, // llvm.aarch64.neon.fmaxnmp
    1, // llvm.aarch64.neon.fmaxnmv
    1, // llvm.aarch64.neon.fmaxp
    1, // llvm.aarch64.neon.fmaxv
    1, // llvm.aarch64.neon.fmin
    1, // llvm.aarch64.neon.fminnm
    1, // llvm.aarch64.neon.fminnmp
    1, // llvm.aarch64.neon.fminnmv
    1, // llvm.aarch64.neon.fminp
    1, // llvm.aarch64.neon.fminv
    1, // llvm.aarch64.neon.fmulx
    1, // llvm.aarch64.neon.frecpe
    1, // llvm.aarch64.neon.frecps
    1, // llvm.aarch64.neon.frecpx
    1, // llvm.aarch64.neon.frintn
    1, // llvm.aarch64.neon.frsqrte
    1, // llvm.aarch64.neon.frsqrts
    3, // llvm.aarch64.neon.ld1x2
    3, // llvm.aarch64.neon.ld1x3
    3, // llvm.aarch64.neon.ld1x4
    3, // llvm.aarch64.neon.ld2
    3, // llvm.aarch64.neon.ld2lane
    3, // llvm.aarch64.neon.ld2r
    3, // llvm.aarch64.neon.ld3
    3, // llvm.aarch64.neon.ld3lane
    3, // llvm.aarch64.neon.ld3r
    3, // llvm.aarch64.neon.ld4
    3, // llvm.aarch64.neon.ld4lane
    3, // llvm.aarch64.neon.ld4r
    1, // llvm.aarch64.neon.pmul
    1, // llvm.aarch64.neon.pmull
    1, // llvm.aarch64.neon.pmull64
    1, // llvm.aarch64.neon.raddhn
    1, // llvm.aarch64.neon.rbit
    1, // llvm.aarch64.neon.rshrn
    1, // llvm.aarch64.neon.rsubhn
    1, // llvm.aarch64.neon.sabd
    1, // llvm.aarch64.neon.saddlp
    1, // llvm.aarch64.neon.saddlv
    1, // llvm.aarch64.neon.saddv
    1, // llvm.aarch64.neon.scalar.sqxtn
    1, // llvm.aarch64.neon.scalar.sqxtun
    1, // llvm.aarch64.neon.scalar.uqxtn
    1, // llvm.aarch64.neon.shadd
    1, // llvm.aarch64.neon.shll
    1, // llvm.aarch64.neon.shsub
    1, // llvm.aarch64.neon.smax
    1, // llvm.aarch64.neon.smaxp
    1, // llvm.aarch64.neon.smaxv
    1, // llvm.aarch64.neon.smin
    1, // llvm.aarch64.neon.sminp
    1, // llvm.aarch64.neon.sminv
    1, // llvm.aarch64.neon.smull
    1, // llvm.aarch64.neon.sqabs
    1, // llvm.aarch64.neon.sqadd
    1, // llvm.aarch64.neon.sqdmulh
    1, // llvm.aarch64.neon.sqdmull
    1, // llvm.aarch64.neon.sqdmulls.scalar
    1, // llvm.aarch64.neon.sqneg
    1, // llvm.aarch64.neon.sqrdmulh
    1, // llvm.aarch64.neon.sqrshl
    1, // llvm.aarch64.neon.sqrshrn
    1, // llvm.aarch64.neon.sqrshrun
    1, // llvm.aarch64.neon.sqshl
    1, // llvm.aarch64.neon.sqshlu
    1, // llvm.aarch64.neon.sqshrn
    1, // llvm.aarch64.neon.sqshrun
    1, // llvm.aarch64.neon.sqsub
    1, // llvm.aarch64.neon.sqxtn
    1, // llvm.aarch64.neon.sqxtun
    1, // llvm.aarch64.neon.srhadd
    1, // llvm.aarch64.neon.srshl
    1, // llvm.aarch64.neon.sshl
    1, // llvm.aarch64.neon.sshll
    4, // llvm.aarch64.neon.st1x2
    5, // llvm.aarch64.neon.st1x3
    6, // llvm.aarch64.neon.st1x4
    4, // llvm.aarch64.neon.st2
    5, // llvm.aarch64.neon.st2lane
    5, // llvm.aarch64.neon.st3
    6, // llvm.aarch64.neon.st3lane
    6, // llvm.aarch64.neon.st4
    7, // llvm.aarch64.neon.st4lane
    1, // llvm.aarch64.neon.subhn
    1, // llvm.aarch64.neon.suqadd
    1, // llvm.aarch64.neon.tbl1
    1, // llvm.aarch64.neon.tbl2
    1, // llvm.aarch64.neon.tbl3
    1, // llvm.aarch64.neon.tbl4
    1, // llvm.aarch64.neon.tbx1
    1, // llvm.aarch64.neon.tbx2
    1, // llvm.aarch64.neon.tbx3
    1, // llvm.aarch64.neon.tbx4
    1, // llvm.aarch64.neon.uabd
    1, // llvm.aarch64.neon.uaddlp
    1, // llvm.aarch64.neon.uaddlv
    1, // llvm.aarch64.neon.uaddv
    1, // llvm.aarch64.neon.uhadd
    1, // llvm.aarch64.neon.uhsub
    1, // llvm.aarch64.neon.umax
    1, // llvm.aarch64.neon.umaxp
    1, // llvm.aarch64.neon.umaxv
    1, // llvm.aarch64.neon.umin
    1, // llvm.aarch64.neon.uminp
    1, // llvm.aarch64.neon.uminv
    1, // llvm.aarch64.neon.umull
    1, // llvm.aarch64.neon.uqadd
    1, // llvm.aarch64.neon.uqrshl
    1, // llvm.aarch64.neon.uqrshrn
    1, // llvm.aarch64.neon.uqshl
    1, // llvm.aarch64.neon.uqshrn
    1, // llvm.aarch64.neon.uqsub
    1, // llvm.aarch64.neon.uqxtn
    1, // llvm.aarch64.neon.urecpe
    1, // llvm.aarch64.neon.urhadd
    1, // llvm.aarch64.neon.urshl
    1, // llvm.aarch64.neon.ursqrte
    1, // llvm.aarch64.neon.ushl
    1, // llvm.aarch64.neon.ushll
    1, // llvm.aarch64.neon.usqadd
    1, // llvm.aarch64.neon.vcopy.lane
    1, // llvm.aarch64.neon.vcvtfp2fxs
    1, // llvm.aarch64.neon.vcvtfp2fxu
    1, // llvm.aarch64.neon.vcvtfp2hf
    1, // llvm.aarch64.neon.vcvtfxs2fp
    1, // llvm.aarch64.neon.vcvtfxu2fp
    1, // llvm.aarch64.neon.vcvthf2fp
    1, // llvm.aarch64.neon.vsli
    1, // llvm.aarch64.neon.vsri
    1, // llvm.aarch64.rbit
    1, // llvm.aarch64.sdiv
    1, // llvm.aarch64.sisd.fabd
    1, // llvm.aarch64.sisd.fcvtxn
    2, // llvm.aarch64.stlxp
    2, // llvm.aarch64.stlxr
    2, // llvm.aarch64.stxp
    2, // llvm.aarch64.stxr
    1, // llvm.aarch64.udiv
    3, // llvm.adjust.trampoline
    2, // llvm.annotation
    2, // llvm.arm.cdp
    2, // llvm.arm.cdp2
    2, // llvm.arm.clrex
    1, // llvm.arm.crc32b
    1, // llvm.arm.crc32cb
    1, // llvm.arm.crc32ch
    1, // llvm.arm.crc32cw
    1, // llvm.arm.crc32h
    1, // llvm.arm.crc32w
    2, // llvm.arm.dmb
    2, // llvm.arm.dsb
    1, // llvm.arm.get.fpscr
    2, // llvm.arm.hint
    2, // llvm.arm.isb
    2, // llvm.arm.ldaex
    2, // llvm.arm.ldaexd
    2, // llvm.arm.ldrex
    2, // llvm.arm.ldrexd
    2, // llvm.arm.mcr
    2, // llvm.arm.mcr2
    2, // llvm.arm.mcrr
    2, // llvm.arm.mcrr2
    2, // llvm.arm.mrc
    2, // llvm.arm.mrc2
    1, // llvm.arm.neon.aesd
    1, // llvm.arm.neon.aese
    1, // llvm.arm.neon.aesimc
    1, // llvm.arm.neon.aesmc
    1, // llvm.arm.neon.sha1c
    1, // llvm.arm.neon.sha1h
    1, // llvm.arm.neon.sha1m
    1, // llvm.arm.neon.sha1p
    1, // llvm.arm.neon.sha1su0
    1, // llvm.arm.neon.sha1su1
    1, // llvm.arm.neon.sha256h
    1, // llvm.arm.neon.sha256h2
    1, // llvm.arm.neon.sha256su0
    1, // llvm.arm.neon.sha256su1
    1, // llvm.arm.neon.vabds
    1, // llvm.arm.neon.vabdu
    1, // llvm.arm.neon.vabs
    1, // llvm.arm.neon.vacge
    1, // llvm.arm.neon.vacgt
    1, // llvm.arm.neon.vbsl
    1, // llvm.arm.neon.vcls
    1, // llvm.arm.neon.vclz
    1, // llvm.arm.neon.vcnt
    1, // llvm.arm.neon.vcvtas
    1, // llvm.arm.neon.vcvtau
    1, // llvm.arm.neon.vcvtfp2fxs
    1, // llvm.arm.neon.vcvtfp2fxu
    1, // llvm.arm.neon.vcvtfp2hf
    1, // llvm.arm.neon.vcvtfxs2fp
    1, // llvm.arm.neon.vcvtfxu2fp
    1, // llvm.arm.neon.vcvthf2fp
    1, // llvm.arm.neon.vcvtms
    1, // llvm.arm.neon.vcvtmu
    1, // llvm.arm.neon.vcvtns
    1, // llvm.arm.neon.vcvtnu
    1, // llvm.arm.neon.vcvtps
    1, // llvm.arm.neon.vcvtpu
    1, // llvm.arm.neon.vhadds
    1, // llvm.arm.neon.vhaddu
    1, // llvm.arm.neon.vhsubs
    1, // llvm.arm.neon.vhsubu
    3, // llvm.arm.neon.vld1
    3, // llvm.arm.neon.vld2
    3, // llvm.arm.neon.vld2lane
    3, // llvm.arm.neon.vld3
    3, // llvm.arm.neon.vld3lane
    3, // llvm.arm.neon.vld4
    3, // llvm.arm.neon.vld4lane
    1, // llvm.arm.neon.vmaxnm
    1, // llvm.arm.neon.vmaxs
    1, // llvm.arm.neon.vmaxu
    1, // llvm.arm.neon.vminnm
    1, // llvm.arm.neon.vmins
    1, // llvm.arm.neon.vminu
    1, // llvm.arm.neon.vmullp
    1, // llvm.arm.neon.vmulls
    1, // llvm.arm.neon.vmullu
    1, // llvm.arm.neon.vmulp
    1, // llvm.arm.neon.vpadals
    1, // llvm.arm.neon.vpadalu
    1, // llvm.arm.neon.vpadd
    1, // llvm.arm.neon.vpaddls
    1, // llvm.arm.neon.vpaddlu
    1, // llvm.arm.neon.vpmaxs
    1, // llvm.arm.neon.vpmaxu
    1, // llvm.arm.neon.vpmins
    1, // llvm.arm.neon.vpminu
    1, // llvm.arm.neon.vqabs
    1, // llvm.arm.neon.vqadds
    1, // llvm.arm.neon.vqaddu
    1, // llvm.arm.neon.vqdmulh
    1, // llvm.arm.neon.vqdmull
    1, // llvm.arm.neon.vqmovns
    1, // llvm.arm.neon.vqmovnsu
    1, // llvm.arm.neon.vqmovnu
    1, // llvm.arm.neon.vqneg
    1, // llvm.arm.neon.vqrdmulh
    1, // llvm.arm.neon.vqrshiftns
    1, // llvm.arm.neon.vqrshiftnsu
    1, // llvm.arm.neon.vqrshiftnu
    1, // llvm.arm.neon.vqrshifts
    1, // llvm.arm.neon.vqrshiftu
    1, // llvm.arm.neon.vqshiftns
    1, // llvm.arm.neon.vqshiftnsu
    1, // llvm.arm.neon.vqshiftnu
    1, // llvm.arm.neon.vqshifts
    1, // llvm.arm.neon.vqshiftsu
    1, // llvm.arm.neon.vqshiftu
    1, // llvm.arm.neon.vqsubs
    1, // llvm.arm.neon.vqsubu
    1, // llvm.arm.neon.vraddhn
    1, // llvm.arm.neon.vrecpe
    1, // llvm.arm.neon.vrecps
    1, // llvm.arm.neon.vrhadds
    1, // llvm.arm.neon.vrhaddu
    1, // llvm.arm.neon.vrinta
    1, // llvm.arm.neon.vrintm
    1, // llvm.arm.neon.vrintn
    1, // llvm.arm.neon.vrintp
    1, // llvm.arm.neon.vrintx
    1, // llvm.arm.neon.vrintz
    1, // llvm.arm.neon.vrshiftn
    1, // llvm.arm.neon.vrshifts
    1, // llvm.arm.neon.vrshiftu
    1, // llvm.arm.neon.vrsqrte
    1, // llvm.arm.neon.vrsqrts
    1, // llvm.arm.neon.vrsubhn
    1, // llvm.arm.neon.vshiftins
    1, // llvm.arm.neon.vshifts
    1, // llvm.arm.neon.vshiftu
    2, // llvm.arm.neon.vst1
    2, // llvm.arm.neon.vst2
    2, // llvm.arm.neon.vst2lane
    2, // llvm.arm.neon.vst3
    2, // llvm.arm.neon.vst3lane
    2, // llvm.arm.neon.vst4
    2, // llvm.arm.neon.vst4lane
    1, // llvm.arm.neon.vtbl1
    1, // llvm.arm.neon.vtbl2
    1, // llvm.arm.neon.vtbl3
    1, // llvm.arm.neon.vtbl4
    1, // llvm.arm.neon.vtbx1
    1, // llvm.arm.neon.vtbx2
    1, // llvm.arm.neon.vtbx3
    1, // llvm.arm.neon.vtbx4
    1, // llvm.arm.qadd
    1, // llvm.arm.qsub
    1, // llvm.arm.rbit
    2, // llvm.arm.set.fpscr
    1, // llvm.arm.ssat
    2, // llvm.arm.stlex
    2, // llvm.arm.stlexd
    2, // llvm.arm.strex
    2, // llvm.arm.strexd
    1, // llvm.arm.thread.pointer
    2, // llvm.arm.undefined
    1, // llvm.arm.usat
    1, // llvm.arm.vcvtr
    1, // llvm.arm.vcvtru
    1, // llvm.bswap
    1, // llvm.ceil
    2, // llvm.clear_cache
    1, // llvm.convert.from.fp16
    1, // llvm.convert.to.fp16
    2, // llvm.convertff
    2, // llvm.convertfsi
    2, // llvm.convertfui
    2, // llvm.convertsif
    2, // llvm.convertss
    2, // llvm.convertsu
    2, // llvm.convertuif
    2, // llvm.convertus
    2, // llvm.convertuu
    1, // llvm.copysign
    1, // llvm.cos
    1, // llvm.ctlz
    1, // llvm.ctpop
    1, // llvm.cttz
    8, // llvm.cuda.syncthreads
    1, // llvm.dbg.declare
    1, // llvm.dbg.value
    2, // llvm.debugtrap
    1, // llvm.donothing
    2, // llvm.eh.dwarf.cfa
    2, // llvm.eh.return.i32
    2, // llvm.eh.return.i64
    1, // llvm.eh.sjlj.callsite
    2, // llvm.eh.sjlj.functioncontext
    9, // llvm.eh.sjlj.longjmp
    1, // llvm.eh.sjlj.lsda
    2, // llvm.eh.sjlj.setjmp
    1, // llvm.eh.typeid.for
    2, // llvm.eh.unwind.init
    1, // llvm.exp
    1, // llvm.exp2
    1, // llvm.expect
    2, // llvm.experimental.patchpoint.i64
    2, // llvm.experimental.patchpoint.void
    10, // llvm.experimental.stackmap
    1, // llvm.fabs
    1, // llvm.floor
    2, // llvm.flt.rounds
    1, // llvm.fma
    1, // llvm.fmuladd
    1, // llvm.frameaddress
    3, // llvm.gcread
    2, // llvm.gcroot
    11, // llvm.gcwrite
    1, // llvm.hexagon.A2.abs
    1, // llvm.hexagon.A2.absp
    1, // llvm.hexagon.A2.abssat
    1, // llvm.hexagon.A2.add
    1, // llvm.hexagon.A2.addh.h16.hh
    1, // llvm.hexagon.A2.addh.h16.hl
    1, // llvm.hexagon.A2.addh.h16.lh
    1, // llvm.hexagon.A2.addh.h16.ll
    1, // llvm.hexagon.A2.addh.h16.sat.hh
    1, // llvm.hexagon.A2.addh.h16.sat.hl
    1, // llvm.hexagon.A2.addh.h16.sat.lh
    1, // llvm.hexagon.A2.addh.h16.sat.ll
    1, // llvm.hexagon.A2.addh.l16.hl
    1, // llvm.hexagon.A2.addh.l16.ll
    1, // llvm.hexagon.A2.addh.l16.sat.hl
    1, // llvm.hexagon.A2.addh.l16.sat.ll
    1, // llvm.hexagon.A2.addi
    1, // llvm.hexagon.A2.addp
    1, // llvm.hexagon.A2.addpsat
    1, // llvm.hexagon.A2.addsat
    1, // llvm.hexagon.A2.addsp
    1, // llvm.hexagon.A2.and
    1, // llvm.hexagon.A2.andir
    1, // llvm.hexagon.A2.andp
    1, // llvm.hexagon.A2.aslh
    1, // llvm.hexagon.A2.asrh
    1, // llvm.hexagon.A2.combine.hh
    1, // llvm.hexagon.A2.combine.hl
    1, // llvm.hexagon.A2.combine.lh
    1, // llvm.hexagon.A2.combine.ll
    1, // llvm.hexagon.A2.combineii
    1, // llvm.hexagon.A2.combinew
    1, // llvm.hexagon.A2.max
    1, // llvm.hexagon.A2.maxp
    1, // llvm.hexagon.A2.maxu
    1, // llvm.hexagon.A2.maxup
    1, // llvm.hexagon.A2.min
    1, // llvm.hexagon.A2.minp
    1, // llvm.hexagon.A2.minu
    1, // llvm.hexagon.A2.minup
    1, // llvm.hexagon.A2.neg
    1, // llvm.hexagon.A2.negp
    1, // llvm.hexagon.A2.negsat
    1, // llvm.hexagon.A2.not
    1, // llvm.hexagon.A2.notp
    1, // llvm.hexagon.A2.or
    1, // llvm.hexagon.A2.orir
    1, // llvm.hexagon.A2.orp
    1, // llvm.hexagon.A2.roundsat
    1, // llvm.hexagon.A2.sat
    1, // llvm.hexagon.A2.satb
    1, // llvm.hexagon.A2.sath
    1, // llvm.hexagon.A2.satub
    1, // llvm.hexagon.A2.satuh
    1, // llvm.hexagon.A2.sub
    1, // llvm.hexagon.A2.subh.h16.hh
    1, // llvm.hexagon.A2.subh.h16.hl
    1, // llvm.hexagon.A2.subh.h16.lh
    1, // llvm.hexagon.A2.subh.h16.ll
    1, // llvm.hexagon.A2.subh.h16.sat.hh
    1, // llvm.hexagon.A2.subh.h16.sat.hl
    1, // llvm.hexagon.A2.subh.h16.sat.lh
    1, // llvm.hexagon.A2.subh.h16.sat.ll
    1, // llvm.hexagon.A2.subh.l16.hl
    1, // llvm.hexagon.A2.subh.l16.ll
    1, // llvm.hexagon.A2.subh.l16.sat.hl
    1, // llvm.hexagon.A2.subh.l16.sat.ll
    1, // llvm.hexagon.A2.subp
    1, // llvm.hexagon.A2.subri
    1, // llvm.hexagon.A2.subsat
    1, // llvm.hexagon.A2.svaddh
    1, // llvm.hexagon.A2.svaddhs
    1, // llvm.hexagon.A2.svadduhs
    1, // llvm.hexagon.A2.svavgh
    1, // llvm.hexagon.A2.svavghs
    1, // llvm.hexagon.A2.svnavgh
    1, // llvm.hexagon.A2.svsubh
    1, // llvm.hexagon.A2.svsubhs
    1, // llvm.hexagon.A2.svsubuhs
    1, // llvm.hexagon.A2.swiz
    1, // llvm.hexagon.A2.sxtb
    1, // llvm.hexagon.A2.sxth
    1, // llvm.hexagon.A2.sxtw
    1, // llvm.hexagon.A2.tfr
    1, // llvm.hexagon.A2.tfrih
    1, // llvm.hexagon.A2.tfril
    1, // llvm.hexagon.A2.tfrp
    1, // llvm.hexagon.A2.tfrpi
    1, // llvm.hexagon.A2.tfrsi
    1, // llvm.hexagon.A2.vabsh
    1, // llvm.hexagon.A2.vabshsat
    1, // llvm.hexagon.A2.vabsw
    1, // llvm.hexagon.A2.vabswsat
    1, // llvm.hexagon.A2.vaddb.map
    1, // llvm.hexagon.A2.vaddh
    1, // llvm.hexagon.A2.vaddhs
    1, // llvm.hexagon.A2.vaddub
    1, // llvm.hexagon.A2.vaddubs
    1, // llvm.hexagon.A2.vadduhs
    1, // llvm.hexagon.A2.vaddw
    1, // llvm.hexagon.A2.vaddws
    1, // llvm.hexagon.A2.vavgh
    1, // llvm.hexagon.A2.vavghcr
    1, // llvm.hexagon.A2.vavghr
    1, // llvm.hexagon.A2.vavgub
    1, // llvm.hexagon.A2.vavgubr
    1, // llvm.hexagon.A2.vavguh
    1, // llvm.hexagon.A2.vavguhr
    1, // llvm.hexagon.A2.vavguw
    1, // llvm.hexagon.A2.vavguwr
    1, // llvm.hexagon.A2.vavgw
    1, // llvm.hexagon.A2.vavgwcr
    1, // llvm.hexagon.A2.vavgwr
    1, // llvm.hexagon.A2.vcmpbeq
    1, // llvm.hexagon.A2.vcmpbgtu
    1, // llvm.hexagon.A2.vcmpheq
    1, // llvm.hexagon.A2.vcmphgt
    1, // llvm.hexagon.A2.vcmphgtu
    1, // llvm.hexagon.A2.vcmpweq
    1, // llvm.hexagon.A2.vcmpwgt
    1, // llvm.hexagon.A2.vcmpwgtu
    1, // llvm.hexagon.A2.vconj
    1, // llvm.hexagon.A2.vmaxb
    1, // llvm.hexagon.A2.vmaxh
    1, // llvm.hexagon.A2.vmaxub
    1, // llvm.hexagon.A2.vmaxuh
    1, // llvm.hexagon.A2.vmaxuw
    1, // llvm.hexagon.A2.vmaxw
    1, // llvm.hexagon.A2.vminb
    1, // llvm.hexagon.A2.vminh
    1, // llvm.hexagon.A2.vminub
    1, // llvm.hexagon.A2.vminuh
    1, // llvm.hexagon.A2.vminuw
    1, // llvm.hexagon.A2.vminw
    1, // llvm.hexagon.A2.vnavgh
    1, // llvm.hexagon.A2.vnavghcr
    1, // llvm.hexagon.A2.vnavghr
    1, // llvm.hexagon.A2.vnavgw
    1, // llvm.hexagon.A2.vnavgwcr
    1, // llvm.hexagon.A2.vnavgwr
    1, // llvm.hexagon.A2.vraddub
    1, // llvm.hexagon.A2.vraddub.acc
    1, // llvm.hexagon.A2.vrsadub
    1, // llvm.hexagon.A2.vrsadub.acc
    1, // llvm.hexagon.A2.vsubb.map
    1, // llvm.hexagon.A2.vsubh
    1, // llvm.hexagon.A2.vsubhs
    1, // llvm.hexagon.A2.vsubub
    1, // llvm.hexagon.A2.vsububs
    1, // llvm.hexagon.A2.vsubuhs
    1, // llvm.hexagon.A2.vsubw
    1, // llvm.hexagon.A2.vsubws
    1, // llvm.hexagon.A2.xor
    1, // llvm.hexagon.A2.xorp
    1, // llvm.hexagon.A2.zxtb
    1, // llvm.hexagon.A2.zxth
    1, // llvm.hexagon.A4.andn
    1, // llvm.hexagon.A4.andnp
    1, // llvm.hexagon.A4.bitsplit
    1, // llvm.hexagon.A4.bitspliti
    1, // llvm.hexagon.A4.boundscheck
    1, // llvm.hexagon.A4.cmpbeq
    1, // llvm.hexagon.A4.cmpbeqi
    1, // llvm.hexagon.A4.cmpbgt
    1, // llvm.hexagon.A4.cmpbgti
    1, // llvm.hexagon.A4.cmpbgtu
    1, // llvm.hexagon.A4.cmpbgtui
    1, // llvm.hexagon.A4.cmpheq
    1, // llvm.hexagon.A4.cmpheqi
    1, // llvm.hexagon.A4.cmphgt
    1, // llvm.hexagon.A4.cmphgti
    1, // llvm.hexagon.A4.cmphgtu
    1, // llvm.hexagon.A4.cmphgtui
    1, // llvm.hexagon.A4.combineir
    1, // llvm.hexagon.A4.combineri
    1, // llvm.hexagon.A4.cround.ri
    1, // llvm.hexagon.A4.cround.rr
    1, // llvm.hexagon.A4.modwrapu
    1, // llvm.hexagon.A4.orn
    1, // llvm.hexagon.A4.ornp
    1, // llvm.hexagon.A4.rcmpeq
    1, // llvm.hexagon.A4.rcmpeqi
    1, // llvm.hexagon.A4.rcmpneq
    1, // llvm.hexagon.A4.rcmpneqi
    1, // llvm.hexagon.A4.round.ri
    1, // llvm.hexagon.A4.round.ri.sat
    1, // llvm.hexagon.A4.round.rr
    1, // llvm.hexagon.A4.round.rr.sat
    1, // llvm.hexagon.A4.tlbmatch
    1, // llvm.hexagon.A4.vcmpbeq.any
    1, // llvm.hexagon.A4.vcmpbeqi
    1, // llvm.hexagon.A4.vcmpbgt
    1, // llvm.hexagon.A4.vcmpbgti
    1, // llvm.hexagon.A4.vcmpbgtui
    1, // llvm.hexagon.A4.vcmpheqi
    1, // llvm.hexagon.A4.vcmphgti
    1, // llvm.hexagon.A4.vcmphgtui
    1, // llvm.hexagon.A4.vcmpweqi
    1, // llvm.hexagon.A4.vcmpwgti
    1, // llvm.hexagon.A4.vcmpwgtui
    1, // llvm.hexagon.A4.vrmaxh
    1, // llvm.hexagon.A4.vrmaxuh
    1, // llvm.hexagon.A4.vrmaxuw
    1, // llvm.hexagon.A4.vrmaxw
    1, // llvm.hexagon.A4.vrminh
    1, // llvm.hexagon.A4.vrminuh
    1, // llvm.hexagon.A4.vrminuw
    1, // llvm.hexagon.A4.vrminw
    1, // llvm.hexagon.A5.vaddhubs
    1, // llvm.hexagon.C2.all8
    1, // llvm.hexagon.C2.and
    1, // llvm.hexagon.C2.andn
    1, // llvm.hexagon.C2.any8
    1, // llvm.hexagon.C2.bitsclr
    1, // llvm.hexagon.C2.bitsclri
    1, // llvm.hexagon.C2.bitsset
    1, // llvm.hexagon.C2.cmpeq
    1, // llvm.hexagon.C2.cmpeqi
    1, // llvm.hexagon.C2.cmpeqp
    1, // llvm.hexagon.C2.cmpgei
    1, // llvm.hexagon.C2.cmpgeui
    1, // llvm.hexagon.C2.cmpgt
    1, // llvm.hexagon.C2.cmpgti
    1, // llvm.hexagon.C2.cmpgtp
    1, // llvm.hexagon.C2.cmpgtu
    1, // llvm.hexagon.C2.cmpgtui
    1, // llvm.hexagon.C2.cmpgtup
    1, // llvm.hexagon.C2.cmplt
    1, // llvm.hexagon.C2.cmpltu
    1, // llvm.hexagon.C2.mask
    1, // llvm.hexagon.C2.mux
    1, // llvm.hexagon.C2.muxii
    1, // llvm.hexagon.C2.muxir
    1, // llvm.hexagon.C2.muxri
    1, // llvm.hexagon.C2.not
    1, // llvm.hexagon.C2.or
    1, // llvm.hexagon.C2.orn
    1, // llvm.hexagon.C2.pxfer.map
    1, // llvm.hexagon.C2.tfrpr
    1, // llvm.hexagon.C2.tfrrp
    1, // llvm.hexagon.C2.vitpack
    1, // llvm.hexagon.C2.vmux
    1, // llvm.hexagon.C2.xor
    1, // llvm.hexagon.C4.and.and
    1, // llvm.hexagon.C4.and.andn
    1, // llvm.hexagon.C4.and.or
    1, // llvm.hexagon.C4.and.orn
    1, // llvm.hexagon.C4.cmplte
    1, // llvm.hexagon.C4.cmpltei
    1, // llvm.hexagon.C4.cmplteu
    1, // llvm.hexagon.C4.cmplteui
    1, // llvm.hexagon.C4.cmpneq
    1, // llvm.hexagon.C4.cmpneqi
    1, // llvm.hexagon.C4.fastcorner9
    1, // llvm.hexagon.C4.fastcorner9.not
    1, // llvm.hexagon.C4.nbitsclr
    1, // llvm.hexagon.C4.nbitsclri
    1, // llvm.hexagon.C4.nbitsset
    1, // llvm.hexagon.C4.or.and
    1, // llvm.hexagon.C4.or.andn
    1, // llvm.hexagon.C4.or.or
    1, // llvm.hexagon.C4.or.orn
    1, // llvm.hexagon.F2.conv.d2df
    1, // llvm.hexagon.F2.conv.d2sf
    1, // llvm.hexagon.F2.conv.df2d
    1, // llvm.hexagon.F2.conv.df2d.chop
    1, // llvm.hexagon.F2.conv.df2sf
    1, // llvm.hexagon.F2.conv.df2ud
    1, // llvm.hexagon.F2.conv.df2ud.chop
    1, // llvm.hexagon.F2.conv.df2uw
    1, // llvm.hexagon.F2.conv.df2uw.chop
    1, // llvm.hexagon.F2.conv.df2w
    1, // llvm.hexagon.F2.conv.df2w.chop
    1, // llvm.hexagon.F2.conv.sf2d
    1, // llvm.hexagon.F2.conv.sf2d.chop
    1, // llvm.hexagon.F2.conv.sf2df
    1, // llvm.hexagon.F2.conv.sf2ud
    1, // llvm.hexagon.F2.conv.sf2ud.chop
    1, // llvm.hexagon.F2.conv.sf2uw
    1, // llvm.hexagon.F2.conv.sf2uw.chop
    1, // llvm.hexagon.F2.conv.sf2w
    1, // llvm.hexagon.F2.conv.sf2w.chop
    1, // llvm.hexagon.F2.conv.ud2df
    1, // llvm.hexagon.F2.conv.ud2sf
    1, // llvm.hexagon.F2.conv.uw2df
    1, // llvm.hexagon.F2.conv.uw2sf
    1, // llvm.hexagon.F2.conv.w2df
    1, // llvm.hexagon.F2.conv.w2sf
    1, // llvm.hexagon.F2.dfadd
    1, // llvm.hexagon.F2.dfclass
    1, // llvm.hexagon.F2.dfcmpeq
    1, // llvm.hexagon.F2.dfcmpge
    1, // llvm.hexagon.F2.dfcmpgt
    1, // llvm.hexagon.F2.dfcmpuo
    1, // llvm.hexagon.F2.dffixupd
    1, // llvm.hexagon.F2.dffixupn
    1, // llvm.hexagon.F2.dffixupr
    1, // llvm.hexagon.F2.dffma
    1, // llvm.hexagon.F2.dffma.lib
    1, // llvm.hexagon.F2.dffma.sc
    1, // llvm.hexagon.F2.dffms
    1, // llvm.hexagon.F2.dffms.lib
    1, // llvm.hexagon.F2.dfimm.n
    1, // llvm.hexagon.F2.dfimm.p
    1, // llvm.hexagon.F2.dfmax
    1, // llvm.hexagon.F2.dfmin
    1, // llvm.hexagon.F2.dfmpy
    1, // llvm.hexagon.F2.dfsub
    1, // llvm.hexagon.F2.sfadd
    1, // llvm.hexagon.F2.sfclass
    1, // llvm.hexagon.F2.sfcmpeq
    1, // llvm.hexagon.F2.sfcmpge
    1, // llvm.hexagon.F2.sfcmpgt
    1, // llvm.hexagon.F2.sfcmpuo
    1, // llvm.hexagon.F2.sffixupd
    1, // llvm.hexagon.F2.sffixupn
    1, // llvm.hexagon.F2.sffixupr
    1, // llvm.hexagon.F2.sffma
    1, // llvm.hexagon.F2.sffma.lib
    1, // llvm.hexagon.F2.sffma.sc
    1, // llvm.hexagon.F2.sffms
    1, // llvm.hexagon.F2.sffms.lib
    1, // llvm.hexagon.F2.sfimm.n
    1, // llvm.hexagon.F2.sfimm.p
    1, // llvm.hexagon.F2.sfmax
    1, // llvm.hexagon.F2.sfmin
    1, // llvm.hexagon.F2.sfmpy
    1, // llvm.hexagon.F2.sfsub
    1, // llvm.hexagon.M2.acci
    1, // llvm.hexagon.M2.accii
    1, // llvm.hexagon.M2.cmaci.s0
    1, // llvm.hexagon.M2.cmacr.s0
    1, // llvm.hexagon.M2.cmacs.s0
    1, // llvm.hexagon.M2.cmacs.s1
    1, // llvm.hexagon.M2.cmacsc.s0
    1, // llvm.hexagon.M2.cmacsc.s1
    1, // llvm.hexagon.M2.cmpyi.s0
    1, // llvm.hexagon.M2.cmpyr.s0
    1, // llvm.hexagon.M2.cmpyrs.s0
    1, // llvm.hexagon.M2.cmpyrs.s1
    1, // llvm.hexagon.M2.cmpyrsc.s0
    1, // llvm.hexagon.M2.cmpyrsc.s1
    1, // llvm.hexagon.M2.cmpys.s0
    1, // llvm.hexagon.M2.cmpys.s1
    1, // llvm.hexagon.M2.cmpysc.s0
    1, // llvm.hexagon.M2.cmpysc.s1
    1, // llvm.hexagon.M2.cnacs.s0
    1, // llvm.hexagon.M2.cnacs.s1
    1, // llvm.hexagon.M2.cnacsc.s0
    1, // llvm.hexagon.M2.cnacsc.s1
    1, // llvm.hexagon.M2.dpmpyss.acc.s0
    1, // llvm.hexagon.M2.dpmpyss.nac.s0
    1, // llvm.hexagon.M2.dpmpyss.rnd.s0
    1, // llvm.hexagon.M2.dpmpyss.s0
    1, // llvm.hexagon.M2.dpmpyuu.acc.s0
    1, // llvm.hexagon.M2.dpmpyuu.nac.s0
    1, // llvm.hexagon.M2.dpmpyuu.s0
    1, // llvm.hexagon.M2.hmmpyh.rs1
    1, // llvm.hexagon.M2.hmmpyh.s1
    1, // llvm.hexagon.M2.hmmpyl.rs1
    1, // llvm.hexagon.M2.hmmpyl.s1
    1, // llvm.hexagon.M2.maci
    1, // llvm.hexagon.M2.macsin
    1, // llvm.hexagon.M2.macsip
    1, // llvm.hexagon.M2.mmachs.rs0
    1, // llvm.hexagon.M2.mmachs.rs1
    1, // llvm.hexagon.M2.mmachs.s0
    1, // llvm.hexagon.M2.mmachs.s1
    1, // llvm.hexagon.M2.mmacls.rs0
    1, // llvm.hexagon.M2.mmacls.rs1
    1, // llvm.hexagon.M2.mmacls.s0
    1, // llvm.hexagon.M2.mmacls.s1
    1, // llvm.hexagon.M2.mmacuhs.rs0
    1, // llvm.hexagon.M2.mmacuhs.rs1
    1, // llvm.hexagon.M2.mmacuhs.s0
    1, // llvm.hexagon.M2.mmacuhs.s1
    1, // llvm.hexagon.M2.mmaculs.rs0
    1, // llvm.hexagon.M2.mmaculs.rs1
    1, // llvm.hexagon.M2.mmaculs.s0
    1, // llvm.hexagon.M2.mmaculs.s1
    1, // llvm.hexagon.M2.mmpyh.rs0
    1, // llvm.hexagon.M2.mmpyh.rs1
    1, // llvm.hexagon.M2.mmpyh.s0
    1, // llvm.hexagon.M2.mmpyh.s1
    1, // llvm.hexagon.M2.mmpyl.rs0
    1, // llvm.hexagon.M2.mmpyl.rs1
    1, // llvm.hexagon.M2.mmpyl.s0
    1, // llvm.hexagon.M2.mmpyl.s1
    1, // llvm.hexagon.M2.mmpyuh.rs0
    1, // llvm.hexagon.M2.mmpyuh.rs1
    1, // llvm.hexagon.M2.mmpyuh.s0
    1, // llvm.hexagon.M2.mmpyuh.s1
    1, // llvm.hexagon.M2.mmpyul.rs0
    1, // llvm.hexagon.M2.mmpyul.rs1
    1, // llvm.hexagon.M2.mmpyul.s0
    1, // llvm.hexagon.M2.mmpyul.s1
    1, // llvm.hexagon.M2.mpy.acc.hh.s0
    1, // llvm.hexagon.M2.mpy.acc.hh.s1
    1, // llvm.hexagon.M2.mpy.acc.hl.s0
    1, // llvm.hexagon.M2.mpy.acc.hl.s1
    1, // llvm.hexagon.M2.mpy.acc.lh.s0
    1, // llvm.hexagon.M2.mpy.acc.lh.s1
    1, // llvm.hexagon.M2.mpy.acc.ll.s0
    1, // llvm.hexagon.M2.mpy.acc.ll.s1
    1, // llvm.hexagon.M2.mpy.acc.sat.hh.s0
    1, // llvm.hexagon.M2.mpy.acc.sat.hh.s1
    1, // llvm.hexagon.M2.mpy.acc.sat.hl.s0
    1, // llvm.hexagon.M2.mpy.acc.sat.hl.s1
    1, // llvm.hexagon.M2.mpy.acc.sat.lh.s0
    1, // llvm.hexagon.M2.mpy.acc.sat.lh.s1
    1, // llvm.hexagon.M2.mpy.acc.sat.ll.s0
    1, // llvm.hexagon.M2.mpy.acc.sat.ll.s1
    1, // llvm.hexagon.M2.mpy.hh.s0
    1, // llvm.hexagon.M2.mpy.hh.s1
    1, // llvm.hexagon.M2.mpy.hl.s0
    1, // llvm.hexagon.M2.mpy.hl.s1
    1, // llvm.hexagon.M2.mpy.lh.s0
    1, // llvm.hexagon.M2.mpy.lh.s1
    1, // llvm.hexagon.M2.mpy.ll.s0
    1, // llvm.hexagon.M2.mpy.ll.s1
    1, // llvm.hexagon.M2.mpy.nac.hh.s0
    1, // llvm.hexagon.M2.mpy.nac.hh.s1
    1, // llvm.hexagon.M2.mpy.nac.hl.s0
    1, // llvm.hexagon.M2.mpy.nac.hl.s1
    1, // llvm.hexagon.M2.mpy.nac.lh.s0
    1, // llvm.hexagon.M2.mpy.nac.lh.s1
    1, // llvm.hexagon.M2.mpy.nac.ll.s0
    1, // llvm.hexagon.M2.mpy.nac.ll.s1
    1, // llvm.hexagon.M2.mpy.nac.sat.hh.s0
    1, // llvm.hexagon.M2.mpy.nac.sat.hh.s1
    1, // llvm.hexagon.M2.mpy.nac.sat.hl.s0
    1, // llvm.hexagon.M2.mpy.nac.sat.hl.s1
    1, // llvm.hexagon.M2.mpy.nac.sat.lh.s0
    1, // llvm.hexagon.M2.mpy.nac.sat.lh.s1
    1, // llvm.hexagon.M2.mpy.nac.sat.ll.s0
    1, // llvm.hexagon.M2.mpy.nac.sat.ll.s1
    1, // llvm.hexagon.M2.mpy.rnd.hh.s0
    1, // llvm.hexagon.M2.mpy.rnd.hh.s1
    1, // llvm.hexagon.M2.mpy.rnd.hl.s0
    1, // llvm.hexagon.M2.mpy.rnd.hl.s1
    1, // llvm.hexagon.M2.mpy.rnd.lh.s0
    1, // llvm.hexagon.M2.mpy.rnd.lh.s1
    1, // llvm.hexagon.M2.mpy.rnd.ll.s0
    1, // llvm.hexagon.M2.mpy.rnd.ll.s1
    1, // llvm.hexagon.M2.mpy.sat.hh.s0
    1, // llvm.hexagon.M2.mpy.sat.hh.s1
    1, // llvm.hexagon.M2.mpy.sat.hl.s0
    1, // llvm.hexagon.M2.mpy.sat.hl.s1
    1, // llvm.hexagon.M2.mpy.sat.lh.s0
    1, // llvm.hexagon.M2.mpy.sat.lh.s1
    1, // llvm.hexagon.M2.mpy.sat.ll.s0
    1, // llvm.hexagon.M2.mpy.sat.ll.s1
    1, // llvm.hexagon.M2.mpy.sat.rnd.hh.s0
    1, // llvm.hexagon.M2.mpy.sat.rnd.hh.s1
    1, // llvm.hexagon.M2.mpy.sat.rnd.hl.s0
    1, // llvm.hexagon.M2.mpy.sat.rnd.hl.s1
    1, // llvm.hexagon.M2.mpy.sat.rnd.lh.s0
    1, // llvm.hexagon.M2.mpy.sat.rnd.lh.s1
    1, // llvm.hexagon.M2.mpy.sat.rnd.ll.s0
    1, // llvm.hexagon.M2.mpy.sat.rnd.ll.s1
    1, // llvm.hexagon.M2.mpy.up
    1, // llvm.hexagon.M2.mpy.up.s1
    1, // llvm.hexagon.M2.mpy.up.s1.sat
    1, // llvm.hexagon.M2.mpyd.acc.hh.s0
    1, // llvm.hexagon.M2.mpyd.acc.hh.s1
    1, // llvm.hexagon.M2.mpyd.acc.hl.s0
    1, // llvm.hexagon.M2.mpyd.acc.hl.s1
    1, // llvm.hexagon.M2.mpyd.acc.lh.s0
    1, // llvm.hexagon.M2.mpyd.acc.lh.s1
    1, // llvm.hexagon.M2.mpyd.acc.ll.s0
    1, // llvm.hexagon.M2.mpyd.acc.ll.s1
    1, // llvm.hexagon.M2.mpyd.hh.s0
    1, // llvm.hexagon.M2.mpyd.hh.s1
    1, // llvm.hexagon.M2.mpyd.hl.s0
    1, // llvm.hexagon.M2.mpyd.hl.s1
    1, // llvm.hexagon.M2.mpyd.lh.s0
    1, // llvm.hexagon.M2.mpyd.lh.s1
    1, // llvm.hexagon.M2.mpyd.ll.s0
    1, // llvm.hexagon.M2.mpyd.ll.s1
    1, // llvm.hexagon.M2.mpyd.nac.hh.s0
    1, // llvm.hexagon.M2.mpyd.nac.hh.s1
    1, // llvm.hexagon.M2.mpyd.nac.hl.s0
    1, // llvm.hexagon.M2.mpyd.nac.hl.s1
    1, // llvm.hexagon.M2.mpyd.nac.lh.s0
    1, // llvm.hexagon.M2.mpyd.nac.lh.s1
    1, // llvm.hexagon.M2.mpyd.nac.ll.s0
    1, // llvm.hexagon.M2.mpyd.nac.ll.s1
    1, // llvm.hexagon.M2.mpyd.rnd.hh.s0
    1, // llvm.hexagon.M2.mpyd.rnd.hh.s1
    1, // llvm.hexagon.M2.mpyd.rnd.hl.s0
    1, // llvm.hexagon.M2.mpyd.rnd.hl.s1
    1, // llvm.hexagon.M2.mpyd.rnd.lh.s0
    1, // llvm.hexagon.M2.mpyd.rnd.lh.s1
    1, // llvm.hexagon.M2.mpyd.rnd.ll.s0
    1, // llvm.hexagon.M2.mpyd.rnd.ll.s1
    1, // llvm.hexagon.M2.mpyi
    1, // llvm.hexagon.M2.mpysmi
    1, // llvm.hexagon.M2.mpysu.up
    1, // llvm.hexagon.M2.mpyu.acc.hh.s0
    1, // llvm.hexagon.M2.mpyu.acc.hh.s1
    1, // llvm.hexagon.M2.mpyu.acc.hl.s0
    1, // llvm.hexagon.M2.mpyu.acc.hl.s1
    1, // llvm.hexagon.M2.mpyu.acc.lh.s0
    1, // llvm.hexagon.M2.mpyu.acc.lh.s1
    1, // llvm.hexagon.M2.mpyu.acc.ll.s0
    1, // llvm.hexagon.M2.mpyu.acc.ll.s1
    1, // llvm.hexagon.M2.mpyu.hh.s0
    1, // llvm.hexagon.M2.mpyu.hh.s1
    1, // llvm.hexagon.M2.mpyu.hl.s0
    1, // llvm.hexagon.M2.mpyu.hl.s1
    1, // llvm.hexagon.M2.mpyu.lh.s0
    1, // llvm.hexagon.M2.mpyu.lh.s1
    1, // llvm.hexagon.M2.mpyu.ll.s0
    1, // llvm.hexagon.M2.mpyu.ll.s1
    1, // llvm.hexagon.M2.mpyu.nac.hh.s0
    1, // llvm.hexagon.M2.mpyu.nac.hh.s1
    1, // llvm.hexagon.M2.mpyu.nac.hl.s0
    1, // llvm.hexagon.M2.mpyu.nac.hl.s1
    1, // llvm.hexagon.M2.mpyu.nac.lh.s0
    1, // llvm.hexagon.M2.mpyu.nac.lh.s1
    1, // llvm.hexagon.M2.mpyu.nac.ll.s0
    1, // llvm.hexagon.M2.mpyu.nac.ll.s1
    1, // llvm.hexagon.M2.mpyu.up
    1, // llvm.hexagon.M2.mpyud.acc.hh.s0
    1, // llvm.hexagon.M2.mpyud.acc.hh.s1
    1, // llvm.hexagon.M2.mpyud.acc.hl.s0
    1, // llvm.hexagon.M2.mpyud.acc.hl.s1
    1, // llvm.hexagon.M2.mpyud.acc.lh.s0
    1, // llvm.hexagon.M2.mpyud.acc.lh.s1
    1, // llvm.hexagon.M2.mpyud.acc.ll.s0
    1, // llvm.hexagon.M2.mpyud.acc.ll.s1
    1, // llvm.hexagon.M2.mpyud.hh.s0
    1, // llvm.hexagon.M2.mpyud.hh.s1
    1, // llvm.hexagon.M2.mpyud.hl.s0
    1, // llvm.hexagon.M2.mpyud.hl.s1
    1, // llvm.hexagon.M2.mpyud.lh.s0
    1, // llvm.hexagon.M2.mpyud.lh.s1
    1, // llvm.hexagon.M2.mpyud.ll.s0
    1, // llvm.hexagon.M2.mpyud.ll.s1
    1, // llvm.hexagon.M2.mpyud.nac.hh.s0
    1, // llvm.hexagon.M2.mpyud.nac.hh.s1
    1, // llvm.hexagon.M2.mpyud.nac.hl.s0
    1, // llvm.hexagon.M2.mpyud.nac.hl.s1
    1, // llvm.hexagon.M2.mpyud.nac.lh.s0
    1, // llvm.hexagon.M2.mpyud.nac.lh.s1
    1, // llvm.hexagon.M2.mpyud.nac.ll.s0
    1, // llvm.hexagon.M2.mpyud.nac.ll.s1
    1, // llvm.hexagon.M2.mpyui
    1, // llvm.hexagon.M2.nacci
    1, // llvm.hexagon.M2.naccii
    1, // llvm.hexagon.M2.subacc
    1, // llvm.hexagon.M2.vabsdiffh
    1, // llvm.hexagon.M2.vabsdiffw
    1, // llvm.hexagon.M2.vcmac.s0.sat.i
    1, // llvm.hexagon.M2.vcmac.s0.sat.r
    1, // llvm.hexagon.M2.vcmpy.s0.sat.i
    1, // llvm.hexagon.M2.vcmpy.s0.sat.r
    1, // llvm.hexagon.M2.vcmpy.s1.sat.i
    1, // llvm.hexagon.M2.vcmpy.s1.sat.r
    1, // llvm.hexagon.M2.vdmacs.s0
    1, // llvm.hexagon.M2.vdmacs.s1
    1, // llvm.hexagon.M2.vdmpyrs.s0
    1, // llvm.hexagon.M2.vdmpyrs.s1
    1, // llvm.hexagon.M2.vdmpys.s0
    1, // llvm.hexagon.M2.vdmpys.s1
    1, // llvm.hexagon.M2.vmac2
    1, // llvm.hexagon.M2.vmac2es
    1, // llvm.hexagon.M2.vmac2es.s0
    1, // llvm.hexagon.M2.vmac2es.s1
    1, // llvm.hexagon.M2.vmac2s.s0
    1, // llvm.hexagon.M2.vmac2s.s1
    1, // llvm.hexagon.M2.vmac2su.s0
    1, // llvm.hexagon.M2.vmac2su.s1
    1, // llvm.hexagon.M2.vmpy2es.s0
    1, // llvm.hexagon.M2.vmpy2es.s1
    1, // llvm.hexagon.M2.vmpy2s.s0
    1, // llvm.hexagon.M2.vmpy2s.s0pack
    1, // llvm.hexagon.M2.vmpy2s.s1
    1, // llvm.hexagon.M2.vmpy2s.s1pack
    1, // llvm.hexagon.M2.vmpy2su.s0
    1, // llvm.hexagon.M2.vmpy2su.s1
    1, // llvm.hexagon.M2.vraddh
    1, // llvm.hexagon.M2.vradduh
    1, // llvm.hexagon.M2.vrcmaci.s0
    1, // llvm.hexagon.M2.vrcmaci.s0c
    1, // llvm.hexagon.M2.vrcmacr.s0
    1, // llvm.hexagon.M2.vrcmacr.s0c
    1, // llvm.hexagon.M2.vrcmpyi.s0
    1, // llvm.hexagon.M2.vrcmpyi.s0c
    1, // llvm.hexagon.M2.vrcmpyr.s0
    1, // llvm.hexagon.M2.vrcmpyr.s0c
    1, // llvm.hexagon.M2.vrcmpys.acc.s1
    1, // llvm.hexagon.M2.vrcmpys.s1
    1, // llvm.hexagon.M2.vrcmpys.s1rp
    1, // llvm.hexagon.M2.vrmac.s0
    1, // llvm.hexagon.M2.vrmpy.s0
    1, // llvm.hexagon.M2.xor.xacc
    1, // llvm.hexagon.M4.and.and
    1, // llvm.hexagon.M4.and.andn
    1, // llvm.hexagon.M4.and.or
    1, // llvm.hexagon.M4.and.xor
    1, // llvm.hexagon.M4.cmpyi.wh
    1, // llvm.hexagon.M4.cmpyi.whc
    1, // llvm.hexagon.M4.cmpyr.wh
    1, // llvm.hexagon.M4.cmpyr.whc
    1, // llvm.hexagon.M4.mac.up.s1.sat
    1, // llvm.hexagon.M4.mpyri.addi
    1, // llvm.hexagon.M4.mpyri.addr
    1, // llvm.hexagon.M4.mpyri.addr.u2
    1, // llvm.hexagon.M4.mpyrr.addi
    1, // llvm.hexagon.M4.mpyrr.addr
    1, // llvm.hexagon.M4.nac.up.s1.sat
    1, // llvm.hexagon.M4.or.and
    1, // llvm.hexagon.M4.or.andn
    1, // llvm.hexagon.M4.or.or
    1, // llvm.hexagon.M4.or.xor
    1, // llvm.hexagon.M4.pmpyw
    1, // llvm.hexagon.M4.pmpyw.acc
    1, // llvm.hexagon.M4.vpmpyh
    1, // llvm.hexagon.M4.vpmpyh.acc
    1, // llvm.hexagon.M4.vrmpyeh.acc.s0
    1, // llvm.hexagon.M4.vrmpyeh.acc.s1
    1, // llvm.hexagon.M4.vrmpyeh.s0
    1, // llvm.hexagon.M4.vrmpyeh.s1
    1, // llvm.hexagon.M4.vrmpyoh.acc.s0
    1, // llvm.hexagon.M4.vrmpyoh.acc.s1
    1, // llvm.hexagon.M4.vrmpyoh.s0
    1, // llvm.hexagon.M4.vrmpyoh.s1
    1, // llvm.hexagon.M4.xor.and
    1, // llvm.hexagon.M4.xor.andn
    1, // llvm.hexagon.M4.xor.or
    1, // llvm.hexagon.M4.xor.xacc
    1, // llvm.hexagon.M5.vdmacbsu
    1, // llvm.hexagon.M5.vdmpybsu
    1, // llvm.hexagon.M5.vmacbsu
    1, // llvm.hexagon.M5.vmacbuu
    1, // llvm.hexagon.M5.vmpybsu
    1, // llvm.hexagon.M5.vmpybuu
    1, // llvm.hexagon.M5.vrmacbsu
    1, // llvm.hexagon.M5.vrmacbuu
    1, // llvm.hexagon.M5.vrmpybsu
    1, // llvm.hexagon.M5.vrmpybuu
    1, // llvm.hexagon.S2.addasl.rrri
    1, // llvm.hexagon.S2.asl.i.p
    1, // llvm.hexagon.S2.asl.i.p.acc
    1, // llvm.hexagon.S2.asl.i.p.and
    1, // llvm.hexagon.S2.asl.i.p.nac
    1, // llvm.hexagon.S2.asl.i.p.or
    1, // llvm.hexagon.S2.asl.i.p.xacc
    1, // llvm.hexagon.S2.asl.i.r
    1, // llvm.hexagon.S2.asl.i.r.acc
    1, // llvm.hexagon.S2.asl.i.r.and
    1, // llvm.hexagon.S2.asl.i.r.nac
    1, // llvm.hexagon.S2.asl.i.r.or
    1, // llvm.hexagon.S2.asl.i.r.sat
    1, // llvm.hexagon.S2.asl.i.r.xacc
    1, // llvm.hexagon.S2.asl.i.vh
    1, // llvm.hexagon.S2.asl.i.vw
    1, // llvm.hexagon.S2.asl.r.p
    1, // llvm.hexagon.S2.asl.r.p.acc
    1, // llvm.hexagon.S2.asl.r.p.and
    1, // llvm.hexagon.S2.asl.r.p.nac
    1, // llvm.hexagon.S2.asl.r.p.or
    1, // llvm.hexagon.S2.asl.r.p.xor
    1, // llvm.hexagon.S2.asl.r.r
    1, // llvm.hexagon.S2.asl.r.r.acc
    1, // llvm.hexagon.S2.asl.r.r.and
    1, // llvm.hexagon.S2.asl.r.r.nac
    1, // llvm.hexagon.S2.asl.r.r.or
    1, // llvm.hexagon.S2.asl.r.r.sat
    1, // llvm.hexagon.S2.asl.r.vh
    1, // llvm.hexagon.S2.asl.r.vw
    1, // llvm.hexagon.S2.asr.i.p
    1, // llvm.hexagon.S2.asr.i.p.acc
    1, // llvm.hexagon.S2.asr.i.p.and
    1, // llvm.hexagon.S2.asr.i.p.nac
    1, // llvm.hexagon.S2.asr.i.p.or
    1, // llvm.hexagon.S2.asr.i.p.rnd
    1, // llvm.hexagon.S2.asr.i.p.rnd.goodsyntax
    1, // llvm.hexagon.S2.asr.i.r
    1, // llvm.hexagon.S2.asr.i.r.acc
    1, // llvm.hexagon.S2.asr.i.r.and
    1, // llvm.hexagon.S2.asr.i.r.nac
    1, // llvm.hexagon.S2.asr.i.r.or
    1, // llvm.hexagon.S2.asr.i.r.rnd
    1, // llvm.hexagon.S2.asr.i.r.rnd.goodsyntax
    1, // llvm.hexagon.S2.asr.i.svw.trun
    1, // llvm.hexagon.S2.asr.i.vh
    1, // llvm.hexagon.S2.asr.i.vw
    1, // llvm.hexagon.S2.asr.r.p
    1, // llvm.hexagon.S2.asr.r.p.acc
    1, // llvm.hexagon.S2.asr.r.p.and
    1, // llvm.hexagon.S2.asr.r.p.nac
    1, // llvm.hexagon.S2.asr.r.p.or
    1, // llvm.hexagon.S2.asr.r.p.xor
    1, // llvm.hexagon.S2.asr.r.r
    1, // llvm.hexagon.S2.asr.r.r.acc
    1, // llvm.hexagon.S2.asr.r.r.and
    1, // llvm.hexagon.S2.asr.r.r.nac
    1, // llvm.hexagon.S2.asr.r.r.or
    1, // llvm.hexagon.S2.asr.r.r.sat
    1, // llvm.hexagon.S2.asr.r.svw.trun
    1, // llvm.hexagon.S2.asr.r.vh
    1, // llvm.hexagon.S2.asr.r.vw
    1, // llvm.hexagon.S2.brev
    1, // llvm.hexagon.S2.brevp
    1, // llvm.hexagon.S2.cl0
    1, // llvm.hexagon.S2.cl0p
    1, // llvm.hexagon.S2.cl1
    1, // llvm.hexagon.S2.cl1p
    1, // llvm.hexagon.S2.clb
    1, // llvm.hexagon.S2.clbnorm
    1, // llvm.hexagon.S2.clbp
    1, // llvm.hexagon.S2.clrbit.i
    1, // llvm.hexagon.S2.clrbit.r
    1, // llvm.hexagon.S2.ct0
    1, // llvm.hexagon.S2.ct0p
    1, // llvm.hexagon.S2.ct1
    1, // llvm.hexagon.S2.ct1p
    1, // llvm.hexagon.S2.deinterleave
    1, // llvm.hexagon.S2.extractu
    1, // llvm.hexagon.S2.extractu.rp
    1, // llvm.hexagon.S2.extractup
    1, // llvm.hexagon.S2.extractup.rp
    1, // llvm.hexagon.S2.insert
    1, // llvm.hexagon.S2.insert.rp
    1, // llvm.hexagon.S2.insertp
    1, // llvm.hexagon.S2.insertp.rp
    1, // llvm.hexagon.S2.interleave
    1, // llvm.hexagon.S2.lfsp
    1, // llvm.hexagon.S2.lsl.r.p
    1, // llvm.hexagon.S2.lsl.r.p.acc
    1, // llvm.hexagon.S2.lsl.r.p.and
    1, // llvm.hexagon.S2.lsl.r.p.nac
    1, // llvm.hexagon.S2.lsl.r.p.or
    1, // llvm.hexagon.S2.lsl.r.p.xor
    1, // llvm.hexagon.S2.lsl.r.r
    1, // llvm.hexagon.S2.lsl.r.r.acc
    1, // llvm.hexagon.S2.lsl.r.r.and
    1, // llvm.hexagon.S2.lsl.r.r.nac
    1, // llvm.hexagon.S2.lsl.r.r.or
    1, // llvm.hexagon.S2.lsl.r.vh
    1, // llvm.hexagon.S2.lsl.r.vw
    1, // llvm.hexagon.S2.lsr.i.p
    1, // llvm.hexagon.S2.lsr.i.p.acc
    1, // llvm.hexagon.S2.lsr.i.p.and
    1, // llvm.hexagon.S2.lsr.i.p.nac
    1, // llvm.hexagon.S2.lsr.i.p.or
    1, // llvm.hexagon.S2.lsr.i.p.xacc
    1, // llvm.hexagon.S2.lsr.i.r
    1, // llvm.hexagon.S2.lsr.i.r.acc
    1, // llvm.hexagon.S2.lsr.i.r.and
    1, // llvm.hexagon.S2.lsr.i.r.nac
    1, // llvm.hexagon.S2.lsr.i.r.or
    1, // llvm.hexagon.S2.lsr.i.r.xacc
    1, // llvm.hexagon.S2.lsr.i.vh
    1, // llvm.hexagon.S2.lsr.i.vw
    1, // llvm.hexagon.S2.lsr.r.p
    1, // llvm.hexagon.S2.lsr.r.p.acc
    1, // llvm.hexagon.S2.lsr.r.p.and
    1, // llvm.hexagon.S2.lsr.r.p.nac
    1, // llvm.hexagon.S2.lsr.r.p.or
    1, // llvm.hexagon.S2.lsr.r.p.xor
    1, // llvm.hexagon.S2.lsr.r.r
    1, // llvm.hexagon.S2.lsr.r.r.acc
    1, // llvm.hexagon.S2.lsr.r.r.and
    1, // llvm.hexagon.S2.lsr.r.r.nac
    1, // llvm.hexagon.S2.lsr.r.r.or
    1, // llvm.hexagon.S2.lsr.r.vh
    1, // llvm.hexagon.S2.lsr.r.vw
    1, // llvm.hexagon.S2.packhl
    1, // llvm.hexagon.S2.parityp
    1, // llvm.hexagon.S2.setbit.i
    1, // llvm.hexagon.S2.setbit.r
    1, // llvm.hexagon.S2.shuffeb
    1, // llvm.hexagon.S2.shuffeh
    1, // llvm.hexagon.S2.shuffob
    1, // llvm.hexagon.S2.shuffoh
    1, // llvm.hexagon.S2.svsathb
    1, // llvm.hexagon.S2.svsathub
    1, // llvm.hexagon.S2.tableidxb.goodsyntax
    1, // llvm.hexagon.S2.tableidxd.goodsyntax
    1, // llvm.hexagon.S2.tableidxh.goodsyntax
    1, // llvm.hexagon.S2.tableidxw.goodsyntax
    1, // llvm.hexagon.S2.togglebit.i
    1, // llvm.hexagon.S2.togglebit.r
    1, // llvm.hexagon.S2.tstbit.i
    1, // llvm.hexagon.S2.tstbit.r
    1, // llvm.hexagon.S2.valignib
    1, // llvm.hexagon.S2.valignrb
    1, // llvm.hexagon.S2.vcnegh
    1, // llvm.hexagon.S2.vcrotate
    1, // llvm.hexagon.S2.vrcnegh
    1, // llvm.hexagon.S2.vrndpackwh
    1, // llvm.hexagon.S2.vrndpackwhs
    1, // llvm.hexagon.S2.vsathb
    1, // llvm.hexagon.S2.vsathb.nopack
    1, // llvm.hexagon.S2.vsathub
    1, // llvm.hexagon.S2.vsathub.nopack
    1, // llvm.hexagon.S2.vsatwh
    1, // llvm.hexagon.S2.vsatwh.nopack
    1, // llvm.hexagon.S2.vsatwuh
    1, // llvm.hexagon.S2.vsatwuh.nopack
    1, // llvm.hexagon.S2.vsplatrb
    1, // llvm.hexagon.S2.vsplatrh
    1, // llvm.hexagon.S2.vspliceib
    1, // llvm.hexagon.S2.vsplicerb
    1, // llvm.hexagon.S2.vsxtbh
    1, // llvm.hexagon.S2.vsxthw
    1, // llvm.hexagon.S2.vtrunehb
    1, // llvm.hexagon.S2.vtrunewh
    1, // llvm.hexagon.S2.vtrunohb
    1, // llvm.hexagon.S2.vtrunowh
    1, // llvm.hexagon.S2.vzxtbh
    1, // llvm.hexagon.S2.vzxthw
    1, // llvm.hexagon.S4.addaddi
    1, // llvm.hexagon.S4.addi.asl.ri
    1, // llvm.hexagon.S4.addi.lsr.ri
    1, // llvm.hexagon.S4.andi.asl.ri
    1, // llvm.hexagon.S4.andi.lsr.ri
    1, // llvm.hexagon.S4.clbaddi
    1, // llvm.hexagon.S4.clbpaddi
    1, // llvm.hexagon.S4.clbpnorm
    1, // llvm.hexagon.S4.extract
    1, // llvm.hexagon.S4.extract.rp
    1, // llvm.hexagon.S4.extractp
    1, // llvm.hexagon.S4.extractp.rp
    1, // llvm.hexagon.S4.lsli
    1, // llvm.hexagon.S4.ntstbit.i
    1, // llvm.hexagon.S4.ntstbit.r
    1, // llvm.hexagon.S4.or.andi
    1, // llvm.hexagon.S4.or.andix
    1, // llvm.hexagon.S4.or.ori
    1, // llvm.hexagon.S4.ori.asl.ri
    1, // llvm.hexagon.S4.ori.lsr.ri
    1, // llvm.hexagon.S4.parity
    1, // llvm.hexagon.S4.subaddi
    1, // llvm.hexagon.S4.subi.asl.ri
    1, // llvm.hexagon.S4.subi.lsr.ri
    1, // llvm.hexagon.S4.vrcrotate
    1, // llvm.hexagon.S4.vrcrotate.acc
    1, // llvm.hexagon.S4.vxaddsubh
    1, // llvm.hexagon.S4.vxaddsubhr
    1, // llvm.hexagon.S4.vxaddsubw
    1, // llvm.hexagon.S4.vxsubaddh
    1, // llvm.hexagon.S4.vxsubaddhr
    1, // llvm.hexagon.S4.vxsubaddw
    1, // llvm.hexagon.S5.asrhub.rnd.sat.goodsyntax
    1, // llvm.hexagon.S5.asrhub.sat
    1, // llvm.hexagon.S5.popcountp
    1, // llvm.hexagon.S5.vasrhrnd.goodsyntax
    1, // llvm.hexagon.SI.to.SXTHI.asrh
    2, // llvm.hexagon.circ.ldd
    12, // llvm.init.trampoline
    4, // llvm.invariant.end
    13, // llvm.invariant.start
    13, // llvm.lifetime.end
    13, // llvm.lifetime.start
    1, // llvm.log
    1, // llvm.log10
    1, // llvm.log2
    9, // llvm.longjmp
    14, // llvm.memcpy
    14, // llvm.memmove
    12, // llvm.memset
    2, // llvm.mips.absq.s.ph
    2, // llvm.mips.absq.s.qb
    2, // llvm.mips.absq.s.w
    1, // llvm.mips.add.a.b
    1, // llvm.mips.add.a.d
    1, // llvm.mips.add.a.h
    1, // llvm.mips.add.a.w
    1, // llvm.mips.addq.ph
    1, // llvm.mips.addq.s.ph
    2, // llvm.mips.addq.s.w
    1, // llvm.mips.addqh.ph
    1, // llvm.mips.addqh.r.ph
    1, // llvm.mips.addqh.r.w
    1, // llvm.mips.addqh.w
    1, // llvm.mips.adds.a.b
    1, // llvm.mips.adds.a.d
    1, // llvm.mips.adds.a.h
    1, // llvm.mips.adds.a.w
    1, // llvm.mips.adds.s.b
    1, // llvm.mips.adds.s.d
    1, // llvm.mips.adds.s.h
    1, // llvm.mips.adds.s.w
    1, // llvm.mips.adds.u.b
    1, // llvm.mips.adds.u.d
    1, // llvm.mips.adds.u.h
    1, // llvm.mips.adds.u.w
    2, // llvm.mips.addsc
    2, // llvm.mips.addu.ph
    1, // llvm.mips.addu.qb
    2, // llvm.mips.addu.s.ph
    1, // llvm.mips.addu.s.qb
    1, // llvm.mips.adduh.qb
    1, // llvm.mips.adduh.r.qb
    1, // llvm.mips.addv.b
    1, // llvm.mips.addv.d
    1, // llvm.mips.addv.h
    1, // llvm.mips.addv.w
    1, // llvm.mips.addvi.b
    1, // llvm.mips.addvi.d
    1, // llvm.mips.addvi.h
    1, // llvm.mips.addvi.w
    2, // llvm.mips.addwc
    1, // llvm.mips.and.v
    1, // llvm.mips.andi.b
    1, // llvm.mips.append
    1, // llvm.mips.asub.s.b
    1, // llvm.mips.asub.s.d
    1, // llvm.mips.asub.s.h
    1, // llvm.mips.asub.s.w
    1, // llvm.mips.asub.u.b
    1, // llvm.mips.asub.u.d
    1, // llvm.mips.asub.u.h
    1, // llvm.mips.asub.u.w
    1, // llvm.mips.ave.s.b
    1, // llvm.mips.ave.s.d
    1, // llvm.mips.ave.s.h
    1, // llvm.mips.ave.s.w
    1, // llvm.mips.ave.u.b
    1, // llvm.mips.ave.u.d
    1, // llvm.mips.ave.u.h
    1, // llvm.mips.ave.u.w
    1, // llvm.mips.aver.s.b
    1, // llvm.mips.aver.s.d
    1, // llvm.mips.aver.s.h
    1, // llvm.mips.aver.s.w
    1, // llvm.mips.aver.u.b
    1, // llvm.mips.aver.u.d
    1, // llvm.mips.aver.u.h
    1, // llvm.mips.aver.u.w
    1, // llvm.mips.balign
    1, // llvm.mips.bclr.b
    1, // llvm.mips.bclr.d
    1, // llvm.mips.bclr.h
    1, // llvm.mips.bclr.w
    1, // llvm.mips.bclri.b
    1, // llvm.mips.bclri.d
    1, // llvm.mips.bclri.h
    1, // llvm.mips.bclri.w
    1, // llvm.mips.binsl.b
    1, // llvm.mips.binsl.d
    1, // llvm.mips.binsl.h
    1, // llvm.mips.binsl.w
    1, // llvm.mips.binsli.b
    1, // llvm.mips.binsli.d
    1, // llvm.mips.binsli.h
    1, // llvm.mips.binsli.w
    1, // llvm.mips.binsr.b
    1, // llvm.mips.binsr.d
    1, // llvm.mips.binsr.h
    1, // llvm.mips.binsr.w
    1, // llvm.mips.binsri.b
    1, // llvm.mips.binsri.d
    1, // llvm.mips.binsri.h
    1, // llvm.mips.binsri.w
    1, // llvm.mips.bitrev
    1, // llvm.mips.bmnz.v
    1, // llvm.mips.bmnzi.b
    1, // llvm.mips.bmz.v
    1, // llvm.mips.bmzi.b
    1, // llvm.mips.bneg.b
    1, // llvm.mips.bneg.d
    1, // llvm.mips.bneg.h
    1, // llvm.mips.bneg.w
    1, // llvm.mips.bnegi.b
    1, // llvm.mips.bnegi.d
    1, // llvm.mips.bnegi.h
    1, // llvm.mips.bnegi.w
    1, // llvm.mips.bnz.b
    1, // llvm.mips.bnz.d
    1, // llvm.mips.bnz.h
    1, // llvm.mips.bnz.v
    1, // llvm.mips.bnz.w
    3, // llvm.mips.bposge32
    1, // llvm.mips.bsel.v
    1, // llvm.mips.bseli.b
    1, // llvm.mips.bset.b
    1, // llvm.mips.bset.d
    1, // llvm.mips.bset.h
    1, // llvm.mips.bset.w
    1, // llvm.mips.bseti.b
    1, // llvm.mips.bseti.d
    1, // llvm.mips.bseti.h
    1, // llvm.mips.bseti.w
    1, // llvm.mips.bz.b
    1, // llvm.mips.bz.d
    1, // llvm.mips.bz.h
    1, // llvm.mips.bz.v
    1, // llvm.mips.bz.w
    1, // llvm.mips.ceq.b
    1, // llvm.mips.ceq.d
    1, // llvm.mips.ceq.h
    1, // llvm.mips.ceq.w
    1, // llvm.mips.ceqi.b
    1, // llvm.mips.ceqi.d
    1, // llvm.mips.ceqi.h
    1, // llvm.mips.ceqi.w
    2, // llvm.mips.cfcmsa
    1, // llvm.mips.cle.s.b
    1, // llvm.mips.cle.s.d
    1, // llvm.mips.cle.s.h
    1, // llvm.mips.cle.s.w
    1, // llvm.mips.cle.u.b
    1, // llvm.mips.cle.u.d
    1, // llvm.mips.cle.u.h
    1, // llvm.mips.cle.u.w
    1, // llvm.mips.clei.s.b
    1, // llvm.mips.clei.s.d
    1, // llvm.mips.clei.s.h
    1, // llvm.mips.clei.s.w
    1, // llvm.mips.clei.u.b
    1, // llvm.mips.clei.u.d
    1, // llvm.mips.clei.u.h
    1, // llvm.mips.clei.u.w
    1, // llvm.mips.clt.s.b
    1, // llvm.mips.clt.s.d
    1, // llvm.mips.clt.s.h
    1, // llvm.mips.clt.s.w
    1, // llvm.mips.clt.u.b
    1, // llvm.mips.clt.u.d
    1, // llvm.mips.clt.u.h
    1, // llvm.mips.clt.u.w
    1, // llvm.mips.clti.s.b
    1, // llvm.mips.clti.s.d
    1, // llvm.mips.clti.s.h
    1, // llvm.mips.clti.s.w
    1, // llvm.mips.clti.u.b
    1, // llvm.mips.clti.u.d
    1, // llvm.mips.clti.u.h
    1, // llvm.mips.clti.u.w
    2, // llvm.mips.cmp.eq.ph
    2, // llvm.mips.cmp.le.ph
    2, // llvm.mips.cmp.lt.ph
    2, // llvm.mips.cmpgdu.eq.qb
    2, // llvm.mips.cmpgdu.le.qb
    2, // llvm.mips.cmpgdu.lt.qb
    2, // llvm.mips.cmpgu.eq.qb
    2, // llvm.mips.cmpgu.le.qb
    2, // llvm.mips.cmpgu.lt.qb
    2, // llvm.mips.cmpu.eq.qb
    2, // llvm.mips.cmpu.le.qb
    2, // llvm.mips.cmpu.lt.qb
    1, // llvm.mips.copy.s.b
    1, // llvm.mips.copy.s.d
    1, // llvm.mips.copy.s.h
    1, // llvm.mips.copy.s.w
    1, // llvm.mips.copy.u.b
    1, // llvm.mips.copy.u.d
    1, // llvm.mips.copy.u.h
    1, // llvm.mips.copy.u.w
    2, // llvm.mips.ctcmsa
    1, // llvm.mips.div.s.b
    1, // llvm.mips.div.s.d
    1, // llvm.mips.div.s.h
    1, // llvm.mips.div.s.w
    1, // llvm.mips.div.u.b
    1, // llvm.mips.div.u.d
    1, // llvm.mips.div.u.h
    1, // llvm.mips.div.u.w
    1, // llvm.mips.dlsa
    1, // llvm.mips.dotp.s.d
    1, // llvm.mips.dotp.s.h
    1, // llvm.mips.dotp.s.w
    1, // llvm.mips.dotp.u.d
    1, // llvm.mips.dotp.u.h
    1, // llvm.mips.dotp.u.w
    1, // llvm.mips.dpa.w.ph
    1, // llvm.mips.dpadd.s.d
    1, // llvm.mips.dpadd.s.h
    1, // llvm.mips.dpadd.s.w
    1, // llvm.mips.dpadd.u.d
    1, // llvm.mips.dpadd.u.h
    1, // llvm.mips.dpadd.u.w
    2, // llvm.mips.dpaq.s.w.ph
    2, // llvm.mips.dpaq.sa.l.w
    2, // llvm.mips.dpaqx.s.w.ph
    2, // llvm.mips.dpaqx.sa.w.ph
    1, // llvm.mips.dpau.h.qbl
    1, // llvm.mips.dpau.h.qbr
    1, // llvm.mips.dpax.w.ph
    1, // llvm.mips.dps.w.ph
    2, // llvm.mips.dpsq.s.w.ph
    2, // llvm.mips.dpsq.sa.l.w
    2, // llvm.mips.dpsqx.s.w.ph
    2, // llvm.mips.dpsqx.sa.w.ph
    1, // llvm.mips.dpsu.h.qbl
    1, // llvm.mips.dpsu.h.qbr
    1, // llvm.mips.dpsub.s.d
    1, // llvm.mips.dpsub.s.h
    1, // llvm.mips.dpsub.s.w
    1, // llvm.mips.dpsub.u.d
    1, // llvm.mips.dpsub.u.h
    1, // llvm.mips.dpsub.u.w
    1, // llvm.mips.dpsx.w.ph
    2, // llvm.mips.extp
    2, // llvm.mips.extpdp
    2, // llvm.mips.extr.r.w
    2, // llvm.mips.extr.rs.w
    2, // llvm.mips.extr.s.h
    2, // llvm.mips.extr.w
    1, // llvm.mips.fadd.d
    1, // llvm.mips.fadd.w
    1, // llvm.mips.fcaf.d
    1, // llvm.mips.fcaf.w
    1, // llvm.mips.fceq.d
    1, // llvm.mips.fceq.w
    1, // llvm.mips.fclass.d
    1, // llvm.mips.fclass.w
    1, // llvm.mips.fcle.d
    1, // llvm.mips.fcle.w
    1, // llvm.mips.fclt.d
    1, // llvm.mips.fclt.w
    1, // llvm.mips.fcne.d
    1, // llvm.mips.fcne.w
    1, // llvm.mips.fcor.d
    1, // llvm.mips.fcor.w
    1, // llvm.mips.fcueq.d
    1, // llvm.mips.fcueq.w
    1, // llvm.mips.fcule.d
    1, // llvm.mips.fcule.w
    1, // llvm.mips.fcult.d
    1, // llvm.mips.fcult.w
    1, // llvm.mips.fcun.d
    1, // llvm.mips.fcun.w
    1, // llvm.mips.fcune.d
    1, // llvm.mips.fcune.w
    1, // llvm.mips.fdiv.d
    1, // llvm.mips.fdiv.w
    1, // llvm.mips.fexdo.h
    1, // llvm.mips.fexdo.w
    1, // llvm.mips.fexp2.d
    1, // llvm.mips.fexp2.w
    1, // llvm.mips.fexupl.d
    1, // llvm.mips.fexupl.w
    1, // llvm.mips.fexupr.d
    1, // llvm.mips.fexupr.w
    1, // llvm.mips.ffint.s.d
    1, // llvm.mips.ffint.s.w
    1, // llvm.mips.ffint.u.d
    1, // llvm.mips.ffint.u.w
    1, // llvm.mips.ffql.d
    1, // llvm.mips.ffql.w
    1, // llvm.mips.ffqr.d
    1, // llvm.mips.ffqr.w
    1, // llvm.mips.fill.b
    1, // llvm.mips.fill.d
    1, // llvm.mips.fill.h
    1, // llvm.mips.fill.w
    1, // llvm.mips.flog2.d
    1, // llvm.mips.flog2.w
    1, // llvm.mips.fmadd.d
    1, // llvm.mips.fmadd.w
    1, // llvm.mips.fmax.a.d
    1, // llvm.mips.fmax.a.w
    1, // llvm.mips.fmax.d
    1, // llvm.mips.fmax.w
    1, // llvm.mips.fmin.a.d
    1, // llvm.mips.fmin.a.w
    1, // llvm.mips.fmin.d
    1, // llvm.mips.fmin.w
    1, // llvm.mips.fmsub.d
    1, // llvm.mips.fmsub.w
    1, // llvm.mips.fmul.d
    1, // llvm.mips.fmul.w
    1, // llvm.mips.frcp.d
    1, // llvm.mips.frcp.w
    1, // llvm.mips.frint.d
    1, // llvm.mips.frint.w
    1, // llvm.mips.frsqrt.d
    1, // llvm.mips.frsqrt.w
    1, // llvm.mips.fsaf.d
    1, // llvm.mips.fsaf.w
    1, // llvm.mips.fseq.d
    1, // llvm.mips.fseq.w
    1, // llvm.mips.fsle.d
    1, // llvm.mips.fsle.w
    1, // llvm.mips.fslt.d
    1, // llvm.mips.fslt.w
    1, // llvm.mips.fsne.d
    1, // llvm.mips.fsne.w
    1, // llvm.mips.fsor.d
    1, // llvm.mips.fsor.w
    1, // llvm.mips.fsqrt.d
    1, // llvm.mips.fsqrt.w
    1, // llvm.mips.fsub.d
    1, // llvm.mips.fsub.w
    1, // llvm.mips.fsueq.d
    1, // llvm.mips.fsueq.w
    1, // llvm.mips.fsule.d
    1, // llvm.mips.fsule.w
    1, // llvm.mips.fsult.d
    1, // llvm.mips.fsult.w
    1, // llvm.mips.fsun.d
    1, // llvm.mips.fsun.w
    1, // llvm.mips.fsune.d
    1, // llvm.mips.fsune.w
    1, // llvm.mips.ftint.s.d
    1, // llvm.mips.ftint.s.w
    1, // llvm.mips.ftint.u.d
    1, // llvm.mips.ftint.u.w
    1, // llvm.mips.ftq.h
    1, // llvm.mips.ftq.w
    1, // llvm.mips.ftrunc.s.d
    1, // llvm.mips.ftrunc.s.w
    1, // llvm.mips.ftrunc.u.d
    1, // llvm.mips.ftrunc.u.w
    1, // llvm.mips.hadd.s.d
    1, // llvm.mips.hadd.s.h
    1, // llvm.mips.hadd.s.w
    1, // llvm.mips.hadd.u.d
    1, // llvm.mips.hadd.u.h
    1, // llvm.mips.hadd.u.w
    1, // llvm.mips.hsub.s.d
    1, // llvm.mips.hsub.s.h
    1, // llvm.mips.hsub.s.w
    1, // llvm.mips.hsub.u.d
    1, // llvm.mips.hsub.u.h
    1, // llvm.mips.hsub.u.w
    1, // llvm.mips.ilvev.b
    1, // llvm.mips.ilvev.d
    1, // llvm.mips.ilvev.h
    1, // llvm.mips.ilvev.w
    1, // llvm.mips.ilvl.b
    1, // llvm.mips.ilvl.d
    1, // llvm.mips.ilvl.h
    1, // llvm.mips.ilvl.w
    1, // llvm.mips.ilvod.b
    1, // llvm.mips.ilvod.d
    1, // llvm.mips.ilvod.h
    1, // llvm.mips.ilvod.w
    1, // llvm.mips.ilvr.b
    1, // llvm.mips.ilvr.d
    1, // llvm.mips.ilvr.h
    1, // llvm.mips.ilvr.w
    1, // llvm.mips.insert.b
    1, // llvm.mips.insert.d
    1, // llvm.mips.insert.h
    1, // llvm.mips.insert.w
    3, // llvm.mips.insv
    1, // llvm.mips.insve.b
    1, // llvm.mips.insve.d
    1, // llvm.mips.insve.h
    1, // llvm.mips.insve.w
    3, // llvm.mips.lbux
    3, // llvm.mips.ld.b
    3, // llvm.mips.ld.d
    3, // llvm.mips.ld.h
    3, // llvm.mips.ld.w
    1, // llvm.mips.ldi.b
    1, // llvm.mips.ldi.d
    1, // llvm.mips.ldi.h
    1, // llvm.mips.ldi.w
    3, // llvm.mips.lhx
    1, // llvm.mips.lsa
    3, // llvm.mips.lwx
    1, // llvm.mips.madd
    1, // llvm.mips.madd.q.h
    1, // llvm.mips.madd.q.w
    1, // llvm.mips.maddr.q.h
    1, // llvm.mips.maddr.q.w
    1, // llvm.mips.maddu
    1, // llvm.mips.maddv.b
    1, // llvm.mips.maddv.d
    1, // llvm.mips.maddv.h
    1, // llvm.mips.maddv.w
    2, // llvm.mips.maq.s.w.phl
    2, // llvm.mips.maq.s.w.phr
    2, // llvm.mips.maq.sa.w.phl
    2, // llvm.mips.maq.sa.w.phr
    1, // llvm.mips.max.a.b
    1, // llvm.mips.max.a.d
    1, // llvm.mips.max.a.h
    1, // llvm.mips.max.a.w
    1, // llvm.mips.max.s.b
    1, // llvm.mips.max.s.d
    1, // llvm.mips.max.s.h
    1, // llvm.mips.max.s.w
    1, // llvm.mips.max.u.b
    1, // llvm.mips.max.u.d
    1, // llvm.mips.max.u.h
    1, // llvm.mips.max.u.w
    1, // llvm.mips.maxi.s.b
    1, // llvm.mips.maxi.s.d
    1, // llvm.mips.maxi.s.h
    1, // llvm.mips.maxi.s.w
    1, // llvm.mips.maxi.u.b
    1, // llvm.mips.maxi.u.d
    1, // llvm.mips.maxi.u.h
    1, // llvm.mips.maxi.u.w
    1, // llvm.mips.min.a.b
    1, // llvm.mips.min.a.d
    1, // llvm.mips.min.a.h
    1, // llvm.mips.min.a.w
    1, // llvm.mips.min.s.b
    1, // llvm.mips.min.s.d
    1, // llvm.mips.min.s.h
    1, // llvm.mips.min.s.w
    1, // llvm.mips.min.u.b
    1, // llvm.mips.min.u.d
    1, // llvm.mips.min.u.h
    1, // llvm.mips.min.u.w
    1, // llvm.mips.mini.s.b
    1, // llvm.mips.mini.s.d
    1, // llvm.mips.mini.s.h
    1, // llvm.mips.mini.s.w
    1, // llvm.mips.mini.u.b
    1, // llvm.mips.mini.u.d
    1, // llvm.mips.mini.u.h
    1, // llvm.mips.mini.u.w
    1, // llvm.mips.mod.s.b
    1, // llvm.mips.mod.s.d
    1, // llvm.mips.mod.s.h
    1, // llvm.mips.mod.s.w
    1, // llvm.mips.mod.u.b
    1, // llvm.mips.mod.u.d
    1, // llvm.mips.mod.u.h
    1, // llvm.mips.mod.u.w
    1, // llvm.mips.modsub
    1, // llvm.mips.move.v
    1, // llvm.mips.msub
    1, // llvm.mips.msub.q.h
    1, // llvm.mips.msub.q.w
    1, // llvm.mips.msubr.q.h
    1, // llvm.mips.msubr.q.w
    1, // llvm.mips.msubu
    1, // llvm.mips.msubv.b
    1, // llvm.mips.msubv.d
    1, // llvm.mips.msubv.h
    1, // llvm.mips.msubv.w
    2, // llvm.mips.mthlip
    2, // llvm.mips.mul.ph
    1, // llvm.mips.mul.q.h
    1, // llvm.mips.mul.q.w
    2, // llvm.mips.mul.s.ph
    2, // llvm.mips.muleq.s.w.phl
    2, // llvm.mips.muleq.s.w.phr
    2, // llvm.mips.muleu.s.ph.qbl
    2, // llvm.mips.muleu.s.ph.qbr
    2, // llvm.mips.mulq.rs.ph
    2, // llvm.mips.mulq.rs.w
    2, // llvm.mips.mulq.s.ph
    2, // llvm.mips.mulq.s.w
    1, // llvm.mips.mulr.q.h
    1, // llvm.mips.mulr.q.w
    1, // llvm.mips.mulsa.w.ph
    2, // llvm.mips.mulsaq.s.w.ph
    1, // llvm.mips.mult
    1, // llvm.mips.multu
    1, // llvm.mips.mulv.b
    1, // llvm.mips.mulv.d
    1, // llvm.mips.mulv.h
    1, // llvm.mips.mulv.w
    1, // llvm.mips.nloc.b
    1, // llvm.mips.nloc.d
    1, // llvm.mips.nloc.h
    1, // llvm.mips.nloc.w
    1, // llvm.mips.nlzc.b
    1, // llvm.mips.nlzc.d
    1, // llvm.mips.nlzc.h
    1, // llvm.mips.nlzc.w
    1, // llvm.mips.nor.v
    1, // llvm.mips.nori.b
    1, // llvm.mips.or.v
    1, // llvm.mips.ori.b
    1, // llvm.mips.packrl.ph
    1, // llvm.mips.pckev.b
    1, // llvm.mips.pckev.d
    1, // llvm.mips.pckev.h
    1, // llvm.mips.pckev.w
    1, // llvm.mips.pckod.b
    1, // llvm.mips.pckod.d
    1, // llvm.mips.pckod.h
    1, // llvm.mips.pckod.w
    1, // llvm.mips.pcnt.b
    1, // llvm.mips.pcnt.d
    1, // llvm.mips.pcnt.h
    1, // llvm.mips.pcnt.w
    3, // llvm.mips.pick.ph
    3, // llvm.mips.pick.qb
    1, // llvm.mips.preceq.w.phl
    1, // llvm.mips.preceq.w.phr
    1, // llvm.mips.precequ.ph.qbl
    1, // llvm.mips.precequ.ph.qbla
    1, // llvm.mips.precequ.ph.qbr
    1, // llvm.mips.precequ.ph.qbra
    1, // llvm.mips.preceu.ph.qbl
    1, // llvm.mips.preceu.ph.qbla
    1, // llvm.mips.preceu.ph.qbr
    1, // llvm.mips.preceu.ph.qbra
    2, // llvm.mips.precr.qb.ph
    1, // llvm.mips.precr.sra.ph.w
    1, // llvm.mips.precr.sra.r.ph.w
    1, // llvm.mips.precrq.ph.w
    1, // llvm.mips.precrq.qb.ph
    2, // llvm.mips.precrq.rs.ph.w
    2, // llvm.mips.precrqu.s.qb.ph
    1, // llvm.mips.prepend
    1, // llvm.mips.raddu.w.qb
    3, // llvm.mips.rddsp
    1, // llvm.mips.repl.ph
    1, // llvm.mips.repl.qb
    1, // llvm.mips.sat.s.b
    1, // llvm.mips.sat.s.d
    1, // llvm.mips.sat.s.h
    1, // llvm.mips.sat.s.w
    1, // llvm.mips.sat.u.b
    1, // llvm.mips.sat.u.d
    1, // llvm.mips.sat.u.h
    1, // llvm.mips.sat.u.w
    1, // llvm.mips.shf.b
    1, // llvm.mips.shf.h
    1, // llvm.mips.shf.w
    1, // llvm.mips.shilo
    2, // llvm.mips.shll.ph
    2, // llvm.mips.shll.qb
    2, // llvm.mips.shll.s.ph
    2, // llvm.mips.shll.s.w
    1, // llvm.mips.shra.ph
    1, // llvm.mips.shra.qb
    1, // llvm.mips.shra.r.ph
    1, // llvm.mips.shra.r.qb
    1, // llvm.mips.shra.r.w
    1, // llvm.mips.shrl.ph
    1, // llvm.mips.shrl.qb
    1, // llvm.mips.sld.b
    1, // llvm.mips.sld.d
    1, // llvm.mips.sld.h
    1, // llvm.mips.sld.w
    1, // llvm.mips.sldi.b
    1, // llvm.mips.sldi.d
    1, // llvm.mips.sldi.h
    1, // llvm.mips.sldi.w
    1, // llvm.mips.sll.b
    1, // llvm.mips.sll.d
    1, // llvm.mips.sll.h
    1, // llvm.mips.sll.w
    1, // llvm.mips.slli.b
    1, // llvm.mips.slli.d
    1, // llvm.mips.slli.h
    1, // llvm.mips.slli.w
    1, // llvm.mips.splat.b
    1, // llvm.mips.splat.d
    1, // llvm.mips.splat.h
    1, // llvm.mips.splat.w
    1, // llvm.mips.splati.b
    1, // llvm.mips.splati.d
    1, // llvm.mips.splati.h
    1, // llvm.mips.splati.w
    1, // llvm.mips.sra.b
    1, // llvm.mips.sra.d
    1, // llvm.mips.sra.h
    1, // llvm.mips.sra.w
    1, // llvm.mips.srai.b
    1, // llvm.mips.srai.d
    1, // llvm.mips.srai.h
    1, // llvm.mips.srai.w
    1, // llvm.mips.srar.b
    1, // llvm.mips.srar.d
    1, // llvm.mips.srar.h
    1, // llvm.mips.srar.w
    1, // llvm.mips.srari.b
    1, // llvm.mips.srari.d
    1, // llvm.mips.srari.h
    1, // llvm.mips.srari.w
    1, // llvm.mips.srl.b
    1, // llvm.mips.srl.d
    1, // llvm.mips.srl.h
    1, // llvm.mips.srl.w
    1, // llvm.mips.srli.b
    1, // llvm.mips.srli.d
    1, // llvm.mips.srli.h
    1, // llvm.mips.srli.w
    1, // llvm.mips.srlr.b
    1, // llvm.mips.srlr.d
    1, // llvm.mips.srlr.h
    1, // llvm.mips.srlr.w
    1, // llvm.mips.srlri.b
    1, // llvm.mips.srlri.d
    1, // llvm.mips.srlri.h
    1, // llvm.mips.srlri.w
    2, // llvm.mips.st.b
    2, // llvm.mips.st.d
    2, // llvm.mips.st.h
    2, // llvm.mips.st.w
    1, // llvm.mips.subq.ph
    1, // llvm.mips.subq.s.ph
    2, // llvm.mips.subq.s.w
    1, // llvm.mips.subqh.ph
    1, // llvm.mips.subqh.r.ph
    1, // llvm.mips.subqh.r.w
    1, // llvm.mips.subqh.w
    1, // llvm.mips.subs.s.b
    1, // llvm.mips.subs.s.d
    1, // llvm.mips.subs.s.h
    1, // llvm.mips.subs.s.w
    1, // llvm.mips.subs.u.b
    1, // llvm.mips.subs.u.d
    1, // llvm.mips.subs.u.h
    1, // llvm.mips.subs.u.w
    1, // llvm.mips.subsus.u.b
    1, // llvm.mips.subsus.u.d
    1, // llvm.mips.subsus.u.h
    1, // llvm.mips.subsus.u.w
    1, // llvm.mips.subsuu.s.b
    1, // llvm.mips.subsuu.s.d
    1, // llvm.mips.subsuu.s.h
    1, // llvm.mips.subsuu.s.w
    2, // llvm.mips.subu.ph
    1, // llvm.mips.subu.qb
    2, // llvm.mips.subu.s.ph
    1, // llvm.mips.subu.s.qb
    1, // llvm.mips.subuh.qb
    1, // llvm.mips.subuh.r.qb
    1, // llvm.mips.subv.b
    1, // llvm.mips.subv.d
    1, // llvm.mips.subv.h
    1, // llvm.mips.subv.w
    1, // llvm.mips.subvi.b
    1, // llvm.mips.subvi.d
    1, // llvm.mips.subvi.h
    1, // llvm.mips.subvi.w
    1, // llvm.mips.vshf.b
    1, // llvm.mips.vshf.d
    1, // llvm.mips.vshf.h
    1, // llvm.mips.vshf.w
    2, // llvm.mips.wrdsp
    1, // llvm.mips.xor.v
    1, // llvm.mips.xori.b
    1, // llvm.nearbyint
    1, // llvm.nvvm.abs.i
    1, // llvm.nvvm.abs.ll
    1, // llvm.nvvm.add.rm.d
    1, // llvm.nvvm.add.rm.f
    1, // llvm.nvvm.add.rm.ftz.f
    1, // llvm.nvvm.add.rn.d
    1, // llvm.nvvm.add.rn.f
    1, // llvm.nvvm.add.rn.ftz.f
    1, // llvm.nvvm.add.rp.d
    1, // llvm.nvvm.add.rp.f
    1, // llvm.nvvm.add.rp.ftz.f
    1, // llvm.nvvm.add.rz.d
    1, // llvm.nvvm.add.rz.f
    1, // llvm.nvvm.add.rz.ftz.f
    12, // llvm.nvvm.atomic.load.add.f32
    12, // llvm.nvvm.atomic.load.dec.32
    12, // llvm.nvvm.atomic.load.inc.32
    8, // llvm.nvvm.barrier0
    8, // llvm.nvvm.barrier0.and
    8, // llvm.nvvm.barrier0.or
    8, // llvm.nvvm.barrier0.popc
    1, // llvm.nvvm.bitcast.d2ll
    1, // llvm.nvvm.bitcast.f2i
    1, // llvm.nvvm.bitcast.i2f
    1, // llvm.nvvm.bitcast.ll2d
    1, // llvm.nvvm.brev32
    1, // llvm.nvvm.brev64
    1, // llvm.nvvm.ceil.d
    1, // llvm.nvvm.ceil.f
    1, // llvm.nvvm.ceil.ftz.f
    1, // llvm.nvvm.clz.i
    1, // llvm.nvvm.clz.ll
    2, // llvm.nvvm.compiler.error
    2, // llvm.nvvm.compiler.warn
    1, // llvm.nvvm.cos.approx.f
    1, // llvm.nvvm.cos.approx.ftz.f
    1, // llvm.nvvm.d2f.rm
    1, // llvm.nvvm.d2f.rm.ftz
    1, // llvm.nvvm.d2f.rn
    1, // llvm.nvvm.d2f.rn.ftz
    1, // llvm.nvvm.d2f.rp
    1, // llvm.nvvm.d2f.rp.ftz
    1, // llvm.nvvm.d2f.rz
    1, // llvm.nvvm.d2f.rz.ftz
    1, // llvm.nvvm.d2i.hi
    1, // llvm.nvvm.d2i.lo
    1, // llvm.nvvm.d2i.rm
    1, // llvm.nvvm.d2i.rn
    1, // llvm.nvvm.d2i.rp
    1, // llvm.nvvm.d2i.rz
    1, // llvm.nvvm.d2ll.rm
    1, // llvm.nvvm.d2ll.rn
    1, // llvm.nvvm.d2ll.rp
    1, // llvm.nvvm.d2ll.rz
    1, // llvm.nvvm.d2ui.rm
    1, // llvm.nvvm.d2ui.rn
    1, // llvm.nvvm.d2ui.rp
    1, // llvm.nvvm.d2ui.rz
    1, // llvm.nvvm.d2ull.rm
    1, // llvm.nvvm.d2ull.rn
    1, // llvm.nvvm.d2ull.rp
    1, // llvm.nvvm.d2ull.rz
    1, // llvm.nvvm.div.approx.f
    1, // llvm.nvvm.div.approx.ftz.f
    1, // llvm.nvvm.div.rm.d
    1, // llvm.nvvm.div.rm.f
    1, // llvm.nvvm.div.rm.ftz.f
    1, // llvm.nvvm.div.rn.d
    1, // llvm.nvvm.div.rn.f
    1, // llvm.nvvm.div.rn.ftz.f
    1, // llvm.nvvm.div.rp.d
    1, // llvm.nvvm.div.rp.f
    1, // llvm.nvvm.div.rp.ftz.f
    1, // llvm.nvvm.div.rz.d
    1, // llvm.nvvm.div.rz.f
    1, // llvm.nvvm.div.rz.ftz.f
    1, // llvm.nvvm.ex2.approx.d
    1, // llvm.nvvm.ex2.approx.f
    1, // llvm.nvvm.ex2.approx.ftz.f
    1, // llvm.nvvm.f2h.rn
    1, // llvm.nvvm.f2h.rn.ftz
    1, // llvm.nvvm.f2i.rm
    1, // llvm.nvvm.f2i.rm.ftz
    1, // llvm.nvvm.f2i.rn
    1, // llvm.nvvm.f2i.rn.ftz
    1, // llvm.nvvm.f2i.rp
    1, // llvm.nvvm.f2i.rp.ftz
    1, // llvm.nvvm.f2i.rz
    1, // llvm.nvvm.f2i.rz.ftz
    1, // llvm.nvvm.f2ll.rm
    1, // llvm.nvvm.f2ll.rm.ftz
    1, // llvm.nvvm.f2ll.rn
    1, // llvm.nvvm.f2ll.rn.ftz
    1, // llvm.nvvm.f2ll.rp
    1, // llvm.nvvm.f2ll.rp.ftz
    1, // llvm.nvvm.f2ll.rz
    1, // llvm.nvvm.f2ll.rz.ftz
    1, // llvm.nvvm.f2ui.rm
    1, // llvm.nvvm.f2ui.rm.ftz
    1, // llvm.nvvm.f2ui.rn
    1, // llvm.nvvm.f2ui.rn.ftz
    1, // llvm.nvvm.f2ui.rp
    1, // llvm.nvvm.f2ui.rp.ftz
    1, // llvm.nvvm.f2ui.rz
    1, // llvm.nvvm.f2ui.rz.ftz
    1, // llvm.nvvm.f2ull.rm
    1, // llvm.nvvm.f2ull.rm.ftz
    1, // llvm.nvvm.f2ull.rn
    1, // llvm.nvvm.f2ull.rn.ftz
    1, // llvm.nvvm.f2ull.rp
    1, // llvm.nvvm.f2ull.rp.ftz
    1, // llvm.nvvm.f2ull.rz
    1, // llvm.nvvm.f2ull.rz.ftz
    1, // llvm.nvvm.fabs.d
    1, // llvm.nvvm.fabs.f
    1, // llvm.nvvm.fabs.ftz.f
    1, // llvm.nvvm.floor.d
    1, // llvm.nvvm.floor.f
    1, // llvm.nvvm.floor.ftz.f
    1, // llvm.nvvm.fma.rm.d
    1, // llvm.nvvm.fma.rm.f
    1, // llvm.nvvm.fma.rm.ftz.f
    1, // llvm.nvvm.fma.rn.d
    1, // llvm.nvvm.fma.rn.f
    1, // llvm.nvvm.fma.rn.ftz.f
    1, // llvm.nvvm.fma.rp.d
    1, // llvm.nvvm.fma.rp.f
    1, // llvm.nvvm.fma.rp.ftz.f
    1, // llvm.nvvm.fma.rz.d
    1, // llvm.nvvm.fma.rz.f
    1, // llvm.nvvm.fma.rz.ftz.f
    1, // llvm.nvvm.fmax.d
    1, // llvm.nvvm.fmax.f
    1, // llvm.nvvm.fmax.ftz.f
    1, // llvm.nvvm.fmin.d
    1, // llvm.nvvm.fmin.f
    1, // llvm.nvvm.fmin.ftz.f
    1, // llvm.nvvm.h2f
    1, // llvm.nvvm.i2d.rm
    1, // llvm.nvvm.i2d.rn
    1, // llvm.nvvm.i2d.rp
    1, // llvm.nvvm.i2d.rz
    1, // llvm.nvvm.i2f.rm
    1, // llvm.nvvm.i2f.rn
    1, // llvm.nvvm.i2f.rp
    1, // llvm.nvvm.i2f.rz
    1, // llvm.nvvm.isspacep.const
    1, // llvm.nvvm.isspacep.global
    1, // llvm.nvvm.isspacep.local
    1, // llvm.nvvm.isspacep.shared
    1, // llvm.nvvm.istypep.sampler
    1, // llvm.nvvm.istypep.surface
    1, // llvm.nvvm.istypep.texture
    15, // llvm.nvvm.ldg.global.f
    15, // llvm.nvvm.ldg.global.i
    15, // llvm.nvvm.ldg.global.p
    15, // llvm.nvvm.ldu.global.f
    15, // llvm.nvvm.ldu.global.i
    15, // llvm.nvvm.ldu.global.p
    1, // llvm.nvvm.lg2.approx.d
    1, // llvm.nvvm.lg2.approx.f
    1, // llvm.nvvm.lg2.approx.ftz.f
    1, // llvm.nvvm.ll2d.rm
    1, // llvm.nvvm.ll2d.rn
    1, // llvm.nvvm.ll2d.rp
    1, // llvm.nvvm.ll2d.rz
    1, // llvm.nvvm.ll2f.rm
    1, // llvm.nvvm.ll2f.rn
    1, // llvm.nvvm.ll2f.rp
    1, // llvm.nvvm.ll2f.rz
    1, // llvm.nvvm.lohi.i2d
    1, // llvm.nvvm.max.i
    1, // llvm.nvvm.max.ll
    1, // llvm.nvvm.max.ui
    1, // llvm.nvvm.max.ull
    2, // llvm.nvvm.membar.cta
    2, // llvm.nvvm.membar.gl
    2, // llvm.nvvm.membar.sys
    1, // llvm.nvvm.min.i
    1, // llvm.nvvm.min.ll
    1, // llvm.nvvm.min.ui
    1, // llvm.nvvm.min.ull
    1, // llvm.nvvm.move.double
    1, // llvm.nvvm.move.float
    1, // llvm.nvvm.move.i16
    1, // llvm.nvvm.move.i32
    1, // llvm.nvvm.move.i64
    16, // llvm.nvvm.move.ptr
    1, // llvm.nvvm.mul24.i
    1, // llvm.nvvm.mul24.ui
    1, // llvm.nvvm.mul.rm.d
    1, // llvm.nvvm.mul.rm.f
    1, // llvm.nvvm.mul.rm.ftz.f
    1, // llvm.nvvm.mul.rn.d
    1, // llvm.nvvm.mul.rn.f
    1, // llvm.nvvm.mul.rn.ftz.f
    1, // llvm.nvvm.mul.rp.d
    1, // llvm.nvvm.mul.rp.f
    1, // llvm.nvvm.mul.rp.ftz.f
    1, // llvm.nvvm.mul.rz.d
    1, // llvm.nvvm.mul.rz.f
    1, // llvm.nvvm.mul.rz.ftz.f
    1, // llvm.nvvm.mulhi.i
    1, // llvm.nvvm.mulhi.ll
    1, // llvm.nvvm.mulhi.ui
    1, // llvm.nvvm.mulhi.ull
    1, // llvm.nvvm.popc.i
    1, // llvm.nvvm.popc.ll
    1, // llvm.nvvm.prmt
    1, // llvm.nvvm.ptr.constant.to.gen
    1, // llvm.nvvm.ptr.gen.to.constant
    1, // llvm.nvvm.ptr.gen.to.global
    1, // llvm.nvvm.ptr.gen.to.local
    1, // llvm.nvvm.ptr.gen.to.param
    1, // llvm.nvvm.ptr.gen.to.shared
    1, // llvm.nvvm.ptr.global.to.gen
    1, // llvm.nvvm.ptr.local.to.gen
    1, // llvm.nvvm.ptr.shared.to.gen
    1, // llvm.nvvm.rcp.approx.ftz.d
    1, // llvm.nvvm.rcp.rm.d
    1, // llvm.nvvm.rcp.rm.f
    1, // llvm.nvvm.rcp.rm.ftz.f
    1, // llvm.nvvm.rcp.rn.d
    1, // llvm.nvvm.rcp.rn.f
    1, // llvm.nvvm.rcp.rn.ftz.f
    1, // llvm.nvvm.rcp.rp.d
    1, // llvm.nvvm.rcp.rp.f
    1, // llvm.nvvm.rcp.rp.ftz.f
    1, // llvm.nvvm.rcp.rz.d
    1, // llvm.nvvm.rcp.rz.f
    1, // llvm.nvvm.rcp.rz.ftz.f
    1, // llvm.nvvm.read.ptx.sreg.ctaid.x
    1, // llvm.nvvm.read.ptx.sreg.ctaid.y
    1, // llvm.nvvm.read.ptx.sreg.ctaid.z
    1, // llvm.nvvm.read.ptx.sreg.envreg0
    1, // llvm.nvvm.read.ptx.sreg.envreg1
    1, // llvm.nvvm.read.ptx.sreg.envreg10
    1, // llvm.nvvm.read.ptx.sreg.envreg11
    1, // llvm.nvvm.read.ptx.sreg.envreg12
    1, // llvm.nvvm.read.ptx.sreg.envreg13
    1, // llvm.nvvm.read.ptx.sreg.envreg14
    1, // llvm.nvvm.read.ptx.sreg.envreg15
    1, // llvm.nvvm.read.ptx.sreg.envreg16
    1, // llvm.nvvm.read.ptx.sreg.envreg17
    1, // llvm.nvvm.read.ptx.sreg.envreg18
    1, // llvm.nvvm.read.ptx.sreg.envreg19
    1, // llvm.nvvm.read.ptx.sreg.envreg2
    1, // llvm.nvvm.read.ptx.sreg.envreg20
    1, // llvm.nvvm.read.ptx.sreg.envreg21
    1, // llvm.nvvm.read.ptx.sreg.envreg22
    1, // llvm.nvvm.read.ptx.sreg.envreg23
    1, // llvm.nvvm.read.ptx.sreg.envreg24
    1, // llvm.nvvm.read.ptx.sreg.envreg25
    1, // llvm.nvvm.read.ptx.sreg.envreg26
    1, // llvm.nvvm.read.ptx.sreg.envreg27
    1, // llvm.nvvm.read.ptx.sreg.envreg28
    1, // llvm.nvvm.read.ptx.sreg.envreg29
    1, // llvm.nvvm.read.ptx.sreg.envreg3
    1, // llvm.nvvm.read.ptx.sreg.envreg30
    1, // llvm.nvvm.read.ptx.sreg.envreg31
    1, // llvm.nvvm.read.ptx.sreg.envreg4
    1, // llvm.nvvm.read.ptx.sreg.envreg5
    1, // llvm.nvvm.read.ptx.sreg.envreg6
    1, // llvm.nvvm.read.ptx.sreg.envreg7
    1, // llvm.nvvm.read.ptx.sreg.envreg8
    1, // llvm.nvvm.read.ptx.sreg.envreg9
    1, // llvm.nvvm.read.ptx.sreg.nctaid.x
    1, // llvm.nvvm.read.ptx.sreg.nctaid.y
    1, // llvm.nvvm.read.ptx.sreg.nctaid.z
    1, // llvm.nvvm.read.ptx.sreg.ntid.x
    1, // llvm.nvvm.read.ptx.sreg.ntid.y
    1, // llvm.nvvm.read.ptx.sreg.ntid.z
    1, // llvm.nvvm.read.ptx.sreg.tid.x
    1, // llvm.nvvm.read.ptx.sreg.tid.y
    1, // llvm.nvvm.read.ptx.sreg.tid.z
    1, // llvm.nvvm.read.ptx.sreg.warpsize
    1, // llvm.nvvm.reflect
    1, // llvm.nvvm.rotate.b32
    1, // llvm.nvvm.rotate.b64
    1, // llvm.nvvm.rotate.right.b64
    1, // llvm.nvvm.round.d
    1, // llvm.nvvm.round.f
    1, // llvm.nvvm.round.ftz.f
    1, // llvm.nvvm.rsqrt.approx.d
    1, // llvm.nvvm.rsqrt.approx.f
    1, // llvm.nvvm.rsqrt.approx.ftz.f
    1, // llvm.nvvm.sad.i
    1, // llvm.nvvm.sad.ui
    1, // llvm.nvvm.saturate.d
    1, // llvm.nvvm.saturate.f
    1, // llvm.nvvm.saturate.ftz.f
    1, // llvm.nvvm.sin.approx.f
    1, // llvm.nvvm.sin.approx.ftz.f
    1, // llvm.nvvm.sqrt.approx.f
    1, // llvm.nvvm.sqrt.approx.ftz.f
    1, // llvm.nvvm.sqrt.f
    1, // llvm.nvvm.sqrt.rm.d
    1, // llvm.nvvm.sqrt.rm.f
    1, // llvm.nvvm.sqrt.rm.ftz.f
    1, // llvm.nvvm.sqrt.rn.d
    1, // llvm.nvvm.sqrt.rn.f
    1, // llvm.nvvm.sqrt.rn.ftz.f
    1, // llvm.nvvm.sqrt.rp.d
    1, // llvm.nvvm.sqrt.rp.f
    1, // llvm.nvvm.sqrt.rp.ftz.f
    1, // llvm.nvvm.sqrt.rz.d
    1, // llvm.nvvm.sqrt.rz.f
    1, // llvm.nvvm.sqrt.rz.ftz.f
    2, // llvm.nvvm.suld.1d.array.i16.clamp
    2, // llvm.nvvm.suld.1d.array.i16.trap
    2, // llvm.nvvm.suld.1d.array.i16.zero
    2, // llvm.nvvm.suld.1d.array.i32.clamp
    2, // llvm.nvvm.suld.1d.array.i32.trap
    2, // llvm.nvvm.suld.1d.array.i32.zero
    2, // llvm.nvvm.suld.1d.array.i64.clamp
    2, // llvm.nvvm.suld.1d.array.i64.trap
    2, // llvm.nvvm.suld.1d.array.i64.zero
    2, // llvm.nvvm.suld.1d.array.i8.clamp
    2, // llvm.nvvm.suld.1d.array.i8.trap
    2, // llvm.nvvm.suld.1d.array.i8.zero
    2, // llvm.nvvm.suld.1d.array.v2i16.clamp
    2, // llvm.nvvm.suld.1d.array.v2i16.trap
    2, // llvm.nvvm.suld.1d.array.v2i16.zero
    2, // llvm.nvvm.suld.1d.array.v2i32.clamp
    2, // llvm.nvvm.suld.1d.array.v2i32.trap
    2, // llvm.nvvm.suld.1d.array.v2i32.zero
    2, // llvm.nvvm.suld.1d.array.v2i64.clamp
    2, // llvm.nvvm.suld.1d.array.v2i64.trap
    2, // llvm.nvvm.suld.1d.array.v2i64.zero
    2, // llvm.nvvm.suld.1d.array.v2i8.clamp
    2, // llvm.nvvm.suld.1d.array.v2i8.trap
    2, // llvm.nvvm.suld.1d.array.v2i8.zero
    2, // llvm.nvvm.suld.1d.array.v4i16.clamp
    2, // llvm.nvvm.suld.1d.array.v4i16.trap
    2, // llvm.nvvm.suld.1d.array.v4i16.zero
    2, // llvm.nvvm.suld.1d.array.v4i32.clamp
    2, // llvm.nvvm.suld.1d.array.v4i32.trap
    2, // llvm.nvvm.suld.1d.array.v4i32.zero
    2, // llvm.nvvm.suld.1d.array.v4i8.clamp
    2, // llvm.nvvm.suld.1d.array.v4i8.trap
    2, // llvm.nvvm.suld.1d.array.v4i8.zero
    2, // llvm.nvvm.suld.1d.i16.clamp
    2, // llvm.nvvm.suld.1d.i16.trap
    2, // llvm.nvvm.suld.1d.i16.zero
    2, // llvm.nvvm.suld.1d.i32.clamp
    2, // llvm.nvvm.suld.1d.i32.trap
    2, // llvm.nvvm.suld.1d.i32.zero
    2, // llvm.nvvm.suld.1d.i64.clamp
    2, // llvm.nvvm.suld.1d.i64.trap
    2, // llvm.nvvm.suld.1d.i64.zero
    2, // llvm.nvvm.suld.1d.i8.clamp
    2, // llvm.nvvm.suld.1d.i8.trap
    2, // llvm.nvvm.suld.1d.i8.zero
    2, // llvm.nvvm.suld.1d.v2i16.clamp
    2, // llvm.nvvm.suld.1d.v2i16.trap
    2, // llvm.nvvm.suld.1d.v2i16.zero
    2, // llvm.nvvm.suld.1d.v2i32.clamp
    2, // llvm.nvvm.suld.1d.v2i32.trap
    2, // llvm.nvvm.suld.1d.v2i32.zero
    2, // llvm.nvvm.suld.1d.v2i64.clamp
    2, // llvm.nvvm.suld.1d.v2i64.trap
    2, // llvm.nvvm.suld.1d.v2i64.zero
    2, // llvm.nvvm.suld.1d.v2i8.clamp
    2, // llvm.nvvm.suld.1d.v2i8.trap
    2, // llvm.nvvm.suld.1d.v2i8.zero
    2, // llvm.nvvm.suld.1d.v4i16.clamp
    2, // llvm.nvvm.suld.1d.v4i16.trap
    2, // llvm.nvvm.suld.1d.v4i16.zero
    2, // llvm.nvvm.suld.1d.v4i32.clamp
    2, // llvm.nvvm.suld.1d.v4i32.trap
    2, // llvm.nvvm.suld.1d.v4i32.zero
    2, // llvm.nvvm.suld.1d.v4i8.clamp
    2, // llvm.nvvm.suld.1d.v4i8.trap
    2, // llvm.nvvm.suld.1d.v4i8.zero
    2, // llvm.nvvm.suld.2d.array.i16.clamp
    2, // llvm.nvvm.suld.2d.array.i16.trap
    2, // llvm.nvvm.suld.2d.array.i16.zero
    2, // llvm.nvvm.suld.2d.array.i32.clamp
    2, // llvm.nvvm.suld.2d.array.i32.trap
    2, // llvm.nvvm.suld.2d.array.i32.zero
    2, // llvm.nvvm.suld.2d.array.i64.clamp
    2, // llvm.nvvm.suld.2d.array.i64.trap
    2, // llvm.nvvm.suld.2d.array.i64.zero
    2, // llvm.nvvm.suld.2d.array.i8.clamp
    2, // llvm.nvvm.suld.2d.array.i8.trap
    2, // llvm.nvvm.suld.2d.array.i8.zero
    2, // llvm.nvvm.suld.2d.array.v2i16.clamp
    2, // llvm.nvvm.suld.2d.array.v2i16.trap
    2, // llvm.nvvm.suld.2d.array.v2i16.zero
    2, // llvm.nvvm.suld.2d.array.v2i32.clamp
    2, // llvm.nvvm.suld.2d.array.v2i32.trap
    2, // llvm.nvvm.suld.2d.array.v2i32.zero
    2, // llvm.nvvm.suld.2d.array.v2i64.clamp
    2, // llvm.nvvm.suld.2d.array.v2i64.trap
    2, // llvm.nvvm.suld.2d.array.v2i64.zero
    2, // llvm.nvvm.suld.2d.array.v2i8.clamp
    2, // llvm.nvvm.suld.2d.array.v2i8.trap
    2, // llvm.nvvm.suld.2d.array.v2i8.zero
    2, // llvm.nvvm.suld.2d.array.v4i16.clamp
    2, // llvm.nvvm.suld.2d.array.v4i16.trap
    2, // llvm.nvvm.suld.2d.array.v4i16.zero
    2, // llvm.nvvm.suld.2d.array.v4i32.clamp
    2, // llvm.nvvm.suld.2d.array.v4i32.trap
    2, // llvm.nvvm.suld.2d.array.v4i32.zero
    2, // llvm.nvvm.suld.2d.array.v4i8.clamp
    2, // llvm.nvvm.suld.2d.array.v4i8.trap
    2, // llvm.nvvm.suld.2d.array.v4i8.zero
    2, // llvm.nvvm.suld.2d.i16.clamp
    2, // llvm.nvvm.suld.2d.i16.trap
    2, // llvm.nvvm.suld.2d.i16.zero
    2, // llvm.nvvm.suld.2d.i32.clamp
    2, // llvm.nvvm.suld.2d.i32.trap
    2, // llvm.nvvm.suld.2d.i32.zero
    2, // llvm.nvvm.suld.2d.i64.clamp
    2, // llvm.nvvm.suld.2d.i64.trap
    2, // llvm.nvvm.suld.2d.i64.zero
    2, // llvm.nvvm.suld.2d.i8.clamp
    2, // llvm.nvvm.suld.2d.i8.trap
    2, // llvm.nvvm.suld.2d.i8.zero
    2, // llvm.nvvm.suld.2d.v2i16.clamp
    2, // llvm.nvvm.suld.2d.v2i16.trap
    2, // llvm.nvvm.suld.2d.v2i16.zero
    2, // llvm.nvvm.suld.2d.v2i32.clamp
    2, // llvm.nvvm.suld.2d.v2i32.trap
    2, // llvm.nvvm.suld.2d.v2i32.zero
    2, // llvm.nvvm.suld.2d.v2i64.clamp
    2, // llvm.nvvm.suld.2d.v2i64.trap
    2, // llvm.nvvm.suld.2d.v2i64.zero
    2, // llvm.nvvm.suld.2d.v2i8.clamp
    2, // llvm.nvvm.suld.2d.v2i8.trap
    2, // llvm.nvvm.suld.2d.v2i8.zero
    2, // llvm.nvvm.suld.2d.v4i16.clamp
    2, // llvm.nvvm.suld.2d.v4i16.trap
    2, // llvm.nvvm.suld.2d.v4i16.zero
    2, // llvm.nvvm.suld.2d.v4i32.clamp
    2, // llvm.nvvm.suld.2d.v4i32.trap
    2, // llvm.nvvm.suld.2d.v4i32.zero
    2, // llvm.nvvm.suld.2d.v4i8.clamp
    2, // llvm.nvvm.suld.2d.v4i8.trap
    2, // llvm.nvvm.suld.2d.v4i8.zero
    2, // llvm.nvvm.suld.3d.i16.clamp
    2, // llvm.nvvm.suld.3d.i16.trap
    2, // llvm.nvvm.suld.3d.i16.zero
    2, // llvm.nvvm.suld.3d.i32.clamp
    2, // llvm.nvvm.suld.3d.i32.trap
    2, // llvm.nvvm.suld.3d.i32.zero
    2, // llvm.nvvm.suld.3d.i64.clamp
    2, // llvm.nvvm.suld.3d.i64.trap
    2, // llvm.nvvm.suld.3d.i64.zero
    2, // llvm.nvvm.suld.3d.i8.clamp
    2, // llvm.nvvm.suld.3d.i8.trap
    2, // llvm.nvvm.suld.3d.i8.zero
    2, // llvm.nvvm.suld.3d.v2i16.clamp
    2, // llvm.nvvm.suld.3d.v2i16.trap
    2, // llvm.nvvm.suld.3d.v2i16.zero
    2, // llvm.nvvm.suld.3d.v2i32.clamp
    2, // llvm.nvvm.suld.3d.v2i32.trap
    2, // llvm.nvvm.suld.3d.v2i32.zero
    2, // llvm.nvvm.suld.3d.v2i64.clamp
    2, // llvm.nvvm.suld.3d.v2i64.trap
    2, // llvm.nvvm.suld.3d.v2i64.zero
    2, // llvm.nvvm.suld.3d.v2i8.clamp
    2, // llvm.nvvm.suld.3d.v2i8.trap
    2, // llvm.nvvm.suld.3d.v2i8.zero
    2, // llvm.nvvm.suld.3d.v4i16.clamp
    2, // llvm.nvvm.suld.3d.v4i16.trap
    2, // llvm.nvvm.suld.3d.v4i16.zero
    2, // llvm.nvvm.suld.3d.v4i32.clamp
    2, // llvm.nvvm.suld.3d.v4i32.trap
    2, // llvm.nvvm.suld.3d.v4i32.zero
    2, // llvm.nvvm.suld.3d.v4i8.clamp
    2, // llvm.nvvm.suld.3d.v4i8.trap
    2, // llvm.nvvm.suld.3d.v4i8.zero
    1, // llvm.nvvm.suq.array.size
    1, // llvm.nvvm.suq.channel.data.type
    1, // llvm.nvvm.suq.channel.order
    1, // llvm.nvvm.suq.depth
    1, // llvm.nvvm.suq.height
    1, // llvm.nvvm.suq.width
    2, // llvm.nvvm.sust.b.1d.array.i16.clamp
    2, // llvm.nvvm.sust.b.1d.array.i16.trap
    2, // llvm.nvvm.sust.b.1d.array.i16.zero
    2, // llvm.nvvm.sust.b.1d.array.i32.clamp
    2, // llvm.nvvm.sust.b.1d.array.i32.trap
    2, // llvm.nvvm.sust.b.1d.array.i32.zero
    2, // llvm.nvvm.sust.b.1d.array.i64.clamp
    2, // llvm.nvvm.sust.b.1d.array.i64.trap
    2, // llvm.nvvm.sust.b.1d.array.i64.zero
    2, // llvm.nvvm.sust.b.1d.array.i8.clamp
    2, // llvm.nvvm.sust.b.1d.array.i8.trap
    2, // llvm.nvvm.sust.b.1d.array.i8.zero
    2, // llvm.nvvm.sust.b.1d.array.v2i16.clamp
    2, // llvm.nvvm.sust.b.1d.array.v2i16.trap
    2, // llvm.nvvm.sust.b.1d.array.v2i16.zero
    2, // llvm.nvvm.sust.b.1d.array.v2i32.clamp
    2, // llvm.nvvm.sust.b.1d.array.v2i32.trap
    2, // llvm.nvvm.sust.b.1d.array.v2i32.zero
    2, // llvm.nvvm.sust.b.1d.array.v2i64.clamp
    2, // llvm.nvvm.sust.b.1d.array.v2i64.trap
    2, // llvm.nvvm.sust.b.1d.array.v2i64.zero
    2, // llvm.nvvm.sust.b.1d.array.v2i8.clamp
    2, // llvm.nvvm.sust.b.1d.array.v2i8.trap
    2, // llvm.nvvm.sust.b.1d.array.v2i8.zero
    2, // llvm.nvvm.sust.b.1d.array.v4i16.clamp
    2, // llvm.nvvm.sust.b.1d.array.v4i16.trap
    2, // llvm.nvvm.sust.b.1d.array.v4i16.zero
    2, // llvm.nvvm.sust.b.1d.array.v4i32.clamp
    2, // llvm.nvvm.sust.b.1d.array.v4i32.trap
    2, // llvm.nvvm.sust.b.1d.array.v4i32.zero
    2, // llvm.nvvm.sust.b.1d.array.v4i8.clamp
    2, // llvm.nvvm.sust.b.1d.array.v4i8.trap
    2, // llvm.nvvm.sust.b.1d.array.v4i8.zero
    2, // llvm.nvvm.sust.b.1d.i16.clamp
    2, // llvm.nvvm.sust.b.1d.i16.trap
    2, // llvm.nvvm.sust.b.1d.i16.zero
    2, // llvm.nvvm.sust.b.1d.i32.clamp
    2, // llvm.nvvm.sust.b.1d.i32.trap
    2, // llvm.nvvm.sust.b.1d.i32.zero
    2, // llvm.nvvm.sust.b.1d.i64.clamp
    2, // llvm.nvvm.sust.b.1d.i64.trap
    2, // llvm.nvvm.sust.b.1d.i64.zero
    2, // llvm.nvvm.sust.b.1d.i8.clamp
    2, // llvm.nvvm.sust.b.1d.i8.trap
    2, // llvm.nvvm.sust.b.1d.i8.zero
    2, // llvm.nvvm.sust.b.1d.v2i16.clamp
    2, // llvm.nvvm.sust.b.1d.v2i16.trap
    2, // llvm.nvvm.sust.b.1d.v2i16.zero
    2, // llvm.nvvm.sust.b.1d.v2i32.clamp
    2, // llvm.nvvm.sust.b.1d.v2i32.trap
    2, // llvm.nvvm.sust.b.1d.v2i32.zero
    2, // llvm.nvvm.sust.b.1d.v2i64.clamp
    2, // llvm.nvvm.sust.b.1d.v2i64.trap
    2, // llvm.nvvm.sust.b.1d.v2i64.zero
    2, // llvm.nvvm.sust.b.1d.v2i8.clamp
    2, // llvm.nvvm.sust.b.1d.v2i8.trap
    2, // llvm.nvvm.sust.b.1d.v2i8.zero
    2, // llvm.nvvm.sust.b.1d.v4i16.clamp
    2, // llvm.nvvm.sust.b.1d.v4i16.trap
    2, // llvm.nvvm.sust.b.1d.v4i16.zero
    2, // llvm.nvvm.sust.b.1d.v4i32.clamp
    2, // llvm.nvvm.sust.b.1d.v4i32.trap
    2, // llvm.nvvm.sust.b.1d.v4i32.zero
    2, // llvm.nvvm.sust.b.1d.v4i8.clamp
    2, // llvm.nvvm.sust.b.1d.v4i8.trap
    2, // llvm.nvvm.sust.b.1d.v4i8.zero
    2, // llvm.nvvm.sust.b.2d.array.i16.clamp
    2, // llvm.nvvm.sust.b.2d.array.i16.trap
    2, // llvm.nvvm.sust.b.2d.array.i16.zero
    2, // llvm.nvvm.sust.b.2d.array.i32.clamp
    2, // llvm.nvvm.sust.b.2d.array.i32.trap
    2, // llvm.nvvm.sust.b.2d.array.i32.zero
    2, // llvm.nvvm.sust.b.2d.array.i64.clamp
    2, // llvm.nvvm.sust.b.2d.array.i64.trap
    2, // llvm.nvvm.sust.b.2d.array.i64.zero
    2, // llvm.nvvm.sust.b.2d.array.i8.clamp
    2, // llvm.nvvm.sust.b.2d.array.i8.trap
    2, // llvm.nvvm.sust.b.2d.array.i8.zero
    2, // llvm.nvvm.sust.b.2d.array.v2i16.clamp
    2, // llvm.nvvm.sust.b.2d.array.v2i16.trap
    2, // llvm.nvvm.sust.b.2d.array.v2i16.zero
    2, // llvm.nvvm.sust.b.2d.array.v2i32.clamp
    2, // llvm.nvvm.sust.b.2d.array.v2i32.trap
    2, // llvm.nvvm.sust.b.2d.array.v2i32.zero
    2, // llvm.nvvm.sust.b.2d.array.v2i64.clamp
    2, // llvm.nvvm.sust.b.2d.array.v2i64.trap
    2, // llvm.nvvm.sust.b.2d.array.v2i64.zero
    2, // llvm.nvvm.sust.b.2d.array.v2i8.clamp
    2, // llvm.nvvm.sust.b.2d.array.v2i8.trap
    2, // llvm.nvvm.sust.b.2d.array.v2i8.zero
    2, // llvm.nvvm.sust.b.2d.array.v4i16.clamp
    2, // llvm.nvvm.sust.b.2d.array.v4i16.trap
    2, // llvm.nvvm.sust.b.2d.array.v4i16.zero
    2, // llvm.nvvm.sust.b.2d.array.v4i32.clamp
    2, // llvm.nvvm.sust.b.2d.array.v4i32.trap
    2, // llvm.nvvm.sust.b.2d.array.v4i32.zero
    2, // llvm.nvvm.sust.b.2d.array.v4i8.clamp
    2, // llvm.nvvm.sust.b.2d.array.v4i8.trap
    2, // llvm.nvvm.sust.b.2d.array.v4i8.zero
    2, // llvm.nvvm.sust.b.2d.i16.clamp
    2, // llvm.nvvm.sust.b.2d.i16.trap
    2, // llvm.nvvm.sust.b.2d.i16.zero
    2, // llvm.nvvm.sust.b.2d.i32.clamp
    2, // llvm.nvvm.sust.b.2d.i32.trap
    2, // llvm.nvvm.sust.b.2d.i32.zero
    2, // llvm.nvvm.sust.b.2d.i64.clamp
    2, // llvm.nvvm.sust.b.2d.i64.trap
    2, // llvm.nvvm.sust.b.2d.i64.zero
    2, // llvm.nvvm.sust.b.2d.i8.clamp
    2, // llvm.nvvm.sust.b.2d.i8.trap
    2, // llvm.nvvm.sust.b.2d.i8.zero
    2, // llvm.nvvm.sust.b.2d.v2i16.clamp
    2, // llvm.nvvm.sust.b.2d.v2i16.trap
    2, // llvm.nvvm.sust.b.2d.v2i16.zero
    2, // llvm.nvvm.sust.b.2d.v2i32.clamp
    2, // llvm.nvvm.sust.b.2d.v2i32.trap
    2, // llvm.nvvm.sust.b.2d.v2i32.zero
    2, // llvm.nvvm.sust.b.2d.v2i64.clamp
    2, // llvm.nvvm.sust.b.2d.v2i64.trap
    2, // llvm.nvvm.sust.b.2d.v2i64.zero
    2, // llvm.nvvm.sust.b.2d.v2i8.clamp
    2, // llvm.nvvm.sust.b.2d.v2i8.trap
    2, // llvm.nvvm.sust.b.2d.v2i8.zero
    2, // llvm.nvvm.sust.b.2d.v4i16.clamp
    2, // llvm.nvvm.sust.b.2d.v4i16.trap
    2, // llvm.nvvm.sust.b.2d.v4i16.zero
    2, // llvm.nvvm.sust.b.2d.v4i32.clamp
    2, // llvm.nvvm.sust.b.2d.v4i32.trap
    2, // llvm.nvvm.sust.b.2d.v4i32.zero
    2, // llvm.nvvm.sust.b.2d.v4i8.clamp
    2, // llvm.nvvm.sust.b.2d.v4i8.trap
    2, // llvm.nvvm.sust.b.2d.v4i8.zero
    2, // llvm.nvvm.sust.b.3d.i16.clamp
    2, // llvm.nvvm.sust.b.3d.i16.trap
    2, // llvm.nvvm.sust.b.3d.i16.zero
    2, // llvm.nvvm.sust.b.3d.i32.clamp
    2, // llvm.nvvm.sust.b.3d.i32.trap
    2, // llvm.nvvm.sust.b.3d.i32.zero
    2, // llvm.nvvm.sust.b.3d.i64.clamp
    2, // llvm.nvvm.sust.b.3d.i64.trap
    2, // llvm.nvvm.sust.b.3d.i64.zero
    2, // llvm.nvvm.sust.b.3d.i8.clamp
    2, // llvm.nvvm.sust.b.3d.i8.trap
    2, // llvm.nvvm.sust.b.3d.i8.zero
    2, // llvm.nvvm.sust.b.3d.v2i16.clamp
    2, // llvm.nvvm.sust.b.3d.v2i16.trap
    2, // llvm.nvvm.sust.b.3d.v2i16.zero
    2, // llvm.nvvm.sust.b.3d.v2i32.clamp
    2, // llvm.nvvm.sust.b.3d.v2i32.trap
    2, // llvm.nvvm.sust.b.3d.v2i32.zero
    2, // llvm.nvvm.sust.b.3d.v2i64.clamp
    2, // llvm.nvvm.sust.b.3d.v2i64.trap
    2, // llvm.nvvm.sust.b.3d.v2i64.zero
    2, // llvm.nvvm.sust.b.3d.v2i8.clamp
    2, // llvm.nvvm.sust.b.3d.v2i8.trap
    2, // llvm.nvvm.sust.b.3d.v2i8.zero
    2, // llvm.nvvm.sust.b.3d.v4i16.clamp
    2, // llvm.nvvm.sust.b.3d.v4i16.trap
    2, // llvm.nvvm.sust.b.3d.v4i16.zero
    2, // llvm.nvvm.sust.b.3d.v4i32.clamp
    2, // llvm.nvvm.sust.b.3d.v4i32.trap
    2, // llvm.nvvm.sust.b.3d.v4i32.zero
    2, // llvm.nvvm.sust.b.3d.v4i8.clamp
    2, // llvm.nvvm.sust.b.3d.v4i8.trap
    2, // llvm.nvvm.sust.b.3d.v4i8.zero
    2, // llvm.nvvm.sust.p.1d.array.i16.trap
    2, // llvm.nvvm.sust.p.1d.array.i32.trap
    2, // llvm.nvvm.sust.p.1d.array.i8.trap
    2, // llvm.nvvm.sust.p.1d.array.v2i16.trap
    2, // llvm.nvvm.sust.p.1d.array.v2i32.trap
    2, // llvm.nvvm.sust.p.1d.array.v2i8.trap
    2, // llvm.nvvm.sust.p.1d.array.v4i16.trap
    2, // llvm.nvvm.sust.p.1d.array.v4i32.trap
    2, // llvm.nvvm.sust.p.1d.array.v4i8.trap
    2, // llvm.nvvm.sust.p.1d.i16.trap
    2, // llvm.nvvm.sust.p.1d.i32.trap
    2, // llvm.nvvm.sust.p.1d.i8.trap
    2, // llvm.nvvm.sust.p.1d.v2i16.trap
    2, // llvm.nvvm.sust.p.1d.v2i32.trap
    2, // llvm.nvvm.sust.p.1d.v2i8.trap
    2, // llvm.nvvm.sust.p.1d.v4i16.trap
    2, // llvm.nvvm.sust.p.1d.v4i32.trap
    2, // llvm.nvvm.sust.p.1d.v4i8.trap
    2, // llvm.nvvm.sust.p.2d.array.i16.trap
    2, // llvm.nvvm.sust.p.2d.array.i32.trap
    2, // llvm.nvvm.sust.p.2d.array.i8.trap
    2, // llvm.nvvm.sust.p.2d.array.v2i16.trap
    2, // llvm.nvvm.sust.p.2d.array.v2i32.trap
    2, // llvm.nvvm.sust.p.2d.array.v2i8.trap
    2, // llvm.nvvm.sust.p.2d.array.v4i16.trap
    2, // llvm.nvvm.sust.p.2d.array.v4i32.trap
    2, // llvm.nvvm.sust.p.2d.array.v4i8.trap
    2, // llvm.nvvm.sust.p.2d.i16.trap
    2, // llvm.nvvm.sust.p.2d.i32.trap
    2, // llvm.nvvm.sust.p.2d.i8.trap
    2, // llvm.nvvm.sust.p.2d.v2i16.trap
    2, // llvm.nvvm.sust.p.2d.v2i32.trap
    2, // llvm.nvvm.sust.p.2d.v2i8.trap
    2, // llvm.nvvm.sust.p.2d.v4i16.trap
    2, // llvm.nvvm.sust.p.2d.v4i32.trap
    2, // llvm.nvvm.sust.p.2d.v4i8.trap
    2, // llvm.nvvm.sust.p.3d.i16.trap
    2, // llvm.nvvm.sust.p.3d.i32.trap
    2, // llvm.nvvm.sust.p.3d.i8.trap
    2, // llvm.nvvm.sust.p.3d.v2i16.trap
    2, // llvm.nvvm.sust.p.3d.v2i32.trap
    2, // llvm.nvvm.sust.p.3d.v2i8.trap
    2, // llvm.nvvm.sust.p.3d.v4i16.trap
    2, // llvm.nvvm.sust.p.3d.v4i32.trap
    2, // llvm.nvvm.sust.p.3d.v4i8.trap
    1, // llvm.nvvm.swap.lo.hi.b64
    2, // llvm.nvvm.tex.1d.array.grad.v4f32.f32
    2, // llvm.nvvm.tex.1d.array.grad.v4s32.f32
    2, // llvm.nvvm.tex.1d.array.grad.v4u32.f32
    2, // llvm.nvvm.tex.1d.array.level.v4f32.f32
    2, // llvm.nvvm.tex.1d.array.level.v4s32.f32
    2, // llvm.nvvm.tex.1d.array.level.v4u32.f32
    2, // llvm.nvvm.tex.1d.array.v4f32.f32
    2, // llvm.nvvm.tex.1d.array.v4f32.s32
    2, // llvm.nvvm.tex.1d.array.v4s32.f32
    2, // llvm.nvvm.tex.1d.array.v4s32.s32
    2, // llvm.nvvm.tex.1d.array.v4u32.f32
    2, // llvm.nvvm.tex.1d.array.v4u32.s32
    2, // llvm.nvvm.tex.1d.grad.v4f32.f32
    2, // llvm.nvvm.tex.1d.grad.v4s32.f32
    2, // llvm.nvvm.tex.1d.grad.v4u32.f32
    2, // llvm.nvvm.tex.1d.level.v4f32.f32
    2, // llvm.nvvm.tex.1d.level.v4s32.f32
    2, // llvm.nvvm.tex.1d.level.v4u32.f32
    2, // llvm.nvvm.tex.1d.v4f32.f32
    2, // llvm.nvvm.tex.1d.v4f32.s32
    2, // llvm.nvvm.tex.1d.v4s32.f32
    2, // llvm.nvvm.tex.1d.v4s32.s32
    2, // llvm.nvvm.tex.1d.v4u32.f32
    2, // llvm.nvvm.tex.1d.v4u32.s32
    2, // llvm.nvvm.tex.2d.array.grad.v4f32.f32
    2, // llvm.nvvm.tex.2d.array.grad.v4s32.f32
    2, // llvm.nvvm.tex.2d.array.grad.v4u32.f32
    2, // llvm.nvvm.tex.2d.array.level.v4f32.f32
    2, // llvm.nvvm.tex.2d.array.level.v4s32.f32
    2, // llvm.nvvm.tex.2d.array.level.v4u32.f32
    2, // llvm.nvvm.tex.2d.array.v4f32.f32
    2, // llvm.nvvm.tex.2d.array.v4f32.s32
    2, // llvm.nvvm.tex.2d.array.v4s32.f32
    2, // llvm.nvvm.tex.2d.array.v4s32.s32
    2, // llvm.nvvm.tex.2d.array.v4u32.f32
    2, // llvm.nvvm.tex.2d.array.v4u32.s32
    2, // llvm.nvvm.tex.2d.grad.v4f32.f32
    2, // llvm.nvvm.tex.2d.grad.v4s32.f32
    2, // llvm.nvvm.tex.2d.grad.v4u32.f32
    2, // llvm.nvvm.tex.2d.level.v4f32.f32
    2, // llvm.nvvm.tex.2d.level.v4s32.f32
    2, // llvm.nvvm.tex.2d.level.v4u32.f32
    2, // llvm.nvvm.tex.2d.v4f32.f32
    2, // llvm.nvvm.tex.2d.v4f32.s32
    2, // llvm.nvvm.tex.2d.v4s32.f32
    2, // llvm.nvvm.tex.2d.v4s32.s32
    2, // llvm.nvvm.tex.2d.v4u32.f32
    2, // llvm.nvvm.tex.2d.v4u32.s32
    2, // llvm.nvvm.tex.3d.grad.v4f32.f32
    2, // llvm.nvvm.tex.3d.grad.v4s32.f32
    2, // llvm.nvvm.tex.3d.grad.v4u32.f32
    2, // llvm.nvvm.tex.3d.level.v4f32.f32
    2, // llvm.nvvm.tex.3d.level.v4s32.f32
    2, // llvm.nvvm.tex.3d.level.v4u32.f32
    2, // llvm.nvvm.tex.3d.v4f32.f32
    2, // llvm.nvvm.tex.3d.v4f32.s32
    2, // llvm.nvvm.tex.3d.v4s32.f32
    2, // llvm.nvvm.tex.3d.v4s32.s32
    2, // llvm.nvvm.tex.3d.v4u32.f32
    2, // llvm.nvvm.tex.3d.v4u32.s32
    2, // llvm.nvvm.tex.cube.array.level.v4f32.f32
    2, // llvm.nvvm.tex.cube.array.level.v4s32.f32
    2, // llvm.nvvm.tex.cube.array.level.v4u32.f32
    2, // llvm.nvvm.tex.cube.array.v4f32.f32
    2, // llvm.nvvm.tex.cube.array.v4s32.f32
    2, // llvm.nvvm.tex.cube.array.v4u32.f32
    2, // llvm.nvvm.tex.cube.level.v4f32.f32
    2, // llvm.nvvm.tex.cube.level.v4s32.f32
    2, // llvm.nvvm.tex.cube.level.v4u32.f32
    2, // llvm.nvvm.tex.cube.v4f32.f32
    2, // llvm.nvvm.tex.cube.v4s32.f32
    2, // llvm.nvvm.tex.cube.v4u32.f32
    2, // llvm.nvvm.tex.unified.1d.array.grad.v4f32.f32
    2, // llvm.nvvm.tex.unified.1d.array.grad.v4s32.f32
    2, // llvm.nvvm.tex.unified.1d.array.grad.v4u32.f32
    2, // llvm.nvvm.tex.unified.1d.array.level.v4f32.f32
    2, // llvm.nvvm.tex.unified.1d.array.level.v4s32.f32
    2, // llvm.nvvm.tex.unified.1d.array.level.v4u32.f32
    2, // llvm.nvvm.tex.unified.1d.array.v4f32.f32
    2, // llvm.nvvm.tex.unified.1d.array.v4f32.s32
    2, // llvm.nvvm.tex.unified.1d.array.v4s32.f32
    2, // llvm.nvvm.tex.unified.1d.array.v4s32.s32
    2, // llvm.nvvm.tex.unified.1d.array.v4u32.f32
    2, // llvm.nvvm.tex.unified.1d.array.v4u32.s32
    2, // llvm.nvvm.tex.unified.1d.grad.v4f32.f32
    2, // llvm.nvvm.tex.unified.1d.grad.v4s32.f32
    2, // llvm.nvvm.tex.unified.1d.grad.v4u32.f32
    2, // llvm.nvvm.tex.unified.1d.level.v4f32.f32
    2, // llvm.nvvm.tex.unified.1d.level.v4s32.f32
    2, // llvm.nvvm.tex.unified.1d.level.v4u32.f32
    2, // llvm.nvvm.tex.unified.1d.v4f32.f32
    2, // llvm.nvvm.tex.unified.1d.v4f32.s32
    2, // llvm.nvvm.tex.unified.1d.v4s32.f32
    2, // llvm.nvvm.tex.unified.1d.v4s32.s32
    2, // llvm.nvvm.tex.unified.1d.v4u32.f32
    2, // llvm.nvvm.tex.unified.1d.v4u32.s32
    2, // llvm.nvvm.tex.unified.2d.array.grad.v4f32.f32
    2, // llvm.nvvm.tex.unified.2d.array.grad.v4s32.f32
    2, // llvm.nvvm.tex.unified.2d.array.grad.v4u32.f32
    2, // llvm.nvvm.tex.unified.2d.array.level.v4f32.f32
    2, // llvm.nvvm.tex.unified.2d.array.level.v4s32.f32
    2, // llvm.nvvm.tex.unified.2d.array.level.v4u32.f32
    2, // llvm.nvvm.tex.unified.2d.array.v4f32.f32
    2, // llvm.nvvm.tex.unified.2d.array.v4f32.s32
    2, // llvm.nvvm.tex.unified.2d.array.v4s32.f32
    2, // llvm.nvvm.tex.unified.2d.array.v4s32.s32
    2, // llvm.nvvm.tex.unified.2d.array.v4u32.f32
    2, // llvm.nvvm.tex.unified.2d.array.v4u32.s32
    2, // llvm.nvvm.tex.unified.2d.grad.v4f32.f32
    2, // llvm.nvvm.tex.unified.2d.grad.v4s32.f32
    2, // llvm.nvvm.tex.unified.2d.grad.v4u32.f32
    2, // llvm.nvvm.tex.unified.2d.level.v4f32.f32
    2, // llvm.nvvm.tex.unified.2d.level.v4s32.f32
    2, // llvm.nvvm.tex.unified.2d.level.v4u32.f32
    2, // llvm.nvvm.tex.unified.2d.v4f32.f32
    2, // llvm.nvvm.tex.unified.2d.v4f32.s32
    2, // llvm.nvvm.tex.unified.2d.v4s32.f32
    2, // llvm.nvvm.tex.unified.2d.v4s32.s32
    2, // llvm.nvvm.tex.unified.2d.v4u32.f32
    2, // llvm.nvvm.tex.unified.2d.v4u32.s32
    2, // llvm.nvvm.tex.unified.3d.grad.v4f32.f32
    2, // llvm.nvvm.tex.unified.3d.grad.v4s32.f32
    2, // llvm.nvvm.tex.unified.3d.grad.v4u32.f32
    2, // llvm.nvvm.tex.unified.3d.level.v4f32.f32
    2, // llvm.nvvm.tex.unified.3d.level.v4s32.f32
    2, // llvm.nvvm.tex.unified.3d.level.v4u32.f32
    2, // llvm.nvvm.tex.unified.3d.v4f32.f32
    2, // llvm.nvvm.tex.unified.3d.v4f32.s32
    2, // llvm.nvvm.tex.unified.3d.v4s32.f32
    2, // llvm.nvvm.tex.unified.3d.v4s32.s32
    2, // llvm.nvvm.tex.unified.3d.v4u32.f32
    2, // llvm.nvvm.tex.unified.3d.v4u32.s32
    2, // llvm.nvvm.tex.unified.cube.array.level.v4f32.f32
    2, // llvm.nvvm.tex.unified.cube.array.level.v4s32.f32
    2, // llvm.nvvm.tex.unified.cube.array.level.v4u32.f32
    2, // llvm.nvvm.tex.unified.cube.array.v4f32.f32
    2, // llvm.nvvm.tex.unified.cube.array.v4s32.f32
    2, // llvm.nvvm.tex.unified.cube.array.v4u32.f32
    2, // llvm.nvvm.tex.unified.cube.level.v4f32.f32
    2, // llvm.nvvm.tex.unified.cube.level.v4s32.f32
    2, // llvm.nvvm.tex.unified.cube.level.v4u32.f32
    2, // llvm.nvvm.tex.unified.cube.v4f32.f32
    2, // llvm.nvvm.tex.unified.cube.v4s32.f32
    2, // llvm.nvvm.tex.unified.cube.v4u32.f32
    1, // llvm.nvvm.texsurf.handle
    1, // llvm.nvvm.texsurf.handle.internal
    2, // llvm.nvvm.tld4.a.2d.v4f32.f32
    2, // llvm.nvvm.tld4.a.2d.v4s32.f32
    2, // llvm.nvvm.tld4.a.2d.v4u32.f32
    2, // llvm.nvvm.tld4.b.2d.v4f32.f32
    2, // llvm.nvvm.tld4.b.2d.v4s32.f32
    2, // llvm.nvvm.tld4.b.2d.v4u32.f32
    2, // llvm.nvvm.tld4.g.2d.v4f32.f32
    2, // llvm.nvvm.tld4.g.2d.v4s32.f32
    2, // llvm.nvvm.tld4.g.2d.v4u32.f32
    2, // llvm.nvvm.tld4.r.2d.v4f32.f32
    2, // llvm.nvvm.tld4.r.2d.v4s32.f32
    2, // llvm.nvvm.tld4.r.2d.v4u32.f32
    2, // llvm.nvvm.tld4.unified.a.2d.v4f32.f32
    2, // llvm.nvvm.tld4.unified.a.2d.v4s32.f32
    2, // llvm.nvvm.tld4.unified.a.2d.v4u32.f32
    2, // llvm.nvvm.tld4.unified.b.2d.v4f32.f32
    2, // llvm.nvvm.tld4.unified.b.2d.v4s32.f32
    2, // llvm.nvvm.tld4.unified.b.2d.v4u32.f32
    2, // llvm.nvvm.tld4.unified.g.2d.v4f32.f32
    2, // llvm.nvvm.tld4.unified.g.2d.v4s32.f32
    2, // llvm.nvvm.tld4.unified.g.2d.v4u32.f32
    2, // llvm.nvvm.tld4.unified.r.2d.v4f32.f32
    2, // llvm.nvvm.tld4.unified.r.2d.v4s32.f32
    2, // llvm.nvvm.tld4.unified.r.2d.v4u32.f32
    1, // llvm.nvvm.trunc.d
    1, // llvm.nvvm.trunc.f
    1, // llvm.nvvm.trunc.ftz.f
    1, // llvm.nvvm.txq.array.size
    1, // llvm.nvvm.txq.channel.data.type
    1, // llvm.nvvm.txq.channel.order
    1, // llvm.nvvm.txq.depth
    1, // llvm.nvvm.txq.height
    1, // llvm.nvvm.txq.num.mipmap.levels
    1, // llvm.nvvm.txq.num.samples
    1, // llvm.nvvm.txq.width
    1, // llvm.nvvm.ui2d.rm
    1, // llvm.nvvm.ui2d.rn
    1, // llvm.nvvm.ui2d.rp
    1, // llvm.nvvm.ui2d.rz
    1, // llvm.nvvm.ui2f.rm
    1, // llvm.nvvm.ui2f.rn
    1, // llvm.nvvm.ui2f.rp
    1, // llvm.nvvm.ui2f.rz
    1, // llvm.nvvm.ull2d.rm
    1, // llvm.nvvm.ull2d.rn
    1, // llvm.nvvm.ull2d.rp
    1, // llvm.nvvm.ull2d.rz
    1, // llvm.nvvm.ull2f.rm
    1, // llvm.nvvm.ull2f.rn
    1, // llvm.nvvm.ull2f.rp
    1, // llvm.nvvm.ull2f.rz
    1, // llvm.objectsize
    2, // llvm.pcmarker
    1, // llvm.pow
    1, // llvm.powi
    2, // llvm.ppc.altivec.dss
    2, // llvm.ppc.altivec.dssall
    2, // llvm.ppc.altivec.dst
    2, // llvm.ppc.altivec.dstst
    2, // llvm.ppc.altivec.dststt
    2, // llvm.ppc.altivec.dstt
    3, // llvm.ppc.altivec.lvebx
    3, // llvm.ppc.altivec.lvehx
    3, // llvm.ppc.altivec.lvewx
    1, // llvm.ppc.altivec.lvsl
    1, // llvm.ppc.altivec.lvsr
    3, // llvm.ppc.altivec.lvx
    3, // llvm.ppc.altivec.lvxl
    3, // llvm.ppc.altivec.mfvscr
    2, // llvm.ppc.altivec.mtvscr
    2, // llvm.ppc.altivec.stvebx
    2, // llvm.ppc.altivec.stvehx
    2, // llvm.ppc.altivec.stvewx
    2, // llvm.ppc.altivec.stvx
    2, // llvm.ppc.altivec.stvxl
    1, // llvm.ppc.altivec.vaddcuw
    1, // llvm.ppc.altivec.vaddsbs
    1, // llvm.ppc.altivec.vaddshs
    1, // llvm.ppc.altivec.vaddsws
    1, // llvm.ppc.altivec.vaddubs
    1, // llvm.ppc.altivec.vadduhs
    1, // llvm.ppc.altivec.vadduws
    1, // llvm.ppc.altivec.vavgsb
    1, // llvm.ppc.altivec.vavgsh
    1, // llvm.ppc.altivec.vavgsw
    1, // llvm.ppc.altivec.vavgub
    1, // llvm.ppc.altivec.vavguh
    1, // llvm.ppc.altivec.vavguw
    1, // llvm.ppc.altivec.vcfsx
    1, // llvm.ppc.altivec.vcfux
    1, // llvm.ppc.altivec.vcmpbfp
    1, // llvm.ppc.altivec.vcmpbfp.p
    1, // llvm.ppc.altivec.vcmpeqfp
    1, // llvm.ppc.altivec.vcmpeqfp.p
    1, // llvm.ppc.altivec.vcmpequb
    1, // llvm.ppc.altivec.vcmpequb.p
    1, // llvm.ppc.altivec.vcmpequh
    1, // llvm.ppc.altivec.vcmpequh.p
    1, // llvm.ppc.altivec.vcmpequw
    1, // llvm.ppc.altivec.vcmpequw.p
    1, // llvm.ppc.altivec.vcmpgefp
    1, // llvm.ppc.altivec.vcmpgefp.p
    1, // llvm.ppc.altivec.vcmpgtfp
    1, // llvm.ppc.altivec.vcmpgtfp.p
    1, // llvm.ppc.altivec.vcmpgtsb
    1, // llvm.ppc.altivec.vcmpgtsb.p
    1, // llvm.ppc.altivec.vcmpgtsh
    1, // llvm.ppc.altivec.vcmpgtsh.p
    1, // llvm.ppc.altivec.vcmpgtsw
    1, // llvm.ppc.altivec.vcmpgtsw.p
    1, // llvm.ppc.altivec.vcmpgtub
    1, // llvm.ppc.altivec.vcmpgtub.p
    1, // llvm.ppc.altivec.vcmpgtuh
    1, // llvm.ppc.altivec.vcmpgtuh.p
    1, // llvm.ppc.altivec.vcmpgtuw
    1, // llvm.ppc.altivec.vcmpgtuw.p
    1, // llvm.ppc.altivec.vctsxs
    1, // llvm.ppc.altivec.vctuxs
    1, // llvm.ppc.altivec.vexptefp
    1, // llvm.ppc.altivec.vlogefp
    1, // llvm.ppc.altivec.vmaddfp
    1, // llvm.ppc.altivec.vmaxfp
    1, // llvm.ppc.altivec.vmaxsb
    1, // llvm.ppc.altivec.vmaxsh
    1, // llvm.ppc.altivec.vmaxsw
    1, // llvm.ppc.altivec.vmaxub
    1, // llvm.ppc.altivec.vmaxuh
    1, // llvm.ppc.altivec.vmaxuw
    1, // llvm.ppc.altivec.vmhaddshs
    1, // llvm.ppc.altivec.vmhraddshs
    1, // llvm.ppc.altivec.vminfp
    1, // llvm.ppc.altivec.vminsb
    1, // llvm.ppc.altivec.vminsh
    1, // llvm.ppc.altivec.vminsw
    1, // llvm.ppc.altivec.vminub
    1, // llvm.ppc.altivec.vminuh
    1, // llvm.ppc.altivec.vminuw
    1, // llvm.ppc.altivec.vmladduhm
    1, // llvm.ppc.altivec.vmsummbm
    1, // llvm.ppc.altivec.vmsumshm
    1, // llvm.ppc.altivec.vmsumshs
    1, // llvm.ppc.altivec.vmsumubm
    1, // llvm.ppc.altivec.vmsumuhm
    1, // llvm.ppc.altivec.vmsumuhs
    1, // llvm.ppc.altivec.vmulesb
    1, // llvm.ppc.altivec.vmulesh
    1, // llvm.ppc.altivec.vmuleub
    1, // llvm.ppc.altivec.vmuleuh
    1, // llvm.ppc.altivec.vmulosb
    1, // llvm.ppc.altivec.vmulosh
    1, // llvm.ppc.altivec.vmuloub
    1, // llvm.ppc.altivec.vmulouh
    1, // llvm.ppc.altivec.vnmsubfp
    1, // llvm.ppc.altivec.vperm
    1, // llvm.ppc.altivec.vpkpx
    1, // llvm.ppc.altivec.vpkshss
    1, // llvm.ppc.altivec.vpkshus
    1, // llvm.ppc.altivec.vpkswss
    1, // llvm.ppc.altivec.vpkswus
    1, // llvm.ppc.altivec.vpkuhus
    1, // llvm.ppc.altivec.vpkuwus
    1, // llvm.ppc.altivec.vrefp
    1, // llvm.ppc.altivec.vrfim
    1, // llvm.ppc.altivec.vrfin
    1, // llvm.ppc.altivec.vrfip
    1, // llvm.ppc.altivec.vrfiz
    1, // llvm.ppc.altivec.vrlb
    1, // llvm.ppc.altivec.vrlh
    1, // llvm.ppc.altivec.vrlw
    1, // llvm.ppc.altivec.vrsqrtefp
    1, // llvm.ppc.altivec.vsel
    1, // llvm.ppc.altivec.vsl
    1, // llvm.ppc.altivec.vslb
    1, // llvm.ppc.altivec.vslh
    1, // llvm.ppc.altivec.vslo
    1, // llvm.ppc.altivec.vslw
    1, // llvm.ppc.altivec.vsr
    1, // llvm.ppc.altivec.vsrab
    1, // llvm.ppc.altivec.vsrah
    1, // llvm.ppc.altivec.vsraw
    1, // llvm.ppc.altivec.vsrb
    1, // llvm.ppc.altivec.vsrh
    1, // llvm.ppc.altivec.vsro
    1, // llvm.ppc.altivec.vsrw
    1, // llvm.ppc.altivec.vsubcuw
    1, // llvm.ppc.altivec.vsubsbs
    1, // llvm.ppc.altivec.vsubshs
    1, // llvm.ppc.altivec.vsubsws
    1, // llvm.ppc.altivec.vsububs
    1, // llvm.ppc.altivec.vsubuhs
    1, // llvm.ppc.altivec.vsubuws
    1, // llvm.ppc.altivec.vsum2sws
    1, // llvm.ppc.altivec.vsum4sbs
    1, // llvm.ppc.altivec.vsum4shs
    1, // llvm.ppc.altivec.vsum4ubs
    1, // llvm.ppc.altivec.vsumsws
    1, // llvm.ppc.altivec.vupkhpx
    1, // llvm.ppc.altivec.vupkhsb
    1, // llvm.ppc.altivec.vupkhsh
    1, // llvm.ppc.altivec.vupklpx
    1, // llvm.ppc.altivec.vupklsb
    1, // llvm.ppc.altivec.vupklsh
    2, // llvm.ppc.dcba
    2, // llvm.ppc.dcbf
    2, // llvm.ppc.dcbi
    2, // llvm.ppc.dcbst
    12, // llvm.ppc.dcbt
    2, // llvm.ppc.dcbtst
    2, // llvm.ppc.dcbz
    2, // llvm.ppc.dcbzl
    2, // llvm.ppc.is.decremented.ctr.nonzero
    2, // llvm.ppc.mtctr
    2, // llvm.ppc.sync
    12, // llvm.prefetch
    2, // llvm.ptr.annotation
    2, // llvm.ptx.bar.sync
    1, // llvm.ptx.read.clock
    1, // llvm.ptx.read.clock64
    1, // llvm.ptx.read.ctaid.w
    1, // llvm.ptx.read.ctaid.x
    1, // llvm.ptx.read.ctaid.y
    1, // llvm.ptx.read.ctaid.z
    1, // llvm.ptx.read.gridid
    1, // llvm.ptx.read.laneid
    1, // llvm.ptx.read.lanemask.eq
    1, // llvm.ptx.read.lanemask.ge
    1, // llvm.ptx.read.lanemask.gt
    1, // llvm.ptx.read.lanemask.le
    1, // llvm.ptx.read.lanemask.lt
    1, // llvm.ptx.read.nctaid.w
    1, // llvm.ptx.read.nctaid.x
    1, // llvm.ptx.read.nctaid.y
    1, // llvm.ptx.read.nctaid.z
    1, // llvm.ptx.read.nsmid
    1, // llvm.ptx.read.ntid.w
    1, // llvm.ptx.read.ntid.x
    1, // llvm.ptx.read.ntid.y
    1, // llvm.ptx.read.ntid.z
    1, // llvm.ptx.read.nwarpid
    1, // llvm.ptx.read.pm0
    1, // llvm.ptx.read.pm1
    1, // llvm.ptx.read.pm2
    1, // llvm.ptx.read.pm3
    1, // llvm.ptx.read.smid
    1, // llvm.ptx.read.tid.w
    1, // llvm.ptx.read.tid.x
    1, // llvm.ptx.read.tid.y
    1, // llvm.ptx.read.tid.z
    1, // llvm.ptx.read.warpid
    1, // llvm.r600.read.global.size.x
    1, // llvm.r600.read.global.size.y
    1, // llvm.r600.read.global.size.z
    1, // llvm.r600.read.local.size.x
    1, // llvm.r600.read.local.size.y
    1, // llvm.r600.read.local.size.z
    1, // llvm.r600.read.ngroups.x
    1, // llvm.r600.read.ngroups.y
    1, // llvm.r600.read.ngroups.z
    1, // llvm.r600.read.tgid.x
    1, // llvm.r600.read.tgid.y
    1, // llvm.r600.read.tgid.z
    1, // llvm.r600.read.tidig.x
    1, // llvm.r600.read.tidig.y
    1, // llvm.r600.read.tidig.z
    1, // llvm.read_register
    2, // llvm.readcyclecounter
    1, // llvm.returnaddress
    1, // llvm.rint
    1, // llvm.round
    1, // llvm.sadd.with.overflow
    2, // llvm.setjmp
    9, // llvm.siglongjmp
    2, // llvm.sigsetjmp
    1, // llvm.sin
    1, // llvm.smul.with.overflow
    1, // llvm.sqrt
    1, // llvm.ssub.with.overflow
    2, // llvm.stackprotector
    2, // llvm.stackprotectorcheck
    2, // llvm.stackrestore
    2, // llvm.stacksave
    9, // llvm.trap
    1, // llvm.trunc
    1, // llvm.uadd.with.overflow
    1, // llvm.umul.with.overflow
    1, // llvm.usub.with.overflow
    2, // llvm.va_copy
    2, // llvm.va_end
    2, // llvm.var.annotation
    2, // llvm.va_start
    2, // llvm.write_register
    1, // llvm.x86.3dnow.pavgusb
    1, // llvm.x86.3dnow.pf2id
    1, // llvm.x86.3dnow.pfacc
    1, // llvm.x86.3dnow.pfadd
    1, // llvm.x86.3dnow.pfcmpeq
    1, // llvm.x86.3dnow.pfcmpge
    1, // llvm.x86.3dnow.pfcmpgt
    1, // llvm.x86.3dnow.pfmax
    1, // llvm.x86.3dnow.pfmin
    1, // llvm.x86.3dnow.pfmul
    1, // llvm.x86.3dnow.pfrcp
    1, // llvm.x86.3dnow.pfrcpit1
    1, // llvm.x86.3dnow.pfrcpit2
    1, // llvm.x86.3dnow.pfrsqit1
    1, // llvm.x86.3dnow.pfrsqrt
    1, // llvm.x86.3dnow.pfsub
    1, // llvm.x86.3dnow.pfsubr
    1, // llvm.x86.3dnow.pi2fd
    1, // llvm.x86.3dnow.pmulhrw
    1, // llvm.x86.3dnowa.pf2iw
    1, // llvm.x86.3dnowa.pfnacc
    1, // llvm.x86.3dnowa.pfpnacc
    1, // llvm.x86.3dnowa.pi2fw
    1, // llvm.x86.3dnowa.pswapd
    1, // llvm.x86.aesni.aesdec
    1, // llvm.x86.aesni.aesdeclast
    1, // llvm.x86.aesni.aesenc
    1, // llvm.x86.aesni.aesenclast
    1, // llvm.x86.aesni.aesimc
    1, // llvm.x86.aesni.aeskeygenassist
    3, // llvm.x86.avx2.gather.d.d
    3, // llvm.x86.avx2.gather.d.d.256
    3, // llvm.x86.avx2.gather.d.pd
    3, // llvm.x86.avx2.gather.d.pd.256
    3, // llvm.x86.avx2.gather.d.ps
    3, // llvm.x86.avx2.gather.d.ps.256
    3, // llvm.x86.avx2.gather.d.q
    3, // llvm.x86.avx2.gather.d.q.256
    3, // llvm.x86.avx2.gather.q.d
    3, // llvm.x86.avx2.gather.q.d.256
    3, // llvm.x86.avx2.gather.q.pd
    3, // llvm.x86.avx2.gather.q.pd.256
    3, // llvm.x86.avx2.gather.q.ps
    3, // llvm.x86.avx2.gather.q.ps.256
    3, // llvm.x86.avx2.gather.q.q
    3, // llvm.x86.avx2.gather.q.q.256
    3, // llvm.x86.avx2.maskload.d
    3, // llvm.x86.avx2.maskload.d.256
    3, // llvm.x86.avx2.maskload.q
    3, // llvm.x86.avx2.maskload.q.256
    2, // llvm.x86.avx2.maskstore.d
    2, // llvm.x86.avx2.maskstore.d.256
    2, // llvm.x86.avx2.maskstore.q
    2, // llvm.x86.avx2.maskstore.q.256
    3, // llvm.x86.avx2.movntdqa
    1, // llvm.x86.avx2.mpsadbw
    1, // llvm.x86.avx2.pabs.b
    1, // llvm.x86.avx2.pabs.d
    1, // llvm.x86.avx2.pabs.w
    1, // llvm.x86.avx2.packssdw
    1, // llvm.x86.avx2.packsswb
    1, // llvm.x86.avx2.packusdw
    1, // llvm.x86.avx2.packuswb
    1, // llvm.x86.avx2.padds.b
    1, // llvm.x86.avx2.padds.w
    1, // llvm.x86.avx2.paddus.b
    1, // llvm.x86.avx2.paddus.w
    1, // llvm.x86.avx2.pavg.b
    1, // llvm.x86.avx2.pavg.w
    1, // llvm.x86.avx2.pblendd.128
    1, // llvm.x86.avx2.pblendd.256
    1, // llvm.x86.avx2.pblendvb
    1, // llvm.x86.avx2.pblendw
    1, // llvm.x86.avx2.pbroadcastb.128
    1, // llvm.x86.avx2.pbroadcastb.256
    1, // llvm.x86.avx2.pbroadcastd.128
    1, // llvm.x86.avx2.pbroadcastd.256
    1, // llvm.x86.avx2.pbroadcastq.128
    1, // llvm.x86.avx2.pbroadcastq.256
    1, // llvm.x86.avx2.pbroadcastw.128
    1, // llvm.x86.avx2.pbroadcastw.256
    1, // llvm.x86.avx2.permd
    1, // llvm.x86.avx2.permps
    1, // llvm.x86.avx2.phadd.d
    1, // llvm.x86.avx2.phadd.sw
    1, // llvm.x86.avx2.phadd.w
    1, // llvm.x86.avx2.phsub.d
    1, // llvm.x86.avx2.phsub.sw
    1, // llvm.x86.avx2.phsub.w
    1, // llvm.x86.avx2.pmadd.ub.sw
    1, // llvm.x86.avx2.pmadd.wd
    1, // llvm.x86.avx2.pmaxs.b
    1, // llvm.x86.avx2.pmaxs.d
    1, // llvm.x86.avx2.pmaxs.w
    1, // llvm.x86.avx2.pmaxu.b
    1, // llvm.x86.avx2.pmaxu.d
    1, // llvm.x86.avx2.pmaxu.w
    1, // llvm.x86.avx2.pmins.b
    1, // llvm.x86.avx2.pmins.d
    1, // llvm.x86.avx2.pmins.w
    1, // llvm.x86.avx2.pminu.b
    1, // llvm.x86.avx2.pminu.d
    1, // llvm.x86.avx2.pminu.w
    1, // llvm.x86.avx2.pmovmskb
    1, // llvm.x86.avx2.pmovsxbd
    1, // llvm.x86.avx2.pmovsxbq
    1, // llvm.x86.avx2.pmovsxbw
    1, // llvm.x86.avx2.pmovsxdq
    1, // llvm.x86.avx2.pmovsxwd
    1, // llvm.x86.avx2.pmovsxwq
    1, // llvm.x86.avx2.pmovzxbd
    1, // llvm.x86.avx2.pmovzxbq
    1, // llvm.x86.avx2.pmovzxbw
    1, // llvm.x86.avx2.pmovzxdq
    1, // llvm.x86.avx2.pmovzxwd
    1, // llvm.x86.avx2.pmovzxwq
    1, // llvm.x86.avx2.pmul.dq
    1, // llvm.x86.avx2.pmul.hr.sw
    1, // llvm.x86.avx2.pmulh.w
    1, // llvm.x86.avx2.pmulhu.w
    1, // llvm.x86.avx2.pmulu.dq
    1, // llvm.x86.avx2.psad.bw
    1, // llvm.x86.avx2.pshuf.b
    1, // llvm.x86.avx2.psign.b
    1, // llvm.x86.avx2.psign.d
    1, // llvm.x86.avx2.psign.w
    1, // llvm.x86.avx2.psll.d
    1, // llvm.x86.avx2.psll.dq
    1, // llvm.x86.avx2.psll.dq.bs
    1, // llvm.x86.avx2.psll.q
    1, // llvm.x86.avx2.psll.w
    1, // llvm.x86.avx2.pslli.d
    1, // llvm.x86.avx2.pslli.q
    1, // llvm.x86.avx2.pslli.w
    1, // llvm.x86.avx2.psllv.d
    1, // llvm.x86.avx2.psllv.d.256
    1, // llvm.x86.avx2.psllv.q
    1, // llvm.x86.avx2.psllv.q.256
    1, // llvm.x86.avx2.psra.d
    1, // llvm.x86.avx2.psra.w
    1, // llvm.x86.avx2.psrai.d
    1, // llvm.x86.avx2.psrai.w
    1, // llvm.x86.avx2.psrav.d
    1, // llvm.x86.avx2.psrav.d.256
    1, // llvm.x86.avx2.psrl.d
    1, // llvm.x86.avx2.psrl.dq
    1, // llvm.x86.avx2.psrl.dq.bs
    1, // llvm.x86.avx2.psrl.q
    1, // llvm.x86.avx2.psrl.w
    1, // llvm.x86.avx2.psrli.d
    1, // llvm.x86.avx2.psrli.q
    1, // llvm.x86.avx2.psrli.w
    1, // llvm.x86.avx2.psrlv.d
    1, // llvm.x86.avx2.psrlv.d.256
    1, // llvm.x86.avx2.psrlv.q
    1, // llvm.x86.avx2.psrlv.q.256
    1, // llvm.x86.avx2.psubs.b
    1, // llvm.x86.avx2.psubs.w
    1, // llvm.x86.avx2.psubus.b
    1, // llvm.x86.avx2.psubus.w
    1, // llvm.x86.avx2.vbroadcast.sd.pd.256
    1, // llvm.x86.avx2.vbroadcast.ss.ps
    1, // llvm.x86.avx2.vbroadcast.ss.ps.256
    3, // llvm.x86.avx2.vbroadcasti128
    1, // llvm.x86.avx2.vextracti128
    1, // llvm.x86.avx2.vinserti128
    1, // llvm.x86.avx2.vperm2i128
    1, // llvm.x86.avx512.cvtsd2usi
    1, // llvm.x86.avx512.cvtsd2usi64
    1, // llvm.x86.avx512.cvtss2usi
    1, // llvm.x86.avx512.cvtss2usi64
    1, // llvm.x86.avx512.cvttsd2usi
    1, // llvm.x86.avx512.cvttsd2usi64
    1, // llvm.x86.avx512.cvttss2usi
    1, // llvm.x86.avx512.cvttss2usi64
    1, // llvm.x86.avx512.cvtusi2sd
    1, // llvm.x86.avx512.cvtusi2ss
    1, // llvm.x86.avx512.cvtusi642sd
    1, // llvm.x86.avx512.cvtusi642ss
    3, // llvm.x86.avx512.gather.dpd.512
    3, // llvm.x86.avx512.gather.dpi.512
    3, // llvm.x86.avx512.gather.dpq.512
    3, // llvm.x86.avx512.gather.dps.512
    3, // llvm.x86.avx512.gather.qpd.512
    3, // llvm.x86.avx512.gather.qpi.512
    3, // llvm.x86.avx512.gather.qpq.512
    3, // llvm.x86.avx512.gather.qps.512
    2, // llvm.x86.avx512.gatherpf.dpd.512
    2, // llvm.x86.avx512.gatherpf.dps.512
    2, // llvm.x86.avx512.gatherpf.qpd.512
    2, // llvm.x86.avx512.gatherpf.qps.512
    1, // llvm.x86.avx512.kand.w
    1, // llvm.x86.avx512.kandn.w
    1, // llvm.x86.avx512.knot.w
    1, // llvm.x86.avx512.kor.w
    1, // llvm.x86.avx512.kortestc.w
    1, // llvm.x86.avx512.kortestz.w
    1, // llvm.x86.avx512.kunpck.bw
    1, // llvm.x86.avx512.kxnor.w
    1, // llvm.x86.avx512.kxor.w
    1, // llvm.x86.avx512.mask.blend.d.512
    1, // llvm.x86.avx512.mask.blend.pd.512
    1, // llvm.x86.avx512.mask.blend.ps.512
    1, // llvm.x86.avx512.mask.blend.q.512
    1, // llvm.x86.avx512.mask.cmp.pd.512
    1, // llvm.x86.avx512.mask.cmp.ps.512
    2, // llvm.x86.avx512.mask.conflict.d.512
    2, // llvm.x86.avx512.mask.conflict.q.512
    1, // llvm.x86.avx512.mask.cvtdq2pd.512
    1, // llvm.x86.avx512.mask.cvtdq2ps.512
    1, // llvm.x86.avx512.mask.cvtpd2dq.512
    1, // llvm.x86.avx512.mask.cvtpd2ps.512
    1, // llvm.x86.avx512.mask.cvtpd2udq.512
    1, // llvm.x86.avx512.mask.cvtps2dq.512
    1, // llvm.x86.avx512.mask.cvtps2udq.512
    1, // llvm.x86.avx512.mask.cvttpd2dq.512
    1, // llvm.x86.avx512.mask.cvttpd2udq.512
    1, // llvm.x86.avx512.mask.cvttps2dq.512
    1, // llvm.x86.avx512.mask.cvttps2udq.512
    1, // llvm.x86.avx512.mask.cvtudq2pd.512
    1, // llvm.x86.avx512.mask.cvtudq2ps.512
    3, // llvm.x86.avx512.mask.loadu.d.512
    3, // llvm.x86.avx512.mask.loadu.pd.512
    3, // llvm.x86.avx512.mask.loadu.ps.512
    3, // llvm.x86.avx512.mask.loadu.q.512
    2, // llvm.x86.avx512.mask.lzcnt.d.512
    2, // llvm.x86.avx512.mask.lzcnt.q.512
    1, // llvm.x86.avx512.mask.max.pd.512
    1, // llvm.x86.avx512.mask.max.ps.512
    1, // llvm.x86.avx512.mask.min.pd.512
    1, // llvm.x86.avx512.mask.min.ps.512
    1, // llvm.x86.avx512.mask.pabs.d.512
    1, // llvm.x86.avx512.mask.pabs.q.512
    1, // llvm.x86.avx512.mask.pand.d.512
    1, // llvm.x86.avx512.mask.pand.q.512
    1, // llvm.x86.avx512.mask.pbroadcast.d.gpr.512
    1, // llvm.x86.avx512.mask.pbroadcast.q.gpr.512
    1, // llvm.x86.avx512.mask.pbroadcast.q.mem.512
    1, // llvm.x86.avx512.mask.pcmpeq.d.512
    1, // llvm.x86.avx512.mask.pcmpeq.q.512
    1, // llvm.x86.avx512.mask.pmaxs.d.512
    1, // llvm.x86.avx512.mask.pmaxs.q.512
    1, // llvm.x86.avx512.mask.pmaxu.d.512
    1, // llvm.x86.avx512.mask.pmaxu.q.512
    1, // llvm.x86.avx512.mask.pmins.d.512
    1, // llvm.x86.avx512.mask.pmins.q.512
    1, // llvm.x86.avx512.mask.pminu.d.512
    1, // llvm.x86.avx512.mask.pminu.q.512
    1, // llvm.x86.avx512.mask.pmul.dq.512
    1, // llvm.x86.avx512.mask.pmulu.dq.512
    1, // llvm.x86.avx512.mask.ptestm.d.512
    1, // llvm.x86.avx512.mask.ptestm.q.512
    1, // llvm.x86.avx512.mask.rndscale.pd.512
    1, // llvm.x86.avx512.mask.rndscale.ps.512
    2, // llvm.x86.avx512.mask.storeu.d.512
    2, // llvm.x86.avx512.mask.storeu.pd.512
    2, // llvm.x86.avx512.mask.storeu.ps.512
    2, // llvm.x86.avx512.mask.storeu.q.512
    1, // llvm.x86.avx512.mask.vcvtph2ps.512
    1, // llvm.x86.avx512.mask.vcvtps2ph.512
    1, // llvm.x86.avx512.mask.vpermt.d.512
    1, // llvm.x86.avx512.mask.vpermt.pd.512
    1, // llvm.x86.avx512.mask.vpermt.ps.512
    1, // llvm.x86.avx512.mask.vpermt.q.512
    3, // llvm.x86.avx512.movntdqa
    1, // llvm.x86.avx512.pbroadcastd.512
    1, // llvm.x86.avx512.pbroadcastd.i32.512
    1, // llvm.x86.avx512.pbroadcastq.512
    1, // llvm.x86.avx512.pbroadcastq.i64.512
    1, // llvm.x86.avx512.pmovzxbd
    1, // llvm.x86.avx512.pmovzxbq
    1, // llvm.x86.avx512.pmovzxdq
    1, // llvm.x86.avx512.pmovzxwd
    1, // llvm.x86.avx512.pmovzxwq
    1, // llvm.x86.avx512.psll.dq
    1, // llvm.x86.avx512.psll.dq.bs
    1, // llvm.x86.avx512.psrl.dq
    1, // llvm.x86.avx512.psrl.dq.bs
    1, // llvm.x86.avx512.rcp14.pd.512
    1, // llvm.x86.avx512.rcp14.ps.512
    1, // llvm.x86.avx512.rcp14.sd
    1, // llvm.x86.avx512.rcp14.ss
    1, // llvm.x86.avx512.rcp28.pd
    1, // llvm.x86.avx512.rcp28.ps
    1, // llvm.x86.avx512.rcp28.sd
    1, // llvm.x86.avx512.rcp28.ss
    1, // llvm.x86.avx512.rndscale.sd
    1, // llvm.x86.avx512.rndscale.ss
    1, // llvm.x86.avx512.rsqrt14.pd.512
    1, // llvm.x86.avx512.rsqrt14.ps.512
    1, // llvm.x86.avx512.rsqrt14.sd
    1, // llvm.x86.avx512.rsqrt14.ss
    1, // llvm.x86.avx512.rsqrt28.pd
    1, // llvm.x86.avx512.rsqrt28.ps
    1, // llvm.x86.avx512.rsqrt28.sd
    1, // llvm.x86.avx512.rsqrt28.ss
    2, // llvm.x86.avx512.scatter.dpd.512
    2, // llvm.x86.avx512.scatter.dpi.512
    2, // llvm.x86.avx512.scatter.dpq.512
    2, // llvm.x86.avx512.scatter.dps.512
    2, // llvm.x86.avx512.scatter.qpd.512
    2, // llvm.x86.avx512.scatter.qpi.512
    2, // llvm.x86.avx512.scatter.qpq.512
    2, // llvm.x86.avx512.scatter.qps.512
    2, // llvm.x86.avx512.scatterpf.dpd.512
    2, // llvm.x86.avx512.scatterpf.dps.512
    2, // llvm.x86.avx512.scatterpf.qpd.512
    2, // llvm.x86.avx512.scatterpf.qps.512
    1, // llvm.x86.avx512.sqrt.pd.512
    1, // llvm.x86.avx512.sqrt.ps.512
    1, // llvm.x86.avx512.sqrt.sd
    1, // llvm.x86.avx512.sqrt.ss
    3, // llvm.x86.avx512.vbroadcast.sd.512
    1, // llvm.x86.avx512.vbroadcast.sd.pd.512
    3, // llvm.x86.avx512.vbroadcast.ss.512
    1, // llvm.x86.avx512.vbroadcast.ss.ps.512
    1, // llvm.x86.avx.addsub.pd.256
    1, // llvm.x86.avx.addsub.ps.256
    1, // llvm.x86.avx.blend.pd.256
    1, // llvm.x86.avx.blend.ps.256
    1, // llvm.x86.avx.blendv.pd.256
    1, // llvm.x86.avx.blendv.ps.256
    1, // llvm.x86.avx.cmp.pd.256
    1, // llvm.x86.avx.cmp.ps.256
    1, // llvm.x86.avx.cvt.pd2.ps.256
    1, // llvm.x86.avx.cvt.pd2dq.256
    1, // llvm.x86.avx.cvt.ps2.pd.256
    1, // llvm.x86.avx.cvt.ps2dq.256
    1, // llvm.x86.avx.cvtdq2.pd.256
    1, // llvm.x86.avx.cvtdq2.ps.256
    1, // llvm.x86.avx.cvtt.pd2dq.256
    1, // llvm.x86.avx.cvtt.ps2dq.256
    1, // llvm.x86.avx.dp.ps.256
    1, // llvm.x86.avx.hadd.pd.256
    1, // llvm.x86.avx.hadd.ps.256
    1, // llvm.x86.avx.hsub.pd.256
    1, // llvm.x86.avx.hsub.ps.256
    3, // llvm.x86.avx.ldu.dq.256
    3, // llvm.x86.avx.maskload.pd
    3, // llvm.x86.avx.maskload.pd.256
    3, // llvm.x86.avx.maskload.ps
    3, // llvm.x86.avx.maskload.ps.256
    2, // llvm.x86.avx.maskstore.pd
    2, // llvm.x86.avx.maskstore.pd.256
    2, // llvm.x86.avx.maskstore.ps
    2, // llvm.x86.avx.maskstore.ps.256
    1, // llvm.x86.avx.max.pd.256
    1, // llvm.x86.avx.max.ps.256
    1, // llvm.x86.avx.min.pd.256
    1, // llvm.x86.avx.min.ps.256
    1, // llvm.x86.avx.movmsk.pd.256
    1, // llvm.x86.avx.movmsk.ps.256
    1, // llvm.x86.avx.ptestc.256
    1, // llvm.x86.avx.ptestnzc.256
    1, // llvm.x86.avx.ptestz.256
    1, // llvm.x86.avx.rcp.ps.256
    1, // llvm.x86.avx.round.pd.256
    1, // llvm.x86.avx.round.ps.256
    1, // llvm.x86.avx.rsqrt.ps.256
    1, // llvm.x86.avx.sqrt.pd.256
    1, // llvm.x86.avx.sqrt.ps.256
    2, // llvm.x86.avx.storeu.dq.256
    2, // llvm.x86.avx.storeu.pd.256
    2, // llvm.x86.avx.storeu.ps.256
    3, // llvm.x86.avx.vbroadcastf128.pd.256
    3, // llvm.x86.avx.vbroadcastf128.ps.256
    1, // llvm.x86.avx.vextractf128.pd.256
    1, // llvm.x86.avx.vextractf128.ps.256
    1, // llvm.x86.avx.vextractf128.si.256
    1, // llvm.x86.avx.vinsertf128.pd.256
    1, // llvm.x86.avx.vinsertf128.ps.256
    1, // llvm.x86.avx.vinsertf128.si.256
    1, // llvm.x86.avx.vperm2f128.pd.256
    1, // llvm.x86.avx.vperm2f128.ps.256
    1, // llvm.x86.avx.vperm2f128.si.256
    1, // llvm.x86.avx.vpermilvar.pd
    1, // llvm.x86.avx.vpermilvar.pd.256
    1, // llvm.x86.avx.vpermilvar.ps
    1, // llvm.x86.avx.vpermilvar.ps.256
    1, // llvm.x86.avx.vtestc.pd
    1, // llvm.x86.avx.vtestc.pd.256
    1, // llvm.x86.avx.vtestc.ps
    1, // llvm.x86.avx.vtestc.ps.256
    1, // llvm.x86.avx.vtestnzc.pd
    1, // llvm.x86.avx.vtestnzc.pd.256
    1, // llvm.x86.avx.vtestnzc.ps
    1, // llvm.x86.avx.vtestnzc.ps.256
    1, // llvm.x86.avx.vtestz.pd
    1, // llvm.x86.avx.vtestz.pd.256
    1, // llvm.x86.avx.vtestz.ps
    1, // llvm.x86.avx.vtestz.ps.256
    2, // llvm.x86.avx.vzeroall
    2, // llvm.x86.avx.vzeroupper
    1, // llvm.x86.bmi.bextr.32
    1, // llvm.x86.bmi.bextr.64
    1, // llvm.x86.bmi.bzhi.32
    1, // llvm.x86.bmi.bzhi.64
    1, // llvm.x86.bmi.pdep.32
    1, // llvm.x86.bmi.pdep.64
    1, // llvm.x86.bmi.pext.32
    1, // llvm.x86.bmi.pext.64
    1, // llvm.x86.fma.vfmadd.pd
    1, // llvm.x86.fma.vfmadd.pd.256
    1, // llvm.x86.fma.vfmadd.pd.512
    1, // llvm.x86.fma.vfmadd.ps
    1, // llvm.x86.fma.vfmadd.ps.256
    1, // llvm.x86.fma.vfmadd.ps.512
    1, // llvm.x86.fma.vfmadd.sd
    1, // llvm.x86.fma.vfmadd.ss
    1, // llvm.x86.fma.vfmaddsub.pd
    1, // llvm.x86.fma.vfmaddsub.pd.256
    1, // llvm.x86.fma.vfmaddsub.pd.512
    1, // llvm.x86.fma.vfmaddsub.ps
    1, // llvm.x86.fma.vfmaddsub.ps.256
    1, // llvm.x86.fma.vfmaddsub.ps.512
    1, // llvm.x86.fma.vfmsub.pd
    1, // llvm.x86.fma.vfmsub.pd.256
    1, // llvm.x86.fma.vfmsub.pd.512
    1, // llvm.x86.fma.vfmsub.ps
    1, // llvm.x86.fma.vfmsub.ps.256
    1, // llvm.x86.fma.vfmsub.ps.512
    1, // llvm.x86.fma.vfmsub.sd
    1, // llvm.x86.fma.vfmsub.ss
    1, // llvm.x86.fma.vfmsubadd.pd
    1, // llvm.x86.fma.vfmsubadd.pd.256
    1, // llvm.x86.fma.vfmsubadd.pd.512
    1, // llvm.x86.fma.vfmsubadd.ps
    1, // llvm.x86.fma.vfmsubadd.ps.256
    1, // llvm.x86.fma.vfmsubadd.ps.512
    1, // llvm.x86.fma.vfnmadd.pd
    1, // llvm.x86.fma.vfnmadd.pd.256
    1, // llvm.x86.fma.vfnmadd.pd.512
    1, // llvm.x86.fma.vfnmadd.ps
    1, // llvm.x86.fma.vfnmadd.ps.256
    1, // llvm.x86.fma.vfnmadd.ps.512
    1, // llvm.x86.fma.vfnmadd.sd
    1, // llvm.x86.fma.vfnmadd.ss
    1, // llvm.x86.fma.vfnmsub.pd
    1, // llvm.x86.fma.vfnmsub.pd.256
    1, // llvm.x86.fma.vfnmsub.pd.512
    1, // llvm.x86.fma.vfnmsub.ps
    1, // llvm.x86.fma.vfnmsub.ps.256
    1, // llvm.x86.fma.vfnmsub.ps.512
    1, // llvm.x86.fma.vfnmsub.sd
    1, // llvm.x86.fma.vfnmsub.ss
    2, // llvm.x86.int
    2, // llvm.x86.mmx.emms
    2, // llvm.x86.mmx.femms
    2, // llvm.x86.mmx.maskmovq
    2, // llvm.x86.mmx.movnt.dq
    1, // llvm.x86.mmx.packssdw
    1, // llvm.x86.mmx.packsswb
    1, // llvm.x86.mmx.packuswb
    1, // llvm.x86.mmx.padd.b
    1, // llvm.x86.mmx.padd.d
    1, // llvm.x86.mmx.padd.q
    1, // llvm.x86.mmx.padd.w
    1, // llvm.x86.mmx.padds.b
    1, // llvm.x86.mmx.padds.w
    1, // llvm.x86.mmx.paddus.b
    1, // llvm.x86.mmx.paddus.w
    1, // llvm.x86.mmx.palignr.b
    1, // llvm.x86.mmx.pand
    1, // llvm.x86.mmx.pandn
    1, // llvm.x86.mmx.pavg.b
    1, // llvm.x86.mmx.pavg.w
    1, // llvm.x86.mmx.pcmpeq.b
    1, // llvm.x86.mmx.pcmpeq.d
    1, // llvm.x86.mmx.pcmpeq.w
    1, // llvm.x86.mmx.pcmpgt.b
    1, // llvm.x86.mmx.pcmpgt.d
    1, // llvm.x86.mmx.pcmpgt.w
    1, // llvm.x86.mmx.pextr.w
    1, // llvm.x86.mmx.pinsr.w
    1, // llvm.x86.mmx.pmadd.wd
    1, // llvm.x86.mmx.pmaxs.w
    1, // llvm.x86.mmx.pmaxu.b
    1, // llvm.x86.mmx.pmins.w
    1, // llvm.x86.mmx.pminu.b
    1, // llvm.x86.mmx.pmovmskb
    1, // llvm.x86.mmx.pmulh.w
    1, // llvm.x86.mmx.pmulhu.w
    1, // llvm.x86.mmx.pmull.w
    1, // llvm.x86.mmx.pmulu.dq
    1, // llvm.x86.mmx.por
    1, // llvm.x86.mmx.psad.bw
    1, // llvm.x86.mmx.psll.d
    1, // llvm.x86.mmx.psll.q
    1, // llvm.x86.mmx.psll.w
    1, // llvm.x86.mmx.pslli.d
    1, // llvm.x86.mmx.pslli.q
    1, // llvm.x86.mmx.pslli.w
    1, // llvm.x86.mmx.psra.d
    1, // llvm.x86.mmx.psra.w
    1, // llvm.x86.mmx.psrai.d
    1, // llvm.x86.mmx.psrai.w
    1, // llvm.x86.mmx.psrl.d
    1, // llvm.x86.mmx.psrl.q
    1, // llvm.x86.mmx.psrl.w
    1, // llvm.x86.mmx.psrli.d
    1, // llvm.x86.mmx.psrli.q
    1, // llvm.x86.mmx.psrli.w
    1, // llvm.x86.mmx.psub.b
    1, // llvm.x86.mmx.psub.d
    1, // llvm.x86.mmx.psub.q
    1, // llvm.x86.mmx.psub.w
    1, // llvm.x86.mmx.psubs.b
    1, // llvm.x86.mmx.psubs.w
    1, // llvm.x86.mmx.psubus.b
    1, // llvm.x86.mmx.psubus.w
    1, // llvm.x86.mmx.punpckhbw
    1, // llvm.x86.mmx.punpckhdq
    1, // llvm.x86.mmx.punpckhwd
    1, // llvm.x86.mmx.punpcklbw
    1, // llvm.x86.mmx.punpckldq
    1, // llvm.x86.mmx.punpcklwd
    1, // llvm.x86.mmx.pxor
    1, // llvm.x86.pclmulqdq
    2, // llvm.x86.rdfsbase.32
    2, // llvm.x86.rdfsbase.64
    2, // llvm.x86.rdgsbase.32
    2, // llvm.x86.rdgsbase.64
    2, // llvm.x86.rdpmc
    2, // llvm.x86.rdrand.16
    2, // llvm.x86.rdrand.32
    2, // llvm.x86.rdrand.64
    2, // llvm.x86.rdseed.16
    2, // llvm.x86.rdseed.32
    2, // llvm.x86.rdseed.64
    2, // llvm.x86.rdtsc
    2, // llvm.x86.rdtscp
    1, // llvm.x86.sha1msg1
    1, // llvm.x86.sha1msg2
    1, // llvm.x86.sha1nexte
    1, // llvm.x86.sha1rnds4
    1, // llvm.x86.sha256msg1
    1, // llvm.x86.sha256msg2
    1, // llvm.x86.sha256rnds2
    1, // llvm.x86.sse2.add.sd
    2, // llvm.x86.sse2.clflush
    1, // llvm.x86.sse2.cmp.pd
    1, // llvm.x86.sse2.cmp.sd
    1, // llvm.x86.sse2.comieq.sd
    1, // llvm.x86.sse2.comige.sd
    1, // llvm.x86.sse2.comigt.sd
    1, // llvm.x86.sse2.comile.sd
    1, // llvm.x86.sse2.comilt.sd
    1, // llvm.x86.sse2.comineq.sd
    1, // llvm.x86.sse2.cvtdq2pd
    1, // llvm.x86.sse2.cvtdq2ps
    1, // llvm.x86.sse2.cvtpd2dq
    1, // llvm.x86.sse2.cvtpd2ps
    1, // llvm.x86.sse2.cvtps2dq
    1, // llvm.x86.sse2.cvtps2pd
    1, // llvm.x86.sse2.cvtsd2si
    1, // llvm.x86.sse2.cvtsd2si64
    1, // llvm.x86.sse2.cvtsd2ss
    1, // llvm.x86.sse2.cvtsi2sd
    1, // llvm.x86.sse2.cvtsi642sd
    1, // llvm.x86.sse2.cvtss2sd
    1, // llvm.x86.sse2.cvttpd2dq
    1, // llvm.x86.sse2.cvttps2dq
    1, // llvm.x86.sse2.cvttsd2si
    1, // llvm.x86.sse2.cvttsd2si64
    1, // llvm.x86.sse2.div.sd
    2, // llvm.x86.sse2.lfence
    2, // llvm.x86.sse2.maskmov.dqu
    1, // llvm.x86.sse2.max.pd
    1, // llvm.x86.sse2.max.sd
    2, // llvm.x86.sse2.mfence
    1, // llvm.x86.sse2.min.pd
    1, // llvm.x86.sse2.min.sd
    1, // llvm.x86.sse2.movmsk.pd
    1, // llvm.x86.sse2.mul.sd
    1, // llvm.x86.sse2.packssdw.128
    1, // llvm.x86.sse2.packsswb.128
    1, // llvm.x86.sse2.packuswb.128
    1, // llvm.x86.sse2.padds.b
    1, // llvm.x86.sse2.padds.w
    1, // llvm.x86.sse2.paddus.b
    1, // llvm.x86.sse2.paddus.w
    2, // llvm.x86.sse2.pause
    1, // llvm.x86.sse2.pavg.b
    1, // llvm.x86.sse2.pavg.w
    1, // llvm.x86.sse2.pmadd.wd
    1, // llvm.x86.sse2.pmaxs.w
    1, // llvm.x86.sse2.pmaxu.b
    1, // llvm.x86.sse2.pmins.w
    1, // llvm.x86.sse2.pminu.b
    1, // llvm.x86.sse2.pmovmskb.128
    1, // llvm.x86.sse2.pmulh.w
    1, // llvm.x86.sse2.pmulhu.w
    1, // llvm.x86.sse2.pmulu.dq
    1, // llvm.x86.sse2.psad.bw
    1, // llvm.x86.sse2.pshuf.d
    1, // llvm.x86.sse2.pshufh.w
    1, // llvm.x86.sse2.pshufl.w
    1, // llvm.x86.sse2.psll.d
    1, // llvm.x86.sse2.psll.dq
    1, // llvm.x86.sse2.psll.dq.bs
    1, // llvm.x86.sse2.psll.q
    1, // llvm.x86.sse2.psll.w
    1, // llvm.x86.sse2.pslli.d
    1, // llvm.x86.sse2.pslli.q
    1, // llvm.x86.sse2.pslli.w
    1, // llvm.x86.sse2.psra.d
    1, // llvm.x86.sse2.psra.w
    1, // llvm.x86.sse2.psrai.d
    1, // llvm.x86.sse2.psrai.w
    1, // llvm.x86.sse2.psrl.d
    1, // llvm.x86.sse2.psrl.dq
    1, // llvm.x86.sse2.psrl.dq.bs
    1, // llvm.x86.sse2.psrl.q
    1, // llvm.x86.sse2.psrl.w
    1, // llvm.x86.sse2.psrli.d
    1, // llvm.x86.sse2.psrli.q
    1, // llvm.x86.sse2.psrli.w
    1, // llvm.x86.sse2.psubs.b
    1, // llvm.x86.sse2.psubs.w
    1, // llvm.x86.sse2.psubus.b
    1, // llvm.x86.sse2.psubus.w
    1, // llvm.x86.sse2.sqrt.pd
    1, // llvm.x86.sse2.sqrt.sd
    2, // llvm.x86.sse2.storel.dq
    2, // llvm.x86.sse2.storeu.dq
    2, // llvm.x86.sse2.storeu.pd
    1, // llvm.x86.sse2.sub.sd
    1, // llvm.x86.sse2.ucomieq.sd
    1, // llvm.x86.sse2.ucomige.sd
    1, // llvm.x86.sse2.ucomigt.sd
    1, // llvm.x86.sse2.ucomile.sd
    1, // llvm.x86.sse2.ucomilt.sd
    1, // llvm.x86.sse2.ucomineq.sd
    1, // llvm.x86.sse3.addsub.pd
    1, // llvm.x86.sse3.addsub.ps
    1, // llvm.x86.sse3.hadd.pd
    1, // llvm.x86.sse3.hadd.ps
    1, // llvm.x86.sse3.hsub.pd
    1, // llvm.x86.sse3.hsub.ps
    3, // llvm.x86.sse3.ldu.dq
    2, // llvm.x86.sse3.monitor
    2, // llvm.x86.sse3.mwait
    1, // llvm.x86.sse41.blendpd
    1, // llvm.x86.sse41.blendps
    1, // llvm.x86.sse41.blendvpd
    1, // llvm.x86.sse41.blendvps
    1, // llvm.x86.sse41.dppd
    1, // llvm.x86.sse41.dpps
    1, // llvm.x86.sse41.extractps
    1, // llvm.x86.sse41.insertps
    3, // llvm.x86.sse41.movntdqa
    1, // llvm.x86.sse41.mpsadbw
    1, // llvm.x86.sse41.packusdw
    1, // llvm.x86.sse41.pblendvb
    1, // llvm.x86.sse41.pblendw
    1, // llvm.x86.sse41.pextrb
    1, // llvm.x86.sse41.pextrd
    1, // llvm.x86.sse41.pextrq
    1, // llvm.x86.sse41.phminposuw
    1, // llvm.x86.sse41.pmaxsb
    1, // llvm.x86.sse41.pmaxsd
    1, // llvm.x86.sse41.pmaxud
    1, // llvm.x86.sse41.pmaxuw
    1, // llvm.x86.sse41.pminsb
    1, // llvm.x86.sse41.pminsd
    1, // llvm.x86.sse41.pminud
    1, // llvm.x86.sse41.pminuw
    1, // llvm.x86.sse41.pmovsxbd
    1, // llvm.x86.sse41.pmovsxbq
    1, // llvm.x86.sse41.pmovsxbw
    1, // llvm.x86.sse41.pmovsxdq
    1, // llvm.x86.sse41.pmovsxwd
    1, // llvm.x86.sse41.pmovsxwq
    1, // llvm.x86.sse41.pmovzxbd
    1, // llvm.x86.sse41.pmovzxbq
    1, // llvm.x86.sse41.pmovzxbw
    1, // llvm.x86.sse41.pmovzxdq
    1, // llvm.x86.sse41.pmovzxwd
    1, // llvm.x86.sse41.pmovzxwq
    1, // llvm.x86.sse41.pmuldq
    1, // llvm.x86.sse41.ptestc
    1, // llvm.x86.sse41.ptestnzc
    1, // llvm.x86.sse41.ptestz
    1, // llvm.x86.sse41.round.pd
    1, // llvm.x86.sse41.round.ps
    1, // llvm.x86.sse41.round.sd
    1, // llvm.x86.sse41.round.ss
    1, // llvm.x86.sse42.crc32.32.16
    1, // llvm.x86.sse42.crc32.32.32
    1, // llvm.x86.sse42.crc32.32.8
    1, // llvm.x86.sse42.crc32.64.64
    1, // llvm.x86.sse42.pcmpestri128
    1, // llvm.x86.sse42.pcmpestria128
    1, // llvm.x86.sse42.pcmpestric128
    1, // llvm.x86.sse42.pcmpestrio128
    1, // llvm.x86.sse42.pcmpestris128
    1, // llvm.x86.sse42.pcmpestriz128
    1, // llvm.x86.sse42.pcmpestrm128
    1, // llvm.x86.sse42.pcmpistri128
    1, // llvm.x86.sse42.pcmpistria128
    1, // llvm.x86.sse42.pcmpistric128
    1, // llvm.x86.sse42.pcmpistrio128
    1, // llvm.x86.sse42.pcmpistris128
    1, // llvm.x86.sse42.pcmpistriz128
    1, // llvm.x86.sse42.pcmpistrm128
    1, // llvm.x86.sse4a.extrq
    1, // llvm.x86.sse4a.extrqi
    1, // llvm.x86.sse4a.insertq
    1, // llvm.x86.sse4a.insertqi
    2, // llvm.x86.sse4a.movnt.sd
    2, // llvm.x86.sse4a.movnt.ss
    1, // llvm.x86.sse.add.ss
    1, // llvm.x86.sse.cmp.ps
    1, // llvm.x86.sse.cmp.ss
    1, // llvm.x86.sse.comieq.ss
    1, // llvm.x86.sse.comige.ss
    1, // llvm.x86.sse.comigt.ss
    1, // llvm.x86.sse.comile.ss
    1, // llvm.x86.sse.comilt.ss
    1, // llvm.x86.sse.comineq.ss
    1, // llvm.x86.sse.cvtpd2pi
    1, // llvm.x86.sse.cvtpi2pd
    1, // llvm.x86.sse.cvtpi2ps
    1, // llvm.x86.sse.cvtps2pi
    1, // llvm.x86.sse.cvtsi2ss
    1, // llvm.x86.sse.cvtsi642ss
    1, // llvm.x86.sse.cvtss2si
    1, // llvm.x86.sse.cvtss2si64
    1, // llvm.x86.sse.cvttpd2pi
    1, // llvm.x86.sse.cvttps2pi
    1, // llvm.x86.sse.cvttss2si
    1, // llvm.x86.sse.cvttss2si64
    1, // llvm.x86.sse.div.ss
    2, // llvm.x86.sse.ldmxcsr
    1, // llvm.x86.sse.max.ps
    1, // llvm.x86.sse.max.ss
    1, // llvm.x86.sse.min.ps
    1, // llvm.x86.sse.min.ss
    1, // llvm.x86.sse.movmsk.ps
    1, // llvm.x86.sse.mul.ss
    1, // llvm.x86.sse.pshuf.w
    1, // llvm.x86.sse.rcp.ps
    1, // llvm.x86.sse.rcp.ss
    1, // llvm.x86.sse.rsqrt.ps
    1, // llvm.x86.sse.rsqrt.ss
    2, // llvm.x86.sse.sfence
    1, // llvm.x86.sse.sqrt.ps
    1, // llvm.x86.sse.sqrt.ss
    2, // llvm.x86.sse.stmxcsr
    2, // llvm.x86.sse.storeu.ps
    1, // llvm.x86.sse.sub.ss
    1, // llvm.x86.sse.ucomieq.ss
    1, // llvm.x86.sse.ucomige.ss
    1, // llvm.x86.sse.ucomigt.ss
    1, // llvm.x86.sse.ucomile.ss
    1, // llvm.x86.sse.ucomilt.ss
    1, // llvm.x86.sse.ucomineq.ss
    1, // llvm.x86.ssse3.pabs.b
    1, // llvm.x86.ssse3.pabs.b.128
    1, // llvm.x86.ssse3.pabs.d
    1, // llvm.x86.ssse3.pabs.d.128
    1, // llvm.x86.ssse3.pabs.w
    1, // llvm.x86.ssse3.pabs.w.128
    1, // llvm.x86.ssse3.phadd.d
    1, // llvm.x86.ssse3.phadd.d.128
    1, // llvm.x86.ssse3.phadd.sw
    1, // llvm.x86.ssse3.phadd.sw.128
    1, // llvm.x86.ssse3.phadd.w
    1, // llvm.x86.ssse3.phadd.w.128
    1, // llvm.x86.ssse3.phsub.d
    1, // llvm.x86.ssse3.phsub.d.128
    1, // llvm.x86.ssse3.phsub.sw
    1, // llvm.x86.ssse3.phsub.sw.128
    1, // llvm.x86.ssse3.phsub.w
    1, // llvm.x86.ssse3.phsub.w.128
    1, // llvm.x86.ssse3.pmadd.ub.sw
    1, // llvm.x86.ssse3.pmadd.ub.sw.128
    1, // llvm.x86.ssse3.pmul.hr.sw
    1, // llvm.x86.ssse3.pmul.hr.sw.128
    1, // llvm.x86.ssse3.pshuf.b
    1, // llvm.x86.ssse3.pshuf.b.128
    1, // llvm.x86.ssse3.psign.b
    1, // llvm.x86.ssse3.psign.b.128
    1, // llvm.x86.ssse3.psign.d
    1, // llvm.x86.ssse3.psign.d.128
    1, // llvm.x86.ssse3.psign.w
    1, // llvm.x86.ssse3.psign.w.128
    1, // llvm.x86.tbm.bextri.u32
    1, // llvm.x86.tbm.bextri.u64
    1, // llvm.x86.vcvtph2ps.128
    1, // llvm.x86.vcvtph2ps.256
    1, // llvm.x86.vcvtps2ph.128
    1, // llvm.x86.vcvtps2ph.256
    2, // llvm.x86.wrfsbase.32
    2, // llvm.x86.wrfsbase.64
    2, // llvm.x86.wrgsbase.32
    2, // llvm.x86.wrgsbase.64
    9, // llvm.x86.xabort
    2, // llvm.x86.xbegin
    2, // llvm.x86.xend
    1, // llvm.x86.xop.vfrcz.pd
    1, // llvm.x86.xop.vfrcz.pd.256
    1, // llvm.x86.xop.vfrcz.ps
    1, // llvm.x86.xop.vfrcz.ps.256
    1, // llvm.x86.xop.vfrcz.sd
    1, // llvm.x86.xop.vfrcz.ss
    1, // llvm.x86.xop.vpcmov
    1, // llvm.x86.xop.vpcmov.256
    1, // llvm.x86.xop.vpcomb
    1, // llvm.x86.xop.vpcomd
    1, // llvm.x86.xop.vpcomq
    1, // llvm.x86.xop.vpcomub
    1, // llvm.x86.xop.vpcomud
    1, // llvm.x86.xop.vpcomuq
    1, // llvm.x86.xop.vpcomuw
    1, // llvm.x86.xop.vpcomw
    1, // llvm.x86.xop.vpermil2pd
    1, // llvm.x86.xop.vpermil2pd.256
    1, // llvm.x86.xop.vpermil2ps
    1, // llvm.x86.xop.vpermil2ps.256
    1, // llvm.x86.xop.vphaddbd
    1, // llvm.x86.xop.vphaddbq
    1, // llvm.x86.xop.vphaddbw
    1, // llvm.x86.xop.vphadddq
    1, // llvm.x86.xop.vphaddubd
    1, // llvm.x86.xop.vphaddubq
    1, // llvm.x86.xop.vphaddubw
    1, // llvm.x86.xop.vphaddudq
    1, // llvm.x86.xop.vphadduwd
    1, // llvm.x86.xop.vphadduwq
    1, // llvm.x86.xop.vphaddwd
    1, // llvm.x86.xop.vphaddwq
    1, // llvm.x86.xop.vphsubbw
    1, // llvm.x86.xop.vphsubdq
    1, // llvm.x86.xop.vphsubwd
    1, // llvm.x86.xop.vpmacsdd
    1, // llvm.x86.xop.vpmacsdqh
    1, // llvm.x86.xop.vpmacsdql
    1, // llvm.x86.xop.vpmacssdd
    1, // llvm.x86.xop.vpmacssdqh
    1, // llvm.x86.xop.vpmacssdql
    1, // llvm.x86.xop.vpmacsswd
    1, // llvm.x86.xop.vpmacssww
    1, // llvm.x86.xop.vpmacswd
    1, // llvm.x86.xop.vpmacsww
    1, // llvm.x86.xop.vpmadcsswd
    1, // llvm.x86.xop.vpmadcswd
    1, // llvm.x86.xop.vpperm
    1, // llvm.x86.xop.vprotb
    1, // llvm.x86.xop.vprotbi
    1, // llvm.x86.xop.vprotd
    1, // llvm.x86.xop.vprotdi
    1, // llvm.x86.xop.vprotq
    1, // llvm.x86.xop.vprotqi
    1, // llvm.x86.xop.vprotw
    1, // llvm.x86.xop.vprotwi
    1, // llvm.x86.xop.vpshab
    1, // llvm.x86.xop.vpshad
    1, // llvm.x86.xop.vpshaq
    1, // llvm.x86.xop.vpshaw
    1, // llvm.x86.xop.vpshlb
    1, // llvm.x86.xop.vpshld
    1, // llvm.x86.xop.vpshlq
    1, // llvm.x86.xop.vpshlw
    2, // llvm.x86.xtest
    1, // llvm.xcore.bitrev
    2, // llvm.xcore.checkevent
    12, // llvm.xcore.chkct
    2, // llvm.xcore.clre
    12, // llvm.xcore.clrpt
    2, // llvm.xcore.clrsr
    1, // llvm.xcore.crc32
    1, // llvm.xcore.crc8
    12, // llvm.xcore.edu
    12, // llvm.xcore.eeu
    12, // llvm.xcore.endin
    12, // llvm.xcore.freer
    2, // llvm.xcore.geted
    2, // llvm.xcore.getet
    1, // llvm.xcore.getid
    2, // llvm.xcore.getps
    2, // llvm.xcore.getr
    12, // llvm.xcore.getst
    12, // llvm.xcore.getts
    12, // llvm.xcore.in
    12, // llvm.xcore.inct
    12, // llvm.xcore.initcp
    12, // llvm.xcore.initdp
    12, // llvm.xcore.initlr
    12, // llvm.xcore.initpc
    12, // llvm.xcore.initsp
    12, // llvm.xcore.inshr
    12, // llvm.xcore.int
    12, // llvm.xcore.mjoin
    12, // llvm.xcore.msync
    12, // llvm.xcore.out
    12, // llvm.xcore.outct
    12, // llvm.xcore.outshr
    12, // llvm.xcore.outt
    12, // llvm.xcore.peek
    12, // llvm.xcore.setc
    17, // llvm.xcore.setclk
    12, // llvm.xcore.setd
    12, // llvm.xcore.setev
    2, // llvm.xcore.setps
    12, // llvm.xcore.setpsc
    12, // llvm.xcore.setpt
    17, // llvm.xcore.setrdy
    2, // llvm.xcore.setsr
    12, // llvm.xcore.settw
    12, // llvm.xcore.setv
    1, // llvm.xcore.sext
    2, // llvm.xcore.ssync
    12, // llvm.xcore.syncr
    12, // llvm.xcore.testct
    12, // llvm.xcore.testwct
    3, // llvm.xcore.waitevent
    1, // llvm.xcore.zext
  };

  AttributeSet AS[4];
  unsigned NumAttrs = 0;
  if (id != 0) {
    switch(IntrinsicsToAttributesMap[id - 1]) {
    default: llvm_unreachable("Invalid attribute number");
    case 1: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
      AS[0] = AttributeSet::get(C, AttributeSet::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 16: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
      AS[0] = AttributeSet::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadNone};
      AS[1] = AttributeSet::get(C, AttributeSet::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 3: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadOnly};
      AS[0] = AttributeSet::get(C, AttributeSet::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 15: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
      AS[0] = AttributeSet::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::ReadOnly};
      AS[1] = AttributeSet::get(C, AttributeSet::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 2: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[0] = AttributeSet::get(C, AttributeSet::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 12: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
      AS[0] = AttributeSet::get(C, 1, AttrParam1);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[1] = AttributeSet::get(C, AttributeSet::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 17: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
      AS[0] = AttributeSet::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam2[]= {Attribute::NoCapture};
      AS[1] = AttributeSet::get(C, 2, AttrParam2);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[2] = AttributeSet::get(C, AttributeSet::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 14: {
      const Attribute::AttrKind AttrParam1[]= {Attribute::NoCapture};
      AS[0] = AttributeSet::get(C, 1, AttrParam1);
      const Attribute::AttrKind AttrParam2[]= {Attribute::NoCapture,Attribute::ReadOnly};
      AS[1] = AttributeSet::get(C, 2, AttrParam2);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[2] = AttributeSet::get(C, AttributeSet::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 13: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::NoCapture};
      AS[0] = AttributeSet::get(C, 2, AttrParam2);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[1] = AttributeSet::get(C, AttributeSet::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 11: {
      const Attribute::AttrKind AttrParam2[]= {Attribute::NoCapture};
      AS[0] = AttributeSet::get(C, 2, AttrParam2);
      const Attribute::AttrKind AttrParam3[]= {Attribute::NoCapture};
      AS[1] = AttributeSet::get(C, 3, AttrParam3);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[2] = AttributeSet::get(C, AttributeSet::FunctionIndex, Atts);
      NumAttrs = 3;
      break;
      }
    case 4: {
      const Attribute::AttrKind AttrParam3[]= {Attribute::NoCapture};
      AS[0] = AttributeSet::get(C, 3, AttrParam3);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[1] = AttributeSet::get(C, AttributeSet::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 5: {
      const Attribute::AttrKind AttrParam4[]= {Attribute::NoCapture};
      AS[0] = AttributeSet::get(C, 4, AttrParam4);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[1] = AttributeSet::get(C, AttributeSet::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 6: {
      const Attribute::AttrKind AttrParam5[]= {Attribute::NoCapture};
      AS[0] = AttributeSet::get(C, 5, AttrParam5);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[1] = AttributeSet::get(C, AttributeSet::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 7: {
      const Attribute::AttrKind AttrParam6[]= {Attribute::NoCapture};
      AS[0] = AttributeSet::get(C, 6, AttrParam6);
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind};
      AS[1] = AttributeSet::get(C, AttributeSet::FunctionIndex, Atts);
      NumAttrs = 2;
      break;
      }
    case 9: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::NoReturn};
      AS[0] = AttributeSet::get(C, AttributeSet::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 8: {
      const Attribute::AttrKind Atts[] = {Attribute::NoUnwind,Attribute::NoDuplicate};
      AS[0] = AttributeSet::get(C, AttributeSet::FunctionIndex, Atts);
      NumAttrs = 1;
      break;
      }
    case 10: {
      return AttributeSet();
      }
    }
  }
  return AttributeSet::get(C, ArrayRef<AttributeSet>(AS, NumAttrs));
}
#endif // GET_INTRINSIC_ATTRIBUTES

// Determine intrinsic alias analysis mod/ref behavior.
#ifdef GET_INTRINSIC_MODREF_BEHAVIOR
assert(iid <= Intrinsic::xcore_zext && "Unknown intrinsic.");

static const uint8_t IntrinsicModRefBehavior[] = {
  /* invalid */ UnknownModRefBehavior,
  /* AMDGPU_div_fixup */ DoesNotAccessMemory,
  /* AMDGPU_div_fmas */ DoesNotAccessMemory,
  /* AMDGPU_div_scale */ DoesNotAccessMemory,
  /* AMDGPU_rcp */ DoesNotAccessMemory,
  /* AMDGPU_rsq */ DoesNotAccessMemory,
  /* AMDGPU_rsq_clamped */ DoesNotAccessMemory,
  /* AMDGPU_trig_preop */ DoesNotAccessMemory,
  /* aarch64_clrex */ UnknownModRefBehavior,
  /* aarch64_crc32b */ DoesNotAccessMemory,
  /* aarch64_crc32cb */ DoesNotAccessMemory,
  /* aarch64_crc32ch */ DoesNotAccessMemory,
  /* aarch64_crc32cw */ DoesNotAccessMemory,
  /* aarch64_crc32cx */ DoesNotAccessMemory,
  /* aarch64_crc32h */ DoesNotAccessMemory,
  /* aarch64_crc32w */ DoesNotAccessMemory,
  /* aarch64_crc32x */ DoesNotAccessMemory,
  /* aarch64_crypto_aesd */ DoesNotAccessMemory,
  /* aarch64_crypto_aese */ DoesNotAccessMemory,
  /* aarch64_crypto_aesimc */ DoesNotAccessMemory,
  /* aarch64_crypto_aesmc */ DoesNotAccessMemory,
  /* aarch64_crypto_sha1c */ DoesNotAccessMemory,
  /* aarch64_crypto_sha1h */ DoesNotAccessMemory,
  /* aarch64_crypto_sha1m */ DoesNotAccessMemory,
  /* aarch64_crypto_sha1p */ DoesNotAccessMemory,
  /* aarch64_crypto_sha1su0 */ DoesNotAccessMemory,
  /* aarch64_crypto_sha1su1 */ DoesNotAccessMemory,
  /* aarch64_crypto_sha256h */ DoesNotAccessMemory,
  /* aarch64_crypto_sha256h2 */ DoesNotAccessMemory,
  /* aarch64_crypto_sha256su0 */ DoesNotAccessMemory,
  /* aarch64_crypto_sha256su1 */ DoesNotAccessMemory,
  /* aarch64_dmb */ UnknownModRefBehavior,
  /* aarch64_dsb */ UnknownModRefBehavior,
  /* aarch64_hint */ UnknownModRefBehavior,
  /* aarch64_isb */ UnknownModRefBehavior,
  /* aarch64_ldaxp */ UnknownModRefBehavior,
  /* aarch64_ldaxr */ UnknownModRefBehavior,
  /* aarch64_ldxp */ UnknownModRefBehavior,
  /* aarch64_ldxr */ UnknownModRefBehavior,
  /* aarch64_neon_abs */ DoesNotAccessMemory,
  /* aarch64_neon_addhn */ DoesNotAccessMemory,
  /* aarch64_neon_addp */ DoesNotAccessMemory,
  /* aarch64_neon_cls */ DoesNotAccessMemory,
  /* aarch64_neon_fabd */ DoesNotAccessMemory,
  /* aarch64_neon_facge */ DoesNotAccessMemory,
  /* aarch64_neon_facgt */ DoesNotAccessMemory,
  /* aarch64_neon_faddv */ DoesNotAccessMemory,
  /* aarch64_neon_fcvtas */ DoesNotAccessMemory,
  /* aarch64_neon_fcvtau */ DoesNotAccessMemory,
  /* aarch64_neon_fcvtms */ DoesNotAccessMemory,
  /* aarch64_neon_fcvtmu */ DoesNotAccessMemory,
  /* aarch64_neon_fcvtns */ DoesNotAccessMemory,
  /* aarch64_neon_fcvtnu */ DoesNotAccessMemory,
  /* aarch64_neon_fcvtps */ DoesNotAccessMemory,
  /* aarch64_neon_fcvtpu */ DoesNotAccessMemory,
  /* aarch64_neon_fcvtxn */ DoesNotAccessMemory,
  /* aarch64_neon_fcvtzs */ DoesNotAccessMemory,
  /* aarch64_neon_fcvtzu */ DoesNotAccessMemory,
  /* aarch64_neon_fmax */ DoesNotAccessMemory,
  /* aarch64_neon_fmaxnm */ DoesNotAccessMemory,
  /* aarch64_neon_fmaxnmp */ DoesNotAccessMemory,
  /* aarch64_neon_fmaxnmv */ DoesNotAccessMemory,
  /* aarch64_neon_fmaxp */ DoesNotAccessMemory,
  /* aarch64_neon_fmaxv */ DoesNotAccessMemory,
  /* aarch64_neon_fmin */ DoesNotAccessMemory,
  /* aarch64_neon_fminnm */ DoesNotAccessMemory,
  /* aarch64_neon_fminnmp */ DoesNotAccessMemory,
  /* aarch64_neon_fminnmv */ DoesNotAccessMemory,
  /* aarch64_neon_fminp */ DoesNotAccessMemory,
  /* aarch64_neon_fminv */ DoesNotAccessMemory,
  /* aarch64_neon_fmulx */ DoesNotAccessMemory,
  /* aarch64_neon_frecpe */ DoesNotAccessMemory,
  /* aarch64_neon_frecps */ DoesNotAccessMemory,
  /* aarch64_neon_frecpx */ DoesNotAccessMemory,
  /* aarch64_neon_frintn */ DoesNotAccessMemory,
  /* aarch64_neon_frsqrte */ DoesNotAccessMemory,
  /* aarch64_neon_frsqrts */ DoesNotAccessMemory,
  /* aarch64_neon_ld1x2 */ OnlyReadsArgumentPointees,
  /* aarch64_neon_ld1x3 */ OnlyReadsArgumentPointees,
  /* aarch64_neon_ld1x4 */ OnlyReadsArgumentPointees,
  /* aarch64_neon_ld2 */ OnlyReadsArgumentPointees,
  /* aarch64_neon_ld2lane */ OnlyReadsArgumentPointees,
  /* aarch64_neon_ld2r */ OnlyReadsArgumentPointees,
  /* aarch64_neon_ld3 */ OnlyReadsArgumentPointees,
  /* aarch64_neon_ld3lane */ OnlyReadsArgumentPointees,
  /* aarch64_neon_ld3r */ OnlyReadsArgumentPointees,
  /* aarch64_neon_ld4 */ OnlyReadsArgumentPointees,
  /* aarch64_neon_ld4lane */ OnlyReadsArgumentPointees,
  /* aarch64_neon_ld4r */ OnlyReadsArgumentPointees,
  /* aarch64_neon_pmul */ DoesNotAccessMemory,
  /* aarch64_neon_pmull */ DoesNotAccessMemory,
  /* aarch64_neon_pmull64 */ DoesNotAccessMemory,
  /* aarch64_neon_raddhn */ DoesNotAccessMemory,
  /* aarch64_neon_rbit */ DoesNotAccessMemory,
  /* aarch64_neon_rshrn */ DoesNotAccessMemory,
  /* aarch64_neon_rsubhn */ DoesNotAccessMemory,
  /* aarch64_neon_sabd */ DoesNotAccessMemory,
  /* aarch64_neon_saddlp */ DoesNotAccessMemory,
  /* aarch64_neon_saddlv */ DoesNotAccessMemory,
  /* aarch64_neon_saddv */ DoesNotAccessMemory,
  /* aarch64_neon_scalar_sqxtn */ DoesNotAccessMemory,
  /* aarch64_neon_scalar_sqxtun */ DoesNotAccessMemory,
  /* aarch64_neon_scalar_uqxtn */ DoesNotAccessMemory,
  /* aarch64_neon_shadd */ DoesNotAccessMemory,
  /* aarch64_neon_shll */ DoesNotAccessMemory,
  /* aarch64_neon_shsub */ DoesNotAccessMemory,
  /* aarch64_neon_smax */ DoesNotAccessMemory,
  /* aarch64_neon_smaxp */ DoesNotAccessMemory,
  /* aarch64_neon_smaxv */ DoesNotAccessMemory,
  /* aarch64_neon_smin */ DoesNotAccessMemory,
  /* aarch64_neon_sminp */ DoesNotAccessMemory,
  /* aarch64_neon_sminv */ DoesNotAccessMemory,
  /* aarch64_neon_smull */ DoesNotAccessMemory,
  /* aarch64_neon_sqabs */ DoesNotAccessMemory,
  /* aarch64_neon_sqadd */ DoesNotAccessMemory,
  /* aarch64_neon_sqdmulh */ DoesNotAccessMemory,
  /* aarch64_neon_sqdmull */ DoesNotAccessMemory,
  /* aarch64_neon_sqdmulls_scalar */ DoesNotAccessMemory,
  /* aarch64_neon_sqneg */ DoesNotAccessMemory,
  /* aarch64_neon_sqrdmulh */ DoesNotAccessMemory,
  /* aarch64_neon_sqrshl */ DoesNotAccessMemory,
  /* aarch64_neon_sqrshrn */ DoesNotAccessMemory,
  /* aarch64_neon_sqrshrun */ DoesNotAccessMemory,
  /* aarch64_neon_sqshl */ DoesNotAccessMemory,
  /* aarch64_neon_sqshlu */ DoesNotAccessMemory,
  /* aarch64_neon_sqshrn */ DoesNotAccessMemory,
  /* aarch64_neon_sqshrun */ DoesNotAccessMemory,
  /* aarch64_neon_sqsub */ DoesNotAccessMemory,
  /* aarch64_neon_sqxtn */ DoesNotAccessMemory,
  /* aarch64_neon_sqxtun */ DoesNotAccessMemory,
  /* aarch64_neon_srhadd */ DoesNotAccessMemory,
  /* aarch64_neon_srshl */ DoesNotAccessMemory,
  /* aarch64_neon_sshl */ DoesNotAccessMemory,
  /* aarch64_neon_sshll */ DoesNotAccessMemory,
  /* aarch64_neon_st1x2 */ OnlyAccessesArgumentPointees,
  /* aarch64_neon_st1x3 */ OnlyAccessesArgumentPointees,
  /* aarch64_neon_st1x4 */ OnlyAccessesArgumentPointees,
  /* aarch64_neon_st2 */ OnlyAccessesArgumentPointees,
  /* aarch64_neon_st2lane */ OnlyAccessesArgumentPointees,
  /* aarch64_neon_st3 */ OnlyAccessesArgumentPointees,
  /* aarch64_neon_st3lane */ OnlyAccessesArgumentPointees,
  /* aarch64_neon_st4 */ OnlyAccessesArgumentPointees,
  /* aarch64_neon_st4lane */ OnlyAccessesArgumentPointees,
  /* aarch64_neon_subhn */ DoesNotAccessMemory,
  /* aarch64_neon_suqadd */ DoesNotAccessMemory,
  /* aarch64_neon_tbl1 */ DoesNotAccessMemory,
  /* aarch64_neon_tbl2 */ DoesNotAccessMemory,
  /* aarch64_neon_tbl3 */ DoesNotAccessMemory,
  /* aarch64_neon_tbl4 */ DoesNotAccessMemory,
  /* aarch64_neon_tbx1 */ DoesNotAccessMemory,
  /* aarch64_neon_tbx2 */ DoesNotAccessMemory,
  /* aarch64_neon_tbx3 */ DoesNotAccessMemory,
  /* aarch64_neon_tbx4 */ DoesNotAccessMemory,
  /* aarch64_neon_uabd */ DoesNotAccessMemory,
  /* aarch64_neon_uaddlp */ DoesNotAccessMemory,
  /* aarch64_neon_uaddlv */ DoesNotAccessMemory,
  /* aarch64_neon_uaddv */ DoesNotAccessMemory,
  /* aarch64_neon_uhadd */ DoesNotAccessMemory,
  /* aarch64_neon_uhsub */ DoesNotAccessMemory,
  /* aarch64_neon_umax */ DoesNotAccessMemory,
  /* aarch64_neon_umaxp */ DoesNotAccessMemory,
  /* aarch64_neon_umaxv */ DoesNotAccessMemory,
  /* aarch64_neon_umin */ DoesNotAccessMemory,
  /* aarch64_neon_uminp */ DoesNotAccessMemory,
  /* aarch64_neon_uminv */ DoesNotAccessMemory,
  /* aarch64_neon_umull */ DoesNotAccessMemory,
  /* aarch64_neon_uqadd */ DoesNotAccessMemory,
  /* aarch64_neon_uqrshl */ DoesNotAccessMemory,
  /* aarch64_neon_uqrshrn */ DoesNotAccessMemory,
  /* aarch64_neon_uqshl */ DoesNotAccessMemory,
  /* aarch64_neon_uqshrn */ DoesNotAccessMemory,
  /* aarch64_neon_uqsub */ DoesNotAccessMemory,
  /* aarch64_neon_uqxtn */ DoesNotAccessMemory,
  /* aarch64_neon_urecpe */ DoesNotAccessMemory,
  /* aarch64_neon_urhadd */ DoesNotAccessMemory,
  /* aarch64_neon_urshl */ DoesNotAccessMemory,
  /* aarch64_neon_ursqrte */ DoesNotAccessMemory,
  /* aarch64_neon_ushl */ DoesNotAccessMemory,
  /* aarch64_neon_ushll */ DoesNotAccessMemory,
  /* aarch64_neon_usqadd */ DoesNotAccessMemory,
  /* aarch64_neon_vcopy_lane */ DoesNotAccessMemory,
  /* aarch64_neon_vcvtfp2fxs */ DoesNotAccessMemory,
  /* aarch64_neon_vcvtfp2fxu */ DoesNotAccessMemory,
  /* aarch64_neon_vcvtfp2hf */ DoesNotAccessMemory,
  /* aarch64_neon_vcvtfxs2fp */ DoesNotAccessMemory,
  /* aarch64_neon_vcvtfxu2fp */ DoesNotAccessMemory,
  /* aarch64_neon_vcvthf2fp */ DoesNotAccessMemory,
  /* aarch64_neon_vsli */ DoesNotAccessMemory,
  /* aarch64_neon_vsri */ DoesNotAccessMemory,
  /* aarch64_rbit */ DoesNotAccessMemory,
  /* aarch64_sdiv */ DoesNotAccessMemory,
  /* aarch64_sisd_fabd */ DoesNotAccessMemory,
  /* aarch64_sisd_fcvtxn */ DoesNotAccessMemory,
  /* aarch64_stlxp */ UnknownModRefBehavior,
  /* aarch64_stlxr */ UnknownModRefBehavior,
  /* aarch64_stxp */ UnknownModRefBehavior,
  /* aarch64_stxr */ UnknownModRefBehavior,
  /* aarch64_udiv */ DoesNotAccessMemory,
  /* adjust_trampoline */ OnlyReadsArgumentPointees,
  /* annotation */ UnknownModRefBehavior,
  /* arm_cdp */ UnknownModRefBehavior,
  /* arm_cdp2 */ UnknownModRefBehavior,
  /* arm_clrex */ UnknownModRefBehavior,
  /* arm_crc32b */ DoesNotAccessMemory,
  /* arm_crc32cb */ DoesNotAccessMemory,
  /* arm_crc32ch */ DoesNotAccessMemory,
  /* arm_crc32cw */ DoesNotAccessMemory,
  /* arm_crc32h */ DoesNotAccessMemory,
  /* arm_crc32w */ DoesNotAccessMemory,
  /* arm_dmb */ UnknownModRefBehavior,
  /* arm_dsb */ UnknownModRefBehavior,
  /* arm_get_fpscr */ DoesNotAccessMemory,
  /* arm_hint */ UnknownModRefBehavior,
  /* arm_isb */ UnknownModRefBehavior,
  /* arm_ldaex */ UnknownModRefBehavior,
  /* arm_ldaexd */ UnknownModRefBehavior,
  /* arm_ldrex */ UnknownModRefBehavior,
  /* arm_ldrexd */ UnknownModRefBehavior,
  /* arm_mcr */ UnknownModRefBehavior,
  /* arm_mcr2 */ UnknownModRefBehavior,
  /* arm_mcrr */ UnknownModRefBehavior,
  /* arm_mcrr2 */ UnknownModRefBehavior,
  /* arm_mrc */ UnknownModRefBehavior,
  /* arm_mrc2 */ UnknownModRefBehavior,
  /* arm_neon_aesd */ DoesNotAccessMemory,
  /* arm_neon_aese */ DoesNotAccessMemory,
  /* arm_neon_aesimc */ DoesNotAccessMemory,
  /* arm_neon_aesmc */ DoesNotAccessMemory,
  /* arm_neon_sha1c */ DoesNotAccessMemory,
  /* arm_neon_sha1h */ DoesNotAccessMemory,
  /* arm_neon_sha1m */ DoesNotAccessMemory,
  /* arm_neon_sha1p */ DoesNotAccessMemory,
  /* arm_neon_sha1su0 */ DoesNotAccessMemory,
  /* arm_neon_sha1su1 */ DoesNotAccessMemory,
  /* arm_neon_sha256h */ DoesNotAccessMemory,
  /* arm_neon_sha256h2 */ DoesNotAccessMemory,
  /* arm_neon_sha256su0 */ DoesNotAccessMemory,
  /* arm_neon_sha256su1 */ DoesNotAccessMemory,
  /* arm_neon_vabds */ DoesNotAccessMemory,
  /* arm_neon_vabdu */ DoesNotAccessMemory,
  /* arm_neon_vabs */ DoesNotAccessMemory,
  /* arm_neon_vacge */ DoesNotAccessMemory,
  /* arm_neon_vacgt */ DoesNotAccessMemory,
  /* arm_neon_vbsl */ DoesNotAccessMemory,
  /* arm_neon_vcls */ DoesNotAccessMemory,
  /* arm_neon_vclz */ DoesNotAccessMemory,
  /* arm_neon_vcnt */ DoesNotAccessMemory,
  /* arm_neon_vcvtas */ DoesNotAccessMemory,
  /* arm_neon_vcvtau */ DoesNotAccessMemory,
  /* arm_neon_vcvtfp2fxs */ DoesNotAccessMemory,
  /* arm_neon_vcvtfp2fxu */ DoesNotAccessMemory,
  /* arm_neon_vcvtfp2hf */ DoesNotAccessMemory,
  /* arm_neon_vcvtfxs2fp */ DoesNotAccessMemory,
  /* arm_neon_vcvtfxu2fp */ DoesNotAccessMemory,
  /* arm_neon_vcvthf2fp */ DoesNotAccessMemory,
  /* arm_neon_vcvtms */ DoesNotAccessMemory,
  /* arm_neon_vcvtmu */ DoesNotAccessMemory,
  /* arm_neon_vcvtns */ DoesNotAccessMemory,
  /* arm_neon_vcvtnu */ DoesNotAccessMemory,
  /* arm_neon_vcvtps */ DoesNotAccessMemory,
  /* arm_neon_vcvtpu */ DoesNotAccessMemory,
  /* arm_neon_vhadds */ DoesNotAccessMemory,
  /* arm_neon_vhaddu */ DoesNotAccessMemory,
  /* arm_neon_vhsubs */ DoesNotAccessMemory,
  /* arm_neon_vhsubu */ DoesNotAccessMemory,
  /* arm_neon_vld1 */ OnlyReadsArgumentPointees,
  /* arm_neon_vld2 */ OnlyReadsArgumentPointees,
  /* arm_neon_vld2lane */ OnlyReadsArgumentPointees,
  /* arm_neon_vld3 */ OnlyReadsArgumentPointees,
  /* arm_neon_vld3lane */ OnlyReadsArgumentPointees,
  /* arm_neon_vld4 */ OnlyReadsArgumentPointees,
  /* arm_neon_vld4lane */ OnlyReadsArgumentPointees,
  /* arm_neon_vmaxnm */ DoesNotAccessMemory,
  /* arm_neon_vmaxs */ DoesNotAccessMemory,
  /* arm_neon_vmaxu */ DoesNotAccessMemory,
  /* arm_neon_vminnm */ DoesNotAccessMemory,
  /* arm_neon_vmins */ DoesNotAccessMemory,
  /* arm_neon_vminu */ DoesNotAccessMemory,
  /* arm_neon_vmullp */ DoesNotAccessMemory,
  /* arm_neon_vmulls */ DoesNotAccessMemory,
  /* arm_neon_vmullu */ DoesNotAccessMemory,
  /* arm_neon_vmulp */ DoesNotAccessMemory,
  /* arm_neon_vpadals */ DoesNotAccessMemory,
  /* arm_neon_vpadalu */ DoesNotAccessMemory,
  /* arm_neon_vpadd */ DoesNotAccessMemory,
  /* arm_neon_vpaddls */ DoesNotAccessMemory,
  /* arm_neon_vpaddlu */ DoesNotAccessMemory,
  /* arm_neon_vpmaxs */ DoesNotAccessMemory,
  /* arm_neon_vpmaxu */ DoesNotAccessMemory,
  /* arm_neon_vpmins */ DoesNotAccessMemory,
  /* arm_neon_vpminu */ DoesNotAccessMemory,
  /* arm_neon_vqabs */ DoesNotAccessMemory,
  /* arm_neon_vqadds */ DoesNotAccessMemory,
  /* arm_neon_vqaddu */ DoesNotAccessMemory,
  /* arm_neon_vqdmulh */ DoesNotAccessMemory,
  /* arm_neon_vqdmull */ DoesNotAccessMemory,
  /* arm_neon_vqmovns */ DoesNotAccessMemory,
  /* arm_neon_vqmovnsu */ DoesNotAccessMemory,
  /* arm_neon_vqmovnu */ DoesNotAccessMemory,
  /* arm_neon_vqneg */ DoesNotAccessMemory,
  /* arm_neon_vqrdmulh */ DoesNotAccessMemory,
  /* arm_neon_vqrshiftns */ DoesNotAccessMemory,
  /* arm_neon_vqrshiftnsu */ DoesNotAccessMemory,
  /* arm_neon_vqrshiftnu */ DoesNotAccessMemory,
  /* arm_neon_vqrshifts */ DoesNotAccessMemory,
  /* arm_neon_vqrshiftu */ DoesNotAccessMemory,
  /* arm_neon_vqshiftns */ DoesNotAccessMemory,
  /* arm_neon_vqshiftnsu */ DoesNotAccessMemory,
  /* arm_neon_vqshiftnu */ DoesNotAccessMemory,
  /* arm_neon_vqshifts */ DoesNotAccessMemory,
  /* arm_neon_vqshiftsu */ DoesNotAccessMemory,
  /* arm_neon_vqshiftu */ DoesNotAccessMemory,
  /* arm_neon_vqsubs */ DoesNotAccessMemory,
  /* arm_neon_vqsubu */ DoesNotAccessMemory,
  /* arm_neon_vraddhn */ DoesNotAccessMemory,
  /* arm_neon_vrecpe */ DoesNotAccessMemory,
  /* arm_neon_vrecps */ DoesNotAccessMemory,
  /* arm_neon_vrhadds */ DoesNotAccessMemory,
  /* arm_neon_vrhaddu */ DoesNotAccessMemory,
  /* arm_neon_vrinta */ DoesNotAccessMemory,
  /* arm_neon_vrintm */ DoesNotAccessMemory,
  /* arm_neon_vrintn */ DoesNotAccessMemory,
  /* arm_neon_vrintp */ DoesNotAccessMemory,
  /* arm_neon_vrintx */ DoesNotAccessMemory,
  /* arm_neon_vrintz */ DoesNotAccessMemory,
  /* arm_neon_vrshiftn */ DoesNotAccessMemory,
  /* arm_neon_vrshifts */ DoesNotAccessMemory,
  /* arm_neon_vrshiftu */ DoesNotAccessMemory,
  /* arm_neon_vrsqrte */ DoesNotAccessMemory,
  /* arm_neon_vrsqrts */ DoesNotAccessMemory,
  /* arm_neon_vrsubhn */ DoesNotAccessMemory,
  /* arm_neon_vshiftins */ DoesNotAccessMemory,
  /* arm_neon_vshifts */ DoesNotAccessMemory,
  /* arm_neon_vshiftu */ DoesNotAccessMemory,
  /* arm_neon_vst1 */ OnlyAccessesArgumentPointees,
  /* arm_neon_vst2 */ OnlyAccessesArgumentPointees,
  /* arm_neon_vst2lane */ OnlyAccessesArgumentPointees,
  /* arm_neon_vst3 */ OnlyAccessesArgumentPointees,
  /* arm_neon_vst3lane */ OnlyAccessesArgumentPointees,
  /* arm_neon_vst4 */ OnlyAccessesArgumentPointees,
  /* arm_neon_vst4lane */ OnlyAccessesArgumentPointees,
  /* arm_neon_vtbl1 */ DoesNotAccessMemory,
  /* arm_neon_vtbl2 */ DoesNotAccessMemory,
  /* arm_neon_vtbl3 */ DoesNotAccessMemory,
  /* arm_neon_vtbl4 */ DoesNotAccessMemory,
  /* arm_neon_vtbx1 */ DoesNotAccessMemory,
  /* arm_neon_vtbx2 */ DoesNotAccessMemory,
  /* arm_neon_vtbx3 */ DoesNotAccessMemory,
  /* arm_neon_vtbx4 */ DoesNotAccessMemory,
  /* arm_qadd */ DoesNotAccessMemory,
  /* arm_qsub */ DoesNotAccessMemory,
  /* arm_rbit */ DoesNotAccessMemory,
  /* arm_set_fpscr */ UnknownModRefBehavior,
  /* arm_ssat */ DoesNotAccessMemory,
  /* arm_stlex */ UnknownModRefBehavior,
  /* arm_stlexd */ UnknownModRefBehavior,
  /* arm_strex */ UnknownModRefBehavior,
  /* arm_strexd */ UnknownModRefBehavior,
  /* arm_thread_pointer */ DoesNotAccessMemory,
  /* arm_undefined */ UnknownModRefBehavior,
  /* arm_usat */ DoesNotAccessMemory,
  /* arm_vcvtr */ DoesNotAccessMemory,
  /* arm_vcvtru */ DoesNotAccessMemory,
  /* bswap */ DoesNotAccessMemory,
  /* ceil */ DoesNotAccessMemory,
  /* clear_cache */ UnknownModRefBehavior,
  /* convert_from_fp16 */ DoesNotAccessMemory,
  /* convert_to_fp16 */ DoesNotAccessMemory,
  /* convertff */ UnknownModRefBehavior,
  /* convertfsi */ UnknownModRefBehavior,
  /* convertfui */ UnknownModRefBehavior,
  /* convertsif */ UnknownModRefBehavior,
  /* convertss */ UnknownModRefBehavior,
  /* convertsu */ UnknownModRefBehavior,
  /* convertuif */ UnknownModRefBehavior,
  /* convertus */ UnknownModRefBehavior,
  /* convertuu */ UnknownModRefBehavior,
  /* copysign */ DoesNotAccessMemory,
  /* cos */ DoesNotAccessMemory,
  /* ctlz */ DoesNotAccessMemory,
  /* ctpop */ DoesNotAccessMemory,
  /* cttz */ DoesNotAccessMemory,
  /* cuda_syncthreads */ UnknownModRefBehavior,
  /* dbg_declare */ DoesNotAccessMemory,
  /* dbg_value */ DoesNotAccessMemory,
  /* debugtrap */ UnknownModRefBehavior,
  /* donothing */ DoesNotAccessMemory,
  /* eh_dwarf_cfa */ UnknownModRefBehavior,
  /* eh_return_i32 */ UnknownModRefBehavior,
  /* eh_return_i64 */ UnknownModRefBehavior,
  /* eh_sjlj_callsite */ DoesNotAccessMemory,
  /* eh_sjlj_functioncontext */ UnknownModRefBehavior,
  /* eh_sjlj_longjmp */ UnknownModRefBehavior,
  /* eh_sjlj_lsda */ DoesNotAccessMemory,
  /* eh_sjlj_setjmp */ UnknownModRefBehavior,
  /* eh_typeid_for */ DoesNotAccessMemory,
  /* eh_unwind_init */ UnknownModRefBehavior,
  /* exp */ DoesNotAccessMemory,
  /* exp2 */ DoesNotAccessMemory,
  /* expect */ DoesNotAccessMemory,
  /* experimental_patchpoint_i64 */ UnknownModRefBehavior,
  /* experimental_patchpoint_void */ UnknownModRefBehavior,
  /* experimental_stackmap */ UnknownModRefBehavior,
  /* fabs */ DoesNotAccessMemory,
  /* floor */ DoesNotAccessMemory,
  /* flt_rounds */ UnknownModRefBehavior,
  /* fma */ DoesNotAccessMemory,
  /* fmuladd */ DoesNotAccessMemory,
  /* frameaddress */ DoesNotAccessMemory,
  /* gcread */ OnlyReadsArgumentPointees,
  /* gcroot */ UnknownModRefBehavior,
  /* gcwrite */ OnlyAccessesArgumentPointees,
  /* hexagon_A2_abs */ DoesNotAccessMemory,
  /* hexagon_A2_absp */ DoesNotAccessMemory,
  /* hexagon_A2_abssat */ DoesNotAccessMemory,
  /* hexagon_A2_add */ DoesNotAccessMemory,
  /* hexagon_A2_addh_h16_hh */ DoesNotAccessMemory,
  /* hexagon_A2_addh_h16_hl */ DoesNotAccessMemory,
  /* hexagon_A2_addh_h16_lh */ DoesNotAccessMemory,
  /* hexagon_A2_addh_h16_ll */ DoesNotAccessMemory,
  /* hexagon_A2_addh_h16_sat_hh */ DoesNotAccessMemory,
  /* hexagon_A2_addh_h16_sat_hl */ DoesNotAccessMemory,
  /* hexagon_A2_addh_h16_sat_lh */ DoesNotAccessMemory,
  /* hexagon_A2_addh_h16_sat_ll */ DoesNotAccessMemory,
  /* hexagon_A2_addh_l16_hl */ DoesNotAccessMemory,
  /* hexagon_A2_addh_l16_ll */ DoesNotAccessMemory,
  /* hexagon_A2_addh_l16_sat_hl */ DoesNotAccessMemory,
  /* hexagon_A2_addh_l16_sat_ll */ DoesNotAccessMemory,
  /* hexagon_A2_addi */ DoesNotAccessMemory,
  /* hexagon_A2_addp */ DoesNotAccessMemory,
  /* hexagon_A2_addpsat */ DoesNotAccessMemory,
  /* hexagon_A2_addsat */ DoesNotAccessMemory,
  /* hexagon_A2_addsp */ DoesNotAccessMemory,
  /* hexagon_A2_and */ DoesNotAccessMemory,
  /* hexagon_A2_andir */ DoesNotAccessMemory,
  /* hexagon_A2_andp */ DoesNotAccessMemory,
  /* hexagon_A2_aslh */ DoesNotAccessMemory,
  /* hexagon_A2_asrh */ DoesNotAccessMemory,
  /* hexagon_A2_combine_hh */ DoesNotAccessMemory,
  /* hexagon_A2_combine_hl */ DoesNotAccessMemory,
  /* hexagon_A2_combine_lh */ DoesNotAccessMemory,
  /* hexagon_A2_combine_ll */ DoesNotAccessMemory,
  /* hexagon_A2_combineii */ DoesNotAccessMemory,
  /* hexagon_A2_combinew */ DoesNotAccessMemory,
  /* hexagon_A2_max */ DoesNotAccessMemory,
  /* hexagon_A2_maxp */ DoesNotAccessMemory,
  /* hexagon_A2_maxu */ DoesNotAccessMemory,
  /* hexagon_A2_maxup */ DoesNotAccessMemory,
  /* hexagon_A2_min */ DoesNotAccessMemory,
  /* hexagon_A2_minp */ DoesNotAccessMemory,
  /* hexagon_A2_minu */ DoesNotAccessMemory,
  /* hexagon_A2_minup */ DoesNotAccessMemory,
  /* hexagon_A2_neg */ DoesNotAccessMemory,
  /* hexagon_A2_negp */ DoesNotAccessMemory,
  /* hexagon_A2_negsat */ DoesNotAccessMemory,
  /* hexagon_A2_not */ DoesNotAccessMemory,
  /* hexagon_A2_notp */ DoesNotAccessMemory,
  /* hexagon_A2_or */ DoesNotAccessMemory,
  /* hexagon_A2_orir */ DoesNotAccessMemory,
  /* hexagon_A2_orp */ DoesNotAccessMemory,
  /* hexagon_A2_roundsat */ DoesNotAccessMemory,
  /* hexagon_A2_sat */ DoesNotAccessMemory,
  /* hexagon_A2_satb */ DoesNotAccessMemory,
  /* hexagon_A2_sath */ DoesNotAccessMemory,
  /* hexagon_A2_satub */ DoesNotAccessMemory,
  /* hexagon_A2_satuh */ DoesNotAccessMemory,
  /* hexagon_A2_sub */ DoesNotAccessMemory,
  /* hexagon_A2_subh_h16_hh */ DoesNotAccessMemory,
  /* hexagon_A2_subh_h16_hl */ DoesNotAccessMemory,
  /* hexagon_A2_subh_h16_lh */ DoesNotAccessMemory,
  /* hexagon_A2_subh_h16_ll */ DoesNotAccessMemory,
  /* hexagon_A2_subh_h16_sat_hh */ DoesNotAccessMemory,
  /* hexagon_A2_subh_h16_sat_hl */ DoesNotAccessMemory,
  /* hexagon_A2_subh_h16_sat_lh */ DoesNotAccessMemory,
  /* hexagon_A2_subh_h16_sat_ll */ DoesNotAccessMemory,
  /* hexagon_A2_subh_l16_hl */ DoesNotAccessMemory,
  /* hexagon_A2_subh_l16_ll */ DoesNotAccessMemory,
  /* hexagon_A2_subh_l16_sat_hl */ DoesNotAccessMemory,
  /* hexagon_A2_subh_l16_sat_ll */ DoesNotAccessMemory,
  /* hexagon_A2_subp */ DoesNotAccessMemory,
  /* hexagon_A2_subri */ DoesNotAccessMemory,
  /* hexagon_A2_subsat */ DoesNotAccessMemory,
  /* hexagon_A2_svaddh */ DoesNotAccessMemory,
  /* hexagon_A2_svaddhs */ DoesNotAccessMemory,
  /* hexagon_A2_svadduhs */ DoesNotAccessMemory,
  /* hexagon_A2_svavgh */ DoesNotAccessMemory,
  /* hexagon_A2_svavghs */ DoesNotAccessMemory,
  /* hexagon_A2_svnavgh */ DoesNotAccessMemory,
  /* hexagon_A2_svsubh */ DoesNotAccessMemory,
  /* hexagon_A2_svsubhs */ DoesNotAccessMemory,
  /* hexagon_A2_svsubuhs */ DoesNotAccessMemory,
  /* hexagon_A2_swiz */ DoesNotAccessMemory,
  /* hexagon_A2_sxtb */ DoesNotAccessMemory,
  /* hexagon_A2_sxth */ DoesNotAccessMemory,
  /* hexagon_A2_sxtw */ DoesNotAccessMemory,
  /* hexagon_A2_tfr */ DoesNotAccessMemory,
  /* hexagon_A2_tfrih */ DoesNotAccessMemory,
  /* hexagon_A2_tfril */ DoesNotAccessMemory,
  /* hexagon_A2_tfrp */ DoesNotAccessMemory,
  /* hexagon_A2_tfrpi */ DoesNotAccessMemory,
  /* hexagon_A2_tfrsi */ DoesNotAccessMemory,
  /* hexagon_A2_vabsh */ DoesNotAccessMemory,
  /* hexagon_A2_vabshsat */ DoesNotAccessMemory,
  /* hexagon_A2_vabsw */ DoesNotAccessMemory,
  /* hexagon_A2_vabswsat */ DoesNotAccessMemory,
  /* hexagon_A2_vaddb_map */ DoesNotAccessMemory,
  /* hexagon_A2_vaddh */ DoesNotAccessMemory,
  /* hexagon_A2_vaddhs */ DoesNotAccessMemory,
  /* hexagon_A2_vaddub */ DoesNotAccessMemory,
  /* hexagon_A2_vaddubs */ DoesNotAccessMemory,
  /* hexagon_A2_vadduhs */ DoesNotAccessMemory,
  /* hexagon_A2_vaddw */ DoesNotAccessMemory,
  /* hexagon_A2_vaddws */ DoesNotAccessMemory,
  /* hexagon_A2_vavgh */ DoesNotAccessMemory,
  /* hexagon_A2_vavghcr */ DoesNotAccessMemory,
  /* hexagon_A2_vavghr */ DoesNotAccessMemory,
  /* hexagon_A2_vavgub */ DoesNotAccessMemory,
  /* hexagon_A2_vavgubr */ DoesNotAccessMemory,
  /* hexagon_A2_vavguh */ DoesNotAccessMemory,
  /* hexagon_A2_vavguhr */ DoesNotAccessMemory,
  /* hexagon_A2_vavguw */ DoesNotAccessMemory,
  /* hexagon_A2_vavguwr */ DoesNotAccessMemory,
  /* hexagon_A2_vavgw */ DoesNotAccessMemory,
  /* hexagon_A2_vavgwcr */ DoesNotAccessMemory,
  /* hexagon_A2_vavgwr */ DoesNotAccessMemory,
  /* hexagon_A2_vcmpbeq */ DoesNotAccessMemory,
  /* hexagon_A2_vcmpbgtu */ DoesNotAccessMemory,
  /* hexagon_A2_vcmpheq */ DoesNotAccessMemory,
  /* hexagon_A2_vcmphgt */ DoesNotAccessMemory,
  /* hexagon_A2_vcmphgtu */ DoesNotAccessMemory,
  /* hexagon_A2_vcmpweq */ DoesNotAccessMemory,
  /* hexagon_A2_vcmpwgt */ DoesNotAccessMemory,
  /* hexagon_A2_vcmpwgtu */ DoesNotAccessMemory,
  /* hexagon_A2_vconj */ DoesNotAccessMemory,
  /* hexagon_A2_vmaxb */ DoesNotAccessMemory,
  /* hexagon_A2_vmaxh */ DoesNotAccessMemory,
  /* hexagon_A2_vmaxub */ DoesNotAccessMemory,
  /* hexagon_A2_vmaxuh */ DoesNotAccessMemory,
  /* hexagon_A2_vmaxuw */ DoesNotAccessMemory,
  /* hexagon_A2_vmaxw */ DoesNotAccessMemory,
  /* hexagon_A2_vminb */ DoesNotAccessMemory,
  /* hexagon_A2_vminh */ DoesNotAccessMemory,
  /* hexagon_A2_vminub */ DoesNotAccessMemory,
  /* hexagon_A2_vminuh */ DoesNotAccessMemory,
  /* hexagon_A2_vminuw */ DoesNotAccessMemory,
  /* hexagon_A2_vminw */ DoesNotAccessMemory,
  /* hexagon_A2_vnavgh */ DoesNotAccessMemory,
  /* hexagon_A2_vnavghcr */ DoesNotAccessMemory,
  /* hexagon_A2_vnavghr */ DoesNotAccessMemory,
  /* hexagon_A2_vnavgw */ DoesNotAccessMemory,
  /* hexagon_A2_vnavgwcr */ DoesNotAccessMemory,
  /* hexagon_A2_vnavgwr */ DoesNotAccessMemory,
  /* hexagon_A2_vraddub */ DoesNotAccessMemory,
  /* hexagon_A2_vraddub_acc */ DoesNotAccessMemory,
  /* hexagon_A2_vrsadub */ DoesNotAccessMemory,
  /* hexagon_A2_vrsadub_acc */ DoesNotAccessMemory,
  /* hexagon_A2_vsubb_map */ DoesNotAccessMemory,
  /* hexagon_A2_vsubh */ DoesNotAccessMemory,
  /* hexagon_A2_vsubhs */ DoesNotAccessMemory,
  /* hexagon_A2_vsubub */ DoesNotAccessMemory,
  /* hexagon_A2_vsububs */ DoesNotAccessMemory,
  /* hexagon_A2_vsubuhs */ DoesNotAccessMemory,
  /* hexagon_A2_vsubw */ DoesNotAccessMemory,
  /* hexagon_A2_vsubws */ DoesNotAccessMemory,
  /* hexagon_A2_xor */ DoesNotAccessMemory,
  /* hexagon_A2_xorp */ DoesNotAccessMemory,
  /* hexagon_A2_zxtb */ DoesNotAccessMemory,
  /* hexagon_A2_zxth */ DoesNotAccessMemory,
  /* hexagon_A4_andn */ DoesNotAccessMemory,
  /* hexagon_A4_andnp */ DoesNotAccessMemory,
  /* hexagon_A4_bitsplit */ DoesNotAccessMemory,
  /* hexagon_A4_bitspliti */ DoesNotAccessMemory,
  /* hexagon_A4_boundscheck */ DoesNotAccessMemory,
  /* hexagon_A4_cmpbeq */ DoesNotAccessMemory,
  /* hexagon_A4_cmpbeqi */ DoesNotAccessMemory,
  /* hexagon_A4_cmpbgt */ DoesNotAccessMemory,
  /* hexagon_A4_cmpbgti */ DoesNotAccessMemory,
  /* hexagon_A4_cmpbgtu */ DoesNotAccessMemory,
  /* hexagon_A4_cmpbgtui */ DoesNotAccessMemory,
  /* hexagon_A4_cmpheq */ DoesNotAccessMemory,
  /* hexagon_A4_cmpheqi */ DoesNotAccessMemory,
  /* hexagon_A4_cmphgt */ DoesNotAccessMemory,
  /* hexagon_A4_cmphgti */ DoesNotAccessMemory,
  /* hexagon_A4_cmphgtu */ DoesNotAccessMemory,
  /* hexagon_A4_cmphgtui */ DoesNotAccessMemory,
  /* hexagon_A4_combineir */ DoesNotAccessMemory,
  /* hexagon_A4_combineri */ DoesNotAccessMemory,
  /* hexagon_A4_cround_ri */ DoesNotAccessMemory,
  /* hexagon_A4_cround_rr */ DoesNotAccessMemory,
  /* hexagon_A4_modwrapu */ DoesNotAccessMemory,
  /* hexagon_A4_orn */ DoesNotAccessMemory,
  /* hexagon_A4_ornp */ DoesNotAccessMemory,
  /* hexagon_A4_rcmpeq */ DoesNotAccessMemory,
  /* hexagon_A4_rcmpeqi */ DoesNotAccessMemory,
  /* hexagon_A4_rcmpneq */ DoesNotAccessMemory,
  /* hexagon_A4_rcmpneqi */ DoesNotAccessMemory,
  /* hexagon_A4_round_ri */ DoesNotAccessMemory,
  /* hexagon_A4_round_ri_sat */ DoesNotAccessMemory,
  /* hexagon_A4_round_rr */ DoesNotAccessMemory,
  /* hexagon_A4_round_rr_sat */ DoesNotAccessMemory,
  /* hexagon_A4_tlbmatch */ DoesNotAccessMemory,
  /* hexagon_A4_vcmpbeq_any */ DoesNotAccessMemory,
  /* hexagon_A4_vcmpbeqi */ DoesNotAccessMemory,
  /* hexagon_A4_vcmpbgt */ DoesNotAccessMemory,
  /* hexagon_A4_vcmpbgti */ DoesNotAccessMemory,
  /* hexagon_A4_vcmpbgtui */ DoesNotAccessMemory,
  /* hexagon_A4_vcmpheqi */ DoesNotAccessMemory,
  /* hexagon_A4_vcmphgti */ DoesNotAccessMemory,
  /* hexagon_A4_vcmphgtui */ DoesNotAccessMemory,
  /* hexagon_A4_vcmpweqi */ DoesNotAccessMemory,
  /* hexagon_A4_vcmpwgti */ DoesNotAccessMemory,
  /* hexagon_A4_vcmpwgtui */ DoesNotAccessMemory,
  /* hexagon_A4_vrmaxh */ DoesNotAccessMemory,
  /* hexagon_A4_vrmaxuh */ DoesNotAccessMemory,
  /* hexagon_A4_vrmaxuw */ DoesNotAccessMemory,
  /* hexagon_A4_vrmaxw */ DoesNotAccessMemory,
  /* hexagon_A4_vrminh */ DoesNotAccessMemory,
  /* hexagon_A4_vrminuh */ DoesNotAccessMemory,
  /* hexagon_A4_vrminuw */ DoesNotAccessMemory,
  /* hexagon_A4_vrminw */ DoesNotAccessMemory,
  /* hexagon_A5_vaddhubs */ DoesNotAccessMemory,
  /* hexagon_C2_all8 */ DoesNotAccessMemory,
  /* hexagon_C2_and */ DoesNotAccessMemory,
  /* hexagon_C2_andn */ DoesNotAccessMemory,
  /* hexagon_C2_any8 */ DoesNotAccessMemory,
  /* hexagon_C2_bitsclr */ DoesNotAccessMemory,
  /* hexagon_C2_bitsclri */ DoesNotAccessMemory,
  /* hexagon_C2_bitsset */ DoesNotAccessMemory,
  /* hexagon_C2_cmpeq */ DoesNotAccessMemory,
  /* hexagon_C2_cmpeqi */ DoesNotAccessMemory,
  /* hexagon_C2_cmpeqp */ DoesNotAccessMemory,
  /* hexagon_C2_cmpgei */ DoesNotAccessMemory,
  /* hexagon_C2_cmpgeui */ DoesNotAccessMemory,
  /* hexagon_C2_cmpgt */ DoesNotAccessMemory,
  /* hexagon_C2_cmpgti */ DoesNotAccessMemory,
  /* hexagon_C2_cmpgtp */ DoesNotAccessMemory,
  /* hexagon_C2_cmpgtu */ DoesNotAccessMemory,
  /* hexagon_C2_cmpgtui */ DoesNotAccessMemory,
  /* hexagon_C2_cmpgtup */ DoesNotAccessMemory,
  /* hexagon_C2_cmplt */ DoesNotAccessMemory,
  /* hexagon_C2_cmpltu */ DoesNotAccessMemory,
  /* hexagon_C2_mask */ DoesNotAccessMemory,
  /* hexagon_C2_mux */ DoesNotAccessMemory,
  /* hexagon_C2_muxii */ DoesNotAccessMemory,
  /* hexagon_C2_muxir */ DoesNotAccessMemory,
  /* hexagon_C2_muxri */ DoesNotAccessMemory,
  /* hexagon_C2_not */ DoesNotAccessMemory,
  /* hexagon_C2_or */ DoesNotAccessMemory,
  /* hexagon_C2_orn */ DoesNotAccessMemory,
  /* hexagon_C2_pxfer_map */ DoesNotAccessMemory,
  /* hexagon_C2_tfrpr */ DoesNotAccessMemory,
  /* hexagon_C2_tfrrp */ DoesNotAccessMemory,
  /* hexagon_C2_vitpack */ DoesNotAccessMemory,
  /* hexagon_C2_vmux */ DoesNotAccessMemory,
  /* hexagon_C2_xor */ DoesNotAccessMemory,
  /* hexagon_C4_and_and */ DoesNotAccessMemory,
  /* hexagon_C4_and_andn */ DoesNotAccessMemory,
  /* hexagon_C4_and_or */ DoesNotAccessMemory,
  /* hexagon_C4_and_orn */ DoesNotAccessMemory,
  /* hexagon_C4_cmplte */ DoesNotAccessMemory,
  /* hexagon_C4_cmpltei */ DoesNotAccessMemory,
  /* hexagon_C4_cmplteu */ DoesNotAccessMemory,
  /* hexagon_C4_cmplteui */ DoesNotAccessMemory,
  /* hexagon_C4_cmpneq */ DoesNotAccessMemory,
  /* hexagon_C4_cmpneqi */ DoesNotAccessMemory,
  /* hexagon_C4_fastcorner9 */ DoesNotAccessMemory,
  /* hexagon_C4_fastcorner9_not */ DoesNotAccessMemory,
  /* hexagon_C4_nbitsclr */ DoesNotAccessMemory,
  /* hexagon_C4_nbitsclri */ DoesNotAccessMemory,
  /* hexagon_C4_nbitsset */ DoesNotAccessMemory,
  /* hexagon_C4_or_and */ DoesNotAccessMemory,
  /* hexagon_C4_or_andn */ DoesNotAccessMemory,
  /* hexagon_C4_or_or */ DoesNotAccessMemory,
  /* hexagon_C4_or_orn */ DoesNotAccessMemory,
  /* hexagon_F2_conv_d2df */ DoesNotAccessMemory,
  /* hexagon_F2_conv_d2sf */ DoesNotAccessMemory,
  /* hexagon_F2_conv_df2d */ DoesNotAccessMemory,
  /* hexagon_F2_conv_df2d_chop */ DoesNotAccessMemory,
  /* hexagon_F2_conv_df2sf */ DoesNotAccessMemory,
  /* hexagon_F2_conv_df2ud */ DoesNotAccessMemory,
  /* hexagon_F2_conv_df2ud_chop */ DoesNotAccessMemory,
  /* hexagon_F2_conv_df2uw */ DoesNotAccessMemory,
  /* hexagon_F2_conv_df2uw_chop */ DoesNotAccessMemory,
  /* hexagon_F2_conv_df2w */ DoesNotAccessMemory,
  /* hexagon_F2_conv_df2w_chop */ DoesNotAccessMemory,
  /* hexagon_F2_conv_sf2d */ DoesNotAccessMemory,
  /* hexagon_F2_conv_sf2d_chop */ DoesNotAccessMemory,
  /* hexagon_F2_conv_sf2df */ DoesNotAccessMemory,
  /* hexagon_F2_conv_sf2ud */ DoesNotAccessMemory,
  /* hexagon_F2_conv_sf2ud_chop */ DoesNotAccessMemory,
  /* hexagon_F2_conv_sf2uw */ DoesNotAccessMemory,
  /* hexagon_F2_conv_sf2uw_chop */ DoesNotAccessMemory,
  /* hexagon_F2_conv_sf2w */ DoesNotAccessMemory,
  /* hexagon_F2_conv_sf2w_chop */ DoesNotAccessMemory,
  /* hexagon_F2_conv_ud2df */ DoesNotAccessMemory,
  /* hexagon_F2_conv_ud2sf */ DoesNotAccessMemory,
  /* hexagon_F2_conv_uw2df */ DoesNotAccessMemory,
  /* hexagon_F2_conv_uw2sf */ DoesNotAccessMemory,
  /* hexagon_F2_conv_w2df */ DoesNotAccessMemory,
  /* hexagon_F2_conv_w2sf */ DoesNotAccessMemory,
  /* hexagon_F2_dfadd */ DoesNotAccessMemory,
  /* hexagon_F2_dfclass */ DoesNotAccessMemory,
  /* hexagon_F2_dfcmpeq */ DoesNotAccessMemory,
  /* hexagon_F2_dfcmpge */ DoesNotAccessMemory,
  /* hexagon_F2_dfcmpgt */ DoesNotAccessMemory,
  /* hexagon_F2_dfcmpuo */ DoesNotAccessMemory,
  /* hexagon_F2_dffixupd */ DoesNotAccessMemory,
  /* hexagon_F2_dffixupn */ DoesNotAccessMemory,
  /* hexagon_F2_dffixupr */ DoesNotAccessMemory,
  /* hexagon_F2_dffma */ DoesNotAccessMemory,
  /* hexagon_F2_dffma_lib */ DoesNotAccessMemory,
  /* hexagon_F2_dffma_sc */ DoesNotAccessMemory,
  /* hexagon_F2_dffms */ DoesNotAccessMemory,
  /* hexagon_F2_dffms_lib */ DoesNotAccessMemory,
  /* hexagon_F2_dfimm_n */ DoesNotAccessMemory,
  /* hexagon_F2_dfimm_p */ DoesNotAccessMemory,
  /* hexagon_F2_dfmax */ DoesNotAccessMemory,
  /* hexagon_F2_dfmin */ DoesNotAccessMemory,
  /* hexagon_F2_dfmpy */ DoesNotAccessMemory,
  /* hexagon_F2_dfsub */ DoesNotAccessMemory,
  /* hexagon_F2_sfadd */ DoesNotAccessMemory,
  /* hexagon_F2_sfclass */ DoesNotAccessMemory,
  /* hexagon_F2_sfcmpeq */ DoesNotAccessMemory,
  /* hexagon_F2_sfcmpge */ DoesNotAccessMemory,
  /* hexagon_F2_sfcmpgt */ DoesNotAccessMemory,
  /* hexagon_F2_sfcmpuo */ DoesNotAccessMemory,
  /* hexagon_F2_sffixupd */ DoesNotAccessMemory,
  /* hexagon_F2_sffixupn */ DoesNotAccessMemory,
  /* hexagon_F2_sffixupr */ DoesNotAccessMemory,
  /* hexagon_F2_sffma */ DoesNotAccessMemory,
  /* hexagon_F2_sffma_lib */ DoesNotAccessMemory,
  /* hexagon_F2_sffma_sc */ DoesNotAccessMemory,
  /* hexagon_F2_sffms */ DoesNotAccessMemory,
  /* hexagon_F2_sffms_lib */ DoesNotAccessMemory,
  /* hexagon_F2_sfimm_n */ DoesNotAccessMemory,
  /* hexagon_F2_sfimm_p */ DoesNotAccessMemory,
  /* hexagon_F2_sfmax */ DoesNotAccessMemory,
  /* hexagon_F2_sfmin */ DoesNotAccessMemory,
  /* hexagon_F2_sfmpy */ DoesNotAccessMemory,
  /* hexagon_F2_sfsub */ DoesNotAccessMemory,
  /* hexagon_M2_acci */ DoesNotAccessMemory,
  /* hexagon_M2_accii */ DoesNotAccessMemory,
  /* hexagon_M2_cmaci_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_cmacr_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_cmacs_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_cmacs_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_cmacsc_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_cmacsc_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_cmpyi_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_cmpyr_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_cmpyrs_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_cmpyrs_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_cmpyrsc_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_cmpyrsc_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_cmpys_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_cmpys_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_cmpysc_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_cmpysc_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_cnacs_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_cnacs_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_cnacsc_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_cnacsc_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_dpmpyss_acc_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_dpmpyss_nac_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_dpmpyss_rnd_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_dpmpyss_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_dpmpyuu_acc_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_dpmpyuu_nac_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_dpmpyuu_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_hmmpyh_rs1 */ DoesNotAccessMemory,
  /* hexagon_M2_hmmpyh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_hmmpyl_rs1 */ DoesNotAccessMemory,
  /* hexagon_M2_hmmpyl_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_maci */ DoesNotAccessMemory,
  /* hexagon_M2_macsin */ DoesNotAccessMemory,
  /* hexagon_M2_macsip */ DoesNotAccessMemory,
  /* hexagon_M2_mmachs_rs0 */ DoesNotAccessMemory,
  /* hexagon_M2_mmachs_rs1 */ DoesNotAccessMemory,
  /* hexagon_M2_mmachs_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mmachs_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mmacls_rs0 */ DoesNotAccessMemory,
  /* hexagon_M2_mmacls_rs1 */ DoesNotAccessMemory,
  /* hexagon_M2_mmacls_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mmacls_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mmacuhs_rs0 */ DoesNotAccessMemory,
  /* hexagon_M2_mmacuhs_rs1 */ DoesNotAccessMemory,
  /* hexagon_M2_mmacuhs_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mmacuhs_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mmaculs_rs0 */ DoesNotAccessMemory,
  /* hexagon_M2_mmaculs_rs1 */ DoesNotAccessMemory,
  /* hexagon_M2_mmaculs_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mmaculs_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mmpyh_rs0 */ DoesNotAccessMemory,
  /* hexagon_M2_mmpyh_rs1 */ DoesNotAccessMemory,
  /* hexagon_M2_mmpyh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mmpyh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mmpyl_rs0 */ DoesNotAccessMemory,
  /* hexagon_M2_mmpyl_rs1 */ DoesNotAccessMemory,
  /* hexagon_M2_mmpyl_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mmpyl_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mmpyuh_rs0 */ DoesNotAccessMemory,
  /* hexagon_M2_mmpyuh_rs1 */ DoesNotAccessMemory,
  /* hexagon_M2_mmpyuh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mmpyuh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mmpyul_rs0 */ DoesNotAccessMemory,
  /* hexagon_M2_mmpyul_rs1 */ DoesNotAccessMemory,
  /* hexagon_M2_mmpyul_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mmpyul_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_acc_hh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_acc_hh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_acc_hl_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_acc_hl_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_acc_lh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_acc_lh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_acc_ll_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_acc_ll_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_acc_sat_hh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_acc_sat_hh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_acc_sat_hl_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_acc_sat_hl_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_acc_sat_lh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_acc_sat_lh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_acc_sat_ll_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_acc_sat_ll_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_hh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_hh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_hl_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_hl_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_lh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_lh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_ll_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_ll_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_nac_hh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_nac_hh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_nac_hl_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_nac_hl_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_nac_lh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_nac_lh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_nac_ll_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_nac_ll_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_nac_sat_hh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_nac_sat_hh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_nac_sat_hl_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_nac_sat_hl_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_nac_sat_lh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_nac_sat_lh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_nac_sat_ll_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_nac_sat_ll_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_rnd_hh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_rnd_hh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_rnd_hl_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_rnd_hl_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_rnd_lh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_rnd_lh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_rnd_ll_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_rnd_ll_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_sat_hh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_sat_hh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_sat_hl_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_sat_hl_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_sat_lh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_sat_lh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_sat_ll_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_sat_ll_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_sat_rnd_hh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_sat_rnd_hh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_sat_rnd_hl_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_sat_rnd_hl_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_sat_rnd_lh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_sat_rnd_lh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_sat_rnd_ll_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_sat_rnd_ll_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_up */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_up_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpy_up_s1_sat */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_acc_hh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_acc_hh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_acc_hl_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_acc_hl_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_acc_lh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_acc_lh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_acc_ll_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_acc_ll_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_hh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_hh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_hl_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_hl_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_lh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_lh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_ll_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_ll_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_nac_hh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_nac_hh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_nac_hl_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_nac_hl_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_nac_lh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_nac_lh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_nac_ll_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_nac_ll_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_rnd_hh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_rnd_hh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_rnd_hl_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_rnd_hl_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_rnd_lh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_rnd_lh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_rnd_ll_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyd_rnd_ll_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyi */ DoesNotAccessMemory,
  /* hexagon_M2_mpysmi */ DoesNotAccessMemory,
  /* hexagon_M2_mpysu_up */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_acc_hh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_acc_hh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_acc_hl_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_acc_hl_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_acc_lh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_acc_lh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_acc_ll_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_acc_ll_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_hh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_hh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_hl_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_hl_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_lh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_lh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_ll_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_ll_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_nac_hh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_nac_hh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_nac_hl_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_nac_hl_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_nac_lh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_nac_lh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_nac_ll_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_nac_ll_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyu_up */ DoesNotAccessMemory,
  /* hexagon_M2_mpyud_acc_hh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyud_acc_hh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyud_acc_hl_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyud_acc_hl_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyud_acc_lh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyud_acc_lh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyud_acc_ll_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyud_acc_ll_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyud_hh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyud_hh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyud_hl_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyud_hl_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyud_lh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyud_lh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyud_ll_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyud_ll_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyud_nac_hh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyud_nac_hh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyud_nac_hl_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyud_nac_hl_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyud_nac_lh_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyud_nac_lh_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyud_nac_ll_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyud_nac_ll_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_mpyui */ DoesNotAccessMemory,
  /* hexagon_M2_nacci */ DoesNotAccessMemory,
  /* hexagon_M2_naccii */ DoesNotAccessMemory,
  /* hexagon_M2_subacc */ DoesNotAccessMemory,
  /* hexagon_M2_vabsdiffh */ DoesNotAccessMemory,
  /* hexagon_M2_vabsdiffw */ DoesNotAccessMemory,
  /* hexagon_M2_vcmac_s0_sat_i */ DoesNotAccessMemory,
  /* hexagon_M2_vcmac_s0_sat_r */ DoesNotAccessMemory,
  /* hexagon_M2_vcmpy_s0_sat_i */ DoesNotAccessMemory,
  /* hexagon_M2_vcmpy_s0_sat_r */ DoesNotAccessMemory,
  /* hexagon_M2_vcmpy_s1_sat_i */ DoesNotAccessMemory,
  /* hexagon_M2_vcmpy_s1_sat_r */ DoesNotAccessMemory,
  /* hexagon_M2_vdmacs_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_vdmacs_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_vdmpyrs_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_vdmpyrs_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_vdmpys_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_vdmpys_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_vmac2 */ DoesNotAccessMemory,
  /* hexagon_M2_vmac2es */ DoesNotAccessMemory,
  /* hexagon_M2_vmac2es_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_vmac2es_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_vmac2s_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_vmac2s_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_vmac2su_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_vmac2su_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_vmpy2es_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_vmpy2es_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_vmpy2s_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_vmpy2s_s0pack */ DoesNotAccessMemory,
  /* hexagon_M2_vmpy2s_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_vmpy2s_s1pack */ DoesNotAccessMemory,
  /* hexagon_M2_vmpy2su_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_vmpy2su_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_vraddh */ DoesNotAccessMemory,
  /* hexagon_M2_vradduh */ DoesNotAccessMemory,
  /* hexagon_M2_vrcmaci_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_vrcmaci_s0c */ DoesNotAccessMemory,
  /* hexagon_M2_vrcmacr_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_vrcmacr_s0c */ DoesNotAccessMemory,
  /* hexagon_M2_vrcmpyi_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_vrcmpyi_s0c */ DoesNotAccessMemory,
  /* hexagon_M2_vrcmpyr_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_vrcmpyr_s0c */ DoesNotAccessMemory,
  /* hexagon_M2_vrcmpys_acc_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_vrcmpys_s1 */ DoesNotAccessMemory,
  /* hexagon_M2_vrcmpys_s1rp */ DoesNotAccessMemory,
  /* hexagon_M2_vrmac_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_vrmpy_s0 */ DoesNotAccessMemory,
  /* hexagon_M2_xor_xacc */ DoesNotAccessMemory,
  /* hexagon_M4_and_and */ DoesNotAccessMemory,
  /* hexagon_M4_and_andn */ DoesNotAccessMemory,
  /* hexagon_M4_and_or */ DoesNotAccessMemory,
  /* hexagon_M4_and_xor */ DoesNotAccessMemory,
  /* hexagon_M4_cmpyi_wh */ DoesNotAccessMemory,
  /* hexagon_M4_cmpyi_whc */ DoesNotAccessMemory,
  /* hexagon_M4_cmpyr_wh */ DoesNotAccessMemory,
  /* hexagon_M4_cmpyr_whc */ DoesNotAccessMemory,
  /* hexagon_M4_mac_up_s1_sat */ DoesNotAccessMemory,
  /* hexagon_M4_mpyri_addi */ DoesNotAccessMemory,
  /* hexagon_M4_mpyri_addr */ DoesNotAccessMemory,
  /* hexagon_M4_mpyri_addr_u2 */ DoesNotAccessMemory,
  /* hexagon_M4_mpyrr_addi */ DoesNotAccessMemory,
  /* hexagon_M4_mpyrr_addr */ DoesNotAccessMemory,
  /* hexagon_M4_nac_up_s1_sat */ DoesNotAccessMemory,
  /* hexagon_M4_or_and */ DoesNotAccessMemory,
  /* hexagon_M4_or_andn */ DoesNotAccessMemory,
  /* hexagon_M4_or_or */ DoesNotAccessMemory,
  /* hexagon_M4_or_xor */ DoesNotAccessMemory,
  /* hexagon_M4_pmpyw */ DoesNotAccessMemory,
  /* hexagon_M4_pmpyw_acc */ DoesNotAccessMemory,
  /* hexagon_M4_vpmpyh */ DoesNotAccessMemory,
  /* hexagon_M4_vpmpyh_acc */ DoesNotAccessMemory,
  /* hexagon_M4_vrmpyeh_acc_s0 */ DoesNotAccessMemory,
  /* hexagon_M4_vrmpyeh_acc_s1 */ DoesNotAccessMemory,
  /* hexagon_M4_vrmpyeh_s0 */ DoesNotAccessMemory,
  /* hexagon_M4_vrmpyeh_s1 */ DoesNotAccessMemory,
  /* hexagon_M4_vrmpyoh_acc_s0 */ DoesNotAccessMemory,
  /* hexagon_M4_vrmpyoh_acc_s1 */ DoesNotAccessMemory,
  /* hexagon_M4_vrmpyoh_s0 */ DoesNotAccessMemory,
  /* hexagon_M4_vrmpyoh_s1 */ DoesNotAccessMemory,
  /* hexagon_M4_xor_and */ DoesNotAccessMemory,
  /* hexagon_M4_xor_andn */ DoesNotAccessMemory,
  /* hexagon_M4_xor_or */ DoesNotAccessMemory,
  /* hexagon_M4_xor_xacc */ DoesNotAccessMemory,
  /* hexagon_M5_vdmacbsu */ DoesNotAccessMemory,
  /* hexagon_M5_vdmpybsu */ DoesNotAccessMemory,
  /* hexagon_M5_vmacbsu */ DoesNotAccessMemory,
  /* hexagon_M5_vmacbuu */ DoesNotAccessMemory,
  /* hexagon_M5_vmpybsu */ DoesNotAccessMemory,
  /* hexagon_M5_vmpybuu */ DoesNotAccessMemory,
  /* hexagon_M5_vrmacbsu */ DoesNotAccessMemory,
  /* hexagon_M5_vrmacbuu */ DoesNotAccessMemory,
  /* hexagon_M5_vrmpybsu */ DoesNotAccessMemory,
  /* hexagon_M5_vrmpybuu */ DoesNotAccessMemory,
  /* hexagon_S2_addasl_rrri */ DoesNotAccessMemory,
  /* hexagon_S2_asl_i_p */ DoesNotAccessMemory,
  /* hexagon_S2_asl_i_p_acc */ DoesNotAccessMemory,
  /* hexagon_S2_asl_i_p_and */ DoesNotAccessMemory,
  /* hexagon_S2_asl_i_p_nac */ DoesNotAccessMemory,
  /* hexagon_S2_asl_i_p_or */ DoesNotAccessMemory,
  /* hexagon_S2_asl_i_p_xacc */ DoesNotAccessMemory,
  /* hexagon_S2_asl_i_r */ DoesNotAccessMemory,
  /* hexagon_S2_asl_i_r_acc */ DoesNotAccessMemory,
  /* hexagon_S2_asl_i_r_and */ DoesNotAccessMemory,
  /* hexagon_S2_asl_i_r_nac */ DoesNotAccessMemory,
  /* hexagon_S2_asl_i_r_or */ DoesNotAccessMemory,
  /* hexagon_S2_asl_i_r_sat */ DoesNotAccessMemory,
  /* hexagon_S2_asl_i_r_xacc */ DoesNotAccessMemory,
  /* hexagon_S2_asl_i_vh */ DoesNotAccessMemory,
  /* hexagon_S2_asl_i_vw */ DoesNotAccessMemory,
  /* hexagon_S2_asl_r_p */ DoesNotAccessMemory,
  /* hexagon_S2_asl_r_p_acc */ DoesNotAccessMemory,
  /* hexagon_S2_asl_r_p_and */ DoesNotAccessMemory,
  /* hexagon_S2_asl_r_p_nac */ DoesNotAccessMemory,
  /* hexagon_S2_asl_r_p_or */ DoesNotAccessMemory,
  /* hexagon_S2_asl_r_p_xor */ DoesNotAccessMemory,
  /* hexagon_S2_asl_r_r */ DoesNotAccessMemory,
  /* hexagon_S2_asl_r_r_acc */ DoesNotAccessMemory,
  /* hexagon_S2_asl_r_r_and */ DoesNotAccessMemory,
  /* hexagon_S2_asl_r_r_nac */ DoesNotAccessMemory,
  /* hexagon_S2_asl_r_r_or */ DoesNotAccessMemory,
  /* hexagon_S2_asl_r_r_sat */ DoesNotAccessMemory,
  /* hexagon_S2_asl_r_vh */ DoesNotAccessMemory,
  /* hexagon_S2_asl_r_vw */ DoesNotAccessMemory,
  /* hexagon_S2_asr_i_p */ DoesNotAccessMemory,
  /* hexagon_S2_asr_i_p_acc */ DoesNotAccessMemory,
  /* hexagon_S2_asr_i_p_and */ DoesNotAccessMemory,
  /* hexagon_S2_asr_i_p_nac */ DoesNotAccessMemory,
  /* hexagon_S2_asr_i_p_or */ DoesNotAccessMemory,
  /* hexagon_S2_asr_i_p_rnd */ DoesNotAccessMemory,
  /* hexagon_S2_asr_i_p_rnd_goodsyntax */ DoesNotAccessMemory,
  /* hexagon_S2_asr_i_r */ DoesNotAccessMemory,
  /* hexagon_S2_asr_i_r_acc */ DoesNotAccessMemory,
  /* hexagon_S2_asr_i_r_and */ DoesNotAccessMemory,
  /* hexagon_S2_asr_i_r_nac */ DoesNotAccessMemory,
  /* hexagon_S2_asr_i_r_or */ DoesNotAccessMemory,
  /* hexagon_S2_asr_i_r_rnd */ DoesNotAccessMemory,
  /* hexagon_S2_asr_i_r_rnd_goodsyntax */ DoesNotAccessMemory,
  /* hexagon_S2_asr_i_svw_trun */ DoesNotAccessMemory,
  /* hexagon_S2_asr_i_vh */ DoesNotAccessMemory,
  /* hexagon_S2_asr_i_vw */ DoesNotAccessMemory,
  /* hexagon_S2_asr_r_p */ DoesNotAccessMemory,
  /* hexagon_S2_asr_r_p_acc */ DoesNotAccessMemory,
  /* hexagon_S2_asr_r_p_and */ DoesNotAccessMemory,
  /* hexagon_S2_asr_r_p_nac */ DoesNotAccessMemory,
  /* hexagon_S2_asr_r_p_or */ DoesNotAccessMemory,
  /* hexagon_S2_asr_r_p_xor */ DoesNotAccessMemory,
  /* hexagon_S2_asr_r_r */ DoesNotAccessMemory,
  /* hexagon_S2_asr_r_r_acc */ DoesNotAccessMemory,
  /* hexagon_S2_asr_r_r_and */ DoesNotAccessMemory,
  /* hexagon_S2_asr_r_r_nac */ DoesNotAccessMemory,
  /* hexagon_S2_asr_r_r_or */ DoesNotAccessMemory,
  /* hexagon_S2_asr_r_r_sat */ DoesNotAccessMemory,
  /* hexagon_S2_asr_r_svw_trun */ DoesNotAccessMemory,
  /* hexagon_S2_asr_r_vh */ DoesNotAccessMemory,
  /* hexagon_S2_asr_r_vw */ DoesNotAccessMemory,
  /* hexagon_S2_brev */ DoesNotAccessMemory,
  /* hexagon_S2_brevp */ DoesNotAccessMemory,
  /* hexagon_S2_cl0 */ DoesNotAccessMemory,
  /* hexagon_S2_cl0p */ DoesNotAccessMemory,
  /* hexagon_S2_cl1 */ DoesNotAccessMemory,
  /* hexagon_S2_cl1p */ DoesNotAccessMemory,
  /* hexagon_S2_clb */ DoesNotAccessMemory,
  /* hexagon_S2_clbnorm */ DoesNotAccessMemory,
  /* hexagon_S2_clbp */ DoesNotAccessMemory,
  /* hexagon_S2_clrbit_i */ DoesNotAccessMemory,
  /* hexagon_S2_clrbit_r */ DoesNotAccessMemory,
  /* hexagon_S2_ct0 */ DoesNotAccessMemory,
  /* hexagon_S2_ct0p */ DoesNotAccessMemory,
  /* hexagon_S2_ct1 */ DoesNotAccessMemory,
  /* hexagon_S2_ct1p */ DoesNotAccessMemory,
  /* hexagon_S2_deinterleave */ DoesNotAccessMemory,
  /* hexagon_S2_extractu */ DoesNotAccessMemory,
  /* hexagon_S2_extractu_rp */ DoesNotAccessMemory,
  /* hexagon_S2_extractup */ DoesNotAccessMemory,
  /* hexagon_S2_extractup_rp */ DoesNotAccessMemory,
  /* hexagon_S2_insert */ DoesNotAccessMemory,
  /* hexagon_S2_insert_rp */ DoesNotAccessMemory,
  /* hexagon_S2_insertp */ DoesNotAccessMemory,
  /* hexagon_S2_insertp_rp */ DoesNotAccessMemory,
  /* hexagon_S2_interleave */ DoesNotAccessMemory,
  /* hexagon_S2_lfsp */ DoesNotAccessMemory,
  /* hexagon_S2_lsl_r_p */ DoesNotAccessMemory,
  /* hexagon_S2_lsl_r_p_acc */ DoesNotAccessMemory,
  /* hexagon_S2_lsl_r_p_and */ DoesNotAccessMemory,
  /* hexagon_S2_lsl_r_p_nac */ DoesNotAccessMemory,
  /* hexagon_S2_lsl_r_p_or */ DoesNotAccessMemory,
  /* hexagon_S2_lsl_r_p_xor */ DoesNotAccessMemory,
  /* hexagon_S2_lsl_r_r */ DoesNotAccessMemory,
  /* hexagon_S2_lsl_r_r_acc */ DoesNotAccessMemory,
  /* hexagon_S2_lsl_r_r_and */ DoesNotAccessMemory,
  /* hexagon_S2_lsl_r_r_nac */ DoesNotAccessMemory,
  /* hexagon_S2_lsl_r_r_or */ DoesNotAccessMemory,
  /* hexagon_S2_lsl_r_vh */ DoesNotAccessMemory,
  /* hexagon_S2_lsl_r_vw */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_i_p */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_i_p_acc */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_i_p_and */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_i_p_nac */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_i_p_or */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_i_p_xacc */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_i_r */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_i_r_acc */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_i_r_and */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_i_r_nac */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_i_r_or */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_i_r_xacc */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_i_vh */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_i_vw */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_r_p */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_r_p_acc */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_r_p_and */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_r_p_nac */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_r_p_or */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_r_p_xor */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_r_r */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_r_r_acc */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_r_r_and */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_r_r_nac */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_r_r_or */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_r_vh */ DoesNotAccessMemory,
  /* hexagon_S2_lsr_r_vw */ DoesNotAccessMemory,
  /* hexagon_S2_packhl */ DoesNotAccessMemory,
  /* hexagon_S2_parityp */ DoesNotAccessMemory,
  /* hexagon_S2_setbit_i */ DoesNotAccessMemory,
  /* hexagon_S2_setbit_r */ DoesNotAccessMemory,
  /* hexagon_S2_shuffeb */ DoesNotAccessMemory,
  /* hexagon_S2_shuffeh */ DoesNotAccessMemory,
  /* hexagon_S2_shuffob */ DoesNotAccessMemory,
  /* hexagon_S2_shuffoh */ DoesNotAccessMemory,
  /* hexagon_S2_svsathb */ DoesNotAccessMemory,
  /* hexagon_S2_svsathub */ DoesNotAccessMemory,
  /* hexagon_S2_tableidxb_goodsyntax */ DoesNotAccessMemory,
  /* hexagon_S2_tableidxd_goodsyntax */ DoesNotAccessMemory,
  /* hexagon_S2_tableidxh_goodsyntax */ DoesNotAccessMemory,
  /* hexagon_S2_tableidxw_goodsyntax */ DoesNotAccessMemory,
  /* hexagon_S2_togglebit_i */ DoesNotAccessMemory,
  /* hexagon_S2_togglebit_r */ DoesNotAccessMemory,
  /* hexagon_S2_tstbit_i */ DoesNotAccessMemory,
  /* hexagon_S2_tstbit_r */ DoesNotAccessMemory,
  /* hexagon_S2_valignib */ DoesNotAccessMemory,
  /* hexagon_S2_valignrb */ DoesNotAccessMemory,
  /* hexagon_S2_vcnegh */ DoesNotAccessMemory,
  /* hexagon_S2_vcrotate */ DoesNotAccessMemory,
  /* hexagon_S2_vrcnegh */ DoesNotAccessMemory,
  /* hexagon_S2_vrndpackwh */ DoesNotAccessMemory,
  /* hexagon_S2_vrndpackwhs */ DoesNotAccessMemory,
  /* hexagon_S2_vsathb */ DoesNotAccessMemory,
  /* hexagon_S2_vsathb_nopack */ DoesNotAccessMemory,
  /* hexagon_S2_vsathub */ DoesNotAccessMemory,
  /* hexagon_S2_vsathub_nopack */ DoesNotAccessMemory,
  /* hexagon_S2_vsatwh */ DoesNotAccessMemory,
  /* hexagon_S2_vsatwh_nopack */ DoesNotAccessMemory,
  /* hexagon_S2_vsatwuh */ DoesNotAccessMemory,
  /* hexagon_S2_vsatwuh_nopack */ DoesNotAccessMemory,
  /* hexagon_S2_vsplatrb */ DoesNotAccessMemory,
  /* hexagon_S2_vsplatrh */ DoesNotAccessMemory,
  /* hexagon_S2_vspliceib */ DoesNotAccessMemory,
  /* hexagon_S2_vsplicerb */ DoesNotAccessMemory,
  /* hexagon_S2_vsxtbh */ DoesNotAccessMemory,
  /* hexagon_S2_vsxthw */ DoesNotAccessMemory,
  /* hexagon_S2_vtrunehb */ DoesNotAccessMemory,
  /* hexagon_S2_vtrunewh */ DoesNotAccessMemory,
  /* hexagon_S2_vtrunohb */ DoesNotAccessMemory,
  /* hexagon_S2_vtrunowh */ DoesNotAccessMemory,
  /* hexagon_S2_vzxtbh */ DoesNotAccessMemory,
  /* hexagon_S2_vzxthw */ DoesNotAccessMemory,
  /* hexagon_S4_addaddi */ DoesNotAccessMemory,
  /* hexagon_S4_addi_asl_ri */ DoesNotAccessMemory,
  /* hexagon_S4_addi_lsr_ri */ DoesNotAccessMemory,
  /* hexagon_S4_andi_asl_ri */ DoesNotAccessMemory,
  /* hexagon_S4_andi_lsr_ri */ DoesNotAccessMemory,
  /* hexagon_S4_clbaddi */ DoesNotAccessMemory,
  /* hexagon_S4_clbpaddi */ DoesNotAccessMemory,
  /* hexagon_S4_clbpnorm */ DoesNotAccessMemory,
  /* hexagon_S4_extract */ DoesNotAccessMemory,
  /* hexagon_S4_extract_rp */ DoesNotAccessMemory,
  /* hexagon_S4_extractp */ DoesNotAccessMemory,
  /* hexagon_S4_extractp_rp */ DoesNotAccessMemory,
  /* hexagon_S4_lsli */ DoesNotAccessMemory,
  /* hexagon_S4_ntstbit_i */ DoesNotAccessMemory,
  /* hexagon_S4_ntstbit_r */ DoesNotAccessMemory,
  /* hexagon_S4_or_andi */ DoesNotAccessMemory,
  /* hexagon_S4_or_andix */ DoesNotAccessMemory,
  /* hexagon_S4_or_ori */ DoesNotAccessMemory,
  /* hexagon_S4_ori_asl_ri */ DoesNotAccessMemory,
  /* hexagon_S4_ori_lsr_ri */ DoesNotAccessMemory,
  /* hexagon_S4_parity */ DoesNotAccessMemory,
  /* hexagon_S4_subaddi */ DoesNotAccessMemory,
  /* hexagon_S4_subi_asl_ri */ DoesNotAccessMemory,
  /* hexagon_S4_subi_lsr_ri */ DoesNotAccessMemory,
  /* hexagon_S4_vrcrotate */ DoesNotAccessMemory,
  /* hexagon_S4_vrcrotate_acc */ DoesNotAccessMemory,
  /* hexagon_S4_vxaddsubh */ DoesNotAccessMemory,
  /* hexagon_S4_vxaddsubhr */ DoesNotAccessMemory,
  /* hexagon_S4_vxaddsubw */ DoesNotAccessMemory,
  /* hexagon_S4_vxsubaddh */ DoesNotAccessMemory,
  /* hexagon_S4_vxsubaddhr */ DoesNotAccessMemory,
  /* hexagon_S4_vxsubaddw */ DoesNotAccessMemory,
  /* hexagon_S5_asrhub_rnd_sat_goodsyntax */ DoesNotAccessMemory,
  /* hexagon_S5_asrhub_sat */ DoesNotAccessMemory,
  /* hexagon_S5_popcountp */ DoesNotAccessMemory,
  /* hexagon_S5_vasrhrnd_goodsyntax */ DoesNotAccessMemory,
  /* hexagon_SI_to_SXTHI_asrh */ DoesNotAccessMemory,
  /* hexagon_circ_ldd */ OnlyAccessesArgumentPointees,
  /* init_trampoline */ OnlyAccessesArgumentPointees,
  /* invariant_end */ OnlyAccessesArgumentPointees,
  /* invariant_start */ OnlyAccessesArgumentPointees,
  /* lifetime_end */ OnlyAccessesArgumentPointees,
  /* lifetime_start */ OnlyAccessesArgumentPointees,
  /* log */ DoesNotAccessMemory,
  /* log10 */ DoesNotAccessMemory,
  /* log2 */ DoesNotAccessMemory,
  /* longjmp */ UnknownModRefBehavior,
  /* memcpy */ OnlyAccessesArgumentPointees,
  /* memmove */ OnlyAccessesArgumentPointees,
  /* memset */ OnlyAccessesArgumentPointees,
  /* mips_absq_s_ph */ UnknownModRefBehavior,
  /* mips_absq_s_qb */ UnknownModRefBehavior,
  /* mips_absq_s_w */ UnknownModRefBehavior,
  /* mips_add_a_b */ DoesNotAccessMemory,
  /* mips_add_a_d */ DoesNotAccessMemory,
  /* mips_add_a_h */ DoesNotAccessMemory,
  /* mips_add_a_w */ DoesNotAccessMemory,
  /* mips_addq_ph */ DoesNotAccessMemory,
  /* mips_addq_s_ph */ DoesNotAccessMemory,
  /* mips_addq_s_w */ UnknownModRefBehavior,
  /* mips_addqh_ph */ DoesNotAccessMemory,
  /* mips_addqh_r_ph */ DoesNotAccessMemory,
  /* mips_addqh_r_w */ DoesNotAccessMemory,
  /* mips_addqh_w */ DoesNotAccessMemory,
  /* mips_adds_a_b */ DoesNotAccessMemory,
  /* mips_adds_a_d */ DoesNotAccessMemory,
  /* mips_adds_a_h */ DoesNotAccessMemory,
  /* mips_adds_a_w */ DoesNotAccessMemory,
  /* mips_adds_s_b */ DoesNotAccessMemory,
  /* mips_adds_s_d */ DoesNotAccessMemory,
  /* mips_adds_s_h */ DoesNotAccessMemory,
  /* mips_adds_s_w */ DoesNotAccessMemory,
  /* mips_adds_u_b */ DoesNotAccessMemory,
  /* mips_adds_u_d */ DoesNotAccessMemory,
  /* mips_adds_u_h */ DoesNotAccessMemory,
  /* mips_adds_u_w */ DoesNotAccessMemory,
  /* mips_addsc */ UnknownModRefBehavior,
  /* mips_addu_ph */ UnknownModRefBehavior,
  /* mips_addu_qb */ DoesNotAccessMemory,
  /* mips_addu_s_ph */ UnknownModRefBehavior,
  /* mips_addu_s_qb */ DoesNotAccessMemory,
  /* mips_adduh_qb */ DoesNotAccessMemory,
  /* mips_adduh_r_qb */ DoesNotAccessMemory,
  /* mips_addv_b */ DoesNotAccessMemory,
  /* mips_addv_d */ DoesNotAccessMemory,
  /* mips_addv_h */ DoesNotAccessMemory,
  /* mips_addv_w */ DoesNotAccessMemory,
  /* mips_addvi_b */ DoesNotAccessMemory,
  /* mips_addvi_d */ DoesNotAccessMemory,
  /* mips_addvi_h */ DoesNotAccessMemory,
  /* mips_addvi_w */ DoesNotAccessMemory,
  /* mips_addwc */ UnknownModRefBehavior,
  /* mips_and_v */ DoesNotAccessMemory,
  /* mips_andi_b */ DoesNotAccessMemory,
  /* mips_append */ DoesNotAccessMemory,
  /* mips_asub_s_b */ DoesNotAccessMemory,
  /* mips_asub_s_d */ DoesNotAccessMemory,
  /* mips_asub_s_h */ DoesNotAccessMemory,
  /* mips_asub_s_w */ DoesNotAccessMemory,
  /* mips_asub_u_b */ DoesNotAccessMemory,
  /* mips_asub_u_d */ DoesNotAccessMemory,
  /* mips_asub_u_h */ DoesNotAccessMemory,
  /* mips_asub_u_w */ DoesNotAccessMemory,
  /* mips_ave_s_b */ DoesNotAccessMemory,
  /* mips_ave_s_d */ DoesNotAccessMemory,
  /* mips_ave_s_h */ DoesNotAccessMemory,
  /* mips_ave_s_w */ DoesNotAccessMemory,
  /* mips_ave_u_b */ DoesNotAccessMemory,
  /* mips_ave_u_d */ DoesNotAccessMemory,
  /* mips_ave_u_h */ DoesNotAccessMemory,
  /* mips_ave_u_w */ DoesNotAccessMemory,
  /* mips_aver_s_b */ DoesNotAccessMemory,
  /* mips_aver_s_d */ DoesNotAccessMemory,
  /* mips_aver_s_h */ DoesNotAccessMemory,
  /* mips_aver_s_w */ DoesNotAccessMemory,
  /* mips_aver_u_b */ DoesNotAccessMemory,
  /* mips_aver_u_d */ DoesNotAccessMemory,
  /* mips_aver_u_h */ DoesNotAccessMemory,
  /* mips_aver_u_w */ DoesNotAccessMemory,
  /* mips_balign */ DoesNotAccessMemory,
  /* mips_bclr_b */ DoesNotAccessMemory,
  /* mips_bclr_d */ DoesNotAccessMemory,
  /* mips_bclr_h */ DoesNotAccessMemory,
  /* mips_bclr_w */ DoesNotAccessMemory,
  /* mips_bclri_b */ DoesNotAccessMemory,
  /* mips_bclri_d */ DoesNotAccessMemory,
  /* mips_bclri_h */ DoesNotAccessMemory,
  /* mips_bclri_w */ DoesNotAccessMemory,
  /* mips_binsl_b */ DoesNotAccessMemory,
  /* mips_binsl_d */ DoesNotAccessMemory,
  /* mips_binsl_h */ DoesNotAccessMemory,
  /* mips_binsl_w */ DoesNotAccessMemory,
  /* mips_binsli_b */ DoesNotAccessMemory,
  /* mips_binsli_d */ DoesNotAccessMemory,
  /* mips_binsli_h */ DoesNotAccessMemory,
  /* mips_binsli_w */ DoesNotAccessMemory,
  /* mips_binsr_b */ DoesNotAccessMemory,
  /* mips_binsr_d */ DoesNotAccessMemory,
  /* mips_binsr_h */ DoesNotAccessMemory,
  /* mips_binsr_w */ DoesNotAccessMemory,
  /* mips_binsri_b */ DoesNotAccessMemory,
  /* mips_binsri_d */ DoesNotAccessMemory,
  /* mips_binsri_h */ DoesNotAccessMemory,
  /* mips_binsri_w */ DoesNotAccessMemory,
  /* mips_bitrev */ DoesNotAccessMemory,
  /* mips_bmnz_v */ DoesNotAccessMemory,
  /* mips_bmnzi_b */ DoesNotAccessMemory,
  /* mips_bmz_v */ DoesNotAccessMemory,
  /* mips_bmzi_b */ DoesNotAccessMemory,
  /* mips_bneg_b */ DoesNotAccessMemory,
  /* mips_bneg_d */ DoesNotAccessMemory,
  /* mips_bneg_h */ DoesNotAccessMemory,
  /* mips_bneg_w */ DoesNotAccessMemory,
  /* mips_bnegi_b */ DoesNotAccessMemory,
  /* mips_bnegi_d */ DoesNotAccessMemory,
  /* mips_bnegi_h */ DoesNotAccessMemory,
  /* mips_bnegi_w */ DoesNotAccessMemory,
  /* mips_bnz_b */ DoesNotAccessMemory,
  /* mips_bnz_d */ DoesNotAccessMemory,
  /* mips_bnz_h */ DoesNotAccessMemory,
  /* mips_bnz_v */ DoesNotAccessMemory,
  /* mips_bnz_w */ DoesNotAccessMemory,
  /* mips_bposge32 */ OnlyReadsMemory,
  /* mips_bsel_v */ DoesNotAccessMemory,
  /* mips_bseli_b */ DoesNotAccessMemory,
  /* mips_bset_b */ DoesNotAccessMemory,
  /* mips_bset_d */ DoesNotAccessMemory,
  /* mips_bset_h */ DoesNotAccessMemory,
  /* mips_bset_w */ DoesNotAccessMemory,
  /* mips_bseti_b */ DoesNotAccessMemory,
  /* mips_bseti_d */ DoesNotAccessMemory,
  /* mips_bseti_h */ DoesNotAccessMemory,
  /* mips_bseti_w */ DoesNotAccessMemory,
  /* mips_bz_b */ DoesNotAccessMemory,
  /* mips_bz_d */ DoesNotAccessMemory,
  /* mips_bz_h */ DoesNotAccessMemory,
  /* mips_bz_v */ DoesNotAccessMemory,
  /* mips_bz_w */ DoesNotAccessMemory,
  /* mips_ceq_b */ DoesNotAccessMemory,
  /* mips_ceq_d */ DoesNotAccessMemory,
  /* mips_ceq_h */ DoesNotAccessMemory,
  /* mips_ceq_w */ DoesNotAccessMemory,
  /* mips_ceqi_b */ DoesNotAccessMemory,
  /* mips_ceqi_d */ DoesNotAccessMemory,
  /* mips_ceqi_h */ DoesNotAccessMemory,
  /* mips_ceqi_w */ DoesNotAccessMemory,
  /* mips_cfcmsa */ UnknownModRefBehavior,
  /* mips_cle_s_b */ DoesNotAccessMemory,
  /* mips_cle_s_d */ DoesNotAccessMemory,
  /* mips_cle_s_h */ DoesNotAccessMemory,
  /* mips_cle_s_w */ DoesNotAccessMemory,
  /* mips_cle_u_b */ DoesNotAccessMemory,
  /* mips_cle_u_d */ DoesNotAccessMemory,
  /* mips_cle_u_h */ DoesNotAccessMemory,
  /* mips_cle_u_w */ DoesNotAccessMemory,
  /* mips_clei_s_b */ DoesNotAccessMemory,
  /* mips_clei_s_d */ DoesNotAccessMemory,
  /* mips_clei_s_h */ DoesNotAccessMemory,
  /* mips_clei_s_w */ DoesNotAccessMemory,
  /* mips_clei_u_b */ DoesNotAccessMemory,
  /* mips_clei_u_d */ DoesNotAccessMemory,
  /* mips_clei_u_h */ DoesNotAccessMemory,
  /* mips_clei_u_w */ DoesNotAccessMemory,
  /* mips_clt_s_b */ DoesNotAccessMemory,
  /* mips_clt_s_d */ DoesNotAccessMemory,
  /* mips_clt_s_h */ DoesNotAccessMemory,
  /* mips_clt_s_w */ DoesNotAccessMemory,
  /* mips_clt_u_b */ DoesNotAccessMemory,
  /* mips_clt_u_d */ DoesNotAccessMemory,
  /* mips_clt_u_h */ DoesNotAccessMemory,
  /* mips_clt_u_w */ DoesNotAccessMemory,
  /* mips_clti_s_b */ DoesNotAccessMemory,
  /* mips_clti_s_d */ DoesNotAccessMemory,
  /* mips_clti_s_h */ DoesNotAccessMemory,
  /* mips_clti_s_w */ DoesNotAccessMemory,
  /* mips_clti_u_b */ DoesNotAccessMemory,
  /* mips_clti_u_d */ DoesNotAccessMemory,
  /* mips_clti_u_h */ DoesNotAccessMemory,
  /* mips_clti_u_w */ DoesNotAccessMemory,
  /* mips_cmp_eq_ph */ UnknownModRefBehavior,
  /* mips_cmp_le_ph */ UnknownModRefBehavior,
  /* mips_cmp_lt_ph */ UnknownModRefBehavior,
  /* mips_cmpgdu_eq_qb */ UnknownModRefBehavior,
  /* mips_cmpgdu_le_qb */ UnknownModRefBehavior,
  /* mips_cmpgdu_lt_qb */ UnknownModRefBehavior,
  /* mips_cmpgu_eq_qb */ UnknownModRefBehavior,
  /* mips_cmpgu_le_qb */ UnknownModRefBehavior,
  /* mips_cmpgu_lt_qb */ UnknownModRefBehavior,
  /* mips_cmpu_eq_qb */ UnknownModRefBehavior,
  /* mips_cmpu_le_qb */ UnknownModRefBehavior,
  /* mips_cmpu_lt_qb */ UnknownModRefBehavior,
  /* mips_copy_s_b */ DoesNotAccessMemory,
  /* mips_copy_s_d */ DoesNotAccessMemory,
  /* mips_copy_s_h */ DoesNotAccessMemory,
  /* mips_copy_s_w */ DoesNotAccessMemory,
  /* mips_copy_u_b */ DoesNotAccessMemory,
  /* mips_copy_u_d */ DoesNotAccessMemory,
  /* mips_copy_u_h */ DoesNotAccessMemory,
  /* mips_copy_u_w */ DoesNotAccessMemory,
  /* mips_ctcmsa */ UnknownModRefBehavior,
  /* mips_div_s_b */ DoesNotAccessMemory,
  /* mips_div_s_d */ DoesNotAccessMemory,
  /* mips_div_s_h */ DoesNotAccessMemory,
  /* mips_div_s_w */ DoesNotAccessMemory,
  /* mips_div_u_b */ DoesNotAccessMemory,
  /* mips_div_u_d */ DoesNotAccessMemory,
  /* mips_div_u_h */ DoesNotAccessMemory,
  /* mips_div_u_w */ DoesNotAccessMemory,
  /* mips_dlsa */ DoesNotAccessMemory,
  /* mips_dotp_s_d */ DoesNotAccessMemory,
  /* mips_dotp_s_h */ DoesNotAccessMemory,
  /* mips_dotp_s_w */ DoesNotAccessMemory,
  /* mips_dotp_u_d */ DoesNotAccessMemory,
  /* mips_dotp_u_h */ DoesNotAccessMemory,
  /* mips_dotp_u_w */ DoesNotAccessMemory,
  /* mips_dpa_w_ph */ DoesNotAccessMemory,
  /* mips_dpadd_s_d */ DoesNotAccessMemory,
  /* mips_dpadd_s_h */ DoesNotAccessMemory,
  /* mips_dpadd_s_w */ DoesNotAccessMemory,
  /* mips_dpadd_u_d */ DoesNotAccessMemory,
  /* mips_dpadd_u_h */ DoesNotAccessMemory,
  /* mips_dpadd_u_w */ DoesNotAccessMemory,
  /* mips_dpaq_s_w_ph */ UnknownModRefBehavior,
  /* mips_dpaq_sa_l_w */ UnknownModRefBehavior,
  /* mips_dpaqx_s_w_ph */ UnknownModRefBehavior,
  /* mips_dpaqx_sa_w_ph */ UnknownModRefBehavior,
  /* mips_dpau_h_qbl */ DoesNotAccessMemory,
  /* mips_dpau_h_qbr */ DoesNotAccessMemory,
  /* mips_dpax_w_ph */ DoesNotAccessMemory,
  /* mips_dps_w_ph */ DoesNotAccessMemory,
  /* mips_dpsq_s_w_ph */ UnknownModRefBehavior,
  /* mips_dpsq_sa_l_w */ UnknownModRefBehavior,
  /* mips_dpsqx_s_w_ph */ UnknownModRefBehavior,
  /* mips_dpsqx_sa_w_ph */ UnknownModRefBehavior,
  /* mips_dpsu_h_qbl */ DoesNotAccessMemory,
  /* mips_dpsu_h_qbr */ DoesNotAccessMemory,
  /* mips_dpsub_s_d */ DoesNotAccessMemory,
  /* mips_dpsub_s_h */ DoesNotAccessMemory,
  /* mips_dpsub_s_w */ DoesNotAccessMemory,
  /* mips_dpsub_u_d */ DoesNotAccessMemory,
  /* mips_dpsub_u_h */ DoesNotAccessMemory,
  /* mips_dpsub_u_w */ DoesNotAccessMemory,
  /* mips_dpsx_w_ph */ DoesNotAccessMemory,
  /* mips_extp */ UnknownModRefBehavior,
  /* mips_extpdp */ UnknownModRefBehavior,
  /* mips_extr_r_w */ UnknownModRefBehavior,
  /* mips_extr_rs_w */ UnknownModRefBehavior,
  /* mips_extr_s_h */ UnknownModRefBehavior,
  /* mips_extr_w */ UnknownModRefBehavior,
  /* mips_fadd_d */ DoesNotAccessMemory,
  /* mips_fadd_w */ DoesNotAccessMemory,
  /* mips_fcaf_d */ DoesNotAccessMemory,
  /* mips_fcaf_w */ DoesNotAccessMemory,
  /* mips_fceq_d */ DoesNotAccessMemory,
  /* mips_fceq_w */ DoesNotAccessMemory,
  /* mips_fclass_d */ DoesNotAccessMemory,
  /* mips_fclass_w */ DoesNotAccessMemory,
  /* mips_fcle_d */ DoesNotAccessMemory,
  /* mips_fcle_w */ DoesNotAccessMemory,
  /* mips_fclt_d */ DoesNotAccessMemory,
  /* mips_fclt_w */ DoesNotAccessMemory,
  /* mips_fcne_d */ DoesNotAccessMemory,
  /* mips_fcne_w */ DoesNotAccessMemory,
  /* mips_fcor_d */ DoesNotAccessMemory,
  /* mips_fcor_w */ DoesNotAccessMemory,
  /* mips_fcueq_d */ DoesNotAccessMemory,
  /* mips_fcueq_w */ DoesNotAccessMemory,
  /* mips_fcule_d */ DoesNotAccessMemory,
  /* mips_fcule_w */ DoesNotAccessMemory,
  /* mips_fcult_d */ DoesNotAccessMemory,
  /* mips_fcult_w */ DoesNotAccessMemory,
  /* mips_fcun_d */ DoesNotAccessMemory,
  /* mips_fcun_w */ DoesNotAccessMemory,
  /* mips_fcune_d */ DoesNotAccessMemory,
  /* mips_fcune_w */ DoesNotAccessMemory,
  /* mips_fdiv_d */ DoesNotAccessMemory,
  /* mips_fdiv_w */ DoesNotAccessMemory,
  /* mips_fexdo_h */ DoesNotAccessMemory,
  /* mips_fexdo_w */ DoesNotAccessMemory,
  /* mips_fexp2_d */ DoesNotAccessMemory,
  /* mips_fexp2_w */ DoesNotAccessMemory,
  /* mips_fexupl_d */ DoesNotAccessMemory,
  /* mips_fexupl_w */ DoesNotAccessMemory,
  /* mips_fexupr_d */ DoesNotAccessMemory,
  /* mips_fexupr_w */ DoesNotAccessMemory,
  /* mips_ffint_s_d */ DoesNotAccessMemory,
  /* mips_ffint_s_w */ DoesNotAccessMemory,
  /* mips_ffint_u_d */ DoesNotAccessMemory,
  /* mips_ffint_u_w */ DoesNotAccessMemory,
  /* mips_ffql_d */ DoesNotAccessMemory,
  /* mips_ffql_w */ DoesNotAccessMemory,
  /* mips_ffqr_d */ DoesNotAccessMemory,
  /* mips_ffqr_w */ DoesNotAccessMemory,
  /* mips_fill_b */ DoesNotAccessMemory,
  /* mips_fill_d */ DoesNotAccessMemory,
  /* mips_fill_h */ DoesNotAccessMemory,
  /* mips_fill_w */ DoesNotAccessMemory,
  /* mips_flog2_d */ DoesNotAccessMemory,
  /* mips_flog2_w */ DoesNotAccessMemory,
  /* mips_fmadd_d */ DoesNotAccessMemory,
  /* mips_fmadd_w */ DoesNotAccessMemory,
  /* mips_fmax_a_d */ DoesNotAccessMemory,
  /* mips_fmax_a_w */ DoesNotAccessMemory,
  /* mips_fmax_d */ DoesNotAccessMemory,
  /* mips_fmax_w */ DoesNotAccessMemory,
  /* mips_fmin_a_d */ DoesNotAccessMemory,
  /* mips_fmin_a_w */ DoesNotAccessMemory,
  /* mips_fmin_d */ DoesNotAccessMemory,
  /* mips_fmin_w */ DoesNotAccessMemory,
  /* mips_fmsub_d */ DoesNotAccessMemory,
  /* mips_fmsub_w */ DoesNotAccessMemory,
  /* mips_fmul_d */ DoesNotAccessMemory,
  /* mips_fmul_w */ DoesNotAccessMemory,
  /* mips_frcp_d */ DoesNotAccessMemory,
  /* mips_frcp_w */ DoesNotAccessMemory,
  /* mips_frint_d */ DoesNotAccessMemory,
  /* mips_frint_w */ DoesNotAccessMemory,
  /* mips_frsqrt_d */ DoesNotAccessMemory,
  /* mips_frsqrt_w */ DoesNotAccessMemory,
  /* mips_fsaf_d */ DoesNotAccessMemory,
  /* mips_fsaf_w */ DoesNotAccessMemory,
  /* mips_fseq_d */ DoesNotAccessMemory,
  /* mips_fseq_w */ DoesNotAccessMemory,
  /* mips_fsle_d */ DoesNotAccessMemory,
  /* mips_fsle_w */ DoesNotAccessMemory,
  /* mips_fslt_d */ DoesNotAccessMemory,
  /* mips_fslt_w */ DoesNotAccessMemory,
  /* mips_fsne_d */ DoesNotAccessMemory,
  /* mips_fsne_w */ DoesNotAccessMemory,
  /* mips_fsor_d */ DoesNotAccessMemory,
  /* mips_fsor_w */ DoesNotAccessMemory,
  /* mips_fsqrt_d */ DoesNotAccessMemory,
  /* mips_fsqrt_w */ DoesNotAccessMemory,
  /* mips_fsub_d */ DoesNotAccessMemory,
  /* mips_fsub_w */ DoesNotAccessMemory,
  /* mips_fsueq_d */ DoesNotAccessMemory,
  /* mips_fsueq_w */ DoesNotAccessMemory,
  /* mips_fsule_d */ DoesNotAccessMemory,
  /* mips_fsule_w */ DoesNotAccessMemory,
  /* mips_fsult_d */ DoesNotAccessMemory,
  /* mips_fsult_w */ DoesNotAccessMemory,
  /* mips_fsun_d */ DoesNotAccessMemory,
  /* mips_fsun_w */ DoesNotAccessMemory,
  /* mips_fsune_d */ DoesNotAccessMemory,
  /* mips_fsune_w */ DoesNotAccessMemory,
  /* mips_ftint_s_d */ DoesNotAccessMemory,
  /* mips_ftint_s_w */ DoesNotAccessMemory,
  /* mips_ftint_u_d */ DoesNotAccessMemory,
  /* mips_ftint_u_w */ DoesNotAccessMemory,
  /* mips_ftq_h */ DoesNotAccessMemory,
  /* mips_ftq_w */ DoesNotAccessMemory,
  /* mips_ftrunc_s_d */ DoesNotAccessMemory,
  /* mips_ftrunc_s_w */ DoesNotAccessMemory,
  /* mips_ftrunc_u_d */ DoesNotAccessMemory,
  /* mips_ftrunc_u_w */ DoesNotAccessMemory,
  /* mips_hadd_s_d */ DoesNotAccessMemory,
  /* mips_hadd_s_h */ DoesNotAccessMemory,
  /* mips_hadd_s_w */ DoesNotAccessMemory,
  /* mips_hadd_u_d */ DoesNotAccessMemory,
  /* mips_hadd_u_h */ DoesNotAccessMemory,
  /* mips_hadd_u_w */ DoesNotAccessMemory,
  /* mips_hsub_s_d */ DoesNotAccessMemory,
  /* mips_hsub_s_h */ DoesNotAccessMemory,
  /* mips_hsub_s_w */ DoesNotAccessMemory,
  /* mips_hsub_u_d */ DoesNotAccessMemory,
  /* mips_hsub_u_h */ DoesNotAccessMemory,
  /* mips_hsub_u_w */ DoesNotAccessMemory,
  /* mips_ilvev_b */ DoesNotAccessMemory,
  /* mips_ilvev_d */ DoesNotAccessMemory,
  /* mips_ilvev_h */ DoesNotAccessMemory,
  /* mips_ilvev_w */ DoesNotAccessMemory,
  /* mips_ilvl_b */ DoesNotAccessMemory,
  /* mips_ilvl_d */ DoesNotAccessMemory,
  /* mips_ilvl_h */ DoesNotAccessMemory,
  /* mips_ilvl_w */ DoesNotAccessMemory,
  /* mips_ilvod_b */ DoesNotAccessMemory,
  /* mips_ilvod_d */ DoesNotAccessMemory,
  /* mips_ilvod_h */ DoesNotAccessMemory,
  /* mips_ilvod_w */ DoesNotAccessMemory,
  /* mips_ilvr_b */ DoesNotAccessMemory,
  /* mips_ilvr_d */ DoesNotAccessMemory,
  /* mips_ilvr_h */ DoesNotAccessMemory,
  /* mips_ilvr_w */ DoesNotAccessMemory,
  /* mips_insert_b */ DoesNotAccessMemory,
  /* mips_insert_d */ DoesNotAccessMemory,
  /* mips_insert_h */ DoesNotAccessMemory,
  /* mips_insert_w */ DoesNotAccessMemory,
  /* mips_insv */ OnlyReadsMemory,
  /* mips_insve_b */ DoesNotAccessMemory,
  /* mips_insve_d */ DoesNotAccessMemory,
  /* mips_insve_h */ DoesNotAccessMemory,
  /* mips_insve_w */ DoesNotAccessMemory,
  /* mips_lbux */ OnlyReadsArgumentPointees,
  /* mips_ld_b */ OnlyReadsArgumentPointees,
  /* mips_ld_d */ OnlyReadsArgumentPointees,
  /* mips_ld_h */ OnlyReadsArgumentPointees,
  /* mips_ld_w */ OnlyReadsArgumentPointees,
  /* mips_ldi_b */ DoesNotAccessMemory,
  /* mips_ldi_d */ DoesNotAccessMemory,
  /* mips_ldi_h */ DoesNotAccessMemory,
  /* mips_ldi_w */ DoesNotAccessMemory,
  /* mips_lhx */ OnlyReadsArgumentPointees,
  /* mips_lsa */ DoesNotAccessMemory,
  /* mips_lwx */ OnlyReadsArgumentPointees,
  /* mips_madd */ DoesNotAccessMemory,
  /* mips_madd_q_h */ DoesNotAccessMemory,
  /* mips_madd_q_w */ DoesNotAccessMemory,
  /* mips_maddr_q_h */ DoesNotAccessMemory,
  /* mips_maddr_q_w */ DoesNotAccessMemory,
  /* mips_maddu */ DoesNotAccessMemory,
  /* mips_maddv_b */ DoesNotAccessMemory,
  /* mips_maddv_d */ DoesNotAccessMemory,
  /* mips_maddv_h */ DoesNotAccessMemory,
  /* mips_maddv_w */ DoesNotAccessMemory,
  /* mips_maq_s_w_phl */ UnknownModRefBehavior,
  /* mips_maq_s_w_phr */ UnknownModRefBehavior,
  /* mips_maq_sa_w_phl */ UnknownModRefBehavior,
  /* mips_maq_sa_w_phr */ UnknownModRefBehavior,
  /* mips_max_a_b */ DoesNotAccessMemory,
  /* mips_max_a_d */ DoesNotAccessMemory,
  /* mips_max_a_h */ DoesNotAccessMemory,
  /* mips_max_a_w */ DoesNotAccessMemory,
  /* mips_max_s_b */ DoesNotAccessMemory,
  /* mips_max_s_d */ DoesNotAccessMemory,
  /* mips_max_s_h */ DoesNotAccessMemory,
  /* mips_max_s_w */ DoesNotAccessMemory,
  /* mips_max_u_b */ DoesNotAccessMemory,
  /* mips_max_u_d */ DoesNotAccessMemory,
  /* mips_max_u_h */ DoesNotAccessMemory,
  /* mips_max_u_w */ DoesNotAccessMemory,
  /* mips_maxi_s_b */ DoesNotAccessMemory,
  /* mips_maxi_s_d */ DoesNotAccessMemory,
  /* mips_maxi_s_h */ DoesNotAccessMemory,
  /* mips_maxi_s_w */ DoesNotAccessMemory,
  /* mips_maxi_u_b */ DoesNotAccessMemory,
  /* mips_maxi_u_d */ DoesNotAccessMemory,
  /* mips_maxi_u_h */ DoesNotAccessMemory,
  /* mips_maxi_u_w */ DoesNotAccessMemory,
  /* mips_min_a_b */ DoesNotAccessMemory,
  /* mips_min_a_d */ DoesNotAccessMemory,
  /* mips_min_a_h */ DoesNotAccessMemory,
  /* mips_min_a_w */ DoesNotAccessMemory,
  /* mips_min_s_b */ DoesNotAccessMemory,
  /* mips_min_s_d */ DoesNotAccessMemory,
  /* mips_min_s_h */ DoesNotAccessMemory,
  /* mips_min_s_w */ DoesNotAccessMemory,
  /* mips_min_u_b */ DoesNotAccessMemory,
  /* mips_min_u_d */ DoesNotAccessMemory,
  /* mips_min_u_h */ DoesNotAccessMemory,
  /* mips_min_u_w */ DoesNotAccessMemory,
  /* mips_mini_s_b */ DoesNotAccessMemory,
  /* mips_mini_s_d */ DoesNotAccessMemory,
  /* mips_mini_s_h */ DoesNotAccessMemory,
  /* mips_mini_s_w */ DoesNotAccessMemory,
  /* mips_mini_u_b */ DoesNotAccessMemory,
  /* mips_mini_u_d */ DoesNotAccessMemory,
  /* mips_mini_u_h */ DoesNotAccessMemory,
  /* mips_mini_u_w */ DoesNotAccessMemory,
  /* mips_mod_s_b */ DoesNotAccessMemory,
  /* mips_mod_s_d */ DoesNotAccessMemory,
  /* mips_mod_s_h */ DoesNotAccessMemory,
  /* mips_mod_s_w */ DoesNotAccessMemory,
  /* mips_mod_u_b */ DoesNotAccessMemory,
  /* mips_mod_u_d */ DoesNotAccessMemory,
  /* mips_mod_u_h */ DoesNotAccessMemory,
  /* mips_mod_u_w */ DoesNotAccessMemory,
  /* mips_modsub */ DoesNotAccessMemory,
  /* mips_move_v */ DoesNotAccessMemory,
  /* mips_msub */ DoesNotAccessMemory,
  /* mips_msub_q_h */ DoesNotAccessMemory,
  /* mips_msub_q_w */ DoesNotAccessMemory,
  /* mips_msubr_q_h */ DoesNotAccessMemory,
  /* mips_msubr_q_w */ DoesNotAccessMemory,
  /* mips_msubu */ DoesNotAccessMemory,
  /* mips_msubv_b */ DoesNotAccessMemory,
  /* mips_msubv_d */ DoesNotAccessMemory,
  /* mips_msubv_h */ DoesNotAccessMemory,
  /* mips_msubv_w */ DoesNotAccessMemory,
  /* mips_mthlip */ UnknownModRefBehavior,
  /* mips_mul_ph */ UnknownModRefBehavior,
  /* mips_mul_q_h */ DoesNotAccessMemory,
  /* mips_mul_q_w */ DoesNotAccessMemory,
  /* mips_mul_s_ph */ UnknownModRefBehavior,
  /* mips_muleq_s_w_phl */ UnknownModRefBehavior,
  /* mips_muleq_s_w_phr */ UnknownModRefBehavior,
  /* mips_muleu_s_ph_qbl */ UnknownModRefBehavior,
  /* mips_muleu_s_ph_qbr */ UnknownModRefBehavior,
  /* mips_mulq_rs_ph */ UnknownModRefBehavior,
  /* mips_mulq_rs_w */ UnknownModRefBehavior,
  /* mips_mulq_s_ph */ UnknownModRefBehavior,
  /* mips_mulq_s_w */ UnknownModRefBehavior,
  /* mips_mulr_q_h */ DoesNotAccessMemory,
  /* mips_mulr_q_w */ DoesNotAccessMemory,
  /* mips_mulsa_w_ph */ DoesNotAccessMemory,
  /* mips_mulsaq_s_w_ph */ UnknownModRefBehavior,
  /* mips_mult */ DoesNotAccessMemory,
  /* mips_multu */ DoesNotAccessMemory,
  /* mips_mulv_b */ DoesNotAccessMemory,
  /* mips_mulv_d */ DoesNotAccessMemory,
  /* mips_mulv_h */ DoesNotAccessMemory,
  /* mips_mulv_w */ DoesNotAccessMemory,
  /* mips_nloc_b */ DoesNotAccessMemory,
  /* mips_nloc_d */ DoesNotAccessMemory,
  /* mips_nloc_h */ DoesNotAccessMemory,
  /* mips_nloc_w */ DoesNotAccessMemory,
  /* mips_nlzc_b */ DoesNotAccessMemory,
  /* mips_nlzc_d */ DoesNotAccessMemory,
  /* mips_nlzc_h */ DoesNotAccessMemory,
  /* mips_nlzc_w */ DoesNotAccessMemory,
  /* mips_nor_v */ DoesNotAccessMemory,
  /* mips_nori_b */ DoesNotAccessMemory,
  /* mips_or_v */ DoesNotAccessMemory,
  /* mips_ori_b */ DoesNotAccessMemory,
  /* mips_packrl_ph */ DoesNotAccessMemory,
  /* mips_pckev_b */ DoesNotAccessMemory,
  /* mips_pckev_d */ DoesNotAccessMemory,
  /* mips_pckev_h */ DoesNotAccessMemory,
  /* mips_pckev_w */ DoesNotAccessMemory,
  /* mips_pckod_b */ DoesNotAccessMemory,
  /* mips_pckod_d */ DoesNotAccessMemory,
  /* mips_pckod_h */ DoesNotAccessMemory,
  /* mips_pckod_w */ DoesNotAccessMemory,
  /* mips_pcnt_b */ DoesNotAccessMemory,
  /* mips_pcnt_d */ DoesNotAccessMemory,
  /* mips_pcnt_h */ DoesNotAccessMemory,
  /* mips_pcnt_w */ DoesNotAccessMemory,
  /* mips_pick_ph */ OnlyReadsMemory,
  /* mips_pick_qb */ OnlyReadsMemory,
  /* mips_preceq_w_phl */ DoesNotAccessMemory,
  /* mips_preceq_w_phr */ DoesNotAccessMemory,
  /* mips_precequ_ph_qbl */ DoesNotAccessMemory,
  /* mips_precequ_ph_qbla */ DoesNotAccessMemory,
  /* mips_precequ_ph_qbr */ DoesNotAccessMemory,
  /* mips_precequ_ph_qbra */ DoesNotAccessMemory,
  /* mips_preceu_ph_qbl */ DoesNotAccessMemory,
  /* mips_preceu_ph_qbla */ DoesNotAccessMemory,
  /* mips_preceu_ph_qbr */ DoesNotAccessMemory,
  /* mips_preceu_ph_qbra */ DoesNotAccessMemory,
  /* mips_precr_qb_ph */ UnknownModRefBehavior,
  /* mips_precr_sra_ph_w */ DoesNotAccessMemory,
  /* mips_precr_sra_r_ph_w */ DoesNotAccessMemory,
  /* mips_precrq_ph_w */ DoesNotAccessMemory,
  /* mips_precrq_qb_ph */ DoesNotAccessMemory,
  /* mips_precrq_rs_ph_w */ UnknownModRefBehavior,
  /* mips_precrqu_s_qb_ph */ UnknownModRefBehavior,
  /* mips_prepend */ DoesNotAccessMemory,
  /* mips_raddu_w_qb */ DoesNotAccessMemory,
  /* mips_rddsp */ OnlyReadsMemory,
  /* mips_repl_ph */ DoesNotAccessMemory,
  /* mips_repl_qb */ DoesNotAccessMemory,
  /* mips_sat_s_b */ DoesNotAccessMemory,
  /* mips_sat_s_d */ DoesNotAccessMemory,
  /* mips_sat_s_h */ DoesNotAccessMemory,
  /* mips_sat_s_w */ DoesNotAccessMemory,
  /* mips_sat_u_b */ DoesNotAccessMemory,
  /* mips_sat_u_d */ DoesNotAccessMemory,
  /* mips_sat_u_h */ DoesNotAccessMemory,
  /* mips_sat_u_w */ DoesNotAccessMemory,
  /* mips_shf_b */ DoesNotAccessMemory,
  /* mips_shf_h */ DoesNotAccessMemory,
  /* mips_shf_w */ DoesNotAccessMemory,
  /* mips_shilo */ DoesNotAccessMemory,
  /* mips_shll_ph */ UnknownModRefBehavior,
  /* mips_shll_qb */ UnknownModRefBehavior,
  /* mips_shll_s_ph */ UnknownModRefBehavior,
  /* mips_shll_s_w */ UnknownModRefBehavior,
  /* mips_shra_ph */ DoesNotAccessMemory,
  /* mips_shra_qb */ DoesNotAccessMemory,
  /* mips_shra_r_ph */ DoesNotAccessMemory,
  /* mips_shra_r_qb */ DoesNotAccessMemory,
  /* mips_shra_r_w */ DoesNotAccessMemory,
  /* mips_shrl_ph */ DoesNotAccessMemory,
  /* mips_shrl_qb */ DoesNotAccessMemory,
  /* mips_sld_b */ DoesNotAccessMemory,
  /* mips_sld_d */ DoesNotAccessMemory,
  /* mips_sld_h */ DoesNotAccessMemory,
  /* mips_sld_w */ DoesNotAccessMemory,
  /* mips_sldi_b */ DoesNotAccessMemory,
  /* mips_sldi_d */ DoesNotAccessMemory,
  /* mips_sldi_h */ DoesNotAccessMemory,
  /* mips_sldi_w */ DoesNotAccessMemory,
  /* mips_sll_b */ DoesNotAccessMemory,
  /* mips_sll_d */ DoesNotAccessMemory,
  /* mips_sll_h */ DoesNotAccessMemory,
  /* mips_sll_w */ DoesNotAccessMemory,
  /* mips_slli_b */ DoesNotAccessMemory,
  /* mips_slli_d */ DoesNotAccessMemory,
  /* mips_slli_h */ DoesNotAccessMemory,
  /* mips_slli_w */ DoesNotAccessMemory,
  /* mips_splat_b */ DoesNotAccessMemory,
  /* mips_splat_d */ DoesNotAccessMemory,
  /* mips_splat_h */ DoesNotAccessMemory,
  /* mips_splat_w */ DoesNotAccessMemory,
  /* mips_splati_b */ DoesNotAccessMemory,
  /* mips_splati_d */ DoesNotAccessMemory,
  /* mips_splati_h */ DoesNotAccessMemory,
  /* mips_splati_w */ DoesNotAccessMemory,
  /* mips_sra_b */ DoesNotAccessMemory,
  /* mips_sra_d */ DoesNotAccessMemory,
  /* mips_sra_h */ DoesNotAccessMemory,
  /* mips_sra_w */ DoesNotAccessMemory,
  /* mips_srai_b */ DoesNotAccessMemory,
  /* mips_srai_d */ DoesNotAccessMemory,
  /* mips_srai_h */ DoesNotAccessMemory,
  /* mips_srai_w */ DoesNotAccessMemory,
  /* mips_srar_b */ DoesNotAccessMemory,
  /* mips_srar_d */ DoesNotAccessMemory,
  /* mips_srar_h */ DoesNotAccessMemory,
  /* mips_srar_w */ DoesNotAccessMemory,
  /* mips_srari_b */ DoesNotAccessMemory,
  /* mips_srari_d */ DoesNotAccessMemory,
  /* mips_srari_h */ DoesNotAccessMemory,
  /* mips_srari_w */ DoesNotAccessMemory,
  /* mips_srl_b */ DoesNotAccessMemory,
  /* mips_srl_d */ DoesNotAccessMemory,
  /* mips_srl_h */ DoesNotAccessMemory,
  /* mips_srl_w */ DoesNotAccessMemory,
  /* mips_srli_b */ DoesNotAccessMemory,
  /* mips_srli_d */ DoesNotAccessMemory,
  /* mips_srli_h */ DoesNotAccessMemory,
  /* mips_srli_w */ DoesNotAccessMemory,
  /* mips_srlr_b */ DoesNotAccessMemory,
  /* mips_srlr_d */ DoesNotAccessMemory,
  /* mips_srlr_h */ DoesNotAccessMemory,
  /* mips_srlr_w */ DoesNotAccessMemory,
  /* mips_srlri_b */ DoesNotAccessMemory,
  /* mips_srlri_d */ DoesNotAccessMemory,
  /* mips_srlri_h */ DoesNotAccessMemory,
  /* mips_srlri_w */ DoesNotAccessMemory,
  /* mips_st_b */ OnlyAccessesArgumentPointees,
  /* mips_st_d */ OnlyAccessesArgumentPointees,
  /* mips_st_h */ OnlyAccessesArgumentPointees,
  /* mips_st_w */ OnlyAccessesArgumentPointees,
  /* mips_subq_ph */ DoesNotAccessMemory,
  /* mips_subq_s_ph */ DoesNotAccessMemory,
  /* mips_subq_s_w */ UnknownModRefBehavior,
  /* mips_subqh_ph */ DoesNotAccessMemory,
  /* mips_subqh_r_ph */ DoesNotAccessMemory,
  /* mips_subqh_r_w */ DoesNotAccessMemory,
  /* mips_subqh_w */ DoesNotAccessMemory,
  /* mips_subs_s_b */ DoesNotAccessMemory,
  /* mips_subs_s_d */ DoesNotAccessMemory,
  /* mips_subs_s_h */ DoesNotAccessMemory,
  /* mips_subs_s_w */ DoesNotAccessMemory,
  /* mips_subs_u_b */ DoesNotAccessMemory,
  /* mips_subs_u_d */ DoesNotAccessMemory,
  /* mips_subs_u_h */ DoesNotAccessMemory,
  /* mips_subs_u_w */ DoesNotAccessMemory,
  /* mips_subsus_u_b */ DoesNotAccessMemory,
  /* mips_subsus_u_d */ DoesNotAccessMemory,
  /* mips_subsus_u_h */ DoesNotAccessMemory,
  /* mips_subsus_u_w */ DoesNotAccessMemory,
  /* mips_subsuu_s_b */ DoesNotAccessMemory,
  /* mips_subsuu_s_d */ DoesNotAccessMemory,
  /* mips_subsuu_s_h */ DoesNotAccessMemory,
  /* mips_subsuu_s_w */ DoesNotAccessMemory,
  /* mips_subu_ph */ UnknownModRefBehavior,
  /* mips_subu_qb */ DoesNotAccessMemory,
  /* mips_subu_s_ph */ UnknownModRefBehavior,
  /* mips_subu_s_qb */ DoesNotAccessMemory,
  /* mips_subuh_qb */ DoesNotAccessMemory,
  /* mips_subuh_r_qb */ DoesNotAccessMemory,
  /* mips_subv_b */ DoesNotAccessMemory,
  /* mips_subv_d */ DoesNotAccessMemory,
  /* mips_subv_h */ DoesNotAccessMemory,
  /* mips_subv_w */ DoesNotAccessMemory,
  /* mips_subvi_b */ DoesNotAccessMemory,
  /* mips_subvi_d */ DoesNotAccessMemory,
  /* mips_subvi_h */ DoesNotAccessMemory,
  /* mips_subvi_w */ DoesNotAccessMemory,
  /* mips_vshf_b */ DoesNotAccessMemory,
  /* mips_vshf_d */ DoesNotAccessMemory,
  /* mips_vshf_h */ DoesNotAccessMemory,
  /* mips_vshf_w */ DoesNotAccessMemory,
  /* mips_wrdsp */ UnknownModRefBehavior,
  /* mips_xor_v */ DoesNotAccessMemory,
  /* mips_xori_b */ DoesNotAccessMemory,
  /* nearbyint */ DoesNotAccessMemory,
  /* nvvm_abs_i */ DoesNotAccessMemory,
  /* nvvm_abs_ll */ DoesNotAccessMemory,
  /* nvvm_add_rm_d */ DoesNotAccessMemory,
  /* nvvm_add_rm_f */ DoesNotAccessMemory,
  /* nvvm_add_rm_ftz_f */ DoesNotAccessMemory,
  /* nvvm_add_rn_d */ DoesNotAccessMemory,
  /* nvvm_add_rn_f */ DoesNotAccessMemory,
  /* nvvm_add_rn_ftz_f */ DoesNotAccessMemory,
  /* nvvm_add_rp_d */ DoesNotAccessMemory,
  /* nvvm_add_rp_f */ DoesNotAccessMemory,
  /* nvvm_add_rp_ftz_f */ DoesNotAccessMemory,
  /* nvvm_add_rz_d */ DoesNotAccessMemory,
  /* nvvm_add_rz_f */ DoesNotAccessMemory,
  /* nvvm_add_rz_ftz_f */ DoesNotAccessMemory,
  /* nvvm_atomic_load_add_f32 */ OnlyAccessesArgumentPointees,
  /* nvvm_atomic_load_dec_32 */ OnlyAccessesArgumentPointees,
  /* nvvm_atomic_load_inc_32 */ OnlyAccessesArgumentPointees,
  /* nvvm_barrier0 */ UnknownModRefBehavior,
  /* nvvm_barrier0_and */ UnknownModRefBehavior,
  /* nvvm_barrier0_or */ UnknownModRefBehavior,
  /* nvvm_barrier0_popc */ UnknownModRefBehavior,
  /* nvvm_bitcast_d2ll */ DoesNotAccessMemory,
  /* nvvm_bitcast_f2i */ DoesNotAccessMemory,
  /* nvvm_bitcast_i2f */ DoesNotAccessMemory,
  /* nvvm_bitcast_ll2d */ DoesNotAccessMemory,
  /* nvvm_brev32 */ DoesNotAccessMemory,
  /* nvvm_brev64 */ DoesNotAccessMemory,
  /* nvvm_ceil_d */ DoesNotAccessMemory,
  /* nvvm_ceil_f */ DoesNotAccessMemory,
  /* nvvm_ceil_ftz_f */ DoesNotAccessMemory,
  /* nvvm_clz_i */ DoesNotAccessMemory,
  /* nvvm_clz_ll */ DoesNotAccessMemory,
  /* nvvm_compiler_error */ UnknownModRefBehavior,
  /* nvvm_compiler_warn */ UnknownModRefBehavior,
  /* nvvm_cos_approx_f */ DoesNotAccessMemory,
  /* nvvm_cos_approx_ftz_f */ DoesNotAccessMemory,
  /* nvvm_d2f_rm */ DoesNotAccessMemory,
  /* nvvm_d2f_rm_ftz */ DoesNotAccessMemory,
  /* nvvm_d2f_rn */ DoesNotAccessMemory,
  /* nvvm_d2f_rn_ftz */ DoesNotAccessMemory,
  /* nvvm_d2f_rp */ DoesNotAccessMemory,
  /* nvvm_d2f_rp_ftz */ DoesNotAccessMemory,
  /* nvvm_d2f_rz */ DoesNotAccessMemory,
  /* nvvm_d2f_rz_ftz */ DoesNotAccessMemory,
  /* nvvm_d2i_hi */ DoesNotAccessMemory,
  /* nvvm_d2i_lo */ DoesNotAccessMemory,
  /* nvvm_d2i_rm */ DoesNotAccessMemory,
  /* nvvm_d2i_rn */ DoesNotAccessMemory,
  /* nvvm_d2i_rp */ DoesNotAccessMemory,
  /* nvvm_d2i_rz */ DoesNotAccessMemory,
  /* nvvm_d2ll_rm */ DoesNotAccessMemory,
  /* nvvm_d2ll_rn */ DoesNotAccessMemory,
  /* nvvm_d2ll_rp */ DoesNotAccessMemory,
  /* nvvm_d2ll_rz */ DoesNotAccessMemory,
  /* nvvm_d2ui_rm */ DoesNotAccessMemory,
  /* nvvm_d2ui_rn */ DoesNotAccessMemory,
  /* nvvm_d2ui_rp */ DoesNotAccessMemory,
  /* nvvm_d2ui_rz */ DoesNotAccessMemory,
  /* nvvm_d2ull_rm */ DoesNotAccessMemory,
  /* nvvm_d2ull_rn */ DoesNotAccessMemory,
  /* nvvm_d2ull_rp */ DoesNotAccessMemory,
  /* nvvm_d2ull_rz */ DoesNotAccessMemory,
  /* nvvm_div_approx_f */ DoesNotAccessMemory,
  /* nvvm_div_approx_ftz_f */ DoesNotAccessMemory,
  /* nvvm_div_rm_d */ DoesNotAccessMemory,
  /* nvvm_div_rm_f */ DoesNotAccessMemory,
  /* nvvm_div_rm_ftz_f */ DoesNotAccessMemory,
  /* nvvm_div_rn_d */ DoesNotAccessMemory,
  /* nvvm_div_rn_f */ DoesNotAccessMemory,
  /* nvvm_div_rn_ftz_f */ DoesNotAccessMemory,
  /* nvvm_div_rp_d */ DoesNotAccessMemory,
  /* nvvm_div_rp_f */ DoesNotAccessMemory,
  /* nvvm_div_rp_ftz_f */ DoesNotAccessMemory,
  /* nvvm_div_rz_d */ DoesNotAccessMemory,
  /* nvvm_div_rz_f */ DoesNotAccessMemory,
  /* nvvm_div_rz_ftz_f */ DoesNotAccessMemory,
  /* nvvm_ex2_approx_d */ DoesNotAccessMemory,
  /* nvvm_ex2_approx_f */ DoesNotAccessMemory,
  /* nvvm_ex2_approx_ftz_f */ DoesNotAccessMemory,
  /* nvvm_f2h_rn */ DoesNotAccessMemory,
  /* nvvm_f2h_rn_ftz */ DoesNotAccessMemory,
  /* nvvm_f2i_rm */ DoesNotAccessMemory,
  /* nvvm_f2i_rm_ftz */ DoesNotAccessMemory,
  /* nvvm_f2i_rn */ DoesNotAccessMemory,
  /* nvvm_f2i_rn_ftz */ DoesNotAccessMemory,
  /* nvvm_f2i_rp */ DoesNotAccessMemory,
  /* nvvm_f2i_rp_ftz */ DoesNotAccessMemory,
  /* nvvm_f2i_rz */ DoesNotAccessMemory,
  /* nvvm_f2i_rz_ftz */ DoesNotAccessMemory,
  /* nvvm_f2ll_rm */ DoesNotAccessMemory,
  /* nvvm_f2ll_rm_ftz */ DoesNotAccessMemory,
  /* nvvm_f2ll_rn */ DoesNotAccessMemory,
  /* nvvm_f2ll_rn_ftz */ DoesNotAccessMemory,
  /* nvvm_f2ll_rp */ DoesNotAccessMemory,
  /* nvvm_f2ll_rp_ftz */ DoesNotAccessMemory,
  /* nvvm_f2ll_rz */ DoesNotAccessMemory,
  /* nvvm_f2ll_rz_ftz */ DoesNotAccessMemory,
  /* nvvm_f2ui_rm */ DoesNotAccessMemory,
  /* nvvm_f2ui_rm_ftz */ DoesNotAccessMemory,
  /* nvvm_f2ui_rn */ DoesNotAccessMemory,
  /* nvvm_f2ui_rn_ftz */ DoesNotAccessMemory,
  /* nvvm_f2ui_rp */ DoesNotAccessMemory,
  /* nvvm_f2ui_rp_ftz */ DoesNotAccessMemory,
  /* nvvm_f2ui_rz */ DoesNotAccessMemory,
  /* nvvm_f2ui_rz_ftz */ DoesNotAccessMemory,
  /* nvvm_f2ull_rm */ DoesNotAccessMemory,
  /* nvvm_f2ull_rm_ftz */ DoesNotAccessMemory,
  /* nvvm_f2ull_rn */ DoesNotAccessMemory,
  /* nvvm_f2ull_rn_ftz */ DoesNotAccessMemory,
  /* nvvm_f2ull_rp */ DoesNotAccessMemory,
  /* nvvm_f2ull_rp_ftz */ DoesNotAccessMemory,
  /* nvvm_f2ull_rz */ DoesNotAccessMemory,
  /* nvvm_f2ull_rz_ftz */ DoesNotAccessMemory,
  /* nvvm_fabs_d */ DoesNotAccessMemory,
  /* nvvm_fabs_f */ DoesNotAccessMemory,
  /* nvvm_fabs_ftz_f */ DoesNotAccessMemory,
  /* nvvm_floor_d */ DoesNotAccessMemory,
  /* nvvm_floor_f */ DoesNotAccessMemory,
  /* nvvm_floor_ftz_f */ DoesNotAccessMemory,
  /* nvvm_fma_rm_d */ DoesNotAccessMemory,
  /* nvvm_fma_rm_f */ DoesNotAccessMemory,
  /* nvvm_fma_rm_ftz_f */ DoesNotAccessMemory,
  /* nvvm_fma_rn_d */ DoesNotAccessMemory,
  /* nvvm_fma_rn_f */ DoesNotAccessMemory,
  /* nvvm_fma_rn_ftz_f */ DoesNotAccessMemory,
  /* nvvm_fma_rp_d */ DoesNotAccessMemory,
  /* nvvm_fma_rp_f */ DoesNotAccessMemory,
  /* nvvm_fma_rp_ftz_f */ DoesNotAccessMemory,
  /* nvvm_fma_rz_d */ DoesNotAccessMemory,
  /* nvvm_fma_rz_f */ DoesNotAccessMemory,
  /* nvvm_fma_rz_ftz_f */ DoesNotAccessMemory,
  /* nvvm_fmax_d */ DoesNotAccessMemory,
  /* nvvm_fmax_f */ DoesNotAccessMemory,
  /* nvvm_fmax_ftz_f */ DoesNotAccessMemory,
  /* nvvm_fmin_d */ DoesNotAccessMemory,
  /* nvvm_fmin_f */ DoesNotAccessMemory,
  /* nvvm_fmin_ftz_f */ DoesNotAccessMemory,
  /* nvvm_h2f */ DoesNotAccessMemory,
  /* nvvm_i2d_rm */ DoesNotAccessMemory,
  /* nvvm_i2d_rn */ DoesNotAccessMemory,
  /* nvvm_i2d_rp */ DoesNotAccessMemory,
  /* nvvm_i2d_rz */ DoesNotAccessMemory,
  /* nvvm_i2f_rm */ DoesNotAccessMemory,
  /* nvvm_i2f_rn */ DoesNotAccessMemory,
  /* nvvm_i2f_rp */ DoesNotAccessMemory,
  /* nvvm_i2f_rz */ DoesNotAccessMemory,
  /* nvvm_isspacep_const */ DoesNotAccessMemory,
  /* nvvm_isspacep_global */ DoesNotAccessMemory,
  /* nvvm_isspacep_local */ DoesNotAccessMemory,
  /* nvvm_isspacep_shared */ DoesNotAccessMemory,
  /* nvvm_istypep_sampler */ DoesNotAccessMemory,
  /* nvvm_istypep_surface */ DoesNotAccessMemory,
  /* nvvm_istypep_texture */ DoesNotAccessMemory,
  /* nvvm_ldg_global_f */ OnlyReadsMemory,
  /* nvvm_ldg_global_i */ OnlyReadsMemory,
  /* nvvm_ldg_global_p */ OnlyReadsMemory,
  /* nvvm_ldu_global_f */ OnlyReadsMemory,
  /* nvvm_ldu_global_i */ OnlyReadsMemory,
  /* nvvm_ldu_global_p */ OnlyReadsMemory,
  /* nvvm_lg2_approx_d */ DoesNotAccessMemory,
  /* nvvm_lg2_approx_f */ DoesNotAccessMemory,
  /* nvvm_lg2_approx_ftz_f */ DoesNotAccessMemory,
  /* nvvm_ll2d_rm */ DoesNotAccessMemory,
  /* nvvm_ll2d_rn */ DoesNotAccessMemory,
  /* nvvm_ll2d_rp */ DoesNotAccessMemory,
  /* nvvm_ll2d_rz */ DoesNotAccessMemory,
  /* nvvm_ll2f_rm */ DoesNotAccessMemory,
  /* nvvm_ll2f_rn */ DoesNotAccessMemory,
  /* nvvm_ll2f_rp */ DoesNotAccessMemory,
  /* nvvm_ll2f_rz */ DoesNotAccessMemory,
  /* nvvm_lohi_i2d */ DoesNotAccessMemory,
  /* nvvm_max_i */ DoesNotAccessMemory,
  /* nvvm_max_ll */ DoesNotAccessMemory,
  /* nvvm_max_ui */ DoesNotAccessMemory,
  /* nvvm_max_ull */ DoesNotAccessMemory,
  /* nvvm_membar_cta */ UnknownModRefBehavior,
  /* nvvm_membar_gl */ UnknownModRefBehavior,
  /* nvvm_membar_sys */ UnknownModRefBehavior,
  /* nvvm_min_i */ DoesNotAccessMemory,
  /* nvvm_min_ll */ DoesNotAccessMemory,
  /* nvvm_min_ui */ DoesNotAccessMemory,
  /* nvvm_min_ull */ DoesNotAccessMemory,
  /* nvvm_move_double */ DoesNotAccessMemory,
  /* nvvm_move_float */ DoesNotAccessMemory,
  /* nvvm_move_i16 */ DoesNotAccessMemory,
  /* nvvm_move_i32 */ DoesNotAccessMemory,
  /* nvvm_move_i64 */ DoesNotAccessMemory,
  /* nvvm_move_ptr */ DoesNotAccessMemory,
  /* nvvm_mul24_i */ DoesNotAccessMemory,
  /* nvvm_mul24_ui */ DoesNotAccessMemory,
  /* nvvm_mul_rm_d */ DoesNotAccessMemory,
  /* nvvm_mul_rm_f */ DoesNotAccessMemory,
  /* nvvm_mul_rm_ftz_f */ DoesNotAccessMemory,
  /* nvvm_mul_rn_d */ DoesNotAccessMemory,
  /* nvvm_mul_rn_f */ DoesNotAccessMemory,
  /* nvvm_mul_rn_ftz_f */ DoesNotAccessMemory,
  /* nvvm_mul_rp_d */ DoesNotAccessMemory,
  /* nvvm_mul_rp_f */ DoesNotAccessMemory,
  /* nvvm_mul_rp_ftz_f */ DoesNotAccessMemory,
  /* nvvm_mul_rz_d */ DoesNotAccessMemory,
  /* nvvm_mul_rz_f */ DoesNotAccessMemory,
  /* nvvm_mul_rz_ftz_f */ DoesNotAccessMemory,
  /* nvvm_mulhi_i */ DoesNotAccessMemory,
  /* nvvm_mulhi_ll */ DoesNotAccessMemory,
  /* nvvm_mulhi_ui */ DoesNotAccessMemory,
  /* nvvm_mulhi_ull */ DoesNotAccessMemory,
  /* nvvm_popc_i */ DoesNotAccessMemory,
  /* nvvm_popc_ll */ DoesNotAccessMemory,
  /* nvvm_prmt */ DoesNotAccessMemory,
  /* nvvm_ptr_constant_to_gen */ DoesNotAccessMemory,
  /* nvvm_ptr_gen_to_constant */ DoesNotAccessMemory,
  /* nvvm_ptr_gen_to_global */ DoesNotAccessMemory,
  /* nvvm_ptr_gen_to_local */ DoesNotAccessMemory,
  /* nvvm_ptr_gen_to_param */ DoesNotAccessMemory,
  /* nvvm_ptr_gen_to_shared */ DoesNotAccessMemory,
  /* nvvm_ptr_global_to_gen */ DoesNotAccessMemory,
  /* nvvm_ptr_local_to_gen */ DoesNotAccessMemory,
  /* nvvm_ptr_shared_to_gen */ DoesNotAccessMemory,
  /* nvvm_rcp_approx_ftz_d */ DoesNotAccessMemory,
  /* nvvm_rcp_rm_d */ DoesNotAccessMemory,
  /* nvvm_rcp_rm_f */ DoesNotAccessMemory,
  /* nvvm_rcp_rm_ftz_f */ DoesNotAccessMemory,
  /* nvvm_rcp_rn_d */ DoesNotAccessMemory,
  /* nvvm_rcp_rn_f */ DoesNotAccessMemory,
  /* nvvm_rcp_rn_ftz_f */ DoesNotAccessMemory,
  /* nvvm_rcp_rp_d */ DoesNotAccessMemory,
  /* nvvm_rcp_rp_f */ DoesNotAccessMemory,
  /* nvvm_rcp_rp_ftz_f */ DoesNotAccessMemory,
  /* nvvm_rcp_rz_d */ DoesNotAccessMemory,
  /* nvvm_rcp_rz_f */ DoesNotAccessMemory,
  /* nvvm_rcp_rz_ftz_f */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_ctaid_x */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_ctaid_y */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_ctaid_z */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg0 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg1 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg10 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg11 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg12 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg13 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg14 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg15 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg16 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg17 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg18 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg19 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg2 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg20 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg21 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg22 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg23 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg24 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg25 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg26 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg27 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg28 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg29 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg3 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg30 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg31 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg4 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg5 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg6 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg7 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg8 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_envreg9 */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_nctaid_x */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_nctaid_y */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_nctaid_z */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_ntid_x */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_ntid_y */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_ntid_z */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_tid_x */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_tid_y */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_tid_z */ DoesNotAccessMemory,
  /* nvvm_read_ptx_sreg_warpsize */ DoesNotAccessMemory,
  /* nvvm_reflect */ DoesNotAccessMemory,
  /* nvvm_rotate_b32 */ DoesNotAccessMemory,
  /* nvvm_rotate_b64 */ DoesNotAccessMemory,
  /* nvvm_rotate_right_b64 */ DoesNotAccessMemory,
  /* nvvm_round_d */ DoesNotAccessMemory,
  /* nvvm_round_f */ DoesNotAccessMemory,
  /* nvvm_round_ftz_f */ DoesNotAccessMemory,
  /* nvvm_rsqrt_approx_d */ DoesNotAccessMemory,
  /* nvvm_rsqrt_approx_f */ DoesNotAccessMemory,
  /* nvvm_rsqrt_approx_ftz_f */ DoesNotAccessMemory,
  /* nvvm_sad_i */ DoesNotAccessMemory,
  /* nvvm_sad_ui */ DoesNotAccessMemory,
  /* nvvm_saturate_d */ DoesNotAccessMemory,
  /* nvvm_saturate_f */ DoesNotAccessMemory,
  /* nvvm_saturate_ftz_f */ DoesNotAccessMemory,
  /* nvvm_sin_approx_f */ DoesNotAccessMemory,
  /* nvvm_sin_approx_ftz_f */ DoesNotAccessMemory,
  /* nvvm_sqrt_approx_f */ DoesNotAccessMemory,
  /* nvvm_sqrt_approx_ftz_f */ DoesNotAccessMemory,
  /* nvvm_sqrt_f */ DoesNotAccessMemory,
  /* nvvm_sqrt_rm_d */ DoesNotAccessMemory,
  /* nvvm_sqrt_rm_f */ DoesNotAccessMemory,
  /* nvvm_sqrt_rm_ftz_f */ DoesNotAccessMemory,
  /* nvvm_sqrt_rn_d */ DoesNotAccessMemory,
  /* nvvm_sqrt_rn_f */ DoesNotAccessMemory,
  /* nvvm_sqrt_rn_ftz_f */ DoesNotAccessMemory,
  /* nvvm_sqrt_rp_d */ DoesNotAccessMemory,
  /* nvvm_sqrt_rp_f */ DoesNotAccessMemory,
  /* nvvm_sqrt_rp_ftz_f */ DoesNotAccessMemory,
  /* nvvm_sqrt_rz_d */ DoesNotAccessMemory,
  /* nvvm_sqrt_rz_f */ DoesNotAccessMemory,
  /* nvvm_sqrt_rz_ftz_f */ DoesNotAccessMemory,
  /* nvvm_suld_1d_array_i16_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_i16_trap */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_i16_zero */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_i32_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_i32_trap */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_i32_zero */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_i64_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_i64_trap */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_i64_zero */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_i8_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_i8_trap */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_i8_zero */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_v2i16_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_v2i16_trap */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_v2i16_zero */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_v2i32_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_v2i32_trap */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_v2i32_zero */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_v2i64_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_v2i64_trap */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_v2i64_zero */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_v2i8_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_v2i8_trap */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_v2i8_zero */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_v4i16_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_v4i16_trap */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_v4i16_zero */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_v4i32_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_v4i32_trap */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_v4i32_zero */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_v4i8_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_v4i8_trap */ UnknownModRefBehavior,
  /* nvvm_suld_1d_array_v4i8_zero */ UnknownModRefBehavior,
  /* nvvm_suld_1d_i16_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_1d_i16_trap */ UnknownModRefBehavior,
  /* nvvm_suld_1d_i16_zero */ UnknownModRefBehavior,
  /* nvvm_suld_1d_i32_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_1d_i32_trap */ UnknownModRefBehavior,
  /* nvvm_suld_1d_i32_zero */ UnknownModRefBehavior,
  /* nvvm_suld_1d_i64_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_1d_i64_trap */ UnknownModRefBehavior,
  /* nvvm_suld_1d_i64_zero */ UnknownModRefBehavior,
  /* nvvm_suld_1d_i8_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_1d_i8_trap */ UnknownModRefBehavior,
  /* nvvm_suld_1d_i8_zero */ UnknownModRefBehavior,
  /* nvvm_suld_1d_v2i16_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_1d_v2i16_trap */ UnknownModRefBehavior,
  /* nvvm_suld_1d_v2i16_zero */ UnknownModRefBehavior,
  /* nvvm_suld_1d_v2i32_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_1d_v2i32_trap */ UnknownModRefBehavior,
  /* nvvm_suld_1d_v2i32_zero */ UnknownModRefBehavior,
  /* nvvm_suld_1d_v2i64_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_1d_v2i64_trap */ UnknownModRefBehavior,
  /* nvvm_suld_1d_v2i64_zero */ UnknownModRefBehavior,
  /* nvvm_suld_1d_v2i8_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_1d_v2i8_trap */ UnknownModRefBehavior,
  /* nvvm_suld_1d_v2i8_zero */ UnknownModRefBehavior,
  /* nvvm_suld_1d_v4i16_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_1d_v4i16_trap */ UnknownModRefBehavior,
  /* nvvm_suld_1d_v4i16_zero */ UnknownModRefBehavior,
  /* nvvm_suld_1d_v4i32_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_1d_v4i32_trap */ UnknownModRefBehavior,
  /* nvvm_suld_1d_v4i32_zero */ UnknownModRefBehavior,
  /* nvvm_suld_1d_v4i8_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_1d_v4i8_trap */ UnknownModRefBehavior,
  /* nvvm_suld_1d_v4i8_zero */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_i16_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_i16_trap */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_i16_zero */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_i32_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_i32_trap */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_i32_zero */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_i64_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_i64_trap */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_i64_zero */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_i8_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_i8_trap */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_i8_zero */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_v2i16_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_v2i16_trap */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_v2i16_zero */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_v2i32_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_v2i32_trap */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_v2i32_zero */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_v2i64_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_v2i64_trap */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_v2i64_zero */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_v2i8_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_v2i8_trap */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_v2i8_zero */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_v4i16_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_v4i16_trap */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_v4i16_zero */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_v4i32_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_v4i32_trap */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_v4i32_zero */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_v4i8_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_v4i8_trap */ UnknownModRefBehavior,
  /* nvvm_suld_2d_array_v4i8_zero */ UnknownModRefBehavior,
  /* nvvm_suld_2d_i16_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_2d_i16_trap */ UnknownModRefBehavior,
  /* nvvm_suld_2d_i16_zero */ UnknownModRefBehavior,
  /* nvvm_suld_2d_i32_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_2d_i32_trap */ UnknownModRefBehavior,
  /* nvvm_suld_2d_i32_zero */ UnknownModRefBehavior,
  /* nvvm_suld_2d_i64_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_2d_i64_trap */ UnknownModRefBehavior,
  /* nvvm_suld_2d_i64_zero */ UnknownModRefBehavior,
  /* nvvm_suld_2d_i8_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_2d_i8_trap */ UnknownModRefBehavior,
  /* nvvm_suld_2d_i8_zero */ UnknownModRefBehavior,
  /* nvvm_suld_2d_v2i16_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_2d_v2i16_trap */ UnknownModRefBehavior,
  /* nvvm_suld_2d_v2i16_zero */ UnknownModRefBehavior,
  /* nvvm_suld_2d_v2i32_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_2d_v2i32_trap */ UnknownModRefBehavior,
  /* nvvm_suld_2d_v2i32_zero */ UnknownModRefBehavior,
  /* nvvm_suld_2d_v2i64_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_2d_v2i64_trap */ UnknownModRefBehavior,
  /* nvvm_suld_2d_v2i64_zero */ UnknownModRefBehavior,
  /* nvvm_suld_2d_v2i8_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_2d_v2i8_trap */ UnknownModRefBehavior,
  /* nvvm_suld_2d_v2i8_zero */ UnknownModRefBehavior,
  /* nvvm_suld_2d_v4i16_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_2d_v4i16_trap */ UnknownModRefBehavior,
  /* nvvm_suld_2d_v4i16_zero */ UnknownModRefBehavior,
  /* nvvm_suld_2d_v4i32_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_2d_v4i32_trap */ UnknownModRefBehavior,
  /* nvvm_suld_2d_v4i32_zero */ UnknownModRefBehavior,
  /* nvvm_suld_2d_v4i8_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_2d_v4i8_trap */ UnknownModRefBehavior,
  /* nvvm_suld_2d_v4i8_zero */ UnknownModRefBehavior,
  /* nvvm_suld_3d_i16_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_3d_i16_trap */ UnknownModRefBehavior,
  /* nvvm_suld_3d_i16_zero */ UnknownModRefBehavior,
  /* nvvm_suld_3d_i32_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_3d_i32_trap */ UnknownModRefBehavior,
  /* nvvm_suld_3d_i32_zero */ UnknownModRefBehavior,
  /* nvvm_suld_3d_i64_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_3d_i64_trap */ UnknownModRefBehavior,
  /* nvvm_suld_3d_i64_zero */ UnknownModRefBehavior,
  /* nvvm_suld_3d_i8_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_3d_i8_trap */ UnknownModRefBehavior,
  /* nvvm_suld_3d_i8_zero */ UnknownModRefBehavior,
  /* nvvm_suld_3d_v2i16_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_3d_v2i16_trap */ UnknownModRefBehavior,
  /* nvvm_suld_3d_v2i16_zero */ UnknownModRefBehavior,
  /* nvvm_suld_3d_v2i32_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_3d_v2i32_trap */ UnknownModRefBehavior,
  /* nvvm_suld_3d_v2i32_zero */ UnknownModRefBehavior,
  /* nvvm_suld_3d_v2i64_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_3d_v2i64_trap */ UnknownModRefBehavior,
  /* nvvm_suld_3d_v2i64_zero */ UnknownModRefBehavior,
  /* nvvm_suld_3d_v2i8_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_3d_v2i8_trap */ UnknownModRefBehavior,
  /* nvvm_suld_3d_v2i8_zero */ UnknownModRefBehavior,
  /* nvvm_suld_3d_v4i16_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_3d_v4i16_trap */ UnknownModRefBehavior,
  /* nvvm_suld_3d_v4i16_zero */ UnknownModRefBehavior,
  /* nvvm_suld_3d_v4i32_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_3d_v4i32_trap */ UnknownModRefBehavior,
  /* nvvm_suld_3d_v4i32_zero */ UnknownModRefBehavior,
  /* nvvm_suld_3d_v4i8_clamp */ UnknownModRefBehavior,
  /* nvvm_suld_3d_v4i8_trap */ UnknownModRefBehavior,
  /* nvvm_suld_3d_v4i8_zero */ UnknownModRefBehavior,
  /* nvvm_suq_array_size */ DoesNotAccessMemory,
  /* nvvm_suq_channel_data_type */ DoesNotAccessMemory,
  /* nvvm_suq_channel_order */ DoesNotAccessMemory,
  /* nvvm_suq_depth */ DoesNotAccessMemory,
  /* nvvm_suq_height */ DoesNotAccessMemory,
  /* nvvm_suq_width */ DoesNotAccessMemory,
  /* nvvm_sust_b_1d_array_i16_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_i16_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_i32_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_i32_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_i64_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_i64_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_i64_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_i8_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_i8_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_v2i16_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_v2i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_v2i16_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_v2i32_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_v2i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_v2i32_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_v2i64_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_v2i64_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_v2i64_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_v2i8_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_v2i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_v2i8_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_v4i16_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_v4i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_v4i16_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_v4i32_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_v4i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_v4i32_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_v4i8_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_v4i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_array_v4i8_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_i16_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_i16_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_i32_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_i32_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_i64_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_i64_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_i64_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_i8_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_i8_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_v2i16_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_v2i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_v2i16_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_v2i32_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_v2i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_v2i32_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_v2i64_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_v2i64_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_v2i64_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_v2i8_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_v2i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_v2i8_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_v4i16_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_v4i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_v4i16_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_v4i32_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_v4i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_v4i32_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_v4i8_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_v4i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_1d_v4i8_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_i16_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_i16_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_i32_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_i32_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_i64_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_i64_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_i64_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_i8_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_i8_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_v2i16_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_v2i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_v2i16_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_v2i32_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_v2i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_v2i32_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_v2i64_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_v2i64_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_v2i64_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_v2i8_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_v2i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_v2i8_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_v4i16_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_v4i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_v4i16_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_v4i32_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_v4i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_v4i32_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_v4i8_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_v4i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_array_v4i8_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_i16_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_i16_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_i32_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_i32_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_i64_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_i64_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_i64_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_i8_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_i8_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_v2i16_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_v2i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_v2i16_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_v2i32_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_v2i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_v2i32_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_v2i64_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_v2i64_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_v2i64_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_v2i8_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_v2i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_v2i8_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_v4i16_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_v4i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_v4i16_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_v4i32_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_v4i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_v4i32_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_v4i8_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_v4i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_2d_v4i8_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_i16_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_i16_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_i32_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_i32_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_i64_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_i64_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_i64_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_i8_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_i8_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_v2i16_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_v2i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_v2i16_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_v2i32_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_v2i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_v2i32_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_v2i64_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_v2i64_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_v2i64_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_v2i8_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_v2i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_v2i8_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_v4i16_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_v4i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_v4i16_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_v4i32_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_v4i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_v4i32_zero */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_v4i8_clamp */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_v4i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_b_3d_v4i8_zero */ UnknownModRefBehavior,
  /* nvvm_sust_p_1d_array_i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_1d_array_i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_1d_array_i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_1d_array_v2i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_1d_array_v2i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_1d_array_v2i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_1d_array_v4i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_1d_array_v4i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_1d_array_v4i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_1d_i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_1d_i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_1d_i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_1d_v2i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_1d_v2i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_1d_v2i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_1d_v4i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_1d_v4i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_1d_v4i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_2d_array_i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_2d_array_i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_2d_array_i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_2d_array_v2i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_2d_array_v2i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_2d_array_v2i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_2d_array_v4i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_2d_array_v4i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_2d_array_v4i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_2d_i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_2d_i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_2d_i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_2d_v2i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_2d_v2i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_2d_v2i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_2d_v4i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_2d_v4i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_2d_v4i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_3d_i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_3d_i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_3d_i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_3d_v2i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_3d_v2i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_3d_v2i8_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_3d_v4i16_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_3d_v4i32_trap */ UnknownModRefBehavior,
  /* nvvm_sust_p_3d_v4i8_trap */ UnknownModRefBehavior,
  /* nvvm_swap_lo_hi_b64 */ DoesNotAccessMemory,
  /* nvvm_tex_1d_array_grad_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_1d_array_grad_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_1d_array_grad_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_1d_array_level_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_1d_array_level_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_1d_array_level_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_1d_array_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_1d_array_v4f32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_1d_array_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_1d_array_v4s32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_1d_array_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_1d_array_v4u32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_1d_grad_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_1d_grad_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_1d_grad_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_1d_level_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_1d_level_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_1d_level_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_1d_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_1d_v4f32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_1d_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_1d_v4s32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_1d_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_1d_v4u32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_2d_array_grad_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_2d_array_grad_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_2d_array_grad_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_2d_array_level_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_2d_array_level_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_2d_array_level_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_2d_array_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_2d_array_v4f32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_2d_array_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_2d_array_v4s32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_2d_array_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_2d_array_v4u32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_2d_grad_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_2d_grad_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_2d_grad_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_2d_level_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_2d_level_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_2d_level_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_2d_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_2d_v4f32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_2d_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_2d_v4s32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_2d_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_2d_v4u32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_3d_grad_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_3d_grad_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_3d_grad_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_3d_level_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_3d_level_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_3d_level_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_3d_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_3d_v4f32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_3d_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_3d_v4s32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_3d_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_3d_v4u32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_cube_array_level_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_cube_array_level_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_cube_array_level_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_cube_array_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_cube_array_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_cube_array_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_cube_level_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_cube_level_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_cube_level_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_cube_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_cube_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_cube_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_1d_array_grad_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_1d_array_grad_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_1d_array_grad_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_1d_array_level_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_1d_array_level_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_1d_array_level_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_1d_array_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_1d_array_v4f32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_1d_array_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_1d_array_v4s32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_1d_array_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_1d_array_v4u32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_1d_grad_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_1d_grad_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_1d_grad_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_1d_level_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_1d_level_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_1d_level_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_1d_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_1d_v4f32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_1d_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_1d_v4s32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_1d_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_1d_v4u32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_2d_array_grad_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_2d_array_grad_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_2d_array_grad_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_2d_array_level_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_2d_array_level_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_2d_array_level_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_2d_array_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_2d_array_v4f32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_2d_array_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_2d_array_v4s32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_2d_array_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_2d_array_v4u32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_2d_grad_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_2d_grad_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_2d_grad_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_2d_level_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_2d_level_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_2d_level_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_2d_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_2d_v4f32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_2d_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_2d_v4s32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_2d_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_2d_v4u32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_3d_grad_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_3d_grad_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_3d_grad_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_3d_level_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_3d_level_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_3d_level_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_3d_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_3d_v4f32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_3d_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_3d_v4s32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_3d_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_3d_v4u32_s32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_cube_array_level_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_cube_array_level_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_cube_array_level_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_cube_array_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_cube_array_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_cube_array_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_cube_level_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_cube_level_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_cube_level_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_cube_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_cube_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tex_unified_cube_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_texsurf_handle */ DoesNotAccessMemory,
  /* nvvm_texsurf_handle_internal */ DoesNotAccessMemory,
  /* nvvm_tld4_a_2d_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tld4_a_2d_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tld4_a_2d_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tld4_b_2d_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tld4_b_2d_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tld4_b_2d_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tld4_g_2d_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tld4_g_2d_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tld4_g_2d_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tld4_r_2d_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tld4_r_2d_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tld4_r_2d_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tld4_unified_a_2d_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tld4_unified_a_2d_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tld4_unified_a_2d_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tld4_unified_b_2d_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tld4_unified_b_2d_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tld4_unified_b_2d_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tld4_unified_g_2d_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tld4_unified_g_2d_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tld4_unified_g_2d_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_tld4_unified_r_2d_v4f32_f32 */ UnknownModRefBehavior,
  /* nvvm_tld4_unified_r_2d_v4s32_f32 */ UnknownModRefBehavior,
  /* nvvm_tld4_unified_r_2d_v4u32_f32 */ UnknownModRefBehavior,
  /* nvvm_trunc_d */ DoesNotAccessMemory,
  /* nvvm_trunc_f */ DoesNotAccessMemory,
  /* nvvm_trunc_ftz_f */ DoesNotAccessMemory,
  /* nvvm_txq_array_size */ DoesNotAccessMemory,
  /* nvvm_txq_channel_data_type */ DoesNotAccessMemory,
  /* nvvm_txq_channel_order */ DoesNotAccessMemory,
  /* nvvm_txq_depth */ DoesNotAccessMemory,
  /* nvvm_txq_height */ DoesNotAccessMemory,
  /* nvvm_txq_num_mipmap_levels */ DoesNotAccessMemory,
  /* nvvm_txq_num_samples */ DoesNotAccessMemory,
  /* nvvm_txq_width */ DoesNotAccessMemory,
  /* nvvm_ui2d_rm */ DoesNotAccessMemory,
  /* nvvm_ui2d_rn */ DoesNotAccessMemory,
  /* nvvm_ui2d_rp */ DoesNotAccessMemory,
  /* nvvm_ui2d_rz */ DoesNotAccessMemory,
  /* nvvm_ui2f_rm */ DoesNotAccessMemory,
  /* nvvm_ui2f_rn */ DoesNotAccessMemory,
  /* nvvm_ui2f_rp */ DoesNotAccessMemory,
  /* nvvm_ui2f_rz */ DoesNotAccessMemory,
  /* nvvm_ull2d_rm */ DoesNotAccessMemory,
  /* nvvm_ull2d_rn */ DoesNotAccessMemory,
  /* nvvm_ull2d_rp */ DoesNotAccessMemory,
  /* nvvm_ull2d_rz */ DoesNotAccessMemory,
  /* nvvm_ull2f_rm */ DoesNotAccessMemory,
  /* nvvm_ull2f_rn */ DoesNotAccessMemory,
  /* nvvm_ull2f_rp */ DoesNotAccessMemory,
  /* nvvm_ull2f_rz */ DoesNotAccessMemory,
  /* objectsize */ DoesNotAccessMemory,
  /* pcmarker */ UnknownModRefBehavior,
  /* pow */ DoesNotAccessMemory,
  /* powi */ DoesNotAccessMemory,
  /* ppc_altivec_dss */ UnknownModRefBehavior,
  /* ppc_altivec_dssall */ UnknownModRefBehavior,
  /* ppc_altivec_dst */ UnknownModRefBehavior,
  /* ppc_altivec_dstst */ UnknownModRefBehavior,
  /* ppc_altivec_dststt */ UnknownModRefBehavior,
  /* ppc_altivec_dstt */ UnknownModRefBehavior,
  /* ppc_altivec_lvebx */ OnlyReadsArgumentPointees,
  /* ppc_altivec_lvehx */ OnlyReadsArgumentPointees,
  /* ppc_altivec_lvewx */ OnlyReadsArgumentPointees,
  /* ppc_altivec_lvsl */ DoesNotAccessMemory,
  /* ppc_altivec_lvsr */ DoesNotAccessMemory,
  /* ppc_altivec_lvx */ OnlyReadsArgumentPointees,
  /* ppc_altivec_lvxl */ OnlyReadsArgumentPointees,
  /* ppc_altivec_mfvscr */ OnlyReadsMemory,
  /* ppc_altivec_mtvscr */ UnknownModRefBehavior,
  /* ppc_altivec_stvebx */ OnlyAccessesArgumentPointees,
  /* ppc_altivec_stvehx */ OnlyAccessesArgumentPointees,
  /* ppc_altivec_stvewx */ OnlyAccessesArgumentPointees,
  /* ppc_altivec_stvx */ OnlyAccessesArgumentPointees,
  /* ppc_altivec_stvxl */ OnlyAccessesArgumentPointees,
  /* ppc_altivec_vaddcuw */ DoesNotAccessMemory,
  /* ppc_altivec_vaddsbs */ DoesNotAccessMemory,
  /* ppc_altivec_vaddshs */ DoesNotAccessMemory,
  /* ppc_altivec_vaddsws */ DoesNotAccessMemory,
  /* ppc_altivec_vaddubs */ DoesNotAccessMemory,
  /* ppc_altivec_vadduhs */ DoesNotAccessMemory,
  /* ppc_altivec_vadduws */ DoesNotAccessMemory,
  /* ppc_altivec_vavgsb */ DoesNotAccessMemory,
  /* ppc_altivec_vavgsh */ DoesNotAccessMemory,
  /* ppc_altivec_vavgsw */ DoesNotAccessMemory,
  /* ppc_altivec_vavgub */ DoesNotAccessMemory,
  /* ppc_altivec_vavguh */ DoesNotAccessMemory,
  /* ppc_altivec_vavguw */ DoesNotAccessMemory,
  /* ppc_altivec_vcfsx */ DoesNotAccessMemory,
  /* ppc_altivec_vcfux */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpbfp */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpbfp_p */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpeqfp */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpeqfp_p */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpequb */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpequb_p */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpequh */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpequh_p */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpequw */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpequw_p */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpgefp */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpgefp_p */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpgtfp */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpgtfp_p */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpgtsb */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpgtsb_p */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpgtsh */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpgtsh_p */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpgtsw */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpgtsw_p */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpgtub */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpgtub_p */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpgtuh */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpgtuh_p */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpgtuw */ DoesNotAccessMemory,
  /* ppc_altivec_vcmpgtuw_p */ DoesNotAccessMemory,
  /* ppc_altivec_vctsxs */ DoesNotAccessMemory,
  /* ppc_altivec_vctuxs */ DoesNotAccessMemory,
  /* ppc_altivec_vexptefp */ DoesNotAccessMemory,
  /* ppc_altivec_vlogefp */ DoesNotAccessMemory,
  /* ppc_altivec_vmaddfp */ DoesNotAccessMemory,
  /* ppc_altivec_vmaxfp */ DoesNotAccessMemory,
  /* ppc_altivec_vmaxsb */ DoesNotAccessMemory,
  /* ppc_altivec_vmaxsh */ DoesNotAccessMemory,
  /* ppc_altivec_vmaxsw */ DoesNotAccessMemory,
  /* ppc_altivec_vmaxub */ DoesNotAccessMemory,
  /* ppc_altivec_vmaxuh */ DoesNotAccessMemory,
  /* ppc_altivec_vmaxuw */ DoesNotAccessMemory,
  /* ppc_altivec_vmhaddshs */ DoesNotAccessMemory,
  /* ppc_altivec_vmhraddshs */ DoesNotAccessMemory,
  /* ppc_altivec_vminfp */ DoesNotAccessMemory,
  /* ppc_altivec_vminsb */ DoesNotAccessMemory,
  /* ppc_altivec_vminsh */ DoesNotAccessMemory,
  /* ppc_altivec_vminsw */ DoesNotAccessMemory,
  /* ppc_altivec_vminub */ DoesNotAccessMemory,
  /* ppc_altivec_vminuh */ DoesNotAccessMemory,
  /* ppc_altivec_vminuw */ DoesNotAccessMemory,
  /* ppc_altivec_vmladduhm */ DoesNotAccessMemory,
  /* ppc_altivec_vmsummbm */ DoesNotAccessMemory,
  /* ppc_altivec_vmsumshm */ DoesNotAccessMemory,
  /* ppc_altivec_vmsumshs */ DoesNotAccessMemory,
  /* ppc_altivec_vmsumubm */ DoesNotAccessMemory,
  /* ppc_altivec_vmsumuhm */ DoesNotAccessMemory,
  /* ppc_altivec_vmsumuhs */ DoesNotAccessMemory,
  /* ppc_altivec_vmulesb */ DoesNotAccessMemory,
  /* ppc_altivec_vmulesh */ DoesNotAccessMemory,
  /* ppc_altivec_vmuleub */ DoesNotAccessMemory,
  /* ppc_altivec_vmuleuh */ DoesNotAccessMemory,
  /* ppc_altivec_vmulosb */ DoesNotAccessMemory,
  /* ppc_altivec_vmulosh */ DoesNotAccessMemory,
  /* ppc_altivec_vmuloub */ DoesNotAccessMemory,
  /* ppc_altivec_vmulouh */ DoesNotAccessMemory,
  /* ppc_altivec_vnmsubfp */ DoesNotAccessMemory,
  /* ppc_altivec_vperm */ DoesNotAccessMemory,
  /* ppc_altivec_vpkpx */ DoesNotAccessMemory,
  /* ppc_altivec_vpkshss */ DoesNotAccessMemory,
  /* ppc_altivec_vpkshus */ DoesNotAccessMemory,
  /* ppc_altivec_vpkswss */ DoesNotAccessMemory,
  /* ppc_altivec_vpkswus */ DoesNotAccessMemory,
  /* ppc_altivec_vpkuhus */ DoesNotAccessMemory,
  /* ppc_altivec_vpkuwus */ DoesNotAccessMemory,
  /* ppc_altivec_vrefp */ DoesNotAccessMemory,
  /* ppc_altivec_vrfim */ DoesNotAccessMemory,
  /* ppc_altivec_vrfin */ DoesNotAccessMemory,
  /* ppc_altivec_vrfip */ DoesNotAccessMemory,
  /* ppc_altivec_vrfiz */ DoesNotAccessMemory,
  /* ppc_altivec_vrlb */ DoesNotAccessMemory,
  /* ppc_altivec_vrlh */ DoesNotAccessMemory,
  /* ppc_altivec_vrlw */ DoesNotAccessMemory,
  /* ppc_altivec_vrsqrtefp */ DoesNotAccessMemory,
  /* ppc_altivec_vsel */ DoesNotAccessMemory,
  /* ppc_altivec_vsl */ DoesNotAccessMemory,
  /* ppc_altivec_vslb */ DoesNotAccessMemory,
  /* ppc_altivec_vslh */ DoesNotAccessMemory,
  /* ppc_altivec_vslo */ DoesNotAccessMemory,
  /* ppc_altivec_vslw */ DoesNotAccessMemory,
  /* ppc_altivec_vsr */ DoesNotAccessMemory,
  /* ppc_altivec_vsrab */ DoesNotAccessMemory,
  /* ppc_altivec_vsrah */ DoesNotAccessMemory,
  /* ppc_altivec_vsraw */ DoesNotAccessMemory,
  /* ppc_altivec_vsrb */ DoesNotAccessMemory,
  /* ppc_altivec_vsrh */ DoesNotAccessMemory,
  /* ppc_altivec_vsro */ DoesNotAccessMemory,
  /* ppc_altivec_vsrw */ DoesNotAccessMemory,
  /* ppc_altivec_vsubcuw */ DoesNotAccessMemory,
  /* ppc_altivec_vsubsbs */ DoesNotAccessMemory,
  /* ppc_altivec_vsubshs */ DoesNotAccessMemory,
  /* ppc_altivec_vsubsws */ DoesNotAccessMemory,
  /* ppc_altivec_vsububs */ DoesNotAccessMemory,
  /* ppc_altivec_vsubuhs */ DoesNotAccessMemory,
  /* ppc_altivec_vsubuws */ DoesNotAccessMemory,
  /* ppc_altivec_vsum2sws */ DoesNotAccessMemory,
  /* ppc_altivec_vsum4sbs */ DoesNotAccessMemory,
  /* ppc_altivec_vsum4shs */ DoesNotAccessMemory,
  /* ppc_altivec_vsum4ubs */ DoesNotAccessMemory,
  /* ppc_altivec_vsumsws */ DoesNotAccessMemory,
  /* ppc_altivec_vupkhpx */ DoesNotAccessMemory,
  /* ppc_altivec_vupkhsb */ DoesNotAccessMemory,
  /* ppc_altivec_vupkhsh */ DoesNotAccessMemory,
  /* ppc_altivec_vupklpx */ DoesNotAccessMemory,
  /* ppc_altivec_vupklsb */ DoesNotAccessMemory,
  /* ppc_altivec_vupklsh */ DoesNotAccessMemory,
  /* ppc_dcba */ UnknownModRefBehavior,
  /* ppc_dcbf */ UnknownModRefBehavior,
  /* ppc_dcbi */ UnknownModRefBehavior,
  /* ppc_dcbst */ UnknownModRefBehavior,
  /* ppc_dcbt */ OnlyAccessesArgumentPointees,
  /* ppc_dcbtst */ UnknownModRefBehavior,
  /* ppc_dcbz */ UnknownModRefBehavior,
  /* ppc_dcbzl */ UnknownModRefBehavior,
  /* ppc_is_decremented_ctr_nonzero */ UnknownModRefBehavior,
  /* ppc_mtctr */ UnknownModRefBehavior,
  /* ppc_sync */ UnknownModRefBehavior,
  /* prefetch */ OnlyAccessesArgumentPointees,
  /* ptr_annotation */ UnknownModRefBehavior,
  /* ptx_bar_sync */ UnknownModRefBehavior,
  /* ptx_read_clock */ DoesNotAccessMemory,
  /* ptx_read_clock64 */ DoesNotAccessMemory,
  /* ptx_read_ctaid_w */ DoesNotAccessMemory,
  /* ptx_read_ctaid_x */ DoesNotAccessMemory,
  /* ptx_read_ctaid_y */ DoesNotAccessMemory,
  /* ptx_read_ctaid_z */ DoesNotAccessMemory,
  /* ptx_read_gridid */ DoesNotAccessMemory,
  /* ptx_read_laneid */ DoesNotAccessMemory,
  /* ptx_read_lanemask_eq */ DoesNotAccessMemory,
  /* ptx_read_lanemask_ge */ DoesNotAccessMemory,
  /* ptx_read_lanemask_gt */ DoesNotAccessMemory,
  /* ptx_read_lanemask_le */ DoesNotAccessMemory,
  /* ptx_read_lanemask_lt */ DoesNotAccessMemory,
  /* ptx_read_nctaid_w */ DoesNotAccessMemory,
  /* ptx_read_nctaid_x */ DoesNotAccessMemory,
  /* ptx_read_nctaid_y */ DoesNotAccessMemory,
  /* ptx_read_nctaid_z */ DoesNotAccessMemory,
  /* ptx_read_nsmid */ DoesNotAccessMemory,
  /* ptx_read_ntid_w */ DoesNotAccessMemory,
  /* ptx_read_ntid_x */ DoesNotAccessMemory,
  /* ptx_read_ntid_y */ DoesNotAccessMemory,
  /* ptx_read_ntid_z */ DoesNotAccessMemory,
  /* ptx_read_nwarpid */ DoesNotAccessMemory,
  /* ptx_read_pm0 */ DoesNotAccessMemory,
  /* ptx_read_pm1 */ DoesNotAccessMemory,
  /* ptx_read_pm2 */ DoesNotAccessMemory,
  /* ptx_read_pm3 */ DoesNotAccessMemory,
  /* ptx_read_smid */ DoesNotAccessMemory,
  /* ptx_read_tid_w */ DoesNotAccessMemory,
  /* ptx_read_tid_x */ DoesNotAccessMemory,
  /* ptx_read_tid_y */ DoesNotAccessMemory,
  /* ptx_read_tid_z */ DoesNotAccessMemory,
  /* ptx_read_warpid */ DoesNotAccessMemory,
  /* r600_read_global_size_x */ DoesNotAccessMemory,
  /* r600_read_global_size_y */ DoesNotAccessMemory,
  /* r600_read_global_size_z */ DoesNotAccessMemory,
  /* r600_read_local_size_x */ DoesNotAccessMemory,
  /* r600_read_local_size_y */ DoesNotAccessMemory,
  /* r600_read_local_size_z */ DoesNotAccessMemory,
  /* r600_read_ngroups_x */ DoesNotAccessMemory,
  /* r600_read_ngroups_y */ DoesNotAccessMemory,
  /* r600_read_ngroups_z */ DoesNotAccessMemory,
  /* r600_read_tgid_x */ DoesNotAccessMemory,
  /* r600_read_tgid_y */ DoesNotAccessMemory,
  /* r600_read_tgid_z */ DoesNotAccessMemory,
  /* r600_read_tidig_x */ DoesNotAccessMemory,
  /* r600_read_tidig_y */ DoesNotAccessMemory,
  /* r600_read_tidig_z */ DoesNotAccessMemory,
  /* read_register */ DoesNotAccessMemory,
  /* readcyclecounter */ UnknownModRefBehavior,
  /* returnaddress */ DoesNotAccessMemory,
  /* rint */ DoesNotAccessMemory,
  /* round */ DoesNotAccessMemory,
  /* sadd_with_overflow */ DoesNotAccessMemory,
  /* setjmp */ UnknownModRefBehavior,
  /* siglongjmp */ UnknownModRefBehavior,
  /* sigsetjmp */ UnknownModRefBehavior,
  /* sin */ DoesNotAccessMemory,
  /* smul_with_overflow */ DoesNotAccessMemory,
  /* sqrt */ DoesNotAccessMemory,
  /* ssub_with_overflow */ DoesNotAccessMemory,
  /* stackprotector */ UnknownModRefBehavior,
  /* stackprotectorcheck */ OnlyAccessesArgumentPointees,
  /* stackrestore */ UnknownModRefBehavior,
  /* stacksave */ UnknownModRefBehavior,
  /* trap */ UnknownModRefBehavior,
  /* trunc */ DoesNotAccessMemory,
  /* uadd_with_overflow */ DoesNotAccessMemory,
  /* umul_with_overflow */ DoesNotAccessMemory,
  /* usub_with_overflow */ DoesNotAccessMemory,
  /* vacopy */ UnknownModRefBehavior,
  /* vaend */ UnknownModRefBehavior,
  /* var_annotation */ UnknownModRefBehavior,
  /* vastart */ UnknownModRefBehavior,
  /* write_register */ UnknownModRefBehavior,
  /* x86_3dnow_pavgusb */ DoesNotAccessMemory,
  /* x86_3dnow_pf2id */ DoesNotAccessMemory,
  /* x86_3dnow_pfacc */ DoesNotAccessMemory,
  /* x86_3dnow_pfadd */ DoesNotAccessMemory,
  /* x86_3dnow_pfcmpeq */ DoesNotAccessMemory,
  /* x86_3dnow_pfcmpge */ DoesNotAccessMemory,
  /* x86_3dnow_pfcmpgt */ DoesNotAccessMemory,
  /* x86_3dnow_pfmax */ DoesNotAccessMemory,
  /* x86_3dnow_pfmin */ DoesNotAccessMemory,
  /* x86_3dnow_pfmul */ DoesNotAccessMemory,
  /* x86_3dnow_pfrcp */ DoesNotAccessMemory,
  /* x86_3dnow_pfrcpit1 */ DoesNotAccessMemory,
  /* x86_3dnow_pfrcpit2 */ DoesNotAccessMemory,
  /* x86_3dnow_pfrsqit1 */ DoesNotAccessMemory,
  /* x86_3dnow_pfrsqrt */ DoesNotAccessMemory,
  /* x86_3dnow_pfsub */ DoesNotAccessMemory,
  /* x86_3dnow_pfsubr */ DoesNotAccessMemory,
  /* x86_3dnow_pi2fd */ DoesNotAccessMemory,
  /* x86_3dnow_pmulhrw */ DoesNotAccessMemory,
  /* x86_3dnowa_pf2iw */ DoesNotAccessMemory,
  /* x86_3dnowa_pfnacc */ DoesNotAccessMemory,
  /* x86_3dnowa_pfpnacc */ DoesNotAccessMemory,
  /* x86_3dnowa_pi2fw */ DoesNotAccessMemory,
  /* x86_3dnowa_pswapd */ DoesNotAccessMemory,
  /* x86_aesni_aesdec */ DoesNotAccessMemory,
  /* x86_aesni_aesdeclast */ DoesNotAccessMemory,
  /* x86_aesni_aesenc */ DoesNotAccessMemory,
  /* x86_aesni_aesenclast */ DoesNotAccessMemory,
  /* x86_aesni_aesimc */ DoesNotAccessMemory,
  /* x86_aesni_aeskeygenassist */ DoesNotAccessMemory,
  /* x86_avx2_gather_d_d */ OnlyReadsArgumentPointees,
  /* x86_avx2_gather_d_d_256 */ OnlyReadsArgumentPointees,
  /* x86_avx2_gather_d_pd */ OnlyReadsArgumentPointees,
  /* x86_avx2_gather_d_pd_256 */ OnlyReadsArgumentPointees,
  /* x86_avx2_gather_d_ps */ OnlyReadsArgumentPointees,
  /* x86_avx2_gather_d_ps_256 */ OnlyReadsArgumentPointees,
  /* x86_avx2_gather_d_q */ OnlyReadsArgumentPointees,
  /* x86_avx2_gather_d_q_256 */ OnlyReadsArgumentPointees,
  /* x86_avx2_gather_q_d */ OnlyReadsArgumentPointees,
  /* x86_avx2_gather_q_d_256 */ OnlyReadsArgumentPointees,
  /* x86_avx2_gather_q_pd */ OnlyReadsArgumentPointees,
  /* x86_avx2_gather_q_pd_256 */ OnlyReadsArgumentPointees,
  /* x86_avx2_gather_q_ps */ OnlyReadsArgumentPointees,
  /* x86_avx2_gather_q_ps_256 */ OnlyReadsArgumentPointees,
  /* x86_avx2_gather_q_q */ OnlyReadsArgumentPointees,
  /* x86_avx2_gather_q_q_256 */ OnlyReadsArgumentPointees,
  /* x86_avx2_maskload_d */ OnlyReadsArgumentPointees,
  /* x86_avx2_maskload_d_256 */ OnlyReadsArgumentPointees,
  /* x86_avx2_maskload_q */ OnlyReadsArgumentPointees,
  /* x86_avx2_maskload_q_256 */ OnlyReadsArgumentPointees,
  /* x86_avx2_maskstore_d */ OnlyAccessesArgumentPointees,
  /* x86_avx2_maskstore_d_256 */ OnlyAccessesArgumentPointees,
  /* x86_avx2_maskstore_q */ OnlyAccessesArgumentPointees,
  /* x86_avx2_maskstore_q_256 */ OnlyAccessesArgumentPointees,
  /* x86_avx2_movntdqa */ OnlyReadsMemory,
  /* x86_avx2_mpsadbw */ DoesNotAccessMemory,
  /* x86_avx2_pabs_b */ DoesNotAccessMemory,
  /* x86_avx2_pabs_d */ DoesNotAccessMemory,
  /* x86_avx2_pabs_w */ DoesNotAccessMemory,
  /* x86_avx2_packssdw */ DoesNotAccessMemory,
  /* x86_avx2_packsswb */ DoesNotAccessMemory,
  /* x86_avx2_packusdw */ DoesNotAccessMemory,
  /* x86_avx2_packuswb */ DoesNotAccessMemory,
  /* x86_avx2_padds_b */ DoesNotAccessMemory,
  /* x86_avx2_padds_w */ DoesNotAccessMemory,
  /* x86_avx2_paddus_b */ DoesNotAccessMemory,
  /* x86_avx2_paddus_w */ DoesNotAccessMemory,
  /* x86_avx2_pavg_b */ DoesNotAccessMemory,
  /* x86_avx2_pavg_w */ DoesNotAccessMemory,
  /* x86_avx2_pblendd_128 */ DoesNotAccessMemory,
  /* x86_avx2_pblendd_256 */ DoesNotAccessMemory,
  /* x86_avx2_pblendvb */ DoesNotAccessMemory,
  /* x86_avx2_pblendw */ DoesNotAccessMemory,
  /* x86_avx2_pbroadcastb_128 */ DoesNotAccessMemory,
  /* x86_avx2_pbroadcastb_256 */ DoesNotAccessMemory,
  /* x86_avx2_pbroadcastd_128 */ DoesNotAccessMemory,
  /* x86_avx2_pbroadcastd_256 */ DoesNotAccessMemory,
  /* x86_avx2_pbroadcastq_128 */ DoesNotAccessMemory,
  /* x86_avx2_pbroadcastq_256 */ DoesNotAccessMemory,
  /* x86_avx2_pbroadcastw_128 */ DoesNotAccessMemory,
  /* x86_avx2_pbroadcastw_256 */ DoesNotAccessMemory,
  /* x86_avx2_permd */ DoesNotAccessMemory,
  /* x86_avx2_permps */ DoesNotAccessMemory,
  /* x86_avx2_phadd_d */ DoesNotAccessMemory,
  /* x86_avx2_phadd_sw */ DoesNotAccessMemory,
  /* x86_avx2_phadd_w */ DoesNotAccessMemory,
  /* x86_avx2_phsub_d */ DoesNotAccessMemory,
  /* x86_avx2_phsub_sw */ DoesNotAccessMemory,
  /* x86_avx2_phsub_w */ DoesNotAccessMemory,
  /* x86_avx2_pmadd_ub_sw */ DoesNotAccessMemory,
  /* x86_avx2_pmadd_wd */ DoesNotAccessMemory,
  /* x86_avx2_pmaxs_b */ DoesNotAccessMemory,
  /* x86_avx2_pmaxs_d */ DoesNotAccessMemory,
  /* x86_avx2_pmaxs_w */ DoesNotAccessMemory,
  /* x86_avx2_pmaxu_b */ DoesNotAccessMemory,
  /* x86_avx2_pmaxu_d */ DoesNotAccessMemory,
  /* x86_avx2_pmaxu_w */ DoesNotAccessMemory,
  /* x86_avx2_pmins_b */ DoesNotAccessMemory,
  /* x86_avx2_pmins_d */ DoesNotAccessMemory,
  /* x86_avx2_pmins_w */ DoesNotAccessMemory,
  /* x86_avx2_pminu_b */ DoesNotAccessMemory,
  /* x86_avx2_pminu_d */ DoesNotAccessMemory,
  /* x86_avx2_pminu_w */ DoesNotAccessMemory,
  /* x86_avx2_pmovmskb */ DoesNotAccessMemory,
  /* x86_avx2_pmovsxbd */ DoesNotAccessMemory,
  /* x86_avx2_pmovsxbq */ DoesNotAccessMemory,
  /* x86_avx2_pmovsxbw */ DoesNotAccessMemory,
  /* x86_avx2_pmovsxdq */ DoesNotAccessMemory,
  /* x86_avx2_pmovsxwd */ DoesNotAccessMemory,
  /* x86_avx2_pmovsxwq */ DoesNotAccessMemory,
  /* x86_avx2_pmovzxbd */ DoesNotAccessMemory,
  /* x86_avx2_pmovzxbq */ DoesNotAccessMemory,
  /* x86_avx2_pmovzxbw */ DoesNotAccessMemory,
  /* x86_avx2_pmovzxdq */ DoesNotAccessMemory,
  /* x86_avx2_pmovzxwd */ DoesNotAccessMemory,
  /* x86_avx2_pmovzxwq */ DoesNotAccessMemory,
  /* x86_avx2_pmul_dq */ DoesNotAccessMemory,
  /* x86_avx2_pmul_hr_sw */ DoesNotAccessMemory,
  /* x86_avx2_pmulh_w */ DoesNotAccessMemory,
  /* x86_avx2_pmulhu_w */ DoesNotAccessMemory,
  /* x86_avx2_pmulu_dq */ DoesNotAccessMemory,
  /* x86_avx2_psad_bw */ DoesNotAccessMemory,
  /* x86_avx2_pshuf_b */ DoesNotAccessMemory,
  /* x86_avx2_psign_b */ DoesNotAccessMemory,
  /* x86_avx2_psign_d */ DoesNotAccessMemory,
  /* x86_avx2_psign_w */ DoesNotAccessMemory,
  /* x86_avx2_psll_d */ DoesNotAccessMemory,
  /* x86_avx2_psll_dq */ DoesNotAccessMemory,
  /* x86_avx2_psll_dq_bs */ DoesNotAccessMemory,
  /* x86_avx2_psll_q */ DoesNotAccessMemory,
  /* x86_avx2_psll_w */ DoesNotAccessMemory,
  /* x86_avx2_pslli_d */ DoesNotAccessMemory,
  /* x86_avx2_pslli_q */ DoesNotAccessMemory,
  /* x86_avx2_pslli_w */ DoesNotAccessMemory,
  /* x86_avx2_psllv_d */ DoesNotAccessMemory,
  /* x86_avx2_psllv_d_256 */ DoesNotAccessMemory,
  /* x86_avx2_psllv_q */ DoesNotAccessMemory,
  /* x86_avx2_psllv_q_256 */ DoesNotAccessMemory,
  /* x86_avx2_psra_d */ DoesNotAccessMemory,
  /* x86_avx2_psra_w */ DoesNotAccessMemory,
  /* x86_avx2_psrai_d */ DoesNotAccessMemory,
  /* x86_avx2_psrai_w */ DoesNotAccessMemory,
  /* x86_avx2_psrav_d */ DoesNotAccessMemory,
  /* x86_avx2_psrav_d_256 */ DoesNotAccessMemory,
  /* x86_avx2_psrl_d */ DoesNotAccessMemory,
  /* x86_avx2_psrl_dq */ DoesNotAccessMemory,
  /* x86_avx2_psrl_dq_bs */ DoesNotAccessMemory,
  /* x86_avx2_psrl_q */ DoesNotAccessMemory,
  /* x86_avx2_psrl_w */ DoesNotAccessMemory,
  /* x86_avx2_psrli_d */ DoesNotAccessMemory,
  /* x86_avx2_psrli_q */ DoesNotAccessMemory,
  /* x86_avx2_psrli_w */ DoesNotAccessMemory,
  /* x86_avx2_psrlv_d */ DoesNotAccessMemory,
  /* x86_avx2_psrlv_d_256 */ DoesNotAccessMemory,
  /* x86_avx2_psrlv_q */ DoesNotAccessMemory,
  /* x86_avx2_psrlv_q_256 */ DoesNotAccessMemory,
  /* x86_avx2_psubs_b */ DoesNotAccessMemory,
  /* x86_avx2_psubs_w */ DoesNotAccessMemory,
  /* x86_avx2_psubus_b */ DoesNotAccessMemory,
  /* x86_avx2_psubus_w */ DoesNotAccessMemory,
  /* x86_avx2_vbroadcast_sd_pd_256 */ DoesNotAccessMemory,
  /* x86_avx2_vbroadcast_ss_ps */ DoesNotAccessMemory,
  /* x86_avx2_vbroadcast_ss_ps_256 */ DoesNotAccessMemory,
  /* x86_avx2_vbroadcasti128 */ OnlyReadsArgumentPointees,
  /* x86_avx2_vextracti128 */ DoesNotAccessMemory,
  /* x86_avx2_vinserti128 */ DoesNotAccessMemory,
  /* x86_avx2_vperm2i128 */ DoesNotAccessMemory,
  /* x86_avx512_cvtsd2usi */ DoesNotAccessMemory,
  /* x86_avx512_cvtsd2usi64 */ DoesNotAccessMemory,
  /* x86_avx512_cvtss2usi */ DoesNotAccessMemory,
  /* x86_avx512_cvtss2usi64 */ DoesNotAccessMemory,
  /* x86_avx512_cvttsd2usi */ DoesNotAccessMemory,
  /* x86_avx512_cvttsd2usi64 */ DoesNotAccessMemory,
  /* x86_avx512_cvttss2usi */ DoesNotAccessMemory,
  /* x86_avx512_cvttss2usi64 */ DoesNotAccessMemory,
  /* x86_avx512_cvtusi2sd */ DoesNotAccessMemory,
  /* x86_avx512_cvtusi2ss */ DoesNotAccessMemory,
  /* x86_avx512_cvtusi642sd */ DoesNotAccessMemory,
  /* x86_avx512_cvtusi642ss */ DoesNotAccessMemory,
  /* x86_avx512_gather_dpd_512 */ OnlyReadsArgumentPointees,
  /* x86_avx512_gather_dpi_512 */ OnlyReadsArgumentPointees,
  /* x86_avx512_gather_dpq_512 */ OnlyReadsArgumentPointees,
  /* x86_avx512_gather_dps_512 */ OnlyReadsArgumentPointees,
  /* x86_avx512_gather_qpd_512 */ OnlyReadsArgumentPointees,
  /* x86_avx512_gather_qpi_512 */ OnlyReadsArgumentPointees,
  /* x86_avx512_gather_qpq_512 */ OnlyReadsArgumentPointees,
  /* x86_avx512_gather_qps_512 */ OnlyReadsArgumentPointees,
  /* x86_avx512_gatherpf_dpd_512 */ OnlyAccessesArgumentPointees,
  /* x86_avx512_gatherpf_dps_512 */ OnlyAccessesArgumentPointees,
  /* x86_avx512_gatherpf_qpd_512 */ OnlyAccessesArgumentPointees,
  /* x86_avx512_gatherpf_qps_512 */ OnlyAccessesArgumentPointees,
  /* x86_avx512_kand_w */ DoesNotAccessMemory,
  /* x86_avx512_kandn_w */ DoesNotAccessMemory,
  /* x86_avx512_knot_w */ DoesNotAccessMemory,
  /* x86_avx512_kor_w */ DoesNotAccessMemory,
  /* x86_avx512_kortestc_w */ DoesNotAccessMemory,
  /* x86_avx512_kortestz_w */ DoesNotAccessMemory,
  /* x86_avx512_kunpck_bw */ DoesNotAccessMemory,
  /* x86_avx512_kxnor_w */ DoesNotAccessMemory,
  /* x86_avx512_kxor_w */ DoesNotAccessMemory,
  /* x86_avx512_mask_blend_d_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_blend_pd_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_blend_ps_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_blend_q_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_cmp_pd_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_cmp_ps_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_conflict_d_512 */ UnknownModRefBehavior,
  /* x86_avx512_mask_conflict_q_512 */ UnknownModRefBehavior,
  /* x86_avx512_mask_cvtdq2pd_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_cvtdq2ps_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_cvtpd2dq_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_cvtpd2ps_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_cvtpd2udq_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_cvtps2dq_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_cvtps2udq_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_cvttpd2dq_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_cvttpd2udq_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_cvttps2dq_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_cvttps2udq_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_cvtudq2pd_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_cvtudq2ps_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_loadu_d_512 */ OnlyReadsArgumentPointees,
  /* x86_avx512_mask_loadu_pd_512 */ OnlyReadsArgumentPointees,
  /* x86_avx512_mask_loadu_ps_512 */ OnlyReadsArgumentPointees,
  /* x86_avx512_mask_loadu_q_512 */ OnlyReadsArgumentPointees,
  /* x86_avx512_mask_lzcnt_d_512 */ UnknownModRefBehavior,
  /* x86_avx512_mask_lzcnt_q_512 */ UnknownModRefBehavior,
  /* x86_avx512_mask_max_pd_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_max_ps_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_min_pd_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_min_ps_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_pabs_d_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_pabs_q_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_pand_d_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_pand_q_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_pbroadcast_d_gpr_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_pbroadcast_q_gpr_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_pbroadcast_q_mem_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_pcmpeq_d_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_pcmpeq_q_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_pmaxs_d_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_pmaxs_q_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_pmaxu_d_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_pmaxu_q_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_pmins_d_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_pmins_q_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_pminu_d_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_pminu_q_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_pmul_dq_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_pmulu_dq_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_ptestm_d_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_ptestm_q_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_rndscale_pd_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_rndscale_ps_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_storeu_d_512 */ OnlyAccessesArgumentPointees,
  /* x86_avx512_mask_storeu_pd_512 */ OnlyAccessesArgumentPointees,
  /* x86_avx512_mask_storeu_ps_512 */ OnlyAccessesArgumentPointees,
  /* x86_avx512_mask_storeu_q_512 */ OnlyAccessesArgumentPointees,
  /* x86_avx512_mask_vcvtph2ps_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_vcvtps2ph_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_vpermt_d_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_vpermt_pd_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_vpermt_ps_512 */ DoesNotAccessMemory,
  /* x86_avx512_mask_vpermt_q_512 */ DoesNotAccessMemory,
  /* x86_avx512_movntdqa */ OnlyReadsMemory,
  /* x86_avx512_pbroadcastd_512 */ DoesNotAccessMemory,
  /* x86_avx512_pbroadcastd_i32_512 */ DoesNotAccessMemory,
  /* x86_avx512_pbroadcastq_512 */ DoesNotAccessMemory,
  /* x86_avx512_pbroadcastq_i64_512 */ DoesNotAccessMemory,
  /* x86_avx512_pmovzxbd */ DoesNotAccessMemory,
  /* x86_avx512_pmovzxbq */ DoesNotAccessMemory,
  /* x86_avx512_pmovzxdq */ DoesNotAccessMemory,
  /* x86_avx512_pmovzxwd */ DoesNotAccessMemory,
  /* x86_avx512_pmovzxwq */ DoesNotAccessMemory,
  /* x86_avx512_psll_dq */ DoesNotAccessMemory,
  /* x86_avx512_psll_dq_bs */ DoesNotAccessMemory,
  /* x86_avx512_psrl_dq */ DoesNotAccessMemory,
  /* x86_avx512_psrl_dq_bs */ DoesNotAccessMemory,
  /* x86_avx512_rcp14_pd_512 */ DoesNotAccessMemory,
  /* x86_avx512_rcp14_ps_512 */ DoesNotAccessMemory,
  /* x86_avx512_rcp14_sd */ DoesNotAccessMemory,
  /* x86_avx512_rcp14_ss */ DoesNotAccessMemory,
  /* x86_avx512_rcp28_pd */ DoesNotAccessMemory,
  /* x86_avx512_rcp28_ps */ DoesNotAccessMemory,
  /* x86_avx512_rcp28_sd */ DoesNotAccessMemory,
  /* x86_avx512_rcp28_ss */ DoesNotAccessMemory,
  /* x86_avx512_rndscale_sd */ DoesNotAccessMemory,
  /* x86_avx512_rndscale_ss */ DoesNotAccessMemory,
  /* x86_avx512_rsqrt14_pd_512 */ DoesNotAccessMemory,
  /* x86_avx512_rsqrt14_ps_512 */ DoesNotAccessMemory,
  /* x86_avx512_rsqrt14_sd */ DoesNotAccessMemory,
  /* x86_avx512_rsqrt14_ss */ DoesNotAccessMemory,
  /* x86_avx512_rsqrt28_pd */ DoesNotAccessMemory,
  /* x86_avx512_rsqrt28_ps */ DoesNotAccessMemory,
  /* x86_avx512_rsqrt28_sd */ DoesNotAccessMemory,
  /* x86_avx512_rsqrt28_ss */ DoesNotAccessMemory,
  /* x86_avx512_scatter_dpd_512 */ OnlyAccessesArgumentPointees,
  /* x86_avx512_scatter_dpi_512 */ OnlyAccessesArgumentPointees,
  /* x86_avx512_scatter_dpq_512 */ OnlyAccessesArgumentPointees,
  /* x86_avx512_scatter_dps_512 */ OnlyAccessesArgumentPointees,
  /* x86_avx512_scatter_qpd_512 */ OnlyAccessesArgumentPointees,
  /* x86_avx512_scatter_qpi_512 */ OnlyAccessesArgumentPointees,
  /* x86_avx512_scatter_qpq_512 */ OnlyAccessesArgumentPointees,
  /* x86_avx512_scatter_qps_512 */ OnlyAccessesArgumentPointees,
  /* x86_avx512_scatterpf_dpd_512 */ OnlyAccessesArgumentPointees,
  /* x86_avx512_scatterpf_dps_512 */ OnlyAccessesArgumentPointees,
  /* x86_avx512_scatterpf_qpd_512 */ OnlyAccessesArgumentPointees,
  /* x86_avx512_scatterpf_qps_512 */ OnlyAccessesArgumentPointees,
  /* x86_avx512_sqrt_pd_512 */ DoesNotAccessMemory,
  /* x86_avx512_sqrt_ps_512 */ DoesNotAccessMemory,
  /* x86_avx512_sqrt_sd */ DoesNotAccessMemory,
  /* x86_avx512_sqrt_ss */ DoesNotAccessMemory,
  /* x86_avx512_vbroadcast_sd_512 */ OnlyReadsArgumentPointees,
  /* x86_avx512_vbroadcast_sd_pd_512 */ DoesNotAccessMemory,
  /* x86_avx512_vbroadcast_ss_512 */ OnlyReadsArgumentPointees,
  /* x86_avx512_vbroadcast_ss_ps_512 */ DoesNotAccessMemory,
  /* x86_avx_addsub_pd_256 */ DoesNotAccessMemory,
  /* x86_avx_addsub_ps_256 */ DoesNotAccessMemory,
  /* x86_avx_blend_pd_256 */ DoesNotAccessMemory,
  /* x86_avx_blend_ps_256 */ DoesNotAccessMemory,
  /* x86_avx_blendv_pd_256 */ DoesNotAccessMemory,
  /* x86_avx_blendv_ps_256 */ DoesNotAccessMemory,
  /* x86_avx_cmp_pd_256 */ DoesNotAccessMemory,
  /* x86_avx_cmp_ps_256 */ DoesNotAccessMemory,
  /* x86_avx_cvt_pd2_ps_256 */ DoesNotAccessMemory,
  /* x86_avx_cvt_pd2dq_256 */ DoesNotAccessMemory,
  /* x86_avx_cvt_ps2_pd_256 */ DoesNotAccessMemory,
  /* x86_avx_cvt_ps2dq_256 */ DoesNotAccessMemory,
  /* x86_avx_cvtdq2_pd_256 */ DoesNotAccessMemory,
  /* x86_avx_cvtdq2_ps_256 */ DoesNotAccessMemory,
  /* x86_avx_cvtt_pd2dq_256 */ DoesNotAccessMemory,
  /* x86_avx_cvtt_ps2dq_256 */ DoesNotAccessMemory,
  /* x86_avx_dp_ps_256 */ DoesNotAccessMemory,
  /* x86_avx_hadd_pd_256 */ DoesNotAccessMemory,
  /* x86_avx_hadd_ps_256 */ DoesNotAccessMemory,
  /* x86_avx_hsub_pd_256 */ DoesNotAccessMemory,
  /* x86_avx_hsub_ps_256 */ DoesNotAccessMemory,
  /* x86_avx_ldu_dq_256 */ OnlyReadsMemory,
  /* x86_avx_maskload_pd */ OnlyReadsArgumentPointees,
  /* x86_avx_maskload_pd_256 */ OnlyReadsArgumentPointees,
  /* x86_avx_maskload_ps */ OnlyReadsArgumentPointees,
  /* x86_avx_maskload_ps_256 */ OnlyReadsArgumentPointees,
  /* x86_avx_maskstore_pd */ OnlyAccessesArgumentPointees,
  /* x86_avx_maskstore_pd_256 */ OnlyAccessesArgumentPointees,
  /* x86_avx_maskstore_ps */ OnlyAccessesArgumentPointees,
  /* x86_avx_maskstore_ps_256 */ OnlyAccessesArgumentPointees,
  /* x86_avx_max_pd_256 */ DoesNotAccessMemory,
  /* x86_avx_max_ps_256 */ DoesNotAccessMemory,
  /* x86_avx_min_pd_256 */ DoesNotAccessMemory,
  /* x86_avx_min_ps_256 */ DoesNotAccessMemory,
  /* x86_avx_movmsk_pd_256 */ DoesNotAccessMemory,
  /* x86_avx_movmsk_ps_256 */ DoesNotAccessMemory,
  /* x86_avx_ptestc_256 */ DoesNotAccessMemory,
  /* x86_avx_ptestnzc_256 */ DoesNotAccessMemory,
  /* x86_avx_ptestz_256 */ DoesNotAccessMemory,
  /* x86_avx_rcp_ps_256 */ DoesNotAccessMemory,
  /* x86_avx_round_pd_256 */ DoesNotAccessMemory,
  /* x86_avx_round_ps_256 */ DoesNotAccessMemory,
  /* x86_avx_rsqrt_ps_256 */ DoesNotAccessMemory,
  /* x86_avx_sqrt_pd_256 */ DoesNotAccessMemory,
  /* x86_avx_sqrt_ps_256 */ DoesNotAccessMemory,
  /* x86_avx_storeu_dq_256 */ OnlyAccessesArgumentPointees,
  /* x86_avx_storeu_pd_256 */ OnlyAccessesArgumentPointees,
  /* x86_avx_storeu_ps_256 */ OnlyAccessesArgumentPointees,
  /* x86_avx_vbroadcastf128_pd_256 */ OnlyReadsArgumentPointees,
  /* x86_avx_vbroadcastf128_ps_256 */ OnlyReadsArgumentPointees,
  /* x86_avx_vextractf128_pd_256 */ DoesNotAccessMemory,
  /* x86_avx_vextractf128_ps_256 */ DoesNotAccessMemory,
  /* x86_avx_vextractf128_si_256 */ DoesNotAccessMemory,
  /* x86_avx_vinsertf128_pd_256 */ DoesNotAccessMemory,
  /* x86_avx_vinsertf128_ps_256 */ DoesNotAccessMemory,
  /* x86_avx_vinsertf128_si_256 */ DoesNotAccessMemory,
  /* x86_avx_vperm2f128_pd_256 */ DoesNotAccessMemory,
  /* x86_avx_vperm2f128_ps_256 */ DoesNotAccessMemory,
  /* x86_avx_vperm2f128_si_256 */ DoesNotAccessMemory,
  /* x86_avx_vpermilvar_pd */ DoesNotAccessMemory,
  /* x86_avx_vpermilvar_pd_256 */ DoesNotAccessMemory,
  /* x86_avx_vpermilvar_ps */ DoesNotAccessMemory,
  /* x86_avx_vpermilvar_ps_256 */ DoesNotAccessMemory,
  /* x86_avx_vtestc_pd */ DoesNotAccessMemory,
  /* x86_avx_vtestc_pd_256 */ DoesNotAccessMemory,
  /* x86_avx_vtestc_ps */ DoesNotAccessMemory,
  /* x86_avx_vtestc_ps_256 */ DoesNotAccessMemory,
  /* x86_avx_vtestnzc_pd */ DoesNotAccessMemory,
  /* x86_avx_vtestnzc_pd_256 */ DoesNotAccessMemory,
  /* x86_avx_vtestnzc_ps */ DoesNotAccessMemory,
  /* x86_avx_vtestnzc_ps_256 */ DoesNotAccessMemory,
  /* x86_avx_vtestz_pd */ DoesNotAccessMemory,
  /* x86_avx_vtestz_pd_256 */ DoesNotAccessMemory,
  /* x86_avx_vtestz_ps */ DoesNotAccessMemory,
  /* x86_avx_vtestz_ps_256 */ DoesNotAccessMemory,
  /* x86_avx_vzeroall */ UnknownModRefBehavior,
  /* x86_avx_vzeroupper */ UnknownModRefBehavior,
  /* x86_bmi_bextr_32 */ DoesNotAccessMemory,
  /* x86_bmi_bextr_64 */ DoesNotAccessMemory,
  /* x86_bmi_bzhi_32 */ DoesNotAccessMemory,
  /* x86_bmi_bzhi_64 */ DoesNotAccessMemory,
  /* x86_bmi_pdep_32 */ DoesNotAccessMemory,
  /* x86_bmi_pdep_64 */ DoesNotAccessMemory,
  /* x86_bmi_pext_32 */ DoesNotAccessMemory,
  /* x86_bmi_pext_64 */ DoesNotAccessMemory,
  /* x86_fma_vfmadd_pd */ DoesNotAccessMemory,
  /* x86_fma_vfmadd_pd_256 */ DoesNotAccessMemory,
  /* x86_fma_vfmadd_pd_512 */ DoesNotAccessMemory,
  /* x86_fma_vfmadd_ps */ DoesNotAccessMemory,
  /* x86_fma_vfmadd_ps_256 */ DoesNotAccessMemory,
  /* x86_fma_vfmadd_ps_512 */ DoesNotAccessMemory,
  /* x86_fma_vfmadd_sd */ DoesNotAccessMemory,
  /* x86_fma_vfmadd_ss */ DoesNotAccessMemory,
  /* x86_fma_vfmaddsub_pd */ DoesNotAccessMemory,
  /* x86_fma_vfmaddsub_pd_256 */ DoesNotAccessMemory,
  /* x86_fma_vfmaddsub_pd_512 */ DoesNotAccessMemory,
  /* x86_fma_vfmaddsub_ps */ DoesNotAccessMemory,
  /* x86_fma_vfmaddsub_ps_256 */ DoesNotAccessMemory,
  /* x86_fma_vfmaddsub_ps_512 */ DoesNotAccessMemory,
  /* x86_fma_vfmsub_pd */ DoesNotAccessMemory,
  /* x86_fma_vfmsub_pd_256 */ DoesNotAccessMemory,
  /* x86_fma_vfmsub_pd_512 */ DoesNotAccessMemory,
  /* x86_fma_vfmsub_ps */ DoesNotAccessMemory,
  /* x86_fma_vfmsub_ps_256 */ DoesNotAccessMemory,
  /* x86_fma_vfmsub_ps_512 */ DoesNotAccessMemory,
  /* x86_fma_vfmsub_sd */ DoesNotAccessMemory,
  /* x86_fma_vfmsub_ss */ DoesNotAccessMemory,
  /* x86_fma_vfmsubadd_pd */ DoesNotAccessMemory,
  /* x86_fma_vfmsubadd_pd_256 */ DoesNotAccessMemory,
  /* x86_fma_vfmsubadd_pd_512 */ DoesNotAccessMemory,
  /* x86_fma_vfmsubadd_ps */ DoesNotAccessMemory,
  /* x86_fma_vfmsubadd_ps_256 */ DoesNotAccessMemory,
  /* x86_fma_vfmsubadd_ps_512 */ DoesNotAccessMemory,
  /* x86_fma_vfnmadd_pd */ DoesNotAccessMemory,
  /* x86_fma_vfnmadd_pd_256 */ DoesNotAccessMemory,
  /* x86_fma_vfnmadd_pd_512 */ DoesNotAccessMemory,
  /* x86_fma_vfnmadd_ps */ DoesNotAccessMemory,
  /* x86_fma_vfnmadd_ps_256 */ DoesNotAccessMemory,
  /* x86_fma_vfnmadd_ps_512 */ DoesNotAccessMemory,
  /* x86_fma_vfnmadd_sd */ DoesNotAccessMemory,
  /* x86_fma_vfnmadd_ss */ DoesNotAccessMemory,
  /* x86_fma_vfnmsub_pd */ DoesNotAccessMemory,
  /* x86_fma_vfnmsub_pd_256 */ DoesNotAccessMemory,
  /* x86_fma_vfnmsub_pd_512 */ DoesNotAccessMemory,
  /* x86_fma_vfnmsub_ps */ DoesNotAccessMemory,
  /* x86_fma_vfnmsub_ps_256 */ DoesNotAccessMemory,
  /* x86_fma_vfnmsub_ps_512 */ DoesNotAccessMemory,
  /* x86_fma_vfnmsub_sd */ DoesNotAccessMemory,
  /* x86_fma_vfnmsub_ss */ DoesNotAccessMemory,
  /* x86_int */ UnknownModRefBehavior,
  /* x86_mmx_emms */ UnknownModRefBehavior,
  /* x86_mmx_femms */ UnknownModRefBehavior,
  /* x86_mmx_maskmovq */ UnknownModRefBehavior,
  /* x86_mmx_movnt_dq */ UnknownModRefBehavior,
  /* x86_mmx_packssdw */ DoesNotAccessMemory,
  /* x86_mmx_packsswb */ DoesNotAccessMemory,
  /* x86_mmx_packuswb */ DoesNotAccessMemory,
  /* x86_mmx_padd_b */ DoesNotAccessMemory,
  /* x86_mmx_padd_d */ DoesNotAccessMemory,
  /* x86_mmx_padd_q */ DoesNotAccessMemory,
  /* x86_mmx_padd_w */ DoesNotAccessMemory,
  /* x86_mmx_padds_b */ DoesNotAccessMemory,
  /* x86_mmx_padds_w */ DoesNotAccessMemory,
  /* x86_mmx_paddus_b */ DoesNotAccessMemory,
  /* x86_mmx_paddus_w */ DoesNotAccessMemory,
  /* x86_mmx_palignr_b */ DoesNotAccessMemory,
  /* x86_mmx_pand */ DoesNotAccessMemory,
  /* x86_mmx_pandn */ DoesNotAccessMemory,
  /* x86_mmx_pavg_b */ DoesNotAccessMemory,
  /* x86_mmx_pavg_w */ DoesNotAccessMemory,
  /* x86_mmx_pcmpeq_b */ DoesNotAccessMemory,
  /* x86_mmx_pcmpeq_d */ DoesNotAccessMemory,
  /* x86_mmx_pcmpeq_w */ DoesNotAccessMemory,
  /* x86_mmx_pcmpgt_b */ DoesNotAccessMemory,
  /* x86_mmx_pcmpgt_d */ DoesNotAccessMemory,
  /* x86_mmx_pcmpgt_w */ DoesNotAccessMemory,
  /* x86_mmx_pextr_w */ DoesNotAccessMemory,
  /* x86_mmx_pinsr_w */ DoesNotAccessMemory,
  /* x86_mmx_pmadd_wd */ DoesNotAccessMemory,
  /* x86_mmx_pmaxs_w */ DoesNotAccessMemory,
  /* x86_mmx_pmaxu_b */ DoesNotAccessMemory,
  /* x86_mmx_pmins_w */ DoesNotAccessMemory,
  /* x86_mmx_pminu_b */ DoesNotAccessMemory,
  /* x86_mmx_pmovmskb */ DoesNotAccessMemory,
  /* x86_mmx_pmulh_w */ DoesNotAccessMemory,
  /* x86_mmx_pmulhu_w */ DoesNotAccessMemory,
  /* x86_mmx_pmull_w */ DoesNotAccessMemory,
  /* x86_mmx_pmulu_dq */ DoesNotAccessMemory,
  /* x86_mmx_por */ DoesNotAccessMemory,
  /* x86_mmx_psad_bw */ DoesNotAccessMemory,
  /* x86_mmx_psll_d */ DoesNotAccessMemory,
  /* x86_mmx_psll_q */ DoesNotAccessMemory,
  /* x86_mmx_psll_w */ DoesNotAccessMemory,
  /* x86_mmx_pslli_d */ DoesNotAccessMemory,
  /* x86_mmx_pslli_q */ DoesNotAccessMemory,
  /* x86_mmx_pslli_w */ DoesNotAccessMemory,
  /* x86_mmx_psra_d */ DoesNotAccessMemory,
  /* x86_mmx_psra_w */ DoesNotAccessMemory,
  /* x86_mmx_psrai_d */ DoesNotAccessMemory,
  /* x86_mmx_psrai_w */ DoesNotAccessMemory,
  /* x86_mmx_psrl_d */ DoesNotAccessMemory,
  /* x86_mmx_psrl_q */ DoesNotAccessMemory,
  /* x86_mmx_psrl_w */ DoesNotAccessMemory,
  /* x86_mmx_psrli_d */ DoesNotAccessMemory,
  /* x86_mmx_psrli_q */ DoesNotAccessMemory,
  /* x86_mmx_psrli_w */ DoesNotAccessMemory,
  /* x86_mmx_psub_b */ DoesNotAccessMemory,
  /* x86_mmx_psub_d */ DoesNotAccessMemory,
  /* x86_mmx_psub_q */ DoesNotAccessMemory,
  /* x86_mmx_psub_w */ DoesNotAccessMemory,
  /* x86_mmx_psubs_b */ DoesNotAccessMemory,
  /* x86_mmx_psubs_w */ DoesNotAccessMemory,
  /* x86_mmx_psubus_b */ DoesNotAccessMemory,
  /* x86_mmx_psubus_w */ DoesNotAccessMemory,
  /* x86_mmx_punpckhbw */ DoesNotAccessMemory,
  /* x86_mmx_punpckhdq */ DoesNotAccessMemory,
  /* x86_mmx_punpckhwd */ DoesNotAccessMemory,
  /* x86_mmx_punpcklbw */ DoesNotAccessMemory,
  /* x86_mmx_punpckldq */ DoesNotAccessMemory,
  /* x86_mmx_punpcklwd */ DoesNotAccessMemory,
  /* x86_mmx_pxor */ DoesNotAccessMemory,
  /* x86_pclmulqdq */ DoesNotAccessMemory,
  /* x86_rdfsbase_32 */ UnknownModRefBehavior,
  /* x86_rdfsbase_64 */ UnknownModRefBehavior,
  /* x86_rdgsbase_32 */ UnknownModRefBehavior,
  /* x86_rdgsbase_64 */ UnknownModRefBehavior,
  /* x86_rdpmc */ UnknownModRefBehavior,
  /* x86_rdrand_16 */ UnknownModRefBehavior,
  /* x86_rdrand_32 */ UnknownModRefBehavior,
  /* x86_rdrand_64 */ UnknownModRefBehavior,
  /* x86_rdseed_16 */ UnknownModRefBehavior,
  /* x86_rdseed_32 */ UnknownModRefBehavior,
  /* x86_rdseed_64 */ UnknownModRefBehavior,
  /* x86_rdtsc */ UnknownModRefBehavior,
  /* x86_rdtscp */ OnlyAccessesArgumentPointees,
  /* x86_sha1msg1 */ DoesNotAccessMemory,
  /* x86_sha1msg2 */ DoesNotAccessMemory,
  /* x86_sha1nexte */ DoesNotAccessMemory,
  /* x86_sha1rnds4 */ DoesNotAccessMemory,
  /* x86_sha256msg1 */ DoesNotAccessMemory,
  /* x86_sha256msg2 */ DoesNotAccessMemory,
  /* x86_sha256rnds2 */ DoesNotAccessMemory,
  /* x86_sse2_add_sd */ DoesNotAccessMemory,
  /* x86_sse2_clflush */ UnknownModRefBehavior,
  /* x86_sse2_cmp_pd */ DoesNotAccessMemory,
  /* x86_sse2_cmp_sd */ DoesNotAccessMemory,
  /* x86_sse2_comieq_sd */ DoesNotAccessMemory,
  /* x86_sse2_comige_sd */ DoesNotAccessMemory,
  /* x86_sse2_comigt_sd */ DoesNotAccessMemory,
  /* x86_sse2_comile_sd */ DoesNotAccessMemory,
  /* x86_sse2_comilt_sd */ DoesNotAccessMemory,
  /* x86_sse2_comineq_sd */ DoesNotAccessMemory,
  /* x86_sse2_cvtdq2pd */ DoesNotAccessMemory,
  /* x86_sse2_cvtdq2ps */ DoesNotAccessMemory,
  /* x86_sse2_cvtpd2dq */ DoesNotAccessMemory,
  /* x86_sse2_cvtpd2ps */ DoesNotAccessMemory,
  /* x86_sse2_cvtps2dq */ DoesNotAccessMemory,
  /* x86_sse2_cvtps2pd */ DoesNotAccessMemory,
  /* x86_sse2_cvtsd2si */ DoesNotAccessMemory,
  /* x86_sse2_cvtsd2si64 */ DoesNotAccessMemory,
  /* x86_sse2_cvtsd2ss */ DoesNotAccessMemory,
  /* x86_sse2_cvtsi2sd */ DoesNotAccessMemory,
  /* x86_sse2_cvtsi642sd */ DoesNotAccessMemory,
  /* x86_sse2_cvtss2sd */ DoesNotAccessMemory,
  /* x86_sse2_cvttpd2dq */ DoesNotAccessMemory,
  /* x86_sse2_cvttps2dq */ DoesNotAccessMemory,
  /* x86_sse2_cvttsd2si */ DoesNotAccessMemory,
  /* x86_sse2_cvttsd2si64 */ DoesNotAccessMemory,
  /* x86_sse2_div_sd */ DoesNotAccessMemory,
  /* x86_sse2_lfence */ UnknownModRefBehavior,
  /* x86_sse2_maskmov_dqu */ UnknownModRefBehavior,
  /* x86_sse2_max_pd */ DoesNotAccessMemory,
  /* x86_sse2_max_sd */ DoesNotAccessMemory,
  /* x86_sse2_mfence */ UnknownModRefBehavior,
  /* x86_sse2_min_pd */ DoesNotAccessMemory,
  /* x86_sse2_min_sd */ DoesNotAccessMemory,
  /* x86_sse2_movmsk_pd */ DoesNotAccessMemory,
  /* x86_sse2_mul_sd */ DoesNotAccessMemory,
  /* x86_sse2_packssdw_128 */ DoesNotAccessMemory,
  /* x86_sse2_packsswb_128 */ DoesNotAccessMemory,
  /* x86_sse2_packuswb_128 */ DoesNotAccessMemory,
  /* x86_sse2_padds_b */ DoesNotAccessMemory,
  /* x86_sse2_padds_w */ DoesNotAccessMemory,
  /* x86_sse2_paddus_b */ DoesNotAccessMemory,
  /* x86_sse2_paddus_w */ DoesNotAccessMemory,
  /* x86_sse2_pause */ UnknownModRefBehavior,
  /* x86_sse2_pavg_b */ DoesNotAccessMemory,
  /* x86_sse2_pavg_w */ DoesNotAccessMemory,
  /* x86_sse2_pmadd_wd */ DoesNotAccessMemory,
  /* x86_sse2_pmaxs_w */ DoesNotAccessMemory,
  /* x86_sse2_pmaxu_b */ DoesNotAccessMemory,
  /* x86_sse2_pmins_w */ DoesNotAccessMemory,
  /* x86_sse2_pminu_b */ DoesNotAccessMemory,
  /* x86_sse2_pmovmskb_128 */ DoesNotAccessMemory,
  /* x86_sse2_pmulh_w */ DoesNotAccessMemory,
  /* x86_sse2_pmulhu_w */ DoesNotAccessMemory,
  /* x86_sse2_pmulu_dq */ DoesNotAccessMemory,
  /* x86_sse2_psad_bw */ DoesNotAccessMemory,
  /* x86_sse2_pshuf_d */ DoesNotAccessMemory,
  /* x86_sse2_pshufh_w */ DoesNotAccessMemory,
  /* x86_sse2_pshufl_w */ DoesNotAccessMemory,
  /* x86_sse2_psll_d */ DoesNotAccessMemory,
  /* x86_sse2_psll_dq */ DoesNotAccessMemory,
  /* x86_sse2_psll_dq_bs */ DoesNotAccessMemory,
  /* x86_sse2_psll_q */ DoesNotAccessMemory,
  /* x86_sse2_psll_w */ DoesNotAccessMemory,
  /* x86_sse2_pslli_d */ DoesNotAccessMemory,
  /* x86_sse2_pslli_q */ DoesNotAccessMemory,
  /* x86_sse2_pslli_w */ DoesNotAccessMemory,
  /* x86_sse2_psra_d */ DoesNotAccessMemory,
  /* x86_sse2_psra_w */ DoesNotAccessMemory,
  /* x86_sse2_psrai_d */ DoesNotAccessMemory,
  /* x86_sse2_psrai_w */ DoesNotAccessMemory,
  /* x86_sse2_psrl_d */ DoesNotAccessMemory,
  /* x86_sse2_psrl_dq */ DoesNotAccessMemory,
  /* x86_sse2_psrl_dq_bs */ DoesNotAccessMemory,
  /* x86_sse2_psrl_q */ DoesNotAccessMemory,
  /* x86_sse2_psrl_w */ DoesNotAccessMemory,
  /* x86_sse2_psrli_d */ DoesNotAccessMemory,
  /* x86_sse2_psrli_q */ DoesNotAccessMemory,
  /* x86_sse2_psrli_w */ DoesNotAccessMemory,
  /* x86_sse2_psubs_b */ DoesNotAccessMemory,
  /* x86_sse2_psubs_w */ DoesNotAccessMemory,
  /* x86_sse2_psubus_b */ DoesNotAccessMemory,
  /* x86_sse2_psubus_w */ DoesNotAccessMemory,
  /* x86_sse2_sqrt_pd */ DoesNotAccessMemory,
  /* x86_sse2_sqrt_sd */ DoesNotAccessMemory,
  /* x86_sse2_storel_dq */ OnlyAccessesArgumentPointees,
  /* x86_sse2_storeu_dq */ OnlyAccessesArgumentPointees,
  /* x86_sse2_storeu_pd */ OnlyAccessesArgumentPointees,
  /* x86_sse2_sub_sd */ DoesNotAccessMemory,
  /* x86_sse2_ucomieq_sd */ DoesNotAccessMemory,
  /* x86_sse2_ucomige_sd */ DoesNotAccessMemory,
  /* x86_sse2_ucomigt_sd */ DoesNotAccessMemory,
  /* x86_sse2_ucomile_sd */ DoesNotAccessMemory,
  /* x86_sse2_ucomilt_sd */ DoesNotAccessMemory,
  /* x86_sse2_ucomineq_sd */ DoesNotAccessMemory,
  /* x86_sse3_addsub_pd */ DoesNotAccessMemory,
  /* x86_sse3_addsub_ps */ DoesNotAccessMemory,
  /* x86_sse3_hadd_pd */ DoesNotAccessMemory,
  /* x86_sse3_hadd_ps */ DoesNotAccessMemory,
  /* x86_sse3_hsub_pd */ DoesNotAccessMemory,
  /* x86_sse3_hsub_ps */ DoesNotAccessMemory,
  /* x86_sse3_ldu_dq */ OnlyReadsMemory,
  /* x86_sse3_monitor */ UnknownModRefBehavior,
  /* x86_sse3_mwait */ UnknownModRefBehavior,
  /* x86_sse41_blendpd */ DoesNotAccessMemory,
  /* x86_sse41_blendps */ DoesNotAccessMemory,
  /* x86_sse41_blendvpd */ DoesNotAccessMemory,
  /* x86_sse41_blendvps */ DoesNotAccessMemory,
  /* x86_sse41_dppd */ DoesNotAccessMemory,
  /* x86_sse41_dpps */ DoesNotAccessMemory,
  /* x86_sse41_extractps */ DoesNotAccessMemory,
  /* x86_sse41_insertps */ DoesNotAccessMemory,
  /* x86_sse41_movntdqa */ OnlyReadsMemory,
  /* x86_sse41_mpsadbw */ DoesNotAccessMemory,
  /* x86_sse41_packusdw */ DoesNotAccessMemory,
  /* x86_sse41_pblendvb */ DoesNotAccessMemory,
  /* x86_sse41_pblendw */ DoesNotAccessMemory,
  /* x86_sse41_pextrb */ DoesNotAccessMemory,
  /* x86_sse41_pextrd */ DoesNotAccessMemory,
  /* x86_sse41_pextrq */ DoesNotAccessMemory,
  /* x86_sse41_phminposuw */ DoesNotAccessMemory,
  /* x86_sse41_pmaxsb */ DoesNotAccessMemory,
  /* x86_sse41_pmaxsd */ DoesNotAccessMemory,
  /* x86_sse41_pmaxud */ DoesNotAccessMemory,
  /* x86_sse41_pmaxuw */ DoesNotAccessMemory,
  /* x86_sse41_pminsb */ DoesNotAccessMemory,
  /* x86_sse41_pminsd */ DoesNotAccessMemory,
  /* x86_sse41_pminud */ DoesNotAccessMemory,
  /* x86_sse41_pminuw */ DoesNotAccessMemory,
  /* x86_sse41_pmovsxbd */ DoesNotAccessMemory,
  /* x86_sse41_pmovsxbq */ DoesNotAccessMemory,
  /* x86_sse41_pmovsxbw */ DoesNotAccessMemory,
  /* x86_sse41_pmovsxdq */ DoesNotAccessMemory,
  /* x86_sse41_pmovsxwd */ DoesNotAccessMemory,
  /* x86_sse41_pmovsxwq */ DoesNotAccessMemory,
  /* x86_sse41_pmovzxbd */ DoesNotAccessMemory,
  /* x86_sse41_pmovzxbq */ DoesNotAccessMemory,
  /* x86_sse41_pmovzxbw */ DoesNotAccessMemory,
  /* x86_sse41_pmovzxdq */ DoesNotAccessMemory,
  /* x86_sse41_pmovzxwd */ DoesNotAccessMemory,
  /* x86_sse41_pmovzxwq */ DoesNotAccessMemory,
  /* x86_sse41_pmuldq */ DoesNotAccessMemory,
  /* x86_sse41_ptestc */ DoesNotAccessMemory,
  /* x86_sse41_ptestnzc */ DoesNotAccessMemory,
  /* x86_sse41_ptestz */ DoesNotAccessMemory,
  /* x86_sse41_round_pd */ DoesNotAccessMemory,
  /* x86_sse41_round_ps */ DoesNotAccessMemory,
  /* x86_sse41_round_sd */ DoesNotAccessMemory,
  /* x86_sse41_round_ss */ DoesNotAccessMemory,
  /* x86_sse42_crc32_32_16 */ DoesNotAccessMemory,
  /* x86_sse42_crc32_32_32 */ DoesNotAccessMemory,
  /* x86_sse42_crc32_32_8 */ DoesNotAccessMemory,
  /* x86_sse42_crc32_64_64 */ DoesNotAccessMemory,
  /* x86_sse42_pcmpestri128 */ DoesNotAccessMemory,
  /* x86_sse42_pcmpestria128 */ DoesNotAccessMemory,
  /* x86_sse42_pcmpestric128 */ DoesNotAccessMemory,
  /* x86_sse42_pcmpestrio128 */ DoesNotAccessMemory,
  /* x86_sse42_pcmpestris128 */ DoesNotAccessMemory,
  /* x86_sse42_pcmpestriz128 */ DoesNotAccessMemory,
  /* x86_sse42_pcmpestrm128 */ DoesNotAccessMemory,
  /* x86_sse42_pcmpistri128 */ DoesNotAccessMemory,
  /* x86_sse42_pcmpistria128 */ DoesNotAccessMemory,
  /* x86_sse42_pcmpistric128 */ DoesNotAccessMemory,
  /* x86_sse42_pcmpistrio128 */ DoesNotAccessMemory,
  /* x86_sse42_pcmpistris128 */ DoesNotAccessMemory,
  /* x86_sse42_pcmpistriz128 */ DoesNotAccessMemory,
  /* x86_sse42_pcmpistrm128 */ DoesNotAccessMemory,
  /* x86_sse4a_extrq */ DoesNotAccessMemory,
  /* x86_sse4a_extrqi */ DoesNotAccessMemory,
  /* x86_sse4a_insertq */ DoesNotAccessMemory,
  /* x86_sse4a_insertqi */ DoesNotAccessMemory,
  /* x86_sse4a_movnt_sd */ UnknownModRefBehavior,
  /* x86_sse4a_movnt_ss */ UnknownModRefBehavior,
  /* x86_sse_add_ss */ DoesNotAccessMemory,
  /* x86_sse_cmp_ps */ DoesNotAccessMemory,
  /* x86_sse_cmp_ss */ DoesNotAccessMemory,
  /* x86_sse_comieq_ss */ DoesNotAccessMemory,
  /* x86_sse_comige_ss */ DoesNotAccessMemory,
  /* x86_sse_comigt_ss */ DoesNotAccessMemory,
  /* x86_sse_comile_ss */ DoesNotAccessMemory,
  /* x86_sse_comilt_ss */ DoesNotAccessMemory,
  /* x86_sse_comineq_ss */ DoesNotAccessMemory,
  /* x86_sse_cvtpd2pi */ DoesNotAccessMemory,
  /* x86_sse_cvtpi2pd */ DoesNotAccessMemory,
  /* x86_sse_cvtpi2ps */ DoesNotAccessMemory,
  /* x86_sse_cvtps2pi */ DoesNotAccessMemory,
  /* x86_sse_cvtsi2ss */ DoesNotAccessMemory,
  /* x86_sse_cvtsi642ss */ DoesNotAccessMemory,
  /* x86_sse_cvtss2si */ DoesNotAccessMemory,
  /* x86_sse_cvtss2si64 */ DoesNotAccessMemory,
  /* x86_sse_cvttpd2pi */ DoesNotAccessMemory,
  /* x86_sse_cvttps2pi */ DoesNotAccessMemory,
  /* x86_sse_cvttss2si */ DoesNotAccessMemory,
  /* x86_sse_cvttss2si64 */ DoesNotAccessMemory,
  /* x86_sse_div_ss */ DoesNotAccessMemory,
  /* x86_sse_ldmxcsr */ UnknownModRefBehavior,
  /* x86_sse_max_ps */ DoesNotAccessMemory,
  /* x86_sse_max_ss */ DoesNotAccessMemory,
  /* x86_sse_min_ps */ DoesNotAccessMemory,
  /* x86_sse_min_ss */ DoesNotAccessMemory,
  /* x86_sse_movmsk_ps */ DoesNotAccessMemory,
  /* x86_sse_mul_ss */ DoesNotAccessMemory,
  /* x86_sse_pshuf_w */ DoesNotAccessMemory,
  /* x86_sse_rcp_ps */ DoesNotAccessMemory,
  /* x86_sse_rcp_ss */ DoesNotAccessMemory,
  /* x86_sse_rsqrt_ps */ DoesNotAccessMemory,
  /* x86_sse_rsqrt_ss */ DoesNotAccessMemory,
  /* x86_sse_sfence */ UnknownModRefBehavior,
  /* x86_sse_sqrt_ps */ DoesNotAccessMemory,
  /* x86_sse_sqrt_ss */ DoesNotAccessMemory,
  /* x86_sse_stmxcsr */ UnknownModRefBehavior,
  /* x86_sse_storeu_ps */ OnlyAccessesArgumentPointees,
  /* x86_sse_sub_ss */ DoesNotAccessMemory,
  /* x86_sse_ucomieq_ss */ DoesNotAccessMemory,
  /* x86_sse_ucomige_ss */ DoesNotAccessMemory,
  /* x86_sse_ucomigt_ss */ DoesNotAccessMemory,
  /* x86_sse_ucomile_ss */ DoesNotAccessMemory,
  /* x86_sse_ucomilt_ss */ DoesNotAccessMemory,
  /* x86_sse_ucomineq_ss */ DoesNotAccessMemory,
  /* x86_ssse3_pabs_b */ DoesNotAccessMemory,
  /* x86_ssse3_pabs_b_128 */ DoesNotAccessMemory,
  /* x86_ssse3_pabs_d */ DoesNotAccessMemory,
  /* x86_ssse3_pabs_d_128 */ DoesNotAccessMemory,
  /* x86_ssse3_pabs_w */ DoesNotAccessMemory,
  /* x86_ssse3_pabs_w_128 */ DoesNotAccessMemory,
  /* x86_ssse3_phadd_d */ DoesNotAccessMemory,
  /* x86_ssse3_phadd_d_128 */ DoesNotAccessMemory,
  /* x86_ssse3_phadd_sw */ DoesNotAccessMemory,
  /* x86_ssse3_phadd_sw_128 */ DoesNotAccessMemory,
  /* x86_ssse3_phadd_w */ DoesNotAccessMemory,
  /* x86_ssse3_phadd_w_128 */ DoesNotAccessMemory,
  /* x86_ssse3_phsub_d */ DoesNotAccessMemory,
  /* x86_ssse3_phsub_d_128 */ DoesNotAccessMemory,
  /* x86_ssse3_phsub_sw */ DoesNotAccessMemory,
  /* x86_ssse3_phsub_sw_128 */ DoesNotAccessMemory,
  /* x86_ssse3_phsub_w */ DoesNotAccessMemory,
  /* x86_ssse3_phsub_w_128 */ DoesNotAccessMemory,
  /* x86_ssse3_pmadd_ub_sw */ DoesNotAccessMemory,
  /* x86_ssse3_pmadd_ub_sw_128 */ DoesNotAccessMemory,
  /* x86_ssse3_pmul_hr_sw */ DoesNotAccessMemory,
  /* x86_ssse3_pmul_hr_sw_128 */ DoesNotAccessMemory,
  /* x86_ssse3_pshuf_b */ DoesNotAccessMemory,
  /* x86_ssse3_pshuf_b_128 */ DoesNotAccessMemory,
  /* x86_ssse3_psign_b */ DoesNotAccessMemory,
  /* x86_ssse3_psign_b_128 */ DoesNotAccessMemory,
  /* x86_ssse3_psign_d */ DoesNotAccessMemory,
  /* x86_ssse3_psign_d_128 */ DoesNotAccessMemory,
  /* x86_ssse3_psign_w */ DoesNotAccessMemory,
  /* x86_ssse3_psign_w_128 */ DoesNotAccessMemory,
  /* x86_tbm_bextri_u32 */ DoesNotAccessMemory,
  /* x86_tbm_bextri_u64 */ DoesNotAccessMemory,
  /* x86_vcvtph2ps_128 */ DoesNotAccessMemory,
  /* x86_vcvtph2ps_256 */ DoesNotAccessMemory,
  /* x86_vcvtps2ph_128 */ DoesNotAccessMemory,
  /* x86_vcvtps2ph_256 */ DoesNotAccessMemory,
  /* x86_wrfsbase_32 */ UnknownModRefBehavior,
  /* x86_wrfsbase_64 */ UnknownModRefBehavior,
  /* x86_wrgsbase_32 */ UnknownModRefBehavior,
  /* x86_wrgsbase_64 */ UnknownModRefBehavior,
  /* x86_xabort */ UnknownModRefBehavior,
  /* x86_xbegin */ UnknownModRefBehavior,
  /* x86_xend */ UnknownModRefBehavior,
  /* x86_xop_vfrcz_pd */ DoesNotAccessMemory,
  /* x86_xop_vfrcz_pd_256 */ DoesNotAccessMemory,
  /* x86_xop_vfrcz_ps */ DoesNotAccessMemory,
  /* x86_xop_vfrcz_ps_256 */ DoesNotAccessMemory,
  /* x86_xop_vfrcz_sd */ DoesNotAccessMemory,
  /* x86_xop_vfrcz_ss */ DoesNotAccessMemory,
  /* x86_xop_vpcmov */ DoesNotAccessMemory,
  /* x86_xop_vpcmov_256 */ DoesNotAccessMemory,
  /* x86_xop_vpcomb */ DoesNotAccessMemory,
  /* x86_xop_vpcomd */ DoesNotAccessMemory,
  /* x86_xop_vpcomq */ DoesNotAccessMemory,
  /* x86_xop_vpcomub */ DoesNotAccessMemory,
  /* x86_xop_vpcomud */ DoesNotAccessMemory,
  /* x86_xop_vpcomuq */ DoesNotAccessMemory,
  /* x86_xop_vpcomuw */ DoesNotAccessMemory,
  /* x86_xop_vpcomw */ DoesNotAccessMemory,
  /* x86_xop_vpermil2pd */ DoesNotAccessMemory,
  /* x86_xop_vpermil2pd_256 */ DoesNotAccessMemory,
  /* x86_xop_vpermil2ps */ DoesNotAccessMemory,
  /* x86_xop_vpermil2ps_256 */ DoesNotAccessMemory,
  /* x86_xop_vphaddbd */ DoesNotAccessMemory,
  /* x86_xop_vphaddbq */ DoesNotAccessMemory,
  /* x86_xop_vphaddbw */ DoesNotAccessMemory,
  /* x86_xop_vphadddq */ DoesNotAccessMemory,
  /* x86_xop_vphaddubd */ DoesNotAccessMemory,
  /* x86_xop_vphaddubq */ DoesNotAccessMemory,
  /* x86_xop_vphaddubw */ DoesNotAccessMemory,
  /* x86_xop_vphaddudq */ DoesNotAccessMemory,
  /* x86_xop_vphadduwd */ DoesNotAccessMemory,
  /* x86_xop_vphadduwq */ DoesNotAccessMemory,
  /* x86_xop_vphaddwd */ DoesNotAccessMemory,
  /* x86_xop_vphaddwq */ DoesNotAccessMemory,
  /* x86_xop_vphsubbw */ DoesNotAccessMemory,
  /* x86_xop_vphsubdq */ DoesNotAccessMemory,
  /* x86_xop_vphsubwd */ DoesNotAccessMemory,
  /* x86_xop_vpmacsdd */ DoesNotAccessMemory,
  /* x86_xop_vpmacsdqh */ DoesNotAccessMemory,
  /* x86_xop_vpmacsdql */ DoesNotAccessMemory,
  /* x86_xop_vpmacssdd */ DoesNotAccessMemory,
  /* x86_xop_vpmacssdqh */ DoesNotAccessMemory,
  /* x86_xop_vpmacssdql */ DoesNotAccessMemory,
  /* x86_xop_vpmacsswd */ DoesNotAccessMemory,
  /* x86_xop_vpmacssww */ DoesNotAccessMemory,
  /* x86_xop_vpmacswd */ DoesNotAccessMemory,
  /* x86_xop_vpmacsww */ DoesNotAccessMemory,
  /* x86_xop_vpmadcsswd */ DoesNotAccessMemory,
  /* x86_xop_vpmadcswd */ DoesNotAccessMemory,
  /* x86_xop_vpperm */ DoesNotAccessMemory,
  /* x86_xop_vprotb */ DoesNotAccessMemory,
  /* x86_xop_vprotbi */ DoesNotAccessMemory,
  /* x86_xop_vprotd */ DoesNotAccessMemory,
  /* x86_xop_vprotdi */ DoesNotAccessMemory,
  /* x86_xop_vprotq */ DoesNotAccessMemory,
  /* x86_xop_vprotqi */ DoesNotAccessMemory,
  /* x86_xop_vprotw */ DoesNotAccessMemory,
  /* x86_xop_vprotwi */ DoesNotAccessMemory,
  /* x86_xop_vpshab */ DoesNotAccessMemory,
  /* x86_xop_vpshad */ DoesNotAccessMemory,
  /* x86_xop_vpshaq */ DoesNotAccessMemory,
  /* x86_xop_vpshaw */ DoesNotAccessMemory,
  /* x86_xop_vpshlb */ DoesNotAccessMemory,
  /* x86_xop_vpshld */ DoesNotAccessMemory,
  /* x86_xop_vpshlq */ DoesNotAccessMemory,
  /* x86_xop_vpshlw */ DoesNotAccessMemory,
  /* x86_xtest */ UnknownModRefBehavior,
  /* xcore_bitrev */ DoesNotAccessMemory,
  /* xcore_checkevent */ UnknownModRefBehavior,
  /* xcore_chkct */ UnknownModRefBehavior,
  /* xcore_clre */ UnknownModRefBehavior,
  /* xcore_clrpt */ UnknownModRefBehavior,
  /* xcore_clrsr */ UnknownModRefBehavior,
  /* xcore_crc32 */ DoesNotAccessMemory,
  /* xcore_crc8 */ DoesNotAccessMemory,
  /* xcore_edu */ UnknownModRefBehavior,
  /* xcore_eeu */ UnknownModRefBehavior,
  /* xcore_endin */ UnknownModRefBehavior,
  /* xcore_freer */ UnknownModRefBehavior,
  /* xcore_geted */ UnknownModRefBehavior,
  /* xcore_getet */ UnknownModRefBehavior,
  /* xcore_getid */ DoesNotAccessMemory,
  /* xcore_getps */ UnknownModRefBehavior,
  /* xcore_getr */ UnknownModRefBehavior,
  /* xcore_getst */ UnknownModRefBehavior,
  /* xcore_getts */ UnknownModRefBehavior,
  /* xcore_in */ UnknownModRefBehavior,
  /* xcore_inct */ UnknownModRefBehavior,
  /* xcore_initcp */ UnknownModRefBehavior,
  /* xcore_initdp */ UnknownModRefBehavior,
  /* xcore_initlr */ UnknownModRefBehavior,
  /* xcore_initpc */ UnknownModRefBehavior,
  /* xcore_initsp */ UnknownModRefBehavior,
  /* xcore_inshr */ UnknownModRefBehavior,
  /* xcore_int */ UnknownModRefBehavior,
  /* xcore_mjoin */ UnknownModRefBehavior,
  /* xcore_msync */ UnknownModRefBehavior,
  /* xcore_out */ UnknownModRefBehavior,
  /* xcore_outct */ UnknownModRefBehavior,
  /* xcore_outshr */ UnknownModRefBehavior,
  /* xcore_outt */ UnknownModRefBehavior,
  /* xcore_peek */ UnknownModRefBehavior,
  /* xcore_setc */ UnknownModRefBehavior,
  /* xcore_setclk */ UnknownModRefBehavior,
  /* xcore_setd */ UnknownModRefBehavior,
  /* xcore_setev */ UnknownModRefBehavior,
  /* xcore_setps */ UnknownModRefBehavior,
  /* xcore_setpsc */ UnknownModRefBehavior,
  /* xcore_setpt */ UnknownModRefBehavior,
  /* xcore_setrdy */ UnknownModRefBehavior,
  /* xcore_setsr */ UnknownModRefBehavior,
  /* xcore_settw */ UnknownModRefBehavior,
  /* xcore_setv */ UnknownModRefBehavior,
  /* xcore_sext */ DoesNotAccessMemory,
  /* xcore_ssync */ UnknownModRefBehavior,
  /* xcore_syncr */ UnknownModRefBehavior,
  /* xcore_testct */ UnknownModRefBehavior,
  /* xcore_testwct */ UnknownModRefBehavior,
  /* xcore_waitevent */ OnlyReadsMemory,
  /* xcore_zext */ DoesNotAccessMemory,
};

return static_cast<ModRefBehavior>(IntrinsicModRefBehavior[iid]);
#endif // GET_INTRINSIC_MODREF_BEHAVIOR

// Get the LLVM intrinsic that corresponds to a GCC builtin.
// This is used by the C front-end.  The GCC builtin name is passed
// in as BuiltinName, and a target prefix (e.g. 'ppc') is passed
// in as TargetPrefix.  The result is assigned to 'IntrinsicID'.
#ifdef GET_LLVM_INTRINSIC_FOR_GCC_BUILTIN
Intrinsic::ID Intrinsic::getIntrinsicForGCCBuiltin(const char *TargetPrefixStr, const char *BuiltinNameStr) {
  StringRef BuiltinName(BuiltinNameStr);
  StringRef TargetPrefix(TargetPrefixStr);

  /* Target Independent Builtins */ {
  switch (BuiltinName.size()) {
  default: break;
  case 10:	 // 1 string to match.
    if (memcmp(BuiltinName.data()+0, "__nvvm_h2f", 10))
      break;
    return Intrinsic::nvvm_h2f;	 // "__nvvm_h2f"
  case 11:	 // 2 strings to match.
    if (memcmp(BuiltinName.data()+0, "__nvvm_", 7))
      break;
    switch (BuiltinName[7]) {
    default: break;
    case 'b':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+8, "ar0", 3))
        break;
      return Intrinsic::nvvm_barrier0;	 // "__nvvm_bar0"
    case 'p':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+8, "rmt", 3))
        break;
      return Intrinsic::nvvm_prmt;	 // "__nvvm_prmt"
    }
    break;
  case 12:	 // 5 strings to match.
    if (memcmp(BuiltinName.data()+0, "__nvvm_", 7))
      break;
    switch (BuiltinName[7]) {
    default: break;
    case 'a':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+8, "bs_i", 4))
        break;
      return Intrinsic::nvvm_abs_i;	 // "__nvvm_abs_i"
    case 'c':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+8, "lz_i", 4))
        break;
      return Intrinsic::nvvm_clz_i;	 // "__nvvm_clz_i"
    case 'm':	 // 2 strings to match.
      switch (BuiltinName[8]) {
      default: break;
      case 'a':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+9, "x_i", 3))
          break;
        return Intrinsic::nvvm_max_i;	 // "__nvvm_max_i"
      case 'i':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+9, "n_i", 3))
          break;
        return Intrinsic::nvvm_min_i;	 // "__nvvm_min_i"
      }
      break;
    case 's':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+8, "ad_i", 4))
        break;
      return Intrinsic::nvvm_sad_i;	 // "__nvvm_sad_i"
    }
    break;
  case 13:	 // 43 strings to match.
    if (memcmp(BuiltinName.data()+0, "__", 2))
      break;
    switch (BuiltinName[2]) {
    default: break;
    case 'n':	 // 42 strings to match.
      if (memcmp(BuiltinName.data()+3, "vvm_", 4))
        break;
      switch (BuiltinName[7]) {
      default: break;
      case 'a':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+8, "bs_ll", 5))
          break;
        return Intrinsic::nvvm_abs_ll;	 // "__nvvm_abs_ll"
      case 'b':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+8, "rev", 3))
          break;
        switch (BuiltinName[11]) {
        default: break;
        case '3':	 // 1 string to match.
          if (BuiltinName[12] != '2')
            break;
          return Intrinsic::nvvm_brev32;	 // "__nvvm_brev32"
        case '6':	 // 1 string to match.
          if (BuiltinName[12] != '4')
            break;
          return Intrinsic::nvvm_brev64;	 // "__nvvm_brev64"
        }
        break;
      case 'c':	 // 3 strings to match.
        switch (BuiltinName[8]) {
        default: break;
        case 'e':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+9, "il_", 3))
            break;
          switch (BuiltinName[12]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_ceil_d;	 // "__nvvm_ceil_d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_ceil_f;	 // "__nvvm_ceil_f"
          }
          break;
        case 'l':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+9, "z_ll", 4))
            break;
          return Intrinsic::nvvm_clz_ll;	 // "__nvvm_clz_ll"
        }
        break;
      case 'd':	 // 10 strings to match.
        if (BuiltinName[8] != '2')
          break;
        switch (BuiltinName[9]) {
        default: break;
        case 'f':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+10, "_r", 2))
            break;
          switch (BuiltinName[12]) {
          default: break;
          case 'm':	 // 1 string to match.
            return Intrinsic::nvvm_d2f_rm;	 // "__nvvm_d2f_rm"
          case 'n':	 // 1 string to match.
            return Intrinsic::nvvm_d2f_rn;	 // "__nvvm_d2f_rn"
          case 'p':	 // 1 string to match.
            return Intrinsic::nvvm_d2f_rp;	 // "__nvvm_d2f_rp"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_d2f_rz;	 // "__nvvm_d2f_rz"
          }
          break;
        case 'i':	 // 6 strings to match.
          if (BuiltinName[10] != '_')
            break;
          switch (BuiltinName[11]) {
          default: break;
          case 'h':	 // 1 string to match.
            if (BuiltinName[12] != 'i')
              break;
            return Intrinsic::nvvm_d2i_hi;	 // "__nvvm_d2i_hi"
          case 'l':	 // 1 string to match.
            if (BuiltinName[12] != 'o')
              break;
            return Intrinsic::nvvm_d2i_lo;	 // "__nvvm_d2i_lo"
          case 'r':	 // 4 strings to match.
            switch (BuiltinName[12]) {
            default: break;
            case 'm':	 // 1 string to match.
              return Intrinsic::nvvm_d2i_rm;	 // "__nvvm_d2i_rm"
            case 'n':	 // 1 string to match.
              return Intrinsic::nvvm_d2i_rn;	 // "__nvvm_d2i_rn"
            case 'p':	 // 1 string to match.
              return Intrinsic::nvvm_d2i_rp;	 // "__nvvm_d2i_rp"
            case 'z':	 // 1 string to match.
              return Intrinsic::nvvm_d2i_rz;	 // "__nvvm_d2i_rz"
            }
            break;
          }
          break;
        }
        break;
      case 'f':	 // 11 strings to match.
        switch (BuiltinName[8]) {
        default: break;
        case '2':	 // 5 strings to match.
          switch (BuiltinName[9]) {
          default: break;
          case 'h':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+10, "_rn", 3))
              break;
            return Intrinsic::nvvm_f2h_rn;	 // "__nvvm_f2h_rn"
          case 'i':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+10, "_r", 2))
              break;
            switch (BuiltinName[12]) {
            default: break;
            case 'm':	 // 1 string to match.
              return Intrinsic::nvvm_f2i_rm;	 // "__nvvm_f2i_rm"
            case 'n':	 // 1 string to match.
              return Intrinsic::nvvm_f2i_rn;	 // "__nvvm_f2i_rn"
            case 'p':	 // 1 string to match.
              return Intrinsic::nvvm_f2i_rp;	 // "__nvvm_f2i_rp"
            case 'z':	 // 1 string to match.
              return Intrinsic::nvvm_f2i_rz;	 // "__nvvm_f2i_rz"
            }
            break;
          }
          break;
        case 'a':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+9, "bs_", 3))
            break;
          switch (BuiltinName[12]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_fabs_d;	 // "__nvvm_fabs_d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_fabs_f;	 // "__nvvm_fabs_f"
          }
          break;
        case 'm':	 // 4 strings to match.
          switch (BuiltinName[9]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+10, "x_", 2))
              break;
            switch (BuiltinName[12]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::nvvm_fmax_d;	 // "__nvvm_fmax_d"
            case 'f':	 // 1 string to match.
              return Intrinsic::nvvm_fmax_f;	 // "__nvvm_fmax_f"
            }
            break;
          case 'i':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+10, "n_", 2))
              break;
            switch (BuiltinName[12]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::nvvm_fmin_d;	 // "__nvvm_fmin_d"
            case 'f':	 // 1 string to match.
              return Intrinsic::nvvm_fmin_f;	 // "__nvvm_fmin_f"
            }
            break;
          }
          break;
        }
        break;
      case 'i':	 // 8 strings to match.
        if (BuiltinName[8] != '2')
          break;
        switch (BuiltinName[9]) {
        default: break;
        case 'd':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+10, "_r", 2))
            break;
          switch (BuiltinName[12]) {
          default: break;
          case 'm':	 // 1 string to match.
            return Intrinsic::nvvm_i2d_rm;	 // "__nvvm_i2d_rm"
          case 'n':	 // 1 string to match.
            return Intrinsic::nvvm_i2d_rn;	 // "__nvvm_i2d_rn"
          case 'p':	 // 1 string to match.
            return Intrinsic::nvvm_i2d_rp;	 // "__nvvm_i2d_rp"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_i2d_rz;	 // "__nvvm_i2d_rz"
          }
          break;
        case 'f':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+10, "_r", 2))
            break;
          switch (BuiltinName[12]) {
          default: break;
          case 'm':	 // 1 string to match.
            return Intrinsic::nvvm_i2f_rm;	 // "__nvvm_i2f_rm"
          case 'n':	 // 1 string to match.
            return Intrinsic::nvvm_i2f_rn;	 // "__nvvm_i2f_rn"
          case 'p':	 // 1 string to match.
            return Intrinsic::nvvm_i2f_rp;	 // "__nvvm_i2f_rp"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_i2f_rz;	 // "__nvvm_i2f_rz"
          }
          break;
        }
        break;
      case 'm':	 // 4 strings to match.
        switch (BuiltinName[8]) {
        default: break;
        case 'a':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+9, "x_", 2))
            break;
          switch (BuiltinName[11]) {
          default: break;
          case 'l':	 // 1 string to match.
            if (BuiltinName[12] != 'l')
              break;
            return Intrinsic::nvvm_max_ll;	 // "__nvvm_max_ll"
          case 'u':	 // 1 string to match.
            if (BuiltinName[12] != 'i')
              break;
            return Intrinsic::nvvm_max_ui;	 // "__nvvm_max_ui"
          }
          break;
        case 'i':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+9, "n_", 2))
            break;
          switch (BuiltinName[11]) {
          default: break;
          case 'l':	 // 1 string to match.
            if (BuiltinName[12] != 'l')
              break;
            return Intrinsic::nvvm_min_ll;	 // "__nvvm_min_ll"
          case 'u':	 // 1 string to match.
            if (BuiltinName[12] != 'i')
              break;
            return Intrinsic::nvvm_min_ui;	 // "__nvvm_min_ui"
          }
          break;
        }
        break;
      case 'p':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+8, "opc_i", 5))
          break;
        return Intrinsic::nvvm_popc_i;	 // "__nvvm_popc_i"
      case 's':	 // 2 strings to match.
        switch (BuiltinName[8]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+9, "d_ui", 4))
            break;
          return Intrinsic::nvvm_sad_ui;	 // "__nvvm_sad_ui"
        case 'q':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+9, "rt_f", 4))
            break;
          return Intrinsic::nvvm_sqrt_f;	 // "__nvvm_sqrt_f"
        }
        break;
      }
      break;
    case 's':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+3, "yncthreads", 10))
        break;
      return Intrinsic::cuda_syncthreads;	 // "__syncthreads"
    }
    break;
  case 14:	 // 45 strings to match.
    if (memcmp(BuiltinName.data()+0, "__", 2))
      break;
    switch (BuiltinName[2]) {
    default: break;
    case 'b':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+3, "uiltin_trap", 11))
        break;
      return Intrinsic::trap;	 // "__builtin_trap"
    case 'n':	 // 44 strings to match.
      if (memcmp(BuiltinName.data()+3, "vvm_", 4))
        break;
      switch (BuiltinName[7]) {
      default: break;
      case 'b':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+8, "ar0_or", 6))
          break;
        return Intrinsic::nvvm_barrier0_or;	 // "__nvvm_bar0_or"
      case 'd':	 // 8 strings to match.
        if (BuiltinName[8] != '2')
          break;
        switch (BuiltinName[9]) {
        default: break;
        case 'l':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+10, "l_r", 3))
            break;
          switch (BuiltinName[13]) {
          default: break;
          case 'm':	 // 1 string to match.
            return Intrinsic::nvvm_d2ll_rm;	 // "__nvvm_d2ll_rm"
          case 'n':	 // 1 string to match.
            return Intrinsic::nvvm_d2ll_rn;	 // "__nvvm_d2ll_rn"
          case 'p':	 // 1 string to match.
            return Intrinsic::nvvm_d2ll_rp;	 // "__nvvm_d2ll_rp"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_d2ll_rz;	 // "__nvvm_d2ll_rz"
          }
          break;
        case 'u':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+10, "i_r", 3))
            break;
          switch (BuiltinName[13]) {
          default: break;
          case 'm':	 // 1 string to match.
            return Intrinsic::nvvm_d2ui_rm;	 // "__nvvm_d2ui_rm"
          case 'n':	 // 1 string to match.
            return Intrinsic::nvvm_d2ui_rn;	 // "__nvvm_d2ui_rn"
          case 'p':	 // 1 string to match.
            return Intrinsic::nvvm_d2ui_rp;	 // "__nvvm_d2ui_rp"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_d2ui_rz;	 // "__nvvm_d2ui_rz"
          }
          break;
        }
        break;
      case 'f':	 // 10 strings to match.
        switch (BuiltinName[8]) {
        default: break;
        case '2':	 // 8 strings to match.
          switch (BuiltinName[9]) {
          default: break;
          case 'l':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+10, "l_r", 3))
              break;
            switch (BuiltinName[13]) {
            default: break;
            case 'm':	 // 1 string to match.
              return Intrinsic::nvvm_f2ll_rm;	 // "__nvvm_f2ll_rm"
            case 'n':	 // 1 string to match.
              return Intrinsic::nvvm_f2ll_rn;	 // "__nvvm_f2ll_rn"
            case 'p':	 // 1 string to match.
              return Intrinsic::nvvm_f2ll_rp;	 // "__nvvm_f2ll_rp"
            case 'z':	 // 1 string to match.
              return Intrinsic::nvvm_f2ll_rz;	 // "__nvvm_f2ll_rz"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+10, "i_r", 3))
              break;
            switch (BuiltinName[13]) {
            default: break;
            case 'm':	 // 1 string to match.
              return Intrinsic::nvvm_f2ui_rm;	 // "__nvvm_f2ui_rm"
            case 'n':	 // 1 string to match.
              return Intrinsic::nvvm_f2ui_rn;	 // "__nvvm_f2ui_rn"
            case 'p':	 // 1 string to match.
              return Intrinsic::nvvm_f2ui_rp;	 // "__nvvm_f2ui_rp"
            case 'z':	 // 1 string to match.
              return Intrinsic::nvvm_f2ui_rz;	 // "__nvvm_f2ui_rz"
            }
            break;
          }
          break;
        case 'l':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+9, "oor_", 4))
            break;
          switch (BuiltinName[13]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_floor_d;	 // "__nvvm_floor_d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_floor_f;	 // "__nvvm_floor_f"
          }
          break;
        }
        break;
      case 'l':	 // 8 strings to match.
        if (memcmp(BuiltinName.data()+8, "l2", 2))
          break;
        switch (BuiltinName[10]) {
        default: break;
        case 'd':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+11, "_r", 2))
            break;
          switch (BuiltinName[13]) {
          default: break;
          case 'm':	 // 1 string to match.
            return Intrinsic::nvvm_ll2d_rm;	 // "__nvvm_ll2d_rm"
          case 'n':	 // 1 string to match.
            return Intrinsic::nvvm_ll2d_rn;	 // "__nvvm_ll2d_rn"
          case 'p':	 // 1 string to match.
            return Intrinsic::nvvm_ll2d_rp;	 // "__nvvm_ll2d_rp"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_ll2d_rz;	 // "__nvvm_ll2d_rz"
          }
          break;
        case 'f':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+11, "_r", 2))
            break;
          switch (BuiltinName[13]) {
          default: break;
          case 'm':	 // 1 string to match.
            return Intrinsic::nvvm_ll2f_rm;	 // "__nvvm_ll2f_rm"
          case 'n':	 // 1 string to match.
            return Intrinsic::nvvm_ll2f_rn;	 // "__nvvm_ll2f_rn"
          case 'p':	 // 1 string to match.
            return Intrinsic::nvvm_ll2f_rp;	 // "__nvvm_ll2f_rp"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_ll2f_rz;	 // "__nvvm_ll2f_rz"
          }
          break;
        }
        break;
      case 'm':	 // 4 strings to match.
        switch (BuiltinName[8]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+9, "x_ull", 5))
            break;
          return Intrinsic::nvvm_max_ull;	 // "__nvvm_max_ull"
        case 'i':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+9, "n_ull", 5))
            break;
          return Intrinsic::nvvm_min_ull;	 // "__nvvm_min_ull"
        case 'u':	 // 2 strings to match.
          if (BuiltinName[9] != 'l')
            break;
          switch (BuiltinName[10]) {
          default: break;
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+11, "4_i", 3))
              break;
            return Intrinsic::nvvm_mul24_i;	 // "__nvvm_mul24_i"
          case 'h':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+11, "i_i", 3))
              break;
            return Intrinsic::nvvm_mulhi_i;	 // "__nvvm_mulhi_i"
          }
          break;
        }
        break;
      case 'p':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+8, "opc_ll", 6))
          break;
        return Intrinsic::nvvm_popc_ll;	 // "__nvvm_popc_ll"
      case 'r':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+8, "ound_", 5))
          break;
        switch (BuiltinName[13]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::nvvm_round_d;	 // "__nvvm_round_d"
        case 'f':	 // 1 string to match.
          return Intrinsic::nvvm_round_f;	 // "__nvvm_round_f"
        }
        break;
      case 't':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+8, "runc_", 5))
          break;
        switch (BuiltinName[13]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::nvvm_trunc_d;	 // "__nvvm_trunc_d"
        case 'f':	 // 1 string to match.
          return Intrinsic::nvvm_trunc_f;	 // "__nvvm_trunc_f"
        }
        break;
      case 'u':	 // 8 strings to match.
        if (memcmp(BuiltinName.data()+8, "i2", 2))
          break;
        switch (BuiltinName[10]) {
        default: break;
        case 'd':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+11, "_r", 2))
            break;
          switch (BuiltinName[13]) {
          default: break;
          case 'm':	 // 1 string to match.
            return Intrinsic::nvvm_ui2d_rm;	 // "__nvvm_ui2d_rm"
          case 'n':	 // 1 string to match.
            return Intrinsic::nvvm_ui2d_rn;	 // "__nvvm_ui2d_rn"
          case 'p':	 // 1 string to match.
            return Intrinsic::nvvm_ui2d_rp;	 // "__nvvm_ui2d_rp"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_ui2d_rz;	 // "__nvvm_ui2d_rz"
          }
          break;
        case 'f':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+11, "_r", 2))
            break;
          switch (BuiltinName[13]) {
          default: break;
          case 'm':	 // 1 string to match.
            return Intrinsic::nvvm_ui2f_rm;	 // "__nvvm_ui2f_rm"
          case 'n':	 // 1 string to match.
            return Intrinsic::nvvm_ui2f_rn;	 // "__nvvm_ui2f_rn"
          case 'p':	 // 1 string to match.
            return Intrinsic::nvvm_ui2f_rp;	 // "__nvvm_ui2f_rp"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_ui2f_rz;	 // "__nvvm_ui2f_rz"
          }
          break;
        }
        break;
      }
      break;
    }
    break;
  case 15:	 // 61 strings to match.
    if (memcmp(BuiltinName.data()+0, "__nvvm_", 7))
      break;
    switch (BuiltinName[7]) {
    default: break;
    case 'a':	 // 8 strings to match.
      if (memcmp(BuiltinName.data()+8, "dd_r", 4))
        break;
      switch (BuiltinName[12]) {
      default: break;
      case 'm':	 // 2 strings to match.
        if (BuiltinName[13] != '_')
          break;
        switch (BuiltinName[14]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::nvvm_add_rm_d;	 // "__nvvm_add_rm_d"
        case 'f':	 // 1 string to match.
          return Intrinsic::nvvm_add_rm_f;	 // "__nvvm_add_rm_f"
        }
        break;
      case 'n':	 // 2 strings to match.
        if (BuiltinName[13] != '_')
          break;
        switch (BuiltinName[14]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::nvvm_add_rn_d;	 // "__nvvm_add_rn_d"
        case 'f':	 // 1 string to match.
          return Intrinsic::nvvm_add_rn_f;	 // "__nvvm_add_rn_f"
        }
        break;
      case 'p':	 // 2 strings to match.
        if (BuiltinName[13] != '_')
          break;
        switch (BuiltinName[14]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::nvvm_add_rp_d;	 // "__nvvm_add_rp_d"
        case 'f':	 // 1 string to match.
          return Intrinsic::nvvm_add_rp_f;	 // "__nvvm_add_rp_f"
        }
        break;
      case 'z':	 // 2 strings to match.
        if (BuiltinName[13] != '_')
          break;
        switch (BuiltinName[14]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::nvvm_add_rz_d;	 // "__nvvm_add_rz_d"
        case 'f':	 // 1 string to match.
          return Intrinsic::nvvm_add_rz_f;	 // "__nvvm_add_rz_f"
        }
        break;
      }
      break;
    case 'b':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+8, "ar0_and", 7))
        break;
      return Intrinsic::nvvm_barrier0_and;	 // "__nvvm_bar0_and"
    case 'd':	 // 12 strings to match.
      switch (BuiltinName[8]) {
      default: break;
      case '2':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+9, "ull_r", 5))
          break;
        switch (BuiltinName[14]) {
        default: break;
        case 'm':	 // 1 string to match.
          return Intrinsic::nvvm_d2ull_rm;	 // "__nvvm_d2ull_rm"
        case 'n':	 // 1 string to match.
          return Intrinsic::nvvm_d2ull_rn;	 // "__nvvm_d2ull_rn"
        case 'p':	 // 1 string to match.
          return Intrinsic::nvvm_d2ull_rp;	 // "__nvvm_d2ull_rp"
        case 'z':	 // 1 string to match.
          return Intrinsic::nvvm_d2ull_rz;	 // "__nvvm_d2ull_rz"
        }
        break;
      case 'i':	 // 8 strings to match.
        if (memcmp(BuiltinName.data()+9, "v_r", 3))
          break;
        switch (BuiltinName[12]) {
        default: break;
        case 'm':	 // 2 strings to match.
          if (BuiltinName[13] != '_')
            break;
          switch (BuiltinName[14]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_div_rm_d;	 // "__nvvm_div_rm_d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_div_rm_f;	 // "__nvvm_div_rm_f"
          }
          break;
        case 'n':	 // 2 strings to match.
          if (BuiltinName[13] != '_')
            break;
          switch (BuiltinName[14]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_div_rn_d;	 // "__nvvm_div_rn_d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_div_rn_f;	 // "__nvvm_div_rn_f"
          }
          break;
        case 'p':	 // 2 strings to match.
          if (BuiltinName[13] != '_')
            break;
          switch (BuiltinName[14]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_div_rp_d;	 // "__nvvm_div_rp_d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_div_rp_f;	 // "__nvvm_div_rp_f"
          }
          break;
        case 'z':	 // 2 strings to match.
          if (BuiltinName[13] != '_')
            break;
          switch (BuiltinName[14]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_div_rz_d;	 // "__nvvm_div_rz_d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_div_rz_f;	 // "__nvvm_div_rz_f"
          }
          break;
        }
        break;
      }
      break;
    case 'f':	 // 12 strings to match.
      switch (BuiltinName[8]) {
      default: break;
      case '2':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+9, "ull_r", 5))
          break;
        switch (BuiltinName[14]) {
        default: break;
        case 'm':	 // 1 string to match.
          return Intrinsic::nvvm_f2ull_rm;	 // "__nvvm_f2ull_rm"
        case 'n':	 // 1 string to match.
          return Intrinsic::nvvm_f2ull_rn;	 // "__nvvm_f2ull_rn"
        case 'p':	 // 1 string to match.
          return Intrinsic::nvvm_f2ull_rp;	 // "__nvvm_f2ull_rp"
        case 'z':	 // 1 string to match.
          return Intrinsic::nvvm_f2ull_rz;	 // "__nvvm_f2ull_rz"
        }
        break;
      case 'm':	 // 8 strings to match.
        if (memcmp(BuiltinName.data()+9, "a_r", 3))
          break;
        switch (BuiltinName[12]) {
        default: break;
        case 'm':	 // 2 strings to match.
          if (BuiltinName[13] != '_')
            break;
          switch (BuiltinName[14]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_fma_rm_d;	 // "__nvvm_fma_rm_d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_fma_rm_f;	 // "__nvvm_fma_rm_f"
          }
          break;
        case 'n':	 // 2 strings to match.
          if (BuiltinName[13] != '_')
            break;
          switch (BuiltinName[14]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_fma_rn_d;	 // "__nvvm_fma_rn_d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_fma_rn_f;	 // "__nvvm_fma_rn_f"
          }
          break;
        case 'p':	 // 2 strings to match.
          if (BuiltinName[13] != '_')
            break;
          switch (BuiltinName[14]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_fma_rp_d;	 // "__nvvm_fma_rp_d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_fma_rp_f;	 // "__nvvm_fma_rp_f"
          }
          break;
        case 'z':	 // 2 strings to match.
          if (BuiltinName[13] != '_')
            break;
          switch (BuiltinName[14]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_fma_rz_d;	 // "__nvvm_fma_rz_d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_fma_rz_f;	 // "__nvvm_fma_rz_f"
          }
          break;
        }
        break;
      }
      break;
    case 'l':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+8, "ohi_i2d", 7))
        break;
      return Intrinsic::nvvm_lohi_i2d;	 // "__nvvm_lohi_i2d"
    case 'm':	 // 11 strings to match.
      if (memcmp(BuiltinName.data()+8, "ul", 2))
        break;
      switch (BuiltinName[10]) {
      default: break;
      case '2':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+11, "4_ui", 4))
          break;
        return Intrinsic::nvvm_mul24_ui;	 // "__nvvm_mul24_ui"
      case '_':	 // 8 strings to match.
        if (BuiltinName[11] != 'r')
          break;
        switch (BuiltinName[12]) {
        default: break;
        case 'm':	 // 2 strings to match.
          if (BuiltinName[13] != '_')
            break;
          switch (BuiltinName[14]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_mul_rm_d;	 // "__nvvm_mul_rm_d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_mul_rm_f;	 // "__nvvm_mul_rm_f"
          }
          break;
        case 'n':	 // 2 strings to match.
          if (BuiltinName[13] != '_')
            break;
          switch (BuiltinName[14]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_mul_rn_d;	 // "__nvvm_mul_rn_d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_mul_rn_f;	 // "__nvvm_mul_rn_f"
          }
          break;
        case 'p':	 // 2 strings to match.
          if (BuiltinName[13] != '_')
            break;
          switch (BuiltinName[14]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_mul_rp_d;	 // "__nvvm_mul_rp_d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_mul_rp_f;	 // "__nvvm_mul_rp_f"
          }
          break;
        case 'z':	 // 2 strings to match.
          if (BuiltinName[13] != '_')
            break;
          switch (BuiltinName[14]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_mul_rz_d;	 // "__nvvm_mul_rz_d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_mul_rz_f;	 // "__nvvm_mul_rz_f"
          }
          break;
        }
        break;
      case 'h':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+11, "i_", 2))
          break;
        switch (BuiltinName[13]) {
        default: break;
        case 'l':	 // 1 string to match.
          if (BuiltinName[14] != 'l')
            break;
          return Intrinsic::nvvm_mulhi_ll;	 // "__nvvm_mulhi_ll"
        case 'u':	 // 1 string to match.
          if (BuiltinName[14] != 'i')
            break;
          return Intrinsic::nvvm_mulhi_ui;	 // "__nvvm_mulhi_ui"
        }
        break;
      }
      break;
    case 'r':	 // 8 strings to match.
      if (memcmp(BuiltinName.data()+8, "cp_r", 4))
        break;
      switch (BuiltinName[12]) {
      default: break;
      case 'm':	 // 2 strings to match.
        if (BuiltinName[13] != '_')
          break;
        switch (BuiltinName[14]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::nvvm_rcp_rm_d;	 // "__nvvm_rcp_rm_d"
        case 'f':	 // 1 string to match.
          return Intrinsic::nvvm_rcp_rm_f;	 // "__nvvm_rcp_rm_f"
        }
        break;
      case 'n':	 // 2 strings to match.
        if (BuiltinName[13] != '_')
          break;
        switch (BuiltinName[14]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::nvvm_rcp_rn_d;	 // "__nvvm_rcp_rn_d"
        case 'f':	 // 1 string to match.
          return Intrinsic::nvvm_rcp_rn_f;	 // "__nvvm_rcp_rn_f"
        }
        break;
      case 'p':	 // 2 strings to match.
        if (BuiltinName[13] != '_')
          break;
        switch (BuiltinName[14]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::nvvm_rcp_rp_d;	 // "__nvvm_rcp_rp_d"
        case 'f':	 // 1 string to match.
          return Intrinsic::nvvm_rcp_rp_f;	 // "__nvvm_rcp_rp_f"
        }
        break;
      case 'z':	 // 2 strings to match.
        if (BuiltinName[13] != '_')
          break;
        switch (BuiltinName[14]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::nvvm_rcp_rz_d;	 // "__nvvm_rcp_rz_d"
        case 'f':	 // 1 string to match.
          return Intrinsic::nvvm_rcp_rz_f;	 // "__nvvm_rcp_rz_f"
        }
        break;
      }
      break;
    case 'u':	 // 8 strings to match.
      if (memcmp(BuiltinName.data()+8, "ll2", 3))
        break;
      switch (BuiltinName[11]) {
      default: break;
      case 'd':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+12, "_r", 2))
          break;
        switch (BuiltinName[14]) {
        default: break;
        case 'm':	 // 1 string to match.
          return Intrinsic::nvvm_ull2d_rm;	 // "__nvvm_ull2d_rm"
        case 'n':	 // 1 string to match.
          return Intrinsic::nvvm_ull2d_rn;	 // "__nvvm_ull2d_rn"
        case 'p':	 // 1 string to match.
          return Intrinsic::nvvm_ull2d_rp;	 // "__nvvm_ull2d_rp"
        case 'z':	 // 1 string to match.
          return Intrinsic::nvvm_ull2d_rz;	 // "__nvvm_ull2d_rz"
        }
        break;
      case 'f':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+12, "_r", 2))
          break;
        switch (BuiltinName[14]) {
        default: break;
        case 'm':	 // 1 string to match.
          return Intrinsic::nvvm_ull2f_rm;	 // "__nvvm_ull2f_rm"
        case 'n':	 // 1 string to match.
          return Intrinsic::nvvm_ull2f_rn;	 // "__nvvm_ull2f_rn"
        case 'p':	 // 1 string to match.
          return Intrinsic::nvvm_ull2f_rp;	 // "__nvvm_ull2f_rp"
        case 'z':	 // 1 string to match.
          return Intrinsic::nvvm_ull2f_rz;	 // "__nvvm_ull2f_rz"
        }
        break;
      }
      break;
    }
    break;
  case 16:	 // 15 strings to match.
    if (memcmp(BuiltinName.data()+0, "__nvvm_", 7))
      break;
    switch (BuiltinName[7]) {
    default: break;
    case 'b':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+8, "ar0_popc", 8))
        break;
      return Intrinsic::nvvm_barrier0_popc;	 // "__nvvm_bar0_popc"
    case 'm':	 // 2 strings to match.
      switch (BuiltinName[8]) {
      default: break;
      case 'e':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+9, "mbar_gl", 7))
          break;
        return Intrinsic::nvvm_membar_gl;	 // "__nvvm_membar_gl"
      case 'u':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+9, "lhi_ull", 7))
          break;
        return Intrinsic::nvvm_mulhi_ull;	 // "__nvvm_mulhi_ull"
      }
      break;
    case 's':	 // 10 strings to match.
      switch (BuiltinName[8]) {
      default: break;
      case 'q':	 // 8 strings to match.
        if (memcmp(BuiltinName.data()+9, "rt_r", 4))
          break;
        switch (BuiltinName[13]) {
        default: break;
        case 'm':	 // 2 strings to match.
          if (BuiltinName[14] != '_')
            break;
          switch (BuiltinName[15]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_sqrt_rm_d;	 // "__nvvm_sqrt_rm_d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_sqrt_rm_f;	 // "__nvvm_sqrt_rm_f"
          }
          break;
        case 'n':	 // 2 strings to match.
          if (BuiltinName[14] != '_')
            break;
          switch (BuiltinName[15]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_sqrt_rn_d;	 // "__nvvm_sqrt_rn_d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_sqrt_rn_f;	 // "__nvvm_sqrt_rn_f"
          }
          break;
        case 'p':	 // 2 strings to match.
          if (BuiltinName[14] != '_')
            break;
          switch (BuiltinName[15]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_sqrt_rp_d;	 // "__nvvm_sqrt_rp_d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_sqrt_rp_f;	 // "__nvvm_sqrt_rp_f"
          }
          break;
        case 'z':	 // 2 strings to match.
          if (BuiltinName[14] != '_')
            break;
          switch (BuiltinName[15]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::nvvm_sqrt_rz_d;	 // "__nvvm_sqrt_rz_d"
          case 'f':	 // 1 string to match.
            return Intrinsic::nvvm_sqrt_rz_f;	 // "__nvvm_sqrt_rz_f"
          }
          break;
        }
        break;
      case 'u':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+9, "q_", 2))
          break;
        switch (BuiltinName[11]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+12, "epth", 4))
            break;
          return Intrinsic::nvvm_suq_depth;	 // "__nvvm_suq_depth"
        case 'w':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+12, "idth", 4))
            break;
          return Intrinsic::nvvm_suq_width;	 // "__nvvm_suq_width"
        }
        break;
      }
      break;
    case 't':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+8, "xq_", 3))
        break;
      switch (BuiltinName[11]) {
      default: break;
      case 'd':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+12, "epth", 4))
          break;
        return Intrinsic::nvvm_txq_depth;	 // "__nvvm_txq_depth"
      case 'w':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+12, "idth", 4))
          break;
        return Intrinsic::nvvm_txq_width;	 // "__nvvm_txq_width"
      }
      break;
    }
    break;
  case 17:	 // 21 strings to match.
    if (memcmp(BuiltinName.data()+0, "__nvvm_", 7))
      break;
    switch (BuiltinName[7]) {
    default: break;
    case 'c':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+8, "eil_ftz_f", 9))
        break;
      return Intrinsic::nvvm_ceil_ftz_f;	 // "__nvvm_ceil_ftz_f"
    case 'd':	 // 4 strings to match.
      if (memcmp(BuiltinName.data()+8, "2f_r", 4))
        break;
      switch (BuiltinName[12]) {
      default: break;
      case 'm':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+13, "_ftz", 4))
          break;
        return Intrinsic::nvvm_d2f_rm_ftz;	 // "__nvvm_d2f_rm_ftz"
      case 'n':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+13, "_ftz", 4))
          break;
        return Intrinsic::nvvm_d2f_rn_ftz;	 // "__nvvm_d2f_rn_ftz"
      case 'p':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+13, "_ftz", 4))
          break;
        return Intrinsic::nvvm_d2f_rp_ftz;	 // "__nvvm_d2f_rp_ftz"
      case 'z':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+13, "_ftz", 4))
          break;
        return Intrinsic::nvvm_d2f_rz_ftz;	 // "__nvvm_d2f_rz_ftz"
      }
      break;
    case 'f':	 // 8 strings to match.
      switch (BuiltinName[8]) {
      default: break;
      case '2':	 // 5 strings to match.
        switch (BuiltinName[9]) {
        default: break;
        case 'h':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+10, "_rn_ftz", 7))
            break;
          return Intrinsic::nvvm_f2h_rn_ftz;	 // "__nvvm_f2h_rn_ftz"
        case 'i':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+10, "_r", 2))
            break;
          switch (BuiltinName[12]) {
          default: break;
          case 'm':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+13, "_ftz", 4))
              break;
            return Intrinsic::nvvm_f2i_rm_ftz;	 // "__nvvm_f2i_rm_ftz"
          case 'n':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+13, "_ftz", 4))
              break;
            return Intrinsic::nvvm_f2i_rn_ftz;	 // "__nvvm_f2i_rn_ftz"
          case 'p':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+13, "_ftz", 4))
              break;
            return Intrinsic::nvvm_f2i_rp_ftz;	 // "__nvvm_f2i_rp_ftz"
          case 'z':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+13, "_ftz", 4))
              break;
            return Intrinsic::nvvm_f2i_rz_ftz;	 // "__nvvm_f2i_rz_ftz"
          }
          break;
        }
        break;
      case 'a':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+9, "bs_ftz_f", 8))
          break;
        return Intrinsic::nvvm_fabs_ftz_f;	 // "__nvvm_fabs_ftz_f"
      case 'm':	 // 2 strings to match.
        switch (BuiltinName[9]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+10, "x_ftz_f", 7))
            break;
          return Intrinsic::nvvm_fmax_ftz_f;	 // "__nvvm_fmax_ftz_f"
        case 'i':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+10, "n_ftz_f", 7))
            break;
          return Intrinsic::nvvm_fmin_ftz_f;	 // "__nvvm_fmin_ftz_f"
        }
        break;
      }
      break;
    case 'm':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+8, "embar_", 6))
        break;
      switch (BuiltinName[14]) {
      default: break;
      case 'c':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+15, "ta", 2))
          break;
        return Intrinsic::nvvm_membar_cta;	 // "__nvvm_membar_cta"
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+15, "ys", 2))
          break;
        return Intrinsic::nvvm_membar_sys;	 // "__nvvm_membar_sys"
      }
      break;
    case 'r':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+8, "otate_b", 7))
        break;
      switch (BuiltinName[15]) {
      default: break;
      case '3':	 // 1 string to match.
        if (BuiltinName[16] != '2')
          break;
        return Intrinsic::nvvm_rotate_b32;	 // "__nvvm_rotate_b32"
      case '6':	 // 1 string to match.
        if (BuiltinName[16] != '4')
          break;
        return Intrinsic::nvvm_rotate_b64;	 // "__nvvm_rotate_b64"
      }
      break;
    case 's':	 // 3 strings to match.
      switch (BuiltinName[8]) {
      default: break;
      case 'a':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+9, "turate_", 7))
          break;
        switch (BuiltinName[16]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::nvvm_saturate_d;	 // "__nvvm_saturate_d"
        case 'f':	 // 1 string to match.
          return Intrinsic::nvvm_saturate_f;	 // "__nvvm_saturate_f"
        }
        break;
      case 'u':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+9, "q_height", 8))
          break;
        return Intrinsic::nvvm_suq_height;	 // "__nvvm_suq_height"
      }
      break;
    case 't':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+8, "xq_height", 9))
        break;
      return Intrinsic::nvvm_txq_height;	 // "__nvvm_txq_height"
    }
    break;
  case 18:	 // 13 strings to match.
    if (memcmp(BuiltinName.data()+0, "__nvvm_", 7))
      break;
    switch (BuiltinName[7]) {
    default: break;
    case 'b':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+8, "itcast_", 7))
        break;
      switch (BuiltinName[15]) {
      default: break;
      case 'f':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+16, "2i", 2))
          break;
        return Intrinsic::nvvm_bitcast_f2i;	 // "__nvvm_bitcast_f2i"
      case 'i':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+16, "2f", 2))
          break;
        return Intrinsic::nvvm_bitcast_i2f;	 // "__nvvm_bitcast_i2f"
      }
      break;
    case 'f':	 // 9 strings to match.
      switch (BuiltinName[8]) {
      default: break;
      case '2':	 // 8 strings to match.
        switch (BuiltinName[9]) {
        default: break;
        case 'l':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+10, "l_r", 3))
            break;
          switch (BuiltinName[13]) {
          default: break;
          case 'm':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+14, "_ftz", 4))
              break;
            return Intrinsic::nvvm_f2ll_rm_ftz;	 // "__nvvm_f2ll_rm_ftz"
          case 'n':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+14, "_ftz", 4))
              break;
            return Intrinsic::nvvm_f2ll_rn_ftz;	 // "__nvvm_f2ll_rn_ftz"
          case 'p':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+14, "_ftz", 4))
              break;
            return Intrinsic::nvvm_f2ll_rp_ftz;	 // "__nvvm_f2ll_rp_ftz"
          case 'z':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+14, "_ftz", 4))
              break;
            return Intrinsic::nvvm_f2ll_rz_ftz;	 // "__nvvm_f2ll_rz_ftz"
          }
          break;
        case 'u':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+10, "i_r", 3))
            break;
          switch (BuiltinName[13]) {
          default: break;
          case 'm':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+14, "_ftz", 4))
              break;
            return Intrinsic::nvvm_f2ui_rm_ftz;	 // "__nvvm_f2ui_rm_ftz"
          case 'n':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+14, "_ftz", 4))
              break;
            return Intrinsic::nvvm_f2ui_rn_ftz;	 // "__nvvm_f2ui_rn_ftz"
          case 'p':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+14, "_ftz", 4))
              break;
            return Intrinsic::nvvm_f2ui_rp_ftz;	 // "__nvvm_f2ui_rp_ftz"
          case 'z':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+14, "_ftz", 4))
              break;
            return Intrinsic::nvvm_f2ui_rz_ftz;	 // "__nvvm_f2ui_rz_ftz"
          }
          break;
        }
        break;
      case 'l':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+9, "oor_ftz_f", 9))
          break;
        return Intrinsic::nvvm_floor_ftz_f;	 // "__nvvm_floor_ftz_f"
      }
      break;
    case 'r':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+8, "ound_ftz_f", 10))
        break;
      return Intrinsic::nvvm_round_ftz_f;	 // "__nvvm_round_ftz_f"
    case 't':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+8, "runc_ftz_f", 10))
        break;
      return Intrinsic::nvvm_trunc_ftz_f;	 // "__nvvm_trunc_ftz_f"
    }
    break;
  case 19:	 // 34 strings to match.
    if (memcmp(BuiltinName.data()+0, "__", 2))
      break;
    switch (BuiltinName[2]) {
    default: break;
    case 'b':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+3, "uiltin_debugtrap", 16))
        break;
      return Intrinsic::debugtrap;	 // "__builtin_debugtrap"
    case 'n':	 // 33 strings to match.
      if (memcmp(BuiltinName.data()+3, "vvm_", 4))
        break;
      switch (BuiltinName[7]) {
      default: break;
      case 'a':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+8, "dd_r", 4))
          break;
        switch (BuiltinName[12]) {
        default: break;
        case 'm':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+13, "_ftz_f", 6))
            break;
          return Intrinsic::nvvm_add_rm_ftz_f;	 // "__nvvm_add_rm_ftz_f"
        case 'n':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+13, "_ftz_f", 6))
            break;
          return Intrinsic::nvvm_add_rn_ftz_f;	 // "__nvvm_add_rn_ftz_f"
        case 'p':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+13, "_ftz_f", 6))
            break;
          return Intrinsic::nvvm_add_rp_ftz_f;	 // "__nvvm_add_rp_ftz_f"
        case 'z':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+13, "_ftz_f", 6))
            break;
          return Intrinsic::nvvm_add_rz_ftz_f;	 // "__nvvm_add_rz_ftz_f"
        }
        break;
      case 'b':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+8, "itcast_", 7))
          break;
        switch (BuiltinName[15]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+16, "2ll", 3))
            break;
          return Intrinsic::nvvm_bitcast_d2ll;	 // "__nvvm_bitcast_d2ll"
        case 'l':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+16, "l2d", 3))
            break;
          return Intrinsic::nvvm_bitcast_ll2d;	 // "__nvvm_bitcast_ll2d"
        }
        break;
      case 'c':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+8, "os_approx_f", 11))
          break;
        return Intrinsic::nvvm_cos_approx_f;	 // "__nvvm_cos_approx_f"
      case 'd':	 // 5 strings to match.
        if (memcmp(BuiltinName.data()+8, "iv_", 3))
          break;
        switch (BuiltinName[11]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+12, "pprox_f", 7))
            break;
          return Intrinsic::nvvm_div_approx_f;	 // "__nvvm_div_approx_f"
        case 'r':	 // 4 strings to match.
          switch (BuiltinName[12]) {
          default: break;
          case 'm':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+13, "_ftz_f", 6))
              break;
            return Intrinsic::nvvm_div_rm_ftz_f;	 // "__nvvm_div_rm_ftz_f"
          case 'n':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+13, "_ftz_f", 6))
              break;
            return Intrinsic::nvvm_div_rn_ftz_f;	 // "__nvvm_div_rn_ftz_f"
          case 'p':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+13, "_ftz_f", 6))
              break;
            return Intrinsic::nvvm_div_rp_ftz_f;	 // "__nvvm_div_rp_ftz_f"
          case 'z':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+13, "_ftz_f", 6))
              break;
            return Intrinsic::nvvm_div_rz_ftz_f;	 // "__nvvm_div_rz_ftz_f"
          }
          break;
        }
        break;
      case 'e':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+8, "x2_approx_", 10))
          break;
        switch (BuiltinName[18]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::nvvm_ex2_approx_d;	 // "__nvvm_ex2_approx_d"
        case 'f':	 // 1 string to match.
          return Intrinsic::nvvm_ex2_approx_f;	 // "__nvvm_ex2_approx_f"
        }
        break;
      case 'f':	 // 8 strings to match.
        switch (BuiltinName[8]) {
        default: break;
        case '2':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+9, "ull_r", 5))
            break;
          switch (BuiltinName[14]) {
          default: break;
          case 'm':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+15, "_ftz", 4))
              break;
            return Intrinsic::nvvm_f2ull_rm_ftz;	 // "__nvvm_f2ull_rm_ftz"
          case 'n':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+15, "_ftz", 4))
              break;
            return Intrinsic::nvvm_f2ull_rn_ftz;	 // "__nvvm_f2ull_rn_ftz"
          case 'p':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+15, "_ftz", 4))
              break;
            return Intrinsic::nvvm_f2ull_rp_ftz;	 // "__nvvm_f2ull_rp_ftz"
          case 'z':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+15, "_ftz", 4))
              break;
            return Intrinsic::nvvm_f2ull_rz_ftz;	 // "__nvvm_f2ull_rz_ftz"
          }
          break;
        case 'm':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+9, "a_r", 3))
            break;
          switch (BuiltinName[12]) {
          default: break;
          case 'm':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+13, "_ftz_f", 6))
              break;
            return Intrinsic::nvvm_fma_rm_ftz_f;	 // "__nvvm_fma_rm_ftz_f"
          case 'n':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+13, "_ftz_f", 6))
              break;
            return Intrinsic::nvvm_fma_rn_ftz_f;	 // "__nvvm_fma_rn_ftz_f"
          case 'p':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+13, "_ftz_f", 6))
              break;
            return Intrinsic::nvvm_fma_rp_ftz_f;	 // "__nvvm_fma_rp_ftz_f"
          case 'z':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+13, "_ftz_f", 6))
              break;
            return Intrinsic::nvvm_fma_rz_ftz_f;	 // "__nvvm_fma_rz_ftz_f"
          }
          break;
        }
        break;
      case 'l':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+8, "g2_approx_", 10))
          break;
        switch (BuiltinName[18]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::nvvm_lg2_approx_d;	 // "__nvvm_lg2_approx_d"
        case 'f':	 // 1 string to match.
          return Intrinsic::nvvm_lg2_approx_f;	 // "__nvvm_lg2_approx_f"
        }
        break;
      case 'm':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+8, "ul_r", 4))
          break;
        switch (BuiltinName[12]) {
        default: break;
        case 'm':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+13, "_ftz_f", 6))
            break;
          return Intrinsic::nvvm_mul_rm_ftz_f;	 // "__nvvm_mul_rm_ftz_f"
        case 'n':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+13, "_ftz_f", 6))
            break;
          return Intrinsic::nvvm_mul_rn_ftz_f;	 // "__nvvm_mul_rn_ftz_f"
        case 'p':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+13, "_ftz_f", 6))
            break;
          return Intrinsic::nvvm_mul_rp_ftz_f;	 // "__nvvm_mul_rp_ftz_f"
        case 'z':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+13, "_ftz_f", 6))
            break;
          return Intrinsic::nvvm_mul_rz_ftz_f;	 // "__nvvm_mul_rz_ftz_f"
        }
        break;
      case 'r':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+8, "cp_r", 4))
          break;
        switch (BuiltinName[12]) {
        default: break;
        case 'm':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+13, "_ftz_f", 6))
            break;
          return Intrinsic::nvvm_rcp_rm_ftz_f;	 // "__nvvm_rcp_rm_ftz_f"
        case 'n':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+13, "_ftz_f", 6))
            break;
          return Intrinsic::nvvm_rcp_rn_ftz_f;	 // "__nvvm_rcp_rn_ftz_f"
        case 'p':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+13, "_ftz_f", 6))
            break;
          return Intrinsic::nvvm_rcp_rp_ftz_f;	 // "__nvvm_rcp_rp_ftz_f"
        case 'z':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+13, "_ftz_f", 6))
            break;
          return Intrinsic::nvvm_rcp_rz_ftz_f;	 // "__nvvm_rcp_rz_ftz_f"
        }
        break;
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+8, "in_approx_f", 11))
          break;
        return Intrinsic::nvvm_sin_approx_f;	 // "__nvvm_sin_approx_f"
      }
      break;
    }
    break;
  case 20:	 // 7 strings to match.
    if (memcmp(BuiltinName.data()+0, "__", 2))
      break;
    switch (BuiltinName[2]) {
    default: break;
    case 'b':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+3, "uiltin_", 7))
        break;
      switch (BuiltinName[10]) {
      default: break;
      case 'f':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+11, "lt_rounds", 9))
          break;
        return Intrinsic::flt_rounds;	 // "__builtin_flt_rounds"
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+11, "tack_save", 9))
          break;
        return Intrinsic::stacksave;	 // "__builtin_stack_save"
      }
      break;
    case 'n':	 // 5 strings to match.
      if (memcmp(BuiltinName.data()+3, "vvm_sqrt_", 9))
        break;
      switch (BuiltinName[12]) {
      default: break;
      case 'a':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+13, "pprox_f", 7))
          break;
        return Intrinsic::nvvm_sqrt_approx_f;	 // "__nvvm_sqrt_approx_f"
      case 'r':	 // 4 strings to match.
        switch (BuiltinName[13]) {
        default: break;
        case 'm':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+14, "_ftz_f", 6))
            break;
          return Intrinsic::nvvm_sqrt_rm_ftz_f;	 // "__nvvm_sqrt_rm_ftz_f"
        case 'n':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+14, "_ftz_f", 6))
            break;
          return Intrinsic::nvvm_sqrt_rn_ftz_f;	 // "__nvvm_sqrt_rn_ftz_f"
        case 'p':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+14, "_ftz_f", 6))
            break;
          return Intrinsic::nvvm_sqrt_rp_ftz_f;	 // "__nvvm_sqrt_rp_ftz_f"
        case 'z':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+14, "_ftz_f", 6))
            break;
          return Intrinsic::nvvm_sqrt_rz_ftz_f;	 // "__nvvm_sqrt_rz_ftz_f"
        }
        break;
      }
      break;
    }
    break;
  case 21:	 // 28 strings to match.
    if (memcmp(BuiltinName.data()+0, "__", 2))
      break;
    switch (BuiltinName[2]) {
    default: break;
    case 'b':	 // 20 strings to match.
      if (memcmp(BuiltinName.data()+3, "uiltin_", 7))
        break;
      switch (BuiltinName[10]) {
      default: break;
      case 'i':	 // 18 strings to match.
        if (memcmp(BuiltinName.data()+11, "a32_vp", 6))
          break;
        switch (BuiltinName[17]) {
        default: break;
        case 'c':	 // 5 strings to match.
          switch (BuiltinName[18]) {
          default: break;
          case 'm':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+19, "ov", 2))
              break;
            return Intrinsic::x86_xop_vpcmov;	 // "__builtin_ia32_vpcmov"
          case 'o':	 // 4 strings to match.
            if (BuiltinName[19] != 'm')
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::x86_xop_vpcomb;	 // "__builtin_ia32_vpcomb"
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_xop_vpcomd;	 // "__builtin_ia32_vpcomd"
            case 'q':	 // 1 string to match.
              return Intrinsic::x86_xop_vpcomq;	 // "__builtin_ia32_vpcomq"
            case 'w':	 // 1 string to match.
              return Intrinsic::x86_xop_vpcomw;	 // "__builtin_ia32_vpcomw"
            }
            break;
          }
          break;
        case 'p':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "erm", 3))
            break;
          return Intrinsic::x86_xop_vpperm;	 // "__builtin_ia32_vpperm"
        case 'r':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+18, "ot", 2))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::x86_xop_vprotb;	 // "__builtin_ia32_vprotb"
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_xop_vprotd;	 // "__builtin_ia32_vprotd"
          case 'q':	 // 1 string to match.
            return Intrinsic::x86_xop_vprotq;	 // "__builtin_ia32_vprotq"
          case 'w':	 // 1 string to match.
            return Intrinsic::x86_xop_vprotw;	 // "__builtin_ia32_vprotw"
          }
          break;
        case 's':	 // 8 strings to match.
          if (BuiltinName[18] != 'h')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'a':	 // 4 strings to match.
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::x86_xop_vpshab;	 // "__builtin_ia32_vpshab"
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_xop_vpshad;	 // "__builtin_ia32_vpshad"
            case 'q':	 // 1 string to match.
              return Intrinsic::x86_xop_vpshaq;	 // "__builtin_ia32_vpshaq"
            case 'w':	 // 1 string to match.
              return Intrinsic::x86_xop_vpshaw;	 // "__builtin_ia32_vpshaw"
            }
            break;
          case 'l':	 // 4 strings to match.
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::x86_xop_vpshlb;	 // "__builtin_ia32_vpshlb"
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_xop_vpshld;	 // "__builtin_ia32_vpshld"
            case 'q':	 // 1 string to match.
              return Intrinsic::x86_xop_vpshlq;	 // "__builtin_ia32_vpshlq"
            case 'w':	 // 1 string to match.
              return Intrinsic::x86_xop_vpshlw;	 // "__builtin_ia32_vpshlw"
            }
            break;
          }
          break;
        }
        break;
      case 'o':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+11, "bject_size", 10))
          break;
        return Intrinsic::objectsize;	 // "__builtin_object_size"
      case 'u':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+11, "nwind_init", 10))
          break;
        return Intrinsic::eh_unwind_init;	 // "__builtin_unwind_init"
      }
      break;
    case 'n':	 // 8 strings to match.
      if (memcmp(BuiltinName.data()+3, "vvm_", 4))
        break;
      switch (BuiltinName[7]) {
      default: break;
      case 'i':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+8, "sspacep_", 8))
          break;
        switch (BuiltinName[16]) {
        default: break;
        case 'c':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+17, "onst", 4))
            break;
          return Intrinsic::nvvm_isspacep_const;	 // "__nvvm_isspacep_const"
        case 'l':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+17, "ocal", 4))
            break;
          return Intrinsic::nvvm_isspacep_local;	 // "__nvvm_isspacep_local"
        }
        break;
      case 'r':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+8, "sqrt_approx_", 12))
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::nvvm_rsqrt_approx_d;	 // "__nvvm_rsqrt_approx_d"
        case 'f':	 // 1 string to match.
          return Intrinsic::nvvm_rsqrt_approx_f;	 // "__nvvm_rsqrt_approx_f"
        }
        break;
      case 's':	 // 3 strings to match.
        switch (BuiltinName[8]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+9, "turate_ftz_f", 12))
            break;
          return Intrinsic::nvvm_saturate_ftz_f;	 // "__nvvm_saturate_ftz_f"
        case 'u':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+9, "q_array_size", 12))
            break;
          return Intrinsic::nvvm_suq_array_size;	 // "__nvvm_suq_array_size"
        case 'w':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+9, "ap_lo_hi_b64", 12))
            break;
          return Intrinsic::nvvm_swap_lo_hi_b64;	 // "__nvvm_swap_lo_hi_b64"
        }
        break;
      case 't':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+8, "xq_array_size", 13))
          break;
        return Intrinsic::nvvm_txq_array_size;	 // "__nvvm_txq_array_size"
      }
      break;
    }
    break;
  case 22:	 // 23 strings to match.
    if (memcmp(BuiltinName.data()+0, "__", 2))
      break;
    switch (BuiltinName[2]) {
    default: break;
    case 'b':	 // 17 strings to match.
      if (memcmp(BuiltinName.data()+3, "uiltin_", 7))
        break;
      switch (BuiltinName[10]) {
      default: break;
      case 'i':	 // 12 strings to match.
        if (memcmp(BuiltinName.data()+11, "a32_v", 5))
          break;
        switch (BuiltinName[16]) {
        default: break;
        case 'f':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+17, "rcz", 3))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'p':	 // 2 strings to match.
            switch (BuiltinName[21]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_xop_vfrcz_pd;	 // "__builtin_ia32_vfrczpd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_xop_vfrcz_ps;	 // "__builtin_ia32_vfrczps"
            }
            break;
          case 's':	 // 2 strings to match.
            switch (BuiltinName[21]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_xop_vfrcz_sd;	 // "__builtin_ia32_vfrczsd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_xop_vfrcz_ss;	 // "__builtin_ia32_vfrczss"
            }
            break;
          }
          break;
        case 'p':	 // 8 strings to match.
          switch (BuiltinName[17]) {
          default: break;
          case 'c':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+18, "omu", 3))
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::x86_xop_vpcomub;	 // "__builtin_ia32_vpcomub"
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_xop_vpcomud;	 // "__builtin_ia32_vpcomud"
            case 'q':	 // 1 string to match.
              return Intrinsic::x86_xop_vpcomuq;	 // "__builtin_ia32_vpcomuq"
            case 'w':	 // 1 string to match.
              return Intrinsic::x86_xop_vpcomuw;	 // "__builtin_ia32_vpcomuw"
            }
            break;
          case 'r':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+18, "ot", 2))
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              if (BuiltinName[21] != 'i')
                break;
              return Intrinsic::x86_xop_vprotbi;	 // "__builtin_ia32_vprotbi"
            case 'd':	 // 1 string to match.
              if (BuiltinName[21] != 'i')
                break;
              return Intrinsic::x86_xop_vprotdi;	 // "__builtin_ia32_vprotdi"
            case 'q':	 // 1 string to match.
              if (BuiltinName[21] != 'i')
                break;
              return Intrinsic::x86_xop_vprotqi;	 // "__builtin_ia32_vprotqi"
            case 'w':	 // 1 string to match.
              if (BuiltinName[21] != 'i')
                break;
              return Intrinsic::x86_xop_vprotwi;	 // "__builtin_ia32_vprotwi"
            }
            break;
          }
          break;
        }
        break;
      case 'p':	 // 5 strings to match.
        if (memcmp(BuiltinName.data()+11, "tx_", 3))
          break;
        switch (BuiltinName[14]) {
        default: break;
        case 'b':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+15, "ar_sync", 7))
            break;
          return Intrinsic::ptx_bar_sync;	 // "__builtin_ptx_bar_sync"
        case 'r':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+15, "ead_pm", 6))
            break;
          switch (BuiltinName[21]) {
          default: break;
          case '0':	 // 1 string to match.
            return Intrinsic::ptx_read_pm0;	 // "__builtin_ptx_read_pm0"
          case '1':	 // 1 string to match.
            return Intrinsic::ptx_read_pm1;	 // "__builtin_ptx_read_pm1"
          case '2':	 // 1 string to match.
            return Intrinsic::ptx_read_pm2;	 // "__builtin_ptx_read_pm2"
          case '3':	 // 1 string to match.
            return Intrinsic::ptx_read_pm3;	 // "__builtin_ptx_read_pm3"
          }
          break;
        }
        break;
      }
      break;
    case 'n':	 // 6 strings to match.
      if (memcmp(BuiltinName.data()+3, "vvm_", 4))
        break;
      switch (BuiltinName[7]) {
      default: break;
      case 'i':	 // 5 strings to match.
        if (BuiltinName[8] != 's')
          break;
        switch (BuiltinName[9]) {
        default: break;
        case 's':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+10, "pacep_", 6))
            break;
          switch (BuiltinName[16]) {
          default: break;
          case 'g':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+17, "lobal", 5))
              break;
            return Intrinsic::nvvm_isspacep_global;	 // "__nvvm_isspacep_global"
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+17, "hared", 5))
              break;
            return Intrinsic::nvvm_isspacep_shared;	 // "__nvvm_isspacep_shared"
          }
          break;
        case 't':	 // 3 strings to match.
          if (memcmp(BuiltinName.data()+10, "ypep_", 5))
            break;
          switch (BuiltinName[15]) {
          default: break;
          case 's':	 // 2 strings to match.
            switch (BuiltinName[16]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+17, "mpler", 5))
                break;
              return Intrinsic::nvvm_istypep_sampler;	 // "__nvvm_istypep_sampler"
            case 'u':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+17, "rface", 5))
                break;
              return Intrinsic::nvvm_istypep_surface;	 // "__nvvm_istypep_surface"
            }
            break;
          case 't':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+16, "exture", 6))
              break;
            return Intrinsic::nvvm_istypep_texture;	 // "__nvvm_istypep_texture"
          }
          break;
        }
        break;
      case 't':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+8, "xq_num_samples", 14))
          break;
        return Intrinsic::nvvm_txq_num_samples;	 // "__nvvm_txq_num_samples"
      }
      break;
    }
    break;
  case 23:	 // 21 strings to match.
    if (memcmp(BuiltinName.data()+0, "__", 2))
      break;
    switch (BuiltinName[2]) {
    default: break;
    case 'b':	 // 14 strings to match.
      if (memcmp(BuiltinName.data()+3, "uiltin_", 7))
        break;
      switch (BuiltinName[10]) {
      default: break;
      case 'i':	 // 12 strings to match.
        if (memcmp(BuiltinName.data()+11, "a32_vp", 6))
          break;
        switch (BuiltinName[17]) {
        default: break;
        case 'h':	 // 9 strings to match.
          switch (BuiltinName[18]) {
          default: break;
          case 'a':	 // 6 strings to match.
            if (memcmp(BuiltinName.data()+19, "dd", 2))
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'b':	 // 3 strings to match.
              switch (BuiltinName[22]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_xop_vphaddbd;	 // "__builtin_ia32_vphaddbd"
              case 'q':	 // 1 string to match.
                return Intrinsic::x86_xop_vphaddbq;	 // "__builtin_ia32_vphaddbq"
              case 'w':	 // 1 string to match.
                return Intrinsic::x86_xop_vphaddbw;	 // "__builtin_ia32_vphaddbw"
              }
              break;
            case 'd':	 // 1 string to match.
              if (BuiltinName[22] != 'q')
                break;
              return Intrinsic::x86_xop_vphadddq;	 // "__builtin_ia32_vphadddq"
            case 'w':	 // 2 strings to match.
              switch (BuiltinName[22]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_xop_vphaddwd;	 // "__builtin_ia32_vphaddwd"
              case 'q':	 // 1 string to match.
                return Intrinsic::x86_xop_vphaddwq;	 // "__builtin_ia32_vphaddwq"
              }
              break;
            }
            break;
          case 's':	 // 3 strings to match.
            if (memcmp(BuiltinName.data()+19, "ub", 2))
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'b':	 // 1 string to match.
              if (BuiltinName[22] != 'w')
                break;
              return Intrinsic::x86_xop_vphsubbw;	 // "__builtin_ia32_vphsubbw"
            case 'd':	 // 1 string to match.
              if (BuiltinName[22] != 'q')
                break;
              return Intrinsic::x86_xop_vphsubdq;	 // "__builtin_ia32_vphsubdq"
            case 'w':	 // 1 string to match.
              if (BuiltinName[22] != 'd')
                break;
              return Intrinsic::x86_xop_vphsubwd;	 // "__builtin_ia32_vphsubwd"
            }
            break;
          }
          break;
        case 'm':	 // 3 strings to match.
          if (memcmp(BuiltinName.data()+18, "acs", 3))
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (BuiltinName[22] != 'd')
              break;
            return Intrinsic::x86_xop_vpmacsdd;	 // "__builtin_ia32_vpmacsdd"
          case 'w':	 // 2 strings to match.
            switch (BuiltinName[22]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_xop_vpmacswd;	 // "__builtin_ia32_vpmacswd"
            case 'w':	 // 1 string to match.
              return Intrinsic::x86_xop_vpmacsww;	 // "__builtin_ia32_vpmacsww"
            }
            break;
          }
          break;
        }
        break;
      case 'p':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+11, "tx_read_smid", 12))
          break;
        return Intrinsic::ptx_read_smid;	 // "__builtin_ptx_read_smid"
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+11, "tack_restore", 12))
          break;
        return Intrinsic::stackrestore;	 // "__builtin_stack_restore"
      }
      break;
    case 'n':	 // 7 strings to match.
      if (memcmp(BuiltinName.data()+3, "vvm_", 4))
        break;
      switch (BuiltinName[7]) {
      default: break;
      case 'c':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+8, "os_approx_ftz_f", 15))
          break;
        return Intrinsic::nvvm_cos_approx_ftz_f;	 // "__nvvm_cos_approx_ftz_f"
      case 'd':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+8, "iv_approx_ftz_f", 15))
          break;
        return Intrinsic::nvvm_div_approx_ftz_f;	 // "__nvvm_div_approx_ftz_f"
      case 'e':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+8, "x2_approx_ftz_f", 15))
          break;
        return Intrinsic::nvvm_ex2_approx_ftz_f;	 // "__nvvm_ex2_approx_ftz_f"
      case 'l':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+8, "g2_approx_ftz_f", 15))
          break;
        return Intrinsic::nvvm_lg2_approx_ftz_f;	 // "__nvvm_lg2_approx_ftz_f"
      case 'r':	 // 2 strings to match.
        switch (BuiltinName[8]) {
        default: break;
        case 'c':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+9, "p_approx_ftz_d", 14))
            break;
          return Intrinsic::nvvm_rcp_approx_ftz_d;	 // "__nvvm_rcp_approx_ftz_d"
        case 'o':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+9, "tate_right_b64", 14))
            break;
          return Intrinsic::nvvm_rotate_right_b64;	 // "__nvvm_rotate_right_b64"
        }
        break;
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+8, "in_approx_ftz_f", 15))
          break;
        return Intrinsic::nvvm_sin_approx_ftz_f;	 // "__nvvm_sin_approx_ftz_f"
      }
      break;
    }
    break;
  case 24:	 // 30 strings to match.
    if (memcmp(BuiltinName.data()+0, "__", 2))
      break;
    switch (BuiltinName[2]) {
    default: break;
    case 'b':	 // 18 strings to match.
      if (memcmp(BuiltinName.data()+3, "uiltin_", 7))
        break;
      switch (BuiltinName[10]) {
      default: break;
      case 'i':	 // 12 strings to match.
        if (memcmp(BuiltinName.data()+11, "a32_vp", 6))
          break;
        switch (BuiltinName[17]) {
        default: break;
        case 'h':	 // 6 strings to match.
          if (memcmp(BuiltinName.data()+18, "addu", 4))
            break;
          switch (BuiltinName[22]) {
          default: break;
          case 'b':	 // 3 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_xop_vphaddubd;	 // "__builtin_ia32_vphaddubd"
            case 'q':	 // 1 string to match.
              return Intrinsic::x86_xop_vphaddubq;	 // "__builtin_ia32_vphaddubq"
            case 'w':	 // 1 string to match.
              return Intrinsic::x86_xop_vphaddubw;	 // "__builtin_ia32_vphaddubw"
            }
            break;
          case 'd':	 // 1 string to match.
            if (BuiltinName[23] != 'q')
              break;
            return Intrinsic::x86_xop_vphaddudq;	 // "__builtin_ia32_vphaddudq"
          case 'w':	 // 2 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_xop_vphadduwd;	 // "__builtin_ia32_vphadduwd"
            case 'q':	 // 1 string to match.
              return Intrinsic::x86_xop_vphadduwq;	 // "__builtin_ia32_vphadduwq"
            }
            break;
          }
          break;
        case 'm':	 // 6 strings to match.
          if (BuiltinName[18] != 'a')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'c':	 // 5 strings to match.
            if (BuiltinName[20] != 's')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'd':	 // 2 strings to match.
              if (BuiltinName[22] != 'q')
                break;
              switch (BuiltinName[23]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::x86_xop_vpmacsdqh;	 // "__builtin_ia32_vpmacsdqh"
              case 'l':	 // 1 string to match.
                return Intrinsic::x86_xop_vpmacsdql;	 // "__builtin_ia32_vpmacsdql"
              }
              break;
            case 's':	 // 3 strings to match.
              switch (BuiltinName[22]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (BuiltinName[23] != 'd')
                  break;
                return Intrinsic::x86_xop_vpmacssdd;	 // "__builtin_ia32_vpmacssdd"
              case 'w':	 // 2 strings to match.
                switch (BuiltinName[23]) {
                default: break;
                case 'd':	 // 1 string to match.
                  return Intrinsic::x86_xop_vpmacsswd;	 // "__builtin_ia32_vpmacsswd"
                case 'w':	 // 1 string to match.
                  return Intrinsic::x86_xop_vpmacssww;	 // "__builtin_ia32_vpmacssww"
                }
                break;
              }
              break;
            }
            break;
          case 'd':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+20, "cswd", 4))
              break;
            return Intrinsic::x86_xop_vpmadcswd;	 // "__builtin_ia32_vpmadcswd"
          }
          break;
        }
        break;
      case 'p':	 // 6 strings to match.
        if (memcmp(BuiltinName.data()+11, "tx_read_", 8))
          break;
        switch (BuiltinName[19]) {
        default: break;
        case 'c':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "lock", 4))
            break;
          return Intrinsic::ptx_read_clock;	 // "__builtin_ptx_read_clock"
        case 'n':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "smid", 4))
            break;
          return Intrinsic::ptx_read_nsmid;	 // "__builtin_ptx_read_nsmid"
        case 't':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+20, "id_", 3))
            break;
          switch (BuiltinName[23]) {
          default: break;
          case 'w':	 // 1 string to match.
            return Intrinsic::ptx_read_tid_w;	 // "__builtin_ptx_read_tid_w"
          case 'x':	 // 1 string to match.
            return Intrinsic::ptx_read_tid_x;	 // "__builtin_ptx_read_tid_x"
          case 'y':	 // 1 string to match.
            return Intrinsic::ptx_read_tid_y;	 // "__builtin_ptx_read_tid_y"
          case 'z':	 // 1 string to match.
            return Intrinsic::ptx_read_tid_z;	 // "__builtin_ptx_read_tid_z"
          }
          break;
        }
        break;
      }
      break;
    case 'n':	 // 12 strings to match.
      if (memcmp(BuiltinName.data()+3, "vvm_", 4))
        break;
      switch (BuiltinName[7]) {
      default: break;
      case 's':	 // 11 strings to match.
        switch (BuiltinName[8]) {
        default: break;
        case 'q':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+9, "rt_approx_ftz_f", 15))
            break;
          return Intrinsic::nvvm_sqrt_approx_ftz_f;	 // "__nvvm_sqrt_approx_ftz_f"
        case 'u':	 // 10 strings to match.
          switch (BuiltinName[9]) {
          default: break;
          case 'q':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+10, "_channel_order", 14))
              break;
            return Intrinsic::nvvm_suq_channel_order;	 // "__nvvm_suq_channel_order"
          case 's':	 // 9 strings to match.
            if (memcmp(BuiltinName.data()+10, "t_", 2))
              break;
            switch (BuiltinName[12]) {
            default: break;
            case 'b':	 // 6 strings to match.
              if (BuiltinName[13] != '_')
                break;
              switch (BuiltinName[14]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+15, "d_i8_", 5))
                  break;
                switch (BuiltinName[20]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+21, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_i8_trap;	 // "__nvvm_sust_b_1d_i8_trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+21, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_i8_zero;	 // "__nvvm_sust_b_1d_i8_zero"
                }
                break;
              case '2':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+15, "d_i8_", 5))
                  break;
                switch (BuiltinName[20]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+21, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_i8_trap;	 // "__nvvm_sust_b_2d_i8_trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+21, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_i8_zero;	 // "__nvvm_sust_b_2d_i8_zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+15, "d_i8_", 5))
                  break;
                switch (BuiltinName[20]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+21, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_i8_trap;	 // "__nvvm_sust_b_3d_i8_trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+21, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_i8_zero;	 // "__nvvm_sust_b_3d_i8_zero"
                }
                break;
              }
              break;
            case 'p':	 // 3 strings to match.
              if (BuiltinName[13] != '_')
                break;
              switch (BuiltinName[14]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+15, "d_i8_trap", 9))
                  break;
                return Intrinsic::nvvm_sust_p_1d_i8_trap;	 // "__nvvm_sust_p_1d_i8_trap"
              case '2':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+15, "d_i8_trap", 9))
                  break;
                return Intrinsic::nvvm_sust_p_2d_i8_trap;	 // "__nvvm_sust_p_2d_i8_trap"
              case '3':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+15, "d_i8_trap", 9))
                  break;
                return Intrinsic::nvvm_sust_p_3d_i8_trap;	 // "__nvvm_sust_p_3d_i8_trap"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 't':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+8, "xq_channel_order", 16))
          break;
        return Intrinsic::nvvm_txq_channel_order;	 // "__nvvm_txq_channel_order"
      }
      break;
    }
    break;
  case 25:	 // 44 strings to match.
    if (memcmp(BuiltinName.data()+0, "__", 2))
      break;
    switch (BuiltinName[2]) {
    default: break;
    case 'b':	 // 16 strings to match.
      if (memcmp(BuiltinName.data()+3, "uiltin_", 7))
        break;
      switch (BuiltinName[10]) {
      default: break;
      case 'i':	 // 9 strings to match.
        switch (BuiltinName[11]) {
        default: break;
        case 'a':	 // 8 strings to match.
          if (memcmp(BuiltinName.data()+12, "32_v", 4))
            break;
          switch (BuiltinName[16]) {
          default: break;
          case 'f':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+17, "rczp", 4))
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "256", 3))
                break;
              return Intrinsic::x86_xop_vfrcz_pd_256;	 // "__builtin_ia32_vfrczpd256"
            case 's':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "256", 3))
                break;
              return Intrinsic::x86_xop_vfrcz_ps_256;	 // "__builtin_ia32_vfrczps256"
            }
            break;
          case 'p':	 // 6 strings to match.
            switch (BuiltinName[17]) {
            default: break;
            case 'c':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+18, "mov_256", 7))
                break;
              return Intrinsic::x86_xop_vpcmov_256;	 // "__builtin_ia32_vpcmov_256"
            case 'e':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+18, "rmil2p", 6))
                break;
              switch (BuiltinName[24]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_xop_vpermil2pd;	 // "__builtin_ia32_vpermil2pd"
              case 's':	 // 1 string to match.
                return Intrinsic::x86_xop_vpermil2ps;	 // "__builtin_ia32_vpermil2ps"
              }
              break;
            case 'm':	 // 3 strings to match.
              if (BuiltinName[18] != 'a')
                break;
              switch (BuiltinName[19]) {
              default: break;
              case 'c':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+20, "ssdq", 4))
                  break;
                switch (BuiltinName[24]) {
                default: break;
                case 'h':	 // 1 string to match.
                  return Intrinsic::x86_xop_vpmacssdqh;	 // "__builtin_ia32_vpmacssdqh"
                case 'l':	 // 1 string to match.
                  return Intrinsic::x86_xop_vpmacssdql;	 // "__builtin_ia32_vpmacssdql"
                }
                break;
              case 'd':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+20, "csswd", 5))
                  break;
                return Intrinsic::x86_xop_vpmadcsswd;	 // "__builtin_ia32_vpmadcsswd"
              }
              break;
            }
            break;
          }
          break;
        case 'n':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+12, "it_trampoline", 13))
            break;
          return Intrinsic::init_trampoline;	 // "__builtin_init_trampoline"
        }
        break;
      case 'p':	 // 7 strings to match.
        if (memcmp(BuiltinName.data()+11, "tx_read_", 8))
          break;
        switch (BuiltinName[19]) {
        default: break;
        case 'g':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "ridid", 5))
            break;
          return Intrinsic::ptx_read_gridid;	 // "__builtin_ptx_read_gridid"
        case 'l':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "aneid", 5))
            break;
          return Intrinsic::ptx_read_laneid;	 // "__builtin_ptx_read_laneid"
        case 'n':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+20, "tid_", 4))
            break;
          switch (BuiltinName[24]) {
          default: break;
          case 'w':	 // 1 string to match.
            return Intrinsic::ptx_read_ntid_w;	 // "__builtin_ptx_read_ntid_w"
          case 'x':	 // 1 string to match.
            return Intrinsic::ptx_read_ntid_x;	 // "__builtin_ptx_read_ntid_x"
          case 'y':	 // 1 string to match.
            return Intrinsic::ptx_read_ntid_y;	 // "__builtin_ptx_read_ntid_y"
          case 'z':	 // 1 string to match.
            return Intrinsic::ptx_read_ntid_z;	 // "__builtin_ptx_read_ntid_z"
          }
          break;
        case 'w':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "arpid", 5))
            break;
          return Intrinsic::ptx_read_warpid;	 // "__builtin_ptx_read_warpid"
        }
        break;
      }
      break;
    case 'n':	 // 28 strings to match.
      if (memcmp(BuiltinName.data()+3, "vvm_", 4))
        break;
      switch (BuiltinName[7]) {
      default: break;
      case 'r':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+8, "sqrt_approx_ftz_f", 17))
          break;
        return Intrinsic::nvvm_rsqrt_approx_ftz_f;	 // "__nvvm_rsqrt_approx_ftz_f"
      case 's':	 // 27 strings to match.
        if (memcmp(BuiltinName.data()+8, "ust_", 4))
          break;
        switch (BuiltinName[12]) {
        default: break;
        case 'b':	 // 21 strings to match.
          if (BuiltinName[13] != '_')
            break;
          switch (BuiltinName[14]) {
          default: break;
          case '1':	 // 7 strings to match.
            if (memcmp(BuiltinName.data()+15, "d_i", 3))
              break;
            switch (BuiltinName[18]) {
            default: break;
            case '1':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+19, "6_", 2))
                break;
              switch (BuiltinName[21]) {
              default: break;
              case 't':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "rap", 3))
                  break;
                return Intrinsic::nvvm_sust_b_1d_i16_trap;	 // "__nvvm_sust_b_1d_i16_trap"
              case 'z':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "ero", 3))
                  break;
                return Intrinsic::nvvm_sust_b_1d_i16_zero;	 // "__nvvm_sust_b_1d_i16_zero"
              }
              break;
            case '3':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+19, "2_", 2))
                break;
              switch (BuiltinName[21]) {
              default: break;
              case 't':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "rap", 3))
                  break;
                return Intrinsic::nvvm_sust_b_1d_i32_trap;	 // "__nvvm_sust_b_1d_i32_trap"
              case 'z':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "ero", 3))
                  break;
                return Intrinsic::nvvm_sust_b_1d_i32_zero;	 // "__nvvm_sust_b_1d_i32_zero"
              }
              break;
            case '6':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+19, "4_", 2))
                break;
              switch (BuiltinName[21]) {
              default: break;
              case 't':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "rap", 3))
                  break;
                return Intrinsic::nvvm_sust_b_1d_i64_trap;	 // "__nvvm_sust_b_1d_i64_trap"
              case 'z':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "ero", 3))
                  break;
                return Intrinsic::nvvm_sust_b_1d_i64_zero;	 // "__nvvm_sust_b_1d_i64_zero"
              }
              break;
            case '8':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+19, "_clamp", 6))
                break;
              return Intrinsic::nvvm_sust_b_1d_i8_clamp;	 // "__nvvm_sust_b_1d_i8_clamp"
            }
            break;
          case '2':	 // 7 strings to match.
            if (memcmp(BuiltinName.data()+15, "d_i", 3))
              break;
            switch (BuiltinName[18]) {
            default: break;
            case '1':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+19, "6_", 2))
                break;
              switch (BuiltinName[21]) {
              default: break;
              case 't':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "rap", 3))
                  break;
                return Intrinsic::nvvm_sust_b_2d_i16_trap;	 // "__nvvm_sust_b_2d_i16_trap"
              case 'z':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "ero", 3))
                  break;
                return Intrinsic::nvvm_sust_b_2d_i16_zero;	 // "__nvvm_sust_b_2d_i16_zero"
              }
              break;
            case '3':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+19, "2_", 2))
                break;
              switch (BuiltinName[21]) {
              default: break;
              case 't':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "rap", 3))
                  break;
                return Intrinsic::nvvm_sust_b_2d_i32_trap;	 // "__nvvm_sust_b_2d_i32_trap"
              case 'z':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "ero", 3))
                  break;
                return Intrinsic::nvvm_sust_b_2d_i32_zero;	 // "__nvvm_sust_b_2d_i32_zero"
              }
              break;
            case '6':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+19, "4_", 2))
                break;
              switch (BuiltinName[21]) {
              default: break;
              case 't':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "rap", 3))
                  break;
                return Intrinsic::nvvm_sust_b_2d_i64_trap;	 // "__nvvm_sust_b_2d_i64_trap"
              case 'z':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "ero", 3))
                  break;
                return Intrinsic::nvvm_sust_b_2d_i64_zero;	 // "__nvvm_sust_b_2d_i64_zero"
              }
              break;
            case '8':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+19, "_clamp", 6))
                break;
              return Intrinsic::nvvm_sust_b_2d_i8_clamp;	 // "__nvvm_sust_b_2d_i8_clamp"
            }
            break;
          case '3':	 // 7 strings to match.
            if (memcmp(BuiltinName.data()+15, "d_i", 3))
              break;
            switch (BuiltinName[18]) {
            default: break;
            case '1':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+19, "6_", 2))
                break;
              switch (BuiltinName[21]) {
              default: break;
              case 't':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "rap", 3))
                  break;
                return Intrinsic::nvvm_sust_b_3d_i16_trap;	 // "__nvvm_sust_b_3d_i16_trap"
              case 'z':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "ero", 3))
                  break;
                return Intrinsic::nvvm_sust_b_3d_i16_zero;	 // "__nvvm_sust_b_3d_i16_zero"
              }
              break;
            case '3':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+19, "2_", 2))
                break;
              switch (BuiltinName[21]) {
              default: break;
              case 't':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "rap", 3))
                  break;
                return Intrinsic::nvvm_sust_b_3d_i32_trap;	 // "__nvvm_sust_b_3d_i32_trap"
              case 'z':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "ero", 3))
                  break;
                return Intrinsic::nvvm_sust_b_3d_i32_zero;	 // "__nvvm_sust_b_3d_i32_zero"
              }
              break;
            case '6':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+19, "4_", 2))
                break;
              switch (BuiltinName[21]) {
              default: break;
              case 't':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "rap", 3))
                  break;
                return Intrinsic::nvvm_sust_b_3d_i64_trap;	 // "__nvvm_sust_b_3d_i64_trap"
              case 'z':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "ero", 3))
                  break;
                return Intrinsic::nvvm_sust_b_3d_i64_zero;	 // "__nvvm_sust_b_3d_i64_zero"
              }
              break;
            case '8':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+19, "_clamp", 6))
                break;
              return Intrinsic::nvvm_sust_b_3d_i8_clamp;	 // "__nvvm_sust_b_3d_i8_clamp"
            }
            break;
          }
          break;
        case 'p':	 // 6 strings to match.
          if (BuiltinName[13] != '_')
            break;
          switch (BuiltinName[14]) {
          default: break;
          case '1':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+15, "d_i", 3))
              break;
            switch (BuiltinName[18]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+19, "6_trap", 6))
                break;
              return Intrinsic::nvvm_sust_p_1d_i16_trap;	 // "__nvvm_sust_p_1d_i16_trap"
            case '3':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+19, "2_trap", 6))
                break;
              return Intrinsic::nvvm_sust_p_1d_i32_trap;	 // "__nvvm_sust_p_1d_i32_trap"
            }
            break;
          case '2':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+15, "d_i", 3))
              break;
            switch (BuiltinName[18]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+19, "6_trap", 6))
                break;
              return Intrinsic::nvvm_sust_p_2d_i16_trap;	 // "__nvvm_sust_p_2d_i16_trap"
            case '3':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+19, "2_trap", 6))
                break;
              return Intrinsic::nvvm_sust_p_2d_i32_trap;	 // "__nvvm_sust_p_2d_i32_trap"
            }
            break;
          case '3':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+15, "d_i", 3))
              break;
            switch (BuiltinName[18]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+19, "6_trap", 6))
                break;
              return Intrinsic::nvvm_sust_p_3d_i16_trap;	 // "__nvvm_sust_p_3d_i16_trap"
            case '3':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+19, "2_trap", 6))
                break;
              return Intrinsic::nvvm_sust_p_3d_i32_trap;	 // "__nvvm_sust_p_3d_i32_trap"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    }
    break;
  case 26:	 // 36 strings to match.
    if (memcmp(BuiltinName.data()+0, "__", 2))
      break;
    switch (BuiltinName[2]) {
    default: break;
    case 'b':	 // 6 strings to match.
      if (memcmp(BuiltinName.data()+3, "uiltin_ptx_read_", 16))
        break;
      switch (BuiltinName[19]) {
      default: break;
      case 'c':	 // 5 strings to match.
        switch (BuiltinName[20]) {
        default: break;
        case 'l':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "ock64", 5))
            break;
          return Intrinsic::ptx_read_clock64;	 // "__builtin_ptx_read_clock64"
        case 't':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+21, "aid_", 4))
            break;
          switch (BuiltinName[25]) {
          default: break;
          case 'w':	 // 1 string to match.
            return Intrinsic::ptx_read_ctaid_w;	 // "__builtin_ptx_read_ctaid_w"
          case 'x':	 // 1 string to match.
            return Intrinsic::ptx_read_ctaid_x;	 // "__builtin_ptx_read_ctaid_x"
          case 'y':	 // 1 string to match.
            return Intrinsic::ptx_read_ctaid_y;	 // "__builtin_ptx_read_ctaid_y"
          case 'z':	 // 1 string to match.
            return Intrinsic::ptx_read_ctaid_z;	 // "__builtin_ptx_read_ctaid_z"
          }
          break;
        }
        break;
      case 'n':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+20, "warpid", 6))
          break;
        return Intrinsic::ptx_read_nwarpid;	 // "__builtin_ptx_read_nwarpid"
      }
      break;
    case 'n':	 // 30 strings to match.
      if (memcmp(BuiltinName.data()+3, "vvm_", 4))
        break;
      switch (BuiltinName[7]) {
      default: break;
      case 'r':	 // 3 strings to match.
        if (memcmp(BuiltinName.data()+8, "ead_ptx_sreg_tid_", 17))
          break;
        switch (BuiltinName[25]) {
        default: break;
        case 'x':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_tid_x;	 // "__nvvm_read_ptx_sreg_tid_x"
        case 'y':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_tid_y;	 // "__nvvm_read_ptx_sreg_tid_y"
        case 'z':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_tid_z;	 // "__nvvm_read_ptx_sreg_tid_z"
        }
        break;
      case 's':	 // 27 strings to match.
        if (memcmp(BuiltinName.data()+8, "ust_", 4))
          break;
        switch (BuiltinName[12]) {
        default: break;
        case 'b':	 // 21 strings to match.
          if (BuiltinName[13] != '_')
            break;
          switch (BuiltinName[14]) {
          default: break;
          case '1':	 // 7 strings to match.
            if (memcmp(BuiltinName.data()+15, "d_", 2))
              break;
            switch (BuiltinName[17]) {
            default: break;
            case 'i':	 // 3 strings to match.
              switch (BuiltinName[18]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+19, "6_clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_1d_i16_clamp;	 // "__nvvm_sust_b_1d_i16_clamp"
              case '3':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+19, "2_clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_1d_i32_clamp;	 // "__nvvm_sust_b_1d_i32_clamp"
              case '6':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+19, "4_clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_1d_i64_clamp;	 // "__nvvm_sust_b_1d_i64_clamp"
              }
              break;
            case 'v':	 // 4 strings to match.
              switch (BuiltinName[18]) {
              default: break;
              case '2':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+19, "i8_", 3))
                  break;
                switch (BuiltinName[22]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+23, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_v2i8_trap;	 // "__nvvm_sust_b_1d_v2i8_trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+23, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_v2i8_zero;	 // "__nvvm_sust_b_1d_v2i8_zero"
                }
                break;
              case '4':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+19, "i8_", 3))
                  break;
                switch (BuiltinName[22]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+23, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_v4i8_trap;	 // "__nvvm_sust_b_1d_v4i8_trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+23, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_v4i8_zero;	 // "__nvvm_sust_b_1d_v4i8_zero"
                }
                break;
              }
              break;
            }
            break;
          case '2':	 // 7 strings to match.
            if (memcmp(BuiltinName.data()+15, "d_", 2))
              break;
            switch (BuiltinName[17]) {
            default: break;
            case 'i':	 // 3 strings to match.
              switch (BuiltinName[18]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+19, "6_clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_2d_i16_clamp;	 // "__nvvm_sust_b_2d_i16_clamp"
              case '3':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+19, "2_clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_2d_i32_clamp;	 // "__nvvm_sust_b_2d_i32_clamp"
              case '6':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+19, "4_clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_2d_i64_clamp;	 // "__nvvm_sust_b_2d_i64_clamp"
              }
              break;
            case 'v':	 // 4 strings to match.
              switch (BuiltinName[18]) {
              default: break;
              case '2':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+19, "i8_", 3))
                  break;
                switch (BuiltinName[22]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+23, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_v2i8_trap;	 // "__nvvm_sust_b_2d_v2i8_trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+23, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_v2i8_zero;	 // "__nvvm_sust_b_2d_v2i8_zero"
                }
                break;
              case '4':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+19, "i8_", 3))
                  break;
                switch (BuiltinName[22]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+23, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_v4i8_trap;	 // "__nvvm_sust_b_2d_v4i8_trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+23, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_v4i8_zero;	 // "__nvvm_sust_b_2d_v4i8_zero"
                }
                break;
              }
              break;
            }
            break;
          case '3':	 // 7 strings to match.
            if (memcmp(BuiltinName.data()+15, "d_", 2))
              break;
            switch (BuiltinName[17]) {
            default: break;
            case 'i':	 // 3 strings to match.
              switch (BuiltinName[18]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+19, "6_clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_3d_i16_clamp;	 // "__nvvm_sust_b_3d_i16_clamp"
              case '3':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+19, "2_clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_3d_i32_clamp;	 // "__nvvm_sust_b_3d_i32_clamp"
              case '6':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+19, "4_clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_3d_i64_clamp;	 // "__nvvm_sust_b_3d_i64_clamp"
              }
              break;
            case 'v':	 // 4 strings to match.
              switch (BuiltinName[18]) {
              default: break;
              case '2':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+19, "i8_", 3))
                  break;
                switch (BuiltinName[22]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+23, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_v2i8_trap;	 // "__nvvm_sust_b_3d_v2i8_trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+23, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_v2i8_zero;	 // "__nvvm_sust_b_3d_v2i8_zero"
                }
                break;
              case '4':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+19, "i8_", 3))
                  break;
                switch (BuiltinName[22]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+23, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_v4i8_trap;	 // "__nvvm_sust_b_3d_v4i8_trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+23, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_v4i8_zero;	 // "__nvvm_sust_b_3d_v4i8_zero"
                }
                break;
              }
              break;
            }
            break;
          }
          break;
        case 'p':	 // 6 strings to match.
          if (BuiltinName[13] != '_')
            break;
          switch (BuiltinName[14]) {
          default: break;
          case '1':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+15, "d_v", 3))
              break;
            switch (BuiltinName[18]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+19, "i8_trap", 7))
                break;
              return Intrinsic::nvvm_sust_p_1d_v2i8_trap;	 // "__nvvm_sust_p_1d_v2i8_trap"
            case '4':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+19, "i8_trap", 7))
                break;
              return Intrinsic::nvvm_sust_p_1d_v4i8_trap;	 // "__nvvm_sust_p_1d_v4i8_trap"
            }
            break;
          case '2':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+15, "d_v", 3))
              break;
            switch (BuiltinName[18]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+19, "i8_trap", 7))
                break;
              return Intrinsic::nvvm_sust_p_2d_v2i8_trap;	 // "__nvvm_sust_p_2d_v2i8_trap"
            case '4':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+19, "i8_trap", 7))
                break;
              return Intrinsic::nvvm_sust_p_2d_v4i8_trap;	 // "__nvvm_sust_p_2d_v4i8_trap"
            }
            break;
          case '3':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+15, "d_v", 3))
              break;
            switch (BuiltinName[18]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+19, "i8_trap", 7))
                break;
              return Intrinsic::nvvm_sust_p_3d_v2i8_trap;	 // "__nvvm_sust_p_3d_v2i8_trap"
            case '4':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+19, "i8_trap", 7))
                break;
              return Intrinsic::nvvm_sust_p_3d_v4i8_trap;	 // "__nvvm_sust_p_3d_v4i8_trap"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    }
    break;
  case 27:	 // 56 strings to match.
    if (memcmp(BuiltinName.data()+0, "__", 2))
      break;
    switch (BuiltinName[2]) {
    default: break;
    case 'b':	 // 5 strings to match.
      if (memcmp(BuiltinName.data()+3, "uiltin_", 7))
        break;
      switch (BuiltinName[10]) {
      default: break;
      case 'a':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+11, "djust_trampoline", 16))
          break;
        return Intrinsic::adjust_trampoline;	 // "__builtin_adjust_trampoline"
      case 'p':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+11, "tx_read_nctaid_", 15))
          break;
        switch (BuiltinName[26]) {
        default: break;
        case 'w':	 // 1 string to match.
          return Intrinsic::ptx_read_nctaid_w;	 // "__builtin_ptx_read_nctaid_w"
        case 'x':	 // 1 string to match.
          return Intrinsic::ptx_read_nctaid_x;	 // "__builtin_ptx_read_nctaid_x"
        case 'y':	 // 1 string to match.
          return Intrinsic::ptx_read_nctaid_y;	 // "__builtin_ptx_read_nctaid_y"
        case 'z':	 // 1 string to match.
          return Intrinsic::ptx_read_nctaid_z;	 // "__builtin_ptx_read_nctaid_z"
        }
        break;
      }
      break;
    case 'n':	 // 51 strings to match.
      if (memcmp(BuiltinName.data()+3, "vvm_", 4))
        break;
      switch (BuiltinName[7]) {
      default: break;
      case 'r':	 // 3 strings to match.
        if (memcmp(BuiltinName.data()+8, "ead_ptx_sreg_ntid_", 18))
          break;
        switch (BuiltinName[26]) {
        default: break;
        case 'x':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_ntid_x;	 // "__nvvm_read_ptx_sreg_ntid_x"
        case 'y':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_ntid_y;	 // "__nvvm_read_ptx_sreg_ntid_y"
        case 'z':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_ntid_z;	 // "__nvvm_read_ptx_sreg_ntid_z"
        }
        break;
      case 's':	 // 48 strings to match.
        if (memcmp(BuiltinName.data()+8, "ust_", 4))
          break;
        switch (BuiltinName[12]) {
        default: break;
        case 'b':	 // 36 strings to match.
          if (BuiltinName[13] != '_')
            break;
          switch (BuiltinName[14]) {
          default: break;
          case '1':	 // 12 strings to match.
            if (memcmp(BuiltinName.data()+15, "d_v", 3))
              break;
            switch (BuiltinName[18]) {
            default: break;
            case '2':	 // 7 strings to match.
              if (BuiltinName[19] != 'i')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+21, "6_", 2))
                  break;
                switch (BuiltinName[23]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_v2i16_trap;	 // "__nvvm_sust_b_1d_v2i16_trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_v2i16_zero;	 // "__nvvm_sust_b_1d_v2i16_zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+21, "2_", 2))
                  break;
                switch (BuiltinName[23]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_v2i32_trap;	 // "__nvvm_sust_b_1d_v2i32_trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_v2i32_zero;	 // "__nvvm_sust_b_1d_v2i32_zero"
                }
                break;
              case '6':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+21, "4_", 2))
                  break;
                switch (BuiltinName[23]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_v2i64_trap;	 // "__nvvm_sust_b_1d_v2i64_trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_v2i64_zero;	 // "__nvvm_sust_b_1d_v2i64_zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "_clamp", 6))
                  break;
                return Intrinsic::nvvm_sust_b_1d_v2i8_clamp;	 // "__nvvm_sust_b_1d_v2i8_clamp"
              }
              break;
            case '4':	 // 5 strings to match.
              if (BuiltinName[19] != 'i')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+21, "6_", 2))
                  break;
                switch (BuiltinName[23]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_v4i16_trap;	 // "__nvvm_sust_b_1d_v4i16_trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_v4i16_zero;	 // "__nvvm_sust_b_1d_v4i16_zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+21, "2_", 2))
                  break;
                switch (BuiltinName[23]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_v4i32_trap;	 // "__nvvm_sust_b_1d_v4i32_trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_1d_v4i32_zero;	 // "__nvvm_sust_b_1d_v4i32_zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "_clamp", 6))
                  break;
                return Intrinsic::nvvm_sust_b_1d_v4i8_clamp;	 // "__nvvm_sust_b_1d_v4i8_clamp"
              }
              break;
            }
            break;
          case '2':	 // 12 strings to match.
            if (memcmp(BuiltinName.data()+15, "d_v", 3))
              break;
            switch (BuiltinName[18]) {
            default: break;
            case '2':	 // 7 strings to match.
              if (BuiltinName[19] != 'i')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+21, "6_", 2))
                  break;
                switch (BuiltinName[23]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_v2i16_trap;	 // "__nvvm_sust_b_2d_v2i16_trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_v2i16_zero;	 // "__nvvm_sust_b_2d_v2i16_zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+21, "2_", 2))
                  break;
                switch (BuiltinName[23]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_v2i32_trap;	 // "__nvvm_sust_b_2d_v2i32_trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_v2i32_zero;	 // "__nvvm_sust_b_2d_v2i32_zero"
                }
                break;
              case '6':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+21, "4_", 2))
                  break;
                switch (BuiltinName[23]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_v2i64_trap;	 // "__nvvm_sust_b_2d_v2i64_trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_v2i64_zero;	 // "__nvvm_sust_b_2d_v2i64_zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "_clamp", 6))
                  break;
                return Intrinsic::nvvm_sust_b_2d_v2i8_clamp;	 // "__nvvm_sust_b_2d_v2i8_clamp"
              }
              break;
            case '4':	 // 5 strings to match.
              if (BuiltinName[19] != 'i')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+21, "6_", 2))
                  break;
                switch (BuiltinName[23]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_v4i16_trap;	 // "__nvvm_sust_b_2d_v4i16_trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_v4i16_zero;	 // "__nvvm_sust_b_2d_v4i16_zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+21, "2_", 2))
                  break;
                switch (BuiltinName[23]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_v4i32_trap;	 // "__nvvm_sust_b_2d_v4i32_trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_2d_v4i32_zero;	 // "__nvvm_sust_b_2d_v4i32_zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "_clamp", 6))
                  break;
                return Intrinsic::nvvm_sust_b_2d_v4i8_clamp;	 // "__nvvm_sust_b_2d_v4i8_clamp"
              }
              break;
            }
            break;
          case '3':	 // 12 strings to match.
            if (memcmp(BuiltinName.data()+15, "d_v", 3))
              break;
            switch (BuiltinName[18]) {
            default: break;
            case '2':	 // 7 strings to match.
              if (BuiltinName[19] != 'i')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+21, "6_", 2))
                  break;
                switch (BuiltinName[23]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_v2i16_trap;	 // "__nvvm_sust_b_3d_v2i16_trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_v2i16_zero;	 // "__nvvm_sust_b_3d_v2i16_zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+21, "2_", 2))
                  break;
                switch (BuiltinName[23]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_v2i32_trap;	 // "__nvvm_sust_b_3d_v2i32_trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_v2i32_zero;	 // "__nvvm_sust_b_3d_v2i32_zero"
                }
                break;
              case '6':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+21, "4_", 2))
                  break;
                switch (BuiltinName[23]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_v2i64_trap;	 // "__nvvm_sust_b_3d_v2i64_trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_v2i64_zero;	 // "__nvvm_sust_b_3d_v2i64_zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "_clamp", 6))
                  break;
                return Intrinsic::nvvm_sust_b_3d_v2i8_clamp;	 // "__nvvm_sust_b_3d_v2i8_clamp"
              }
              break;
            case '4':	 // 5 strings to match.
              if (BuiltinName[19] != 'i')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case '1':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+21, "6_", 2))
                  break;
                switch (BuiltinName[23]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_v4i16_trap;	 // "__nvvm_sust_b_3d_v4i16_trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_v4i16_zero;	 // "__nvvm_sust_b_3d_v4i16_zero"
                }
                break;
              case '3':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+21, "2_", 2))
                  break;
                switch (BuiltinName[23]) {
                default: break;
                case 't':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "rap", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_v4i32_trap;	 // "__nvvm_sust_b_3d_v4i32_trap"
                case 'z':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "ero", 3))
                    break;
                  return Intrinsic::nvvm_sust_b_3d_v4i32_zero;	 // "__nvvm_sust_b_3d_v4i32_zero"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "_clamp", 6))
                  break;
                return Intrinsic::nvvm_sust_b_3d_v4i8_clamp;	 // "__nvvm_sust_b_3d_v4i8_clamp"
              }
              break;
            }
            break;
          }
          break;
        case 'p':	 // 12 strings to match.
          if (BuiltinName[13] != '_')
            break;
          switch (BuiltinName[14]) {
          default: break;
          case '1':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+15, "d_v", 3))
              break;
            switch (BuiltinName[18]) {
            default: break;
            case '2':	 // 2 strings to match.
              if (BuiltinName[19] != 'i')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "6_trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_1d_v2i16_trap;	 // "__nvvm_sust_p_1d_v2i16_trap"
              case '3':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "2_trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_1d_v2i32_trap;	 // "__nvvm_sust_p_1d_v2i32_trap"
              }
              break;
            case '4':	 // 2 strings to match.
              if (BuiltinName[19] != 'i')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "6_trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_1d_v4i16_trap;	 // "__nvvm_sust_p_1d_v4i16_trap"
              case '3':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "2_trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_1d_v4i32_trap;	 // "__nvvm_sust_p_1d_v4i32_trap"
              }
              break;
            }
            break;
          case '2':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+15, "d_v", 3))
              break;
            switch (BuiltinName[18]) {
            default: break;
            case '2':	 // 2 strings to match.
              if (BuiltinName[19] != 'i')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "6_trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_2d_v2i16_trap;	 // "__nvvm_sust_p_2d_v2i16_trap"
              case '3':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "2_trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_2d_v2i32_trap;	 // "__nvvm_sust_p_2d_v2i32_trap"
              }
              break;
            case '4':	 // 2 strings to match.
              if (BuiltinName[19] != 'i')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "6_trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_2d_v4i16_trap;	 // "__nvvm_sust_p_2d_v4i16_trap"
              case '3':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "2_trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_2d_v4i32_trap;	 // "__nvvm_sust_p_2d_v4i32_trap"
              }
              break;
            }
            break;
          case '3':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+15, "d_v", 3))
              break;
            switch (BuiltinName[18]) {
            default: break;
            case '2':	 // 2 strings to match.
              if (BuiltinName[19] != 'i')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "6_trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_3d_v2i16_trap;	 // "__nvvm_sust_p_3d_v2i16_trap"
              case '3':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "2_trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_3d_v2i32_trap;	 // "__nvvm_sust_p_3d_v2i32_trap"
              }
              break;
            case '4':	 // 2 strings to match.
              if (BuiltinName[19] != 'i')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "6_trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_3d_v4i16_trap;	 // "__nvvm_sust_p_3d_v4i16_trap"
              case '3':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "2_trap", 6))
                  break;
                return Intrinsic::nvvm_sust_p_3d_v4i32_trap;	 // "__nvvm_sust_p_3d_v4i32_trap"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    }
    break;
  case 28:	 // 33 strings to match.
    if (memcmp(BuiltinName.data()+0, "__", 2))
      break;
    switch (BuiltinName[2]) {
    default: break;
    case 'b':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+3, "uiltin_ia32_vpermil2p", 21))
        break;
      switch (BuiltinName[24]) {
      default: break;
      case 'd':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+25, "256", 3))
          break;
        return Intrinsic::x86_xop_vpermil2pd_256;	 // "__builtin_ia32_vpermil2pd256"
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+25, "256", 3))
          break;
        return Intrinsic::x86_xop_vpermil2ps_256;	 // "__builtin_ia32_vpermil2ps256"
      }
      break;
    case 'n':	 // 31 strings to match.
      if (memcmp(BuiltinName.data()+3, "vvm_", 4))
        break;
      switch (BuiltinName[7]) {
      default: break;
      case 'r':	 // 13 strings to match.
        if (memcmp(BuiltinName.data()+8, "ead_ptx_sreg_", 13))
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'c':	 // 3 strings to match.
          if (memcmp(BuiltinName.data()+22, "taid_", 5))
            break;
          switch (BuiltinName[27]) {
          default: break;
          case 'x':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_ctaid_x;	 // "__nvvm_read_ptx_sreg_ctaid_x"
          case 'y':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_ctaid_y;	 // "__nvvm_read_ptx_sreg_ctaid_y"
          case 'z':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_ctaid_z;	 // "__nvvm_read_ptx_sreg_ctaid_z"
          }
          break;
        case 'e':	 // 10 strings to match.
          if (memcmp(BuiltinName.data()+22, "nvreg", 5))
            break;
          switch (BuiltinName[27]) {
          default: break;
          case '0':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_envreg0;	 // "__nvvm_read_ptx_sreg_envreg0"
          case '1':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_envreg1;	 // "__nvvm_read_ptx_sreg_envreg1"
          case '2':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_envreg2;	 // "__nvvm_read_ptx_sreg_envreg2"
          case '3':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_envreg3;	 // "__nvvm_read_ptx_sreg_envreg3"
          case '4':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_envreg4;	 // "__nvvm_read_ptx_sreg_envreg4"
          case '5':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_envreg5;	 // "__nvvm_read_ptx_sreg_envreg5"
          case '6':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_envreg6;	 // "__nvvm_read_ptx_sreg_envreg6"
          case '7':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_envreg7;	 // "__nvvm_read_ptx_sreg_envreg7"
          case '8':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_envreg8;	 // "__nvvm_read_ptx_sreg_envreg8"
          case '9':	 // 1 string to match.
            return Intrinsic::nvvm_read_ptx_sreg_envreg9;	 // "__nvvm_read_ptx_sreg_envreg9"
          }
          break;
        }
        break;
      case 's':	 // 16 strings to match.
        if (BuiltinName[8] != 'u')
          break;
        switch (BuiltinName[9]) {
        default: break;
        case 'q':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+10, "_channel_data_type", 18))
            break;
          return Intrinsic::nvvm_suq_channel_data_type;	 // "__nvvm_suq_channel_data_type"
        case 's':	 // 15 strings to match.
          if (memcmp(BuiltinName.data()+10, "t_b_", 4))
            break;
          switch (BuiltinName[14]) {
          default: break;
          case '1':	 // 5 strings to match.
            if (memcmp(BuiltinName.data()+15, "d_v", 3))
              break;
            switch (BuiltinName[18]) {
            default: break;
            case '2':	 // 3 strings to match.
              if (BuiltinName[19] != 'i')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "6_clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_1d_v2i16_clamp;	 // "__nvvm_sust_b_1d_v2i16_clamp"
              case '3':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "2_clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_1d_v2i32_clamp;	 // "__nvvm_sust_b_1d_v2i32_clamp"
              case '6':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "4_clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_1d_v2i64_clamp;	 // "__nvvm_sust_b_1d_v2i64_clamp"
              }
              break;
            case '4':	 // 2 strings to match.
              if (BuiltinName[19] != 'i')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "6_clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_1d_v4i16_clamp;	 // "__nvvm_sust_b_1d_v4i16_clamp"
              case '3':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "2_clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_1d_v4i32_clamp;	 // "__nvvm_sust_b_1d_v4i32_clamp"
              }
              break;
            }
            break;
          case '2':	 // 5 strings to match.
            if (memcmp(BuiltinName.data()+15, "d_v", 3))
              break;
            switch (BuiltinName[18]) {
            default: break;
            case '2':	 // 3 strings to match.
              if (BuiltinName[19] != 'i')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "6_clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_2d_v2i16_clamp;	 // "__nvvm_sust_b_2d_v2i16_clamp"
              case '3':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "2_clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_2d_v2i32_clamp;	 // "__nvvm_sust_b_2d_v2i32_clamp"
              case '6':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "4_clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_2d_v2i64_clamp;	 // "__nvvm_sust_b_2d_v2i64_clamp"
              }
              break;
            case '4':	 // 2 strings to match.
              if (BuiltinName[19] != 'i')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "6_clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_2d_v4i16_clamp;	 // "__nvvm_sust_b_2d_v4i16_clamp"
              case '3':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "2_clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_2d_v4i32_clamp;	 // "__nvvm_sust_b_2d_v4i32_clamp"
              }
              break;
            }
            break;
          case '3':	 // 5 strings to match.
            if (memcmp(BuiltinName.data()+15, "d_v", 3))
              break;
            switch (BuiltinName[18]) {
            default: break;
            case '2':	 // 3 strings to match.
              if (BuiltinName[19] != 'i')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "6_clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_3d_v2i16_clamp;	 // "__nvvm_sust_b_3d_v2i16_clamp"
              case '3':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "2_clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_3d_v2i32_clamp;	 // "__nvvm_sust_b_3d_v2i32_clamp"
              case '6':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "4_clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_3d_v2i64_clamp;	 // "__nvvm_sust_b_3d_v2i64_clamp"
              }
              break;
            case '4':	 // 2 strings to match.
              if (BuiltinName[19] != 'i')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "6_clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_3d_v4i16_clamp;	 // "__nvvm_sust_b_3d_v4i16_clamp"
              case '3':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "2_clamp", 7))
                  break;
                return Intrinsic::nvvm_sust_b_3d_v4i32_clamp;	 // "__nvvm_sust_b_3d_v4i32_clamp"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 't':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+8, "xq_", 3))
          break;
        switch (BuiltinName[11]) {
        default: break;
        case 'c':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+12, "hannel_data_type", 16))
            break;
          return Intrinsic::nvvm_txq_channel_data_type;	 // "__nvvm_txq_channel_data_type"
        case 'n':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+12, "um_mipmap_levels", 16))
            break;
          return Intrinsic::nvvm_txq_num_mipmap_levels;	 // "__nvvm_txq_num_mipmap_levels"
        }
        break;
      }
      break;
    }
    break;
  case 29:	 // 26 strings to match.
    if (memcmp(BuiltinName.data()+0, "__nvvm_read_ptx_sreg_", 21))
      break;
    switch (BuiltinName[21]) {
    default: break;
    case 'e':	 // 22 strings to match.
      if (memcmp(BuiltinName.data()+22, "nvreg", 5))
        break;
      switch (BuiltinName[27]) {
      default: break;
      case '1':	 // 10 strings to match.
        switch (BuiltinName[28]) {
        default: break;
        case '0':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_envreg10;	 // "__nvvm_read_ptx_sreg_envreg10"
        case '1':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_envreg11;	 // "__nvvm_read_ptx_sreg_envreg11"
        case '2':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_envreg12;	 // "__nvvm_read_ptx_sreg_envreg12"
        case '3':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_envreg13;	 // "__nvvm_read_ptx_sreg_envreg13"
        case '4':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_envreg14;	 // "__nvvm_read_ptx_sreg_envreg14"
        case '5':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_envreg15;	 // "__nvvm_read_ptx_sreg_envreg15"
        case '6':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_envreg16;	 // "__nvvm_read_ptx_sreg_envreg16"
        case '7':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_envreg17;	 // "__nvvm_read_ptx_sreg_envreg17"
        case '8':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_envreg18;	 // "__nvvm_read_ptx_sreg_envreg18"
        case '9':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_envreg19;	 // "__nvvm_read_ptx_sreg_envreg19"
        }
        break;
      case '2':	 // 10 strings to match.
        switch (BuiltinName[28]) {
        default: break;
        case '0':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_envreg20;	 // "__nvvm_read_ptx_sreg_envreg20"
        case '1':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_envreg21;	 // "__nvvm_read_ptx_sreg_envreg21"
        case '2':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_envreg22;	 // "__nvvm_read_ptx_sreg_envreg22"
        case '3':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_envreg23;	 // "__nvvm_read_ptx_sreg_envreg23"
        case '4':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_envreg24;	 // "__nvvm_read_ptx_sreg_envreg24"
        case '5':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_envreg25;	 // "__nvvm_read_ptx_sreg_envreg25"
        case '6':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_envreg26;	 // "__nvvm_read_ptx_sreg_envreg26"
        case '7':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_envreg27;	 // "__nvvm_read_ptx_sreg_envreg27"
        case '8':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_envreg28;	 // "__nvvm_read_ptx_sreg_envreg28"
        case '9':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_envreg29;	 // "__nvvm_read_ptx_sreg_envreg29"
        }
        break;
      case '3':	 // 2 strings to match.
        switch (BuiltinName[28]) {
        default: break;
        case '0':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_envreg30;	 // "__nvvm_read_ptx_sreg_envreg30"
        case '1':	 // 1 string to match.
          return Intrinsic::nvvm_read_ptx_sreg_envreg31;	 // "__nvvm_read_ptx_sreg_envreg31"
        }
        break;
      }
      break;
    case 'n':	 // 3 strings to match.
      if (memcmp(BuiltinName.data()+22, "ctaid_", 6))
        break;
      switch (BuiltinName[28]) {
      default: break;
      case 'x':	 // 1 string to match.
        return Intrinsic::nvvm_read_ptx_sreg_nctaid_x;	 // "__nvvm_read_ptx_sreg_nctaid_x"
      case 'y':	 // 1 string to match.
        return Intrinsic::nvvm_read_ptx_sreg_nctaid_y;	 // "__nvvm_read_ptx_sreg_nctaid_y"
      case 'z':	 // 1 string to match.
        return Intrinsic::nvvm_read_ptx_sreg_nctaid_z;	 // "__nvvm_read_ptx_sreg_nctaid_z"
      }
      break;
    case 'w':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+22, "arpsize", 7))
        break;
      return Intrinsic::nvvm_read_ptx_sreg_warpsize;	 // "__nvvm_read_ptx_sreg_warpsize"
    }
    break;
  case 30:	 // 11 strings to match.
    if (memcmp(BuiltinName.data()+0, "__", 2))
      break;
    switch (BuiltinName[2]) {
    default: break;
    case 'b':	 // 5 strings to match.
      if (memcmp(BuiltinName.data()+3, "uiltin_ptx_read_lanemask_", 25))
        break;
      switch (BuiltinName[28]) {
      default: break;
      case 'e':	 // 1 string to match.
        if (BuiltinName[29] != 'q')
          break;
        return Intrinsic::ptx_read_lanemask_eq;	 // "__builtin_ptx_read_lanemask_eq"
      case 'g':	 // 2 strings to match.
        switch (BuiltinName[29]) {
        default: break;
        case 'e':	 // 1 string to match.
          return Intrinsic::ptx_read_lanemask_ge;	 // "__builtin_ptx_read_lanemask_ge"
        case 't':	 // 1 string to match.
          return Intrinsic::ptx_read_lanemask_gt;	 // "__builtin_ptx_read_lanemask_gt"
        }
        break;
      case 'l':	 // 2 strings to match.
        switch (BuiltinName[29]) {
        default: break;
        case 'e':	 // 1 string to match.
          return Intrinsic::ptx_read_lanemask_le;	 // "__builtin_ptx_read_lanemask_le"
        case 't':	 // 1 string to match.
          return Intrinsic::ptx_read_lanemask_lt;	 // "__builtin_ptx_read_lanemask_lt"
        }
        break;
      }
      break;
    case 'n':	 // 6 strings to match.
      if (memcmp(BuiltinName.data()+3, "vvm_sust_", 9))
        break;
      switch (BuiltinName[12]) {
      default: break;
      case 'b':	 // 4 strings to match.
        if (BuiltinName[13] != '_')
          break;
        switch (BuiltinName[14]) {
        default: break;
        case '1':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+15, "d_array_i8_", 11))
            break;
          switch (BuiltinName[26]) {
          default: break;
          case 't':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "rap", 3))
              break;
            return Intrinsic::nvvm_sust_b_1d_array_i8_trap;	 // "__nvvm_sust_b_1d_array_i8_trap"
          case 'z':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "ero", 3))
              break;
            return Intrinsic::nvvm_sust_b_1d_array_i8_zero;	 // "__nvvm_sust_b_1d_array_i8_zero"
          }
          break;
        case '2':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+15, "d_array_i8_", 11))
            break;
          switch (BuiltinName[26]) {
          default: break;
          case 't':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "rap", 3))
              break;
            return Intrinsic::nvvm_sust_b_2d_array_i8_trap;	 // "__nvvm_sust_b_2d_array_i8_trap"
          case 'z':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "ero", 3))
              break;
            return Intrinsic::nvvm_sust_b_2d_array_i8_zero;	 // "__nvvm_sust_b_2d_array_i8_zero"
          }
          break;
        }
        break;
      case 'p':	 // 2 strings to match.
        if (BuiltinName[13] != '_')
          break;
        switch (BuiltinName[14]) {
        default: break;
        case '1':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+15, "d_array_i8_trap", 15))
            break;
          return Intrinsic::nvvm_sust_p_1d_array_i8_trap;	 // "__nvvm_sust_p_1d_array_i8_trap"
        case '2':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+15, "d_array_i8_trap", 15))
            break;
          return Intrinsic::nvvm_sust_p_2d_array_i8_trap;	 // "__nvvm_sust_p_2d_array_i8_trap"
        }
        break;
      }
      break;
    }
    break;
  case 31:	 // 18 strings to match.
    if (memcmp(BuiltinName.data()+0, "__nvvm_sust_", 12))
      break;
    switch (BuiltinName[12]) {
    default: break;
    case 'b':	 // 14 strings to match.
      if (BuiltinName[13] != '_')
        break;
      switch (BuiltinName[14]) {
      default: break;
      case '1':	 // 7 strings to match.
        if (memcmp(BuiltinName.data()+15, "d_array_i", 9))
          break;
        switch (BuiltinName[24]) {
        default: break;
        case '1':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+25, "6_", 2))
            break;
          switch (BuiltinName[27]) {
          default: break;
          case 't':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+28, "rap", 3))
              break;
            return Intrinsic::nvvm_sust_b_1d_array_i16_trap;	 // "__nvvm_sust_b_1d_array_i16_trap"
          case 'z':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+28, "ero", 3))
              break;
            return Intrinsic::nvvm_sust_b_1d_array_i16_zero;	 // "__nvvm_sust_b_1d_array_i16_zero"
          }
          break;
        case '3':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+25, "2_", 2))
            break;
          switch (BuiltinName[27]) {
          default: break;
          case 't':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+28, "rap", 3))
              break;
            return Intrinsic::nvvm_sust_b_1d_array_i32_trap;	 // "__nvvm_sust_b_1d_array_i32_trap"
          case 'z':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+28, "ero", 3))
              break;
            return Intrinsic::nvvm_sust_b_1d_array_i32_zero;	 // "__nvvm_sust_b_1d_array_i32_zero"
          }
          break;
        case '6':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+25, "4_", 2))
            break;
          switch (BuiltinName[27]) {
          default: break;
          case 't':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+28, "rap", 3))
              break;
            return Intrinsic::nvvm_sust_b_1d_array_i64_trap;	 // "__nvvm_sust_b_1d_array_i64_trap"
          case 'z':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+28, "ero", 3))
              break;
            return Intrinsic::nvvm_sust_b_1d_array_i64_zero;	 // "__nvvm_sust_b_1d_array_i64_zero"
          }
          break;
        case '8':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+25, "_clamp", 6))
            break;
          return Intrinsic::nvvm_sust_b_1d_array_i8_clamp;	 // "__nvvm_sust_b_1d_array_i8_clamp"
        }
        break;
      case '2':	 // 7 strings to match.
        if (memcmp(BuiltinName.data()+15, "d_array_i", 9))
          break;
        switch (BuiltinName[24]) {
        default: break;
        case '1':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+25, "6_", 2))
            break;
          switch (BuiltinName[27]) {
          default: break;
          case 't':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+28, "rap", 3))
              break;
            return Intrinsic::nvvm_sust_b_2d_array_i16_trap;	 // "__nvvm_sust_b_2d_array_i16_trap"
          case 'z':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+28, "ero", 3))
              break;
            return Intrinsic::nvvm_sust_b_2d_array_i16_zero;	 // "__nvvm_sust_b_2d_array_i16_zero"
          }
          break;
        case '3':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+25, "2_", 2))
            break;
          switch (BuiltinName[27]) {
          default: break;
          case 't':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+28, "rap", 3))
              break;
            return Intrinsic::nvvm_sust_b_2d_array_i32_trap;	 // "__nvvm_sust_b_2d_array_i32_trap"
          case 'z':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+28, "ero", 3))
              break;
            return Intrinsic::nvvm_sust_b_2d_array_i32_zero;	 // "__nvvm_sust_b_2d_array_i32_zero"
          }
          break;
        case '6':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+25, "4_", 2))
            break;
          switch (BuiltinName[27]) {
          default: break;
          case 't':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+28, "rap", 3))
              break;
            return Intrinsic::nvvm_sust_b_2d_array_i64_trap;	 // "__nvvm_sust_b_2d_array_i64_trap"
          case 'z':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+28, "ero", 3))
              break;
            return Intrinsic::nvvm_sust_b_2d_array_i64_zero;	 // "__nvvm_sust_b_2d_array_i64_zero"
          }
          break;
        case '8':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+25, "_clamp", 6))
            break;
          return Intrinsic::nvvm_sust_b_2d_array_i8_clamp;	 // "__nvvm_sust_b_2d_array_i8_clamp"
        }
        break;
      }
      break;
    case 'p':	 // 4 strings to match.
      if (BuiltinName[13] != '_')
        break;
      switch (BuiltinName[14]) {
      default: break;
      case '1':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+15, "d_array_i", 9))
          break;
        switch (BuiltinName[24]) {
        default: break;
        case '1':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+25, "6_trap", 6))
            break;
          return Intrinsic::nvvm_sust_p_1d_array_i16_trap;	 // "__nvvm_sust_p_1d_array_i16_trap"
        case '3':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+25, "2_trap", 6))
            break;
          return Intrinsic::nvvm_sust_p_1d_array_i32_trap;	 // "__nvvm_sust_p_1d_array_i32_trap"
        }
        break;
      case '2':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+15, "d_array_i", 9))
          break;
        switch (BuiltinName[24]) {
        default: break;
        case '1':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+25, "6_trap", 6))
            break;
          return Intrinsic::nvvm_sust_p_2d_array_i16_trap;	 // "__nvvm_sust_p_2d_array_i16_trap"
        case '3':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+25, "2_trap", 6))
            break;
          return Intrinsic::nvvm_sust_p_2d_array_i32_trap;	 // "__nvvm_sust_p_2d_array_i32_trap"
        }
        break;
      }
      break;
    }
    break;
  case 32:	 // 18 strings to match.
    if (memcmp(BuiltinName.data()+0, "__nvvm_sust_", 12))
      break;
    switch (BuiltinName[12]) {
    default: break;
    case 'b':	 // 14 strings to match.
      if (BuiltinName[13] != '_')
        break;
      switch (BuiltinName[14]) {
      default: break;
      case '1':	 // 7 strings to match.
        if (memcmp(BuiltinName.data()+15, "d_array_", 8))
          break;
        switch (BuiltinName[23]) {
        default: break;
        case 'i':	 // 3 strings to match.
          switch (BuiltinName[24]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "6_clamp", 7))
              break;
            return Intrinsic::nvvm_sust_b_1d_array_i16_clamp;	 // "__nvvm_sust_b_1d_array_i16_clamp"
          case '3':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "2_clamp", 7))
              break;
            return Intrinsic::nvvm_sust_b_1d_array_i32_clamp;	 // "__nvvm_sust_b_1d_array_i32_clamp"
          case '6':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "4_clamp", 7))
              break;
            return Intrinsic::nvvm_sust_b_1d_array_i64_clamp;	 // "__nvvm_sust_b_1d_array_i64_clamp"
          }
          break;
        case 'v':	 // 4 strings to match.
          switch (BuiltinName[24]) {
          default: break;
          case '2':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+25, "i8_", 3))
              break;
            switch (BuiltinName[28]) {
            default: break;
            case 't':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+29, "rap", 3))
                break;
              return Intrinsic::nvvm_sust_b_1d_array_v2i8_trap;	 // "__nvvm_sust_b_1d_array_v2i8_trap"
            case 'z':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+29, "ero", 3))
                break;
              return Intrinsic::nvvm_sust_b_1d_array_v2i8_zero;	 // "__nvvm_sust_b_1d_array_v2i8_zero"
            }
            break;
          case '4':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+25, "i8_", 3))
              break;
            switch (BuiltinName[28]) {
            default: break;
            case 't':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+29, "rap", 3))
                break;
              return Intrinsic::nvvm_sust_b_1d_array_v4i8_trap;	 // "__nvvm_sust_b_1d_array_v4i8_trap"
            case 'z':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+29, "ero", 3))
                break;
              return Intrinsic::nvvm_sust_b_1d_array_v4i8_zero;	 // "__nvvm_sust_b_1d_array_v4i8_zero"
            }
            break;
          }
          break;
        }
        break;
      case '2':	 // 7 strings to match.
        if (memcmp(BuiltinName.data()+15, "d_array_", 8))
          break;
        switch (BuiltinName[23]) {
        default: break;
        case 'i':	 // 3 strings to match.
          switch (BuiltinName[24]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "6_clamp", 7))
              break;
            return Intrinsic::nvvm_sust_b_2d_array_i16_clamp;	 // "__nvvm_sust_b_2d_array_i16_clamp"
          case '3':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "2_clamp", 7))
              break;
            return Intrinsic::nvvm_sust_b_2d_array_i32_clamp;	 // "__nvvm_sust_b_2d_array_i32_clamp"
          case '6':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "4_clamp", 7))
              break;
            return Intrinsic::nvvm_sust_b_2d_array_i64_clamp;	 // "__nvvm_sust_b_2d_array_i64_clamp"
          }
          break;
        case 'v':	 // 4 strings to match.
          switch (BuiltinName[24]) {
          default: break;
          case '2':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+25, "i8_", 3))
              break;
            switch (BuiltinName[28]) {
            default: break;
            case 't':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+29, "rap", 3))
                break;
              return Intrinsic::nvvm_sust_b_2d_array_v2i8_trap;	 // "__nvvm_sust_b_2d_array_v2i8_trap"
            case 'z':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+29, "ero", 3))
                break;
              return Intrinsic::nvvm_sust_b_2d_array_v2i8_zero;	 // "__nvvm_sust_b_2d_array_v2i8_zero"
            }
            break;
          case '4':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+25, "i8_", 3))
              break;
            switch (BuiltinName[28]) {
            default: break;
            case 't':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+29, "rap", 3))
                break;
              return Intrinsic::nvvm_sust_b_2d_array_v4i8_trap;	 // "__nvvm_sust_b_2d_array_v4i8_trap"
            case 'z':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+29, "ero", 3))
                break;
              return Intrinsic::nvvm_sust_b_2d_array_v4i8_zero;	 // "__nvvm_sust_b_2d_array_v4i8_zero"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 'p':	 // 4 strings to match.
      if (BuiltinName[13] != '_')
        break;
      switch (BuiltinName[14]) {
      default: break;
      case '1':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+15, "d_array_v", 9))
          break;
        switch (BuiltinName[24]) {
        default: break;
        case '2':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+25, "i8_trap", 7))
            break;
          return Intrinsic::nvvm_sust_p_1d_array_v2i8_trap;	 // "__nvvm_sust_p_1d_array_v2i8_trap"
        case '4':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+25, "i8_trap", 7))
            break;
          return Intrinsic::nvvm_sust_p_1d_array_v4i8_trap;	 // "__nvvm_sust_p_1d_array_v4i8_trap"
        }
        break;
      case '2':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+15, "d_array_v", 9))
          break;
        switch (BuiltinName[24]) {
        default: break;
        case '2':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+25, "i8_trap", 7))
            break;
          return Intrinsic::nvvm_sust_p_2d_array_v2i8_trap;	 // "__nvvm_sust_p_2d_array_v2i8_trap"
        case '4':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+25, "i8_trap", 7))
            break;
          return Intrinsic::nvvm_sust_p_2d_array_v4i8_trap;	 // "__nvvm_sust_p_2d_array_v4i8_trap"
        }
        break;
      }
      break;
    }
    break;
  case 33:	 // 32 strings to match.
    if (memcmp(BuiltinName.data()+0, "__nvvm_sust_", 12))
      break;
    switch (BuiltinName[12]) {
    default: break;
    case 'b':	 // 24 strings to match.
      if (BuiltinName[13] != '_')
        break;
      switch (BuiltinName[14]) {
      default: break;
      case '1':	 // 12 strings to match.
        if (memcmp(BuiltinName.data()+15, "d_array_v", 9))
          break;
        switch (BuiltinName[24]) {
        default: break;
        case '2':	 // 7 strings to match.
          if (BuiltinName[25] != 'i')
            break;
          switch (BuiltinName[26]) {
          default: break;
          case '1':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+27, "6_", 2))
              break;
            switch (BuiltinName[29]) {
            default: break;
            case 't':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "rap", 3))
                break;
              return Intrinsic::nvvm_sust_b_1d_array_v2i16_trap;	 // "__nvvm_sust_b_1d_array_v2i16_trap"
            case 'z':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "ero", 3))
                break;
              return Intrinsic::nvvm_sust_b_1d_array_v2i16_zero;	 // "__nvvm_sust_b_1d_array_v2i16_zero"
            }
            break;
          case '3':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+27, "2_", 2))
              break;
            switch (BuiltinName[29]) {
            default: break;
            case 't':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "rap", 3))
                break;
              return Intrinsic::nvvm_sust_b_1d_array_v2i32_trap;	 // "__nvvm_sust_b_1d_array_v2i32_trap"
            case 'z':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "ero", 3))
                break;
              return Intrinsic::nvvm_sust_b_1d_array_v2i32_zero;	 // "__nvvm_sust_b_1d_array_v2i32_zero"
            }
            break;
          case '6':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+27, "4_", 2))
              break;
            switch (BuiltinName[29]) {
            default: break;
            case 't':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "rap", 3))
                break;
              return Intrinsic::nvvm_sust_b_1d_array_v2i64_trap;	 // "__nvvm_sust_b_1d_array_v2i64_trap"
            case 'z':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "ero", 3))
                break;
              return Intrinsic::nvvm_sust_b_1d_array_v2i64_zero;	 // "__nvvm_sust_b_1d_array_v2i64_zero"
            }
            break;
          case '8':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "_clamp", 6))
              break;
            return Intrinsic::nvvm_sust_b_1d_array_v2i8_clamp;	 // "__nvvm_sust_b_1d_array_v2i8_clamp"
          }
          break;
        case '4':	 // 5 strings to match.
          if (BuiltinName[25] != 'i')
            break;
          switch (BuiltinName[26]) {
          default: break;
          case '1':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+27, "6_", 2))
              break;
            switch (BuiltinName[29]) {
            default: break;
            case 't':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "rap", 3))
                break;
              return Intrinsic::nvvm_sust_b_1d_array_v4i16_trap;	 // "__nvvm_sust_b_1d_array_v4i16_trap"
            case 'z':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "ero", 3))
                break;
              return Intrinsic::nvvm_sust_b_1d_array_v4i16_zero;	 // "__nvvm_sust_b_1d_array_v4i16_zero"
            }
            break;
          case '3':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+27, "2_", 2))
              break;
            switch (BuiltinName[29]) {
            default: break;
            case 't':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "rap", 3))
                break;
              return Intrinsic::nvvm_sust_b_1d_array_v4i32_trap;	 // "__nvvm_sust_b_1d_array_v4i32_trap"
            case 'z':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "ero", 3))
                break;
              return Intrinsic::nvvm_sust_b_1d_array_v4i32_zero;	 // "__nvvm_sust_b_1d_array_v4i32_zero"
            }
            break;
          case '8':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "_clamp", 6))
              break;
            return Intrinsic::nvvm_sust_b_1d_array_v4i8_clamp;	 // "__nvvm_sust_b_1d_array_v4i8_clamp"
          }
          break;
        }
        break;
      case '2':	 // 12 strings to match.
        if (memcmp(BuiltinName.data()+15, "d_array_v", 9))
          break;
        switch (BuiltinName[24]) {
        default: break;
        case '2':	 // 7 strings to match.
          if (BuiltinName[25] != 'i')
            break;
          switch (BuiltinName[26]) {
          default: break;
          case '1':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+27, "6_", 2))
              break;
            switch (BuiltinName[29]) {
            default: break;
            case 't':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "rap", 3))
                break;
              return Intrinsic::nvvm_sust_b_2d_array_v2i16_trap;	 // "__nvvm_sust_b_2d_array_v2i16_trap"
            case 'z':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "ero", 3))
                break;
              return Intrinsic::nvvm_sust_b_2d_array_v2i16_zero;	 // "__nvvm_sust_b_2d_array_v2i16_zero"
            }
            break;
          case '3':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+27, "2_", 2))
              break;
            switch (BuiltinName[29]) {
            default: break;
            case 't':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "rap", 3))
                break;
              return Intrinsic::nvvm_sust_b_2d_array_v2i32_trap;	 // "__nvvm_sust_b_2d_array_v2i32_trap"
            case 'z':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "ero", 3))
                break;
              return Intrinsic::nvvm_sust_b_2d_array_v2i32_zero;	 // "__nvvm_sust_b_2d_array_v2i32_zero"
            }
            break;
          case '6':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+27, "4_", 2))
              break;
            switch (BuiltinName[29]) {
            default: break;
            case 't':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "rap", 3))
                break;
              return Intrinsic::nvvm_sust_b_2d_array_v2i64_trap;	 // "__nvvm_sust_b_2d_array_v2i64_trap"
            case 'z':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "ero", 3))
                break;
              return Intrinsic::nvvm_sust_b_2d_array_v2i64_zero;	 // "__nvvm_sust_b_2d_array_v2i64_zero"
            }
            break;
          case '8':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "_clamp", 6))
              break;
            return Intrinsic::nvvm_sust_b_2d_array_v2i8_clamp;	 // "__nvvm_sust_b_2d_array_v2i8_clamp"
          }
          break;
        case '4':	 // 5 strings to match.
          if (BuiltinName[25] != 'i')
            break;
          switch (BuiltinName[26]) {
          default: break;
          case '1':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+27, "6_", 2))
              break;
            switch (BuiltinName[29]) {
            default: break;
            case 't':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "rap", 3))
                break;
              return Intrinsic::nvvm_sust_b_2d_array_v4i16_trap;	 // "__nvvm_sust_b_2d_array_v4i16_trap"
            case 'z':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "ero", 3))
                break;
              return Intrinsic::nvvm_sust_b_2d_array_v4i16_zero;	 // "__nvvm_sust_b_2d_array_v4i16_zero"
            }
            break;
          case '3':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+27, "2_", 2))
              break;
            switch (BuiltinName[29]) {
            default: break;
            case 't':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "rap", 3))
                break;
              return Intrinsic::nvvm_sust_b_2d_array_v4i32_trap;	 // "__nvvm_sust_b_2d_array_v4i32_trap"
            case 'z':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "ero", 3))
                break;
              return Intrinsic::nvvm_sust_b_2d_array_v4i32_zero;	 // "__nvvm_sust_b_2d_array_v4i32_zero"
            }
            break;
          case '8':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "_clamp", 6))
              break;
            return Intrinsic::nvvm_sust_b_2d_array_v4i8_clamp;	 // "__nvvm_sust_b_2d_array_v4i8_clamp"
          }
          break;
        }
        break;
      }
      break;
    case 'p':	 // 8 strings to match.
      if (BuiltinName[13] != '_')
        break;
      switch (BuiltinName[14]) {
      default: break;
      case '1':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+15, "d_array_v", 9))
          break;
        switch (BuiltinName[24]) {
        default: break;
        case '2':	 // 2 strings to match.
          if (BuiltinName[25] != 'i')
            break;
          switch (BuiltinName[26]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "6_trap", 6))
              break;
            return Intrinsic::nvvm_sust_p_1d_array_v2i16_trap;	 // "__nvvm_sust_p_1d_array_v2i16_trap"
          case '3':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "2_trap", 6))
              break;
            return Intrinsic::nvvm_sust_p_1d_array_v2i32_trap;	 // "__nvvm_sust_p_1d_array_v2i32_trap"
          }
          break;
        case '4':	 // 2 strings to match.
          if (BuiltinName[25] != 'i')
            break;
          switch (BuiltinName[26]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "6_trap", 6))
              break;
            return Intrinsic::nvvm_sust_p_1d_array_v4i16_trap;	 // "__nvvm_sust_p_1d_array_v4i16_trap"
          case '3':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "2_trap", 6))
              break;
            return Intrinsic::nvvm_sust_p_1d_array_v4i32_trap;	 // "__nvvm_sust_p_1d_array_v4i32_trap"
          }
          break;
        }
        break;
      case '2':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+15, "d_array_v", 9))
          break;
        switch (BuiltinName[24]) {
        default: break;
        case '2':	 // 2 strings to match.
          if (BuiltinName[25] != 'i')
            break;
          switch (BuiltinName[26]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "6_trap", 6))
              break;
            return Intrinsic::nvvm_sust_p_2d_array_v2i16_trap;	 // "__nvvm_sust_p_2d_array_v2i16_trap"
          case '3':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "2_trap", 6))
              break;
            return Intrinsic::nvvm_sust_p_2d_array_v2i32_trap;	 // "__nvvm_sust_p_2d_array_v2i32_trap"
          }
          break;
        case '4':	 // 2 strings to match.
          if (BuiltinName[25] != 'i')
            break;
          switch (BuiltinName[26]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "6_trap", 6))
              break;
            return Intrinsic::nvvm_sust_p_2d_array_v4i16_trap;	 // "__nvvm_sust_p_2d_array_v4i16_trap"
          case '3':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "2_trap", 6))
              break;
            return Intrinsic::nvvm_sust_p_2d_array_v4i32_trap;	 // "__nvvm_sust_p_2d_array_v4i32_trap"
          }
          break;
        }
        break;
      }
      break;
    }
    break;
  case 34:	 // 10 strings to match.
    if (memcmp(BuiltinName.data()+0, "__nvvm_sust_b_", 14))
      break;
    switch (BuiltinName[14]) {
    default: break;
    case '1':	 // 5 strings to match.
      if (memcmp(BuiltinName.data()+15, "d_array_v", 9))
        break;
      switch (BuiltinName[24]) {
      default: break;
      case '2':	 // 3 strings to match.
        if (BuiltinName[25] != 'i')
          break;
        switch (BuiltinName[26]) {
        default: break;
        case '1':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+27, "6_clamp", 7))
            break;
          return Intrinsic::nvvm_sust_b_1d_array_v2i16_clamp;	 // "__nvvm_sust_b_1d_array_v2i16_clamp"
        case '3':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+27, "2_clamp", 7))
            break;
          return Intrinsic::nvvm_sust_b_1d_array_v2i32_clamp;	 // "__nvvm_sust_b_1d_array_v2i32_clamp"
        case '6':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+27, "4_clamp", 7))
            break;
          return Intrinsic::nvvm_sust_b_1d_array_v2i64_clamp;	 // "__nvvm_sust_b_1d_array_v2i64_clamp"
        }
        break;
      case '4':	 // 2 strings to match.
        if (BuiltinName[25] != 'i')
          break;
        switch (BuiltinName[26]) {
        default: break;
        case '1':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+27, "6_clamp", 7))
            break;
          return Intrinsic::nvvm_sust_b_1d_array_v4i16_clamp;	 // "__nvvm_sust_b_1d_array_v4i16_clamp"
        case '3':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+27, "2_clamp", 7))
            break;
          return Intrinsic::nvvm_sust_b_1d_array_v4i32_clamp;	 // "__nvvm_sust_b_1d_array_v4i32_clamp"
        }
        break;
      }
      break;
    case '2':	 // 5 strings to match.
      if (memcmp(BuiltinName.data()+15, "d_array_v", 9))
        break;
      switch (BuiltinName[24]) {
      default: break;
      case '2':	 // 3 strings to match.
        if (BuiltinName[25] != 'i')
          break;
        switch (BuiltinName[26]) {
        default: break;
        case '1':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+27, "6_clamp", 7))
            break;
          return Intrinsic::nvvm_sust_b_2d_array_v2i16_clamp;	 // "__nvvm_sust_b_2d_array_v2i16_clamp"
        case '3':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+27, "2_clamp", 7))
            break;
          return Intrinsic::nvvm_sust_b_2d_array_v2i32_clamp;	 // "__nvvm_sust_b_2d_array_v2i32_clamp"
        case '6':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+27, "4_clamp", 7))
            break;
          return Intrinsic::nvvm_sust_b_2d_array_v2i64_clamp;	 // "__nvvm_sust_b_2d_array_v2i64_clamp"
        }
        break;
      case '4':	 // 2 strings to match.
        if (BuiltinName[25] != 'i')
          break;
        switch (BuiltinName[26]) {
        default: break;
        case '1':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+27, "6_clamp", 7))
            break;
          return Intrinsic::nvvm_sust_b_2d_array_v4i16_clamp;	 // "__nvvm_sust_b_2d_array_v4i16_clamp"
        case '3':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+27, "2_clamp", 7))
            break;
          return Intrinsic::nvvm_sust_b_2d_array_v4i32_clamp;	 // "__nvvm_sust_b_2d_array_v4i32_clamp"
        }
        break;
      }
      break;
    }
    break;
  }
  }
  if (TargetPrefix == "AMDGPU") {
  switch (BuiltinName.size()) {
  default: break;
  case 20:	 // 2 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_amdgpu_r", 18))
      break;
    switch (BuiltinName[18]) {
    default: break;
    case 'c':	 // 1 string to match.
      if (BuiltinName[19] != 'p')
        break;
      return Intrinsic::AMDGPU_rcp;	 // "__builtin_amdgpu_rcp"
    case 's':	 // 1 string to match.
      if (BuiltinName[19] != 'q')
        break;
      return Intrinsic::AMDGPU_rsq;	 // "__builtin_amdgpu_rsq"
    }
    break;
  case 25:	 // 1 string to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_amdgpu_div_fmas", 25))
      break;
    return Intrinsic::AMDGPU_div_fmas;	 // "__builtin_amdgpu_div_fmas"
  case 26:	 // 2 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_amdgpu_div_", 21))
      break;
    switch (BuiltinName[21]) {
    default: break;
    case 'f':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+22, "ixup", 4))
        break;
      return Intrinsic::AMDGPU_div_fixup;	 // "__builtin_amdgpu_div_fixup"
    case 's':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+22, "cale", 4))
        break;
      return Intrinsic::AMDGPU_div_scale;	 // "__builtin_amdgpu_div_scale"
    }
    break;
  case 27:	 // 1 string to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_amdgpu_trig_preop", 27))
      break;
    return Intrinsic::AMDGPU_trig_preop;	 // "__builtin_amdgpu_trig_preop"
  case 28:	 // 1 string to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_amdgpu_rsq_clamped", 28))
      break;
    return Intrinsic::AMDGPU_rsq_clamped;	 // "__builtin_amdgpu_rsq_clamped"
  }
  }
  if (TargetPrefix == "aarch64") {
  switch (BuiltinName.size()) {
  default: break;
  case 17:	 // 3 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_arm_", 14))
      break;
    switch (BuiltinName[14]) {
    default: break;
    case 'd':	 // 2 strings to match.
      switch (BuiltinName[15]) {
      default: break;
      case 'm':	 // 1 string to match.
        if (BuiltinName[16] != 'b')
          break;
        return Intrinsic::aarch64_dmb;	 // "__builtin_arm_dmb"
      case 's':	 // 1 string to match.
        if (BuiltinName[16] != 'b')
          break;
        return Intrinsic::aarch64_dsb;	 // "__builtin_arm_dsb"
      }
      break;
    case 'i':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+15, "sb", 2))
        break;
      return Intrinsic::aarch64_isb;	 // "__builtin_arm_isb"
    }
    break;
  }
  }
  if (TargetPrefix == "arm") {
  switch (BuiltinName.size()) {
  default: break;
  case 17:	 // 6 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_arm_", 14))
      break;
    switch (BuiltinName[14]) {
    default: break;
    case 'c':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+15, "dp", 2))
        break;
      return Intrinsic::arm_cdp;	 // "__builtin_arm_cdp"
    case 'd':	 // 2 strings to match.
      switch (BuiltinName[15]) {
      default: break;
      case 'm':	 // 1 string to match.
        if (BuiltinName[16] != 'b')
          break;
        return Intrinsic::arm_dmb;	 // "__builtin_arm_dmb"
      case 's':	 // 1 string to match.
        if (BuiltinName[16] != 'b')
          break;
        return Intrinsic::arm_dsb;	 // "__builtin_arm_dsb"
      }
      break;
    case 'i':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+15, "sb", 2))
        break;
      return Intrinsic::arm_isb;	 // "__builtin_arm_isb"
    case 'm':	 // 2 strings to match.
      switch (BuiltinName[15]) {
      default: break;
      case 'c':	 // 1 string to match.
        if (BuiltinName[16] != 'r')
          break;
        return Intrinsic::arm_mcr;	 // "__builtin_arm_mcr"
      case 'r':	 // 1 string to match.
        if (BuiltinName[16] != 'c')
          break;
        return Intrinsic::arm_mrc;	 // "__builtin_arm_mrc"
      }
      break;
    }
    break;
  case 18:	 // 8 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_arm_", 14))
      break;
    switch (BuiltinName[14]) {
    default: break;
    case 'c':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+15, "dp2", 3))
        break;
      return Intrinsic::arm_cdp2;	 // "__builtin_arm_cdp2"
    case 'm':	 // 3 strings to match.
      switch (BuiltinName[15]) {
      default: break;
      case 'c':	 // 2 strings to match.
        if (BuiltinName[16] != 'r')
          break;
        switch (BuiltinName[17]) {
        default: break;
        case '2':	 // 1 string to match.
          return Intrinsic::arm_mcr2;	 // "__builtin_arm_mcr2"
        case 'r':	 // 1 string to match.
          return Intrinsic::arm_mcrr;	 // "__builtin_arm_mcrr"
        }
        break;
      case 'r':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+16, "c2", 2))
          break;
        return Intrinsic::arm_mrc2;	 // "__builtin_arm_mrc2"
      }
      break;
    case 'q':	 // 2 strings to match.
      switch (BuiltinName[15]) {
      default: break;
      case 'a':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+16, "dd", 2))
          break;
        return Intrinsic::arm_qadd;	 // "__builtin_arm_qadd"
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+16, "ub", 2))
          break;
        return Intrinsic::arm_qsub;	 // "__builtin_arm_qsub"
      }
      break;
    case 's':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+15, "sat", 3))
        break;
      return Intrinsic::arm_ssat;	 // "__builtin_arm_ssat"
    case 'u':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+15, "sat", 3))
        break;
      return Intrinsic::arm_usat;	 // "__builtin_arm_usat"
    }
    break;
  case 19:	 // 1 string to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_arm_mcrr2", 19))
      break;
    return Intrinsic::arm_mcrr2;	 // "__builtin_arm_mcrr2"
  case 23:	 // 2 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_arm_", 14))
      break;
    switch (BuiltinName[14]) {
    default: break;
    case 'g':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+15, "et_fpscr", 8))
        break;
      return Intrinsic::arm_get_fpscr;	 // "__builtin_arm_get_fpscr"
    case 's':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+15, "et_fpscr", 8))
        break;
      return Intrinsic::arm_set_fpscr;	 // "__builtin_arm_set_fpscr"
    }
    break;
  case 24:	 // 1 string to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_thread_pointer", 24))
      break;
    return Intrinsic::arm_thread_pointer;	 // "__builtin_thread_pointer"
  }
  }
  if (TargetPrefix == "hexagon") {
  switch (BuiltinName.size()) {
  default: break;
  case 18:	 // 1 string to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_circ_ldd", 18))
      break;
    return Intrinsic::hexagon_circ_ldd;	 // "__builtin_circ_ldd"
  case 23:	 // 2 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_HEXAGON_", 18))
      break;
    switch (BuiltinName[18]) {
    default: break;
    case 'A':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+19, "2_or", 4))
        break;
      return Intrinsic::hexagon_A2_or;	 // "__builtin_HEXAGON_A2_or"
    case 'C':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+19, "2_or", 4))
        break;
      return Intrinsic::hexagon_C2_or;	 // "__builtin_HEXAGON_C2_or"
    }
    break;
  case 24:	 // 23 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_HEXAGON_", 18))
      break;
    switch (BuiltinName[18]) {
    default: break;
    case 'A':	 // 13 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 12 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'a':	 // 3 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'b':	 // 1 string to match.
            if (BuiltinName[23] != 's')
              break;
            return Intrinsic::hexagon_A2_abs;	 // "__builtin_HEXAGON_A2_abs"
          case 'd':	 // 1 string to match.
            if (BuiltinName[23] != 'd')
              break;
            return Intrinsic::hexagon_A2_add;	 // "__builtin_HEXAGON_A2_add"
          case 'n':	 // 1 string to match.
            if (BuiltinName[23] != 'd')
              break;
            return Intrinsic::hexagon_A2_and;	 // "__builtin_HEXAGON_A2_and"
          }
          break;
        case 'm':	 // 2 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (BuiltinName[23] != 'x')
              break;
            return Intrinsic::hexagon_A2_max;	 // "__builtin_HEXAGON_A2_max"
          case 'i':	 // 1 string to match.
            if (BuiltinName[23] != 'n')
              break;
            return Intrinsic::hexagon_A2_min;	 // "__builtin_HEXAGON_A2_min"
          }
          break;
        case 'n':	 // 2 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'e':	 // 1 string to match.
            if (BuiltinName[23] != 'g')
              break;
            return Intrinsic::hexagon_A2_neg;	 // "__builtin_HEXAGON_A2_neg"
          case 'o':	 // 1 string to match.
            if (BuiltinName[23] != 't')
              break;
            return Intrinsic::hexagon_A2_not;	 // "__builtin_HEXAGON_A2_not"
          }
          break;
        case 'o':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "rp", 2))
            break;
          return Intrinsic::hexagon_A2_orp;	 // "__builtin_HEXAGON_A2_orp"
        case 's':	 // 2 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (BuiltinName[23] != 't')
              break;
            return Intrinsic::hexagon_A2_sat;	 // "__builtin_HEXAGON_A2_sat"
          case 'u':	 // 1 string to match.
            if (BuiltinName[23] != 'b')
              break;
            return Intrinsic::hexagon_A2_sub;	 // "__builtin_HEXAGON_A2_sub"
          }
          break;
        case 't':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "fr", 2))
            break;
          return Intrinsic::hexagon_A2_tfr;	 // "__builtin_HEXAGON_A2_tfr"
        case 'x':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "or", 2))
            break;
          return Intrinsic::hexagon_A2_xor;	 // "__builtin_HEXAGON_A2_xor"
        }
        break;
      case '4':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+20, "_orn", 4))
          break;
        return Intrinsic::hexagon_A4_orn;	 // "__builtin_HEXAGON_A4_orn"
      }
      break;
    case 'C':	 // 5 strings to match.
      if (memcmp(BuiltinName.data()+19, "2_", 2))
        break;
      switch (BuiltinName[21]) {
      default: break;
      case 'a':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+22, "nd", 2))
          break;
        return Intrinsic::hexagon_C2_and;	 // "__builtin_HEXAGON_C2_and"
      case 'm':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+22, "ux", 2))
          break;
        return Intrinsic::hexagon_C2_mux;	 // "__builtin_HEXAGON_C2_mux"
      case 'n':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+22, "ot", 2))
          break;
        return Intrinsic::hexagon_C2_not;	 // "__builtin_HEXAGON_C2_not"
      case 'o':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+22, "rn", 2))
          break;
        return Intrinsic::hexagon_C2_orn;	 // "__builtin_HEXAGON_C2_orn"
      case 'x':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+22, "or", 2))
          break;
        return Intrinsic::hexagon_C2_xor;	 // "__builtin_HEXAGON_C2_xor"
      }
      break;
    case 'S':	 // 5 strings to match.
      if (memcmp(BuiltinName.data()+19, "2_c", 3))
        break;
      switch (BuiltinName[22]) {
      default: break;
      case 'l':	 // 3 strings to match.
        switch (BuiltinName[23]) {
        default: break;
        case '0':	 // 1 string to match.
          return Intrinsic::hexagon_S2_cl0;	 // "__builtin_HEXAGON_S2_cl0"
        case '1':	 // 1 string to match.
          return Intrinsic::hexagon_S2_cl1;	 // "__builtin_HEXAGON_S2_cl1"
        case 'b':	 // 1 string to match.
          return Intrinsic::hexagon_S2_clb;	 // "__builtin_HEXAGON_S2_clb"
        }
        break;
      case 't':	 // 2 strings to match.
        switch (BuiltinName[23]) {
        default: break;
        case '0':	 // 1 string to match.
          return Intrinsic::hexagon_S2_ct0;	 // "__builtin_HEXAGON_S2_ct0"
        case '1':	 // 1 string to match.
          return Intrinsic::hexagon_S2_ct1;	 // "__builtin_HEXAGON_S2_ct1"
        }
        break;
      }
      break;
    }
    break;
  case 25:	 // 42 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_HEXAGON_", 18))
      break;
    switch (BuiltinName[18]) {
    default: break;
    case 'A':	 // 26 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 24 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'a':	 // 6 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'b':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "sp", 2))
              break;
            return Intrinsic::hexagon_A2_absp;	 // "__builtin_HEXAGON_A2_absp"
          case 'd':	 // 2 strings to match.
            if (BuiltinName[23] != 'd')
              break;
            switch (BuiltinName[24]) {
            default: break;
            case 'i':	 // 1 string to match.
              return Intrinsic::hexagon_A2_addi;	 // "__builtin_HEXAGON_A2_addi"
            case 'p':	 // 1 string to match.
              return Intrinsic::hexagon_A2_addp;	 // "__builtin_HEXAGON_A2_addp"
            }
            break;
          case 'n':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "dp", 2))
              break;
            return Intrinsic::hexagon_A2_andp;	 // "__builtin_HEXAGON_A2_andp"
          case 's':	 // 2 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'l':	 // 1 string to match.
              if (BuiltinName[24] != 'h')
                break;
              return Intrinsic::hexagon_A2_aslh;	 // "__builtin_HEXAGON_A2_aslh"
            case 'r':	 // 1 string to match.
              if (BuiltinName[24] != 'h')
                break;
              return Intrinsic::hexagon_A2_asrh;	 // "__builtin_HEXAGON_A2_asrh"
            }
            break;
          }
          break;
        case 'm':	 // 4 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (BuiltinName[23] != 'x')
              break;
            switch (BuiltinName[24]) {
            default: break;
            case 'p':	 // 1 string to match.
              return Intrinsic::hexagon_A2_maxp;	 // "__builtin_HEXAGON_A2_maxp"
            case 'u':	 // 1 string to match.
              return Intrinsic::hexagon_A2_maxu;	 // "__builtin_HEXAGON_A2_maxu"
            }
            break;
          case 'i':	 // 2 strings to match.
            if (BuiltinName[23] != 'n')
              break;
            switch (BuiltinName[24]) {
            default: break;
            case 'p':	 // 1 string to match.
              return Intrinsic::hexagon_A2_minp;	 // "__builtin_HEXAGON_A2_minp"
            case 'u':	 // 1 string to match.
              return Intrinsic::hexagon_A2_minu;	 // "__builtin_HEXAGON_A2_minu"
            }
            break;
          }
          break;
        case 'n':	 // 2 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'e':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "gp", 2))
              break;
            return Intrinsic::hexagon_A2_negp;	 // "__builtin_HEXAGON_A2_negp"
          case 'o':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "tp", 2))
              break;
            return Intrinsic::hexagon_A2_notp;	 // "__builtin_HEXAGON_A2_notp"
          }
          break;
        case 'o':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "rir", 3))
            break;
          return Intrinsic::hexagon_A2_orir;	 // "__builtin_HEXAGON_A2_orir"
        case 's':	 // 7 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (BuiltinName[23] != 't')
              break;
            switch (BuiltinName[24]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::hexagon_A2_satb;	 // "__builtin_HEXAGON_A2_satb"
            case 'h':	 // 1 string to match.
              return Intrinsic::hexagon_A2_sath;	 // "__builtin_HEXAGON_A2_sath"
            }
            break;
          case 'u':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "bp", 2))
              break;
            return Intrinsic::hexagon_A2_subp;	 // "__builtin_HEXAGON_A2_subp"
          case 'w':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "iz", 2))
              break;
            return Intrinsic::hexagon_A2_swiz;	 // "__builtin_HEXAGON_A2_swiz"
          case 'x':	 // 3 strings to match.
            if (BuiltinName[23] != 't')
              break;
            switch (BuiltinName[24]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::hexagon_A2_sxtb;	 // "__builtin_HEXAGON_A2_sxtb"
            case 'h':	 // 1 string to match.
              return Intrinsic::hexagon_A2_sxth;	 // "__builtin_HEXAGON_A2_sxth"
            case 'w':	 // 1 string to match.
              return Intrinsic::hexagon_A2_sxtw;	 // "__builtin_HEXAGON_A2_sxtw"
            }
            break;
          }
          break;
        case 't':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "frp", 3))
            break;
          return Intrinsic::hexagon_A2_tfrp;	 // "__builtin_HEXAGON_A2_tfrp"
        case 'x':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "orp", 3))
            break;
          return Intrinsic::hexagon_A2_xorp;	 // "__builtin_HEXAGON_A2_xorp"
        case 'z':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "xt", 2))
            break;
          switch (BuiltinName[24]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::hexagon_A2_zxtb;	 // "__builtin_HEXAGON_A2_zxtb"
          case 'h':	 // 1 string to match.
            return Intrinsic::hexagon_A2_zxth;	 // "__builtin_HEXAGON_A2_zxth"
          }
          break;
        }
        break;
      case '4':	 // 2 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "ndn", 3))
            break;
          return Intrinsic::hexagon_A4_andn;	 // "__builtin_HEXAGON_A4_andn"
        case 'o':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "rnp", 3))
            break;
          return Intrinsic::hexagon_A4_ornp;	 // "__builtin_HEXAGON_A4_ornp"
        }
        break;
      }
      break;
    case 'C':	 // 5 strings to match.
      if (memcmp(BuiltinName.data()+19, "2_", 2))
        break;
      switch (BuiltinName[21]) {
      default: break;
      case 'a':	 // 3 strings to match.
        switch (BuiltinName[22]) {
        default: break;
        case 'l':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+23, "l8", 2))
            break;
          return Intrinsic::hexagon_C2_all8;	 // "__builtin_HEXAGON_C2_all8"
        case 'n':	 // 2 strings to match.
          switch (BuiltinName[23]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (BuiltinName[24] != 'n')
              break;
            return Intrinsic::hexagon_C2_andn;	 // "__builtin_HEXAGON_C2_andn"
          case 'y':	 // 1 string to match.
            if (BuiltinName[24] != '8')
              break;
            return Intrinsic::hexagon_C2_any8;	 // "__builtin_HEXAGON_C2_any8"
          }
          break;
        }
        break;
      case 'm':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+22, "ask", 3))
          break;
        return Intrinsic::hexagon_C2_mask;	 // "__builtin_HEXAGON_C2_mask"
      case 'v':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+22, "mux", 3))
          break;
        return Intrinsic::hexagon_C2_vmux;	 // "__builtin_HEXAGON_C2_vmux"
      }
      break;
    case 'M':	 // 3 strings to match.
      if (memcmp(BuiltinName.data()+19, "2_", 2))
        break;
      switch (BuiltinName[21]) {
      default: break;
      case 'a':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+22, "cci", 3))
          break;
        return Intrinsic::hexagon_M2_acci;	 // "__builtin_HEXAGON_M2_acci"
      case 'm':	 // 2 strings to match.
        switch (BuiltinName[22]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+23, "ci", 2))
            break;
          return Intrinsic::hexagon_M2_maci;	 // "__builtin_HEXAGON_M2_maci"
        case 'p':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+23, "yi", 2))
            break;
          return Intrinsic::hexagon_M2_mpyi;	 // "__builtin_HEXAGON_M2_mpyi"
        }
        break;
      }
      break;
    case 'S':	 // 8 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 7 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'b':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "rev", 3))
            break;
          return Intrinsic::hexagon_S2_brev;	 // "__builtin_HEXAGON_S2_brev"
        case 'c':	 // 5 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'l':	 // 3 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case '0':	 // 1 string to match.
              if (BuiltinName[24] != 'p')
                break;
              return Intrinsic::hexagon_S2_cl0p;	 // "__builtin_HEXAGON_S2_cl0p"
            case '1':	 // 1 string to match.
              if (BuiltinName[24] != 'p')
                break;
              return Intrinsic::hexagon_S2_cl1p;	 // "__builtin_HEXAGON_S2_cl1p"
            case 'b':	 // 1 string to match.
              if (BuiltinName[24] != 'p')
                break;
              return Intrinsic::hexagon_S2_clbp;	 // "__builtin_HEXAGON_S2_clbp"
            }
            break;
          case 't':	 // 2 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case '0':	 // 1 string to match.
              if (BuiltinName[24] != 'p')
                break;
              return Intrinsic::hexagon_S2_ct0p;	 // "__builtin_HEXAGON_S2_ct0p"
            case '1':	 // 1 string to match.
              if (BuiltinName[24] != 'p')
                break;
              return Intrinsic::hexagon_S2_ct1p;	 // "__builtin_HEXAGON_S2_ct1p"
            }
            break;
          }
          break;
        case 'l':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "fsp", 3))
            break;
          return Intrinsic::hexagon_S2_lfsp;	 // "__builtin_HEXAGON_S2_lfsp"
        }
        break;
      case '4':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+20, "_lsli", 5))
          break;
        return Intrinsic::hexagon_S4_lsli;	 // "__builtin_HEXAGON_S4_lsli"
      }
      break;
    }
    break;
  case 26:	 // 58 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_", 10))
      break;
    switch (BuiltinName[10]) {
    default: break;
    case 'H':	 // 57 strings to match.
      if (memcmp(BuiltinName.data()+11, "EXAGON_", 7))
        break;
      switch (BuiltinName[18]) {
      default: break;
      case 'A':	 // 27 strings to match.
        switch (BuiltinName[19]) {
        default: break;
        case '2':	 // 26 strings to match.
          if (BuiltinName[20] != '_')
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'a':	 // 2 strings to match.
            switch (BuiltinName[22]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+23, "dsp", 3))
                break;
              return Intrinsic::hexagon_A2_addsp;	 // "__builtin_HEXAGON_A2_addsp"
            case 'n':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+23, "dir", 3))
                break;
              return Intrinsic::hexagon_A2_andir;	 // "__builtin_HEXAGON_A2_andir"
            }
            break;
          case 'm':	 // 2 strings to match.
            switch (BuiltinName[22]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+23, "xup", 3))
                break;
              return Intrinsic::hexagon_A2_maxup;	 // "__builtin_HEXAGON_A2_maxup"
            case 'i':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+23, "nup", 3))
                break;
              return Intrinsic::hexagon_A2_minup;	 // "__builtin_HEXAGON_A2_minup"
            }
            break;
          case 's':	 // 3 strings to match.
            switch (BuiltinName[22]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+23, "tu", 2))
                break;
              switch (BuiltinName[25]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::hexagon_A2_satub;	 // "__builtin_HEXAGON_A2_satub"
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_A2_satuh;	 // "__builtin_HEXAGON_A2_satuh"
              }
              break;
            case 'u':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+23, "bri", 3))
                break;
              return Intrinsic::hexagon_A2_subri;	 // "__builtin_HEXAGON_A2_subri"
            }
            break;
          case 't':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+22, "fr", 2))
              break;
            switch (BuiltinName[24]) {
            default: break;
            case 'i':	 // 2 strings to match.
              switch (BuiltinName[25]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_A2_tfrih;	 // "__builtin_HEXAGON_A2_tfrih"
              case 'l':	 // 1 string to match.
                return Intrinsic::hexagon_A2_tfril;	 // "__builtin_HEXAGON_A2_tfril"
              }
              break;
            case 'p':	 // 1 string to match.
              if (BuiltinName[25] != 'i')
                break;
              return Intrinsic::hexagon_A2_tfrpi;	 // "__builtin_HEXAGON_A2_tfrpi"
            case 's':	 // 1 string to match.
              if (BuiltinName[25] != 'i')
                break;
              return Intrinsic::hexagon_A2_tfrsi;	 // "__builtin_HEXAGON_A2_tfrsi"
            }
            break;
          case 'v':	 // 15 strings to match.
            switch (BuiltinName[22]) {
            default: break;
            case 'a':	 // 6 strings to match.
              switch (BuiltinName[23]) {
              default: break;
              case 'b':	 // 2 strings to match.
                if (BuiltinName[24] != 's')
                  break;
                switch (BuiltinName[25]) {
                default: break;
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vabsh;	 // "__builtin_HEXAGON_A2_vabsh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vabsw;	 // "__builtin_HEXAGON_A2_vabsw"
                }
                break;
              case 'd':	 // 2 strings to match.
                if (BuiltinName[24] != 'd')
                  break;
                switch (BuiltinName[25]) {
                default: break;
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vaddh;	 // "__builtin_HEXAGON_A2_vaddh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vaddw;	 // "__builtin_HEXAGON_A2_vaddw"
                }
                break;
              case 'v':	 // 2 strings to match.
                if (BuiltinName[24] != 'g')
                  break;
                switch (BuiltinName[25]) {
                default: break;
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vavgh;	 // "__builtin_HEXAGON_A2_vavgh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vavgw;	 // "__builtin_HEXAGON_A2_vavgw"
                }
                break;
              }
              break;
            case 'c':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+23, "onj", 3))
                break;
              return Intrinsic::hexagon_A2_vconj;	 // "__builtin_HEXAGON_A2_vconj"
            case 'm':	 // 6 strings to match.
              switch (BuiltinName[23]) {
              default: break;
              case 'a':	 // 3 strings to match.
                if (BuiltinName[24] != 'x')
                  break;
                switch (BuiltinName[25]) {
                default: break;
                case 'b':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vmaxb;	 // "__builtin_HEXAGON_A2_vmaxb"
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vmaxh;	 // "__builtin_HEXAGON_A2_vmaxh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vmaxw;	 // "__builtin_HEXAGON_A2_vmaxw"
                }
                break;
              case 'i':	 // 3 strings to match.
                if (BuiltinName[24] != 'n')
                  break;
                switch (BuiltinName[25]) {
                default: break;
                case 'b':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vminb;	 // "__builtin_HEXAGON_A2_vminb"
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vminh;	 // "__builtin_HEXAGON_A2_vminh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vminw;	 // "__builtin_HEXAGON_A2_vminw"
                }
                break;
              }
              break;
            case 's':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+23, "ub", 2))
                break;
              switch (BuiltinName[25]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_A2_vsubh;	 // "__builtin_HEXAGON_A2_vsubh"
              case 'w':	 // 1 string to match.
                return Intrinsic::hexagon_A2_vsubw;	 // "__builtin_HEXAGON_A2_vsubw"
              }
              break;
            }
            break;
          }
          break;
        case '4':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "_andnp", 6))
            break;
          return Intrinsic::hexagon_A4_andnp;	 // "__builtin_HEXAGON_A4_andnp"
        }
        break;
      case 'C':	 // 9 strings to match.
        switch (BuiltinName[19]) {
        default: break;
        case '2':	 // 8 strings to match.
          if (BuiltinName[20] != '_')
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'c':	 // 3 strings to match.
            if (memcmp(BuiltinName.data()+22, "mp", 2))
              break;
            switch (BuiltinName[24]) {
            default: break;
            case 'e':	 // 1 string to match.
              if (BuiltinName[25] != 'q')
                break;
              return Intrinsic::hexagon_C2_cmpeq;	 // "__builtin_HEXAGON_C2_cmpeq"
            case 'g':	 // 1 string to match.
              if (BuiltinName[25] != 't')
                break;
              return Intrinsic::hexagon_C2_cmpgt;	 // "__builtin_HEXAGON_C2_cmpgt"
            case 'l':	 // 1 string to match.
              if (BuiltinName[25] != 't')
                break;
              return Intrinsic::hexagon_C2_cmplt;	 // "__builtin_HEXAGON_C2_cmplt"
            }
            break;
          case 'm':	 // 3 strings to match.
            if (memcmp(BuiltinName.data()+22, "ux", 2))
              break;
            switch (BuiltinName[24]) {
            default: break;
            case 'i':	 // 2 strings to match.
              switch (BuiltinName[25]) {
              default: break;
              case 'i':	 // 1 string to match.
                return Intrinsic::hexagon_C2_muxii;	 // "__builtin_HEXAGON_C2_muxii"
              case 'r':	 // 1 string to match.
                return Intrinsic::hexagon_C2_muxir;	 // "__builtin_HEXAGON_C2_muxir"
              }
              break;
            case 'r':	 // 1 string to match.
              if (BuiltinName[25] != 'i')
                break;
              return Intrinsic::hexagon_C2_muxri;	 // "__builtin_HEXAGON_C2_muxri"
            }
            break;
          case 't':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+22, "fr", 2))
              break;
            switch (BuiltinName[24]) {
            default: break;
            case 'p':	 // 1 string to match.
              if (BuiltinName[25] != 'r')
                break;
              return Intrinsic::hexagon_C2_tfrpr;	 // "__builtin_HEXAGON_C2_tfrpr"
            case 'r':	 // 1 string to match.
              if (BuiltinName[25] != 'p')
                break;
              return Intrinsic::hexagon_C2_tfrrp;	 // "__builtin_HEXAGON_C2_tfrrp"
            }
            break;
          }
          break;
        case '4':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "_or_or", 6))
            break;
          return Intrinsic::hexagon_C4_or_or;	 // "__builtin_HEXAGON_C4_or_or"
        }
        break;
      case 'F':	 // 14 strings to match.
        if (memcmp(BuiltinName.data()+19, "2_", 2))
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'd':	 // 7 strings to match.
          if (BuiltinName[22] != 'f')
            break;
          switch (BuiltinName[23]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "dd", 2))
              break;
            return Intrinsic::hexagon_F2_dfadd;	 // "__builtin_HEXAGON_F2_dfadd"
          case 'f':	 // 2 strings to match.
            if (BuiltinName[24] != 'm')
              break;
            switch (BuiltinName[25]) {
            default: break;
            case 'a':	 // 1 string to match.
              return Intrinsic::hexagon_F2_dffma;	 // "__builtin_HEXAGON_F2_dffma"
            case 's':	 // 1 string to match.
              return Intrinsic::hexagon_F2_dffms;	 // "__builtin_HEXAGON_F2_dffms"
            }
            break;
          case 'm':	 // 3 strings to match.
            switch (BuiltinName[24]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (BuiltinName[25] != 'x')
                break;
              return Intrinsic::hexagon_F2_dfmax;	 // "__builtin_HEXAGON_F2_dfmax"
            case 'i':	 // 1 string to match.
              if (BuiltinName[25] != 'n')
                break;
              return Intrinsic::hexagon_F2_dfmin;	 // "__builtin_HEXAGON_F2_dfmin"
            case 'p':	 // 1 string to match.
              if (BuiltinName[25] != 'y')
                break;
              return Intrinsic::hexagon_F2_dfmpy;	 // "__builtin_HEXAGON_F2_dfmpy"
            }
            break;
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "ub", 2))
              break;
            return Intrinsic::hexagon_F2_dfsub;	 // "__builtin_HEXAGON_F2_dfsub"
          }
          break;
        case 's':	 // 7 strings to match.
          if (BuiltinName[22] != 'f')
            break;
          switch (BuiltinName[23]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "dd", 2))
              break;
            return Intrinsic::hexagon_F2_sfadd;	 // "__builtin_HEXAGON_F2_sfadd"
          case 'f':	 // 2 strings to match.
            if (BuiltinName[24] != 'm')
              break;
            switch (BuiltinName[25]) {
            default: break;
            case 'a':	 // 1 string to match.
              return Intrinsic::hexagon_F2_sffma;	 // "__builtin_HEXAGON_F2_sffma"
            case 's':	 // 1 string to match.
              return Intrinsic::hexagon_F2_sffms;	 // "__builtin_HEXAGON_F2_sffms"
            }
            break;
          case 'm':	 // 3 strings to match.
            switch (BuiltinName[24]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (BuiltinName[25] != 'x')
                break;
              return Intrinsic::hexagon_F2_sfmax;	 // "__builtin_HEXAGON_F2_sfmax"
            case 'i':	 // 1 string to match.
              if (BuiltinName[25] != 'n')
                break;
              return Intrinsic::hexagon_F2_sfmin;	 // "__builtin_HEXAGON_F2_sfmin"
            case 'p':	 // 1 string to match.
              if (BuiltinName[25] != 'y')
                break;
              return Intrinsic::hexagon_F2_sfmpy;	 // "__builtin_HEXAGON_F2_sfmpy"
            }
            break;
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "ub", 2))
              break;
            return Intrinsic::hexagon_F2_sfsub;	 // "__builtin_HEXAGON_F2_sfsub"
          }
          break;
        }
        break;
      case 'M':	 // 6 strings to match.
        switch (BuiltinName[19]) {
        default: break;
        case '2':	 // 4 strings to match.
          if (BuiltinName[20] != '_')
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "ccii", 4))
              break;
            return Intrinsic::hexagon_M2_accii;	 // "__builtin_HEXAGON_M2_accii"
          case 'm':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "pyui", 4))
              break;
            return Intrinsic::hexagon_M2_mpyui;	 // "__builtin_HEXAGON_M2_mpyui"
          case 'n':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "acci", 4))
              break;
            return Intrinsic::hexagon_M2_nacci;	 // "__builtin_HEXAGON_M2_nacci"
          case 'v':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "mac2", 4))
              break;
            return Intrinsic::hexagon_M2_vmac2;	 // "__builtin_HEXAGON_M2_vmac2"
          }
          break;
        case '4':	 // 2 strings to match.
          if (BuiltinName[20] != '_')
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'o':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "r_or", 4))
              break;
            return Intrinsic::hexagon_M4_or_or;	 // "__builtin_HEXAGON_M4_or_or"
          case 'p':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "mpyw", 4))
              break;
            return Intrinsic::hexagon_M4_pmpyw;	 // "__builtin_HEXAGON_M4_pmpyw"
          }
          break;
        }
        break;
      case 'S':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+19, "2_brevp", 7))
          break;
        return Intrinsic::hexagon_S2_brevp;	 // "__builtin_HEXAGON_S2_brevp"
      }
      break;
    case 'S':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+11, "I_to_SXTHI_asrh", 15))
        break;
      return Intrinsic::hexagon_SI_to_SXTHI_asrh;	 // "__builtin_SI_to_SXTHI_asrh"
    }
    break;
  case 27:	 // 70 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_HEXAGON_", 18))
      break;
    switch (BuiltinName[18]) {
    default: break;
    case 'A':	 // 35 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 26 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'a':	 // 2 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'b':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "ssat", 4))
              break;
            return Intrinsic::hexagon_A2_abssat;	 // "__builtin_HEXAGON_A2_abssat"
          case 'd':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "dsat", 4))
              break;
            return Intrinsic::hexagon_A2_addsat;	 // "__builtin_HEXAGON_A2_addsat"
          }
          break;
        case 'n':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "egsat", 5))
            break;
          return Intrinsic::hexagon_A2_negsat;	 // "__builtin_HEXAGON_A2_negsat"
        case 's':	 // 4 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'u':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "bsat", 4))
              break;
            return Intrinsic::hexagon_A2_subsat;	 // "__builtin_HEXAGON_A2_subsat"
          case 'v':	 // 3 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'a':	 // 2 strings to match.
              switch (BuiltinName[24]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+25, "dh", 2))
                  break;
                return Intrinsic::hexagon_A2_svaddh;	 // "__builtin_HEXAGON_A2_svaddh"
              case 'v':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+25, "gh", 2))
                  break;
                return Intrinsic::hexagon_A2_svavgh;	 // "__builtin_HEXAGON_A2_svavgh"
              }
              break;
            case 's':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+24, "ubh", 3))
                break;
              return Intrinsic::hexagon_A2_svsubh;	 // "__builtin_HEXAGON_A2_svsubh"
            }
            break;
          }
          break;
        case 'v':	 // 19 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'a':	 // 8 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'd':	 // 3 strings to match.
              if (BuiltinName[24] != 'd')
                break;
              switch (BuiltinName[25]) {
              default: break;
              case 'h':	 // 1 string to match.
                if (BuiltinName[26] != 's')
                  break;
                return Intrinsic::hexagon_A2_vaddhs;	 // "__builtin_HEXAGON_A2_vaddhs"
              case 'u':	 // 1 string to match.
                if (BuiltinName[26] != 'b')
                  break;
                return Intrinsic::hexagon_A2_vaddub;	 // "__builtin_HEXAGON_A2_vaddub"
              case 'w':	 // 1 string to match.
                if (BuiltinName[26] != 's')
                  break;
                return Intrinsic::hexagon_A2_vaddws;	 // "__builtin_HEXAGON_A2_vaddws"
              }
              break;
            case 'v':	 // 5 strings to match.
              if (BuiltinName[24] != 'g')
                break;
              switch (BuiltinName[25]) {
              default: break;
              case 'h':	 // 1 string to match.
                if (BuiltinName[26] != 'r')
                  break;
                return Intrinsic::hexagon_A2_vavghr;	 // "__builtin_HEXAGON_A2_vavghr"
              case 'u':	 // 3 strings to match.
                switch (BuiltinName[26]) {
                default: break;
                case 'b':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vavgub;	 // "__builtin_HEXAGON_A2_vavgub"
                case 'h':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vavguh;	 // "__builtin_HEXAGON_A2_vavguh"
                case 'w':	 // 1 string to match.
                  return Intrinsic::hexagon_A2_vavguw;	 // "__builtin_HEXAGON_A2_vavguw"
                }
                break;
              case 'w':	 // 1 string to match.
                if (BuiltinName[26] != 'r')
                  break;
                return Intrinsic::hexagon_A2_vavgwr;	 // "__builtin_HEXAGON_A2_vavgwr"
              }
              break;
            }
            break;
          case 'm':	 // 6 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'a':	 // 3 strings to match.
              if (memcmp(BuiltinName.data()+24, "xu", 2))
                break;
              switch (BuiltinName[26]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::hexagon_A2_vmaxub;	 // "__builtin_HEXAGON_A2_vmaxub"
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_A2_vmaxuh;	 // "__builtin_HEXAGON_A2_vmaxuh"
              case 'w':	 // 1 string to match.
                return Intrinsic::hexagon_A2_vmaxuw;	 // "__builtin_HEXAGON_A2_vmaxuw"
              }
              break;
            case 'i':	 // 3 strings to match.
              if (memcmp(BuiltinName.data()+24, "nu", 2))
                break;
              switch (BuiltinName[26]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::hexagon_A2_vminub;	 // "__builtin_HEXAGON_A2_vminub"
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_A2_vminuh;	 // "__builtin_HEXAGON_A2_vminuh"
              case 'w':	 // 1 string to match.
                return Intrinsic::hexagon_A2_vminuw;	 // "__builtin_HEXAGON_A2_vminuw"
              }
              break;
            }
            break;
          case 'n':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+23, "avg", 3))
              break;
            switch (BuiltinName[26]) {
            default: break;
            case 'h':	 // 1 string to match.
              return Intrinsic::hexagon_A2_vnavgh;	 // "__builtin_HEXAGON_A2_vnavgh"
            case 'w':	 // 1 string to match.
              return Intrinsic::hexagon_A2_vnavgw;	 // "__builtin_HEXAGON_A2_vnavgw"
            }
            break;
          case 's':	 // 3 strings to match.
            if (memcmp(BuiltinName.data()+23, "ub", 2))
              break;
            switch (BuiltinName[25]) {
            default: break;
            case 'h':	 // 1 string to match.
              if (BuiltinName[26] != 's')
                break;
              return Intrinsic::hexagon_A2_vsubhs;	 // "__builtin_HEXAGON_A2_vsubhs"
            case 'u':	 // 1 string to match.
              if (BuiltinName[26] != 'b')
                break;
              return Intrinsic::hexagon_A2_vsubub;	 // "__builtin_HEXAGON_A2_vsubub"
            case 'w':	 // 1 string to match.
              if (BuiltinName[26] != 's')
                break;
              return Intrinsic::hexagon_A2_vsubws;	 // "__builtin_HEXAGON_A2_vsubws"
            }
            break;
          }
          break;
        }
        break;
      case '4':	 // 9 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'c':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+22, "mp", 2))
            break;
          switch (BuiltinName[24]) {
          default: break;
          case 'b':	 // 2 strings to match.
            switch (BuiltinName[25]) {
            default: break;
            case 'e':	 // 1 string to match.
              if (BuiltinName[26] != 'q')
                break;
              return Intrinsic::hexagon_A4_cmpbeq;	 // "__builtin_HEXAGON_A4_cmpbeq"
            case 'g':	 // 1 string to match.
              if (BuiltinName[26] != 't')
                break;
              return Intrinsic::hexagon_A4_cmpbgt;	 // "__builtin_HEXAGON_A4_cmpbgt"
            }
            break;
          case 'h':	 // 2 strings to match.
            switch (BuiltinName[25]) {
            default: break;
            case 'e':	 // 1 string to match.
              if (BuiltinName[26] != 'q')
                break;
              return Intrinsic::hexagon_A4_cmpheq;	 // "__builtin_HEXAGON_A4_cmpheq"
            case 'g':	 // 1 string to match.
              if (BuiltinName[26] != 't')
                break;
              return Intrinsic::hexagon_A4_cmphgt;	 // "__builtin_HEXAGON_A4_cmphgt"
            }
            break;
          }
          break;
        case 'r':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "cmpeq", 5))
            break;
          return Intrinsic::hexagon_A4_rcmpeq;	 // "__builtin_HEXAGON_A4_rcmpeq"
        case 'v':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+22, "rm", 2))
            break;
          switch (BuiltinName[24]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (BuiltinName[25] != 'x')
              break;
            switch (BuiltinName[26]) {
            default: break;
            case 'h':	 // 1 string to match.
              return Intrinsic::hexagon_A4_vrmaxh;	 // "__builtin_HEXAGON_A4_vrmaxh"
            case 'w':	 // 1 string to match.
              return Intrinsic::hexagon_A4_vrmaxw;	 // "__builtin_HEXAGON_A4_vrmaxw"
            }
            break;
          case 'i':	 // 2 strings to match.
            if (BuiltinName[25] != 'n')
              break;
            switch (BuiltinName[26]) {
            default: break;
            case 'h':	 // 1 string to match.
              return Intrinsic::hexagon_A4_vrminh;	 // "__builtin_HEXAGON_A4_vrminh"
            case 'w':	 // 1 string to match.
              return Intrinsic::hexagon_A4_vrminw;	 // "__builtin_HEXAGON_A4_vrminw"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 'C':	 // 12 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 7 strings to match.
        if (memcmp(BuiltinName.data()+20, "_cmp", 4))
          break;
        switch (BuiltinName[24]) {
        default: break;
        case 'e':	 // 2 strings to match.
          if (BuiltinName[25] != 'q')
            break;
          switch (BuiltinName[26]) {
          default: break;
          case 'i':	 // 1 string to match.
            return Intrinsic::hexagon_C2_cmpeqi;	 // "__builtin_HEXAGON_C2_cmpeqi"
          case 'p':	 // 1 string to match.
            return Intrinsic::hexagon_C2_cmpeqp;	 // "__builtin_HEXAGON_C2_cmpeqp"
          }
          break;
        case 'g':	 // 4 strings to match.
          switch (BuiltinName[25]) {
          default: break;
          case 'e':	 // 1 string to match.
            if (BuiltinName[26] != 'i')
              break;
            return Intrinsic::hexagon_C2_cmpgei;	 // "__builtin_HEXAGON_C2_cmpgei"
          case 't':	 // 3 strings to match.
            switch (BuiltinName[26]) {
            default: break;
            case 'i':	 // 1 string to match.
              return Intrinsic::hexagon_C2_cmpgti;	 // "__builtin_HEXAGON_C2_cmpgti"
            case 'p':	 // 1 string to match.
              return Intrinsic::hexagon_C2_cmpgtp;	 // "__builtin_HEXAGON_C2_cmpgtp"
            case 'u':	 // 1 string to match.
              return Intrinsic::hexagon_C2_cmpgtu;	 // "__builtin_HEXAGON_C2_cmpgtu"
            }
            break;
          }
          break;
        case 'l':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+25, "tu", 2))
            break;
          return Intrinsic::hexagon_C2_cmpltu;	 // "__builtin_HEXAGON_C2_cmpltu"
        }
        break;
      case '4':	 // 5 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "nd_or", 5))
            break;
          return Intrinsic::hexagon_C4_and_or;	 // "__builtin_HEXAGON_C4_and_or"
        case 'c':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "mp", 2))
            break;
          switch (BuiltinName[24]) {
          default: break;
          case 'l':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "te", 2))
              break;
            return Intrinsic::hexagon_C4_cmplte;	 // "__builtin_HEXAGON_C4_cmplte"
          case 'n':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "eq", 2))
              break;
            return Intrinsic::hexagon_C4_cmpneq;	 // "__builtin_HEXAGON_C4_cmpneq"
          }
          break;
        case 'o':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "r_", 2))
            break;
          switch (BuiltinName[24]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "nd", 2))
              break;
            return Intrinsic::hexagon_C4_or_and;	 // "__builtin_HEXAGON_C4_or_and"
          case 'o':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "rn", 2))
              break;
            return Intrinsic::hexagon_C4_or_orn;	 // "__builtin_HEXAGON_C4_or_orn"
          }
          break;
        }
        break;
      }
      break;
    case 'M':	 // 12 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 7 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'm':	 // 4 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+23, "csi", 3))
              break;
            switch (BuiltinName[26]) {
            default: break;
            case 'n':	 // 1 string to match.
              return Intrinsic::hexagon_M2_macsin;	 // "__builtin_HEXAGON_M2_macsin"
            case 'p':	 // 1 string to match.
              return Intrinsic::hexagon_M2_macsip;	 // "__builtin_HEXAGON_M2_macsip"
            }
            break;
          case 'p':	 // 2 strings to match.
            if (BuiltinName[23] != 'y')
              break;
            switch (BuiltinName[24]) {
            default: break;
            case '_':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+25, "up", 2))
                break;
              return Intrinsic::hexagon_M2_mpy_up;	 // "__builtin_HEXAGON_M2_mpy_up"
            case 's':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+25, "mi", 2))
                break;
              return Intrinsic::hexagon_M2_mpysmi;	 // "__builtin_HEXAGON_M2_mpysmi"
            }
            break;
          }
          break;
        case 'n':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "accii", 5))
            break;
          return Intrinsic::hexagon_M2_naccii;	 // "__builtin_HEXAGON_M2_naccii"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "ubacc", 5))
            break;
          return Intrinsic::hexagon_M2_subacc;	 // "__builtin_HEXAGON_M2_subacc"
        case 'v':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "raddh", 5))
            break;
          return Intrinsic::hexagon_M2_vraddh;	 // "__builtin_HEXAGON_M2_vraddh"
        }
        break;
      case '4':	 // 5 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "nd_or", 5))
            break;
          return Intrinsic::hexagon_M4_and_or;	 // "__builtin_HEXAGON_M4_and_or"
        case 'o':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "r_", 2))
            break;
          switch (BuiltinName[24]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "nd", 2))
              break;
            return Intrinsic::hexagon_M4_or_and;	 // "__builtin_HEXAGON_M4_or_and"
          case 'x':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "or", 2))
              break;
            return Intrinsic::hexagon_M4_or_xor;	 // "__builtin_HEXAGON_M4_or_xor"
          }
          break;
        case 'v':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "pmpyh", 5))
            break;
          return Intrinsic::hexagon_M4_vpmpyh;	 // "__builtin_HEXAGON_M4_vpmpyh"
        case 'x':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "or_or", 5))
            break;
          return Intrinsic::hexagon_M4_xor_or;	 // "__builtin_HEXAGON_M4_xor_or"
        }
        break;
      }
      break;
    case 'S':	 // 11 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 9 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'i':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "nsert", 5))
            break;
          return Intrinsic::hexagon_S2_insert;	 // "__builtin_HEXAGON_S2_insert"
        case 'p':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "ackhl", 5))
            break;
          return Intrinsic::hexagon_S2_packhl;	 // "__builtin_HEXAGON_S2_packhl"
        case 'v':	 // 7 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'c':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "negh", 4))
              break;
            return Intrinsic::hexagon_S2_vcnegh;	 // "__builtin_HEXAGON_S2_vcnegh"
          case 's':	 // 4 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (BuiltinName[24] != 't')
                break;
              switch (BuiltinName[25]) {
              default: break;
              case 'h':	 // 1 string to match.
                if (BuiltinName[26] != 'b')
                  break;
                return Intrinsic::hexagon_S2_vsathb;	 // "__builtin_HEXAGON_S2_vsathb"
              case 'w':	 // 1 string to match.
                if (BuiltinName[26] != 'h')
                  break;
                return Intrinsic::hexagon_S2_vsatwh;	 // "__builtin_HEXAGON_S2_vsatwh"
              }
              break;
            case 'x':	 // 2 strings to match.
              if (BuiltinName[24] != 't')
                break;
              switch (BuiltinName[25]) {
              default: break;
              case 'b':	 // 1 string to match.
                if (BuiltinName[26] != 'h')
                  break;
                return Intrinsic::hexagon_S2_vsxtbh;	 // "__builtin_HEXAGON_S2_vsxtbh"
              case 'h':	 // 1 string to match.
                if (BuiltinName[26] != 'w')
                  break;
                return Intrinsic::hexagon_S2_vsxthw;	 // "__builtin_HEXAGON_S2_vsxthw"
              }
              break;
            }
            break;
          case 'z':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+23, "xt", 2))
              break;
            switch (BuiltinName[25]) {
            default: break;
            case 'b':	 // 1 string to match.
              if (BuiltinName[26] != 'h')
                break;
              return Intrinsic::hexagon_S2_vzxtbh;	 // "__builtin_HEXAGON_S2_vzxtbh"
            case 'h':	 // 1 string to match.
              if (BuiltinName[26] != 'w')
                break;
              return Intrinsic::hexagon_S2_vzxthw;	 // "__builtin_HEXAGON_S2_vzxthw"
            }
            break;
          }
          break;
        }
        break;
      case '4':	 // 2 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'o':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "r_ori", 5))
            break;
          return Intrinsic::hexagon_S4_or_ori;	 // "__builtin_HEXAGON_S4_or_ori"
        case 'p':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "arity", 5))
            break;
          return Intrinsic::hexagon_S4_parity;	 // "__builtin_HEXAGON_S4_parity"
        }
        break;
      }
      break;
    }
    break;
  case 28:	 // 103 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_HEXAGON_", 18))
      break;
    switch (BuiltinName[18]) {
    default: break;
    case 'A':	 // 36 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 23 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "ddpsat", 6))
            break;
          return Intrinsic::hexagon_A2_addpsat;	 // "__builtin_HEXAGON_A2_addpsat"
        case 's':	 // 4 strings to match.
          if (BuiltinName[22] != 'v')
            break;
          switch (BuiltinName[23]) {
          default: break;
          case 'a':	 // 2 strings to match.
            switch (BuiltinName[24]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+25, "dhs", 3))
                break;
              return Intrinsic::hexagon_A2_svaddhs;	 // "__builtin_HEXAGON_A2_svaddhs"
            case 'v':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+25, "ghs", 3))
                break;
              return Intrinsic::hexagon_A2_svavghs;	 // "__builtin_HEXAGON_A2_svavghs"
            }
            break;
          case 'n':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "avgh", 4))
              break;
            return Intrinsic::hexagon_A2_svnavgh;	 // "__builtin_HEXAGON_A2_svnavgh"
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "ubhs", 4))
              break;
            return Intrinsic::hexagon_A2_svsubhs;	 // "__builtin_HEXAGON_A2_svsubhs"
          }
          break;
        case 'v':	 // 18 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'a':	 // 7 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'd':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+24, "du", 2))
                break;
              switch (BuiltinName[26]) {
              default: break;
              case 'b':	 // 1 string to match.
                if (BuiltinName[27] != 's')
                  break;
                return Intrinsic::hexagon_A2_vaddubs;	 // "__builtin_HEXAGON_A2_vaddubs"
              case 'h':	 // 1 string to match.
                if (BuiltinName[27] != 's')
                  break;
                return Intrinsic::hexagon_A2_vadduhs;	 // "__builtin_HEXAGON_A2_vadduhs"
              }
              break;
            case 'v':	 // 5 strings to match.
              if (BuiltinName[24] != 'g')
                break;
              switch (BuiltinName[25]) {
              default: break;
              case 'h':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+26, "cr", 2))
                  break;
                return Intrinsic::hexagon_A2_vavghcr;	 // "__builtin_HEXAGON_A2_vavghcr"
              case 'u':	 // 3 strings to match.
                switch (BuiltinName[26]) {
                default: break;
                case 'b':	 // 1 string to match.
                  if (BuiltinName[27] != 'r')
                    break;
                  return Intrinsic::hexagon_A2_vavgubr;	 // "__builtin_HEXAGON_A2_vavgubr"
                case 'h':	 // 1 string to match.
                  if (BuiltinName[27] != 'r')
                    break;
                  return Intrinsic::hexagon_A2_vavguhr;	 // "__builtin_HEXAGON_A2_vavguhr"
                case 'w':	 // 1 string to match.
                  if (BuiltinName[27] != 'r')
                    break;
                  return Intrinsic::hexagon_A2_vavguwr;	 // "__builtin_HEXAGON_A2_vavguwr"
                }
                break;
              case 'w':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+26, "cr", 2))
                  break;
                return Intrinsic::hexagon_A2_vavgwcr;	 // "__builtin_HEXAGON_A2_vavgwcr"
              }
              break;
            }
            break;
          case 'c':	 // 5 strings to match.
            if (memcmp(BuiltinName.data()+23, "mp", 2))
              break;
            switch (BuiltinName[25]) {
            default: break;
            case 'b':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+26, "eq", 2))
                break;
              return Intrinsic::hexagon_A2_vcmpbeq;	 // "__builtin_HEXAGON_A2_vcmpbeq"
            case 'h':	 // 2 strings to match.
              switch (BuiltinName[26]) {
              default: break;
              case 'e':	 // 1 string to match.
                if (BuiltinName[27] != 'q')
                  break;
                return Intrinsic::hexagon_A2_vcmpheq;	 // "__builtin_HEXAGON_A2_vcmpheq"
              case 'g':	 // 1 string to match.
                if (BuiltinName[27] != 't')
                  break;
                return Intrinsic::hexagon_A2_vcmphgt;	 // "__builtin_HEXAGON_A2_vcmphgt"
              }
              break;
            case 'w':	 // 2 strings to match.
              switch (BuiltinName[26]) {
              default: break;
              case 'e':	 // 1 string to match.
                if (BuiltinName[27] != 'q')
                  break;
                return Intrinsic::hexagon_A2_vcmpweq;	 // "__builtin_HEXAGON_A2_vcmpweq"
              case 'g':	 // 1 string to match.
                if (BuiltinName[27] != 't')
                  break;
                return Intrinsic::hexagon_A2_vcmpwgt;	 // "__builtin_HEXAGON_A2_vcmpwgt"
              }
              break;
            }
            break;
          case 'n':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+23, "avg", 3))
              break;
            switch (BuiltinName[26]) {
            default: break;
            case 'h':	 // 1 string to match.
              if (BuiltinName[27] != 'r')
                break;
              return Intrinsic::hexagon_A2_vnavghr;	 // "__builtin_HEXAGON_A2_vnavghr"
            case 'w':	 // 1 string to match.
              if (BuiltinName[27] != 'r')
                break;
              return Intrinsic::hexagon_A2_vnavgwr;	 // "__builtin_HEXAGON_A2_vnavgwr"
            }
            break;
          case 'r':	 // 2 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+24, "ddub", 4))
                break;
              return Intrinsic::hexagon_A2_vraddub;	 // "__builtin_HEXAGON_A2_vraddub"
            case 's':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+24, "adub", 4))
                break;
              return Intrinsic::hexagon_A2_vrsadub;	 // "__builtin_HEXAGON_A2_vrsadub"
            }
            break;
          case 's':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+23, "ubu", 3))
              break;
            switch (BuiltinName[26]) {
            default: break;
            case 'b':	 // 1 string to match.
              if (BuiltinName[27] != 's')
                break;
              return Intrinsic::hexagon_A2_vsububs;	 // "__builtin_HEXAGON_A2_vsububs"
            case 'h':	 // 1 string to match.
              if (BuiltinName[27] != 's')
                break;
              return Intrinsic::hexagon_A2_vsubuhs;	 // "__builtin_HEXAGON_A2_vsubuhs"
            }
            break;
          }
          break;
        }
        break;
      case '4':	 // 13 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'c':	 // 6 strings to match.
          if (memcmp(BuiltinName.data()+22, "mp", 2))
            break;
          switch (BuiltinName[24]) {
          default: break;
          case 'b':	 // 3 strings to match.
            switch (BuiltinName[25]) {
            default: break;
            case 'e':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+26, "qi", 2))
                break;
              return Intrinsic::hexagon_A4_cmpbeqi;	 // "__builtin_HEXAGON_A4_cmpbeqi"
            case 'g':	 // 2 strings to match.
              if (BuiltinName[26] != 't')
                break;
              switch (BuiltinName[27]) {
              default: break;
              case 'i':	 // 1 string to match.
                return Intrinsic::hexagon_A4_cmpbgti;	 // "__builtin_HEXAGON_A4_cmpbgti"
              case 'u':	 // 1 string to match.
                return Intrinsic::hexagon_A4_cmpbgtu;	 // "__builtin_HEXAGON_A4_cmpbgtu"
              }
              break;
            }
            break;
          case 'h':	 // 3 strings to match.
            switch (BuiltinName[25]) {
            default: break;
            case 'e':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+26, "qi", 2))
                break;
              return Intrinsic::hexagon_A4_cmpheqi;	 // "__builtin_HEXAGON_A4_cmpheqi"
            case 'g':	 // 2 strings to match.
              if (BuiltinName[26] != 't')
                break;
              switch (BuiltinName[27]) {
              default: break;
              case 'i':	 // 1 string to match.
                return Intrinsic::hexagon_A4_cmphgti;	 // "__builtin_HEXAGON_A4_cmphgti"
              case 'u':	 // 1 string to match.
                return Intrinsic::hexagon_A4_cmphgtu;	 // "__builtin_HEXAGON_A4_cmphgtu"
              }
              break;
            }
            break;
          }
          break;
        case 'r':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "cmp", 3))
            break;
          switch (BuiltinName[25]) {
          default: break;
          case 'e':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "qi", 2))
              break;
            return Intrinsic::hexagon_A4_rcmpeqi;	 // "__builtin_HEXAGON_A4_rcmpeqi"
          case 'n':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "eq", 2))
              break;
            return Intrinsic::hexagon_A4_rcmpneq;	 // "__builtin_HEXAGON_A4_rcmpneq"
          }
          break;
        case 'v':	 // 5 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'c':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "mpbgt", 5))
              break;
            return Intrinsic::hexagon_A4_vcmpbgt;	 // "__builtin_HEXAGON_A4_vcmpbgt"
          case 'r':	 // 4 strings to match.
            if (BuiltinName[23] != 'm')
              break;
            switch (BuiltinName[24]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+25, "xu", 2))
                break;
              switch (BuiltinName[27]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_A4_vrmaxuh;	 // "__builtin_HEXAGON_A4_vrmaxuh"
              case 'w':	 // 1 string to match.
                return Intrinsic::hexagon_A4_vrmaxuw;	 // "__builtin_HEXAGON_A4_vrmaxuw"
              }
              break;
            case 'i':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+25, "nu", 2))
                break;
              switch (BuiltinName[27]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_A4_vrminuh;	 // "__builtin_HEXAGON_A4_vrminuh"
              case 'w':	 // 1 string to match.
                return Intrinsic::hexagon_A4_vrminuw;	 // "__builtin_HEXAGON_A4_vrminuw"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 'C':	 // 12 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 6 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'b':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "its", 3))
            break;
          switch (BuiltinName[25]) {
          default: break;
          case 'c':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "lr", 2))
              break;
            return Intrinsic::hexagon_C2_bitsclr;	 // "__builtin_HEXAGON_C2_bitsclr"
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "et", 2))
              break;
            return Intrinsic::hexagon_C2_bitsset;	 // "__builtin_HEXAGON_C2_bitsset"
          }
          break;
        case 'c':	 // 3 strings to match.
          if (memcmp(BuiltinName.data()+22, "mpg", 3))
            break;
          switch (BuiltinName[25]) {
          default: break;
          case 'e':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "ui", 2))
              break;
            return Intrinsic::hexagon_C2_cmpgeui;	 // "__builtin_HEXAGON_C2_cmpgeui"
          case 't':	 // 2 strings to match.
            if (BuiltinName[26] != 'u')
              break;
            switch (BuiltinName[27]) {
            default: break;
            case 'i':	 // 1 string to match.
              return Intrinsic::hexagon_C2_cmpgtui;	 // "__builtin_HEXAGON_C2_cmpgtui"
            case 'p':	 // 1 string to match.
              return Intrinsic::hexagon_C2_cmpgtup;	 // "__builtin_HEXAGON_C2_cmpgtup"
            }
            break;
          }
          break;
        case 'v':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "itpack", 6))
            break;
          return Intrinsic::hexagon_C2_vitpack;	 // "__builtin_HEXAGON_C2_vitpack"
        }
        break;
      case '4':	 // 6 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'a':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "nd_", 3))
            break;
          switch (BuiltinName[25]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "nd", 2))
              break;
            return Intrinsic::hexagon_C4_and_and;	 // "__builtin_HEXAGON_C4_and_and"
          case 'o':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "rn", 2))
              break;
            return Intrinsic::hexagon_C4_and_orn;	 // "__builtin_HEXAGON_C4_and_orn"
          }
          break;
        case 'c':	 // 3 strings to match.
          if (memcmp(BuiltinName.data()+22, "mp", 2))
            break;
          switch (BuiltinName[24]) {
          default: break;
          case 'l':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+25, "te", 2))
              break;
            switch (BuiltinName[27]) {
            default: break;
            case 'i':	 // 1 string to match.
              return Intrinsic::hexagon_C4_cmpltei;	 // "__builtin_HEXAGON_C4_cmpltei"
            case 'u':	 // 1 string to match.
              return Intrinsic::hexagon_C4_cmplteu;	 // "__builtin_HEXAGON_C4_cmplteu"
            }
            break;
          case 'n':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "eqi", 3))
              break;
            return Intrinsic::hexagon_C4_cmpneqi;	 // "__builtin_HEXAGON_C4_cmpneqi"
          }
          break;
        case 'o':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "r_andn", 6))
            break;
          return Intrinsic::hexagon_C4_or_andn;	 // "__builtin_HEXAGON_C4_or_andn"
        }
        break;
      }
      break;
    case 'F':	 // 14 strings to match.
      if (memcmp(BuiltinName.data()+19, "2_", 2))
        break;
      switch (BuiltinName[21]) {
      default: break;
      case 'd':	 // 7 strings to match.
        if (BuiltinName[22] != 'f')
          break;
        switch (BuiltinName[23]) {
        default: break;
        case 'c':	 // 5 strings to match.
          switch (BuiltinName[24]) {
          default: break;
          case 'l':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "ass", 3))
              break;
            return Intrinsic::hexagon_F2_dfclass;	 // "__builtin_HEXAGON_F2_dfclass"
          case 'm':	 // 4 strings to match.
            if (BuiltinName[25] != 'p')
              break;
            switch (BuiltinName[26]) {
            default: break;
            case 'e':	 // 1 string to match.
              if (BuiltinName[27] != 'q')
                break;
              return Intrinsic::hexagon_F2_dfcmpeq;	 // "__builtin_HEXAGON_F2_dfcmpeq"
            case 'g':	 // 2 strings to match.
              switch (BuiltinName[27]) {
              default: break;
              case 'e':	 // 1 string to match.
                return Intrinsic::hexagon_F2_dfcmpge;	 // "__builtin_HEXAGON_F2_dfcmpge"
              case 't':	 // 1 string to match.
                return Intrinsic::hexagon_F2_dfcmpgt;	 // "__builtin_HEXAGON_F2_dfcmpgt"
              }
              break;
            case 'u':	 // 1 string to match.
              if (BuiltinName[27] != 'o')
                break;
              return Intrinsic::hexagon_F2_dfcmpuo;	 // "__builtin_HEXAGON_F2_dfcmpuo"
            }
            break;
          }
          break;
        case 'i':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+24, "mm_", 3))
            break;
          switch (BuiltinName[27]) {
          default: break;
          case 'n':	 // 1 string to match.
            return Intrinsic::hexagon_F2_dfimm_n;	 // "__builtin_HEXAGON_F2_dfimm_n"
          case 'p':	 // 1 string to match.
            return Intrinsic::hexagon_F2_dfimm_p;	 // "__builtin_HEXAGON_F2_dfimm_p"
          }
          break;
        }
        break;
      case 's':	 // 7 strings to match.
        if (BuiltinName[22] != 'f')
          break;
        switch (BuiltinName[23]) {
        default: break;
        case 'c':	 // 5 strings to match.
          switch (BuiltinName[24]) {
          default: break;
          case 'l':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "ass", 3))
              break;
            return Intrinsic::hexagon_F2_sfclass;	 // "__builtin_HEXAGON_F2_sfclass"
          case 'm':	 // 4 strings to match.
            if (BuiltinName[25] != 'p')
              break;
            switch (BuiltinName[26]) {
            default: break;
            case 'e':	 // 1 string to match.
              if (BuiltinName[27] != 'q')
                break;
              return Intrinsic::hexagon_F2_sfcmpeq;	 // "__builtin_HEXAGON_F2_sfcmpeq"
            case 'g':	 // 2 strings to match.
              switch (BuiltinName[27]) {
              default: break;
              case 'e':	 // 1 string to match.
                return Intrinsic::hexagon_F2_sfcmpge;	 // "__builtin_HEXAGON_F2_sfcmpge"
              case 't':	 // 1 string to match.
                return Intrinsic::hexagon_F2_sfcmpgt;	 // "__builtin_HEXAGON_F2_sfcmpgt"
              }
              break;
            case 'u':	 // 1 string to match.
              if (BuiltinName[27] != 'o')
                break;
              return Intrinsic::hexagon_F2_sfcmpuo;	 // "__builtin_HEXAGON_F2_sfcmpuo"
            }
            break;
          }
          break;
        case 'i':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+24, "mm_", 3))
            break;
          switch (BuiltinName[27]) {
          default: break;
          case 'n':	 // 1 string to match.
            return Intrinsic::hexagon_F2_sfimm_n;	 // "__builtin_HEXAGON_F2_sfimm_n"
          case 'p':	 // 1 string to match.
            return Intrinsic::hexagon_F2_sfimm_p;	 // "__builtin_HEXAGON_F2_sfimm_p"
          }
          break;
        }
        break;
      }
      break;
    case 'M':	 // 11 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 3 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'm':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "pyu_up", 6))
            break;
          return Intrinsic::hexagon_M2_mpyu_up;	 // "__builtin_HEXAGON_M2_mpyu_up"
        case 'v':	 // 2 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'm':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "ac2es", 5))
              break;
            return Intrinsic::hexagon_M2_vmac2es;	 // "__builtin_HEXAGON_M2_vmac2es"
          case 'r':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "adduh", 5))
              break;
            return Intrinsic::hexagon_M2_vradduh;	 // "__builtin_HEXAGON_M2_vradduh"
          }
          break;
        }
        break;
      case '4':	 // 4 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'a':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "nd_", 3))
            break;
          switch (BuiltinName[25]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "nd", 2))
              break;
            return Intrinsic::hexagon_M4_and_and;	 // "__builtin_HEXAGON_M4_and_and"
          case 'x':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "or", 2))
              break;
            return Intrinsic::hexagon_M4_and_xor;	 // "__builtin_HEXAGON_M4_and_xor"
          }
          break;
        case 'o':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "r_andn", 6))
            break;
          return Intrinsic::hexagon_M4_or_andn;	 // "__builtin_HEXAGON_M4_or_andn"
        case 'x':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "or_and", 6))
            break;
          return Intrinsic::hexagon_M4_xor_and;	 // "__builtin_HEXAGON_M4_xor_and"
        }
        break;
      case '5':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+20, "_vm", 3))
          break;
        switch (BuiltinName[23]) {
        default: break;
        case 'a':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+24, "cb", 2))
            break;
          switch (BuiltinName[26]) {
          default: break;
          case 's':	 // 1 string to match.
            if (BuiltinName[27] != 'u')
              break;
            return Intrinsic::hexagon_M5_vmacbsu;	 // "__builtin_HEXAGON_M5_vmacbsu"
          case 'u':	 // 1 string to match.
            if (BuiltinName[27] != 'u')
              break;
            return Intrinsic::hexagon_M5_vmacbuu;	 // "__builtin_HEXAGON_M5_vmacbuu"
          }
          break;
        case 'p':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+24, "yb", 2))
            break;
          switch (BuiltinName[26]) {
          default: break;
          case 's':	 // 1 string to match.
            if (BuiltinName[27] != 'u')
              break;
            return Intrinsic::hexagon_M5_vmpybsu;	 // "__builtin_HEXAGON_M5_vmpybsu"
          case 'u':	 // 1 string to match.
            if (BuiltinName[27] != 'u')
              break;
            return Intrinsic::hexagon_M5_vmpybuu;	 // "__builtin_HEXAGON_M5_vmpybuu"
          }
          break;
        }
        break;
      }
      break;
    case 'S':	 // 30 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 25 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'a':	 // 8 strings to match.
          if (BuiltinName[22] != 's')
            break;
          switch (BuiltinName[23]) {
          default: break;
          case 'l':	 // 4 strings to match.
            if (BuiltinName[24] != '_')
              break;
            switch (BuiltinName[25]) {
            default: break;
            case 'i':	 // 2 strings to match.
              if (BuiltinName[26] != '_')
                break;
              switch (BuiltinName[27]) {
              default: break;
              case 'p':	 // 1 string to match.
                return Intrinsic::hexagon_S2_asl_i_p;	 // "__builtin_HEXAGON_S2_asl_i_p"
              case 'r':	 // 1 string to match.
                return Intrinsic::hexagon_S2_asl_i_r;	 // "__builtin_HEXAGON_S2_asl_i_r"
              }
              break;
            case 'r':	 // 2 strings to match.
              if (BuiltinName[26] != '_')
                break;
              switch (BuiltinName[27]) {
              default: break;
              case 'p':	 // 1 string to match.
                return Intrinsic::hexagon_S2_asl_r_p;	 // "__builtin_HEXAGON_S2_asl_r_p"
              case 'r':	 // 1 string to match.
                return Intrinsic::hexagon_S2_asl_r_r;	 // "__builtin_HEXAGON_S2_asl_r_r"
              }
              break;
            }
            break;
          case 'r':	 // 4 strings to match.
            if (BuiltinName[24] != '_')
              break;
            switch (BuiltinName[25]) {
            default: break;
            case 'i':	 // 2 strings to match.
              if (BuiltinName[26] != '_')
                break;
              switch (BuiltinName[27]) {
              default: break;
              case 'p':	 // 1 string to match.
                return Intrinsic::hexagon_S2_asr_i_p;	 // "__builtin_HEXAGON_S2_asr_i_p"
              case 'r':	 // 1 string to match.
                return Intrinsic::hexagon_S2_asr_i_r;	 // "__builtin_HEXAGON_S2_asr_i_r"
              }
              break;
            case 'r':	 // 2 strings to match.
              if (BuiltinName[26] != '_')
                break;
              switch (BuiltinName[27]) {
              default: break;
              case 'p':	 // 1 string to match.
                return Intrinsic::hexagon_S2_asr_r_p;	 // "__builtin_HEXAGON_S2_asr_r_p"
              case 'r':	 // 1 string to match.
                return Intrinsic::hexagon_S2_asr_r_r;	 // "__builtin_HEXAGON_S2_asr_r_r"
              }
              break;
            }
            break;
          }
          break;
        case 'c':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "lbnorm", 6))
            break;
          return Intrinsic::hexagon_S2_clbnorm;	 // "__builtin_HEXAGON_S2_clbnorm"
        case 'i':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "nsertp", 6))
            break;
          return Intrinsic::hexagon_S2_insertp;	 // "__builtin_HEXAGON_S2_insertp"
        case 'l':	 // 6 strings to match.
          if (BuiltinName[22] != 's')
            break;
          switch (BuiltinName[23]) {
          default: break;
          case 'l':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+24, "_r_", 3))
              break;
            switch (BuiltinName[27]) {
            default: break;
            case 'p':	 // 1 string to match.
              return Intrinsic::hexagon_S2_lsl_r_p;	 // "__builtin_HEXAGON_S2_lsl_r_p"
            case 'r':	 // 1 string to match.
              return Intrinsic::hexagon_S2_lsl_r_r;	 // "__builtin_HEXAGON_S2_lsl_r_r"
            }
            break;
          case 'r':	 // 4 strings to match.
            if (BuiltinName[24] != '_')
              break;
            switch (BuiltinName[25]) {
            default: break;
            case 'i':	 // 2 strings to match.
              if (BuiltinName[26] != '_')
                break;
              switch (BuiltinName[27]) {
              default: break;
              case 'p':	 // 1 string to match.
                return Intrinsic::hexagon_S2_lsr_i_p;	 // "__builtin_HEXAGON_S2_lsr_i_p"
              case 'r':	 // 1 string to match.
                return Intrinsic::hexagon_S2_lsr_i_r;	 // "__builtin_HEXAGON_S2_lsr_i_r"
              }
              break;
            case 'r':	 // 2 strings to match.
              if (BuiltinName[26] != '_')
                break;
              switch (BuiltinName[27]) {
              default: break;
              case 'p':	 // 1 string to match.
                return Intrinsic::hexagon_S2_lsr_r_p;	 // "__builtin_HEXAGON_S2_lsr_r_p"
              case 'r':	 // 1 string to match.
                return Intrinsic::hexagon_S2_lsr_r_r;	 // "__builtin_HEXAGON_S2_lsr_r_r"
              }
              break;
            }
            break;
          }
          break;
        case 'p':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "arityp", 6))
            break;
          return Intrinsic::hexagon_S2_parityp;	 // "__builtin_HEXAGON_S2_parityp"
        case 's':	 // 5 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'h':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+23, "uff", 3))
              break;
            switch (BuiltinName[26]) {
            default: break;
            case 'e':	 // 2 strings to match.
              switch (BuiltinName[27]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::hexagon_S2_shuffeb;	 // "__builtin_HEXAGON_S2_shuffeb"
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_S2_shuffeh;	 // "__builtin_HEXAGON_S2_shuffeh"
              }
              break;
            case 'o':	 // 2 strings to match.
              switch (BuiltinName[27]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::hexagon_S2_shuffob;	 // "__builtin_HEXAGON_S2_shuffob"
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_S2_shuffoh;	 // "__builtin_HEXAGON_S2_shuffoh"
              }
              break;
            }
            break;
          case 'v':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "sathb", 5))
              break;
            return Intrinsic::hexagon_S2_svsathb;	 // "__builtin_HEXAGON_S2_svsathb"
          }
          break;
        case 'v':	 // 3 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'r':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "cnegh", 5))
              break;
            return Intrinsic::hexagon_S2_vrcnegh;	 // "__builtin_HEXAGON_S2_vrcnegh"
          case 's':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+23, "at", 2))
              break;
            switch (BuiltinName[25]) {
            default: break;
            case 'h':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+26, "ub", 2))
                break;
              return Intrinsic::hexagon_S2_vsathub;	 // "__builtin_HEXAGON_S2_vsathub"
            case 'w':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+26, "uh", 2))
                break;
              return Intrinsic::hexagon_S2_vsatwuh;	 // "__builtin_HEXAGON_S2_vsatwuh"
            }
            break;
          }
          break;
        }
        break;
      case '4':	 // 5 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "ddaddi", 6))
            break;
          return Intrinsic::hexagon_S4_addaddi;	 // "__builtin_HEXAGON_S4_addaddi"
        case 'c':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "lbaddi", 6))
            break;
          return Intrinsic::hexagon_S4_clbaddi;	 // "__builtin_HEXAGON_S4_clbaddi"
        case 'e':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "xtract", 6))
            break;
          return Intrinsic::hexagon_S4_extract;	 // "__builtin_HEXAGON_S4_extract"
        case 'o':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "r_andi", 6))
            break;
          return Intrinsic::hexagon_S4_or_andi;	 // "__builtin_HEXAGON_S4_or_andi"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "ubaddi", 6))
            break;
          return Intrinsic::hexagon_S4_subaddi;	 // "__builtin_HEXAGON_S4_subaddi"
        }
        break;
      }
      break;
    }
    break;
  case 29:	 // 103 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_HEXAGON_", 18))
      break;
    switch (BuiltinName[18]) {
    default: break;
    case 'A':	 // 26 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 11 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'c':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "ombinew", 7))
            break;
          return Intrinsic::hexagon_A2_combinew;	 // "__builtin_HEXAGON_A2_combinew"
        case 'r':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "oundsat", 7))
            break;
          return Intrinsic::hexagon_A2_roundsat;	 // "__builtin_HEXAGON_A2_roundsat"
        case 's':	 // 2 strings to match.
          if (BuiltinName[22] != 'v')
            break;
          switch (BuiltinName[23]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "dduhs", 5))
              break;
            return Intrinsic::hexagon_A2_svadduhs;	 // "__builtin_HEXAGON_A2_svadduhs"
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "ubuhs", 5))
              break;
            return Intrinsic::hexagon_A2_svsubuhs;	 // "__builtin_HEXAGON_A2_svsubuhs"
          }
          break;
        case 'v':	 // 7 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+23, "bs", 2))
              break;
            switch (BuiltinName[25]) {
            default: break;
            case 'h':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+26, "sat", 3))
                break;
              return Intrinsic::hexagon_A2_vabshsat;	 // "__builtin_HEXAGON_A2_vabshsat"
            case 'w':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+26, "sat", 3))
                break;
              return Intrinsic::hexagon_A2_vabswsat;	 // "__builtin_HEXAGON_A2_vabswsat"
            }
            break;
          case 'c':	 // 3 strings to match.
            if (memcmp(BuiltinName.data()+23, "mp", 2))
              break;
            switch (BuiltinName[25]) {
            default: break;
            case 'b':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+26, "gtu", 3))
                break;
              return Intrinsic::hexagon_A2_vcmpbgtu;	 // "__builtin_HEXAGON_A2_vcmpbgtu"
            case 'h':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+26, "gtu", 3))
                break;
              return Intrinsic::hexagon_A2_vcmphgtu;	 // "__builtin_HEXAGON_A2_vcmphgtu"
            case 'w':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+26, "gtu", 3))
                break;
              return Intrinsic::hexagon_A2_vcmpwgtu;	 // "__builtin_HEXAGON_A2_vcmpwgtu"
            }
            break;
          case 'n':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+23, "avg", 3))
              break;
            switch (BuiltinName[26]) {
            default: break;
            case 'h':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+27, "cr", 2))
                break;
              return Intrinsic::hexagon_A2_vnavghcr;	 // "__builtin_HEXAGON_A2_vnavghcr"
            case 'w':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+27, "cr", 2))
                break;
              return Intrinsic::hexagon_A2_vnavgwcr;	 // "__builtin_HEXAGON_A2_vnavgwcr"
            }
            break;
          }
          break;
        }
        break;
      case '4':	 // 14 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'b':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "itsplit", 7))
            break;
          return Intrinsic::hexagon_A4_bitsplit;	 // "__builtin_HEXAGON_A4_bitsplit"
        case 'c':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "mp", 2))
            break;
          switch (BuiltinName[24]) {
          default: break;
          case 'b':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "gtui", 4))
              break;
            return Intrinsic::hexagon_A4_cmpbgtui;	 // "__builtin_HEXAGON_A4_cmpbgtui"
          case 'h':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "gtui", 4))
              break;
            return Intrinsic::hexagon_A4_cmphgtui;	 // "__builtin_HEXAGON_A4_cmphgtui"
          }
          break;
        case 'm':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "odwrapu", 7))
            break;
          return Intrinsic::hexagon_A4_modwrapu;	 // "__builtin_HEXAGON_A4_modwrapu"
        case 'r':	 // 3 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'c':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "mpneqi", 6))
              break;
            return Intrinsic::hexagon_A4_rcmpneqi;	 // "__builtin_HEXAGON_A4_rcmpneqi"
          case 'o':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+23, "und_r", 5))
              break;
            switch (BuiltinName[28]) {
            default: break;
            case 'i':	 // 1 string to match.
              return Intrinsic::hexagon_A4_round_ri;	 // "__builtin_HEXAGON_A4_round_ri"
            case 'r':	 // 1 string to match.
              return Intrinsic::hexagon_A4_round_rr;	 // "__builtin_HEXAGON_A4_round_rr"
            }
            break;
          }
          break;
        case 't':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "lbmatch", 7))
            break;
          return Intrinsic::hexagon_A4_tlbmatch;	 // "__builtin_HEXAGON_A4_tlbmatch"
        case 'v':	 // 6 strings to match.
          if (memcmp(BuiltinName.data()+22, "cmp", 3))
            break;
          switch (BuiltinName[25]) {
          default: break;
          case 'b':	 // 2 strings to match.
            switch (BuiltinName[26]) {
            default: break;
            case 'e':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+27, "qi", 2))
                break;
              return Intrinsic::hexagon_A4_vcmpbeqi;	 // "__builtin_HEXAGON_A4_vcmpbeqi"
            case 'g':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+27, "ti", 2))
                break;
              return Intrinsic::hexagon_A4_vcmpbgti;	 // "__builtin_HEXAGON_A4_vcmpbgti"
            }
            break;
          case 'h':	 // 2 strings to match.
            switch (BuiltinName[26]) {
            default: break;
            case 'e':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+27, "qi", 2))
                break;
              return Intrinsic::hexagon_A4_vcmpheqi;	 // "__builtin_HEXAGON_A4_vcmpheqi"
            case 'g':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+27, "ti", 2))
                break;
              return Intrinsic::hexagon_A4_vcmphgti;	 // "__builtin_HEXAGON_A4_vcmphgti"
            }
            break;
          case 'w':	 // 2 strings to match.
            switch (BuiltinName[26]) {
            default: break;
            case 'e':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+27, "qi", 2))
                break;
              return Intrinsic::hexagon_A4_vcmpweqi;	 // "__builtin_HEXAGON_A4_vcmpweqi"
            case 'g':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+27, "ti", 2))
                break;
              return Intrinsic::hexagon_A4_vcmpwgti;	 // "__builtin_HEXAGON_A4_vcmpwgti"
            }
            break;
          }
          break;
        }
        break;
      case '5':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+20, "_vaddhubs", 9))
          break;
        return Intrinsic::hexagon_A5_vaddhubs;	 // "__builtin_HEXAGON_A5_vaddhubs"
      }
      break;
    case 'C':	 // 5 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+20, "_bitsclri", 9))
          break;
        return Intrinsic::hexagon_C2_bitsclri;	 // "__builtin_HEXAGON_C2_bitsclri"
      case '4':	 // 4 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "nd_andn", 7))
            break;
          return Intrinsic::hexagon_C4_and_andn;	 // "__builtin_HEXAGON_C4_and_andn"
        case 'c':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "mplteui", 7))
            break;
          return Intrinsic::hexagon_C4_cmplteui;	 // "__builtin_HEXAGON_C4_cmplteui"
        case 'n':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "bits", 4))
            break;
          switch (BuiltinName[26]) {
          default: break;
          case 'c':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "lr", 2))
              break;
            return Intrinsic::hexagon_C4_nbitsclr;	 // "__builtin_HEXAGON_C4_nbitsclr"
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "et", 2))
              break;
            return Intrinsic::hexagon_C4_nbitsset;	 // "__builtin_HEXAGON_C4_nbitsset"
          }
          break;
        }
        break;
      }
      break;
    case 'F':	 // 8 strings to match.
      if (memcmp(BuiltinName.data()+19, "2_", 2))
        break;
      switch (BuiltinName[21]) {
      default: break;
      case 'd':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+22, "ff", 2))
          break;
        switch (BuiltinName[24]) {
        default: break;
        case 'i':	 // 3 strings to match.
          if (memcmp(BuiltinName.data()+25, "xup", 3))
            break;
          switch (BuiltinName[28]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::hexagon_F2_dffixupd;	 // "__builtin_HEXAGON_F2_dffixupd"
          case 'n':	 // 1 string to match.
            return Intrinsic::hexagon_F2_dffixupn;	 // "__builtin_HEXAGON_F2_dffixupn"
          case 'r':	 // 1 string to match.
            return Intrinsic::hexagon_F2_dffixupr;	 // "__builtin_HEXAGON_F2_dffixupr"
          }
          break;
        case 'm':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+25, "a_sc", 4))
            break;
          return Intrinsic::hexagon_F2_dffma_sc;	 // "__builtin_HEXAGON_F2_dffma_sc"
        }
        break;
      case 's':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+22, "ff", 2))
          break;
        switch (BuiltinName[24]) {
        default: break;
        case 'i':	 // 3 strings to match.
          if (memcmp(BuiltinName.data()+25, "xup", 3))
            break;
          switch (BuiltinName[28]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::hexagon_F2_sffixupd;	 // "__builtin_HEXAGON_F2_sffixupd"
          case 'n':	 // 1 string to match.
            return Intrinsic::hexagon_F2_sffixupn;	 // "__builtin_HEXAGON_F2_sffixupn"
          case 'r':	 // 1 string to match.
            return Intrinsic::hexagon_F2_sffixupr;	 // "__builtin_HEXAGON_F2_sffixupr"
          }
          break;
        case 'm':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+25, "a_sc", 4))
            break;
          return Intrinsic::hexagon_F2_sffma_sc;	 // "__builtin_HEXAGON_F2_sffma_sc"
        }
        break;
      }
      break;
    case 'M':	 // 29 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 18 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'c':	 // 10 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'm':	 // 8 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'a':	 // 4 strings to match.
              if (BuiltinName[24] != 'c')
                break;
              switch (BuiltinName[25]) {
              default: break;
              case 'i':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+26, "_s0", 3))
                  break;
                return Intrinsic::hexagon_M2_cmaci_s0;	 // "__builtin_HEXAGON_M2_cmaci_s0"
              case 'r':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+26, "_s0", 3))
                  break;
                return Intrinsic::hexagon_M2_cmacr_s0;	 // "__builtin_HEXAGON_M2_cmacr_s0"
              case 's':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+26, "_s", 2))
                  break;
                switch (BuiltinName[28]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_cmacs_s0;	 // "__builtin_HEXAGON_M2_cmacs_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_cmacs_s1;	 // "__builtin_HEXAGON_M2_cmacs_s1"
                }
                break;
              }
              break;
            case 'p':	 // 4 strings to match.
              if (BuiltinName[24] != 'y')
                break;
              switch (BuiltinName[25]) {
              default: break;
              case 'i':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+26, "_s0", 3))
                  break;
                return Intrinsic::hexagon_M2_cmpyi_s0;	 // "__builtin_HEXAGON_M2_cmpyi_s0"
              case 'r':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+26, "_s0", 3))
                  break;
                return Intrinsic::hexagon_M2_cmpyr_s0;	 // "__builtin_HEXAGON_M2_cmpyr_s0"
              case 's':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+26, "_s", 2))
                  break;
                switch (BuiltinName[28]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_cmpys_s0;	 // "__builtin_HEXAGON_M2_cmpys_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_cmpys_s1;	 // "__builtin_HEXAGON_M2_cmpys_s1"
                }
                break;
              }
              break;
            }
            break;
          case 'n':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+23, "acs_s", 5))
              break;
            switch (BuiltinName[28]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_cnacs_s0;	 // "__builtin_HEXAGON_M2_cnacs_s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_cnacs_s1;	 // "__builtin_HEXAGON_M2_cnacs_s1"
            }
            break;
          }
          break;
        case 'm':	 // 5 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'm':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+23, "py", 2))
              break;
            switch (BuiltinName[25]) {
            default: break;
            case 'h':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+26, "_s", 2))
                break;
              switch (BuiltinName[28]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mmpyh_s0;	 // "__builtin_HEXAGON_M2_mmpyh_s0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mmpyh_s1;	 // "__builtin_HEXAGON_M2_mmpyh_s1"
              }
              break;
            case 'l':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+26, "_s", 2))
                break;
              switch (BuiltinName[28]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mmpyl_s0;	 // "__builtin_HEXAGON_M2_mmpyl_s0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mmpyl_s1;	 // "__builtin_HEXAGON_M2_mmpyl_s1"
              }
              break;
            }
            break;
          case 'p':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "ysu_up", 6))
              break;
            return Intrinsic::hexagon_M2_mpysu_up;	 // "__builtin_HEXAGON_M2_mpysu_up"
          }
          break;
        case 'v':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "rm", 2))
            break;
          switch (BuiltinName[24]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "c_s0", 4))
              break;
            return Intrinsic::hexagon_M2_vrmac_s0;	 // "__builtin_HEXAGON_M2_vrmac_s0"
          case 'p':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "y_s0", 4))
              break;
            return Intrinsic::hexagon_M2_vrmpy_s0;	 // "__builtin_HEXAGON_M2_vrmpy_s0"
          }
          break;
        case 'x':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "or_xacc", 7))
            break;
          return Intrinsic::hexagon_M2_xor_xacc;	 // "__builtin_HEXAGON_M2_xor_xacc"
        }
        break;
      case '4':	 // 5 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "nd_andn", 7))
            break;
          return Intrinsic::hexagon_M4_and_andn;	 // "__builtin_HEXAGON_M4_and_andn"
        case 'c':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "mpy", 3))
            break;
          switch (BuiltinName[25]) {
          default: break;
          case 'i':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "_wh", 3))
              break;
            return Intrinsic::hexagon_M4_cmpyi_wh;	 // "__builtin_HEXAGON_M4_cmpyi_wh"
          case 'r':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "_wh", 3))
              break;
            return Intrinsic::hexagon_M4_cmpyr_wh;	 // "__builtin_HEXAGON_M4_cmpyr_wh"
          }
          break;
        case 'x':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "or_", 3))
            break;
          switch (BuiltinName[25]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "ndn", 3))
              break;
            return Intrinsic::hexagon_M4_xor_andn;	 // "__builtin_HEXAGON_M4_xor_andn"
          case 'x':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "acc", 3))
              break;
            return Intrinsic::hexagon_M4_xor_xacc;	 // "__builtin_HEXAGON_M4_xor_xacc"
          }
          break;
        }
        break;
      case '5':	 // 6 strings to match.
        if (memcmp(BuiltinName.data()+20, "_v", 2))
          break;
        switch (BuiltinName[22]) {
        default: break;
        case 'd':	 // 2 strings to match.
          if (BuiltinName[23] != 'm')
            break;
          switch (BuiltinName[24]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "cbsu", 4))
              break;
            return Intrinsic::hexagon_M5_vdmacbsu;	 // "__builtin_HEXAGON_M5_vdmacbsu"
          case 'p':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "ybsu", 4))
              break;
            return Intrinsic::hexagon_M5_vdmpybsu;	 // "__builtin_HEXAGON_M5_vdmpybsu"
          }
          break;
        case 'r':	 // 4 strings to match.
          if (BuiltinName[23] != 'm')
            break;
          switch (BuiltinName[24]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+25, "cb", 2))
              break;
            switch (BuiltinName[27]) {
            default: break;
            case 's':	 // 1 string to match.
              if (BuiltinName[28] != 'u')
                break;
              return Intrinsic::hexagon_M5_vrmacbsu;	 // "__builtin_HEXAGON_M5_vrmacbsu"
            case 'u':	 // 1 string to match.
              if (BuiltinName[28] != 'u')
                break;
              return Intrinsic::hexagon_M5_vrmacbuu;	 // "__builtin_HEXAGON_M5_vrmacbuu"
            }
            break;
          case 'p':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+25, "yb", 2))
              break;
            switch (BuiltinName[27]) {
            default: break;
            case 's':	 // 1 string to match.
              if (BuiltinName[28] != 'u')
                break;
              return Intrinsic::hexagon_M5_vrmpybsu;	 // "__builtin_HEXAGON_M5_vrmpybsu"
            case 'u':	 // 1 string to match.
              if (BuiltinName[28] != 'u')
                break;
              return Intrinsic::hexagon_M5_vrmpybuu;	 // "__builtin_HEXAGON_M5_vrmpybuu"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 'S':	 // 35 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 31 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'a':	 // 8 strings to match.
          if (BuiltinName[22] != 's')
            break;
          switch (BuiltinName[23]) {
          default: break;
          case 'l':	 // 4 strings to match.
            if (BuiltinName[24] != '_')
              break;
            switch (BuiltinName[25]) {
            default: break;
            case 'i':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+26, "_v", 2))
                break;
              switch (BuiltinName[28]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_S2_asl_i_vh;	 // "__builtin_HEXAGON_S2_asl_i_vh"
              case 'w':	 // 1 string to match.
                return Intrinsic::hexagon_S2_asl_i_vw;	 // "__builtin_HEXAGON_S2_asl_i_vw"
              }
              break;
            case 'r':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+26, "_v", 2))
                break;
              switch (BuiltinName[28]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_S2_asl_r_vh;	 // "__builtin_HEXAGON_S2_asl_r_vh"
              case 'w':	 // 1 string to match.
                return Intrinsic::hexagon_S2_asl_r_vw;	 // "__builtin_HEXAGON_S2_asl_r_vw"
              }
              break;
            }
            break;
          case 'r':	 // 4 strings to match.
            if (BuiltinName[24] != '_')
              break;
            switch (BuiltinName[25]) {
            default: break;
            case 'i':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+26, "_v", 2))
                break;
              switch (BuiltinName[28]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_S2_asr_i_vh;	 // "__builtin_HEXAGON_S2_asr_i_vh"
              case 'w':	 // 1 string to match.
                return Intrinsic::hexagon_S2_asr_i_vw;	 // "__builtin_HEXAGON_S2_asr_i_vw"
              }
              break;
            case 'r':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+26, "_v", 2))
                break;
              switch (BuiltinName[28]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_S2_asr_r_vh;	 // "__builtin_HEXAGON_S2_asr_r_vh"
              case 'w':	 // 1 string to match.
                return Intrinsic::hexagon_S2_asr_r_vw;	 // "__builtin_HEXAGON_S2_asr_r_vw"
              }
              break;
            }
            break;
          }
          break;
        case 'c':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "lrbit_", 6))
            break;
          switch (BuiltinName[28]) {
          default: break;
          case 'i':	 // 1 string to match.
            return Intrinsic::hexagon_S2_clrbit_i;	 // "__builtin_HEXAGON_S2_clrbit_i"
          case 'r':	 // 1 string to match.
            return Intrinsic::hexagon_S2_clrbit_r;	 // "__builtin_HEXAGON_S2_clrbit_r"
          }
          break;
        case 'e':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "xtractu", 7))
            break;
          return Intrinsic::hexagon_S2_extractu;	 // "__builtin_HEXAGON_S2_extractu"
        case 'l':	 // 6 strings to match.
          if (BuiltinName[22] != 's')
            break;
          switch (BuiltinName[23]) {
          default: break;
          case 'l':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+24, "_r_v", 4))
              break;
            switch (BuiltinName[28]) {
            default: break;
            case 'h':	 // 1 string to match.
              return Intrinsic::hexagon_S2_lsl_r_vh;	 // "__builtin_HEXAGON_S2_lsl_r_vh"
            case 'w':	 // 1 string to match.
              return Intrinsic::hexagon_S2_lsl_r_vw;	 // "__builtin_HEXAGON_S2_lsl_r_vw"
            }
            break;
          case 'r':	 // 4 strings to match.
            if (BuiltinName[24] != '_')
              break;
            switch (BuiltinName[25]) {
            default: break;
            case 'i':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+26, "_v", 2))
                break;
              switch (BuiltinName[28]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_S2_lsr_i_vh;	 // "__builtin_HEXAGON_S2_lsr_i_vh"
              case 'w':	 // 1 string to match.
                return Intrinsic::hexagon_S2_lsr_i_vw;	 // "__builtin_HEXAGON_S2_lsr_i_vw"
              }
              break;
            case 'r':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+26, "_v", 2))
                break;
              switch (BuiltinName[28]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_S2_lsr_r_vh;	 // "__builtin_HEXAGON_S2_lsr_r_vh"
              case 'w':	 // 1 string to match.
                return Intrinsic::hexagon_S2_lsr_r_vw;	 // "__builtin_HEXAGON_S2_lsr_r_vw"
              }
              break;
            }
            break;
          }
          break;
        case 's':	 // 3 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'e':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+23, "tbit_", 5))
              break;
            switch (BuiltinName[28]) {
            default: break;
            case 'i':	 // 1 string to match.
              return Intrinsic::hexagon_S2_setbit_i;	 // "__builtin_HEXAGON_S2_setbit_i"
            case 'r':	 // 1 string to match.
              return Intrinsic::hexagon_S2_setbit_r;	 // "__builtin_HEXAGON_S2_setbit_r"
            }
            break;
          case 'v':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "sathub", 6))
              break;
            return Intrinsic::hexagon_S2_svsathub;	 // "__builtin_HEXAGON_S2_svsathub"
          }
          break;
        case 't':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "stbit_", 6))
            break;
          switch (BuiltinName[28]) {
          default: break;
          case 'i':	 // 1 string to match.
            return Intrinsic::hexagon_S2_tstbit_i;	 // "__builtin_HEXAGON_S2_tstbit_i"
          case 'r':	 // 1 string to match.
            return Intrinsic::hexagon_S2_tstbit_r;	 // "__builtin_HEXAGON_S2_tstbit_r"
          }
          break;
        case 'v':	 // 9 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+23, "lign", 4))
              break;
            switch (BuiltinName[27]) {
            default: break;
            case 'i':	 // 1 string to match.
              if (BuiltinName[28] != 'b')
                break;
              return Intrinsic::hexagon_S2_valignib;	 // "__builtin_HEXAGON_S2_valignib"
            case 'r':	 // 1 string to match.
              if (BuiltinName[28] != 'b')
                break;
              return Intrinsic::hexagon_S2_valignrb;	 // "__builtin_HEXAGON_S2_valignrb"
            }
            break;
          case 'c':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "rotate", 6))
              break;
            return Intrinsic::hexagon_S2_vcrotate;	 // "__builtin_HEXAGON_S2_vcrotate"
          case 's':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+23, "platr", 5))
              break;
            switch (BuiltinName[28]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::hexagon_S2_vsplatrb;	 // "__builtin_HEXAGON_S2_vsplatrb"
            case 'h':	 // 1 string to match.
              return Intrinsic::hexagon_S2_vsplatrh;	 // "__builtin_HEXAGON_S2_vsplatrh"
            }
            break;
          case 't':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+23, "run", 3))
              break;
            switch (BuiltinName[26]) {
            default: break;
            case 'e':	 // 2 strings to match.
              switch (BuiltinName[27]) {
              default: break;
              case 'h':	 // 1 string to match.
                if (BuiltinName[28] != 'b')
                  break;
                return Intrinsic::hexagon_S2_vtrunehb;	 // "__builtin_HEXAGON_S2_vtrunehb"
              case 'w':	 // 1 string to match.
                if (BuiltinName[28] != 'h')
                  break;
                return Intrinsic::hexagon_S2_vtrunewh;	 // "__builtin_HEXAGON_S2_vtrunewh"
              }
              break;
            case 'o':	 // 2 strings to match.
              switch (BuiltinName[27]) {
              default: break;
              case 'h':	 // 1 string to match.
                if (BuiltinName[28] != 'b')
                  break;
                return Intrinsic::hexagon_S2_vtrunohb;	 // "__builtin_HEXAGON_S2_vtrunohb"
              case 'w':	 // 1 string to match.
                if (BuiltinName[28] != 'h')
                  break;
                return Intrinsic::hexagon_S2_vtrunowh;	 // "__builtin_HEXAGON_S2_vtrunowh"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case '4':	 // 4 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'c':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "lbp", 3))
            break;
          switch (BuiltinName[25]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "ddi", 3))
              break;
            return Intrinsic::hexagon_S4_clbpaddi;	 // "__builtin_HEXAGON_S4_clbpaddi"
          case 'n':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "orm", 3))
              break;
            return Intrinsic::hexagon_S4_clbpnorm;	 // "__builtin_HEXAGON_S4_clbpnorm"
          }
          break;
        case 'e':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "xtractp", 7))
            break;
          return Intrinsic::hexagon_S4_extractp;	 // "__builtin_HEXAGON_S4_extractp"
        case 'o':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "r_andix", 7))
            break;
          return Intrinsic::hexagon_S4_or_andix;	 // "__builtin_HEXAGON_S4_or_andix"
        }
        break;
      }
      break;
    }
    break;
  case 30:	 // 81 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_HEXAGON_", 18))
      break;
    switch (BuiltinName[18]) {
    default: break;
    case 'A':	 // 11 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 3 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'c':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "ombineii", 8))
            break;
          return Intrinsic::hexagon_A2_combineii;	 // "__builtin_HEXAGON_A2_combineii"
        case 'v':	 // 2 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "ddb_map", 7))
              break;
            return Intrinsic::hexagon_A2_vaddb_map;	 // "__builtin_HEXAGON_A2_vaddb_map"
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "ubb_map", 7))
              break;
            return Intrinsic::hexagon_A2_vsubb_map;	 // "__builtin_HEXAGON_A2_vsubb_map"
          }
          break;
        }
        break;
      case '4':	 // 8 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'b':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "itspliti", 8))
            break;
          return Intrinsic::hexagon_A4_bitspliti;	 // "__builtin_HEXAGON_A4_bitspliti"
        case 'c':	 // 4 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'o':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+23, "mbine", 5))
              break;
            switch (BuiltinName[28]) {
            default: break;
            case 'i':	 // 1 string to match.
              if (BuiltinName[29] != 'r')
                break;
              return Intrinsic::hexagon_A4_combineir;	 // "__builtin_HEXAGON_A4_combineir"
            case 'r':	 // 1 string to match.
              if (BuiltinName[29] != 'i')
                break;
              return Intrinsic::hexagon_A4_combineri;	 // "__builtin_HEXAGON_A4_combineri"
            }
            break;
          case 'r':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+23, "ound_r", 6))
              break;
            switch (BuiltinName[29]) {
            default: break;
            case 'i':	 // 1 string to match.
              return Intrinsic::hexagon_A4_cround_ri;	 // "__builtin_HEXAGON_A4_cround_ri"
            case 'r':	 // 1 string to match.
              return Intrinsic::hexagon_A4_cround_rr;	 // "__builtin_HEXAGON_A4_cround_rr"
            }
            break;
          }
          break;
        case 'v':	 // 3 strings to match.
          if (memcmp(BuiltinName.data()+22, "cmp", 3))
            break;
          switch (BuiltinName[25]) {
          default: break;
          case 'b':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "gtui", 4))
              break;
            return Intrinsic::hexagon_A4_vcmpbgtui;	 // "__builtin_HEXAGON_A4_vcmpbgtui"
          case 'h':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "gtui", 4))
              break;
            return Intrinsic::hexagon_A4_vcmphgtui;	 // "__builtin_HEXAGON_A4_vcmphgtui"
          case 'w':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "gtui", 4))
              break;
            return Intrinsic::hexagon_A4_vcmpwgtui;	 // "__builtin_HEXAGON_A4_vcmpwgtui"
          }
          break;
        }
        break;
      }
      break;
    case 'C':	 // 2 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+20, "_pxfer_map", 10))
          break;
        return Intrinsic::hexagon_C2_pxfer_map;	 // "__builtin_HEXAGON_C2_pxfer_map"
      case '4':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+20, "_nbitsclri", 10))
          break;
        return Intrinsic::hexagon_C4_nbitsclri;	 // "__builtin_HEXAGON_C4_nbitsclri"
      }
      break;
    case 'F':	 // 12 strings to match.
      if (memcmp(BuiltinName.data()+19, "2_", 2))
        break;
      switch (BuiltinName[21]) {
      default: break;
      case 'c':	 // 8 strings to match.
        if (memcmp(BuiltinName.data()+22, "onv_", 4))
          break;
        switch (BuiltinName[26]) {
        default: break;
        case 'd':	 // 4 strings to match.
          switch (BuiltinName[27]) {
          default: break;
          case '2':	 // 2 strings to match.
            switch (BuiltinName[28]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (BuiltinName[29] != 'f')
                break;
              return Intrinsic::hexagon_F2_conv_d2df;	 // "__builtin_HEXAGON_F2_conv_d2df"
            case 's':	 // 1 string to match.
              if (BuiltinName[29] != 'f')
                break;
              return Intrinsic::hexagon_F2_conv_d2sf;	 // "__builtin_HEXAGON_F2_conv_d2sf"
            }
            break;
          case 'f':	 // 2 strings to match.
            if (BuiltinName[28] != '2')
              break;
            switch (BuiltinName[29]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::hexagon_F2_conv_df2d;	 // "__builtin_HEXAGON_F2_conv_df2d"
            case 'w':	 // 1 string to match.
              return Intrinsic::hexagon_F2_conv_df2w;	 // "__builtin_HEXAGON_F2_conv_df2w"
            }
            break;
          }
          break;
        case 's':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+27, "f2", 2))
            break;
          switch (BuiltinName[29]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::hexagon_F2_conv_sf2d;	 // "__builtin_HEXAGON_F2_conv_sf2d"
          case 'w':	 // 1 string to match.
            return Intrinsic::hexagon_F2_conv_sf2w;	 // "__builtin_HEXAGON_F2_conv_sf2w"
          }
          break;
        case 'w':	 // 2 strings to match.
          if (BuiltinName[27] != '2')
            break;
          switch (BuiltinName[28]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (BuiltinName[29] != 'f')
              break;
            return Intrinsic::hexagon_F2_conv_w2df;	 // "__builtin_HEXAGON_F2_conv_w2df"
          case 's':	 // 1 string to match.
            if (BuiltinName[29] != 'f')
              break;
            return Intrinsic::hexagon_F2_conv_w2sf;	 // "__builtin_HEXAGON_F2_conv_w2sf"
          }
          break;
        }
        break;
      case 'd':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+22, "ffm", 3))
          break;
        switch (BuiltinName[25]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+26, "_lib", 4))
            break;
          return Intrinsic::hexagon_F2_dffma_lib;	 // "__builtin_HEXAGON_F2_dffma_lib"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+26, "_lib", 4))
            break;
          return Intrinsic::hexagon_F2_dffms_lib;	 // "__builtin_HEXAGON_F2_dffms_lib"
        }
        break;
      case 's':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+22, "ffm", 3))
          break;
        switch (BuiltinName[25]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+26, "_lib", 4))
            break;
          return Intrinsic::hexagon_F2_sffma_lib;	 // "__builtin_HEXAGON_F2_sffma_lib"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+26, "_lib", 4))
            break;
          return Intrinsic::hexagon_F2_sffms_lib;	 // "__builtin_HEXAGON_F2_sffms_lib"
        }
        break;
      }
      break;
    case 'M':	 // 44 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 41 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'c':	 // 8 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'm':	 // 6 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+24, "csc_s", 5))
                break;
              switch (BuiltinName[29]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M2_cmacsc_s0;	 // "__builtin_HEXAGON_M2_cmacsc_s0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M2_cmacsc_s1;	 // "__builtin_HEXAGON_M2_cmacsc_s1"
              }
              break;
            case 'p':	 // 4 strings to match.
              if (BuiltinName[24] != 'y')
                break;
              switch (BuiltinName[25]) {
              default: break;
              case 'r':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+26, "s_s", 3))
                  break;
                switch (BuiltinName[29]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_cmpyrs_s0;	 // "__builtin_HEXAGON_M2_cmpyrs_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_cmpyrs_s1;	 // "__builtin_HEXAGON_M2_cmpyrs_s1"
                }
                break;
              case 's':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+26, "c_s", 3))
                  break;
                switch (BuiltinName[29]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_cmpysc_s0;	 // "__builtin_HEXAGON_M2_cmpysc_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_cmpysc_s1;	 // "__builtin_HEXAGON_M2_cmpysc_s1"
                }
                break;
              }
              break;
            }
            break;
          case 'n':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+23, "acsc_s", 6))
              break;
            switch (BuiltinName[29]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_cnacsc_s0;	 // "__builtin_HEXAGON_M2_cnacsc_s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_cnacsc_s1;	 // "__builtin_HEXAGON_M2_cnacsc_s1"
            }
            break;
          }
          break;
        case 'h':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "mmpy", 4))
            break;
          switch (BuiltinName[26]) {
          default: break;
          case 'h':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "_s1", 3))
              break;
            return Intrinsic::hexagon_M2_hmmpyh_s1;	 // "__builtin_HEXAGON_M2_hmmpyh_s1"
          case 'l':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "_s1", 3))
              break;
            return Intrinsic::hexagon_M2_hmmpyl_s1;	 // "__builtin_HEXAGON_M2_hmmpyl_s1"
          }
          break;
        case 'm':	 // 21 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'm':	 // 12 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'a':	 // 4 strings to match.
              if (BuiltinName[24] != 'c')
                break;
              switch (BuiltinName[25]) {
              default: break;
              case 'h':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+26, "s_s", 3))
                  break;
                switch (BuiltinName[29]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mmachs_s0;	 // "__builtin_HEXAGON_M2_mmachs_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mmachs_s1;	 // "__builtin_HEXAGON_M2_mmachs_s1"
                }
                break;
              case 'l':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+26, "s_s", 3))
                  break;
                switch (BuiltinName[29]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mmacls_s0;	 // "__builtin_HEXAGON_M2_mmacls_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mmacls_s1;	 // "__builtin_HEXAGON_M2_mmacls_s1"
                }
                break;
              }
              break;
            case 'p':	 // 8 strings to match.
              if (BuiltinName[24] != 'y')
                break;
              switch (BuiltinName[25]) {
              default: break;
              case 'h':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+26, "_rs", 3))
                  break;
                switch (BuiltinName[29]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mmpyh_rs0;	 // "__builtin_HEXAGON_M2_mmpyh_rs0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mmpyh_rs1;	 // "__builtin_HEXAGON_M2_mmpyh_rs1"
                }
                break;
              case 'l':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+26, "_rs", 3))
                  break;
                switch (BuiltinName[29]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mmpyl_rs0;	 // "__builtin_HEXAGON_M2_mmpyl_rs0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mmpyl_rs1;	 // "__builtin_HEXAGON_M2_mmpyl_rs1"
                }
                break;
              case 'u':	 // 4 strings to match.
                switch (BuiltinName[26]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+27, "_s", 2))
                    break;
                  switch (BuiltinName[29]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mmpyuh_s0;	 // "__builtin_HEXAGON_M2_mmpyuh_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mmpyuh_s1;	 // "__builtin_HEXAGON_M2_mmpyuh_s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+27, "_s", 2))
                    break;
                  switch (BuiltinName[29]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mmpyul_s0;	 // "__builtin_HEXAGON_M2_mmpyul_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mmpyul_s1;	 // "__builtin_HEXAGON_M2_mmpyul_s1"
                  }
                  break;
                }
                break;
              }
              break;
            }
            break;
          case 'p':	 // 9 strings to match.
            if (memcmp(BuiltinName.data()+23, "y_", 2))
              break;
            switch (BuiltinName[25]) {
            default: break;
            case 'h':	 // 4 strings to match.
              switch (BuiltinName[26]) {
              default: break;
              case 'h':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+27, "_s", 2))
                  break;
                switch (BuiltinName[29]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_hh_s0;	 // "__builtin_HEXAGON_M2_mpy_hh_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_hh_s1;	 // "__builtin_HEXAGON_M2_mpy_hh_s1"
                }
                break;
              case 'l':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+27, "_s", 2))
                  break;
                switch (BuiltinName[29]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_hl_s0;	 // "__builtin_HEXAGON_M2_mpy_hl_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_hl_s1;	 // "__builtin_HEXAGON_M2_mpy_hl_s1"
                }
                break;
              }
              break;
            case 'l':	 // 4 strings to match.
              switch (BuiltinName[26]) {
              default: break;
              case 'h':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+27, "_s", 2))
                  break;
                switch (BuiltinName[29]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_lh_s0;	 // "__builtin_HEXAGON_M2_mpy_lh_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_lh_s1;	 // "__builtin_HEXAGON_M2_mpy_lh_s1"
                }
                break;
              case 'l':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+27, "_s", 2))
                  break;
                switch (BuiltinName[29]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_ll_s0;	 // "__builtin_HEXAGON_M2_mpy_ll_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_ll_s1;	 // "__builtin_HEXAGON_M2_mpy_ll_s1"
                }
                break;
              }
              break;
            case 'u':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+26, "p_s1", 4))
                break;
              return Intrinsic::hexagon_M2_mpy_up_s1;	 // "__builtin_HEXAGON_M2_mpy_up_s1"
            }
            break;
          }
          break;
        case 'v':	 // 10 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+23, "bsdiff", 6))
              break;
            switch (BuiltinName[29]) {
            default: break;
            case 'h':	 // 1 string to match.
              return Intrinsic::hexagon_M2_vabsdiffh;	 // "__builtin_HEXAGON_M2_vabsdiffh"
            case 'w':	 // 1 string to match.
              return Intrinsic::hexagon_M2_vabsdiffw;	 // "__builtin_HEXAGON_M2_vabsdiffw"
            }
            break;
          case 'd':	 // 4 strings to match.
            if (BuiltinName[23] != 'm')
              break;
            switch (BuiltinName[24]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+25, "cs_s", 4))
                break;
              switch (BuiltinName[29]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M2_vdmacs_s0;	 // "__builtin_HEXAGON_M2_vdmacs_s0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M2_vdmacs_s1;	 // "__builtin_HEXAGON_M2_vdmacs_s1"
              }
              break;
            case 'p':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+25, "ys_s", 4))
                break;
              switch (BuiltinName[29]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M2_vdmpys_s0;	 // "__builtin_HEXAGON_M2_vdmpys_s0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M2_vdmpys_s1;	 // "__builtin_HEXAGON_M2_vdmpys_s1"
              }
              break;
            }
            break;
          case 'm':	 // 4 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+24, "c2s_s", 5))
                break;
              switch (BuiltinName[29]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M2_vmac2s_s0;	 // "__builtin_HEXAGON_M2_vmac2s_s0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M2_vmac2s_s1;	 // "__builtin_HEXAGON_M2_vmac2s_s1"
              }
              break;
            case 'p':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+24, "y2s_s", 5))
                break;
              switch (BuiltinName[29]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M2_vmpy2s_s0;	 // "__builtin_HEXAGON_M2_vmpy2s_s0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M2_vmpy2s_s1;	 // "__builtin_HEXAGON_M2_vmpy2s_s1"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case '4':	 // 3 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'c':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "mpy", 3))
            break;
          switch (BuiltinName[25]) {
          default: break;
          case 'i':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "_whc", 4))
              break;
            return Intrinsic::hexagon_M4_cmpyi_whc;	 // "__builtin_HEXAGON_M4_cmpyi_whc"
          case 'r':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "_whc", 4))
              break;
            return Intrinsic::hexagon_M4_cmpyr_whc;	 // "__builtin_HEXAGON_M4_cmpyr_whc"
          }
          break;
        case 'p':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "mpyw_acc", 8))
            break;
          return Intrinsic::hexagon_M4_pmpyw_acc;	 // "__builtin_HEXAGON_M4_pmpyw_acc"
        }
        break;
      }
      break;
    case 'S':	 // 12 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 4 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'e':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "xtractup", 8))
            break;
          return Intrinsic::hexagon_S2_extractup;	 // "__builtin_HEXAGON_S2_extractup"
        case 'i':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "nsert_rp", 8))
            break;
          return Intrinsic::hexagon_S2_insert_rp;	 // "__builtin_HEXAGON_S2_insert_rp"
        case 'v':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "splice", 6))
            break;
          switch (BuiltinName[28]) {
          default: break;
          case 'i':	 // 1 string to match.
            if (BuiltinName[29] != 'b')
              break;
            return Intrinsic::hexagon_S2_vspliceib;	 // "__builtin_HEXAGON_S2_vspliceib"
          case 'r':	 // 1 string to match.
            if (BuiltinName[29] != 'b')
              break;
            return Intrinsic::hexagon_S2_vsplicerb;	 // "__builtin_HEXAGON_S2_vsplicerb"
          }
          break;
        }
        break;
      case '4':	 // 7 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'n':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "tstbit_", 7))
            break;
          switch (BuiltinName[29]) {
          default: break;
          case 'i':	 // 1 string to match.
            return Intrinsic::hexagon_S4_ntstbit_i;	 // "__builtin_HEXAGON_S4_ntstbit_i"
          case 'r':	 // 1 string to match.
            return Intrinsic::hexagon_S4_ntstbit_r;	 // "__builtin_HEXAGON_S4_ntstbit_r"
          }
          break;
        case 'v':	 // 5 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'r':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "crotate", 7))
              break;
            return Intrinsic::hexagon_S4_vrcrotate;	 // "__builtin_HEXAGON_S4_vrcrotate"
          case 'x':	 // 4 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+24, "ddsub", 5))
                break;
              switch (BuiltinName[29]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_S4_vxaddsubh;	 // "__builtin_HEXAGON_S4_vxaddsubh"
              case 'w':	 // 1 string to match.
                return Intrinsic::hexagon_S4_vxaddsubw;	 // "__builtin_HEXAGON_S4_vxaddsubw"
              }
              break;
            case 's':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+24, "ubadd", 5))
                break;
              switch (BuiltinName[29]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_S4_vxsubaddh;	 // "__builtin_HEXAGON_S4_vxsubaddh"
              case 'w':	 // 1 string to match.
                return Intrinsic::hexagon_S4_vxsubaddw;	 // "__builtin_HEXAGON_S4_vxsubaddw"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case '5':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+20, "_popcountp", 10))
          break;
        return Intrinsic::hexagon_S5_popcountp;	 // "__builtin_HEXAGON_S5_popcountp"
      }
      break;
    }
    break;
  case 31:	 // 95 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_HEXAGON_", 18))
      break;
    switch (BuiltinName[18]) {
    default: break;
    case 'A':	 // 4 strings to match.
      if (memcmp(BuiltinName.data()+19, "2_combine_", 10))
        break;
      switch (BuiltinName[29]) {
      default: break;
      case 'h':	 // 2 strings to match.
        switch (BuiltinName[30]) {
        default: break;
        case 'h':	 // 1 string to match.
          return Intrinsic::hexagon_A2_combine_hh;	 // "__builtin_HEXAGON_A2_combine_hh"
        case 'l':	 // 1 string to match.
          return Intrinsic::hexagon_A2_combine_hl;	 // "__builtin_HEXAGON_A2_combine_hl"
        }
        break;
      case 'l':	 // 2 strings to match.
        switch (BuiltinName[30]) {
        default: break;
        case 'h':	 // 1 string to match.
          return Intrinsic::hexagon_A2_combine_lh;	 // "__builtin_HEXAGON_A2_combine_lh"
        case 'l':	 // 1 string to match.
          return Intrinsic::hexagon_A2_combine_ll;	 // "__builtin_HEXAGON_A2_combine_ll"
        }
        break;
      }
      break;
    case 'F':	 // 10 strings to match.
      if (memcmp(BuiltinName.data()+19, "2_conv_", 7))
        break;
      switch (BuiltinName[26]) {
      default: break;
      case 'd':	 // 3 strings to match.
        if (memcmp(BuiltinName.data()+27, "f2", 2))
          break;
        switch (BuiltinName[29]) {
        default: break;
        case 's':	 // 1 string to match.
          if (BuiltinName[30] != 'f')
            break;
          return Intrinsic::hexagon_F2_conv_df2sf;	 // "__builtin_HEXAGON_F2_conv_df2sf"
        case 'u':	 // 2 strings to match.
          switch (BuiltinName[30]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::hexagon_F2_conv_df2ud;	 // "__builtin_HEXAGON_F2_conv_df2ud"
          case 'w':	 // 1 string to match.
            return Intrinsic::hexagon_F2_conv_df2uw;	 // "__builtin_HEXAGON_F2_conv_df2uw"
          }
          break;
        }
        break;
      case 's':	 // 3 strings to match.
        if (memcmp(BuiltinName.data()+27, "f2", 2))
          break;
        switch (BuiltinName[29]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (BuiltinName[30] != 'f')
            break;
          return Intrinsic::hexagon_F2_conv_sf2df;	 // "__builtin_HEXAGON_F2_conv_sf2df"
        case 'u':	 // 2 strings to match.
          switch (BuiltinName[30]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::hexagon_F2_conv_sf2ud;	 // "__builtin_HEXAGON_F2_conv_sf2ud"
          case 'w':	 // 1 string to match.
            return Intrinsic::hexagon_F2_conv_sf2uw;	 // "__builtin_HEXAGON_F2_conv_sf2uw"
          }
          break;
        }
        break;
      case 'u':	 // 4 strings to match.
        switch (BuiltinName[27]) {
        default: break;
        case 'd':	 // 2 strings to match.
          if (BuiltinName[28] != '2')
            break;
          switch (BuiltinName[29]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (BuiltinName[30] != 'f')
              break;
            return Intrinsic::hexagon_F2_conv_ud2df;	 // "__builtin_HEXAGON_F2_conv_ud2df"
          case 's':	 // 1 string to match.
            if (BuiltinName[30] != 'f')
              break;
            return Intrinsic::hexagon_F2_conv_ud2sf;	 // "__builtin_HEXAGON_F2_conv_ud2sf"
          }
          break;
        case 'w':	 // 2 strings to match.
          if (BuiltinName[28] != '2')
            break;
          switch (BuiltinName[29]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (BuiltinName[30] != 'f')
              break;
            return Intrinsic::hexagon_F2_conv_uw2df;	 // "__builtin_HEXAGON_F2_conv_uw2df"
          case 's':	 // 1 string to match.
            if (BuiltinName[30] != 'f')
              break;
            return Intrinsic::hexagon_F2_conv_uw2sf;	 // "__builtin_HEXAGON_F2_conv_uw2sf"
          }
          break;
        }
        break;
      }
      break;
    case 'M':	 // 58 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 49 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'c':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "mpyrsc_s", 8))
            break;
          switch (BuiltinName[30]) {
          default: break;
          case '0':	 // 1 string to match.
            return Intrinsic::hexagon_M2_cmpyrsc_s0;	 // "__builtin_HEXAGON_M2_cmpyrsc_s0"
          case '1':	 // 1 string to match.
            return Intrinsic::hexagon_M2_cmpyrsc_s1;	 // "__builtin_HEXAGON_M2_cmpyrsc_s1"
          }
          break;
        case 'd':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "pmpy", 4))
            break;
          switch (BuiltinName[26]) {
          default: break;
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "s_s0", 4))
              break;
            return Intrinsic::hexagon_M2_dpmpyss_s0;	 // "__builtin_HEXAGON_M2_dpmpyss_s0"
          case 'u':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "u_s0", 4))
              break;
            return Intrinsic::hexagon_M2_dpmpyuu_s0;	 // "__builtin_HEXAGON_M2_dpmpyuu_s0"
          }
          break;
        case 'h':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "mmpy", 4))
            break;
          switch (BuiltinName[26]) {
          default: break;
          case 'h':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "_rs1", 4))
              break;
            return Intrinsic::hexagon_M2_hmmpyh_rs1;	 // "__builtin_HEXAGON_M2_hmmpyh_rs1"
          case 'l':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "_rs1", 4))
              break;
            return Intrinsic::hexagon_M2_hmmpyl_rs1;	 // "__builtin_HEXAGON_M2_hmmpyl_rs1"
          }
          break;
        case 'm':	 // 28 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'm':	 // 12 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'a':	 // 8 strings to match.
              if (BuiltinName[24] != 'c')
                break;
              switch (BuiltinName[25]) {
              default: break;
              case 'h':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+26, "s_rs", 4))
                  break;
                switch (BuiltinName[30]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mmachs_rs0;	 // "__builtin_HEXAGON_M2_mmachs_rs0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mmachs_rs1;	 // "__builtin_HEXAGON_M2_mmachs_rs1"
                }
                break;
              case 'l':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+26, "s_rs", 4))
                  break;
                switch (BuiltinName[30]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mmacls_rs0;	 // "__builtin_HEXAGON_M2_mmacls_rs0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mmacls_rs1;	 // "__builtin_HEXAGON_M2_mmacls_rs1"
                }
                break;
              case 'u':	 // 4 strings to match.
                switch (BuiltinName[26]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+27, "s_s", 3))
                    break;
                  switch (BuiltinName[30]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mmacuhs_s0;	 // "__builtin_HEXAGON_M2_mmacuhs_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mmacuhs_s1;	 // "__builtin_HEXAGON_M2_mmacuhs_s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+27, "s_s", 3))
                    break;
                  switch (BuiltinName[30]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mmaculs_s0;	 // "__builtin_HEXAGON_M2_mmaculs_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mmaculs_s1;	 // "__builtin_HEXAGON_M2_mmaculs_s1"
                  }
                  break;
                }
                break;
              }
              break;
            case 'p':	 // 4 strings to match.
              if (memcmp(BuiltinName.data()+24, "yu", 2))
                break;
              switch (BuiltinName[26]) {
              default: break;
              case 'h':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+27, "_rs", 3))
                  break;
                switch (BuiltinName[30]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mmpyuh_rs0;	 // "__builtin_HEXAGON_M2_mmpyuh_rs0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mmpyuh_rs1;	 // "__builtin_HEXAGON_M2_mmpyuh_rs1"
                }
                break;
              case 'l':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+27, "_rs", 3))
                  break;
                switch (BuiltinName[30]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mmpyul_rs0;	 // "__builtin_HEXAGON_M2_mmpyul_rs0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mmpyul_rs1;	 // "__builtin_HEXAGON_M2_mmpyul_rs1"
                }
                break;
              }
              break;
            }
            break;
          case 'p':	 // 16 strings to match.
            if (BuiltinName[23] != 'y')
              break;
            switch (BuiltinName[24]) {
            default: break;
            case 'd':	 // 8 strings to match.
              if (BuiltinName[25] != '_')
                break;
              switch (BuiltinName[26]) {
              default: break;
              case 'h':	 // 4 strings to match.
                switch (BuiltinName[27]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+28, "_s", 2))
                    break;
                  switch (BuiltinName[30]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_hh_s0;	 // "__builtin_HEXAGON_M2_mpyd_hh_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_hh_s1;	 // "__builtin_HEXAGON_M2_mpyd_hh_s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+28, "_s", 2))
                    break;
                  switch (BuiltinName[30]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_hl_s0;	 // "__builtin_HEXAGON_M2_mpyd_hl_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_hl_s1;	 // "__builtin_HEXAGON_M2_mpyd_hl_s1"
                  }
                  break;
                }
                break;
              case 'l':	 // 4 strings to match.
                switch (BuiltinName[27]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+28, "_s", 2))
                    break;
                  switch (BuiltinName[30]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_lh_s0;	 // "__builtin_HEXAGON_M2_mpyd_lh_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_lh_s1;	 // "__builtin_HEXAGON_M2_mpyd_lh_s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+28, "_s", 2))
                    break;
                  switch (BuiltinName[30]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_ll_s0;	 // "__builtin_HEXAGON_M2_mpyd_ll_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_ll_s1;	 // "__builtin_HEXAGON_M2_mpyd_ll_s1"
                  }
                  break;
                }
                break;
              }
              break;
            case 'u':	 // 8 strings to match.
              if (BuiltinName[25] != '_')
                break;
              switch (BuiltinName[26]) {
              default: break;
              case 'h':	 // 4 strings to match.
                switch (BuiltinName[27]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+28, "_s", 2))
                    break;
                  switch (BuiltinName[30]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyu_hh_s0;	 // "__builtin_HEXAGON_M2_mpyu_hh_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyu_hh_s1;	 // "__builtin_HEXAGON_M2_mpyu_hh_s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+28, "_s", 2))
                    break;
                  switch (BuiltinName[30]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyu_hl_s0;	 // "__builtin_HEXAGON_M2_mpyu_hl_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyu_hl_s1;	 // "__builtin_HEXAGON_M2_mpyu_hl_s1"
                  }
                  break;
                }
                break;
              case 'l':	 // 4 strings to match.
                switch (BuiltinName[27]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+28, "_s", 2))
                    break;
                  switch (BuiltinName[30]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyu_lh_s0;	 // "__builtin_HEXAGON_M2_mpyu_lh_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyu_lh_s1;	 // "__builtin_HEXAGON_M2_mpyu_lh_s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+28, "_s", 2))
                    break;
                  switch (BuiltinName[30]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyu_ll_s0;	 // "__builtin_HEXAGON_M2_mpyu_ll_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyu_ll_s1;	 // "__builtin_HEXAGON_M2_mpyu_ll_s1"
                  }
                  break;
                }
                break;
              }
              break;
            }
            break;
          }
          break;
        case 'v':	 // 15 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'd':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+23, "mpyrs_s", 7))
              break;
            switch (BuiltinName[30]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_vdmpyrs_s0;	 // "__builtin_HEXAGON_M2_vdmpyrs_s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_vdmpyrs_s1;	 // "__builtin_HEXAGON_M2_vdmpyrs_s1"
            }
            break;
          case 'm':	 // 8 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'a':	 // 4 strings to match.
              if (memcmp(BuiltinName.data()+24, "c2", 2))
                break;
              switch (BuiltinName[26]) {
              default: break;
              case 'e':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+27, "s_s", 3))
                  break;
                switch (BuiltinName[30]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_vmac2es_s0;	 // "__builtin_HEXAGON_M2_vmac2es_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_vmac2es_s1;	 // "__builtin_HEXAGON_M2_vmac2es_s1"
                }
                break;
              case 's':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+27, "u_s", 3))
                  break;
                switch (BuiltinName[30]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_vmac2su_s0;	 // "__builtin_HEXAGON_M2_vmac2su_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_vmac2su_s1;	 // "__builtin_HEXAGON_M2_vmac2su_s1"
                }
                break;
              }
              break;
            case 'p':	 // 4 strings to match.
              if (memcmp(BuiltinName.data()+24, "y2", 2))
                break;
              switch (BuiltinName[26]) {
              default: break;
              case 'e':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+27, "s_s", 3))
                  break;
                switch (BuiltinName[30]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_vmpy2es_s0;	 // "__builtin_HEXAGON_M2_vmpy2es_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_vmpy2es_s1;	 // "__builtin_HEXAGON_M2_vmpy2es_s1"
                }
                break;
              case 's':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+27, "u_s", 3))
                  break;
                switch (BuiltinName[30]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_vmpy2su_s0;	 // "__builtin_HEXAGON_M2_vmpy2su_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_vmpy2su_s1;	 // "__builtin_HEXAGON_M2_vmpy2su_s1"
                }
                break;
              }
              break;
            }
            break;
          case 'r':	 // 5 strings to match.
            if (memcmp(BuiltinName.data()+23, "cm", 2))
              break;
            switch (BuiltinName[25]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (BuiltinName[26] != 'c')
                break;
              switch (BuiltinName[27]) {
              default: break;
              case 'i':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+28, "_s0", 3))
                  break;
                return Intrinsic::hexagon_M2_vrcmaci_s0;	 // "__builtin_HEXAGON_M2_vrcmaci_s0"
              case 'r':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+28, "_s0", 3))
                  break;
                return Intrinsic::hexagon_M2_vrcmacr_s0;	 // "__builtin_HEXAGON_M2_vrcmacr_s0"
              }
              break;
            case 'p':	 // 3 strings to match.
              if (BuiltinName[26] != 'y')
                break;
              switch (BuiltinName[27]) {
              default: break;
              case 'i':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+28, "_s0", 3))
                  break;
                return Intrinsic::hexagon_M2_vrcmpyi_s0;	 // "__builtin_HEXAGON_M2_vrcmpyi_s0"
              case 'r':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+28, "_s0", 3))
                  break;
                return Intrinsic::hexagon_M2_vrcmpyr_s0;	 // "__builtin_HEXAGON_M2_vrcmpyr_s0"
              case 's':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+28, "_s1", 3))
                  break;
                return Intrinsic::hexagon_M2_vrcmpys_s1;	 // "__builtin_HEXAGON_M2_vrcmpys_s1"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case '4':	 // 9 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'm':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+22, "pyr", 3))
            break;
          switch (BuiltinName[25]) {
          default: break;
          case 'i':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+26, "_add", 4))
              break;
            switch (BuiltinName[30]) {
            default: break;
            case 'i':	 // 1 string to match.
              return Intrinsic::hexagon_M4_mpyri_addi;	 // "__builtin_HEXAGON_M4_mpyri_addi"
            case 'r':	 // 1 string to match.
              return Intrinsic::hexagon_M4_mpyri_addr;	 // "__builtin_HEXAGON_M4_mpyri_addr"
            }
            break;
          case 'r':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+26, "_add", 4))
              break;
            switch (BuiltinName[30]) {
            default: break;
            case 'i':	 // 1 string to match.
              return Intrinsic::hexagon_M4_mpyrr_addi;	 // "__builtin_HEXAGON_M4_mpyrr_addi"
            case 'r':	 // 1 string to match.
              return Intrinsic::hexagon_M4_mpyrr_addr;	 // "__builtin_HEXAGON_M4_mpyrr_addr"
            }
            break;
          }
          break;
        case 'v':	 // 5 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'p':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "mpyh_acc", 8))
              break;
            return Intrinsic::hexagon_M4_vpmpyh_acc;	 // "__builtin_HEXAGON_M4_vpmpyh_acc"
          case 'r':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+23, "mpy", 3))
              break;
            switch (BuiltinName[26]) {
            default: break;
            case 'e':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+27, "h_s", 3))
                break;
              switch (BuiltinName[30]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M4_vrmpyeh_s0;	 // "__builtin_HEXAGON_M4_vrmpyeh_s0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M4_vrmpyeh_s1;	 // "__builtin_HEXAGON_M4_vrmpyeh_s1"
              }
              break;
            case 'o':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+27, "h_s", 3))
                break;
              switch (BuiltinName[30]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M4_vrmpyoh_s0;	 // "__builtin_HEXAGON_M4_vrmpyoh_s0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M4_vrmpyoh_s1;	 // "__builtin_HEXAGON_M4_vrmpyoh_s1"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 'S':	 // 23 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 17 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'a':	 // 8 strings to match.
          if (BuiltinName[22] != 's')
            break;
          switch (BuiltinName[23]) {
          default: break;
          case 'l':	 // 4 strings to match.
            if (BuiltinName[24] != '_')
              break;
            switch (BuiltinName[25]) {
            default: break;
            case 'i':	 // 2 strings to match.
              if (BuiltinName[26] != '_')
                break;
              switch (BuiltinName[27]) {
              default: break;
              case 'p':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+28, "_or", 3))
                  break;
                return Intrinsic::hexagon_S2_asl_i_p_or;	 // "__builtin_HEXAGON_S2_asl_i_p_or"
              case 'r':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+28, "_or", 3))
                  break;
                return Intrinsic::hexagon_S2_asl_i_r_or;	 // "__builtin_HEXAGON_S2_asl_i_r_or"
              }
              break;
            case 'r':	 // 2 strings to match.
              if (BuiltinName[26] != '_')
                break;
              switch (BuiltinName[27]) {
              default: break;
              case 'p':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+28, "_or", 3))
                  break;
                return Intrinsic::hexagon_S2_asl_r_p_or;	 // "__builtin_HEXAGON_S2_asl_r_p_or"
              case 'r':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+28, "_or", 3))
                  break;
                return Intrinsic::hexagon_S2_asl_r_r_or;	 // "__builtin_HEXAGON_S2_asl_r_r_or"
              }
              break;
            }
            break;
          case 'r':	 // 4 strings to match.
            if (BuiltinName[24] != '_')
              break;
            switch (BuiltinName[25]) {
            default: break;
            case 'i':	 // 2 strings to match.
              if (BuiltinName[26] != '_')
                break;
              switch (BuiltinName[27]) {
              default: break;
              case 'p':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+28, "_or", 3))
                  break;
                return Intrinsic::hexagon_S2_asr_i_p_or;	 // "__builtin_HEXAGON_S2_asr_i_p_or"
              case 'r':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+28, "_or", 3))
                  break;
                return Intrinsic::hexagon_S2_asr_i_r_or;	 // "__builtin_HEXAGON_S2_asr_i_r_or"
              }
              break;
            case 'r':	 // 2 strings to match.
              if (BuiltinName[26] != '_')
                break;
              switch (BuiltinName[27]) {
              default: break;
              case 'p':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+28, "_or", 3))
                  break;
                return Intrinsic::hexagon_S2_asr_r_p_or;	 // "__builtin_HEXAGON_S2_asr_r_p_or"
              case 'r':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+28, "_or", 3))
                  break;
                return Intrinsic::hexagon_S2_asr_r_r_or;	 // "__builtin_HEXAGON_S2_asr_r_r_or"
              }
              break;
            }
            break;
          }
          break;
        case 'i':	 // 2 strings to match.
          if (BuiltinName[22] != 'n')
            break;
          switch (BuiltinName[23]) {
          default: break;
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "ertp_rp", 7))
              break;
            return Intrinsic::hexagon_S2_insertp_rp;	 // "__builtin_HEXAGON_S2_insertp_rp"
          case 't':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "erleave", 7))
              break;
            return Intrinsic::hexagon_S2_interleave;	 // "__builtin_HEXAGON_S2_interleave"
          }
          break;
        case 'l':	 // 6 strings to match.
          if (BuiltinName[22] != 's')
            break;
          switch (BuiltinName[23]) {
          default: break;
          case 'l':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+24, "_r_", 3))
              break;
            switch (BuiltinName[27]) {
            default: break;
            case 'p':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+28, "_or", 3))
                break;
              return Intrinsic::hexagon_S2_lsl_r_p_or;	 // "__builtin_HEXAGON_S2_lsl_r_p_or"
            case 'r':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+28, "_or", 3))
                break;
              return Intrinsic::hexagon_S2_lsl_r_r_or;	 // "__builtin_HEXAGON_S2_lsl_r_r_or"
            }
            break;
          case 'r':	 // 4 strings to match.
            if (BuiltinName[24] != '_')
              break;
            switch (BuiltinName[25]) {
            default: break;
            case 'i':	 // 2 strings to match.
              if (BuiltinName[26] != '_')
                break;
              switch (BuiltinName[27]) {
              default: break;
              case 'p':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+28, "_or", 3))
                  break;
                return Intrinsic::hexagon_S2_lsr_i_p_or;	 // "__builtin_HEXAGON_S2_lsr_i_p_or"
              case 'r':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+28, "_or", 3))
                  break;
                return Intrinsic::hexagon_S2_lsr_i_r_or;	 // "__builtin_HEXAGON_S2_lsr_i_r_or"
              }
              break;
            case 'r':	 // 2 strings to match.
              if (BuiltinName[26] != '_')
                break;
              switch (BuiltinName[27]) {
              default: break;
              case 'p':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+28, "_or", 3))
                  break;
                return Intrinsic::hexagon_S2_lsr_r_p_or;	 // "__builtin_HEXAGON_S2_lsr_r_p_or"
              case 'r':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+28, "_or", 3))
                  break;
                return Intrinsic::hexagon_S2_lsr_r_r_or;	 // "__builtin_HEXAGON_S2_lsr_r_r_or"
              }
              break;
            }
            break;
          }
          break;
        case 'v':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "rndpackwh", 9))
            break;
          return Intrinsic::hexagon_S2_vrndpackwh;	 // "__builtin_HEXAGON_S2_vrndpackwh"
        }
        break;
      case '4':	 // 5 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'e':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "xtract_rp", 9))
            break;
          return Intrinsic::hexagon_S4_extract_rp;	 // "__builtin_HEXAGON_S4_extract_rp"
        case 'o':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "ri_", 3))
            break;
          switch (BuiltinName[25]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "sl_ri", 5))
              break;
            return Intrinsic::hexagon_S4_ori_asl_ri;	 // "__builtin_HEXAGON_S4_ori_asl_ri"
          case 'l':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "sr_ri", 5))
              break;
            return Intrinsic::hexagon_S4_ori_lsr_ri;	 // "__builtin_HEXAGON_S4_ori_lsr_ri"
          }
          break;
        case 'v':	 // 2 strings to match.
          if (BuiltinName[22] != 'x')
            break;
          switch (BuiltinName[23]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "ddsubhr", 7))
              break;
            return Intrinsic::hexagon_S4_vxaddsubhr;	 // "__builtin_HEXAGON_S4_vxaddsubhr"
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "ubaddhr", 7))
              break;
            return Intrinsic::hexagon_S4_vxsubaddhr;	 // "__builtin_HEXAGON_S4_vxsubaddhr"
          }
          break;
        }
        break;
      case '5':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+20, "_asrhub_sat", 11))
          break;
        return Intrinsic::hexagon_S5_asrhub_sat;	 // "__builtin_HEXAGON_S5_asrhub_sat"
      }
      break;
    }
    break;
  case 32:	 // 96 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_HEXAGON_", 18))
      break;
    switch (BuiltinName[18]) {
    default: break;
    case 'A':	 // 16 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 14 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'a':	 // 6 strings to match.
          if (memcmp(BuiltinName.data()+22, "ddh_", 4))
            break;
          switch (BuiltinName[26]) {
          default: break;
          case 'h':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+27, "16_", 3))
              break;
            switch (BuiltinName[30]) {
            default: break;
            case 'h':	 // 2 strings to match.
              switch (BuiltinName[31]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_A2_addh_h16_hh;	 // "__builtin_HEXAGON_A2_addh_h16_hh"
              case 'l':	 // 1 string to match.
                return Intrinsic::hexagon_A2_addh_h16_hl;	 // "__builtin_HEXAGON_A2_addh_h16_hl"
              }
              break;
            case 'l':	 // 2 strings to match.
              switch (BuiltinName[31]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_A2_addh_h16_lh;	 // "__builtin_HEXAGON_A2_addh_h16_lh"
              case 'l':	 // 1 string to match.
                return Intrinsic::hexagon_A2_addh_h16_ll;	 // "__builtin_HEXAGON_A2_addh_h16_ll"
              }
              break;
            }
            break;
          case 'l':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+27, "16_", 3))
              break;
            switch (BuiltinName[30]) {
            default: break;
            case 'h':	 // 1 string to match.
              if (BuiltinName[31] != 'l')
                break;
              return Intrinsic::hexagon_A2_addh_l16_hl;	 // "__builtin_HEXAGON_A2_addh_l16_hl"
            case 'l':	 // 1 string to match.
              if (BuiltinName[31] != 'l')
                break;
              return Intrinsic::hexagon_A2_addh_l16_ll;	 // "__builtin_HEXAGON_A2_addh_l16_ll"
            }
            break;
          }
          break;
        case 's':	 // 6 strings to match.
          if (memcmp(BuiltinName.data()+22, "ubh_", 4))
            break;
          switch (BuiltinName[26]) {
          default: break;
          case 'h':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+27, "16_", 3))
              break;
            switch (BuiltinName[30]) {
            default: break;
            case 'h':	 // 2 strings to match.
              switch (BuiltinName[31]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_A2_subh_h16_hh;	 // "__builtin_HEXAGON_A2_subh_h16_hh"
              case 'l':	 // 1 string to match.
                return Intrinsic::hexagon_A2_subh_h16_hl;	 // "__builtin_HEXAGON_A2_subh_h16_hl"
              }
              break;
            case 'l':	 // 2 strings to match.
              switch (BuiltinName[31]) {
              default: break;
              case 'h':	 // 1 string to match.
                return Intrinsic::hexagon_A2_subh_h16_lh;	 // "__builtin_HEXAGON_A2_subh_h16_lh"
              case 'l':	 // 1 string to match.
                return Intrinsic::hexagon_A2_subh_h16_ll;	 // "__builtin_HEXAGON_A2_subh_h16_ll"
              }
              break;
            }
            break;
          case 'l':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+27, "16_", 3))
              break;
            switch (BuiltinName[30]) {
            default: break;
            case 'h':	 // 1 string to match.
              if (BuiltinName[31] != 'l')
                break;
              return Intrinsic::hexagon_A2_subh_l16_hl;	 // "__builtin_HEXAGON_A2_subh_l16_hl"
            case 'l':	 // 1 string to match.
              if (BuiltinName[31] != 'l')
                break;
              return Intrinsic::hexagon_A2_subh_l16_ll;	 // "__builtin_HEXAGON_A2_subh_l16_ll"
            }
            break;
          }
          break;
        case 'v':	 // 2 strings to match.
          if (BuiltinName[22] != 'r')
            break;
          switch (BuiltinName[23]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "ddub_acc", 8))
              break;
            return Intrinsic::hexagon_A2_vraddub_acc;	 // "__builtin_HEXAGON_A2_vraddub_acc"
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "adub_acc", 8))
              break;
            return Intrinsic::hexagon_A2_vrsadub_acc;	 // "__builtin_HEXAGON_A2_vrsadub_acc"
          }
          break;
        }
        break;
      case '4':	 // 2 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'b':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "oundscheck", 10))
            break;
          return Intrinsic::hexagon_A4_boundscheck;	 // "__builtin_HEXAGON_A4_boundscheck"
        case 'v':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "cmpbeq_any", 10))
            break;
          return Intrinsic::hexagon_A4_vcmpbeq_any;	 // "__builtin_HEXAGON_A4_vcmpbeq_any"
        }
        break;
      }
      break;
    case 'C':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+19, "4_fastcorner9", 13))
        break;
      return Intrinsic::hexagon_C4_fastcorner9;	 // "__builtin_HEXAGON_C4_fastcorner9"
    case 'M':	 // 16 strings to match.
      if (memcmp(BuiltinName.data()+19, "2_", 2))
        break;
      switch (BuiltinName[21]) {
      default: break;
      case 'm':	 // 12 strings to match.
        switch (BuiltinName[22]) {
        default: break;
        case 'm':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+23, "acu", 3))
            break;
          switch (BuiltinName[26]) {
          default: break;
          case 'h':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+27, "s_rs", 4))
              break;
            switch (BuiltinName[31]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mmacuhs_rs0;	 // "__builtin_HEXAGON_M2_mmacuhs_rs0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mmacuhs_rs1;	 // "__builtin_HEXAGON_M2_mmacuhs_rs1"
            }
            break;
          case 'l':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+27, "s_rs", 4))
              break;
            switch (BuiltinName[31]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mmaculs_rs0;	 // "__builtin_HEXAGON_M2_mmaculs_rs0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mmaculs_rs1;	 // "__builtin_HEXAGON_M2_mmaculs_rs1"
            }
            break;
          }
          break;
        case 'p':	 // 8 strings to match.
          if (memcmp(BuiltinName.data()+23, "yud_", 4))
            break;
          switch (BuiltinName[27]) {
          default: break;
          case 'h':	 // 4 strings to match.
            switch (BuiltinName[28]) {
            default: break;
            case 'h':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+29, "_s", 2))
                break;
              switch (BuiltinName[31]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mpyud_hh_s0;	 // "__builtin_HEXAGON_M2_mpyud_hh_s0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mpyud_hh_s1;	 // "__builtin_HEXAGON_M2_mpyud_hh_s1"
              }
              break;
            case 'l':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+29, "_s", 2))
                break;
              switch (BuiltinName[31]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mpyud_hl_s0;	 // "__builtin_HEXAGON_M2_mpyud_hl_s0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mpyud_hl_s1;	 // "__builtin_HEXAGON_M2_mpyud_hl_s1"
              }
              break;
            }
            break;
          case 'l':	 // 4 strings to match.
            switch (BuiltinName[28]) {
            default: break;
            case 'h':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+29, "_s", 2))
                break;
              switch (BuiltinName[31]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mpyud_lh_s0;	 // "__builtin_HEXAGON_M2_mpyud_lh_s0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mpyud_lh_s1;	 // "__builtin_HEXAGON_M2_mpyud_lh_s1"
              }
              break;
            case 'l':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+29, "_s", 2))
                break;
              switch (BuiltinName[31]) {
              default: break;
              case '0':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mpyud_ll_s0;	 // "__builtin_HEXAGON_M2_mpyud_ll_s0"
              case '1':	 // 1 string to match.
                return Intrinsic::hexagon_M2_mpyud_ll_s1;	 // "__builtin_HEXAGON_M2_mpyud_ll_s1"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 'v':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+22, "rcm", 3))
          break;
        switch (BuiltinName[25]) {
        default: break;
        case 'a':	 // 2 strings to match.
          if (BuiltinName[26] != 'c')
            break;
          switch (BuiltinName[27]) {
          default: break;
          case 'i':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+28, "_s0c", 4))
              break;
            return Intrinsic::hexagon_M2_vrcmaci_s0c;	 // "__builtin_HEXAGON_M2_vrcmaci_s0c"
          case 'r':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+28, "_s0c", 4))
              break;
            return Intrinsic::hexagon_M2_vrcmacr_s0c;	 // "__builtin_HEXAGON_M2_vrcmacr_s0c"
          }
          break;
        case 'p':	 // 2 strings to match.
          if (BuiltinName[26] != 'y')
            break;
          switch (BuiltinName[27]) {
          default: break;
          case 'i':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+28, "_s0c", 4))
              break;
            return Intrinsic::hexagon_M2_vrcmpyi_s0c;	 // "__builtin_HEXAGON_M2_vrcmpyi_s0c"
          case 'r':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+28, "_s0c", 4))
              break;
            return Intrinsic::hexagon_M2_vrcmpyr_s0c;	 // "__builtin_HEXAGON_M2_vrcmpyr_s0c"
          }
          break;
        }
        break;
      }
      break;
    case 'S':	 // 63 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 56 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'a':	 // 32 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "dasl_rrri", 9))
              break;
            return Intrinsic::hexagon_S2_addasl_rrri;	 // "__builtin_HEXAGON_S2_addasl_rrri"
          case 's':	 // 31 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'l':	 // 15 strings to match.
              if (BuiltinName[24] != '_')
                break;
              switch (BuiltinName[25]) {
              default: break;
              case 'i':	 // 7 strings to match.
                if (BuiltinName[26] != '_')
                  break;
                switch (BuiltinName[27]) {
                default: break;
                case 'p':	 // 3 strings to match.
                  if (BuiltinName[28] != '_')
                    break;
                  switch (BuiltinName[29]) {
                  default: break;
                  case 'a':	 // 2 strings to match.
                    switch (BuiltinName[30]) {
                    default: break;
                    case 'c':	 // 1 string to match.
                      if (BuiltinName[31] != 'c')
                        break;
                      return Intrinsic::hexagon_S2_asl_i_p_acc;	 // "__builtin_HEXAGON_S2_asl_i_p_acc"
                    case 'n':	 // 1 string to match.
                      if (BuiltinName[31] != 'd')
                        break;
                      return Intrinsic::hexagon_S2_asl_i_p_and;	 // "__builtin_HEXAGON_S2_asl_i_p_and"
                    }
                    break;
                  case 'n':	 // 1 string to match.
                    if (memcmp(BuiltinName.data()+30, "ac", 2))
                      break;
                    return Intrinsic::hexagon_S2_asl_i_p_nac;	 // "__builtin_HEXAGON_S2_asl_i_p_nac"
                  }
                  break;
                case 'r':	 // 4 strings to match.
                  if (BuiltinName[28] != '_')
                    break;
                  switch (BuiltinName[29]) {
                  default: break;
                  case 'a':	 // 2 strings to match.
                    switch (BuiltinName[30]) {
                    default: break;
                    case 'c':	 // 1 string to match.
                      if (BuiltinName[31] != 'c')
                        break;
                      return Intrinsic::hexagon_S2_asl_i_r_acc;	 // "__builtin_HEXAGON_S2_asl_i_r_acc"
                    case 'n':	 // 1 string to match.
                      if (BuiltinName[31] != 'd')
                        break;
                      return Intrinsic::hexagon_S2_asl_i_r_and;	 // "__builtin_HEXAGON_S2_asl_i_r_and"
                    }
                    break;
                  case 'n':	 // 1 string to match.
                    if (memcmp(BuiltinName.data()+30, "ac", 2))
                      break;
                    return Intrinsic::hexagon_S2_asl_i_r_nac;	 // "__builtin_HEXAGON_S2_asl_i_r_nac"
                  case 's':	 // 1 string to match.
                    if (memcmp(BuiltinName.data()+30, "at", 2))
                      break;
                    return Intrinsic::hexagon_S2_asl_i_r_sat;	 // "__builtin_HEXAGON_S2_asl_i_r_sat"
                  }
                  break;
                }
                break;
              case 'r':	 // 8 strings to match.
                if (BuiltinName[26] != '_')
                  break;
                switch (BuiltinName[27]) {
                default: break;
                case 'p':	 // 4 strings to match.
                  if (BuiltinName[28] != '_')
                    break;
                  switch (BuiltinName[29]) {
                  default: break;
                  case 'a':	 // 2 strings to match.
                    switch (BuiltinName[30]) {
                    default: break;
                    case 'c':	 // 1 string to match.
                      if (BuiltinName[31] != 'c')
                        break;
                      return Intrinsic::hexagon_S2_asl_r_p_acc;	 // "__builtin_HEXAGON_S2_asl_r_p_acc"
                    case 'n':	 // 1 string to match.
                      if (BuiltinName[31] != 'd')
                        break;
                      return Intrinsic::hexagon_S2_asl_r_p_and;	 // "__builtin_HEXAGON_S2_asl_r_p_and"
                    }
                    break;
                  case 'n':	 // 1 string to match.
                    if (memcmp(BuiltinName.data()+30, "ac", 2))
                      break;
                    return Intrinsic::hexagon_S2_asl_r_p_nac;	 // "__builtin_HEXAGON_S2_asl_r_p_nac"
                  case 'x':	 // 1 string to match.
                    if (memcmp(BuiltinName.data()+30, "or", 2))
                      break;
                    return Intrinsic::hexagon_S2_asl_r_p_xor;	 // "__builtin_HEXAGON_S2_asl_r_p_xor"
                  }
                  break;
                case 'r':	 // 4 strings to match.
                  if (BuiltinName[28] != '_')
                    break;
                  switch (BuiltinName[29]) {
                  default: break;
                  case 'a':	 // 2 strings to match.
                    switch (BuiltinName[30]) {
                    default: break;
                    case 'c':	 // 1 string to match.
                      if (BuiltinName[31] != 'c')
                        break;
                      return Intrinsic::hexagon_S2_asl_r_r_acc;	 // "__builtin_HEXAGON_S2_asl_r_r_acc"
                    case 'n':	 // 1 string to match.
                      if (BuiltinName[31] != 'd')
                        break;
                      return Intrinsic::hexagon_S2_asl_r_r_and;	 // "__builtin_HEXAGON_S2_asl_r_r_and"
                    }
                    break;
                  case 'n':	 // 1 string to match.
                    if (memcmp(BuiltinName.data()+30, "ac", 2))
                      break;
                    return Intrinsic::hexagon_S2_asl_r_r_nac;	 // "__builtin_HEXAGON_S2_asl_r_r_nac"
                  case 's':	 // 1 string to match.
                    if (memcmp(BuiltinName.data()+30, "at", 2))
                      break;
                    return Intrinsic::hexagon_S2_asl_r_r_sat;	 // "__builtin_HEXAGON_S2_asl_r_r_sat"
                  }
                  break;
                }
                break;
              }
              break;
            case 'r':	 // 16 strings to match.
              if (BuiltinName[24] != '_')
                break;
              switch (BuiltinName[25]) {
              default: break;
              case 'i':	 // 8 strings to match.
                if (BuiltinName[26] != '_')
                  break;
                switch (BuiltinName[27]) {
                default: break;
                case 'p':	 // 4 strings to match.
                  if (BuiltinName[28] != '_')
                    break;
                  switch (BuiltinName[29]) {
                  default: break;
                  case 'a':	 // 2 strings to match.
                    switch (BuiltinName[30]) {
                    default: break;
                    case 'c':	 // 1 string to match.
                      if (BuiltinName[31] != 'c')
                        break;
                      return Intrinsic::hexagon_S2_asr_i_p_acc;	 // "__builtin_HEXAGON_S2_asr_i_p_acc"
                    case 'n':	 // 1 string to match.
                      if (BuiltinName[31] != 'd')
                        break;
                      return Intrinsic::hexagon_S2_asr_i_p_and;	 // "__builtin_HEXAGON_S2_asr_i_p_and"
                    }
                    break;
                  case 'n':	 // 1 string to match.
                    if (memcmp(BuiltinName.data()+30, "ac", 2))
                      break;
                    return Intrinsic::hexagon_S2_asr_i_p_nac;	 // "__builtin_HEXAGON_S2_asr_i_p_nac"
                  case 'r':	 // 1 string to match.
                    if (memcmp(BuiltinName.data()+30, "nd", 2))
                      break;
                    return Intrinsic::hexagon_S2_asr_i_p_rnd;	 // "__builtin_HEXAGON_S2_asr_i_p_rnd"
                  }
                  break;
                case 'r':	 // 4 strings to match.
                  if (BuiltinName[28] != '_')
                    break;
                  switch (BuiltinName[29]) {
                  default: break;
                  case 'a':	 // 2 strings to match.
                    switch (BuiltinName[30]) {
                    default: break;
                    case 'c':	 // 1 string to match.
                      if (BuiltinName[31] != 'c')
                        break;
                      return Intrinsic::hexagon_S2_asr_i_r_acc;	 // "__builtin_HEXAGON_S2_asr_i_r_acc"
                    case 'n':	 // 1 string to match.
                      if (BuiltinName[31] != 'd')
                        break;
                      return Intrinsic::hexagon_S2_asr_i_r_and;	 // "__builtin_HEXAGON_S2_asr_i_r_and"
                    }
                    break;
                  case 'n':	 // 1 string to match.
                    if (memcmp(BuiltinName.data()+30, "ac", 2))
                      break;
                    return Intrinsic::hexagon_S2_asr_i_r_nac;	 // "__builtin_HEXAGON_S2_asr_i_r_nac"
                  case 'r':	 // 1 string to match.
                    if (memcmp(BuiltinName.data()+30, "nd", 2))
                      break;
                    return Intrinsic::hexagon_S2_asr_i_r_rnd;	 // "__builtin_HEXAGON_S2_asr_i_r_rnd"
                  }
                  break;
                }
                break;
              case 'r':	 // 8 strings to match.
                if (BuiltinName[26] != '_')
                  break;
                switch (BuiltinName[27]) {
                default: break;
                case 'p':	 // 4 strings to match.
                  if (BuiltinName[28] != '_')
                    break;
                  switch (BuiltinName[29]) {
                  default: break;
                  case 'a':	 // 2 strings to match.
                    switch (BuiltinName[30]) {
                    default: break;
                    case 'c':	 // 1 string to match.
                      if (BuiltinName[31] != 'c')
                        break;
                      return Intrinsic::hexagon_S2_asr_r_p_acc;	 // "__builtin_HEXAGON_S2_asr_r_p_acc"
                    case 'n':	 // 1 string to match.
                      if (BuiltinName[31] != 'd')
                        break;
                      return Intrinsic::hexagon_S2_asr_r_p_and;	 // "__builtin_HEXAGON_S2_asr_r_p_and"
                    }
                    break;
                  case 'n':	 // 1 string to match.
                    if (memcmp(BuiltinName.data()+30, "ac", 2))
                      break;
                    return Intrinsic::hexagon_S2_asr_r_p_nac;	 // "__builtin_HEXAGON_S2_asr_r_p_nac"
                  case 'x':	 // 1 string to match.
                    if (memcmp(BuiltinName.data()+30, "or", 2))
                      break;
                    return Intrinsic::hexagon_S2_asr_r_p_xor;	 // "__builtin_HEXAGON_S2_asr_r_p_xor"
                  }
                  break;
                case 'r':	 // 4 strings to match.
                  if (BuiltinName[28] != '_')
                    break;
                  switch (BuiltinName[29]) {
                  default: break;
                  case 'a':	 // 2 strings to match.
                    switch (BuiltinName[30]) {
                    default: break;
                    case 'c':	 // 1 string to match.
                      if (BuiltinName[31] != 'c')
                        break;
                      return Intrinsic::hexagon_S2_asr_r_r_acc;	 // "__builtin_HEXAGON_S2_asr_r_r_acc"
                    case 'n':	 // 1 string to match.
                      if (BuiltinName[31] != 'd')
                        break;
                      return Intrinsic::hexagon_S2_asr_r_r_and;	 // "__builtin_HEXAGON_S2_asr_r_r_and"
                    }
                    break;
                  case 'n':	 // 1 string to match.
                    if (memcmp(BuiltinName.data()+30, "ac", 2))
                      break;
                    return Intrinsic::hexagon_S2_asr_r_r_nac;	 // "__builtin_HEXAGON_S2_asr_r_r_nac"
                  case 's':	 // 1 string to match.
                    if (memcmp(BuiltinName.data()+30, "at", 2))
                      break;
                    return Intrinsic::hexagon_S2_asr_r_r_sat;	 // "__builtin_HEXAGON_S2_asr_r_r_sat"
                  }
                  break;
                }
                break;
              }
              break;
            }
            break;
          }
          break;
        case 'e':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "xtractu_rp", 10))
            break;
          return Intrinsic::hexagon_S2_extractu_rp;	 // "__builtin_HEXAGON_S2_extractu_rp"
        case 'l':	 // 20 strings to match.
          if (BuiltinName[22] != 's')
            break;
          switch (BuiltinName[23]) {
          default: break;
          case 'l':	 // 7 strings to match.
            if (memcmp(BuiltinName.data()+24, "_r_", 3))
              break;
            switch (BuiltinName[27]) {
            default: break;
            case 'p':	 // 4 strings to match.
              if (BuiltinName[28] != '_')
                break;
              switch (BuiltinName[29]) {
              default: break;
              case 'a':	 // 2 strings to match.
                switch (BuiltinName[30]) {
                default: break;
                case 'c':	 // 1 string to match.
                  if (BuiltinName[31] != 'c')
                    break;
                  return Intrinsic::hexagon_S2_lsl_r_p_acc;	 // "__builtin_HEXAGON_S2_lsl_r_p_acc"
                case 'n':	 // 1 string to match.
                  if (BuiltinName[31] != 'd')
                    break;
                  return Intrinsic::hexagon_S2_lsl_r_p_and;	 // "__builtin_HEXAGON_S2_lsl_r_p_and"
                }
                break;
              case 'n':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+30, "ac", 2))
                  break;
                return Intrinsic::hexagon_S2_lsl_r_p_nac;	 // "__builtin_HEXAGON_S2_lsl_r_p_nac"
              case 'x':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+30, "or", 2))
                  break;
                return Intrinsic::hexagon_S2_lsl_r_p_xor;	 // "__builtin_HEXAGON_S2_lsl_r_p_xor"
              }
              break;
            case 'r':	 // 3 strings to match.
              if (BuiltinName[28] != '_')
                break;
              switch (BuiltinName[29]) {
              default: break;
              case 'a':	 // 2 strings to match.
                switch (BuiltinName[30]) {
                default: break;
                case 'c':	 // 1 string to match.
                  if (BuiltinName[31] != 'c')
                    break;
                  return Intrinsic::hexagon_S2_lsl_r_r_acc;	 // "__builtin_HEXAGON_S2_lsl_r_r_acc"
                case 'n':	 // 1 string to match.
                  if (BuiltinName[31] != 'd')
                    break;
                  return Intrinsic::hexagon_S2_lsl_r_r_and;	 // "__builtin_HEXAGON_S2_lsl_r_r_and"
                }
                break;
              case 'n':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+30, "ac", 2))
                  break;
                return Intrinsic::hexagon_S2_lsl_r_r_nac;	 // "__builtin_HEXAGON_S2_lsl_r_r_nac"
              }
              break;
            }
            break;
          case 'r':	 // 13 strings to match.
            if (BuiltinName[24] != '_')
              break;
            switch (BuiltinName[25]) {
            default: break;
            case 'i':	 // 6 strings to match.
              if (BuiltinName[26] != '_')
                break;
              switch (BuiltinName[27]) {
              default: break;
              case 'p':	 // 3 strings to match.
                if (BuiltinName[28] != '_')
                  break;
                switch (BuiltinName[29]) {
                default: break;
                case 'a':	 // 2 strings to match.
                  switch (BuiltinName[30]) {
                  default: break;
                  case 'c':	 // 1 string to match.
                    if (BuiltinName[31] != 'c')
                      break;
                    return Intrinsic::hexagon_S2_lsr_i_p_acc;	 // "__builtin_HEXAGON_S2_lsr_i_p_acc"
                  case 'n':	 // 1 string to match.
                    if (BuiltinName[31] != 'd')
                      break;
                    return Intrinsic::hexagon_S2_lsr_i_p_and;	 // "__builtin_HEXAGON_S2_lsr_i_p_and"
                  }
                  break;
                case 'n':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+30, "ac", 2))
                    break;
                  return Intrinsic::hexagon_S2_lsr_i_p_nac;	 // "__builtin_HEXAGON_S2_lsr_i_p_nac"
                }
                break;
              case 'r':	 // 3 strings to match.
                if (BuiltinName[28] != '_')
                  break;
                switch (BuiltinName[29]) {
                default: break;
                case 'a':	 // 2 strings to match.
                  switch (BuiltinName[30]) {
                  default: break;
                  case 'c':	 // 1 string to match.
                    if (BuiltinName[31] != 'c')
                      break;
                    return Intrinsic::hexagon_S2_lsr_i_r_acc;	 // "__builtin_HEXAGON_S2_lsr_i_r_acc"
                  case 'n':	 // 1 string to match.
                    if (BuiltinName[31] != 'd')
                      break;
                    return Intrinsic::hexagon_S2_lsr_i_r_and;	 // "__builtin_HEXAGON_S2_lsr_i_r_and"
                  }
                  break;
                case 'n':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+30, "ac", 2))
                    break;
                  return Intrinsic::hexagon_S2_lsr_i_r_nac;	 // "__builtin_HEXAGON_S2_lsr_i_r_nac"
                }
                break;
              }
              break;
            case 'r':	 // 7 strings to match.
              if (BuiltinName[26] != '_')
                break;
              switch (BuiltinName[27]) {
              default: break;
              case 'p':	 // 4 strings to match.
                if (BuiltinName[28] != '_')
                  break;
                switch (BuiltinName[29]) {
                default: break;
                case 'a':	 // 2 strings to match.
                  switch (BuiltinName[30]) {
                  default: break;
                  case 'c':	 // 1 string to match.
                    if (BuiltinName[31] != 'c')
                      break;
                    return Intrinsic::hexagon_S2_lsr_r_p_acc;	 // "__builtin_HEXAGON_S2_lsr_r_p_acc"
                  case 'n':	 // 1 string to match.
                    if (BuiltinName[31] != 'd')
                      break;
                    return Intrinsic::hexagon_S2_lsr_r_p_and;	 // "__builtin_HEXAGON_S2_lsr_r_p_and"
                  }
                  break;
                case 'n':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+30, "ac", 2))
                    break;
                  return Intrinsic::hexagon_S2_lsr_r_p_nac;	 // "__builtin_HEXAGON_S2_lsr_r_p_nac"
                case 'x':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+30, "or", 2))
                    break;
                  return Intrinsic::hexagon_S2_lsr_r_p_xor;	 // "__builtin_HEXAGON_S2_lsr_r_p_xor"
                }
                break;
              case 'r':	 // 3 strings to match.
                if (BuiltinName[28] != '_')
                  break;
                switch (BuiltinName[29]) {
                default: break;
                case 'a':	 // 2 strings to match.
                  switch (BuiltinName[30]) {
                  default: break;
                  case 'c':	 // 1 string to match.
                    if (BuiltinName[31] != 'c')
                      break;
                    return Intrinsic::hexagon_S2_lsr_r_r_acc;	 // "__builtin_HEXAGON_S2_lsr_r_r_acc"
                  case 'n':	 // 1 string to match.
                    if (BuiltinName[31] != 'd')
                      break;
                    return Intrinsic::hexagon_S2_lsr_r_r_and;	 // "__builtin_HEXAGON_S2_lsr_r_r_and"
                  }
                  break;
                case 'n':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+30, "ac", 2))
                    break;
                  return Intrinsic::hexagon_S2_lsr_r_r_nac;	 // "__builtin_HEXAGON_S2_lsr_r_r_nac"
                }
                break;
              }
              break;
            }
            break;
          }
          break;
        case 't':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "ogglebit_", 9))
            break;
          switch (BuiltinName[31]) {
          default: break;
          case 'i':	 // 1 string to match.
            return Intrinsic::hexagon_S2_togglebit_i;	 // "__builtin_HEXAGON_S2_togglebit_i"
          case 'r':	 // 1 string to match.
            return Intrinsic::hexagon_S2_togglebit_r;	 // "__builtin_HEXAGON_S2_togglebit_r"
          }
          break;
        case 'v':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "rndpackwhs", 10))
            break;
          return Intrinsic::hexagon_S2_vrndpackwhs;	 // "__builtin_HEXAGON_S2_vrndpackwhs"
        }
        break;
      case '4':	 // 7 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'a':	 // 4 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'd':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+23, "di_", 3))
              break;
            switch (BuiltinName[26]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+27, "sl_ri", 5))
                break;
              return Intrinsic::hexagon_S4_addi_asl_ri;	 // "__builtin_HEXAGON_S4_addi_asl_ri"
            case 'l':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+27, "sr_ri", 5))
                break;
              return Intrinsic::hexagon_S4_addi_lsr_ri;	 // "__builtin_HEXAGON_S4_addi_lsr_ri"
            }
            break;
          case 'n':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+23, "di_", 3))
              break;
            switch (BuiltinName[26]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+27, "sl_ri", 5))
                break;
              return Intrinsic::hexagon_S4_andi_asl_ri;	 // "__builtin_HEXAGON_S4_andi_asl_ri"
            case 'l':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+27, "sr_ri", 5))
                break;
              return Intrinsic::hexagon_S4_andi_lsr_ri;	 // "__builtin_HEXAGON_S4_andi_lsr_ri"
            }
            break;
          }
          break;
        case 'e':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "xtractp_rp", 10))
            break;
          return Intrinsic::hexagon_S4_extractp_rp;	 // "__builtin_HEXAGON_S4_extractp_rp"
        case 's':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "ubi_", 4))
            break;
          switch (BuiltinName[26]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "sl_ri", 5))
              break;
            return Intrinsic::hexagon_S4_subi_asl_ri;	 // "__builtin_HEXAGON_S4_subi_asl_ri"
          case 'l':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "sr_ri", 5))
              break;
            return Intrinsic::hexagon_S4_subi_lsr_ri;	 // "__builtin_HEXAGON_S4_subi_lsr_ri"
          }
          break;
        }
        break;
      }
      break;
    }
    break;
  case 33:	 // 9 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_HEXAGON_", 18))
      break;
    switch (BuiltinName[18]) {
    default: break;
    case 'A':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+19, "4_round_r", 9))
        break;
      switch (BuiltinName[28]) {
      default: break;
      case 'i':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+29, "_sat", 4))
          break;
        return Intrinsic::hexagon_A4_round_ri_sat;	 // "__builtin_HEXAGON_A4_round_ri_sat"
      case 'r':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+29, "_sat", 4))
          break;
        return Intrinsic::hexagon_A4_round_rr_sat;	 // "__builtin_HEXAGON_A4_round_rr_sat"
      }
      break;
    case 'M':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+19, "2_vrcmpys_s1rp", 14))
        break;
      return Intrinsic::hexagon_M2_vrcmpys_s1rp;	 // "__builtin_HEXAGON_M2_vrcmpys_s1rp"
    case 'S':	 // 6 strings to match.
      if (memcmp(BuiltinName.data()+19, "2_", 2))
        break;
      switch (BuiltinName[21]) {
      default: break;
      case 'a':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+22, "sl_i_", 5))
          break;
        switch (BuiltinName[27]) {
        default: break;
        case 'p':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+28, "_xacc", 5))
            break;
          return Intrinsic::hexagon_S2_asl_i_p_xacc;	 // "__builtin_HEXAGON_S2_asl_i_p_xacc"
        case 'r':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+28, "_xacc", 5))
            break;
          return Intrinsic::hexagon_S2_asl_i_r_xacc;	 // "__builtin_HEXAGON_S2_asl_i_r_xacc"
        }
        break;
      case 'd':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+22, "einterleave", 11))
          break;
        return Intrinsic::hexagon_S2_deinterleave;	 // "__builtin_HEXAGON_S2_deinterleave"
      case 'e':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+22, "xtractup_rp", 11))
          break;
        return Intrinsic::hexagon_S2_extractup_rp;	 // "__builtin_HEXAGON_S2_extractup_rp"
      case 'l':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+22, "sr_i_", 5))
          break;
        switch (BuiltinName[27]) {
        default: break;
        case 'p':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+28, "_xacc", 5))
            break;
          return Intrinsic::hexagon_S2_lsr_i_p_xacc;	 // "__builtin_HEXAGON_S2_lsr_i_p_xacc"
        case 'r':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+28, "_xacc", 5))
            break;
          return Intrinsic::hexagon_S2_lsr_i_r_xacc;	 // "__builtin_HEXAGON_S2_lsr_i_r_xacc"
        }
        break;
      }
      break;
    }
    break;
  case 34:	 // 41 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_HEXAGON_", 18))
      break;
    switch (BuiltinName[18]) {
    default: break;
    case 'M':	 // 38 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 35 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'm':	 // 33 strings to match.
          if (memcmp(BuiltinName.data()+22, "py_", 3))
            break;
          switch (BuiltinName[25]) {
          default: break;
          case 'a':	 // 8 strings to match.
            if (memcmp(BuiltinName.data()+26, "cc_", 3))
              break;
            switch (BuiltinName[29]) {
            default: break;
            case 'h':	 // 4 strings to match.
              switch (BuiltinName[30]) {
              default: break;
              case 'h':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+31, "_s", 2))
                  break;
                switch (BuiltinName[33]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_acc_hh_s0;	 // "__builtin_HEXAGON_M2_mpy_acc_hh_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_acc_hh_s1;	 // "__builtin_HEXAGON_M2_mpy_acc_hh_s1"
                }
                break;
              case 'l':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+31, "_s", 2))
                  break;
                switch (BuiltinName[33]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_acc_hl_s0;	 // "__builtin_HEXAGON_M2_mpy_acc_hl_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_acc_hl_s1;	 // "__builtin_HEXAGON_M2_mpy_acc_hl_s1"
                }
                break;
              }
              break;
            case 'l':	 // 4 strings to match.
              switch (BuiltinName[30]) {
              default: break;
              case 'h':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+31, "_s", 2))
                  break;
                switch (BuiltinName[33]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_acc_lh_s0;	 // "__builtin_HEXAGON_M2_mpy_acc_lh_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_acc_lh_s1;	 // "__builtin_HEXAGON_M2_mpy_acc_lh_s1"
                }
                break;
              case 'l':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+31, "_s", 2))
                  break;
                switch (BuiltinName[33]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_acc_ll_s0;	 // "__builtin_HEXAGON_M2_mpy_acc_ll_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_acc_ll_s1;	 // "__builtin_HEXAGON_M2_mpy_acc_ll_s1"
                }
                break;
              }
              break;
            }
            break;
          case 'n':	 // 8 strings to match.
            if (memcmp(BuiltinName.data()+26, "ac_", 3))
              break;
            switch (BuiltinName[29]) {
            default: break;
            case 'h':	 // 4 strings to match.
              switch (BuiltinName[30]) {
              default: break;
              case 'h':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+31, "_s", 2))
                  break;
                switch (BuiltinName[33]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_nac_hh_s0;	 // "__builtin_HEXAGON_M2_mpy_nac_hh_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_nac_hh_s1;	 // "__builtin_HEXAGON_M2_mpy_nac_hh_s1"
                }
                break;
              case 'l':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+31, "_s", 2))
                  break;
                switch (BuiltinName[33]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_nac_hl_s0;	 // "__builtin_HEXAGON_M2_mpy_nac_hl_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_nac_hl_s1;	 // "__builtin_HEXAGON_M2_mpy_nac_hl_s1"
                }
                break;
              }
              break;
            case 'l':	 // 4 strings to match.
              switch (BuiltinName[30]) {
              default: break;
              case 'h':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+31, "_s", 2))
                  break;
                switch (BuiltinName[33]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_nac_lh_s0;	 // "__builtin_HEXAGON_M2_mpy_nac_lh_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_nac_lh_s1;	 // "__builtin_HEXAGON_M2_mpy_nac_lh_s1"
                }
                break;
              case 'l':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+31, "_s", 2))
                  break;
                switch (BuiltinName[33]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_nac_ll_s0;	 // "__builtin_HEXAGON_M2_mpy_nac_ll_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_nac_ll_s1;	 // "__builtin_HEXAGON_M2_mpy_nac_ll_s1"
                }
                break;
              }
              break;
            }
            break;
          case 'r':	 // 8 strings to match.
            if (memcmp(BuiltinName.data()+26, "nd_", 3))
              break;
            switch (BuiltinName[29]) {
            default: break;
            case 'h':	 // 4 strings to match.
              switch (BuiltinName[30]) {
              default: break;
              case 'h':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+31, "_s", 2))
                  break;
                switch (BuiltinName[33]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_rnd_hh_s0;	 // "__builtin_HEXAGON_M2_mpy_rnd_hh_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_rnd_hh_s1;	 // "__builtin_HEXAGON_M2_mpy_rnd_hh_s1"
                }
                break;
              case 'l':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+31, "_s", 2))
                  break;
                switch (BuiltinName[33]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_rnd_hl_s0;	 // "__builtin_HEXAGON_M2_mpy_rnd_hl_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_rnd_hl_s1;	 // "__builtin_HEXAGON_M2_mpy_rnd_hl_s1"
                }
                break;
              }
              break;
            case 'l':	 // 4 strings to match.
              switch (BuiltinName[30]) {
              default: break;
              case 'h':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+31, "_s", 2))
                  break;
                switch (BuiltinName[33]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_rnd_lh_s0;	 // "__builtin_HEXAGON_M2_mpy_rnd_lh_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_rnd_lh_s1;	 // "__builtin_HEXAGON_M2_mpy_rnd_lh_s1"
                }
                break;
              case 'l':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+31, "_s", 2))
                  break;
                switch (BuiltinName[33]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_rnd_ll_s0;	 // "__builtin_HEXAGON_M2_mpy_rnd_ll_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_rnd_ll_s1;	 // "__builtin_HEXAGON_M2_mpy_rnd_ll_s1"
                }
                break;
              }
              break;
            }
            break;
          case 's':	 // 8 strings to match.
            if (memcmp(BuiltinName.data()+26, "at_", 3))
              break;
            switch (BuiltinName[29]) {
            default: break;
            case 'h':	 // 4 strings to match.
              switch (BuiltinName[30]) {
              default: break;
              case 'h':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+31, "_s", 2))
                  break;
                switch (BuiltinName[33]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_sat_hh_s0;	 // "__builtin_HEXAGON_M2_mpy_sat_hh_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_sat_hh_s1;	 // "__builtin_HEXAGON_M2_mpy_sat_hh_s1"
                }
                break;
              case 'l':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+31, "_s", 2))
                  break;
                switch (BuiltinName[33]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_sat_hl_s0;	 // "__builtin_HEXAGON_M2_mpy_sat_hl_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_sat_hl_s1;	 // "__builtin_HEXAGON_M2_mpy_sat_hl_s1"
                }
                break;
              }
              break;
            case 'l':	 // 4 strings to match.
              switch (BuiltinName[30]) {
              default: break;
              case 'h':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+31, "_s", 2))
                  break;
                switch (BuiltinName[33]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_sat_lh_s0;	 // "__builtin_HEXAGON_M2_mpy_sat_lh_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_sat_lh_s1;	 // "__builtin_HEXAGON_M2_mpy_sat_lh_s1"
                }
                break;
              case 'l':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+31, "_s", 2))
                  break;
                switch (BuiltinName[33]) {
                default: break;
                case '0':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_sat_ll_s0;	 // "__builtin_HEXAGON_M2_mpy_sat_ll_s0"
                case '1':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_mpy_sat_ll_s1;	 // "__builtin_HEXAGON_M2_mpy_sat_ll_s1"
                }
                break;
              }
              break;
            }
            break;
          case 'u':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "p_s1_sat", 8))
              break;
            return Intrinsic::hexagon_M2_mpy_up_s1_sat;	 // "__builtin_HEXAGON_M2_mpy_up_s1_sat"
          }
          break;
        case 'v':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+22, "mpy2s_s", 7))
            break;
          switch (BuiltinName[29]) {
          default: break;
          case '0':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+30, "pack", 4))
              break;
            return Intrinsic::hexagon_M2_vmpy2s_s0pack;	 // "__builtin_HEXAGON_M2_vmpy2s_s0pack"
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+30, "pack", 4))
              break;
            return Intrinsic::hexagon_M2_vmpy2s_s1pack;	 // "__builtin_HEXAGON_M2_vmpy2s_s1pack"
          }
          break;
        }
        break;
      case '4':	 // 3 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'm':	 // 2 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "c_up_s1_sat", 11))
              break;
            return Intrinsic::hexagon_M4_mac_up_s1_sat;	 // "__builtin_HEXAGON_M4_mac_up_s1_sat"
          case 'p':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "yri_addr_u2", 11))
              break;
            return Intrinsic::hexagon_M4_mpyri_addr_u2;	 // "__builtin_HEXAGON_M4_mpyri_addr_u2"
          }
          break;
        case 'n':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "ac_up_s1_sat", 12))
            break;
          return Intrinsic::hexagon_M4_nac_up_s1_sat;	 // "__builtin_HEXAGON_M4_nac_up_s1_sat"
        }
        break;
      }
      break;
    case 'S':	 // 3 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+20, "_vsat", 5))
          break;
        switch (BuiltinName[25]) {
        default: break;
        case 'h':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+26, "b_nopack", 8))
            break;
          return Intrinsic::hexagon_S2_vsathb_nopack;	 // "__builtin_HEXAGON_S2_vsathb_nopack"
        case 'w':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+26, "h_nopack", 8))
            break;
          return Intrinsic::hexagon_S2_vsatwh_nopack;	 // "__builtin_HEXAGON_S2_vsatwh_nopack"
        }
        break;
      case '4':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+20, "_vrcrotate_acc", 14))
          break;
        return Intrinsic::hexagon_S4_vrcrotate_acc;	 // "__builtin_HEXAGON_S4_vrcrotate_acc"
      }
      break;
    }
    break;
  case 35:	 // 64 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_HEXAGON_", 18))
      break;
    switch (BuiltinName[18]) {
    default: break;
    case 'F':	 // 4 strings to match.
      if (memcmp(BuiltinName.data()+19, "2_conv_", 7))
        break;
      switch (BuiltinName[26]) {
      default: break;
      case 'd':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+27, "f2", 2))
          break;
        switch (BuiltinName[29]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+30, "_chop", 5))
            break;
          return Intrinsic::hexagon_F2_conv_df2d_chop;	 // "__builtin_HEXAGON_F2_conv_df2d_chop"
        case 'w':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+30, "_chop", 5))
            break;
          return Intrinsic::hexagon_F2_conv_df2w_chop;	 // "__builtin_HEXAGON_F2_conv_df2w_chop"
        }
        break;
      case 's':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+27, "f2", 2))
          break;
        switch (BuiltinName[29]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+30, "_chop", 5))
            break;
          return Intrinsic::hexagon_F2_conv_sf2d_chop;	 // "__builtin_HEXAGON_F2_conv_sf2d_chop"
        case 'w':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+30, "_chop", 5))
            break;
          return Intrinsic::hexagon_F2_conv_sf2w_chop;	 // "__builtin_HEXAGON_F2_conv_sf2w_chop"
        }
        break;
      }
      break;
    case 'M':	 // 56 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case '2':	 // 52 strings to match.
        if (BuiltinName[20] != '_')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'd':	 // 5 strings to match.
          if (memcmp(BuiltinName.data()+22, "pmpy", 4))
            break;
          switch (BuiltinName[26]) {
          default: break;
          case 's':	 // 3 strings to match.
            if (memcmp(BuiltinName.data()+27, "s_", 2))
              break;
            switch (BuiltinName[29]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "cc_s0", 5))
                break;
              return Intrinsic::hexagon_M2_dpmpyss_acc_s0;	 // "__builtin_HEXAGON_M2_dpmpyss_acc_s0"
            case 'n':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "ac_s0", 5))
                break;
              return Intrinsic::hexagon_M2_dpmpyss_nac_s0;	 // "__builtin_HEXAGON_M2_dpmpyss_nac_s0"
            case 'r':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "nd_s0", 5))
                break;
              return Intrinsic::hexagon_M2_dpmpyss_rnd_s0;	 // "__builtin_HEXAGON_M2_dpmpyss_rnd_s0"
            }
            break;
          case 'u':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+27, "u_", 2))
              break;
            switch (BuiltinName[29]) {
            default: break;
            case 'a':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "cc_s0", 5))
                break;
              return Intrinsic::hexagon_M2_dpmpyuu_acc_s0;	 // "__builtin_HEXAGON_M2_dpmpyuu_acc_s0"
            case 'n':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+30, "ac_s0", 5))
                break;
              return Intrinsic::hexagon_M2_dpmpyuu_nac_s0;	 // "__builtin_HEXAGON_M2_dpmpyuu_nac_s0"
            }
            break;
          }
          break;
        case 'm':	 // 40 strings to match.
          if (memcmp(BuiltinName.data()+22, "py", 2))
            break;
          switch (BuiltinName[24]) {
          default: break;
          case 'd':	 // 24 strings to match.
            if (BuiltinName[25] != '_')
              break;
            switch (BuiltinName[26]) {
            default: break;
            case 'a':	 // 8 strings to match.
              if (memcmp(BuiltinName.data()+27, "cc_", 3))
                break;
              switch (BuiltinName[30]) {
              default: break;
              case 'h':	 // 4 strings to match.
                switch (BuiltinName[31]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+32, "_s", 2))
                    break;
                  switch (BuiltinName[34]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_acc_hh_s0;	 // "__builtin_HEXAGON_M2_mpyd_acc_hh_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_acc_hh_s1;	 // "__builtin_HEXAGON_M2_mpyd_acc_hh_s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+32, "_s", 2))
                    break;
                  switch (BuiltinName[34]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_acc_hl_s0;	 // "__builtin_HEXAGON_M2_mpyd_acc_hl_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_acc_hl_s1;	 // "__builtin_HEXAGON_M2_mpyd_acc_hl_s1"
                  }
                  break;
                }
                break;
              case 'l':	 // 4 strings to match.
                switch (BuiltinName[31]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+32, "_s", 2))
                    break;
                  switch (BuiltinName[34]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_acc_lh_s0;	 // "__builtin_HEXAGON_M2_mpyd_acc_lh_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_acc_lh_s1;	 // "__builtin_HEXAGON_M2_mpyd_acc_lh_s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+32, "_s", 2))
                    break;
                  switch (BuiltinName[34]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_acc_ll_s0;	 // "__builtin_HEXAGON_M2_mpyd_acc_ll_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_acc_ll_s1;	 // "__builtin_HEXAGON_M2_mpyd_acc_ll_s1"
                  }
                  break;
                }
                break;
              }
              break;
            case 'n':	 // 8 strings to match.
              if (memcmp(BuiltinName.data()+27, "ac_", 3))
                break;
              switch (BuiltinName[30]) {
              default: break;
              case 'h':	 // 4 strings to match.
                switch (BuiltinName[31]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+32, "_s", 2))
                    break;
                  switch (BuiltinName[34]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_nac_hh_s0;	 // "__builtin_HEXAGON_M2_mpyd_nac_hh_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_nac_hh_s1;	 // "__builtin_HEXAGON_M2_mpyd_nac_hh_s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+32, "_s", 2))
                    break;
                  switch (BuiltinName[34]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_nac_hl_s0;	 // "__builtin_HEXAGON_M2_mpyd_nac_hl_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_nac_hl_s1;	 // "__builtin_HEXAGON_M2_mpyd_nac_hl_s1"
                  }
                  break;
                }
                break;
              case 'l':	 // 4 strings to match.
                switch (BuiltinName[31]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+32, "_s", 2))
                    break;
                  switch (BuiltinName[34]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_nac_lh_s0;	 // "__builtin_HEXAGON_M2_mpyd_nac_lh_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_nac_lh_s1;	 // "__builtin_HEXAGON_M2_mpyd_nac_lh_s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+32, "_s", 2))
                    break;
                  switch (BuiltinName[34]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_nac_ll_s0;	 // "__builtin_HEXAGON_M2_mpyd_nac_ll_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_nac_ll_s1;	 // "__builtin_HEXAGON_M2_mpyd_nac_ll_s1"
                  }
                  break;
                }
                break;
              }
              break;
            case 'r':	 // 8 strings to match.
              if (memcmp(BuiltinName.data()+27, "nd_", 3))
                break;
              switch (BuiltinName[30]) {
              default: break;
              case 'h':	 // 4 strings to match.
                switch (BuiltinName[31]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+32, "_s", 2))
                    break;
                  switch (BuiltinName[34]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_rnd_hh_s0;	 // "__builtin_HEXAGON_M2_mpyd_rnd_hh_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_rnd_hh_s1;	 // "__builtin_HEXAGON_M2_mpyd_rnd_hh_s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+32, "_s", 2))
                    break;
                  switch (BuiltinName[34]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_rnd_hl_s0;	 // "__builtin_HEXAGON_M2_mpyd_rnd_hl_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_rnd_hl_s1;	 // "__builtin_HEXAGON_M2_mpyd_rnd_hl_s1"
                  }
                  break;
                }
                break;
              case 'l':	 // 4 strings to match.
                switch (BuiltinName[31]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+32, "_s", 2))
                    break;
                  switch (BuiltinName[34]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_rnd_lh_s0;	 // "__builtin_HEXAGON_M2_mpyd_rnd_lh_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_rnd_lh_s1;	 // "__builtin_HEXAGON_M2_mpyd_rnd_lh_s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+32, "_s", 2))
                    break;
                  switch (BuiltinName[34]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_rnd_ll_s0;	 // "__builtin_HEXAGON_M2_mpyd_rnd_ll_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyd_rnd_ll_s1;	 // "__builtin_HEXAGON_M2_mpyd_rnd_ll_s1"
                  }
                  break;
                }
                break;
              }
              break;
            }
            break;
          case 'u':	 // 16 strings to match.
            if (BuiltinName[25] != '_')
              break;
            switch (BuiltinName[26]) {
            default: break;
            case 'a':	 // 8 strings to match.
              if (memcmp(BuiltinName.data()+27, "cc_", 3))
                break;
              switch (BuiltinName[30]) {
              default: break;
              case 'h':	 // 4 strings to match.
                switch (BuiltinName[31]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+32, "_s", 2))
                    break;
                  switch (BuiltinName[34]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyu_acc_hh_s0;	 // "__builtin_HEXAGON_M2_mpyu_acc_hh_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyu_acc_hh_s1;	 // "__builtin_HEXAGON_M2_mpyu_acc_hh_s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+32, "_s", 2))
                    break;
                  switch (BuiltinName[34]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyu_acc_hl_s0;	 // "__builtin_HEXAGON_M2_mpyu_acc_hl_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyu_acc_hl_s1;	 // "__builtin_HEXAGON_M2_mpyu_acc_hl_s1"
                  }
                  break;
                }
                break;
              case 'l':	 // 4 strings to match.
                switch (BuiltinName[31]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+32, "_s", 2))
                    break;
                  switch (BuiltinName[34]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyu_acc_lh_s0;	 // "__builtin_HEXAGON_M2_mpyu_acc_lh_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyu_acc_lh_s1;	 // "__builtin_HEXAGON_M2_mpyu_acc_lh_s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+32, "_s", 2))
                    break;
                  switch (BuiltinName[34]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyu_acc_ll_s0;	 // "__builtin_HEXAGON_M2_mpyu_acc_ll_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyu_acc_ll_s1;	 // "__builtin_HEXAGON_M2_mpyu_acc_ll_s1"
                  }
                  break;
                }
                break;
              }
              break;
            case 'n':	 // 8 strings to match.
              if (memcmp(BuiltinName.data()+27, "ac_", 3))
                break;
              switch (BuiltinName[30]) {
              default: break;
              case 'h':	 // 4 strings to match.
                switch (BuiltinName[31]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+32, "_s", 2))
                    break;
                  switch (BuiltinName[34]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyu_nac_hh_s0;	 // "__builtin_HEXAGON_M2_mpyu_nac_hh_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyu_nac_hh_s1;	 // "__builtin_HEXAGON_M2_mpyu_nac_hh_s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+32, "_s", 2))
                    break;
                  switch (BuiltinName[34]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyu_nac_hl_s0;	 // "__builtin_HEXAGON_M2_mpyu_nac_hl_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyu_nac_hl_s1;	 // "__builtin_HEXAGON_M2_mpyu_nac_hl_s1"
                  }
                  break;
                }
                break;
              case 'l':	 // 4 strings to match.
                switch (BuiltinName[31]) {
                default: break;
                case 'h':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+32, "_s", 2))
                    break;
                  switch (BuiltinName[34]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyu_nac_lh_s0;	 // "__builtin_HEXAGON_M2_mpyu_nac_lh_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyu_nac_lh_s1;	 // "__builtin_HEXAGON_M2_mpyu_nac_lh_s1"
                  }
                  break;
                case 'l':	 // 2 strings to match.
                  if (memcmp(BuiltinName.data()+32, "_s", 2))
                    break;
                  switch (BuiltinName[34]) {
                  default: break;
                  case '0':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyu_nac_ll_s0;	 // "__builtin_HEXAGON_M2_mpyu_nac_ll_s0"
                  case '1':	 // 1 string to match.
                    return Intrinsic::hexagon_M2_mpyu_nac_ll_s1;	 // "__builtin_HEXAGON_M2_mpyu_nac_ll_s1"
                  }
                  break;
                }
                break;
              }
              break;
            }
            break;
          }
          break;
        case 'v':	 // 7 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'c':	 // 6 strings to match.
            if (BuiltinName[23] != 'm')
              break;
            switch (BuiltinName[24]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+25, "c_s0_sat_", 9))
                break;
              switch (BuiltinName[34]) {
              default: break;
              case 'i':	 // 1 string to match.
                return Intrinsic::hexagon_M2_vcmac_s0_sat_i;	 // "__builtin_HEXAGON_M2_vcmac_s0_sat_i"
              case 'r':	 // 1 string to match.
                return Intrinsic::hexagon_M2_vcmac_s0_sat_r;	 // "__builtin_HEXAGON_M2_vcmac_s0_sat_r"
              }
              break;
            case 'p':	 // 4 strings to match.
              if (memcmp(BuiltinName.data()+25, "y_s", 3))
                break;
              switch (BuiltinName[28]) {
              default: break;
              case '0':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+29, "_sat_", 5))
                  break;
                switch (BuiltinName[34]) {
                default: break;
                case 'i':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_vcmpy_s0_sat_i;	 // "__builtin_HEXAGON_M2_vcmpy_s0_sat_i"
                case 'r':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_vcmpy_s0_sat_r;	 // "__builtin_HEXAGON_M2_vcmpy_s0_sat_r"
                }
                break;
              case '1':	 // 2 strings to match.
                if (memcmp(BuiltinName.data()+29, "_sat_", 5))
                  break;
                switch (BuiltinName[34]) {
                default: break;
                case 'i':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_vcmpy_s1_sat_i;	 // "__builtin_HEXAGON_M2_vcmpy_s1_sat_i"
                case 'r':	 // 1 string to match.
                  return Intrinsic::hexagon_M2_vcmpy_s1_sat_r;	 // "__builtin_HEXAGON_M2_vcmpy_s1_sat_r"
                }
                break;
              }
              break;
            }
            break;
          case 'r':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "cmpys_acc_s1", 12))
              break;
            return Intrinsic::hexagon_M2_vrcmpys_acc_s1;	 // "__builtin_HEXAGON_M2_vrcmpys_acc_s1"
          }
          break;
        }
        break;
      case '4':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+20, "_vrmpy", 6))
          break;
        switch (BuiltinName[26]) {
        default: break;
        case 'e':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+27, "h_acc_s", 7))
            break;
          switch (BuiltinName[34]) {
          default: break;
          case '0':	 // 1 string to match.
            return Intrinsic::hexagon_M4_vrmpyeh_acc_s0;	 // "__builtin_HEXAGON_M4_vrmpyeh_acc_s0"
          case '1':	 // 1 string to match.
            return Intrinsic::hexagon_M4_vrmpyeh_acc_s1;	 // "__builtin_HEXAGON_M4_vrmpyeh_acc_s1"
          }
          break;
        case 'o':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+27, "h_acc_s", 7))
            break;
          switch (BuiltinName[34]) {
          default: break;
          case '0':	 // 1 string to match.
            return Intrinsic::hexagon_M4_vrmpyoh_acc_s0;	 // "__builtin_HEXAGON_M4_vrmpyoh_acc_s0"
          case '1':	 // 1 string to match.
            return Intrinsic::hexagon_M4_vrmpyoh_acc_s1;	 // "__builtin_HEXAGON_M4_vrmpyoh_acc_s1"
          }
          break;
        }
        break;
      }
      break;
    case 'S':	 // 4 strings to match.
      if (memcmp(BuiltinName.data()+19, "2_", 2))
        break;
      switch (BuiltinName[21]) {
      default: break;
      case 'a':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+22, "sr_", 3))
          break;
        switch (BuiltinName[25]) {
        default: break;
        case 'i':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+26, "_svw_trun", 9))
            break;
          return Intrinsic::hexagon_S2_asr_i_svw_trun;	 // "__builtin_HEXAGON_S2_asr_i_svw_trun"
        case 'r':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+26, "_svw_trun", 9))
            break;
          return Intrinsic::hexagon_S2_asr_r_svw_trun;	 // "__builtin_HEXAGON_S2_asr_r_svw_trun"
        }
        break;
      case 'v':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+22, "sat", 3))
          break;
        switch (BuiltinName[25]) {
        default: break;
        case 'h':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+26, "ub_nopack", 9))
            break;
          return Intrinsic::hexagon_S2_vsathub_nopack;	 // "__builtin_HEXAGON_S2_vsathub_nopack"
        case 'w':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+26, "uh_nopack", 9))
            break;
          return Intrinsic::hexagon_S2_vsatwuh_nopack;	 // "__builtin_HEXAGON_S2_vsatwuh_nopack"
        }
        break;
      }
      break;
    }
    break;
  case 36:	 // 33 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_HEXAGON_", 18))
      break;
    switch (BuiltinName[18]) {
    default: break;
    case 'A':	 // 12 strings to match.
      if (memcmp(BuiltinName.data()+19, "2_", 2))
        break;
      switch (BuiltinName[21]) {
      default: break;
      case 'a':	 // 6 strings to match.
        if (memcmp(BuiltinName.data()+22, "ddh_", 4))
          break;
        switch (BuiltinName[26]) {
        default: break;
        case 'h':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+27, "16_sat_", 7))
            break;
          switch (BuiltinName[34]) {
          default: break;
          case 'h':	 // 2 strings to match.
            switch (BuiltinName[35]) {
            default: break;
            case 'h':	 // 1 string to match.
              return Intrinsic::hexagon_A2_addh_h16_sat_hh;	 // "__builtin_HEXAGON_A2_addh_h16_sat_hh"
            case 'l':	 // 1 string to match.
              return Intrinsic::hexagon_A2_addh_h16_sat_hl;	 // "__builtin_HEXAGON_A2_addh_h16_sat_hl"
            }
            break;
          case 'l':	 // 2 strings to match.
            switch (BuiltinName[35]) {
            default: break;
            case 'h':	 // 1 string to match.
              return Intrinsic::hexagon_A2_addh_h16_sat_lh;	 // "__builtin_HEXAGON_A2_addh_h16_sat_lh"
            case 'l':	 // 1 string to match.
              return Intrinsic::hexagon_A2_addh_h16_sat_ll;	 // "__builtin_HEXAGON_A2_addh_h16_sat_ll"
            }
            break;
          }
          break;
        case 'l':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+27, "16_sat_", 7))
            break;
          switch (BuiltinName[34]) {
          default: break;
          case 'h':	 // 1 string to match.
            if (BuiltinName[35] != 'l')
              break;
            return Intrinsic::hexagon_A2_addh_l16_sat_hl;	 // "__builtin_HEXAGON_A2_addh_l16_sat_hl"
          case 'l':	 // 1 string to match.
            if (BuiltinName[35] != 'l')
              break;
            return Intrinsic::hexagon_A2_addh_l16_sat_ll;	 // "__builtin_HEXAGON_A2_addh_l16_sat_ll"
          }
          break;
        }
        break;
      case 's':	 // 6 strings to match.
        if (memcmp(BuiltinName.data()+22, "ubh_", 4))
          break;
        switch (BuiltinName[26]) {
        default: break;
        case 'h':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+27, "16_sat_", 7))
            break;
          switch (BuiltinName[34]) {
          default: break;
          case 'h':	 // 2 strings to match.
            switch (BuiltinName[35]) {
            default: break;
            case 'h':	 // 1 string to match.
              return Intrinsic::hexagon_A2_subh_h16_sat_hh;	 // "__builtin_HEXAGON_A2_subh_h16_sat_hh"
            case 'l':	 // 1 string to match.
              return Intrinsic::hexagon_A2_subh_h16_sat_hl;	 // "__builtin_HEXAGON_A2_subh_h16_sat_hl"
            }
            break;
          case 'l':	 // 2 strings to match.
            switch (BuiltinName[35]) {
            default: break;
            case 'h':	 // 1 string to match.
              return Intrinsic::hexagon_A2_subh_h16_sat_lh;	 // "__builtin_HEXAGON_A2_subh_h16_sat_lh"
            case 'l':	 // 1 string to match.
              return Intrinsic::hexagon_A2_subh_h16_sat_ll;	 // "__builtin_HEXAGON_A2_subh_h16_sat_ll"
            }
            break;
          }
          break;
        case 'l':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+27, "16_sat_", 7))
            break;
          switch (BuiltinName[34]) {
          default: break;
          case 'h':	 // 1 string to match.
            if (BuiltinName[35] != 'l')
              break;
            return Intrinsic::hexagon_A2_subh_l16_sat_hl;	 // "__builtin_HEXAGON_A2_subh_l16_sat_hl"
          case 'l':	 // 1 string to match.
            if (BuiltinName[35] != 'l')
              break;
            return Intrinsic::hexagon_A2_subh_l16_sat_ll;	 // "__builtin_HEXAGON_A2_subh_l16_sat_ll"
          }
          break;
        }
        break;
      }
      break;
    case 'C':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+19, "4_fastcorner9_not", 17))
        break;
      return Intrinsic::hexagon_C4_fastcorner9_not;	 // "__builtin_HEXAGON_C4_fastcorner9_not"
    case 'F':	 // 4 strings to match.
      if (memcmp(BuiltinName.data()+19, "2_conv_", 7))
        break;
      switch (BuiltinName[26]) {
      default: break;
      case 'd':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+27, "f2u", 3))
          break;
        switch (BuiltinName[30]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+31, "_chop", 5))
            break;
          return Intrinsic::hexagon_F2_conv_df2ud_chop;	 // "__builtin_HEXAGON_F2_conv_df2ud_chop"
        case 'w':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+31, "_chop", 5))
            break;
          return Intrinsic::hexagon_F2_conv_df2uw_chop;	 // "__builtin_HEXAGON_F2_conv_df2uw_chop"
        }
        break;
      case 's':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+27, "f2u", 3))
          break;
        switch (BuiltinName[30]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+31, "_chop", 5))
            break;
          return Intrinsic::hexagon_F2_conv_sf2ud_chop;	 // "__builtin_HEXAGON_F2_conv_sf2ud_chop"
        case 'w':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+31, "_chop", 5))
            break;
          return Intrinsic::hexagon_F2_conv_sf2uw_chop;	 // "__builtin_HEXAGON_F2_conv_sf2uw_chop"
        }
        break;
      }
      break;
    case 'M':	 // 16 strings to match.
      if (memcmp(BuiltinName.data()+19, "2_mpyud_", 8))
        break;
      switch (BuiltinName[27]) {
      default: break;
      case 'a':	 // 8 strings to match.
        if (memcmp(BuiltinName.data()+28, "cc_", 3))
          break;
        switch (BuiltinName[31]) {
        default: break;
        case 'h':	 // 4 strings to match.
          switch (BuiltinName[32]) {
          default: break;
          case 'h':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+33, "_s", 2))
              break;
            switch (BuiltinName[35]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpyud_acc_hh_s0;	 // "__builtin_HEXAGON_M2_mpyud_acc_hh_s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpyud_acc_hh_s1;	 // "__builtin_HEXAGON_M2_mpyud_acc_hh_s1"
            }
            break;
          case 'l':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+33, "_s", 2))
              break;
            switch (BuiltinName[35]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpyud_acc_hl_s0;	 // "__builtin_HEXAGON_M2_mpyud_acc_hl_s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpyud_acc_hl_s1;	 // "__builtin_HEXAGON_M2_mpyud_acc_hl_s1"
            }
            break;
          }
          break;
        case 'l':	 // 4 strings to match.
          switch (BuiltinName[32]) {
          default: break;
          case 'h':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+33, "_s", 2))
              break;
            switch (BuiltinName[35]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpyud_acc_lh_s0;	 // "__builtin_HEXAGON_M2_mpyud_acc_lh_s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpyud_acc_lh_s1;	 // "__builtin_HEXAGON_M2_mpyud_acc_lh_s1"
            }
            break;
          case 'l':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+33, "_s", 2))
              break;
            switch (BuiltinName[35]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpyud_acc_ll_s0;	 // "__builtin_HEXAGON_M2_mpyud_acc_ll_s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpyud_acc_ll_s1;	 // "__builtin_HEXAGON_M2_mpyud_acc_ll_s1"
            }
            break;
          }
          break;
        }
        break;
      case 'n':	 // 8 strings to match.
        if (memcmp(BuiltinName.data()+28, "ac_", 3))
          break;
        switch (BuiltinName[31]) {
        default: break;
        case 'h':	 // 4 strings to match.
          switch (BuiltinName[32]) {
          default: break;
          case 'h':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+33, "_s", 2))
              break;
            switch (BuiltinName[35]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpyud_nac_hh_s0;	 // "__builtin_HEXAGON_M2_mpyud_nac_hh_s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpyud_nac_hh_s1;	 // "__builtin_HEXAGON_M2_mpyud_nac_hh_s1"
            }
            break;
          case 'l':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+33, "_s", 2))
              break;
            switch (BuiltinName[35]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpyud_nac_hl_s0;	 // "__builtin_HEXAGON_M2_mpyud_nac_hl_s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpyud_nac_hl_s1;	 // "__builtin_HEXAGON_M2_mpyud_nac_hl_s1"
            }
            break;
          }
          break;
        case 'l':	 // 4 strings to match.
          switch (BuiltinName[32]) {
          default: break;
          case 'h':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+33, "_s", 2))
              break;
            switch (BuiltinName[35]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpyud_nac_lh_s0;	 // "__builtin_HEXAGON_M2_mpyud_nac_lh_s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpyud_nac_lh_s1;	 // "__builtin_HEXAGON_M2_mpyud_nac_lh_s1"
            }
            break;
          case 'l':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+33, "_s", 2))
              break;
            switch (BuiltinName[35]) {
            default: break;
            case '0':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpyud_nac_ll_s0;	 // "__builtin_HEXAGON_M2_mpyud_nac_ll_s0"
            case '1':	 // 1 string to match.
              return Intrinsic::hexagon_M2_mpyud_nac_ll_s1;	 // "__builtin_HEXAGON_M2_mpyud_nac_ll_s1"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    }
    break;
  case 38:	 // 24 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_HEXAGON_M2_mpy_", 25))
      break;
    switch (BuiltinName[25]) {
    default: break;
    case 'a':	 // 8 strings to match.
      if (memcmp(BuiltinName.data()+26, "cc_sat_", 7))
        break;
      switch (BuiltinName[33]) {
      default: break;
      case 'h':	 // 4 strings to match.
        switch (BuiltinName[34]) {
        default: break;
        case 'h':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+35, "_s", 2))
            break;
          switch (BuiltinName[37]) {
          default: break;
          case '0':	 // 1 string to match.
            return Intrinsic::hexagon_M2_mpy_acc_sat_hh_s0;	 // "__builtin_HEXAGON_M2_mpy_acc_sat_hh_s0"
          case '1':	 // 1 string to match.
            return Intrinsic::hexagon_M2_mpy_acc_sat_hh_s1;	 // "__builtin_HEXAGON_M2_mpy_acc_sat_hh_s1"
          }
          break;
        case 'l':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+35, "_s", 2))
            break;
          switch (BuiltinName[37]) {
          default: break;
          case '0':	 // 1 string to match.
            return Intrinsic::hexagon_M2_mpy_acc_sat_hl_s0;	 // "__builtin_HEXAGON_M2_mpy_acc_sat_hl_s0"
          case '1':	 // 1 string to match.
            return Intrinsic::hexagon_M2_mpy_acc_sat_hl_s1;	 // "__builtin_HEXAGON_M2_mpy_acc_sat_hl_s1"
          }
          break;
        }
        break;
      case 'l':	 // 4 strings to match.
        switch (BuiltinName[34]) {
        default: break;
        case 'h':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+35, "_s", 2))
            break;
          switch (BuiltinName[37]) {
          default: break;
          case '0':	 // 1 string to match.
            return Intrinsic::hexagon_M2_mpy_acc_sat_lh_s0;	 // "__builtin_HEXAGON_M2_mpy_acc_sat_lh_s0"
          case '1':	 // 1 string to match.
            return Intrinsic::hexagon_M2_mpy_acc_sat_lh_s1;	 // "__builtin_HEXAGON_M2_mpy_acc_sat_lh_s1"
          }
          break;
        case 'l':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+35, "_s", 2))
            break;
          switch (BuiltinName[37]) {
          default: break;
          case '0':	 // 1 string to match.
            return Intrinsic::hexagon_M2_mpy_acc_sat_ll_s0;	 // "__builtin_HEXAGON_M2_mpy_acc_sat_ll_s0"
          case '1':	 // 1 string to match.
            return Intrinsic::hexagon_M2_mpy_acc_sat_ll_s1;	 // "__builtin_HEXAGON_M2_mpy_acc_sat_ll_s1"
          }
          break;
        }
        break;
      }
      break;
    case 'n':	 // 8 strings to match.
      if (memcmp(BuiltinName.data()+26, "ac_sat_", 7))
        break;
      switch (BuiltinName[33]) {
      default: break;
      case 'h':	 // 4 strings to match.
        switch (BuiltinName[34]) {
        default: break;
        case 'h':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+35, "_s", 2))
            break;
          switch (BuiltinName[37]) {
          default: break;
          case '0':	 // 1 string to match.
            return Intrinsic::hexagon_M2_mpy_nac_sat_hh_s0;	 // "__builtin_HEXAGON_M2_mpy_nac_sat_hh_s0"
          case '1':	 // 1 string to match.
            return Intrinsic::hexagon_M2_mpy_nac_sat_hh_s1;	 // "__builtin_HEXAGON_M2_mpy_nac_sat_hh_s1"
          }
          break;
        case 'l':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+35, "_s", 2))
            break;
          switch (BuiltinName[37]) {
          default: break;
          case '0':	 // 1 string to match.
            return Intrinsic::hexagon_M2_mpy_nac_sat_hl_s0;	 // "__builtin_HEXAGON_M2_mpy_nac_sat_hl_s0"
          case '1':	 // 1 string to match.
            return Intrinsic::hexagon_M2_mpy_nac_sat_hl_s1;	 // "__builtin_HEXAGON_M2_mpy_nac_sat_hl_s1"
          }
          break;
        }
        break;
      case 'l':	 // 4 strings to match.
        switch (BuiltinName[34]) {
        default: break;
        case 'h':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+35, "_s", 2))
            break;
          switch (BuiltinName[37]) {
          default: break;
          case '0':	 // 1 string to match.
            return Intrinsic::hexagon_M2_mpy_nac_sat_lh_s0;	 // "__builtin_HEXAGON_M2_mpy_nac_sat_lh_s0"
          case '1':	 // 1 string to match.
            return Intrinsic::hexagon_M2_mpy_nac_sat_lh_s1;	 // "__builtin_HEXAGON_M2_mpy_nac_sat_lh_s1"
          }
          break;
        case 'l':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+35, "_s", 2))
            break;
          switch (BuiltinName[37]) {
          default: break;
          case '0':	 // 1 string to match.
            return Intrinsic::hexagon_M2_mpy_nac_sat_ll_s0;	 // "__builtin_HEXAGON_M2_mpy_nac_sat_ll_s0"
          case '1':	 // 1 string to match.
            return Intrinsic::hexagon_M2_mpy_nac_sat_ll_s1;	 // "__builtin_HEXAGON_M2_mpy_nac_sat_ll_s1"
          }
          break;
        }
        break;
      }
      break;
    case 's':	 // 8 strings to match.
      if (memcmp(BuiltinName.data()+26, "at_rnd_", 7))
        break;
      switch (BuiltinName[33]) {
      default: break;
      case 'h':	 // 4 strings to match.
        switch (BuiltinName[34]) {
        default: break;
        case 'h':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+35, "_s", 2))
            break;
          switch (BuiltinName[37]) {
          default: break;
          case '0':	 // 1 string to match.
            return Intrinsic::hexagon_M2_mpy_sat_rnd_hh_s0;	 // "__builtin_HEXAGON_M2_mpy_sat_rnd_hh_s0"
          case '1':	 // 1 string to match.
            return Intrinsic::hexagon_M2_mpy_sat_rnd_hh_s1;	 // "__builtin_HEXAGON_M2_mpy_sat_rnd_hh_s1"
          }
          break;
        case 'l':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+35, "_s", 2))
            break;
          switch (BuiltinName[37]) {
          default: break;
          case '0':	 // 1 string to match.
            return Intrinsic::hexagon_M2_mpy_sat_rnd_hl_s0;	 // "__builtin_HEXAGON_M2_mpy_sat_rnd_hl_s0"
          case '1':	 // 1 string to match.
            return Intrinsic::hexagon_M2_mpy_sat_rnd_hl_s1;	 // "__builtin_HEXAGON_M2_mpy_sat_rnd_hl_s1"
          }
          break;
        }
        break;
      case 'l':	 // 4 strings to match.
        switch (BuiltinName[34]) {
        default: break;
        case 'h':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+35, "_s", 2))
            break;
          switch (BuiltinName[37]) {
          default: break;
          case '0':	 // 1 string to match.
            return Intrinsic::hexagon_M2_mpy_sat_rnd_lh_s0;	 // "__builtin_HEXAGON_M2_mpy_sat_rnd_lh_s0"
          case '1':	 // 1 string to match.
            return Intrinsic::hexagon_M2_mpy_sat_rnd_lh_s1;	 // "__builtin_HEXAGON_M2_mpy_sat_rnd_lh_s1"
          }
          break;
        case 'l':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+35, "_s", 2))
            break;
          switch (BuiltinName[37]) {
          default: break;
          case '0':	 // 1 string to match.
            return Intrinsic::hexagon_M2_mpy_sat_rnd_ll_s0;	 // "__builtin_HEXAGON_M2_mpy_sat_rnd_ll_s0"
          case '1':	 // 1 string to match.
            return Intrinsic::hexagon_M2_mpy_sat_rnd_ll_s1;	 // "__builtin_HEXAGON_M2_mpy_sat_rnd_ll_s1"
          }
          break;
        }
        break;
      }
      break;
    }
    break;
  case 40:	 // 1 string to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_HEXAGON_S5_vasrhrnd_goodsyntax", 40))
      break;
    return Intrinsic::hexagon_S5_vasrhrnd_goodsyntax;	 // "__builtin_HEXAGON_S5_vasrhrnd_goodsyntax"
  case 41:	 // 4 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_HEXAGON_S2_tableidx", 29))
      break;
    switch (BuiltinName[29]) {
    default: break;
    case 'b':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+30, "_goodsyntax", 11))
        break;
      return Intrinsic::hexagon_S2_tableidxb_goodsyntax;	 // "__builtin_HEXAGON_S2_tableidxb_goodsyntax"
    case 'd':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+30, "_goodsyntax", 11))
        break;
      return Intrinsic::hexagon_S2_tableidxd_goodsyntax;	 // "__builtin_HEXAGON_S2_tableidxd_goodsyntax"
    case 'h':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+30, "_goodsyntax", 11))
        break;
      return Intrinsic::hexagon_S2_tableidxh_goodsyntax;	 // "__builtin_HEXAGON_S2_tableidxh_goodsyntax"
    case 'w':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+30, "_goodsyntax", 11))
        break;
      return Intrinsic::hexagon_S2_tableidxw_goodsyntax;	 // "__builtin_HEXAGON_S2_tableidxw_goodsyntax"
    }
    break;
  case 43:	 // 2 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_HEXAGON_S2_asr_i_", 27))
      break;
    switch (BuiltinName[27]) {
    default: break;
    case 'p':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+28, "_rnd_goodsyntax", 15))
        break;
      return Intrinsic::hexagon_S2_asr_i_p_rnd_goodsyntax;	 // "__builtin_HEXAGON_S2_asr_i_p_rnd_goodsyntax"
    case 'r':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+28, "_rnd_goodsyntax", 15))
        break;
      return Intrinsic::hexagon_S2_asr_i_r_rnd_goodsyntax;	 // "__builtin_HEXAGON_S2_asr_i_r_rnd_goodsyntax"
    }
    break;
  case 46:	 // 1 string to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_HEXAGON_S5_asrhub_rnd_sat_goodsyntax", 46))
      break;
    return Intrinsic::hexagon_S5_asrhub_rnd_sat_goodsyntax;	 // "__builtin_HEXAGON_S5_asrhub_rnd_sat_goodsyntax"
  }
  }
  if (TargetPrefix == "mips") {
  switch (BuiltinName.size()) {
  default: break;
  case 18:	 // 17 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_m", 11))
      break;
    switch (BuiltinName[11]) {
    default: break;
    case 'i':	 // 3 strings to match.
      if (memcmp(BuiltinName.data()+12, "ps_l", 4))
        break;
      switch (BuiltinName[16]) {
      default: break;
      case 'h':	 // 1 string to match.
        if (BuiltinName[17] != 'x')
          break;
        return Intrinsic::mips_lhx;	 // "__builtin_mips_lhx"
      case 's':	 // 1 string to match.
        if (BuiltinName[17] != 'a')
          break;
        return Intrinsic::mips_lsa;	 // "__builtin_mips_lsa"
      case 'w':	 // 1 string to match.
        if (BuiltinName[17] != 'x')
          break;
        return Intrinsic::mips_lwx;	 // "__builtin_mips_lwx"
      }
      break;
    case 's':	 // 14 strings to match.
      if (memcmp(BuiltinName.data()+12, "a_", 2))
        break;
      switch (BuiltinName[14]) {
      default: break;
      case 'b':	 // 5 strings to match.
        if (memcmp(BuiltinName.data()+15, "z_", 2))
          break;
        switch (BuiltinName[17]) {
        default: break;
        case 'b':	 // 1 string to match.
          return Intrinsic::mips_bz_b;	 // "__builtin_msa_bz_b"
        case 'd':	 // 1 string to match.
          return Intrinsic::mips_bz_d;	 // "__builtin_msa_bz_d"
        case 'h':	 // 1 string to match.
          return Intrinsic::mips_bz_h;	 // "__builtin_msa_bz_h"
        case 'v':	 // 1 string to match.
          return Intrinsic::mips_bz_v;	 // "__builtin_msa_bz_v"
        case 'w':	 // 1 string to match.
          return Intrinsic::mips_bz_w;	 // "__builtin_msa_bz_w"
        }
        break;
      case 'l':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+15, "d_", 2))
          break;
        switch (BuiltinName[17]) {
        default: break;
        case 'b':	 // 1 string to match.
          return Intrinsic::mips_ld_b;	 // "__builtin_msa_ld_b"
        case 'd':	 // 1 string to match.
          return Intrinsic::mips_ld_d;	 // "__builtin_msa_ld_d"
        case 'h':	 // 1 string to match.
          return Intrinsic::mips_ld_h;	 // "__builtin_msa_ld_h"
        case 'w':	 // 1 string to match.
          return Intrinsic::mips_ld_w;	 // "__builtin_msa_ld_w"
        }
        break;
      case 'o':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+15, "r_v", 3))
          break;
        return Intrinsic::mips_or_v;	 // "__builtin_msa_or_v"
      case 's':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+15, "t_", 2))
          break;
        switch (BuiltinName[17]) {
        default: break;
        case 'b':	 // 1 string to match.
          return Intrinsic::mips_st_b;	 // "__builtin_msa_st_b"
        case 'd':	 // 1 string to match.
          return Intrinsic::mips_st_d;	 // "__builtin_msa_st_d"
        case 'h':	 // 1 string to match.
          return Intrinsic::mips_st_h;	 // "__builtin_msa_st_h"
        case 'w':	 // 1 string to match.
          return Intrinsic::mips_st_w;	 // "__builtin_msa_st_w"
        }
        break;
      }
      break;
    }
    break;
  case 19:	 // 46 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_m", 11))
      break;
    switch (BuiltinName[11]) {
    default: break;
    case 'i':	 // 7 strings to match.
      if (memcmp(BuiltinName.data()+12, "ps_", 3))
        break;
      switch (BuiltinName[15]) {
      default: break;
      case 'd':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+16, "lsa", 3))
          break;
        return Intrinsic::mips_dlsa;	 // "__builtin_mips_dlsa"
      case 'e':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+16, "xtp", 3))
          break;
        return Intrinsic::mips_extp;	 // "__builtin_mips_extp"
      case 'i':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+16, "nsv", 3))
          break;
        return Intrinsic::mips_insv;	 // "__builtin_mips_insv"
      case 'l':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+16, "bux", 3))
          break;
        return Intrinsic::mips_lbux;	 // "__builtin_mips_lbux"
      case 'm':	 // 3 strings to match.
        switch (BuiltinName[16]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+17, "dd", 2))
            break;
          return Intrinsic::mips_madd;	 // "__builtin_mips_madd"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+17, "ub", 2))
            break;
          return Intrinsic::mips_msub;	 // "__builtin_mips_msub"
        case 'u':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+17, "lt", 2))
            break;
          return Intrinsic::mips_mult;	 // "__builtin_mips_mult"
        }
        break;
      }
      break;
    case 's':	 // 39 strings to match.
      if (memcmp(BuiltinName.data()+12, "a_", 2))
        break;
      switch (BuiltinName[14]) {
      default: break;
      case 'a':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+15, "nd_v", 4))
          break;
        return Intrinsic::mips_and_v;	 // "__builtin_msa_and_v"
      case 'b':	 // 6 strings to match.
        switch (BuiltinName[15]) {
        default: break;
        case 'm':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+16, "z_v", 3))
            break;
          return Intrinsic::mips_bmz_v;	 // "__builtin_msa_bmz_v"
        case 'n':	 // 5 strings to match.
          if (memcmp(BuiltinName.data()+16, "z_", 2))
            break;
          switch (BuiltinName[18]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_bnz_b;	 // "__builtin_msa_bnz_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_bnz_d;	 // "__builtin_msa_bnz_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_bnz_h;	 // "__builtin_msa_bnz_h"
          case 'v':	 // 1 string to match.
            return Intrinsic::mips_bnz_v;	 // "__builtin_msa_bnz_v"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_bnz_w;	 // "__builtin_msa_bnz_w"
          }
          break;
        }
        break;
      case 'c':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+15, "eq_", 3))
          break;
        switch (BuiltinName[18]) {
        default: break;
        case 'b':	 // 1 string to match.
          return Intrinsic::mips_ceq_b;	 // "__builtin_msa_ceq_b"
        case 'd':	 // 1 string to match.
          return Intrinsic::mips_ceq_d;	 // "__builtin_msa_ceq_d"
        case 'h':	 // 1 string to match.
          return Intrinsic::mips_ceq_h;	 // "__builtin_msa_ceq_h"
        case 'w':	 // 1 string to match.
          return Intrinsic::mips_ceq_w;	 // "__builtin_msa_ceq_w"
        }
        break;
      case 'f':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+15, "tq_", 3))
          break;
        switch (BuiltinName[18]) {
        default: break;
        case 'h':	 // 1 string to match.
          return Intrinsic::mips_ftq_h;	 // "__builtin_msa_ftq_h"
        case 'w':	 // 1 string to match.
          return Intrinsic::mips_ftq_w;	 // "__builtin_msa_ftq_w"
        }
        break;
      case 'l':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+15, "di_", 3))
          break;
        switch (BuiltinName[18]) {
        default: break;
        case 'b':	 // 1 string to match.
          return Intrinsic::mips_ldi_b;	 // "__builtin_msa_ldi_b"
        case 'd':	 // 1 string to match.
          return Intrinsic::mips_ldi_d;	 // "__builtin_msa_ldi_d"
        case 'h':	 // 1 string to match.
          return Intrinsic::mips_ldi_h;	 // "__builtin_msa_ldi_h"
        case 'w':	 // 1 string to match.
          return Intrinsic::mips_ldi_w;	 // "__builtin_msa_ldi_w"
        }
        break;
      case 'n':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+15, "or_v", 4))
          break;
        return Intrinsic::mips_nor_v;	 // "__builtin_msa_nor_v"
      case 'o':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+15, "ri_b", 4))
          break;
        return Intrinsic::mips_ori_b;	 // "__builtin_msa_ori_b"
      case 's':	 // 19 strings to match.
        switch (BuiltinName[15]) {
        default: break;
        case 'h':	 // 3 strings to match.
          if (memcmp(BuiltinName.data()+16, "f_", 2))
            break;
          switch (BuiltinName[18]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_shf_b;	 // "__builtin_msa_shf_b"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_shf_h;	 // "__builtin_msa_shf_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_shf_w;	 // "__builtin_msa_shf_w"
          }
          break;
        case 'l':	 // 8 strings to match.
          switch (BuiltinName[16]) {
          default: break;
          case 'd':	 // 4 strings to match.
            if (BuiltinName[17] != '_')
              break;
            switch (BuiltinName[18]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_sld_b;	 // "__builtin_msa_sld_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_sld_d;	 // "__builtin_msa_sld_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_sld_h;	 // "__builtin_msa_sld_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_sld_w;	 // "__builtin_msa_sld_w"
            }
            break;
          case 'l':	 // 4 strings to match.
            if (BuiltinName[17] != '_')
              break;
            switch (BuiltinName[18]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_sll_b;	 // "__builtin_msa_sll_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_sll_d;	 // "__builtin_msa_sll_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_sll_h;	 // "__builtin_msa_sll_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_sll_w;	 // "__builtin_msa_sll_w"
            }
            break;
          }
          break;
        case 'r':	 // 8 strings to match.
          switch (BuiltinName[16]) {
          default: break;
          case 'a':	 // 4 strings to match.
            if (BuiltinName[17] != '_')
              break;
            switch (BuiltinName[18]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_sra_b;	 // "__builtin_msa_sra_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_sra_d;	 // "__builtin_msa_sra_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_sra_h;	 // "__builtin_msa_sra_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_sra_w;	 // "__builtin_msa_sra_w"
            }
            break;
          case 'l':	 // 4 strings to match.
            if (BuiltinName[17] != '_')
              break;
            switch (BuiltinName[18]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_srl_b;	 // "__builtin_msa_srl_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_srl_d;	 // "__builtin_msa_srl_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_srl_h;	 // "__builtin_msa_srl_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_srl_w;	 // "__builtin_msa_srl_w"
            }
            break;
          }
          break;
        }
        break;
      case 'x':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+15, "or_v", 4))
          break;
        return Intrinsic::mips_xor_v;	 // "__builtin_msa_xor_v"
      }
      break;
    }
    break;
  case 20:	 // 143 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_m", 11))
      break;
    switch (BuiltinName[11]) {
    default: break;
    case 'i':	 // 8 strings to match.
      if (memcmp(BuiltinName.data()+12, "ps_", 3))
        break;
      switch (BuiltinName[15]) {
      default: break;
      case 'a':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+16, "dd", 2))
          break;
        switch (BuiltinName[18]) {
        default: break;
        case 's':	 // 1 string to match.
          if (BuiltinName[19] != 'c')
            break;
          return Intrinsic::mips_addsc;	 // "__builtin_mips_addsc"
        case 'w':	 // 1 string to match.
          if (BuiltinName[19] != 'c')
            break;
          return Intrinsic::mips_addwc;	 // "__builtin_mips_addwc"
        }
        break;
      case 'm':	 // 3 strings to match.
        switch (BuiltinName[16]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+17, "ddu", 3))
            break;
          return Intrinsic::mips_maddu;	 // "__builtin_mips_maddu"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+17, "ubu", 3))
            break;
          return Intrinsic::mips_msubu;	 // "__builtin_mips_msubu"
        case 'u':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+17, "ltu", 3))
            break;
          return Intrinsic::mips_multu;	 // "__builtin_mips_multu"
        }
        break;
      case 'r':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+16, "ddsp", 4))
          break;
        return Intrinsic::mips_rddsp;	 // "__builtin_mips_rddsp"
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+16, "hilo", 4))
          break;
        return Intrinsic::mips_shilo;	 // "__builtin_mips_shilo"
      case 'w':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+16, "rdsp", 4))
          break;
        return Intrinsic::mips_wrdsp;	 // "__builtin_mips_wrdsp"
      }
      break;
    case 's':	 // 135 strings to match.
      if (memcmp(BuiltinName.data()+12, "a_", 2))
        break;
      switch (BuiltinName[14]) {
      default: break;
      case 'a':	 // 5 strings to match.
        switch (BuiltinName[15]) {
        default: break;
        case 'd':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+16, "dv_", 3))
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_addv_b;	 // "__builtin_msa_addv_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_addv_d;	 // "__builtin_msa_addv_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_addv_h;	 // "__builtin_msa_addv_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_addv_w;	 // "__builtin_msa_addv_w"
          }
          break;
        case 'n':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+16, "di_b", 4))
            break;
          return Intrinsic::mips_andi_b;	 // "__builtin_msa_andi_b"
        }
        break;
      case 'b':	 // 15 strings to match.
        switch (BuiltinName[15]) {
        default: break;
        case 'c':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+16, "lr_", 3))
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_bclr_b;	 // "__builtin_msa_bclr_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_bclr_d;	 // "__builtin_msa_bclr_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_bclr_h;	 // "__builtin_msa_bclr_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_bclr_w;	 // "__builtin_msa_bclr_w"
          }
          break;
        case 'm':	 // 2 strings to match.
          switch (BuiltinName[16]) {
          default: break;
          case 'n':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+17, "z_v", 3))
              break;
            return Intrinsic::mips_bmnz_v;	 // "__builtin_msa_bmnz_v"
          case 'z':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+17, "i_b", 3))
              break;
            return Intrinsic::mips_bmzi_b;	 // "__builtin_msa_bmzi_b"
          }
          break;
        case 'n':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+16, "eg_", 3))
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_bneg_b;	 // "__builtin_msa_bneg_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_bneg_d;	 // "__builtin_msa_bneg_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_bneg_h;	 // "__builtin_msa_bneg_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_bneg_w;	 // "__builtin_msa_bneg_w"
          }
          break;
        case 's':	 // 5 strings to match.
          if (BuiltinName[16] != 'e')
            break;
          switch (BuiltinName[17]) {
          default: break;
          case 'l':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+18, "_v", 2))
              break;
            return Intrinsic::mips_bsel_v;	 // "__builtin_msa_bsel_v"
          case 't':	 // 4 strings to match.
            if (BuiltinName[18] != '_')
              break;
            switch (BuiltinName[19]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_bset_b;	 // "__builtin_msa_bset_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_bset_d;	 // "__builtin_msa_bset_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_bset_h;	 // "__builtin_msa_bset_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_bset_w;	 // "__builtin_msa_bset_w"
            }
            break;
          }
          break;
        }
        break;
      case 'c':	 // 6 strings to match.
        switch (BuiltinName[15]) {
        default: break;
        case 'e':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+16, "qi_", 3))
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_ceqi_b;	 // "__builtin_msa_ceqi_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_ceqi_d;	 // "__builtin_msa_ceqi_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_ceqi_h;	 // "__builtin_msa_ceqi_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_ceqi_w;	 // "__builtin_msa_ceqi_w"
          }
          break;
        case 'f':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+16, "cmsa", 4))
            break;
          return Intrinsic::mips_cfcmsa;	 // "__builtin_msa_cfcmsa"
        case 't':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+16, "cmsa", 4))
            break;
          return Intrinsic::mips_ctcmsa;	 // "__builtin_msa_ctcmsa"
        }
        break;
      case 'f':	 // 50 strings to match.
        switch (BuiltinName[15]) {
        default: break;
        case 'a':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+16, "dd_", 3))
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_fadd_d;	 // "__builtin_msa_fadd_d"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_fadd_w;	 // "__builtin_msa_fadd_w"
          }
          break;
        case 'c':	 // 14 strings to match.
          switch (BuiltinName[16]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+17, "f_", 2))
              break;
            switch (BuiltinName[19]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fcaf_d;	 // "__builtin_msa_fcaf_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fcaf_w;	 // "__builtin_msa_fcaf_w"
            }
            break;
          case 'e':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+17, "q_", 2))
              break;
            switch (BuiltinName[19]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fceq_d;	 // "__builtin_msa_fceq_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fceq_w;	 // "__builtin_msa_fceq_w"
            }
            break;
          case 'l':	 // 4 strings to match.
            switch (BuiltinName[17]) {
            default: break;
            case 'e':	 // 2 strings to match.
              if (BuiltinName[18] != '_')
                break;
              switch (BuiltinName[19]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_fcle_d;	 // "__builtin_msa_fcle_d"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_fcle_w;	 // "__builtin_msa_fcle_w"
              }
              break;
            case 't':	 // 2 strings to match.
              if (BuiltinName[18] != '_')
                break;
              switch (BuiltinName[19]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_fclt_d;	 // "__builtin_msa_fclt_d"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_fclt_w;	 // "__builtin_msa_fclt_w"
              }
              break;
            }
            break;
          case 'n':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+17, "e_", 2))
              break;
            switch (BuiltinName[19]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fcne_d;	 // "__builtin_msa_fcne_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fcne_w;	 // "__builtin_msa_fcne_w"
            }
            break;
          case 'o':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+17, "r_", 2))
              break;
            switch (BuiltinName[19]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fcor_d;	 // "__builtin_msa_fcor_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fcor_w;	 // "__builtin_msa_fcor_w"
            }
            break;
          case 'u':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+17, "n_", 2))
              break;
            switch (BuiltinName[19]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fcun_d;	 // "__builtin_msa_fcun_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fcun_w;	 // "__builtin_msa_fcun_w"
            }
            break;
          }
          break;
        case 'd':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+16, "iv_", 3))
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_fdiv_d;	 // "__builtin_msa_fdiv_d"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_fdiv_w;	 // "__builtin_msa_fdiv_w"
          }
          break;
        case 'f':	 // 4 strings to match.
          if (BuiltinName[16] != 'q')
            break;
          switch (BuiltinName[17]) {
          default: break;
          case 'l':	 // 2 strings to match.
            if (BuiltinName[18] != '_')
              break;
            switch (BuiltinName[19]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_ffql_d;	 // "__builtin_msa_ffql_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_ffql_w;	 // "__builtin_msa_ffql_w"
            }
            break;
          case 'r':	 // 2 strings to match.
            if (BuiltinName[18] != '_')
              break;
            switch (BuiltinName[19]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_ffqr_d;	 // "__builtin_msa_ffqr_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_ffqr_w;	 // "__builtin_msa_ffqr_w"
            }
            break;
          }
          break;
        case 'i':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+16, "ll_", 3))
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_fill_b;	 // "__builtin_msa_fill_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_fill_d;	 // "__builtin_msa_fill_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_fill_h;	 // "__builtin_msa_fill_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_fill_w;	 // "__builtin_msa_fill_w"
          }
          break;
        case 'm':	 // 6 strings to match.
          switch (BuiltinName[16]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+17, "x_", 2))
              break;
            switch (BuiltinName[19]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fmax_d;	 // "__builtin_msa_fmax_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fmax_w;	 // "__builtin_msa_fmax_w"
            }
            break;
          case 'i':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+17, "n_", 2))
              break;
            switch (BuiltinName[19]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fmin_d;	 // "__builtin_msa_fmin_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fmin_w;	 // "__builtin_msa_fmin_w"
            }
            break;
          case 'u':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+17, "l_", 2))
              break;
            switch (BuiltinName[19]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fmul_d;	 // "__builtin_msa_fmul_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fmul_w;	 // "__builtin_msa_fmul_w"
            }
            break;
          }
          break;
        case 'r':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+16, "cp_", 3))
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_frcp_d;	 // "__builtin_msa_frcp_d"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_frcp_w;	 // "__builtin_msa_frcp_w"
          }
          break;
        case 's':	 // 16 strings to match.
          switch (BuiltinName[16]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+17, "f_", 2))
              break;
            switch (BuiltinName[19]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fsaf_d;	 // "__builtin_msa_fsaf_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fsaf_w;	 // "__builtin_msa_fsaf_w"
            }
            break;
          case 'e':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+17, "q_", 2))
              break;
            switch (BuiltinName[19]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fseq_d;	 // "__builtin_msa_fseq_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fseq_w;	 // "__builtin_msa_fseq_w"
            }
            break;
          case 'l':	 // 4 strings to match.
            switch (BuiltinName[17]) {
            default: break;
            case 'e':	 // 2 strings to match.
              if (BuiltinName[18] != '_')
                break;
              switch (BuiltinName[19]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_fsle_d;	 // "__builtin_msa_fsle_d"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_fsle_w;	 // "__builtin_msa_fsle_w"
              }
              break;
            case 't':	 // 2 strings to match.
              if (BuiltinName[18] != '_')
                break;
              switch (BuiltinName[19]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_fslt_d;	 // "__builtin_msa_fslt_d"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_fslt_w;	 // "__builtin_msa_fslt_w"
              }
              break;
            }
            break;
          case 'n':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+17, "e_", 2))
              break;
            switch (BuiltinName[19]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fsne_d;	 // "__builtin_msa_fsne_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fsne_w;	 // "__builtin_msa_fsne_w"
            }
            break;
          case 'o':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+17, "r_", 2))
              break;
            switch (BuiltinName[19]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fsor_d;	 // "__builtin_msa_fsor_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fsor_w;	 // "__builtin_msa_fsor_w"
            }
            break;
          case 'u':	 // 4 strings to match.
            switch (BuiltinName[17]) {
            default: break;
            case 'b':	 // 2 strings to match.
              if (BuiltinName[18] != '_')
                break;
              switch (BuiltinName[19]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_fsub_d;	 // "__builtin_msa_fsub_d"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_fsub_w;	 // "__builtin_msa_fsub_w"
              }
              break;
            case 'n':	 // 2 strings to match.
              if (BuiltinName[18] != '_')
                break;
              switch (BuiltinName[19]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_fsun_d;	 // "__builtin_msa_fsun_d"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_fsun_w;	 // "__builtin_msa_fsun_w"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 'i':	 // 8 strings to match.
        if (memcmp(BuiltinName.data()+15, "lv", 2))
          break;
        switch (BuiltinName[17]) {
        default: break;
        case 'l':	 // 4 strings to match.
          if (BuiltinName[18] != '_')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_ilvl_b;	 // "__builtin_msa_ilvl_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_ilvl_d;	 // "__builtin_msa_ilvl_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_ilvl_h;	 // "__builtin_msa_ilvl_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_ilvl_w;	 // "__builtin_msa_ilvl_w"
          }
          break;
        case 'r':	 // 4 strings to match.
          if (BuiltinName[18] != '_')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_ilvr_b;	 // "__builtin_msa_ilvr_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_ilvr_d;	 // "__builtin_msa_ilvr_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_ilvr_h;	 // "__builtin_msa_ilvr_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_ilvr_w;	 // "__builtin_msa_ilvr_w"
          }
          break;
        }
        break;
      case 'm':	 // 5 strings to match.
        switch (BuiltinName[15]) {
        default: break;
        case 'o':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+16, "ve_v", 4))
            break;
          return Intrinsic::mips_move_v;	 // "__builtin_msa_move_v"
        case 'u':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+16, "lv_", 3))
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_mulv_b;	 // "__builtin_msa_mulv_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_mulv_d;	 // "__builtin_msa_mulv_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_mulv_h;	 // "__builtin_msa_mulv_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_mulv_w;	 // "__builtin_msa_mulv_w"
          }
          break;
        }
        break;
      case 'n':	 // 9 strings to match.
        switch (BuiltinName[15]) {
        default: break;
        case 'l':	 // 8 strings to match.
          switch (BuiltinName[16]) {
          default: break;
          case 'o':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+17, "c_", 2))
              break;
            switch (BuiltinName[19]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_nloc_b;	 // "__builtin_msa_nloc_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_nloc_d;	 // "__builtin_msa_nloc_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_nloc_h;	 // "__builtin_msa_nloc_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_nloc_w;	 // "__builtin_msa_nloc_w"
            }
            break;
          case 'z':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+17, "c_", 2))
              break;
            switch (BuiltinName[19]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_nlzc_b;	 // "__builtin_msa_nlzc_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_nlzc_d;	 // "__builtin_msa_nlzc_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_nlzc_h;	 // "__builtin_msa_nlzc_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_nlzc_w;	 // "__builtin_msa_nlzc_w"
            }
            break;
          }
          break;
        case 'o':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+16, "ri_b", 4))
            break;
          return Intrinsic::mips_nori_b;	 // "__builtin_msa_nori_b"
        }
        break;
      case 'p':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+15, "cnt_", 4))
          break;
        switch (BuiltinName[19]) {
        default: break;
        case 'b':	 // 1 string to match.
          return Intrinsic::mips_pcnt_b;	 // "__builtin_msa_pcnt_b"
        case 'd':	 // 1 string to match.
          return Intrinsic::mips_pcnt_d;	 // "__builtin_msa_pcnt_d"
        case 'h':	 // 1 string to match.
          return Intrinsic::mips_pcnt_h;	 // "__builtin_msa_pcnt_h"
        case 'w':	 // 1 string to match.
          return Intrinsic::mips_pcnt_w;	 // "__builtin_msa_pcnt_w"
        }
        break;
      case 's':	 // 28 strings to match.
        switch (BuiltinName[15]) {
        default: break;
        case 'l':	 // 8 strings to match.
          switch (BuiltinName[16]) {
          default: break;
          case 'd':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+17, "i_", 2))
              break;
            switch (BuiltinName[19]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_sldi_b;	 // "__builtin_msa_sldi_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_sldi_d;	 // "__builtin_msa_sldi_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_sldi_h;	 // "__builtin_msa_sldi_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_sldi_w;	 // "__builtin_msa_sldi_w"
            }
            break;
          case 'l':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+17, "i_", 2))
              break;
            switch (BuiltinName[19]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_slli_b;	 // "__builtin_msa_slli_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_slli_d;	 // "__builtin_msa_slli_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_slli_h;	 // "__builtin_msa_slli_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_slli_w;	 // "__builtin_msa_slli_w"
            }
            break;
          }
          break;
        case 'r':	 // 16 strings to match.
          switch (BuiltinName[16]) {
          default: break;
          case 'a':	 // 8 strings to match.
            switch (BuiltinName[17]) {
            default: break;
            case 'i':	 // 4 strings to match.
              if (BuiltinName[18] != '_')
                break;
              switch (BuiltinName[19]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_srai_b;	 // "__builtin_msa_srai_b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_srai_d;	 // "__builtin_msa_srai_d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_srai_h;	 // "__builtin_msa_srai_h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_srai_w;	 // "__builtin_msa_srai_w"
              }
              break;
            case 'r':	 // 4 strings to match.
              if (BuiltinName[18] != '_')
                break;
              switch (BuiltinName[19]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_srar_b;	 // "__builtin_msa_srar_b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_srar_d;	 // "__builtin_msa_srar_d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_srar_h;	 // "__builtin_msa_srar_h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_srar_w;	 // "__builtin_msa_srar_w"
              }
              break;
            }
            break;
          case 'l':	 // 8 strings to match.
            switch (BuiltinName[17]) {
            default: break;
            case 'i':	 // 4 strings to match.
              if (BuiltinName[18] != '_')
                break;
              switch (BuiltinName[19]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_srli_b;	 // "__builtin_msa_srli_b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_srli_d;	 // "__builtin_msa_srli_d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_srli_h;	 // "__builtin_msa_srli_h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_srli_w;	 // "__builtin_msa_srli_w"
              }
              break;
            case 'r':	 // 4 strings to match.
              if (BuiltinName[18] != '_')
                break;
              switch (BuiltinName[19]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_srlr_b;	 // "__builtin_msa_srlr_b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_srlr_d;	 // "__builtin_msa_srlr_d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_srlr_h;	 // "__builtin_msa_srlr_h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_srlr_w;	 // "__builtin_msa_srlr_w"
              }
              break;
            }
            break;
          }
          break;
        case 'u':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+16, "bv_", 3))
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_subv_b;	 // "__builtin_msa_subv_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_subv_d;	 // "__builtin_msa_subv_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_subv_h;	 // "__builtin_msa_subv_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_subv_w;	 // "__builtin_msa_subv_w"
          }
          break;
        }
        break;
      case 'v':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+15, "shf_", 4))
          break;
        switch (BuiltinName[19]) {
        default: break;
        case 'b':	 // 1 string to match.
          return Intrinsic::mips_vshf_b;	 // "__builtin_msa_vshf_b"
        case 'd':	 // 1 string to match.
          return Intrinsic::mips_vshf_d;	 // "__builtin_msa_vshf_d"
        case 'h':	 // 1 string to match.
          return Intrinsic::mips_vshf_h;	 // "__builtin_msa_vshf_h"
        case 'w':	 // 1 string to match.
          return Intrinsic::mips_vshf_w;	 // "__builtin_msa_vshf_w"
        }
        break;
      case 'x':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+15, "ori_b", 5))
          break;
        return Intrinsic::mips_xori_b;	 // "__builtin_msa_xori_b"
      }
      break;
    }
    break;
  case 21:	 // 186 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_m", 11))
      break;
    switch (BuiltinName[11]) {
    default: break;
    case 'i':	 // 8 strings to match.
      if (memcmp(BuiltinName.data()+12, "ps_", 3))
        break;
      switch (BuiltinName[15]) {
      default: break;
      case 'a':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+16, "ppend", 5))
          break;
        return Intrinsic::mips_append;	 // "__builtin_mips_append"
      case 'b':	 // 2 strings to match.
        switch (BuiltinName[16]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+17, "lign", 4))
            break;
          return Intrinsic::mips_balign;	 // "__builtin_mips_balign"
        case 'i':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+17, "trev", 4))
            break;
          return Intrinsic::mips_bitrev;	 // "__builtin_mips_bitrev"
        }
        break;
      case 'e':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+16, "xt", 2))
          break;
        switch (BuiltinName[18]) {
        default: break;
        case 'p':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+19, "dp", 2))
            break;
          return Intrinsic::mips_extpdp;	 // "__builtin_mips_extpdp"
        case 'r':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+19, "_w", 2))
            break;
          return Intrinsic::mips_extr_w;	 // "__builtin_mips_extr_w"
        }
        break;
      case 'm':	 // 3 strings to match.
        switch (BuiltinName[16]) {
        default: break;
        case 'o':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+17, "dsub", 4))
            break;
          return Intrinsic::mips_modsub;	 // "__builtin_mips_modsub"
        case 't':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+17, "hlip", 4))
            break;
          return Intrinsic::mips_mthlip;	 // "__builtin_mips_mthlip"
        case 'u':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+17, "l_ph", 4))
            break;
          return Intrinsic::mips_mul_ph;	 // "__builtin_mips_mul_ph"
        }
        break;
      }
      break;
    case 's':	 // 178 strings to match.
      if (memcmp(BuiltinName.data()+12, "a_", 2))
        break;
      switch (BuiltinName[14]) {
      default: break;
      case 'a':	 // 16 strings to match.
        switch (BuiltinName[15]) {
        default: break;
        case 'd':	 // 8 strings to match.
          if (BuiltinName[16] != 'd')
            break;
          switch (BuiltinName[17]) {
          default: break;
          case '_':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+18, "a_", 2))
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_add_a_b;	 // "__builtin_msa_add_a_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_add_a_d;	 // "__builtin_msa_add_a_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_add_a_h;	 // "__builtin_msa_add_a_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_add_a_w;	 // "__builtin_msa_add_a_w"
            }
            break;
          case 'v':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+18, "i_", 2))
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_addvi_b;	 // "__builtin_msa_addvi_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_addvi_d;	 // "__builtin_msa_addvi_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_addvi_h;	 // "__builtin_msa_addvi_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_addvi_w;	 // "__builtin_msa_addvi_w"
            }
            break;
          }
          break;
        case 'v':	 // 8 strings to match.
          if (memcmp(BuiltinName.data()+16, "e_", 2))
            break;
          switch (BuiltinName[18]) {
          default: break;
          case 's':	 // 4 strings to match.
            if (BuiltinName[19] != '_')
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_ave_s_b;	 // "__builtin_msa_ave_s_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_ave_s_d;	 // "__builtin_msa_ave_s_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_ave_s_h;	 // "__builtin_msa_ave_s_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_ave_s_w;	 // "__builtin_msa_ave_s_w"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (BuiltinName[19] != '_')
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_ave_u_b;	 // "__builtin_msa_ave_u_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_ave_u_d;	 // "__builtin_msa_ave_u_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_ave_u_h;	 // "__builtin_msa_ave_u_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_ave_u_w;	 // "__builtin_msa_ave_u_w"
            }
            break;
          }
          break;
        }
        break;
      case 'b':	 // 22 strings to match.
        switch (BuiltinName[15]) {
        default: break;
        case 'c':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+16, "lri_", 4))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_bclri_b;	 // "__builtin_msa_bclri_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_bclri_d;	 // "__builtin_msa_bclri_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_bclri_h;	 // "__builtin_msa_bclri_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_bclri_w;	 // "__builtin_msa_bclri_w"
          }
          break;
        case 'i':	 // 8 strings to match.
          if (memcmp(BuiltinName.data()+16, "ns", 2))
            break;
          switch (BuiltinName[18]) {
          default: break;
          case 'l':	 // 4 strings to match.
            if (BuiltinName[19] != '_')
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_binsl_b;	 // "__builtin_msa_binsl_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_binsl_d;	 // "__builtin_msa_binsl_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_binsl_h;	 // "__builtin_msa_binsl_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_binsl_w;	 // "__builtin_msa_binsl_w"
            }
            break;
          case 'r':	 // 4 strings to match.
            if (BuiltinName[19] != '_')
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_binsr_b;	 // "__builtin_msa_binsr_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_binsr_d;	 // "__builtin_msa_binsr_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_binsr_h;	 // "__builtin_msa_binsr_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_binsr_w;	 // "__builtin_msa_binsr_w"
            }
            break;
          }
          break;
        case 'm':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+16, "nzi_b", 5))
            break;
          return Intrinsic::mips_bmnzi_b;	 // "__builtin_msa_bmnzi_b"
        case 'n':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+16, "egi_", 4))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_bnegi_b;	 // "__builtin_msa_bnegi_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_bnegi_d;	 // "__builtin_msa_bnegi_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_bnegi_h;	 // "__builtin_msa_bnegi_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_bnegi_w;	 // "__builtin_msa_bnegi_w"
          }
          break;
        case 's':	 // 5 strings to match.
          if (BuiltinName[16] != 'e')
            break;
          switch (BuiltinName[17]) {
          default: break;
          case 'l':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+18, "i_b", 3))
              break;
            return Intrinsic::mips_bseli_b;	 // "__builtin_msa_bseli_b"
          case 't':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+18, "i_", 2))
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_bseti_b;	 // "__builtin_msa_bseti_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_bseti_d;	 // "__builtin_msa_bseti_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_bseti_h;	 // "__builtin_msa_bseti_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_bseti_w;	 // "__builtin_msa_bseti_w"
            }
            break;
          }
          break;
        }
        break;
      case 'c':	 // 16 strings to match.
        if (BuiltinName[15] != 'l')
          break;
        switch (BuiltinName[16]) {
        default: break;
        case 'e':	 // 8 strings to match.
          if (BuiltinName[17] != '_')
            break;
          switch (BuiltinName[18]) {
          default: break;
          case 's':	 // 4 strings to match.
            if (BuiltinName[19] != '_')
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_cle_s_b;	 // "__builtin_msa_cle_s_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_cle_s_d;	 // "__builtin_msa_cle_s_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_cle_s_h;	 // "__builtin_msa_cle_s_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_cle_s_w;	 // "__builtin_msa_cle_s_w"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (BuiltinName[19] != '_')
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_cle_u_b;	 // "__builtin_msa_cle_u_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_cle_u_d;	 // "__builtin_msa_cle_u_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_cle_u_h;	 // "__builtin_msa_cle_u_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_cle_u_w;	 // "__builtin_msa_cle_u_w"
            }
            break;
          }
          break;
        case 't':	 // 8 strings to match.
          if (BuiltinName[17] != '_')
            break;
          switch (BuiltinName[18]) {
          default: break;
          case 's':	 // 4 strings to match.
            if (BuiltinName[19] != '_')
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_clt_s_b;	 // "__builtin_msa_clt_s_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_clt_s_d;	 // "__builtin_msa_clt_s_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_clt_s_h;	 // "__builtin_msa_clt_s_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_clt_s_w;	 // "__builtin_msa_clt_s_w"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (BuiltinName[19] != '_')
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_clt_u_b;	 // "__builtin_msa_clt_u_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_clt_u_d;	 // "__builtin_msa_clt_u_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_clt_u_h;	 // "__builtin_msa_clt_u_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_clt_u_w;	 // "__builtin_msa_clt_u_w"
            }
            break;
          }
          break;
        }
        break;
      case 'd':	 // 8 strings to match.
        if (memcmp(BuiltinName.data()+15, "iv_", 3))
          break;
        switch (BuiltinName[18]) {
        default: break;
        case 's':	 // 4 strings to match.
          if (BuiltinName[19] != '_')
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_div_s_b;	 // "__builtin_msa_div_s_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_div_s_d;	 // "__builtin_msa_div_s_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_div_s_h;	 // "__builtin_msa_div_s_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_div_s_w;	 // "__builtin_msa_div_s_w"
          }
          break;
        case 'u':	 // 4 strings to match.
          if (BuiltinName[19] != '_')
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_div_u_b;	 // "__builtin_msa_div_u_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_div_u_d;	 // "__builtin_msa_div_u_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_div_u_h;	 // "__builtin_msa_div_u_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_div_u_w;	 // "__builtin_msa_div_u_w"
          }
          break;
        }
        break;
      case 'f':	 // 30 strings to match.
        switch (BuiltinName[15]) {
        default: break;
        case 'c':	 // 8 strings to match.
          if (BuiltinName[16] != 'u')
            break;
          switch (BuiltinName[17]) {
          default: break;
          case 'e':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+18, "q_", 2))
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fcueq_d;	 // "__builtin_msa_fcueq_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fcueq_w;	 // "__builtin_msa_fcueq_w"
            }
            break;
          case 'l':	 // 4 strings to match.
            switch (BuiltinName[18]) {
            default: break;
            case 'e':	 // 2 strings to match.
              if (BuiltinName[19] != '_')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_fcule_d;	 // "__builtin_msa_fcule_d"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_fcule_w;	 // "__builtin_msa_fcule_w"
              }
              break;
            case 't':	 // 2 strings to match.
              if (BuiltinName[19] != '_')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_fcult_d;	 // "__builtin_msa_fcult_d"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_fcult_w;	 // "__builtin_msa_fcult_w"
              }
              break;
            }
            break;
          case 'n':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+18, "e_", 2))
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fcune_d;	 // "__builtin_msa_fcune_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fcune_w;	 // "__builtin_msa_fcune_w"
            }
            break;
          }
          break;
        case 'e':	 // 4 strings to match.
          if (BuiltinName[16] != 'x')
            break;
          switch (BuiltinName[17]) {
          default: break;
          case 'd':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+18, "o_", 2))
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_fexdo_h;	 // "__builtin_msa_fexdo_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fexdo_w;	 // "__builtin_msa_fexdo_w"
            }
            break;
          case 'p':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+18, "2_", 2))
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fexp2_d;	 // "__builtin_msa_fexp2_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fexp2_w;	 // "__builtin_msa_fexp2_w"
            }
            break;
          }
          break;
        case 'l':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+16, "og2_", 4))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_flog2_d;	 // "__builtin_msa_flog2_d"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_flog2_w;	 // "__builtin_msa_flog2_w"
          }
          break;
        case 'm':	 // 4 strings to match.
          switch (BuiltinName[16]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+17, "dd_", 3))
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fmadd_d;	 // "__builtin_msa_fmadd_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fmadd_w;	 // "__builtin_msa_fmadd_w"
            }
            break;
          case 's':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+17, "ub_", 3))
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fmsub_d;	 // "__builtin_msa_fmsub_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fmsub_w;	 // "__builtin_msa_fmsub_w"
            }
            break;
          }
          break;
        case 'r':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+16, "int_", 4))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_frint_d;	 // "__builtin_msa_frint_d"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_frint_w;	 // "__builtin_msa_frint_w"
          }
          break;
        case 's':	 // 10 strings to match.
          switch (BuiltinName[16]) {
          default: break;
          case 'q':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+17, "rt_", 3))
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fsqrt_d;	 // "__builtin_msa_fsqrt_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fsqrt_w;	 // "__builtin_msa_fsqrt_w"
            }
            break;
          case 'u':	 // 8 strings to match.
            switch (BuiltinName[17]) {
            default: break;
            case 'e':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+18, "q_", 2))
                break;
              switch (BuiltinName[20]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_fsueq_d;	 // "__builtin_msa_fsueq_d"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_fsueq_w;	 // "__builtin_msa_fsueq_w"
              }
              break;
            case 'l':	 // 4 strings to match.
              switch (BuiltinName[18]) {
              default: break;
              case 'e':	 // 2 strings to match.
                if (BuiltinName[19] != '_')
                  break;
                switch (BuiltinName[20]) {
                default: break;
                case 'd':	 // 1 string to match.
                  return Intrinsic::mips_fsule_d;	 // "__builtin_msa_fsule_d"
                case 'w':	 // 1 string to match.
                  return Intrinsic::mips_fsule_w;	 // "__builtin_msa_fsule_w"
                }
                break;
              case 't':	 // 2 strings to match.
                if (BuiltinName[19] != '_')
                  break;
                switch (BuiltinName[20]) {
                default: break;
                case 'd':	 // 1 string to match.
                  return Intrinsic::mips_fsult_d;	 // "__builtin_msa_fsult_d"
                case 'w':	 // 1 string to match.
                  return Intrinsic::mips_fsult_w;	 // "__builtin_msa_fsult_w"
                }
                break;
              }
              break;
            case 'n':	 // 2 strings to match.
              if (memcmp(BuiltinName.data()+18, "e_", 2))
                break;
              switch (BuiltinName[20]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_fsune_d;	 // "__builtin_msa_fsune_d"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_fsune_w;	 // "__builtin_msa_fsune_w"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 'i':	 // 12 strings to match.
        switch (BuiltinName[15]) {
        default: break;
        case 'l':	 // 8 strings to match.
          if (BuiltinName[16] != 'v')
            break;
          switch (BuiltinName[17]) {
          default: break;
          case 'e':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+18, "v_", 2))
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_ilvev_b;	 // "__builtin_msa_ilvev_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_ilvev_d;	 // "__builtin_msa_ilvev_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_ilvev_h;	 // "__builtin_msa_ilvev_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_ilvev_w;	 // "__builtin_msa_ilvev_w"
            }
            break;
          case 'o':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+18, "d_", 2))
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_ilvod_b;	 // "__builtin_msa_ilvod_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_ilvod_d;	 // "__builtin_msa_ilvod_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_ilvod_h;	 // "__builtin_msa_ilvod_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_ilvod_w;	 // "__builtin_msa_ilvod_w"
            }
            break;
          }
          break;
        case 'n':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+16, "sve_", 4))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_insve_b;	 // "__builtin_msa_insve_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_insve_d;	 // "__builtin_msa_insve_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_insve_h;	 // "__builtin_msa_insve_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_insve_w;	 // "__builtin_msa_insve_w"
          }
          break;
        }
        break;
      case 'm':	 // 42 strings to match.
        switch (BuiltinName[15]) {
        default: break;
        case 'a':	 // 16 strings to match.
          switch (BuiltinName[16]) {
          default: break;
          case 'd':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+17, "dv_", 3))
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_maddv_b;	 // "__builtin_msa_maddv_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_maddv_d;	 // "__builtin_msa_maddv_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_maddv_h;	 // "__builtin_msa_maddv_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_maddv_w;	 // "__builtin_msa_maddv_w"
            }
            break;
          case 'x':	 // 12 strings to match.
            if (BuiltinName[17] != '_')
              break;
            switch (BuiltinName[18]) {
            default: break;
            case 'a':	 // 4 strings to match.
              if (BuiltinName[19] != '_')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_max_a_b;	 // "__builtin_msa_max_a_b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_max_a_d;	 // "__builtin_msa_max_a_d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_max_a_h;	 // "__builtin_msa_max_a_h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_max_a_w;	 // "__builtin_msa_max_a_w"
              }
              break;
            case 's':	 // 4 strings to match.
              if (BuiltinName[19] != '_')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_max_s_b;	 // "__builtin_msa_max_s_b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_max_s_d;	 // "__builtin_msa_max_s_d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_max_s_h;	 // "__builtin_msa_max_s_h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_max_s_w;	 // "__builtin_msa_max_s_w"
              }
              break;
            case 'u':	 // 4 strings to match.
              if (BuiltinName[19] != '_')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_max_u_b;	 // "__builtin_msa_max_u_b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_max_u_d;	 // "__builtin_msa_max_u_d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_max_u_h;	 // "__builtin_msa_max_u_h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_max_u_w;	 // "__builtin_msa_max_u_w"
              }
              break;
            }
            break;
          }
          break;
        case 'i':	 // 12 strings to match.
          if (memcmp(BuiltinName.data()+16, "n_", 2))
            break;
          switch (BuiltinName[18]) {
          default: break;
          case 'a':	 // 4 strings to match.
            if (BuiltinName[19] != '_')
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_min_a_b;	 // "__builtin_msa_min_a_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_min_a_d;	 // "__builtin_msa_min_a_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_min_a_h;	 // "__builtin_msa_min_a_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_min_a_w;	 // "__builtin_msa_min_a_w"
            }
            break;
          case 's':	 // 4 strings to match.
            if (BuiltinName[19] != '_')
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_min_s_b;	 // "__builtin_msa_min_s_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_min_s_d;	 // "__builtin_msa_min_s_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_min_s_h;	 // "__builtin_msa_min_s_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_min_s_w;	 // "__builtin_msa_min_s_w"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (BuiltinName[19] != '_')
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_min_u_b;	 // "__builtin_msa_min_u_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_min_u_d;	 // "__builtin_msa_min_u_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_min_u_h;	 // "__builtin_msa_min_u_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_min_u_w;	 // "__builtin_msa_min_u_w"
            }
            break;
          }
          break;
        case 'o':	 // 8 strings to match.
          if (memcmp(BuiltinName.data()+16, "d_", 2))
            break;
          switch (BuiltinName[18]) {
          default: break;
          case 's':	 // 4 strings to match.
            if (BuiltinName[19] != '_')
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_mod_s_b;	 // "__builtin_msa_mod_s_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_mod_s_d;	 // "__builtin_msa_mod_s_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_mod_s_h;	 // "__builtin_msa_mod_s_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_mod_s_w;	 // "__builtin_msa_mod_s_w"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (BuiltinName[19] != '_')
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_mod_u_b;	 // "__builtin_msa_mod_u_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_mod_u_d;	 // "__builtin_msa_mod_u_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_mod_u_h;	 // "__builtin_msa_mod_u_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_mod_u_w;	 // "__builtin_msa_mod_u_w"
            }
            break;
          }
          break;
        case 's':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+16, "ubv_", 4))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_msubv_b;	 // "__builtin_msa_msubv_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_msubv_d;	 // "__builtin_msa_msubv_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_msubv_h;	 // "__builtin_msa_msubv_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_msubv_w;	 // "__builtin_msa_msubv_w"
          }
          break;
        case 'u':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+16, "l_q_", 4))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_mul_q_h;	 // "__builtin_msa_mul_q_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_mul_q_w;	 // "__builtin_msa_mul_q_w"
          }
          break;
        }
        break;
      case 'p':	 // 8 strings to match.
        if (memcmp(BuiltinName.data()+15, "ck", 2))
          break;
        switch (BuiltinName[17]) {
        default: break;
        case 'e':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+18, "v_", 2))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_pckev_b;	 // "__builtin_msa_pckev_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_pckev_d;	 // "__builtin_msa_pckev_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_pckev_h;	 // "__builtin_msa_pckev_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_pckev_w;	 // "__builtin_msa_pckev_w"
          }
          break;
        case 'o':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+18, "d_", 2))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_pckod_b;	 // "__builtin_msa_pckod_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_pckod_d;	 // "__builtin_msa_pckod_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_pckod_h;	 // "__builtin_msa_pckod_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_pckod_w;	 // "__builtin_msa_pckod_w"
          }
          break;
        }
        break;
      case 's':	 // 24 strings to match.
        switch (BuiltinName[15]) {
        default: break;
        case 'a':	 // 8 strings to match.
          if (memcmp(BuiltinName.data()+16, "t_", 2))
            break;
          switch (BuiltinName[18]) {
          default: break;
          case 's':	 // 4 strings to match.
            if (BuiltinName[19] != '_')
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_sat_s_b;	 // "__builtin_msa_sat_s_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_sat_s_d;	 // "__builtin_msa_sat_s_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_sat_s_h;	 // "__builtin_msa_sat_s_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_sat_s_w;	 // "__builtin_msa_sat_s_w"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (BuiltinName[19] != '_')
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_sat_u_b;	 // "__builtin_msa_sat_u_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_sat_u_d;	 // "__builtin_msa_sat_u_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_sat_u_h;	 // "__builtin_msa_sat_u_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_sat_u_w;	 // "__builtin_msa_sat_u_w"
            }
            break;
          }
          break;
        case 'p':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+16, "lat_", 4))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_splat_b;	 // "__builtin_msa_splat_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_splat_d;	 // "__builtin_msa_splat_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_splat_h;	 // "__builtin_msa_splat_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_splat_w;	 // "__builtin_msa_splat_w"
          }
          break;
        case 'r':	 // 8 strings to match.
          switch (BuiltinName[16]) {
          default: break;
          case 'a':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+17, "ri_", 3))
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_srari_b;	 // "__builtin_msa_srari_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_srari_d;	 // "__builtin_msa_srari_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_srari_h;	 // "__builtin_msa_srari_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_srari_w;	 // "__builtin_msa_srari_w"
            }
            break;
          case 'l':	 // 4 strings to match.
            if (memcmp(BuiltinName.data()+17, "ri_", 3))
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_srlri_b;	 // "__builtin_msa_srlri_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_srlri_d;	 // "__builtin_msa_srlri_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_srlri_h;	 // "__builtin_msa_srlri_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_srlri_w;	 // "__builtin_msa_srlri_w"
            }
            break;
          }
          break;
        case 'u':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+16, "bvi_", 4))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_subvi_b;	 // "__builtin_msa_subvi_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_subvi_d;	 // "__builtin_msa_subvi_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_subvi_h;	 // "__builtin_msa_subvi_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_subvi_w;	 // "__builtin_msa_subvi_w"
          }
          break;
        }
        break;
      }
      break;
    }
    break;
  case 22:	 // 147 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_m", 11))
      break;
    switch (BuiltinName[11]) {
    default: break;
    case 'i':	 // 19 strings to match.
      if (memcmp(BuiltinName.data()+12, "ps_", 3))
        break;
      switch (BuiltinName[15]) {
      default: break;
      case 'a':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+16, "dd", 2))
          break;
        switch (BuiltinName[18]) {
        default: break;
        case 'q':	 // 2 strings to match.
          switch (BuiltinName[19]) {
          default: break;
          case '_':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+20, "ph", 2))
              break;
            return Intrinsic::mips_addq_ph;	 // "__builtin_mips_addq_ph"
          case 'h':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+20, "_w", 2))
              break;
            return Intrinsic::mips_addqh_w;	 // "__builtin_mips_addqh_w"
          }
          break;
        case 'u':	 // 2 strings to match.
          if (BuiltinName[19] != '_')
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'p':	 // 1 string to match.
            if (BuiltinName[21] != 'h')
              break;
            return Intrinsic::mips_addu_ph;	 // "__builtin_mips_addu_ph"
          case 'q':	 // 1 string to match.
            if (BuiltinName[21] != 'b')
              break;
            return Intrinsic::mips_addu_qb;	 // "__builtin_mips_addu_qb"
          }
          break;
        }
        break;
      case 'p':	 // 3 strings to match.
        switch (BuiltinName[16]) {
        default: break;
        case 'i':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+17, "ck_", 3))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'p':	 // 1 string to match.
            if (BuiltinName[21] != 'h')
              break;
            return Intrinsic::mips_pick_ph;	 // "__builtin_mips_pick_ph"
          case 'q':	 // 1 string to match.
            if (BuiltinName[21] != 'b')
              break;
            return Intrinsic::mips_pick_qb;	 // "__builtin_mips_pick_qb"
          }
          break;
        case 'r':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+17, "epend", 5))
            break;
          return Intrinsic::mips_prepend;	 // "__builtin_mips_prepend"
        }
        break;
      case 'r':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+16, "epl_", 4))
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'p':	 // 1 string to match.
          if (BuiltinName[21] != 'h')
            break;
          return Intrinsic::mips_repl_ph;	 // "__builtin_mips_repl_ph"
        case 'q':	 // 1 string to match.
          if (BuiltinName[21] != 'b')
            break;
          return Intrinsic::mips_repl_qb;	 // "__builtin_mips_repl_qb"
        }
        break;
      case 's':	 // 10 strings to match.
        switch (BuiltinName[16]) {
        default: break;
        case 'h':	 // 6 strings to match.
          switch (BuiltinName[17]) {
          default: break;
          case 'l':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+18, "l_", 2))
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'p':	 // 1 string to match.
              if (BuiltinName[21] != 'h')
                break;
              return Intrinsic::mips_shll_ph;	 // "__builtin_mips_shll_ph"
            case 'q':	 // 1 string to match.
              if (BuiltinName[21] != 'b')
                break;
              return Intrinsic::mips_shll_qb;	 // "__builtin_mips_shll_qb"
            }
            break;
          case 'r':	 // 4 strings to match.
            switch (BuiltinName[18]) {
            default: break;
            case 'a':	 // 2 strings to match.
              if (BuiltinName[19] != '_')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case 'p':	 // 1 string to match.
                if (BuiltinName[21] != 'h')
                  break;
                return Intrinsic::mips_shra_ph;	 // "__builtin_mips_shra_ph"
              case 'q':	 // 1 string to match.
                if (BuiltinName[21] != 'b')
                  break;
                return Intrinsic::mips_shra_qb;	 // "__builtin_mips_shra_qb"
              }
              break;
            case 'l':	 // 2 strings to match.
              if (BuiltinName[19] != '_')
                break;
              switch (BuiltinName[20]) {
              default: break;
              case 'p':	 // 1 string to match.
                if (BuiltinName[21] != 'h')
                  break;
                return Intrinsic::mips_shrl_ph;	 // "__builtin_mips_shrl_ph"
              case 'q':	 // 1 string to match.
                if (BuiltinName[21] != 'b')
                  break;
                return Intrinsic::mips_shrl_qb;	 // "__builtin_mips_shrl_qb"
              }
              break;
            }
            break;
          }
          break;
        case 'u':	 // 4 strings to match.
          if (BuiltinName[17] != 'b')
            break;
          switch (BuiltinName[18]) {
          default: break;
          case 'q':	 // 2 strings to match.
            switch (BuiltinName[19]) {
            default: break;
            case '_':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+20, "ph", 2))
                break;
              return Intrinsic::mips_subq_ph;	 // "__builtin_mips_subq_ph"
            case 'h':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+20, "_w", 2))
                break;
              return Intrinsic::mips_subqh_w;	 // "__builtin_mips_subqh_w"
            }
            break;
          case 'u':	 // 2 strings to match.
            if (BuiltinName[19] != '_')
              break;
            switch (BuiltinName[20]) {
            default: break;
            case 'p':	 // 1 string to match.
              if (BuiltinName[21] != 'h')
                break;
              return Intrinsic::mips_subu_ph;	 // "__builtin_mips_subu_ph"
            case 'q':	 // 1 string to match.
              if (BuiltinName[21] != 'b')
                break;
              return Intrinsic::mips_subu_qb;	 // "__builtin_mips_subu_qb"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 's':	 // 128 strings to match.
      if (memcmp(BuiltinName.data()+12, "a_", 2))
        break;
      switch (BuiltinName[14]) {
      default: break;
      case 'a':	 // 28 strings to match.
        switch (BuiltinName[15]) {
        default: break;
        case 'd':	 // 12 strings to match.
          if (memcmp(BuiltinName.data()+16, "ds_", 3))
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'a':	 // 4 strings to match.
            if (BuiltinName[20] != '_')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_adds_a_b;	 // "__builtin_msa_adds_a_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_adds_a_d;	 // "__builtin_msa_adds_a_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_adds_a_h;	 // "__builtin_msa_adds_a_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_adds_a_w;	 // "__builtin_msa_adds_a_w"
            }
            break;
          case 's':	 // 4 strings to match.
            if (BuiltinName[20] != '_')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_adds_s_b;	 // "__builtin_msa_adds_s_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_adds_s_d;	 // "__builtin_msa_adds_s_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_adds_s_h;	 // "__builtin_msa_adds_s_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_adds_s_w;	 // "__builtin_msa_adds_s_w"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (BuiltinName[20] != '_')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_adds_u_b;	 // "__builtin_msa_adds_u_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_adds_u_d;	 // "__builtin_msa_adds_u_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_adds_u_h;	 // "__builtin_msa_adds_u_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_adds_u_w;	 // "__builtin_msa_adds_u_w"
            }
            break;
          }
          break;
        case 's':	 // 8 strings to match.
          if (memcmp(BuiltinName.data()+16, "ub_", 3))
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 's':	 // 4 strings to match.
            if (BuiltinName[20] != '_')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_asub_s_b;	 // "__builtin_msa_asub_s_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_asub_s_d;	 // "__builtin_msa_asub_s_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_asub_s_h;	 // "__builtin_msa_asub_s_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_asub_s_w;	 // "__builtin_msa_asub_s_w"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (BuiltinName[20] != '_')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_asub_u_b;	 // "__builtin_msa_asub_u_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_asub_u_d;	 // "__builtin_msa_asub_u_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_asub_u_h;	 // "__builtin_msa_asub_u_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_asub_u_w;	 // "__builtin_msa_asub_u_w"
            }
            break;
          }
          break;
        case 'v':	 // 8 strings to match.
          if (memcmp(BuiltinName.data()+16, "er_", 3))
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 's':	 // 4 strings to match.
            if (BuiltinName[20] != '_')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_aver_s_b;	 // "__builtin_msa_aver_s_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_aver_s_d;	 // "__builtin_msa_aver_s_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_aver_s_h;	 // "__builtin_msa_aver_s_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_aver_s_w;	 // "__builtin_msa_aver_s_w"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (BuiltinName[20] != '_')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_aver_u_b;	 // "__builtin_msa_aver_u_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_aver_u_d;	 // "__builtin_msa_aver_u_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_aver_u_h;	 // "__builtin_msa_aver_u_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_aver_u_w;	 // "__builtin_msa_aver_u_w"
            }
            break;
          }
          break;
        }
        break;
      case 'b':	 // 8 strings to match.
        if (memcmp(BuiltinName.data()+15, "ins", 3))
          break;
        switch (BuiltinName[18]) {
        default: break;
        case 'l':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+19, "i_", 2))
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_binsli_b;	 // "__builtin_msa_binsli_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_binsli_d;	 // "__builtin_msa_binsli_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_binsli_h;	 // "__builtin_msa_binsli_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_binsli_w;	 // "__builtin_msa_binsli_w"
          }
          break;
        case 'r':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+19, "i_", 2))
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_binsri_b;	 // "__builtin_msa_binsri_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_binsri_d;	 // "__builtin_msa_binsri_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_binsri_h;	 // "__builtin_msa_binsri_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_binsri_w;	 // "__builtin_msa_binsri_w"
          }
          break;
        }
        break;
      case 'c':	 // 24 strings to match.
        switch (BuiltinName[15]) {
        default: break;
        case 'l':	 // 16 strings to match.
          switch (BuiltinName[16]) {
          default: break;
          case 'e':	 // 8 strings to match.
            if (memcmp(BuiltinName.data()+17, "i_", 2))
              break;
            switch (BuiltinName[19]) {
            default: break;
            case 's':	 // 4 strings to match.
              if (BuiltinName[20] != '_')
                break;
              switch (BuiltinName[21]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_clei_s_b;	 // "__builtin_msa_clei_s_b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_clei_s_d;	 // "__builtin_msa_clei_s_d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_clei_s_h;	 // "__builtin_msa_clei_s_h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_clei_s_w;	 // "__builtin_msa_clei_s_w"
              }
              break;
            case 'u':	 // 4 strings to match.
              if (BuiltinName[20] != '_')
                break;
              switch (BuiltinName[21]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_clei_u_b;	 // "__builtin_msa_clei_u_b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_clei_u_d;	 // "__builtin_msa_clei_u_d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_clei_u_h;	 // "__builtin_msa_clei_u_h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_clei_u_w;	 // "__builtin_msa_clei_u_w"
              }
              break;
            }
            break;
          case 't':	 // 8 strings to match.
            if (memcmp(BuiltinName.data()+17, "i_", 2))
              break;
            switch (BuiltinName[19]) {
            default: break;
            case 's':	 // 4 strings to match.
              if (BuiltinName[20] != '_')
                break;
              switch (BuiltinName[21]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_clti_s_b;	 // "__builtin_msa_clti_s_b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_clti_s_d;	 // "__builtin_msa_clti_s_d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_clti_s_h;	 // "__builtin_msa_clti_s_h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_clti_s_w;	 // "__builtin_msa_clti_s_w"
              }
              break;
            case 'u':	 // 4 strings to match.
              if (BuiltinName[20] != '_')
                break;
              switch (BuiltinName[21]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_clti_u_b;	 // "__builtin_msa_clti_u_b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_clti_u_d;	 // "__builtin_msa_clti_u_d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_clti_u_h;	 // "__builtin_msa_clti_u_h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_clti_u_w;	 // "__builtin_msa_clti_u_w"
              }
              break;
            }
            break;
          }
          break;
        case 'o':	 // 8 strings to match.
          if (memcmp(BuiltinName.data()+16, "py_", 3))
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 's':	 // 4 strings to match.
            if (BuiltinName[20] != '_')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_copy_s_b;	 // "__builtin_msa_copy_s_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_copy_s_d;	 // "__builtin_msa_copy_s_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_copy_s_h;	 // "__builtin_msa_copy_s_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_copy_s_w;	 // "__builtin_msa_copy_s_w"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (BuiltinName[20] != '_')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_copy_u_b;	 // "__builtin_msa_copy_u_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_copy_u_d;	 // "__builtin_msa_copy_u_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_copy_u_h;	 // "__builtin_msa_copy_u_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_copy_u_w;	 // "__builtin_msa_copy_u_w"
            }
            break;
          }
          break;
        }
        break;
      case 'd':	 // 6 strings to match.
        if (memcmp(BuiltinName.data()+15, "otp_", 4))
          break;
        switch (BuiltinName[19]) {
        default: break;
        case 's':	 // 3 strings to match.
          if (BuiltinName[20] != '_')
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_dotp_s_d;	 // "__builtin_msa_dotp_s_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_dotp_s_h;	 // "__builtin_msa_dotp_s_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_dotp_s_w;	 // "__builtin_msa_dotp_s_w"
          }
          break;
        case 'u':	 // 3 strings to match.
          if (BuiltinName[20] != '_')
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_dotp_u_d;	 // "__builtin_msa_dotp_u_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_dotp_u_h;	 // "__builtin_msa_dotp_u_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_dotp_u_w;	 // "__builtin_msa_dotp_u_w"
          }
          break;
        }
        break;
      case 'f':	 // 12 strings to match.
        switch (BuiltinName[15]) {
        default: break;
        case 'c':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+16, "lass_", 5))
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_fclass_d;	 // "__builtin_msa_fclass_d"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_fclass_w;	 // "__builtin_msa_fclass_w"
          }
          break;
        case 'e':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+16, "xup", 3))
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'l':	 // 2 strings to match.
            if (BuiltinName[20] != '_')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fexupl_d;	 // "__builtin_msa_fexupl_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fexupl_w;	 // "__builtin_msa_fexupl_w"
            }
            break;
          case 'r':	 // 2 strings to match.
            if (BuiltinName[20] != '_')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fexupr_d;	 // "__builtin_msa_fexupr_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fexupr_w;	 // "__builtin_msa_fexupr_w"
            }
            break;
          }
          break;
        case 'm':	 // 4 strings to match.
          switch (BuiltinName[16]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+17, "x_a_", 4))
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fmax_a_d;	 // "__builtin_msa_fmax_a_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fmax_a_w;	 // "__builtin_msa_fmax_a_w"
            }
            break;
          case 'i':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+17, "n_a_", 4))
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_fmin_a_d;	 // "__builtin_msa_fmin_a_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_fmin_a_w;	 // "__builtin_msa_fmin_a_w"
            }
            break;
          }
          break;
        case 'r':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+16, "sqrt_", 5))
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_frsqrt_d;	 // "__builtin_msa_frsqrt_d"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_frsqrt_w;	 // "__builtin_msa_frsqrt_w"
          }
          break;
        }
        break;
      case 'h':	 // 12 strings to match.
        switch (BuiltinName[15]) {
        default: break;
        case 'a':	 // 6 strings to match.
          if (memcmp(BuiltinName.data()+16, "dd_", 3))
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 's':	 // 3 strings to match.
            if (BuiltinName[20] != '_')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_hadd_s_d;	 // "__builtin_msa_hadd_s_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_hadd_s_h;	 // "__builtin_msa_hadd_s_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_hadd_s_w;	 // "__builtin_msa_hadd_s_w"
            }
            break;
          case 'u':	 // 3 strings to match.
            if (BuiltinName[20] != '_')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_hadd_u_d;	 // "__builtin_msa_hadd_u_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_hadd_u_h;	 // "__builtin_msa_hadd_u_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_hadd_u_w;	 // "__builtin_msa_hadd_u_w"
            }
            break;
          }
          break;
        case 's':	 // 6 strings to match.
          if (memcmp(BuiltinName.data()+16, "ub_", 3))
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 's':	 // 3 strings to match.
            if (BuiltinName[20] != '_')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_hsub_s_d;	 // "__builtin_msa_hsub_s_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_hsub_s_h;	 // "__builtin_msa_hsub_s_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_hsub_s_w;	 // "__builtin_msa_hsub_s_w"
            }
            break;
          case 'u':	 // 3 strings to match.
            if (BuiltinName[20] != '_')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_hsub_u_d;	 // "__builtin_msa_hsub_u_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_hsub_u_h;	 // "__builtin_msa_hsub_u_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_hsub_u_w;	 // "__builtin_msa_hsub_u_w"
            }
            break;
          }
          break;
        }
        break;
      case 'i':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+15, "nsert_", 6))
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'b':	 // 1 string to match.
          return Intrinsic::mips_insert_b;	 // "__builtin_msa_insert_b"
        case 'd':	 // 1 string to match.
          return Intrinsic::mips_insert_d;	 // "__builtin_msa_insert_d"
        case 'h':	 // 1 string to match.
          return Intrinsic::mips_insert_h;	 // "__builtin_msa_insert_h"
        case 'w':	 // 1 string to match.
          return Intrinsic::mips_insert_w;	 // "__builtin_msa_insert_w"
        }
        break;
      case 'm':	 // 22 strings to match.
        switch (BuiltinName[15]) {
        default: break;
        case 'a':	 // 10 strings to match.
          switch (BuiltinName[16]) {
          default: break;
          case 'd':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+17, "d_q_", 4))
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_madd_q_h;	 // "__builtin_msa_madd_q_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_madd_q_w;	 // "__builtin_msa_madd_q_w"
            }
            break;
          case 'x':	 // 8 strings to match.
            if (memcmp(BuiltinName.data()+17, "i_", 2))
              break;
            switch (BuiltinName[19]) {
            default: break;
            case 's':	 // 4 strings to match.
              if (BuiltinName[20] != '_')
                break;
              switch (BuiltinName[21]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_maxi_s_b;	 // "__builtin_msa_maxi_s_b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_maxi_s_d;	 // "__builtin_msa_maxi_s_d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_maxi_s_h;	 // "__builtin_msa_maxi_s_h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_maxi_s_w;	 // "__builtin_msa_maxi_s_w"
              }
              break;
            case 'u':	 // 4 strings to match.
              if (BuiltinName[20] != '_')
                break;
              switch (BuiltinName[21]) {
              default: break;
              case 'b':	 // 1 string to match.
                return Intrinsic::mips_maxi_u_b;	 // "__builtin_msa_maxi_u_b"
              case 'd':	 // 1 string to match.
                return Intrinsic::mips_maxi_u_d;	 // "__builtin_msa_maxi_u_d"
              case 'h':	 // 1 string to match.
                return Intrinsic::mips_maxi_u_h;	 // "__builtin_msa_maxi_u_h"
              case 'w':	 // 1 string to match.
                return Intrinsic::mips_maxi_u_w;	 // "__builtin_msa_maxi_u_w"
              }
              break;
            }
            break;
          }
          break;
        case 'i':	 // 8 strings to match.
          if (memcmp(BuiltinName.data()+16, "ni_", 3))
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 's':	 // 4 strings to match.
            if (BuiltinName[20] != '_')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_mini_s_b;	 // "__builtin_msa_mini_s_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_mini_s_d;	 // "__builtin_msa_mini_s_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_mini_s_h;	 // "__builtin_msa_mini_s_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_mini_s_w;	 // "__builtin_msa_mini_s_w"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (BuiltinName[20] != '_')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_mini_u_b;	 // "__builtin_msa_mini_u_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_mini_u_d;	 // "__builtin_msa_mini_u_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_mini_u_h;	 // "__builtin_msa_mini_u_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_mini_u_w;	 // "__builtin_msa_mini_u_w"
            }
            break;
          }
          break;
        case 's':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+16, "ub_q_", 5))
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_msub_q_h;	 // "__builtin_msa_msub_q_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_msub_q_w;	 // "__builtin_msa_msub_q_w"
          }
          break;
        case 'u':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+16, "lr_q_", 5))
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_mulr_q_h;	 // "__builtin_msa_mulr_q_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_mulr_q_w;	 // "__builtin_msa_mulr_q_w"
          }
          break;
        }
        break;
      case 's':	 // 12 strings to match.
        switch (BuiltinName[15]) {
        default: break;
        case 'p':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+16, "lati_", 5))
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_splati_b;	 // "__builtin_msa_splati_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_splati_d;	 // "__builtin_msa_splati_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_splati_h;	 // "__builtin_msa_splati_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_splati_w;	 // "__builtin_msa_splati_w"
          }
          break;
        case 'u':	 // 8 strings to match.
          if (memcmp(BuiltinName.data()+16, "bs_", 3))
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 's':	 // 4 strings to match.
            if (BuiltinName[20] != '_')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_subs_s_b;	 // "__builtin_msa_subs_s_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_subs_s_d;	 // "__builtin_msa_subs_s_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_subs_s_h;	 // "__builtin_msa_subs_s_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_subs_s_w;	 // "__builtin_msa_subs_s_w"
            }
            break;
          case 'u':	 // 4 strings to match.
            if (BuiltinName[20] != '_')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::mips_subs_u_b;	 // "__builtin_msa_subs_u_b"
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_subs_u_d;	 // "__builtin_msa_subs_u_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_subs_u_h;	 // "__builtin_msa_subs_u_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_subs_u_w;	 // "__builtin_msa_subs_u_w"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    }
    break;
  case 23:	 // 40 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_m", 11))
      break;
    switch (BuiltinName[11]) {
    default: break;
    case 'i':	 // 16 strings to match.
      if (memcmp(BuiltinName.data()+12, "ps_", 3))
        break;
      switch (BuiltinName[15]) {
      default: break;
      case 'a':	 // 4 strings to match.
        switch (BuiltinName[16]) {
        default: break;
        case 'b':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+17, "sq_s_w", 6))
            break;
          return Intrinsic::mips_absq_s_w;	 // "__builtin_mips_absq_s_w"
        case 'd':	 // 3 strings to match.
          if (BuiltinName[17] != 'd')
            break;
          switch (BuiltinName[18]) {
          default: break;
          case 'q':	 // 2 strings to match.
            switch (BuiltinName[19]) {
            default: break;
            case '_':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+20, "s_w", 3))
                break;
              return Intrinsic::mips_addq_s_w;	 // "__builtin_mips_addq_s_w"
            case 'h':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+20, "_ph", 3))
                break;
              return Intrinsic::mips_addqh_ph;	 // "__builtin_mips_addqh_ph"
            }
            break;
          case 'u':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+19, "h_qb", 4))
              break;
            return Intrinsic::mips_adduh_qb;	 // "__builtin_mips_adduh_qb"
          }
          break;
        }
        break;
      case 'b':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+16, "posge32", 7))
          break;
        return Intrinsic::mips_bposge32;	 // "__builtin_mips_bposge32"
      case 'd':	 // 2 strings to match.
        if (BuiltinName[16] != 'p')
          break;
        switch (BuiltinName[17]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "_w_ph", 5))
            break;
          return Intrinsic::mips_dpa_w_ph;	 // "__builtin_mips_dpa_w_ph"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "_w_ph", 5))
            break;
          return Intrinsic::mips_dps_w_ph;	 // "__builtin_mips_dps_w_ph"
        }
        break;
      case 'e':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+16, "xtr_", 4))
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'r':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "_w", 2))
            break;
          return Intrinsic::mips_extr_r_w;	 // "__builtin_mips_extr_r_w"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "_h", 2))
            break;
          return Intrinsic::mips_extr_s_h;	 // "__builtin_mips_extr_s_h"
        }
        break;
      case 'm':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+16, "ul", 2))
          break;
        switch (BuiltinName[18]) {
        default: break;
        case '_':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+19, "s_ph", 4))
            break;
          return Intrinsic::mips_mul_s_ph;	 // "__builtin_mips_mul_s_ph"
        case 'q':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+19, "_s_w", 4))
            break;
          return Intrinsic::mips_mulq_s_w;	 // "__builtin_mips_mulq_s_w"
        }
        break;
      case 's':	 // 5 strings to match.
        switch (BuiltinName[16]) {
        default: break;
        case 'h':	 // 2 strings to match.
          switch (BuiltinName[17]) {
          default: break;
          case 'l':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+18, "l_s_w", 5))
              break;
            return Intrinsic::mips_shll_s_w;	 // "__builtin_mips_shll_s_w"
          case 'r':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+18, "a_r_w", 5))
              break;
            return Intrinsic::mips_shra_r_w;	 // "__builtin_mips_shra_r_w"
          }
          break;
        case 'u':	 // 3 strings to match.
          if (BuiltinName[17] != 'b')
            break;
          switch (BuiltinName[18]) {
          default: break;
          case 'q':	 // 2 strings to match.
            switch (BuiltinName[19]) {
            default: break;
            case '_':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+20, "s_w", 3))
                break;
              return Intrinsic::mips_subq_s_w;	 // "__builtin_mips_subq_s_w"
            case 'h':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+20, "_ph", 3))
                break;
              return Intrinsic::mips_subqh_ph;	 // "__builtin_mips_subqh_ph"
            }
            break;
          case 'u':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+19, "h_qb", 4))
              break;
            return Intrinsic::mips_subuh_qb;	 // "__builtin_mips_subuh_qb"
          }
          break;
        }
        break;
      }
      break;
    case 's':	 // 24 strings to match.
      if (memcmp(BuiltinName.data()+12, "a_", 2))
        break;
      switch (BuiltinName[14]) {
      default: break;
      case 'd':	 // 12 strings to match.
        if (BuiltinName[15] != 'p')
          break;
        switch (BuiltinName[16]) {
        default: break;
        case 'a':	 // 6 strings to match.
          if (memcmp(BuiltinName.data()+17, "dd_", 3))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 's':	 // 3 strings to match.
            if (BuiltinName[21] != '_')
              break;
            switch (BuiltinName[22]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_dpadd_s_d;	 // "__builtin_msa_dpadd_s_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_dpadd_s_h;	 // "__builtin_msa_dpadd_s_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_dpadd_s_w;	 // "__builtin_msa_dpadd_s_w"
            }
            break;
          case 'u':	 // 3 strings to match.
            if (BuiltinName[21] != '_')
              break;
            switch (BuiltinName[22]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_dpadd_u_d;	 // "__builtin_msa_dpadd_u_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_dpadd_u_h;	 // "__builtin_msa_dpadd_u_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_dpadd_u_w;	 // "__builtin_msa_dpadd_u_w"
            }
            break;
          }
          break;
        case 's':	 // 6 strings to match.
          if (memcmp(BuiltinName.data()+17, "ub_", 3))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 's':	 // 3 strings to match.
            if (BuiltinName[21] != '_')
              break;
            switch (BuiltinName[22]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_dpsub_s_d;	 // "__builtin_msa_dpsub_s_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_dpsub_s_h;	 // "__builtin_msa_dpsub_s_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_dpsub_s_w;	 // "__builtin_msa_dpsub_s_w"
            }
            break;
          case 'u':	 // 3 strings to match.
            if (BuiltinName[21] != '_')
              break;
            switch (BuiltinName[22]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_dpsub_u_d;	 // "__builtin_msa_dpsub_u_d"
            case 'h':	 // 1 string to match.
              return Intrinsic::mips_dpsub_u_h;	 // "__builtin_msa_dpsub_u_h"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_dpsub_u_w;	 // "__builtin_msa_dpsub_u_w"
            }
            break;
          }
          break;
        }
        break;
      case 'f':	 // 8 strings to match.
        switch (BuiltinName[15]) {
        default: break;
        case 'f':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+16, "int_", 4))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 's':	 // 2 strings to match.
            if (BuiltinName[21] != '_')
              break;
            switch (BuiltinName[22]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_ffint_s_d;	 // "__builtin_msa_ffint_s_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_ffint_s_w;	 // "__builtin_msa_ffint_s_w"
            }
            break;
          case 'u':	 // 2 strings to match.
            if (BuiltinName[21] != '_')
              break;
            switch (BuiltinName[22]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_ffint_u_d;	 // "__builtin_msa_ffint_u_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_ffint_u_w;	 // "__builtin_msa_ffint_u_w"
            }
            break;
          }
          break;
        case 't':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+16, "int_", 4))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 's':	 // 2 strings to match.
            if (BuiltinName[21] != '_')
              break;
            switch (BuiltinName[22]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_ftint_s_d;	 // "__builtin_msa_ftint_s_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_ftint_s_w;	 // "__builtin_msa_ftint_s_w"
            }
            break;
          case 'u':	 // 2 strings to match.
            if (BuiltinName[21] != '_')
              break;
            switch (BuiltinName[22]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::mips_ftint_u_d;	 // "__builtin_msa_ftint_u_d"
            case 'w':	 // 1 string to match.
              return Intrinsic::mips_ftint_u_w;	 // "__builtin_msa_ftint_u_w"
            }
            break;
          }
          break;
        }
        break;
      case 'm':	 // 4 strings to match.
        switch (BuiltinName[15]) {
        default: break;
        case 'a':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+16, "ddr_q_", 6))
            break;
          switch (BuiltinName[22]) {
          default: break;
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_maddr_q_h;	 // "__builtin_msa_maddr_q_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_maddr_q_w;	 // "__builtin_msa_maddr_q_w"
          }
          break;
        case 's':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+16, "ubr_q_", 6))
            break;
          switch (BuiltinName[22]) {
          default: break;
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_msubr_q_h;	 // "__builtin_msa_msubr_q_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_msubr_q_w;	 // "__builtin_msa_msubr_q_w"
          }
          break;
        }
        break;
      }
      break;
    }
    break;
  case 24:	 // 34 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_m", 11))
      break;
    switch (BuiltinName[11]) {
    default: break;
    case 'i':	 // 22 strings to match.
      if (memcmp(BuiltinName.data()+12, "ps_", 3))
        break;
      switch (BuiltinName[15]) {
      default: break;
      case 'a':	 // 6 strings to match.
        switch (BuiltinName[16]) {
        default: break;
        case 'b':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+17, "sq_s_", 5))
            break;
          switch (BuiltinName[22]) {
          default: break;
          case 'p':	 // 1 string to match.
            if (BuiltinName[23] != 'h')
              break;
            return Intrinsic::mips_absq_s_ph;	 // "__builtin_mips_absq_s_ph"
          case 'q':	 // 1 string to match.
            if (BuiltinName[23] != 'b')
              break;
            return Intrinsic::mips_absq_s_qb;	 // "__builtin_mips_absq_s_qb"
          }
          break;
        case 'd':	 // 4 strings to match.
          if (BuiltinName[17] != 'd')
            break;
          switch (BuiltinName[18]) {
          default: break;
          case 'q':	 // 2 strings to match.
            switch (BuiltinName[19]) {
            default: break;
            case '_':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+20, "s_ph", 4))
                break;
              return Intrinsic::mips_addq_s_ph;	 // "__builtin_mips_addq_s_ph"
            case 'h':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+20, "_r_w", 4))
                break;
              return Intrinsic::mips_addqh_r_w;	 // "__builtin_mips_addqh_r_w"
            }
            break;
          case 'u':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+19, "_s_", 3))
              break;
            switch (BuiltinName[22]) {
            default: break;
            case 'p':	 // 1 string to match.
              if (BuiltinName[23] != 'h')
                break;
              return Intrinsic::mips_addu_s_ph;	 // "__builtin_mips_addu_s_ph"
            case 'q':	 // 1 string to match.
              if (BuiltinName[23] != 'b')
                break;
              return Intrinsic::mips_addu_s_qb;	 // "__builtin_mips_addu_s_qb"
            }
            break;
          }
          break;
        }
        break;
      case 'c':	 // 3 strings to match.
        if (memcmp(BuiltinName.data()+16, "mp_", 3))
          break;
        switch (BuiltinName[19]) {
        default: break;
        case 'e':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "q_ph", 4))
            break;
          return Intrinsic::mips_cmp_eq_ph;	 // "__builtin_mips_cmp_eq_ph"
        case 'l':	 // 2 strings to match.
          switch (BuiltinName[20]) {
          default: break;
          case 'e':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+21, "_ph", 3))
              break;
            return Intrinsic::mips_cmp_le_ph;	 // "__builtin_mips_cmp_le_ph"
          case 't':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+21, "_ph", 3))
              break;
            return Intrinsic::mips_cmp_lt_ph;	 // "__builtin_mips_cmp_lt_ph"
          }
          break;
        }
        break;
      case 'd':	 // 2 strings to match.
        if (BuiltinName[16] != 'p')
          break;
        switch (BuiltinName[17]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "x_w_ph", 6))
            break;
          return Intrinsic::mips_dpax_w_ph;	 // "__builtin_mips_dpax_w_ph"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "x_w_ph", 6))
            break;
          return Intrinsic::mips_dpsx_w_ph;	 // "__builtin_mips_dpsx_w_ph"
        }
        break;
      case 'e':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+16, "xtr_rs_w", 8))
          break;
        return Intrinsic::mips_extr_rs_w;	 // "__builtin_mips_extr_rs_w"
      case 'm':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+16, "ulq_", 4))
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'r':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "s_w", 3))
            break;
          return Intrinsic::mips_mulq_rs_w;	 // "__builtin_mips_mulq_rs_w"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "_ph", 3))
            break;
          return Intrinsic::mips_mulq_s_ph;	 // "__builtin_mips_mulq_s_ph"
        }
        break;
      case 'p':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+16, "ackrl_ph", 8))
          break;
        return Intrinsic::mips_packrl_ph;	 // "__builtin_mips_packrl_ph"
      case 's':	 // 7 strings to match.
        switch (BuiltinName[16]) {
        default: break;
        case 'h':	 // 3 strings to match.
          switch (BuiltinName[17]) {
          default: break;
          case 'l':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+18, "l_s_ph", 6))
              break;
            return Intrinsic::mips_shll_s_ph;	 // "__builtin_mips_shll_s_ph"
          case 'r':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+18, "a_r_", 4))
              break;
            switch (BuiltinName[22]) {
            default: break;
            case 'p':	 // 1 string to match.
              if (BuiltinName[23] != 'h')
                break;
              return Intrinsic::mips_shra_r_ph;	 // "__builtin_mips_shra_r_ph"
            case 'q':	 // 1 string to match.
              if (BuiltinName[23] != 'b')
                break;
              return Intrinsic::mips_shra_r_qb;	 // "__builtin_mips_shra_r_qb"
            }
            break;
          }
          break;
        case 'u':	 // 4 strings to match.
          if (BuiltinName[17] != 'b')
            break;
          switch (BuiltinName[18]) {
          default: break;
          case 'q':	 // 2 strings to match.
            switch (BuiltinName[19]) {
            default: break;
            case '_':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+20, "s_ph", 4))
                break;
              return Intrinsic::mips_subq_s_ph;	 // "__builtin_mips_subq_s_ph"
            case 'h':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+20, "_r_w", 4))
                break;
              return Intrinsic::mips_subqh_r_w;	 // "__builtin_mips_subqh_r_w"
            }
            break;
          case 'u':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+19, "_s_", 3))
              break;
            switch (BuiltinName[22]) {
            default: break;
            case 'p':	 // 1 string to match.
              if (BuiltinName[23] != 'h')
                break;
              return Intrinsic::mips_subu_s_ph;	 // "__builtin_mips_subu_s_ph"
            case 'q':	 // 1 string to match.
              if (BuiltinName[23] != 'b')
                break;
              return Intrinsic::mips_subu_s_qb;	 // "__builtin_mips_subu_s_qb"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 's':	 // 12 strings to match.
      if (memcmp(BuiltinName.data()+12, "a_", 2))
        break;
      switch (BuiltinName[14]) {
      default: break;
      case 'f':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+15, "trunc_", 6))
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 's':	 // 2 strings to match.
          if (BuiltinName[22] != '_')
            break;
          switch (BuiltinName[23]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_ftrunc_s_d;	 // "__builtin_msa_ftrunc_s_d"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_ftrunc_s_w;	 // "__builtin_msa_ftrunc_s_w"
          }
          break;
        case 'u':	 // 2 strings to match.
          if (BuiltinName[22] != '_')
            break;
          switch (BuiltinName[23]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_ftrunc_u_d;	 // "__builtin_msa_ftrunc_u_d"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_ftrunc_u_w;	 // "__builtin_msa_ftrunc_u_w"
          }
          break;
        }
        break;
      case 's':	 // 8 strings to match.
        if (memcmp(BuiltinName.data()+15, "ubsu", 4))
          break;
        switch (BuiltinName[19]) {
        default: break;
        case 's':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+20, "_u_", 3))
            break;
          switch (BuiltinName[23]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_subsus_u_b;	 // "__builtin_msa_subsus_u_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_subsus_u_d;	 // "__builtin_msa_subsus_u_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_subsus_u_h;	 // "__builtin_msa_subsus_u_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_subsus_u_w;	 // "__builtin_msa_subsus_u_w"
          }
          break;
        case 'u':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+20, "_s_", 3))
            break;
          switch (BuiltinName[23]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::mips_subsuu_s_b;	 // "__builtin_msa_subsuu_s_b"
          case 'd':	 // 1 string to match.
            return Intrinsic::mips_subsuu_s_d;	 // "__builtin_msa_subsuu_s_d"
          case 'h':	 // 1 string to match.
            return Intrinsic::mips_subsuu_s_h;	 // "__builtin_msa_subsuu_s_h"
          case 'w':	 // 1 string to match.
            return Intrinsic::mips_subsuu_s_w;	 // "__builtin_msa_subsuu_s_w"
          }
          break;
        }
        break;
      }
      break;
    }
    break;
  case 25:	 // 14 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_mips_", 15))
      break;
    switch (BuiltinName[15]) {
    default: break;
    case 'a':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "dd", 2))
        break;
      switch (BuiltinName[18]) {
      default: break;
      case 'q':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+19, "h_r_ph", 6))
          break;
        return Intrinsic::mips_addqh_r_ph;	 // "__builtin_mips_addqh_r_ph"
      case 'u':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+19, "h_r_qb", 6))
          break;
        return Intrinsic::mips_adduh_r_qb;	 // "__builtin_mips_adduh_r_qb"
      }
      break;
    case 'c':	 // 3 strings to match.
      if (memcmp(BuiltinName.data()+16, "mpu_", 4))
        break;
      switch (BuiltinName[20]) {
      default: break;
      case 'e':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+21, "q_qb", 4))
          break;
        return Intrinsic::mips_cmpu_eq_qb;	 // "__builtin_mips_cmpu_eq_qb"
      case 'l':	 // 2 strings to match.
        switch (BuiltinName[21]) {
        default: break;
        case 'e':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "_qb", 3))
            break;
          return Intrinsic::mips_cmpu_le_qb;	 // "__builtin_mips_cmpu_le_qb"
        case 't':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "_qb", 3))
            break;
          return Intrinsic::mips_cmpu_lt_qb;	 // "__builtin_mips_cmpu_lt_qb"
        }
        break;
      }
      break;
    case 'd':	 // 4 strings to match.
      if (BuiltinName[16] != 'p')
        break;
      switch (BuiltinName[17]) {
      default: break;
      case 'a':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+18, "u_h_qb", 6))
          break;
        switch (BuiltinName[24]) {
        default: break;
        case 'l':	 // 1 string to match.
          return Intrinsic::mips_dpau_h_qbl;	 // "__builtin_mips_dpau_h_qbl"
        case 'r':	 // 1 string to match.
          return Intrinsic::mips_dpau_h_qbr;	 // "__builtin_mips_dpau_h_qbr"
        }
        break;
      case 's':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+18, "u_h_qb", 6))
          break;
        switch (BuiltinName[24]) {
        default: break;
        case 'l':	 // 1 string to match.
          return Intrinsic::mips_dpsu_h_qbl;	 // "__builtin_mips_dpsu_h_qbl"
        case 'r':	 // 1 string to match.
          return Intrinsic::mips_dpsu_h_qbr;	 // "__builtin_mips_dpsu_h_qbr"
        }
        break;
      }
      break;
    case 'm':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "ul", 2))
        break;
      switch (BuiltinName[18]) {
      default: break;
      case 'q':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+19, "_rs_ph", 6))
          break;
        return Intrinsic::mips_mulq_rs_ph;	 // "__builtin_mips_mulq_rs_ph"
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+19, "a_w_ph", 6))
          break;
        return Intrinsic::mips_mulsa_w_ph;	 // "__builtin_mips_mulsa_w_ph"
      }
      break;
    case 'r':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+16, "addu_w_qb", 9))
        break;
      return Intrinsic::mips_raddu_w_qb;	 // "__builtin_mips_raddu_w_qb"
    case 's':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "ub", 2))
        break;
      switch (BuiltinName[18]) {
      default: break;
      case 'q':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+19, "h_r_ph", 6))
          break;
        return Intrinsic::mips_subqh_r_ph;	 // "__builtin_mips_subqh_r_ph"
      case 'u':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+19, "h_r_qb", 6))
          break;
        return Intrinsic::mips_subuh_r_qb;	 // "__builtin_mips_subuh_r_qb"
      }
      break;
    }
    break;
  case 26:	 // 11 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_mips_", 15))
      break;
    switch (BuiltinName[15]) {
    default: break;
    case 'c':	 // 3 strings to match.
      if (memcmp(BuiltinName.data()+16, "mpgu_", 5))
        break;
      switch (BuiltinName[21]) {
      default: break;
      case 'e':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+22, "q_qb", 4))
          break;
        return Intrinsic::mips_cmpgu_eq_qb;	 // "__builtin_mips_cmpgu_eq_qb"
      case 'l':	 // 2 strings to match.
        switch (BuiltinName[22]) {
        default: break;
        case 'e':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+23, "_qb", 3))
            break;
          return Intrinsic::mips_cmpgu_le_qb;	 // "__builtin_mips_cmpgu_le_qb"
        case 't':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+23, "_qb", 3))
            break;
          return Intrinsic::mips_cmpgu_lt_qb;	 // "__builtin_mips_cmpgu_lt_qb"
        }
        break;
      }
      break;
    case 'd':	 // 4 strings to match.
      if (BuiltinName[16] != 'p')
        break;
      switch (BuiltinName[17]) {
      default: break;
      case 'a':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+18, "q_s", 3))
          break;
        switch (BuiltinName[21]) {
        default: break;
        case '_':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "w_ph", 4))
            break;
          return Intrinsic::mips_dpaq_s_w_ph;	 // "__builtin_mips_dpaq_s_w_ph"
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "_l_w", 4))
            break;
          return Intrinsic::mips_dpaq_sa_l_w;	 // "__builtin_mips_dpaq_sa_l_w"
        }
        break;
      case 's':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+18, "q_s", 3))
          break;
        switch (BuiltinName[21]) {
        default: break;
        case '_':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "w_ph", 4))
            break;
          return Intrinsic::mips_dpsq_s_w_ph;	 // "__builtin_mips_dpsq_s_w_ph"
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "_l_w", 4))
            break;
          return Intrinsic::mips_dpsq_sa_l_w;	 // "__builtin_mips_dpsq_sa_l_w"
        }
        break;
      }
      break;
    case 'm':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "aq_s_w_ph", 9))
        break;
      switch (BuiltinName[25]) {
      default: break;
      case 'l':	 // 1 string to match.
        return Intrinsic::mips_maq_s_w_phl;	 // "__builtin_mips_maq_s_w_phl"
      case 'r':	 // 1 string to match.
        return Intrinsic::mips_maq_s_w_phr;	 // "__builtin_mips_maq_s_w_phr"
      }
      break;
    case 'p':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "recr", 4))
        break;
      switch (BuiltinName[20]) {
      default: break;
      case '_':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+21, "qb_ph", 5))
          break;
        return Intrinsic::mips_precr_qb_ph;	 // "__builtin_mips_precr_qb_ph"
      case 'q':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+21, "_ph_w", 5))
          break;
        return Intrinsic::mips_precrq_ph_w;	 // "__builtin_mips_precrq_ph_w"
      }
      break;
    }
    break;
  case 27:	 // 10 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_mips_", 15))
      break;
    switch (BuiltinName[15]) {
    default: break;
    case 'c':	 // 3 strings to match.
      if (memcmp(BuiltinName.data()+16, "mpgdu_", 6))
        break;
      switch (BuiltinName[22]) {
      default: break;
      case 'e':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+23, "q_qb", 4))
          break;
        return Intrinsic::mips_cmpgdu_eq_qb;	 // "__builtin_mips_cmpgdu_eq_qb"
      case 'l':	 // 2 strings to match.
        switch (BuiltinName[23]) {
        default: break;
        case 'e':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+24, "_qb", 3))
            break;
          return Intrinsic::mips_cmpgdu_le_qb;	 // "__builtin_mips_cmpgdu_le_qb"
        case 't':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+24, "_qb", 3))
            break;
          return Intrinsic::mips_cmpgdu_lt_qb;	 // "__builtin_mips_cmpgdu_lt_qb"
        }
        break;
      }
      break;
    case 'd':	 // 2 strings to match.
      if (BuiltinName[16] != 'p')
        break;
      switch (BuiltinName[17]) {
      default: break;
      case 'a':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+18, "qx_s_w_ph", 9))
          break;
        return Intrinsic::mips_dpaqx_s_w_ph;	 // "__builtin_mips_dpaqx_s_w_ph"
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+18, "qx_s_w_ph", 9))
          break;
        return Intrinsic::mips_dpsqx_s_w_ph;	 // "__builtin_mips_dpsqx_s_w_ph"
      }
      break;
    case 'm':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "aq_sa_w_ph", 10))
        break;
      switch (BuiltinName[26]) {
      default: break;
      case 'l':	 // 1 string to match.
        return Intrinsic::mips_maq_sa_w_phl;	 // "__builtin_mips_maq_sa_w_phl"
      case 'r':	 // 1 string to match.
        return Intrinsic::mips_maq_sa_w_phr;	 // "__builtin_mips_maq_sa_w_phr"
      }
      break;
    case 'p':	 // 3 strings to match.
      if (memcmp(BuiltinName.data()+16, "rec", 3))
        break;
      switch (BuiltinName[19]) {
      default: break;
      case 'e':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+20, "q_w_ph", 6))
          break;
        switch (BuiltinName[26]) {
        default: break;
        case 'l':	 // 1 string to match.
          return Intrinsic::mips_preceq_w_phl;	 // "__builtin_mips_preceq_w_phl"
        case 'r':	 // 1 string to match.
          return Intrinsic::mips_preceq_w_phr;	 // "__builtin_mips_preceq_w_phr"
        }
        break;
      case 'r':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+20, "q_qb_ph", 7))
          break;
        return Intrinsic::mips_precrq_qb_ph;	 // "__builtin_mips_precrq_qb_ph"
      }
      break;
    }
    break;
  case 28:	 // 7 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_mips_", 15))
      break;
    switch (BuiltinName[15]) {
    default: break;
    case 'd':	 // 2 strings to match.
      if (BuiltinName[16] != 'p')
        break;
      switch (BuiltinName[17]) {
      default: break;
      case 'a':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+18, "qx_sa_w_ph", 10))
          break;
        return Intrinsic::mips_dpaqx_sa_w_ph;	 // "__builtin_mips_dpaqx_sa_w_ph"
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+18, "qx_sa_w_ph", 10))
          break;
        return Intrinsic::mips_dpsqx_sa_w_ph;	 // "__builtin_mips_dpsqx_sa_w_ph"
      }
      break;
    case 'm':	 // 3 strings to match.
      if (memcmp(BuiltinName.data()+16, "ul", 2))
        break;
      switch (BuiltinName[18]) {
      default: break;
      case 'e':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+19, "q_s_w_ph", 8))
          break;
        switch (BuiltinName[27]) {
        default: break;
        case 'l':	 // 1 string to match.
          return Intrinsic::mips_muleq_s_w_phl;	 // "__builtin_mips_muleq_s_w_phl"
        case 'r':	 // 1 string to match.
          return Intrinsic::mips_muleq_s_w_phr;	 // "__builtin_mips_muleq_s_w_phr"
        }
        break;
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+19, "aq_s_w_ph", 9))
          break;
        return Intrinsic::mips_mulsaq_s_w_ph;	 // "__builtin_mips_mulsaq_s_w_ph"
      }
      break;
    case 'p':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "receu_ph_qb", 11))
        break;
      switch (BuiltinName[27]) {
      default: break;
      case 'l':	 // 1 string to match.
        return Intrinsic::mips_preceu_ph_qbl;	 // "__builtin_mips_preceu_ph_qbl"
      case 'r':	 // 1 string to match.
        return Intrinsic::mips_preceu_ph_qbr;	 // "__builtin_mips_preceu_ph_qbr"
      }
      break;
    }
    break;
  case 29:	 // 8 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_mips_", 15))
      break;
    switch (BuiltinName[15]) {
    default: break;
    case 'm':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "uleu_s_ph_qb", 12))
        break;
      switch (BuiltinName[28]) {
      default: break;
      case 'l':	 // 1 string to match.
        return Intrinsic::mips_muleu_s_ph_qbl;	 // "__builtin_mips_muleu_s_ph_qbl"
      case 'r':	 // 1 string to match.
        return Intrinsic::mips_muleu_s_ph_qbr;	 // "__builtin_mips_muleu_s_ph_qbr"
      }
      break;
    case 'p':	 // 6 strings to match.
      if (memcmp(BuiltinName.data()+16, "rec", 3))
        break;
      switch (BuiltinName[19]) {
      default: break;
      case 'e':	 // 4 strings to match.
        switch (BuiltinName[20]) {
        default: break;
        case 'q':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+21, "u_ph_qb", 7))
            break;
          switch (BuiltinName[28]) {
          default: break;
          case 'l':	 // 1 string to match.
            return Intrinsic::mips_precequ_ph_qbl;	 // "__builtin_mips_precequ_ph_qbl"
          case 'r':	 // 1 string to match.
            return Intrinsic::mips_precequ_ph_qbr;	 // "__builtin_mips_precequ_ph_qbr"
          }
          break;
        case 'u':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+21, "_ph_qb", 6))
            break;
          switch (BuiltinName[27]) {
          default: break;
          case 'l':	 // 1 string to match.
            if (BuiltinName[28] != 'a')
              break;
            return Intrinsic::mips_preceu_ph_qbla;	 // "__builtin_mips_preceu_ph_qbla"
          case 'r':	 // 1 string to match.
            if (BuiltinName[28] != 'a')
              break;
            return Intrinsic::mips_preceu_ph_qbra;	 // "__builtin_mips_preceu_ph_qbra"
          }
          break;
        }
        break;
      case 'r':	 // 2 strings to match.
        switch (BuiltinName[20]) {
        default: break;
        case '_':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "sra_ph_w", 8))
            break;
          return Intrinsic::mips_precr_sra_ph_w;	 // "__builtin_mips_precr_sra_ph_w"
        case 'q':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "_rs_ph_w", 8))
            break;
          return Intrinsic::mips_precrq_rs_ph_w;	 // "__builtin_mips_precrq_rs_ph_w"
        }
        break;
      }
      break;
    }
    break;
  case 30:	 // 3 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_mips_prec", 19))
      break;
    switch (BuiltinName[19]) {
    default: break;
    case 'e':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+20, "qu_ph_qb", 8))
        break;
      switch (BuiltinName[28]) {
      default: break;
      case 'l':	 // 1 string to match.
        if (BuiltinName[29] != 'a')
          break;
        return Intrinsic::mips_precequ_ph_qbla;	 // "__builtin_mips_precequ_ph_qbla"
      case 'r':	 // 1 string to match.
        if (BuiltinName[29] != 'a')
          break;
        return Intrinsic::mips_precequ_ph_qbra;	 // "__builtin_mips_precequ_ph_qbra"
      }
      break;
    case 'r':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+20, "qu_s_qb_ph", 10))
        break;
      return Intrinsic::mips_precrqu_s_qb_ph;	 // "__builtin_mips_precrqu_s_qb_ph"
    }
    break;
  case 31:	 // 1 string to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_mips_precr_sra_r_ph_w", 31))
      break;
    return Intrinsic::mips_precr_sra_r_ph_w;	 // "__builtin_mips_precr_sra_r_ph_w"
  }
  }
  if (TargetPrefix == "ppc") {
  switch (BuiltinName.size()) {
  default: break;
  case 21:	 // 4 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_altivec_", 18))
      break;
    switch (BuiltinName[18]) {
    default: break;
    case 'd':	 // 2 strings to match.
      if (BuiltinName[19] != 's')
        break;
      switch (BuiltinName[20]) {
      default: break;
      case 's':	 // 1 string to match.
        return Intrinsic::ppc_altivec_dss;	 // "__builtin_altivec_dss"
      case 't':	 // 1 string to match.
        return Intrinsic::ppc_altivec_dst;	 // "__builtin_altivec_dst"
      }
      break;
    case 'v':	 // 2 strings to match.
      if (BuiltinName[19] != 's')
        break;
      switch (BuiltinName[20]) {
      default: break;
      case 'l':	 // 1 string to match.
        return Intrinsic::ppc_altivec_vsl;	 // "__builtin_altivec_vsl"
      case 'r':	 // 1 string to match.
        return Intrinsic::ppc_altivec_vsr;	 // "__builtin_altivec_vsr"
      }
      break;
    }
    break;
  case 22:	 // 12 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_altivec_", 18))
      break;
    switch (BuiltinName[18]) {
    default: break;
    case 'd':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+19, "stt", 3))
        break;
      return Intrinsic::ppc_altivec_dstt;	 // "__builtin_altivec_dstt"
    case 'v':	 // 11 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case 'r':	 // 3 strings to match.
        if (BuiltinName[20] != 'l')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'b':	 // 1 string to match.
          return Intrinsic::ppc_altivec_vrlb;	 // "__builtin_altivec_vrlb"
        case 'h':	 // 1 string to match.
          return Intrinsic::ppc_altivec_vrlh;	 // "__builtin_altivec_vrlh"
        case 'w':	 // 1 string to match.
          return Intrinsic::ppc_altivec_vrlw;	 // "__builtin_altivec_vrlw"
        }
        break;
      case 's':	 // 8 strings to match.
        switch (BuiltinName[20]) {
        default: break;
        case 'l':	 // 4 strings to match.
          switch (BuiltinName[21]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vslb;	 // "__builtin_altivec_vslb"
          case 'h':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vslh;	 // "__builtin_altivec_vslh"
          case 'o':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vslo;	 // "__builtin_altivec_vslo"
          case 'w':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vslw;	 // "__builtin_altivec_vslw"
          }
          break;
        case 'r':	 // 4 strings to match.
          switch (BuiltinName[21]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vsrb;	 // "__builtin_altivec_vsrb"
          case 'h':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vsrh;	 // "__builtin_altivec_vsrh"
          case 'o':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vsro;	 // "__builtin_altivec_vsro"
          case 'w':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vsrw;	 // "__builtin_altivec_vsrw"
          }
          break;
        }
        break;
      }
      break;
    }
    break;
  case 23:	 // 12 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_altivec_", 18))
      break;
    switch (BuiltinName[18]) {
    default: break;
    case 'd':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+19, "stst", 4))
        break;
      return Intrinsic::ppc_altivec_dstst;	 // "__builtin_altivec_dstst"
    case 'v':	 // 11 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case 'c':	 // 2 strings to match.
        if (BuiltinName[20] != 'f')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 's':	 // 1 string to match.
          if (BuiltinName[22] != 'x')
            break;
          return Intrinsic::ppc_altivec_vcfsx;	 // "__builtin_altivec_vcfsx"
        case 'u':	 // 1 string to match.
          if (BuiltinName[22] != 'x')
            break;
          return Intrinsic::ppc_altivec_vcfux;	 // "__builtin_altivec_vcfux"
        }
        break;
      case 'p':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+20, "kpx", 3))
          break;
        return Intrinsic::ppc_altivec_vpkpx;	 // "__builtin_altivec_vpkpx"
      case 'r':	 // 5 strings to match.
        switch (BuiltinName[20]) {
        default: break;
        case 'e':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "fp", 2))
            break;
          return Intrinsic::ppc_altivec_vrefp;	 // "__builtin_altivec_vrefp"
        case 'f':	 // 4 strings to match.
          if (BuiltinName[21] != 'i')
            break;
          switch (BuiltinName[22]) {
          default: break;
          case 'm':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vrfim;	 // "__builtin_altivec_vrfim"
          case 'n':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vrfin;	 // "__builtin_altivec_vrfin"
          case 'p':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vrfip;	 // "__builtin_altivec_vrfip"
          case 'z':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vrfiz;	 // "__builtin_altivec_vrfiz"
          }
          break;
        }
        break;
      case 's':	 // 3 strings to match.
        if (memcmp(BuiltinName.data()+20, "ra", 2))
          break;
        switch (BuiltinName[22]) {
        default: break;
        case 'b':	 // 1 string to match.
          return Intrinsic::ppc_altivec_vsrab;	 // "__builtin_altivec_vsrab"
        case 'h':	 // 1 string to match.
          return Intrinsic::ppc_altivec_vsrah;	 // "__builtin_altivec_vsrah"
        case 'w':	 // 1 string to match.
          return Intrinsic::ppc_altivec_vsraw;	 // "__builtin_altivec_vsraw"
        }
        break;
      }
      break;
    }
    break;
  case 24:	 // 26 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_altivec_", 18))
      break;
    switch (BuiltinName[18]) {
    default: break;
    case 'd':	 // 2 strings to match.
      if (BuiltinName[19] != 's')
        break;
      switch (BuiltinName[20]) {
      default: break;
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+21, "all", 3))
          break;
        return Intrinsic::ppc_altivec_dssall;	 // "__builtin_altivec_dssall"
      case 't':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+21, "stt", 3))
          break;
        return Intrinsic::ppc_altivec_dststt;	 // "__builtin_altivec_dststt"
      }
      break;
    case 'm':	 // 2 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case 'f':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+20, "vscr", 4))
          break;
        return Intrinsic::ppc_altivec_mfvscr;	 // "__builtin_altivec_mfvscr"
      case 't':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+20, "vscr", 4))
          break;
        return Intrinsic::ppc_altivec_mtvscr;	 // "__builtin_altivec_mtvscr"
      }
      break;
    case 'v':	 // 22 strings to match.
      switch (BuiltinName[19]) {
      default: break;
      case 'a':	 // 6 strings to match.
        if (memcmp(BuiltinName.data()+20, "vg", 2))
          break;
        switch (BuiltinName[22]) {
        default: break;
        case 's':	 // 3 strings to match.
          switch (BuiltinName[23]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vavgsb;	 // "__builtin_altivec_vavgsb"
          case 'h':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vavgsh;	 // "__builtin_altivec_vavgsh"
          case 'w':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vavgsw;	 // "__builtin_altivec_vavgsw"
          }
          break;
        case 'u':	 // 3 strings to match.
          switch (BuiltinName[23]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vavgub;	 // "__builtin_altivec_vavgub"
          case 'h':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vavguh;	 // "__builtin_altivec_vavguh"
          case 'w':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vavguw;	 // "__builtin_altivec_vavguw"
          }
          break;
        }
        break;
      case 'c':	 // 2 strings to match.
        if (BuiltinName[20] != 't')
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "xs", 2))
            break;
          return Intrinsic::ppc_altivec_vctsxs;	 // "__builtin_altivec_vctsxs"
        case 'u':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "xs", 2))
            break;
          return Intrinsic::ppc_altivec_vctuxs;	 // "__builtin_altivec_vctuxs"
        }
        break;
      case 'm':	 // 14 strings to match.
        switch (BuiltinName[20]) {
        default: break;
        case 'a':	 // 7 strings to match.
          if (BuiltinName[21] != 'x')
            break;
          switch (BuiltinName[22]) {
          default: break;
          case 'f':	 // 1 string to match.
            if (BuiltinName[23] != 'p')
              break;
            return Intrinsic::ppc_altivec_vmaxfp;	 // "__builtin_altivec_vmaxfp"
          case 's':	 // 3 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vmaxsb;	 // "__builtin_altivec_vmaxsb"
            case 'h':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vmaxsh;	 // "__builtin_altivec_vmaxsh"
            case 'w':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vmaxsw;	 // "__builtin_altivec_vmaxsw"
            }
            break;
          case 'u':	 // 3 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vmaxub;	 // "__builtin_altivec_vmaxub"
            case 'h':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vmaxuh;	 // "__builtin_altivec_vmaxuh"
            case 'w':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vmaxuw;	 // "__builtin_altivec_vmaxuw"
            }
            break;
          }
          break;
        case 'i':	 // 7 strings to match.
          if (BuiltinName[21] != 'n')
            break;
          switch (BuiltinName[22]) {
          default: break;
          case 'f':	 // 1 string to match.
            if (BuiltinName[23] != 'p')
              break;
            return Intrinsic::ppc_altivec_vminfp;	 // "__builtin_altivec_vminfp"
          case 's':	 // 3 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vminsb;	 // "__builtin_altivec_vminsb"
            case 'h':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vminsh;	 // "__builtin_altivec_vminsh"
            case 'w':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vminsw;	 // "__builtin_altivec_vminsw"
            }
            break;
          case 'u':	 // 3 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vminub;	 // "__builtin_altivec_vminub"
            case 'h':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vminuh;	 // "__builtin_altivec_vminuh"
            case 'w':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vminuw;	 // "__builtin_altivec_vminuw"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    }
    break;
  case 25:	 // 38 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_altivec_v", 19))
      break;
    switch (BuiltinName[19]) {
    default: break;
    case 'a':	 // 7 strings to match.
      if (memcmp(BuiltinName.data()+20, "dd", 2))
        break;
      switch (BuiltinName[22]) {
      default: break;
      case 'c':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+23, "uw", 2))
          break;
        return Intrinsic::ppc_altivec_vaddcuw;	 // "__builtin_altivec_vaddcuw"
      case 's':	 // 3 strings to match.
        switch (BuiltinName[23]) {
        default: break;
        case 'b':	 // 1 string to match.
          if (BuiltinName[24] != 's')
            break;
          return Intrinsic::ppc_altivec_vaddsbs;	 // "__builtin_altivec_vaddsbs"
        case 'h':	 // 1 string to match.
          if (BuiltinName[24] != 's')
            break;
          return Intrinsic::ppc_altivec_vaddshs;	 // "__builtin_altivec_vaddshs"
        case 'w':	 // 1 string to match.
          if (BuiltinName[24] != 's')
            break;
          return Intrinsic::ppc_altivec_vaddsws;	 // "__builtin_altivec_vaddsws"
        }
        break;
      case 'u':	 // 3 strings to match.
        switch (BuiltinName[23]) {
        default: break;
        case 'b':	 // 1 string to match.
          if (BuiltinName[24] != 's')
            break;
          return Intrinsic::ppc_altivec_vaddubs;	 // "__builtin_altivec_vaddubs"
        case 'h':	 // 1 string to match.
          if (BuiltinName[24] != 's')
            break;
          return Intrinsic::ppc_altivec_vadduhs;	 // "__builtin_altivec_vadduhs"
        case 'w':	 // 1 string to match.
          if (BuiltinName[24] != 's')
            break;
          return Intrinsic::ppc_altivec_vadduws;	 // "__builtin_altivec_vadduws"
        }
        break;
      }
      break;
    case 'c':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+20, "mpbfp", 5))
        break;
      return Intrinsic::ppc_altivec_vcmpbfp;	 // "__builtin_altivec_vcmpbfp"
    case 'l':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+20, "ogefp", 5))
        break;
      return Intrinsic::ppc_altivec_vlogefp;	 // "__builtin_altivec_vlogefp"
    case 'm':	 // 9 strings to match.
      switch (BuiltinName[20]) {
      default: break;
      case 'a':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+21, "ddfp", 4))
          break;
        return Intrinsic::ppc_altivec_vmaddfp;	 // "__builtin_altivec_vmaddfp"
      case 'u':	 // 8 strings to match.
        if (BuiltinName[21] != 'l')
          break;
        switch (BuiltinName[22]) {
        default: break;
        case 'e':	 // 4 strings to match.
          switch (BuiltinName[23]) {
          default: break;
          case 's':	 // 2 strings to match.
            switch (BuiltinName[24]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vmulesb;	 // "__builtin_altivec_vmulesb"
            case 'h':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vmulesh;	 // "__builtin_altivec_vmulesh"
            }
            break;
          case 'u':	 // 2 strings to match.
            switch (BuiltinName[24]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vmuleub;	 // "__builtin_altivec_vmuleub"
            case 'h':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vmuleuh;	 // "__builtin_altivec_vmuleuh"
            }
            break;
          }
          break;
        case 'o':	 // 4 strings to match.
          switch (BuiltinName[23]) {
          default: break;
          case 's':	 // 2 strings to match.
            switch (BuiltinName[24]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vmulosb;	 // "__builtin_altivec_vmulosb"
            case 'h':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vmulosh;	 // "__builtin_altivec_vmulosh"
            }
            break;
          case 'u':	 // 2 strings to match.
            switch (BuiltinName[24]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vmuloub;	 // "__builtin_altivec_vmuloub"
            case 'h':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vmulouh;	 // "__builtin_altivec_vmulouh"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 'p':	 // 6 strings to match.
      if (BuiltinName[20] != 'k')
        break;
      switch (BuiltinName[21]) {
      default: break;
      case 's':	 // 4 strings to match.
        switch (BuiltinName[22]) {
        default: break;
        case 'h':	 // 2 strings to match.
          switch (BuiltinName[23]) {
          default: break;
          case 's':	 // 1 string to match.
            if (BuiltinName[24] != 's')
              break;
            return Intrinsic::ppc_altivec_vpkshss;	 // "__builtin_altivec_vpkshss"
          case 'u':	 // 1 string to match.
            if (BuiltinName[24] != 's')
              break;
            return Intrinsic::ppc_altivec_vpkshus;	 // "__builtin_altivec_vpkshus"
          }
          break;
        case 'w':	 // 2 strings to match.
          switch (BuiltinName[23]) {
          default: break;
          case 's':	 // 1 string to match.
            if (BuiltinName[24] != 's')
              break;
            return Intrinsic::ppc_altivec_vpkswss;	 // "__builtin_altivec_vpkswss"
          case 'u':	 // 1 string to match.
            if (BuiltinName[24] != 's')
              break;
            return Intrinsic::ppc_altivec_vpkswus;	 // "__builtin_altivec_vpkswus"
          }
          break;
        }
        break;
      case 'u':	 // 2 strings to match.
        switch (BuiltinName[22]) {
        default: break;
        case 'h':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+23, "us", 2))
            break;
          return Intrinsic::ppc_altivec_vpkuhus;	 // "__builtin_altivec_vpkuhus"
        case 'w':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+23, "us", 2))
            break;
          return Intrinsic::ppc_altivec_vpkuwus;	 // "__builtin_altivec_vpkuwus"
        }
        break;
      }
      break;
    case 's':	 // 8 strings to match.
      if (BuiltinName[20] != 'u')
        break;
      switch (BuiltinName[21]) {
      default: break;
      case 'b':	 // 7 strings to match.
        switch (BuiltinName[22]) {
        default: break;
        case 'c':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+23, "uw", 2))
            break;
          return Intrinsic::ppc_altivec_vsubcuw;	 // "__builtin_altivec_vsubcuw"
        case 's':	 // 3 strings to match.
          switch (BuiltinName[23]) {
          default: break;
          case 'b':	 // 1 string to match.
            if (BuiltinName[24] != 's')
              break;
            return Intrinsic::ppc_altivec_vsubsbs;	 // "__builtin_altivec_vsubsbs"
          case 'h':	 // 1 string to match.
            if (BuiltinName[24] != 's')
              break;
            return Intrinsic::ppc_altivec_vsubshs;	 // "__builtin_altivec_vsubshs"
          case 'w':	 // 1 string to match.
            if (BuiltinName[24] != 's')
              break;
            return Intrinsic::ppc_altivec_vsubsws;	 // "__builtin_altivec_vsubsws"
          }
          break;
        case 'u':	 // 3 strings to match.
          switch (BuiltinName[23]) {
          default: break;
          case 'b':	 // 1 string to match.
            if (BuiltinName[24] != 's')
              break;
            return Intrinsic::ppc_altivec_vsububs;	 // "__builtin_altivec_vsububs"
          case 'h':	 // 1 string to match.
            if (BuiltinName[24] != 's')
              break;
            return Intrinsic::ppc_altivec_vsubuhs;	 // "__builtin_altivec_vsubuhs"
          case 'w':	 // 1 string to match.
            if (BuiltinName[24] != 's')
              break;
            return Intrinsic::ppc_altivec_vsubuws;	 // "__builtin_altivec_vsubuws"
          }
          break;
        }
        break;
      case 'm':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+22, "sws", 3))
          break;
        return Intrinsic::ppc_altivec_vsumsws;	 // "__builtin_altivec_vsumsws"
      }
      break;
    case 'u':	 // 6 strings to match.
      if (memcmp(BuiltinName.data()+20, "pk", 2))
        break;
      switch (BuiltinName[22]) {
      default: break;
      case 'h':	 // 3 strings to match.
        switch (BuiltinName[23]) {
        default: break;
        case 'p':	 // 1 string to match.
          if (BuiltinName[24] != 'x')
            break;
          return Intrinsic::ppc_altivec_vupkhpx;	 // "__builtin_altivec_vupkhpx"
        case 's':	 // 2 strings to match.
          switch (BuiltinName[24]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vupkhsb;	 // "__builtin_altivec_vupkhsb"
          case 'h':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vupkhsh;	 // "__builtin_altivec_vupkhsh"
          }
          break;
        }
        break;
      case 'l':	 // 3 strings to match.
        switch (BuiltinName[23]) {
        default: break;
        case 'p':	 // 1 string to match.
          if (BuiltinName[24] != 'x')
            break;
          return Intrinsic::ppc_altivec_vupklpx;	 // "__builtin_altivec_vupklpx"
        case 's':	 // 2 strings to match.
          switch (BuiltinName[24]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vupklsb;	 // "__builtin_altivec_vupklsb"
          case 'h':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vupklsh;	 // "__builtin_altivec_vupklsh"
          }
          break;
        }
        break;
      }
      break;
    }
    break;
  case 26:	 // 25 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_altivec_v", 19))
      break;
    switch (BuiltinName[19]) {
    default: break;
    case 'c':	 // 12 strings to match.
      if (memcmp(BuiltinName.data()+20, "mp", 2))
        break;
      switch (BuiltinName[22]) {
      default: break;
      case 'e':	 // 4 strings to match.
        if (BuiltinName[23] != 'q')
          break;
        switch (BuiltinName[24]) {
        default: break;
        case 'f':	 // 1 string to match.
          if (BuiltinName[25] != 'p')
            break;
          return Intrinsic::ppc_altivec_vcmpeqfp;	 // "__builtin_altivec_vcmpeqfp"
        case 'u':	 // 3 strings to match.
          switch (BuiltinName[25]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vcmpequb;	 // "__builtin_altivec_vcmpequb"
          case 'h':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vcmpequh;	 // "__builtin_altivec_vcmpequh"
          case 'w':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vcmpequw;	 // "__builtin_altivec_vcmpequw"
          }
          break;
        }
        break;
      case 'g':	 // 8 strings to match.
        switch (BuiltinName[23]) {
        default: break;
        case 'e':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+24, "fp", 2))
            break;
          return Intrinsic::ppc_altivec_vcmpgefp;	 // "__builtin_altivec_vcmpgefp"
        case 't':	 // 7 strings to match.
          switch (BuiltinName[24]) {
          default: break;
          case 'f':	 // 1 string to match.
            if (BuiltinName[25] != 'p')
              break;
            return Intrinsic::ppc_altivec_vcmpgtfp;	 // "__builtin_altivec_vcmpgtfp"
          case 's':	 // 3 strings to match.
            switch (BuiltinName[25]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vcmpgtsb;	 // "__builtin_altivec_vcmpgtsb"
            case 'h':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vcmpgtsh;	 // "__builtin_altivec_vcmpgtsh"
            case 'w':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vcmpgtsw;	 // "__builtin_altivec_vcmpgtsw"
            }
            break;
          case 'u':	 // 3 strings to match.
            switch (BuiltinName[25]) {
            default: break;
            case 'b':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vcmpgtub;	 // "__builtin_altivec_vcmpgtub"
            case 'h':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vcmpgtuh;	 // "__builtin_altivec_vcmpgtuh"
            case 'w':	 // 1 string to match.
              return Intrinsic::ppc_altivec_vcmpgtuw;	 // "__builtin_altivec_vcmpgtuw"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 'e':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+20, "xptefp", 6))
        break;
      return Intrinsic::ppc_altivec_vexptefp;	 // "__builtin_altivec_vexptefp"
    case 'm':	 // 6 strings to match.
      if (memcmp(BuiltinName.data()+20, "sum", 3))
        break;
      switch (BuiltinName[23]) {
      default: break;
      case 'm':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+24, "bm", 2))
          break;
        return Intrinsic::ppc_altivec_vmsummbm;	 // "__builtin_altivec_vmsummbm"
      case 's':	 // 2 strings to match.
        if (BuiltinName[24] != 'h')
          break;
        switch (BuiltinName[25]) {
        default: break;
        case 'm':	 // 1 string to match.
          return Intrinsic::ppc_altivec_vmsumshm;	 // "__builtin_altivec_vmsumshm"
        case 's':	 // 1 string to match.
          return Intrinsic::ppc_altivec_vmsumshs;	 // "__builtin_altivec_vmsumshs"
        }
        break;
      case 'u':	 // 3 strings to match.
        switch (BuiltinName[24]) {
        default: break;
        case 'b':	 // 1 string to match.
          if (BuiltinName[25] != 'm')
            break;
          return Intrinsic::ppc_altivec_vmsumubm;	 // "__builtin_altivec_vmsumubm"
        case 'h':	 // 2 strings to match.
          switch (BuiltinName[25]) {
          default: break;
          case 'm':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vmsumuhm;	 // "__builtin_altivec_vmsumuhm"
          case 's':	 // 1 string to match.
            return Intrinsic::ppc_altivec_vmsumuhs;	 // "__builtin_altivec_vmsumuhs"
          }
          break;
        }
        break;
      }
      break;
    case 'n':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+20, "msubfp", 6))
        break;
      return Intrinsic::ppc_altivec_vnmsubfp;	 // "__builtin_altivec_vnmsubfp"
    case 's':	 // 5 strings to match.
      switch (BuiltinName[20]) {
      default: break;
      case 'e':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+21, "l_4si", 5))
          break;
        return Intrinsic::ppc_altivec_vsel;	 // "__builtin_altivec_vsel_4si"
      case 'u':	 // 4 strings to match.
        if (BuiltinName[21] != 'm')
          break;
        switch (BuiltinName[22]) {
        default: break;
        case '2':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+23, "sws", 3))
            break;
          return Intrinsic::ppc_altivec_vsum2sws;	 // "__builtin_altivec_vsum2sws"
        case '4':	 // 3 strings to match.
          switch (BuiltinName[23]) {
          default: break;
          case 's':	 // 2 strings to match.
            switch (BuiltinName[24]) {
            default: break;
            case 'b':	 // 1 string to match.
              if (BuiltinName[25] != 's')
                break;
              return Intrinsic::ppc_altivec_vsum4sbs;	 // "__builtin_altivec_vsum4sbs"
            case 'h':	 // 1 string to match.
              if (BuiltinName[25] != 's')
                break;
              return Intrinsic::ppc_altivec_vsum4shs;	 // "__builtin_altivec_vsum4shs"
            }
            break;
          case 'u':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "bs", 2))
              break;
            return Intrinsic::ppc_altivec_vsum4ubs;	 // "__builtin_altivec_vsum4ubs"
          }
          break;
        }
        break;
      }
      break;
    }
    break;
  case 27:	 // 5 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_altivec_v", 19))
      break;
    switch (BuiltinName[19]) {
    default: break;
    case 'c':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+20, "mpbfp_p", 7))
        break;
      return Intrinsic::ppc_altivec_vcmpbfp_p;	 // "__builtin_altivec_vcmpbfp_p"
    case 'm':	 // 2 strings to match.
      switch (BuiltinName[20]) {
      default: break;
      case 'h':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+21, "addshs", 6))
          break;
        return Intrinsic::ppc_altivec_vmhaddshs;	 // "__builtin_altivec_vmhaddshs"
      case 'l':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+21, "adduhm", 6))
          break;
        return Intrinsic::ppc_altivec_vmladduhm;	 // "__builtin_altivec_vmladduhm"
      }
      break;
    case 'p':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+20, "erm_4si", 7))
        break;
      return Intrinsic::ppc_altivec_vperm;	 // "__builtin_altivec_vperm_4si"
    case 'r':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+20, "sqrtefp", 7))
        break;
      return Intrinsic::ppc_altivec_vrsqrtefp;	 // "__builtin_altivec_vrsqrtefp"
    }
    break;
  case 28:	 // 13 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_altivec_v", 19))
      break;
    switch (BuiltinName[19]) {
    default: break;
    case 'c':	 // 12 strings to match.
      if (memcmp(BuiltinName.data()+20, "mp", 2))
        break;
      switch (BuiltinName[22]) {
      default: break;
      case 'e':	 // 4 strings to match.
        if (BuiltinName[23] != 'q')
          break;
        switch (BuiltinName[24]) {
        default: break;
        case 'f':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+25, "p_p", 3))
            break;
          return Intrinsic::ppc_altivec_vcmpeqfp_p;	 // "__builtin_altivec_vcmpeqfp_p"
        case 'u':	 // 3 strings to match.
          switch (BuiltinName[25]) {
          default: break;
          case 'b':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "_p", 2))
              break;
            return Intrinsic::ppc_altivec_vcmpequb_p;	 // "__builtin_altivec_vcmpequb_p"
          case 'h':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "_p", 2))
              break;
            return Intrinsic::ppc_altivec_vcmpequh_p;	 // "__builtin_altivec_vcmpequh_p"
          case 'w':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+26, "_p", 2))
              break;
            return Intrinsic::ppc_altivec_vcmpequw_p;	 // "__builtin_altivec_vcmpequw_p"
          }
          break;
        }
        break;
      case 'g':	 // 8 strings to match.
        switch (BuiltinName[23]) {
        default: break;
        case 'e':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+24, "fp_p", 4))
            break;
          return Intrinsic::ppc_altivec_vcmpgefp_p;	 // "__builtin_altivec_vcmpgefp_p"
        case 't':	 // 7 strings to match.
          switch (BuiltinName[24]) {
          default: break;
          case 'f':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "p_p", 3))
              break;
            return Intrinsic::ppc_altivec_vcmpgtfp_p;	 // "__builtin_altivec_vcmpgtfp_p"
          case 's':	 // 3 strings to match.
            switch (BuiltinName[25]) {
            default: break;
            case 'b':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+26, "_p", 2))
                break;
              return Intrinsic::ppc_altivec_vcmpgtsb_p;	 // "__builtin_altivec_vcmpgtsb_p"
            case 'h':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+26, "_p", 2))
                break;
              return Intrinsic::ppc_altivec_vcmpgtsh_p;	 // "__builtin_altivec_vcmpgtsh_p"
            case 'w':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+26, "_p", 2))
                break;
              return Intrinsic::ppc_altivec_vcmpgtsw_p;	 // "__builtin_altivec_vcmpgtsw_p"
            }
            break;
          case 'u':	 // 3 strings to match.
            switch (BuiltinName[25]) {
            default: break;
            case 'b':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+26, "_p", 2))
                break;
              return Intrinsic::ppc_altivec_vcmpgtub_p;	 // "__builtin_altivec_vcmpgtub_p"
            case 'h':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+26, "_p", 2))
                break;
              return Intrinsic::ppc_altivec_vcmpgtuh_p;	 // "__builtin_altivec_vcmpgtuh_p"
            case 'w':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+26, "_p", 2))
                break;
              return Intrinsic::ppc_altivec_vcmpgtuw_p;	 // "__builtin_altivec_vcmpgtuw_p"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 'm':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+20, "hraddshs", 8))
        break;
      return Intrinsic::ppc_altivec_vmhraddshs;	 // "__builtin_altivec_vmhraddshs"
    }
    break;
  }
  }
  if (TargetPrefix == "r600") {
  switch (BuiltinName.size()) {
  default: break;
  case 26:	 // 3 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_r600_read_tgid_", 25))
      break;
    switch (BuiltinName[25]) {
    default: break;
    case 'x':	 // 1 string to match.
      return Intrinsic::r600_read_tgid_x;	 // "__builtin_r600_read_tgid_x"
    case 'y':	 // 1 string to match.
      return Intrinsic::r600_read_tgid_y;	 // "__builtin_r600_read_tgid_y"
    case 'z':	 // 1 string to match.
      return Intrinsic::r600_read_tgid_z;	 // "__builtin_r600_read_tgid_z"
    }
    break;
  case 27:	 // 3 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_r600_read_tidig_", 26))
      break;
    switch (BuiltinName[26]) {
    default: break;
    case 'x':	 // 1 string to match.
      return Intrinsic::r600_read_tidig_x;	 // "__builtin_r600_read_tidig_x"
    case 'y':	 // 1 string to match.
      return Intrinsic::r600_read_tidig_y;	 // "__builtin_r600_read_tidig_y"
    case 'z':	 // 1 string to match.
      return Intrinsic::r600_read_tidig_z;	 // "__builtin_r600_read_tidig_z"
    }
    break;
  case 29:	 // 3 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_r600_read_ngroups_", 28))
      break;
    switch (BuiltinName[28]) {
    default: break;
    case 'x':	 // 1 string to match.
      return Intrinsic::r600_read_ngroups_x;	 // "__builtin_r600_read_ngroups_x"
    case 'y':	 // 1 string to match.
      return Intrinsic::r600_read_ngroups_y;	 // "__builtin_r600_read_ngroups_y"
    case 'z':	 // 1 string to match.
      return Intrinsic::r600_read_ngroups_z;	 // "__builtin_r600_read_ngroups_z"
    }
    break;
  case 32:	 // 3 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_r600_read_local_size_", 31))
      break;
    switch (BuiltinName[31]) {
    default: break;
    case 'x':	 // 1 string to match.
      return Intrinsic::r600_read_local_size_x;	 // "__builtin_r600_read_local_size_x"
    case 'y':	 // 1 string to match.
      return Intrinsic::r600_read_local_size_y;	 // "__builtin_r600_read_local_size_y"
    case 'z':	 // 1 string to match.
      return Intrinsic::r600_read_local_size_z;	 // "__builtin_r600_read_local_size_z"
    }
    break;
  case 33:	 // 3 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_r600_read_global_size_", 32))
      break;
    switch (BuiltinName[32]) {
    default: break;
    case 'x':	 // 1 string to match.
      return Intrinsic::r600_read_global_size_x;	 // "__builtin_r600_read_global_size_x"
    case 'y':	 // 1 string to match.
      return Intrinsic::r600_read_global_size_y;	 // "__builtin_r600_read_global_size_y"
    case 'z':	 // 1 string to match.
      return Intrinsic::r600_read_global_size_z;	 // "__builtin_r600_read_global_size_z"
    }
    break;
  }
  }
  if (TargetPrefix == "x86") {
  switch (BuiltinName.size()) {
  default: break;
  case 18:	 // 1 string to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_ia32_por", 18))
      break;
    return Intrinsic::x86_mmx_por;	 // "__builtin_ia32_por"
  case 19:	 // 6 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_ia32_", 15))
      break;
    switch (BuiltinName[15]) {
    default: break;
    case 'd':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "pp", 2))
        break;
      switch (BuiltinName[18]) {
      default: break;
      case 'd':	 // 1 string to match.
        return Intrinsic::x86_sse41_dppd;	 // "__builtin_ia32_dppd"
      case 's':	 // 1 string to match.
        return Intrinsic::x86_sse41_dpps;	 // "__builtin_ia32_dpps"
      }
      break;
    case 'e':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+16, "mms", 3))
        break;
      return Intrinsic::x86_mmx_emms;	 // "__builtin_ia32_emms"
    case 'p':	 // 2 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'a':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+17, "nd", 2))
          break;
        return Intrinsic::x86_mmx_pand;	 // "__builtin_ia32_pand"
      case 'x':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+17, "or", 2))
          break;
        return Intrinsic::x86_mmx_pxor;	 // "__builtin_ia32_pxor"
      }
      break;
    case 'x':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+16, "end", 3))
        break;
      return Intrinsic::x86_xend;	 // "__builtin_ia32_xend"
    }
    break;
  case 20:	 // 64 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_ia32_", 15))
      break;
    switch (BuiltinName[15]) {
    default: break;
    case 'a':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "dds", 3))
        break;
      switch (BuiltinName[19]) {
      default: break;
      case 'd':	 // 1 string to match.
        return Intrinsic::x86_sse2_add_sd;	 // "__builtin_ia32_addsd"
      case 's':	 // 1 string to match.
        return Intrinsic::x86_sse_add_ss;	 // "__builtin_ia32_addss"
      }
      break;
    case 'c':	 // 4 strings to match.
      if (memcmp(BuiltinName.data()+16, "mp", 2))
        break;
      switch (BuiltinName[18]) {
      default: break;
      case 'p':	 // 2 strings to match.
        switch (BuiltinName[19]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::x86_sse2_cmp_pd;	 // "__builtin_ia32_cmppd"
        case 's':	 // 1 string to match.
          return Intrinsic::x86_sse_cmp_ps;	 // "__builtin_ia32_cmpps"
        }
        break;
      case 's':	 // 2 strings to match.
        switch (BuiltinName[19]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::x86_sse2_cmp_sd;	 // "__builtin_ia32_cmpsd"
        case 's':	 // 1 string to match.
          return Intrinsic::x86_sse_cmp_ss;	 // "__builtin_ia32_cmpss"
        }
        break;
      }
      break;
    case 'd':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "ivs", 3))
        break;
      switch (BuiltinName[19]) {
      default: break;
      case 'd':	 // 1 string to match.
        return Intrinsic::x86_sse2_div_sd;	 // "__builtin_ia32_divsd"
      case 's':	 // 1 string to match.
        return Intrinsic::x86_sse_div_ss;	 // "__builtin_ia32_divss"
      }
      break;
    case 'e':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+16, "xtrq", 4))
        break;
      return Intrinsic::x86_sse4a_extrq;	 // "__builtin_ia32_extrq"
    case 'f':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+16, "emms", 4))
        break;
      return Intrinsic::x86_mmx_femms;	 // "__builtin_ia32_femms"
    case 'k':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+16, "orhi", 4))
        break;
      return Intrinsic::x86_avx512_kor_w;	 // "__builtin_ia32_korhi"
    case 'l':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+16, "ddqu", 4))
        break;
      return Intrinsic::x86_sse3_ldu_dq;	 // "__builtin_ia32_lddqu"
    case 'm':	 // 11 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'a':	 // 4 strings to match.
        if (BuiltinName[17] != 'x')
          break;
        switch (BuiltinName[18]) {
        default: break;
        case 'p':	 // 2 strings to match.
          switch (BuiltinName[19]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_sse2_max_pd;	 // "__builtin_ia32_maxpd"
          case 's':	 // 1 string to match.
            return Intrinsic::x86_sse_max_ps;	 // "__builtin_ia32_maxps"
          }
          break;
        case 's':	 // 2 strings to match.
          switch (BuiltinName[19]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_sse2_max_sd;	 // "__builtin_ia32_maxsd"
          case 's':	 // 1 string to match.
            return Intrinsic::x86_sse_max_ss;	 // "__builtin_ia32_maxss"
          }
          break;
        }
        break;
      case 'i':	 // 4 strings to match.
        if (BuiltinName[17] != 'n')
          break;
        switch (BuiltinName[18]) {
        default: break;
        case 'p':	 // 2 strings to match.
          switch (BuiltinName[19]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_sse2_min_pd;	 // "__builtin_ia32_minpd"
          case 's':	 // 1 string to match.
            return Intrinsic::x86_sse_min_ps;	 // "__builtin_ia32_minps"
          }
          break;
        case 's':	 // 2 strings to match.
          switch (BuiltinName[19]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_sse2_min_sd;	 // "__builtin_ia32_minsd"
          case 's':	 // 1 string to match.
            return Intrinsic::x86_sse_min_ss;	 // "__builtin_ia32_minss"
          }
          break;
        }
        break;
      case 'u':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "ls", 2))
          break;
        switch (BuiltinName[19]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::x86_sse2_mul_sd;	 // "__builtin_ia32_mulsd"
        case 's':	 // 1 string to match.
          return Intrinsic::x86_sse_mul_ss;	 // "__builtin_ia32_mulss"
        }
        break;
      case 'w':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+17, "ait", 3))
          break;
        return Intrinsic::x86_sse3_mwait;	 // "__builtin_ia32_mwait"
      }
      break;
    case 'p':	 // 34 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'a':	 // 11 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'b':	 // 3 strings to match.
          if (BuiltinName[18] != 's')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::x86_ssse3_pabs_b;	 // "__builtin_ia32_pabsb"
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_ssse3_pabs_d;	 // "__builtin_ia32_pabsd"
          case 'w':	 // 1 string to match.
            return Intrinsic::x86_ssse3_pabs_w;	 // "__builtin_ia32_pabsw"
          }
          break;
        case 'd':	 // 4 strings to match.
          if (BuiltinName[18] != 'd')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::x86_mmx_padd_b;	 // "__builtin_ia32_paddb"
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_mmx_padd_d;	 // "__builtin_ia32_paddd"
          case 'q':	 // 1 string to match.
            return Intrinsic::x86_mmx_padd_q;	 // "__builtin_ia32_paddq"
          case 'w':	 // 1 string to match.
            return Intrinsic::x86_mmx_padd_w;	 // "__builtin_ia32_paddw"
          }
          break;
        case 'n':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "dn", 2))
            break;
          return Intrinsic::x86_mmx_pandn;	 // "__builtin_ia32_pandn"
        case 'u':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "se", 2))
            break;
          return Intrinsic::x86_sse2_pause;	 // "__builtin_ia32_pause"
        case 'v':	 // 2 strings to match.
          if (BuiltinName[18] != 'g')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::x86_mmx_pavg_b;	 // "__builtin_ia32_pavgb"
          case 'w':	 // 1 string to match.
            return Intrinsic::x86_mmx_pavg_w;	 // "__builtin_ia32_pavgw"
          }
          break;
        }
        break;
      case 'f':	 // 9 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case '2':	 // 2 strings to match.
          if (BuiltinName[18] != 'i')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_3dnow_pf2id;	 // "__builtin_ia32_pf2id"
          case 'w':	 // 1 string to match.
            return Intrinsic::x86_3dnowa_pf2iw;	 // "__builtin_ia32_pf2iw"
          }
          break;
        case 'a':	 // 2 strings to match.
          switch (BuiltinName[18]) {
          default: break;
          case 'c':	 // 1 string to match.
            if (BuiltinName[19] != 'c')
              break;
            return Intrinsic::x86_3dnow_pfacc;	 // "__builtin_ia32_pfacc"
          case 'd':	 // 1 string to match.
            if (BuiltinName[19] != 'd')
              break;
            return Intrinsic::x86_3dnow_pfadd;	 // "__builtin_ia32_pfadd"
          }
          break;
        case 'm':	 // 3 strings to match.
          switch (BuiltinName[18]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (BuiltinName[19] != 'x')
              break;
            return Intrinsic::x86_3dnow_pfmax;	 // "__builtin_ia32_pfmax"
          case 'i':	 // 1 string to match.
            if (BuiltinName[19] != 'n')
              break;
            return Intrinsic::x86_3dnow_pfmin;	 // "__builtin_ia32_pfmin"
          case 'u':	 // 1 string to match.
            if (BuiltinName[19] != 'l')
              break;
            return Intrinsic::x86_3dnow_pfmul;	 // "__builtin_ia32_pfmul"
          }
          break;
        case 'r':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "cp", 2))
            break;
          return Intrinsic::x86_3dnow_pfrcp;	 // "__builtin_ia32_pfrcp"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "ub", 2))
            break;
          return Intrinsic::x86_3dnow_pfsub;	 // "__builtin_ia32_pfsub"
        }
        break;
      case 'i':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "2f", 2))
          break;
        switch (BuiltinName[19]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::x86_3dnow_pi2fd;	 // "__builtin_ia32_pi2fd"
        case 'w':	 // 1 string to match.
          return Intrinsic::x86_3dnowa_pi2fw;	 // "__builtin_ia32_pi2fw"
        }
        break;
      case 's':	 // 12 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'l':	 // 3 strings to match.
          if (BuiltinName[18] != 'l')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_mmx_psll_d;	 // "__builtin_ia32_pslld"
          case 'q':	 // 1 string to match.
            return Intrinsic::x86_mmx_psll_q;	 // "__builtin_ia32_psllq"
          case 'w':	 // 1 string to match.
            return Intrinsic::x86_mmx_psll_w;	 // "__builtin_ia32_psllw"
          }
          break;
        case 'r':	 // 5 strings to match.
          switch (BuiltinName[18]) {
          default: break;
          case 'a':	 // 2 strings to match.
            switch (BuiltinName[19]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_mmx_psra_d;	 // "__builtin_ia32_psrad"
            case 'w':	 // 1 string to match.
              return Intrinsic::x86_mmx_psra_w;	 // "__builtin_ia32_psraw"
            }
            break;
          case 'l':	 // 3 strings to match.
            switch (BuiltinName[19]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_mmx_psrl_d;	 // "__builtin_ia32_psrld"
            case 'q':	 // 1 string to match.
              return Intrinsic::x86_mmx_psrl_q;	 // "__builtin_ia32_psrlq"
            case 'w':	 // 1 string to match.
              return Intrinsic::x86_mmx_psrl_w;	 // "__builtin_ia32_psrlw"
            }
            break;
          }
          break;
        case 'u':	 // 4 strings to match.
          if (BuiltinName[18] != 'b')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::x86_mmx_psub_b;	 // "__builtin_ia32_psubb"
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_mmx_psub_d;	 // "__builtin_ia32_psubd"
          case 'q':	 // 1 string to match.
            return Intrinsic::x86_mmx_psub_q;	 // "__builtin_ia32_psubq"
          case 'w':	 // 1 string to match.
            return Intrinsic::x86_mmx_psub_w;	 // "__builtin_ia32_psubw"
          }
          break;
        }
        break;
      }
      break;
    case 'r':	 // 4 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'c':	 // 2 strings to match.
        if (BuiltinName[17] != 'p')
          break;
        switch (BuiltinName[18]) {
        default: break;
        case 'p':	 // 1 string to match.
          if (BuiltinName[19] != 's')
            break;
          return Intrinsic::x86_sse_rcp_ps;	 // "__builtin_ia32_rcpps"
        case 's':	 // 1 string to match.
          if (BuiltinName[19] != 's')
            break;
          return Intrinsic::x86_sse_rcp_ss;	 // "__builtin_ia32_rcpss"
        }
        break;
      case 'd':	 // 2 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'p':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "mc", 2))
            break;
          return Intrinsic::x86_rdpmc;	 // "__builtin_ia32_rdpmc"
        case 't':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "sc", 2))
            break;
          return Intrinsic::x86_rdtsc;	 // "__builtin_ia32_rdtsc"
        }
        break;
      }
      break;
    case 's':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "ubs", 3))
        break;
      switch (BuiltinName[19]) {
      default: break;
      case 'd':	 // 1 string to match.
        return Intrinsic::x86_sse2_sub_sd;	 // "__builtin_ia32_subsd"
      case 's':	 // 1 string to match.
        return Intrinsic::x86_sse_sub_ss;	 // "__builtin_ia32_subss"
      }
      break;
    case 'x':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+16, "test", 4))
        break;
      return Intrinsic::x86_xtest;	 // "__builtin_ia32_xtest"
    }
    break;
  case 21:	 // 55 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_ia32_", 15))
      break;
    switch (BuiltinName[15]) {
    default: break;
    case 'c':	 // 5 strings to match.
      if (memcmp(BuiltinName.data()+16, "omi", 3))
        break;
      switch (BuiltinName[19]) {
      default: break;
      case 'e':	 // 1 string to match.
        if (BuiltinName[20] != 'q')
          break;
        return Intrinsic::x86_sse_comieq_ss;	 // "__builtin_ia32_comieq"
      case 'g':	 // 2 strings to match.
        switch (BuiltinName[20]) {
        default: break;
        case 'e':	 // 1 string to match.
          return Intrinsic::x86_sse_comige_ss;	 // "__builtin_ia32_comige"
        case 't':	 // 1 string to match.
          return Intrinsic::x86_sse_comigt_ss;	 // "__builtin_ia32_comigt"
        }
        break;
      case 'l':	 // 2 strings to match.
        switch (BuiltinName[20]) {
        default: break;
        case 'e':	 // 1 string to match.
          return Intrinsic::x86_sse_comile_ss;	 // "__builtin_ia32_comile"
        case 't':	 // 1 string to match.
          return Intrinsic::x86_sse_comilt_ss;	 // "__builtin_ia32_comilt"
        }
        break;
      }
      break;
    case 'e':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+16, "xtrqi", 5))
        break;
      return Intrinsic::x86_sse4a_extrqi;	 // "__builtin_ia32_extrqi"
    case 'h':	 // 4 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'a':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "ddp", 3))
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::x86_sse3_hadd_pd;	 // "__builtin_ia32_haddpd"
        case 's':	 // 1 string to match.
          return Intrinsic::x86_sse3_hadd_ps;	 // "__builtin_ia32_haddps"
        }
        break;
      case 's':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "ubp", 3))
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::x86_sse3_hsub_pd;	 // "__builtin_ia32_hsubpd"
        case 's':	 // 1 string to match.
          return Intrinsic::x86_sse3_hsub_ps;	 // "__builtin_ia32_hsubps"
        }
        break;
      }
      break;
    case 'k':	 // 3 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'a':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+17, "ndhi", 4))
          break;
        return Intrinsic::x86_avx512_kand_w;	 // "__builtin_ia32_kandhi"
      case 'n':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+17, "othi", 4))
          break;
        return Intrinsic::x86_avx512_knot_w;	 // "__builtin_ia32_knothi"
      case 'x':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+17, "orhi", 4))
          break;
        return Intrinsic::x86_avx512_kxor_w;	 // "__builtin_ia32_kxorhi"
      }
      break;
    case 'l':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+16, "fence", 5))
        break;
      return Intrinsic::x86_sse2_lfence;	 // "__builtin_ia32_lfence"
    case 'm':	 // 2 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'f':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+17, "ence", 4))
          break;
        return Intrinsic::x86_sse2_mfence;	 // "__builtin_ia32_mfence"
      case 'o':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+17, "vntq", 4))
          break;
        return Intrinsic::x86_mmx_movnt_dq;	 // "__builtin_ia32_movntq"
      }
      break;
    case 'p':	 // 31 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'a':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "dds", 3))
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'b':	 // 1 string to match.
          return Intrinsic::x86_mmx_padds_b;	 // "__builtin_ia32_paddsb"
        case 'w':	 // 1 string to match.
          return Intrinsic::x86_mmx_padds_w;	 // "__builtin_ia32_paddsw"
        }
        break;
      case 'f':	 // 2 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'n':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "acc", 3))
            break;
          return Intrinsic::x86_3dnowa_pfnacc;	 // "__builtin_ia32_pfnacc"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "ubr", 3))
            break;
          return Intrinsic::x86_3dnow_pfsubr;	 // "__builtin_ia32_pfsubr"
        }
        break;
      case 'h':	 // 4 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'a':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+18, "dd", 2))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_ssse3_phadd_d;	 // "__builtin_ia32_phaddd"
          case 'w':	 // 1 string to match.
            return Intrinsic::x86_ssse3_phadd_w;	 // "__builtin_ia32_phaddw"
          }
          break;
        case 's':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+18, "ub", 2))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_ssse3_phsub_d;	 // "__builtin_ia32_phsubd"
          case 'w':	 // 1 string to match.
            return Intrinsic::x86_ssse3_phsub_w;	 // "__builtin_ia32_phsubw"
          }
          break;
        }
        break;
      case 'm':	 // 6 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'a':	 // 2 strings to match.
          if (BuiltinName[18] != 'x')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 's':	 // 1 string to match.
            if (BuiltinName[20] != 'w')
              break;
            return Intrinsic::x86_mmx_pmaxs_w;	 // "__builtin_ia32_pmaxsw"
          case 'u':	 // 1 string to match.
            if (BuiltinName[20] != 'b')
              break;
            return Intrinsic::x86_mmx_pmaxu_b;	 // "__builtin_ia32_pmaxub"
          }
          break;
        case 'i':	 // 2 strings to match.
          if (BuiltinName[18] != 'n')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 's':	 // 1 string to match.
            if (BuiltinName[20] != 'w')
              break;
            return Intrinsic::x86_mmx_pmins_w;	 // "__builtin_ia32_pminsw"
          case 'u':	 // 1 string to match.
            if (BuiltinName[20] != 'b')
              break;
            return Intrinsic::x86_mmx_pminu_b;	 // "__builtin_ia32_pminub"
          }
          break;
        case 'u':	 // 2 strings to match.
          if (BuiltinName[18] != 'l')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'h':	 // 1 string to match.
            if (BuiltinName[20] != 'w')
              break;
            return Intrinsic::x86_mmx_pmulh_w;	 // "__builtin_ia32_pmulhw"
          case 'l':	 // 1 string to match.
            if (BuiltinName[20] != 'w')
              break;
            return Intrinsic::x86_mmx_pmull_w;	 // "__builtin_ia32_pmullw"
          }
          break;
        }
        break;
      case 's':	 // 17 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "dbw", 3))
            break;
          return Intrinsic::x86_mmx_psad_bw;	 // "__builtin_ia32_psadbw"
        case 'h':	 // 3 strings to match.
          if (memcmp(BuiltinName.data()+18, "uf", 2))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::x86_ssse3_pshuf_b;	 // "__builtin_ia32_pshufb"
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_sse2_pshuf_d;	 // "__builtin_ia32_pshufd"
          case 'w':	 // 1 string to match.
            return Intrinsic::x86_sse_pshuf_w;	 // "__builtin_ia32_pshufw"
          }
          break;
        case 'i':	 // 3 strings to match.
          if (memcmp(BuiltinName.data()+18, "gn", 2))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::x86_ssse3_psign_b;	 // "__builtin_ia32_psignb"
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_ssse3_psign_d;	 // "__builtin_ia32_psignd"
          case 'w':	 // 1 string to match.
            return Intrinsic::x86_ssse3_psign_w;	 // "__builtin_ia32_psignw"
          }
          break;
        case 'l':	 // 3 strings to match.
          if (BuiltinName[18] != 'l')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (BuiltinName[20] != 'i')
              break;
            return Intrinsic::x86_mmx_pslli_d;	 // "__builtin_ia32_pslldi"
          case 'q':	 // 1 string to match.
            if (BuiltinName[20] != 'i')
              break;
            return Intrinsic::x86_mmx_pslli_q;	 // "__builtin_ia32_psllqi"
          case 'w':	 // 1 string to match.
            if (BuiltinName[20] != 'i')
              break;
            return Intrinsic::x86_mmx_pslli_w;	 // "__builtin_ia32_psllwi"
          }
          break;
        case 'r':	 // 5 strings to match.
          switch (BuiltinName[18]) {
          default: break;
          case 'a':	 // 2 strings to match.
            switch (BuiltinName[19]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (BuiltinName[20] != 'i')
                break;
              return Intrinsic::x86_mmx_psrai_d;	 // "__builtin_ia32_psradi"
            case 'w':	 // 1 string to match.
              if (BuiltinName[20] != 'i')
                break;
              return Intrinsic::x86_mmx_psrai_w;	 // "__builtin_ia32_psrawi"
            }
            break;
          case 'l':	 // 3 strings to match.
            switch (BuiltinName[19]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (BuiltinName[20] != 'i')
                break;
              return Intrinsic::x86_mmx_psrli_d;	 // "__builtin_ia32_psrldi"
            case 'q':	 // 1 string to match.
              if (BuiltinName[20] != 'i')
                break;
              return Intrinsic::x86_mmx_psrli_q;	 // "__builtin_ia32_psrlqi"
            case 'w':	 // 1 string to match.
              if (BuiltinName[20] != 'i')
                break;
              return Intrinsic::x86_mmx_psrli_w;	 // "__builtin_ia32_psrlwi"
            }
            break;
          }
          break;
        case 'u':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+18, "bs", 2))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::x86_mmx_psubs_b;	 // "__builtin_ia32_psubsb"
          case 'w':	 // 1 string to match.
            return Intrinsic::x86_mmx_psubs_w;	 // "__builtin_ia32_psubsw"
          }
          break;
        }
        break;
      }
      break;
    case 'r':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+16, "dtscp", 5))
        break;
      return Intrinsic::x86_rdtscp;	 // "__builtin_ia32_rdtscp"
    case 's':	 // 5 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'f':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+17, "ence", 4))
          break;
        return Intrinsic::x86_sse_sfence;	 // "__builtin_ia32_sfence"
      case 'q':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+17, "rt", 2))
          break;
        switch (BuiltinName[19]) {
        default: break;
        case 'p':	 // 2 strings to match.
          switch (BuiltinName[20]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_sse2_sqrt_pd;	 // "__builtin_ia32_sqrtpd"
          case 's':	 // 1 string to match.
            return Intrinsic::x86_sse_sqrt_ps;	 // "__builtin_ia32_sqrtps"
          }
          break;
        case 's':	 // 2 strings to match.
          switch (BuiltinName[20]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_sse2_sqrt_sd;	 // "__builtin_ia32_sqrtsd"
          case 's':	 // 1 string to match.
            return Intrinsic::x86_sse_sqrt_ss;	 // "__builtin_ia32_sqrtss"
          }
          break;
        }
        break;
      }
      break;
    case 'x':	 // 2 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'a':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+17, "bort", 4))
          break;
        return Intrinsic::x86_xabort;	 // "__builtin_ia32_xabort"
      case 'b':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+17, "egin", 4))
          break;
        return Intrinsic::x86_xbegin;	 // "__builtin_ia32_xbegin"
      }
      break;
    }
    break;
  case 22:	 // 57 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_ia32_", 15))
      break;
    switch (BuiltinName[15]) {
    default: break;
    case 'b':	 // 4 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'l':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "endp", 4))
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::x86_sse41_blendpd;	 // "__builtin_ia32_blendpd"
        case 's':	 // 1 string to match.
          return Intrinsic::x86_sse41_blendps;	 // "__builtin_ia32_blendps"
        }
        break;
      case 'z':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "hi_", 3))
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (BuiltinName[21] != 'i')
            break;
          return Intrinsic::x86_bmi_bzhi_64;	 // "__builtin_ia32_bzhi_di"
        case 's':	 // 1 string to match.
          if (BuiltinName[21] != 'i')
            break;
          return Intrinsic::x86_bmi_bzhi_32;	 // "__builtin_ia32_bzhi_si"
        }
        break;
      }
      break;
    case 'c':	 // 6 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'l':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+17, "flush", 5))
          break;
        return Intrinsic::x86_sse2_clflush;	 // "__builtin_ia32_clflush"
      case 'o':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+17, "mineq", 5))
          break;
        return Intrinsic::x86_sse_comineq_ss;	 // "__builtin_ia32_comineq"
      case 'r':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+17, "c32", 3))
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (BuiltinName[21] != 'i')
            break;
          return Intrinsic::x86_sse42_crc32_64_64;	 // "__builtin_ia32_crc32di"
        case 'h':	 // 1 string to match.
          if (BuiltinName[21] != 'i')
            break;
          return Intrinsic::x86_sse42_crc32_32_16;	 // "__builtin_ia32_crc32hi"
        case 'q':	 // 1 string to match.
          if (BuiltinName[21] != 'i')
            break;
          return Intrinsic::x86_sse42_crc32_32_8;	 // "__builtin_ia32_crc32qi"
        case 's':	 // 1 string to match.
          if (BuiltinName[21] != 'i')
            break;
          return Intrinsic::x86_sse42_crc32_32_32;	 // "__builtin_ia32_crc32si"
        }
        break;
      }
      break;
    case 'd':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+16, "pps256", 6))
        break;
      return Intrinsic::x86_avx_dp_ps_256;	 // "__builtin_ia32_dpps256"
    case 'i':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+16, "nsertq", 6))
        break;
      return Intrinsic::x86_sse4a_insertq;	 // "__builtin_ia32_insertq"
    case 'k':	 // 2 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'a':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+17, "ndnhi", 5))
          break;
        return Intrinsic::x86_avx512_kandn_w;	 // "__builtin_ia32_kandnhi"
      case 'x':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+17, "norhi", 5))
          break;
        return Intrinsic::x86_avx512_kxnor_w;	 // "__builtin_ia32_kxnorhi"
      }
      break;
    case 'm':	 // 3 strings to match.
      if (BuiltinName[16] != 'o')
        break;
      switch (BuiltinName[17]) {
      default: break;
      case 'n':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+18, "itor", 4))
          break;
        return Intrinsic::x86_sse3_monitor;	 // "__builtin_ia32_monitor"
      case 'v':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+18, "nts", 3))
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::x86_sse4a_movnt_sd;	 // "__builtin_ia32_movntsd"
        case 's':	 // 1 string to match.
          return Intrinsic::x86_sse4a_movnt_ss;	 // "__builtin_ia32_movntss"
        }
        break;
      }
      break;
    case 'p':	 // 29 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'a':	 // 4 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'd':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+18, "dus", 3))
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::x86_mmx_paddus_b;	 // "__builtin_ia32_paddusb"
          case 'w':	 // 1 string to match.
            return Intrinsic::x86_mmx_paddus_w;	 // "__builtin_ia32_paddusw"
          }
          break;
        case 'l':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "ignr", 4))
            break;
          return Intrinsic::x86_mmx_palignr_b;	 // "__builtin_ia32_palignr"
        case 'v':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "gusb", 4))
            break;
          return Intrinsic::x86_3dnow_pavgusb;	 // "__builtin_ia32_pavgusb"
        }
        break;
      case 'c':	 // 6 strings to match.
        if (memcmp(BuiltinName.data()+17, "mp", 2))
          break;
        switch (BuiltinName[19]) {
        default: break;
        case 'e':	 // 3 strings to match.
          if (BuiltinName[20] != 'q')
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::x86_mmx_pcmpeq_b;	 // "__builtin_ia32_pcmpeqb"
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_mmx_pcmpeq_d;	 // "__builtin_ia32_pcmpeqd"
          case 'w':	 // 1 string to match.
            return Intrinsic::x86_mmx_pcmpeq_w;	 // "__builtin_ia32_pcmpeqw"
          }
          break;
        case 'g':	 // 3 strings to match.
          if (BuiltinName[20] != 't')
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::x86_mmx_pcmpgt_b;	 // "__builtin_ia32_pcmpgtb"
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_mmx_pcmpgt_d;	 // "__builtin_ia32_pcmpgtd"
          case 'w':	 // 1 string to match.
            return Intrinsic::x86_mmx_pcmpgt_w;	 // "__builtin_ia32_pcmpgtw"
          }
          break;
        }
        break;
      case 'd':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "ep_", 3))
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (BuiltinName[21] != 'i')
            break;
          return Intrinsic::x86_bmi_pdep_64;	 // "__builtin_ia32_pdep_di"
        case 's':	 // 1 string to match.
          if (BuiltinName[21] != 'i')
            break;
          return Intrinsic::x86_bmi_pdep_32;	 // "__builtin_ia32_pdep_si"
        }
        break;
      case 'e':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "xt_", 3))
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (BuiltinName[21] != 'i')
            break;
          return Intrinsic::x86_bmi_pext_64;	 // "__builtin_ia32_pext_di"
        case 's':	 // 1 string to match.
          if (BuiltinName[21] != 'i')
            break;
          return Intrinsic::x86_bmi_pext_32;	 // "__builtin_ia32_pext_si"
        }
        break;
      case 'f':	 // 5 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'c':	 // 3 strings to match.
          if (memcmp(BuiltinName.data()+18, "mp", 2))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'e':	 // 1 string to match.
            if (BuiltinName[21] != 'q')
              break;
            return Intrinsic::x86_3dnow_pfcmpeq;	 // "__builtin_ia32_pfcmpeq"
          case 'g':	 // 2 strings to match.
            switch (BuiltinName[21]) {
            default: break;
            case 'e':	 // 1 string to match.
              return Intrinsic::x86_3dnow_pfcmpge;	 // "__builtin_ia32_pfcmpge"
            case 't':	 // 1 string to match.
              return Intrinsic::x86_3dnow_pfcmpgt;	 // "__builtin_ia32_pfcmpgt"
            }
            break;
          }
          break;
        case 'p':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "nacc", 4))
            break;
          return Intrinsic::x86_3dnowa_pfpnacc;	 // "__builtin_ia32_pfpnacc"
        case 'r':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "sqrt", 4))
            break;
          return Intrinsic::x86_3dnow_pfrsqrt;	 // "__builtin_ia32_pfrsqrt"
        }
        break;
      case 'h':	 // 2 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "ddsw", 4))
            break;
          return Intrinsic::x86_ssse3_phadd_sw;	 // "__builtin_ia32_phaddsw"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "ubsw", 4))
            break;
          return Intrinsic::x86_ssse3_phsub_sw;	 // "__builtin_ia32_phsubsw"
        }
        break;
      case 'm':	 // 4 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'a':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "ddwd", 4))
            break;
          return Intrinsic::x86_mmx_pmadd_wd;	 // "__builtin_ia32_pmaddwd"
        case 'u':	 // 3 strings to match.
          if (BuiltinName[18] != 'l')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'h':	 // 2 strings to match.
            switch (BuiltinName[20]) {
            default: break;
            case 'r':	 // 1 string to match.
              if (BuiltinName[21] != 'w')
                break;
              return Intrinsic::x86_3dnow_pmulhrw;	 // "__builtin_ia32_pmulhrw"
            case 'u':	 // 1 string to match.
              if (BuiltinName[21] != 'w')
                break;
              return Intrinsic::x86_mmx_pmulhu_w;	 // "__builtin_ia32_pmulhuw"
            }
            break;
          case 'u':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+20, "dq", 2))
              break;
            return Intrinsic::x86_mmx_pmulu_dq;	 // "__builtin_ia32_pmuludq"
          }
          break;
        }
        break;
      case 's':	 // 4 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'h':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+18, "uf", 2))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'h':	 // 1 string to match.
            if (BuiltinName[21] != 'w')
              break;
            return Intrinsic::x86_sse2_pshufh_w;	 // "__builtin_ia32_pshufhw"
          case 'l':	 // 1 string to match.
            if (BuiltinName[21] != 'w')
              break;
            return Intrinsic::x86_sse2_pshufl_w;	 // "__builtin_ia32_pshuflw"
          }
          break;
        case 'u':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+18, "bus", 3))
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'b':	 // 1 string to match.
            return Intrinsic::x86_mmx_psubus_b;	 // "__builtin_ia32_psubusb"
          case 'w':	 // 1 string to match.
            return Intrinsic::x86_mmx_psubus_w;	 // "__builtin_ia32_psubusw"
          }
          break;
        }
        break;
      }
      break;
    case 'r':	 // 6 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'o':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+17, "und", 3))
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'p':	 // 2 strings to match.
          switch (BuiltinName[21]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_sse41_round_pd;	 // "__builtin_ia32_roundpd"
          case 's':	 // 1 string to match.
            return Intrinsic::x86_sse41_round_ps;	 // "__builtin_ia32_roundps"
          }
          break;
        case 's':	 // 2 strings to match.
          switch (BuiltinName[21]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_sse41_round_sd;	 // "__builtin_ia32_roundsd"
          case 's':	 // 1 string to match.
            return Intrinsic::x86_sse41_round_ss;	 // "__builtin_ia32_roundss"
          }
          break;
        }
        break;
      case 's':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "qrt", 3))
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'p':	 // 1 string to match.
          if (BuiltinName[21] != 's')
            break;
          return Intrinsic::x86_sse_rsqrt_ps;	 // "__builtin_ia32_rsqrtps"
        case 's':	 // 1 string to match.
          if (BuiltinName[21] != 's')
            break;
          return Intrinsic::x86_sse_rsqrt_ss;	 // "__builtin_ia32_rsqrtss"
        }
        break;
      }
      break;
    case 'u':	 // 5 strings to match.
      if (memcmp(BuiltinName.data()+16, "comi", 4))
        break;
      switch (BuiltinName[20]) {
      default: break;
      case 'e':	 // 1 string to match.
        if (BuiltinName[21] != 'q')
          break;
        return Intrinsic::x86_sse_ucomieq_ss;	 // "__builtin_ia32_ucomieq"
      case 'g':	 // 2 strings to match.
        switch (BuiltinName[21]) {
        default: break;
        case 'e':	 // 1 string to match.
          return Intrinsic::x86_sse_ucomige_ss;	 // "__builtin_ia32_ucomige"
        case 't':	 // 1 string to match.
          return Intrinsic::x86_sse_ucomigt_ss;	 // "__builtin_ia32_ucomigt"
        }
        break;
      case 'l':	 // 2 strings to match.
        switch (BuiltinName[21]) {
        default: break;
        case 'e':	 // 1 string to match.
          return Intrinsic::x86_sse_ucomile_ss;	 // "__builtin_ia32_ucomile"
        case 't':	 // 1 string to match.
          return Intrinsic::x86_sse_ucomilt_ss;	 // "__builtin_ia32_ucomilt"
        }
        break;
      }
      break;
    }
    break;
  case 23:	 // 102 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_ia32_", 15))
      break;
    switch (BuiltinName[15]) {
    default: break;
    case 'a':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "ddsubp", 6))
        break;
      switch (BuiltinName[22]) {
      default: break;
      case 'd':	 // 1 string to match.
        return Intrinsic::x86_sse3_addsub_pd;	 // "__builtin_ia32_addsubpd"
      case 's':	 // 1 string to match.
        return Intrinsic::x86_sse3_addsub_ps;	 // "__builtin_ia32_addsubps"
      }
      break;
    case 'b':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "lendvp", 6))
        break;
      switch (BuiltinName[22]) {
      default: break;
      case 'd':	 // 1 string to match.
        return Intrinsic::x86_sse41_blendvpd;	 // "__builtin_ia32_blendvpd"
      case 's':	 // 1 string to match.
        return Intrinsic::x86_sse41_blendvps;	 // "__builtin_ia32_blendvps"
      }
      break;
    case 'c':	 // 23 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'm':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "pp", 2))
          break;
        switch (BuiltinName[19]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "256", 3))
            break;
          return Intrinsic::x86_avx_cmp_pd_256;	 // "__builtin_ia32_cmppd256"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "256", 3))
            break;
          return Intrinsic::x86_avx_cmp_ps_256;	 // "__builtin_ia32_cmpps256"
        }
        break;
      case 'o':	 // 5 strings to match.
        if (memcmp(BuiltinName.data()+17, "misd", 4))
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'e':	 // 1 string to match.
          if (BuiltinName[22] != 'q')
            break;
          return Intrinsic::x86_sse2_comieq_sd;	 // "__builtin_ia32_comisdeq"
        case 'g':	 // 2 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'e':	 // 1 string to match.
            return Intrinsic::x86_sse2_comige_sd;	 // "__builtin_ia32_comisdge"
          case 't':	 // 1 string to match.
            return Intrinsic::x86_sse2_comigt_sd;	 // "__builtin_ia32_comisdgt"
          }
          break;
        case 'l':	 // 2 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'e':	 // 1 string to match.
            return Intrinsic::x86_sse2_comile_sd;	 // "__builtin_ia32_comisdle"
          case 't':	 // 1 string to match.
            return Intrinsic::x86_sse2_comilt_sd;	 // "__builtin_ia32_comisdlt"
          }
          break;
        }
        break;
      case 'v':	 // 16 strings to match.
        if (BuiltinName[17] != 't')
          break;
        switch (BuiltinName[18]) {
        default: break;
        case 'd':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+19, "q2p", 3))
            break;
          switch (BuiltinName[22]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_sse2_cvtdq2pd;	 // "__builtin_ia32_cvtdq2pd"
          case 's':	 // 1 string to match.
            return Intrinsic::x86_sse2_cvtdq2ps;	 // "__builtin_ia32_cvtdq2ps"
          }
          break;
        case 'p':	 // 8 strings to match.
          switch (BuiltinName[19]) {
          default: break;
          case 'd':	 // 3 strings to match.
            if (BuiltinName[20] != '2')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (BuiltinName[22] != 'q')
                break;
              return Intrinsic::x86_sse2_cvtpd2dq;	 // "__builtin_ia32_cvtpd2dq"
            case 'p':	 // 2 strings to match.
              switch (BuiltinName[22]) {
              default: break;
              case 'i':	 // 1 string to match.
                return Intrinsic::x86_sse_cvtpd2pi;	 // "__builtin_ia32_cvtpd2pi"
              case 's':	 // 1 string to match.
                return Intrinsic::x86_sse2_cvtpd2ps;	 // "__builtin_ia32_cvtpd2ps"
              }
              break;
            }
            break;
          case 'i':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+20, "2p", 2))
              break;
            switch (BuiltinName[22]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_sse_cvtpi2pd;	 // "__builtin_ia32_cvtpi2pd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_sse_cvtpi2ps;	 // "__builtin_ia32_cvtpi2ps"
            }
            break;
          case 's':	 // 3 strings to match.
            if (BuiltinName[20] != '2')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (BuiltinName[22] != 'q')
                break;
              return Intrinsic::x86_sse2_cvtps2dq;	 // "__builtin_ia32_cvtps2dq"
            case 'p':	 // 2 strings to match.
              switch (BuiltinName[22]) {
              default: break;
              case 'd':	 // 1 string to match.
                return Intrinsic::x86_sse2_cvtps2pd;	 // "__builtin_ia32_cvtps2pd"
              case 'i':	 // 1 string to match.
                return Intrinsic::x86_sse_cvtps2pi;	 // "__builtin_ia32_cvtps2pi"
              }
              break;
            }
            break;
          }
          break;
        case 's':	 // 6 strings to match.
          switch (BuiltinName[19]) {
          default: break;
          case 'd':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+20, "2s", 2))
              break;
            switch (BuiltinName[22]) {
            default: break;
            case 'i':	 // 1 string to match.
              return Intrinsic::x86_sse2_cvtsd2si;	 // "__builtin_ia32_cvtsd2si"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_sse2_cvtsd2ss;	 // "__builtin_ia32_cvtsd2ss"
            }
            break;
          case 'i':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+20, "2s", 2))
              break;
            switch (BuiltinName[22]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_sse2_cvtsi2sd;	 // "__builtin_ia32_cvtsi2sd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_sse_cvtsi2ss;	 // "__builtin_ia32_cvtsi2ss"
            }
            break;
          case 's':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+20, "2s", 2))
              break;
            switch (BuiltinName[22]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_sse2_cvtss2sd;	 // "__builtin_ia32_cvtss2sd"
            case 'i':	 // 1 string to match.
              return Intrinsic::x86_sse_cvtss2si;	 // "__builtin_ia32_cvtss2si"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 'i':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+16, "nsertqi", 7))
        break;
      return Intrinsic::x86_sse4a_insertqi;	 // "__builtin_ia32_insertqi"
    case 'k':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+16, "unpckhi", 7))
        break;
      return Intrinsic::x86_avx512_kunpck_bw;	 // "__builtin_ia32_kunpckhi"
    case 'l':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+16, "ddqu256", 7))
        break;
      return Intrinsic::x86_avx_ldu_dq_256;	 // "__builtin_ia32_lddqu256"
    case 'm':	 // 8 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'a':	 // 3 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "kmovq", 5))
            break;
          return Intrinsic::x86_mmx_maskmovq;	 // "__builtin_ia32_maskmovq"
        case 'x':	 // 2 strings to match.
          if (BuiltinName[18] != 'p')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+20, "256", 3))
              break;
            return Intrinsic::x86_avx_max_pd_256;	 // "__builtin_ia32_maxpd256"
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+20, "256", 3))
              break;
            return Intrinsic::x86_avx_max_ps_256;	 // "__builtin_ia32_maxps256"
          }
          break;
        }
        break;
      case 'i':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "np", 2))
          break;
        switch (BuiltinName[19]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "256", 3))
            break;
          return Intrinsic::x86_avx_min_pd_256;	 // "__builtin_ia32_minpd256"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "256", 3))
            break;
          return Intrinsic::x86_avx_min_ps_256;	 // "__builtin_ia32_minps256"
        }
        break;
      case 'o':	 // 3 strings to match.
        if (BuiltinName[17] != 'v')
          break;
        switch (BuiltinName[18]) {
        default: break;
        case 'm':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+19, "skp", 3))
            break;
          switch (BuiltinName[22]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_sse2_movmsk_pd;	 // "__builtin_ia32_movmskpd"
          case 's':	 // 1 string to match.
            return Intrinsic::x86_sse_movmsk_ps;	 // "__builtin_ia32_movmskps"
          }
          break;
        case 'n':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+19, "tdqa", 4))
            break;
          return Intrinsic::x86_sse41_movntdqa;	 // "__builtin_ia32_movntdqa"
        }
        break;
      }
      break;
    case 'p':	 // 44 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'a':	 // 13 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'b':	 // 6 strings to match.
          if (BuiltinName[18] != 's')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'b':	 // 2 strings to match.
            switch (BuiltinName[20]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "28", 2))
                break;
              return Intrinsic::x86_ssse3_pabs_b_128;	 // "__builtin_ia32_pabsb128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "56", 2))
                break;
              return Intrinsic::x86_avx2_pabs_b;	 // "__builtin_ia32_pabsb256"
            }
            break;
          case 'd':	 // 2 strings to match.
            switch (BuiltinName[20]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "28", 2))
                break;
              return Intrinsic::x86_ssse3_pabs_d_128;	 // "__builtin_ia32_pabsd128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "56", 2))
                break;
              return Intrinsic::x86_avx2_pabs_d;	 // "__builtin_ia32_pabsd256"
            }
            break;
          case 'w':	 // 2 strings to match.
            switch (BuiltinName[20]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "28", 2))
                break;
              return Intrinsic::x86_ssse3_pabs_w_128;	 // "__builtin_ia32_pabsw128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "56", 2))
                break;
              return Intrinsic::x86_avx2_pabs_w;	 // "__builtin_ia32_pabsw256"
            }
            break;
          }
          break;
        case 'c':	 // 3 strings to match.
          if (BuiltinName[18] != 'k')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 's':	 // 2 strings to match.
            if (BuiltinName[20] != 's')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (BuiltinName[22] != 'w')
                break;
              return Intrinsic::x86_mmx_packssdw;	 // "__builtin_ia32_packssdw"
            case 'w':	 // 1 string to match.
              if (BuiltinName[22] != 'b')
                break;
              return Intrinsic::x86_mmx_packsswb;	 // "__builtin_ia32_packsswb"
            }
            break;
          case 'u':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+20, "swb", 3))
              break;
            return Intrinsic::x86_mmx_packuswb;	 // "__builtin_ia32_packuswb"
          }
          break;
        case 'v':	 // 4 strings to match.
          if (BuiltinName[18] != 'g')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'b':	 // 2 strings to match.
            switch (BuiltinName[20]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "28", 2))
                break;
              return Intrinsic::x86_sse2_pavg_b;	 // "__builtin_ia32_pavgb128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "56", 2))
                break;
              return Intrinsic::x86_avx2_pavg_b;	 // "__builtin_ia32_pavgb256"
            }
            break;
          case 'w':	 // 2 strings to match.
            switch (BuiltinName[20]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "28", 2))
                break;
              return Intrinsic::x86_sse2_pavg_w;	 // "__builtin_ia32_pavgw128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "56", 2))
                break;
              return Intrinsic::x86_avx2_pavg_w;	 // "__builtin_ia32_pavgw256"
            }
            break;
          }
          break;
        }
        break;
      case 'f':	 // 3 strings to match.
        if (BuiltinName[17] != 'r')
          break;
        switch (BuiltinName[18]) {
        default: break;
        case 'c':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+19, "pit", 3))
            break;
          switch (BuiltinName[22]) {
          default: break;
          case '1':	 // 1 string to match.
            return Intrinsic::x86_3dnow_pfrcpit1;	 // "__builtin_ia32_pfrcpit1"
          case '2':	 // 1 string to match.
            return Intrinsic::x86_3dnow_pfrcpit2;	 // "__builtin_ia32_pfrcpit2"
          }
          break;
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+19, "qit1", 4))
            break;
          return Intrinsic::x86_3dnow_pfrsqit1;	 // "__builtin_ia32_pfrsqit1"
        }
        break;
      case 'm':	 // 2 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'o':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "vmskb", 5))
            break;
          return Intrinsic::x86_mmx_pmovmskb;	 // "__builtin_ia32_pmovmskb"
        case 'u':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "lhrsw", 5))
            break;
          return Intrinsic::x86_ssse3_pmul_hr_sw;	 // "__builtin_ia32_pmulhrsw"
        }
        break;
      case 's':	 // 26 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'l':	 // 10 strings to match.
          if (BuiltinName[18] != 'l')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'd':	 // 2 strings to match.
            switch (BuiltinName[20]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "28", 2))
                break;
              return Intrinsic::x86_sse2_psll_d;	 // "__builtin_ia32_pslld128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "56", 2))
                break;
              return Intrinsic::x86_avx2_psll_d;	 // "__builtin_ia32_pslld256"
            }
            break;
          case 'q':	 // 2 strings to match.
            switch (BuiltinName[20]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "28", 2))
                break;
              return Intrinsic::x86_sse2_psll_q;	 // "__builtin_ia32_psllq128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "56", 2))
                break;
              return Intrinsic::x86_avx2_psll_q;	 // "__builtin_ia32_psllq256"
            }
            break;
          case 'v':	 // 4 strings to match.
            switch (BuiltinName[20]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "di", 2))
                break;
              return Intrinsic::x86_avx2_psllv_q;	 // "__builtin_ia32_psllv2di"
            case '4':	 // 2 strings to match.
              switch (BuiltinName[21]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (BuiltinName[22] != 'i')
                  break;
                return Intrinsic::x86_avx2_psllv_q_256;	 // "__builtin_ia32_psllv4di"
              case 's':	 // 1 string to match.
                if (BuiltinName[22] != 'i')
                  break;
                return Intrinsic::x86_avx2_psllv_d;	 // "__builtin_ia32_psllv4si"
              }
              break;
            case '8':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "si", 2))
                break;
              return Intrinsic::x86_avx2_psllv_d_256;	 // "__builtin_ia32_psllv8si"
            }
            break;
          case 'w':	 // 2 strings to match.
            switch (BuiltinName[20]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "28", 2))
                break;
              return Intrinsic::x86_sse2_psll_w;	 // "__builtin_ia32_psllw128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "56", 2))
                break;
              return Intrinsic::x86_avx2_psll_w;	 // "__builtin_ia32_psllw256"
            }
            break;
          }
          break;
        case 'r':	 // 16 strings to match.
          switch (BuiltinName[18]) {
          default: break;
          case 'a':	 // 6 strings to match.
            switch (BuiltinName[19]) {
            default: break;
            case 'd':	 // 2 strings to match.
              switch (BuiltinName[20]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "28", 2))
                  break;
                return Intrinsic::x86_sse2_psra_d;	 // "__builtin_ia32_psrad128"
              case '2':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "56", 2))
                  break;
                return Intrinsic::x86_avx2_psra_d;	 // "__builtin_ia32_psrad256"
              }
              break;
            case 'v':	 // 2 strings to match.
              switch (BuiltinName[20]) {
              default: break;
              case '4':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "si", 2))
                  break;
                return Intrinsic::x86_avx2_psrav_d;	 // "__builtin_ia32_psrav4si"
              case '8':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "si", 2))
                  break;
                return Intrinsic::x86_avx2_psrav_d_256;	 // "__builtin_ia32_psrav8si"
              }
              break;
            case 'w':	 // 2 strings to match.
              switch (BuiltinName[20]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "28", 2))
                  break;
                return Intrinsic::x86_sse2_psra_w;	 // "__builtin_ia32_psraw128"
              case '2':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "56", 2))
                  break;
                return Intrinsic::x86_avx2_psra_w;	 // "__builtin_ia32_psraw256"
              }
              break;
            }
            break;
          case 'l':	 // 10 strings to match.
            switch (BuiltinName[19]) {
            default: break;
            case 'd':	 // 2 strings to match.
              switch (BuiltinName[20]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "28", 2))
                  break;
                return Intrinsic::x86_sse2_psrl_d;	 // "__builtin_ia32_psrld128"
              case '2':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "56", 2))
                  break;
                return Intrinsic::x86_avx2_psrl_d;	 // "__builtin_ia32_psrld256"
              }
              break;
            case 'q':	 // 2 strings to match.
              switch (BuiltinName[20]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "28", 2))
                  break;
                return Intrinsic::x86_sse2_psrl_q;	 // "__builtin_ia32_psrlq128"
              case '2':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "56", 2))
                  break;
                return Intrinsic::x86_avx2_psrl_q;	 // "__builtin_ia32_psrlq256"
              }
              break;
            case 'v':	 // 4 strings to match.
              switch (BuiltinName[20]) {
              default: break;
              case '2':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "di", 2))
                  break;
                return Intrinsic::x86_avx2_psrlv_q;	 // "__builtin_ia32_psrlv2di"
              case '4':	 // 2 strings to match.
                switch (BuiltinName[21]) {
                default: break;
                case 'd':	 // 1 string to match.
                  if (BuiltinName[22] != 'i')
                    break;
                  return Intrinsic::x86_avx2_psrlv_q_256;	 // "__builtin_ia32_psrlv4di"
                case 's':	 // 1 string to match.
                  if (BuiltinName[22] != 'i')
                    break;
                  return Intrinsic::x86_avx2_psrlv_d;	 // "__builtin_ia32_psrlv4si"
                }
                break;
              case '8':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "si", 2))
                  break;
                return Intrinsic::x86_avx2_psrlv_d_256;	 // "__builtin_ia32_psrlv8si"
              }
              break;
            case 'w':	 // 2 strings to match.
              switch (BuiltinName[20]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "28", 2))
                  break;
                return Intrinsic::x86_sse2_psrl_w;	 // "__builtin_ia32_psrlw128"
              case '2':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+21, "56", 2))
                  break;
                return Intrinsic::x86_avx2_psrl_w;	 // "__builtin_ia32_psrlw256"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    case 'r':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+16, "cpps256", 7))
        break;
      return Intrinsic::x86_avx_rcp_ps_256;	 // "__builtin_ia32_rcpps256"
    case 's':	 // 5 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'h':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "a1msg", 5))
          break;
        switch (BuiltinName[22]) {
        default: break;
        case '1':	 // 1 string to match.
          return Intrinsic::x86_sha1msg1;	 // "__builtin_ia32_sha1msg1"
        case '2':	 // 1 string to match.
          return Intrinsic::x86_sha1msg2;	 // "__builtin_ia32_sha1msg2"
        }
        break;
      case 't':	 // 3 strings to match.
        if (memcmp(BuiltinName.data()+17, "ore", 3))
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "qu", 2))
            break;
          return Intrinsic::x86_sse2_storeu_dq;	 // "__builtin_ia32_storedqu"
        case 'u':	 // 2 strings to match.
          if (BuiltinName[21] != 'p')
            break;
          switch (BuiltinName[22]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_sse2_storeu_pd;	 // "__builtin_ia32_storeupd"
          case 's':	 // 1 string to match.
            return Intrinsic::x86_sse_storeu_ps;	 // "__builtin_ia32_storeups"
          }
          break;
        }
        break;
      }
      break;
    case 'u':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+16, "comineq", 7))
        break;
      return Intrinsic::x86_sse_ucomineq_ss;	 // "__builtin_ia32_ucomineq"
    case 'v':	 // 13 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'f':	 // 8 strings to match.
        if (BuiltinName[17] != 'm')
          break;
        switch (BuiltinName[18]) {
        default: break;
        case 'a':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+19, "dd", 2))
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'p':	 // 2 strings to match.
            switch (BuiltinName[22]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_fma_vfmadd_pd;	 // "__builtin_ia32_vfmaddpd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_fma_vfmadd_ps;	 // "__builtin_ia32_vfmaddps"
            }
            break;
          case 's':	 // 2 strings to match.
            switch (BuiltinName[22]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_fma_vfmadd_sd;	 // "__builtin_ia32_vfmaddsd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_fma_vfmadd_ss;	 // "__builtin_ia32_vfmaddss"
            }
            break;
          }
          break;
        case 's':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+19, "ub", 2))
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'p':	 // 2 strings to match.
            switch (BuiltinName[22]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_fma_vfmsub_pd;	 // "__builtin_ia32_vfmsubpd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_fma_vfmsub_ps;	 // "__builtin_ia32_vfmsubps"
            }
            break;
          case 's':	 // 2 strings to match.
            switch (BuiltinName[22]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_fma_vfmsub_sd;	 // "__builtin_ia32_vfmsubsd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_fma_vfmsub_ss;	 // "__builtin_ia32_vfmsubss"
            }
            break;
          }
          break;
        }
        break;
      case 't':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+17, "est", 3))
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'c':	 // 2 strings to match.
          if (BuiltinName[21] != 'p')
            break;
          switch (BuiltinName[22]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_avx_vtestc_pd;	 // "__builtin_ia32_vtestcpd"
          case 's':	 // 1 string to match.
            return Intrinsic::x86_avx_vtestc_ps;	 // "__builtin_ia32_vtestcps"
          }
          break;
        case 'z':	 // 2 strings to match.
          if (BuiltinName[21] != 'p')
            break;
          switch (BuiltinName[22]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_avx_vtestz_pd;	 // "__builtin_ia32_vtestzpd"
          case 's':	 // 1 string to match.
            return Intrinsic::x86_avx_vtestz_ps;	 // "__builtin_ia32_vtestzps"
          }
          break;
        }
        break;
      case 'z':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+17, "eroall", 6))
          break;
        return Intrinsic::x86_avx_vzeroall;	 // "__builtin_ia32_vzeroall"
      }
      break;
    }
    break;
  case 24:	 // 131 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_ia32_", 15))
      break;
    switch (BuiltinName[15]) {
    default: break;
    case 'a':	 // 3 strings to match.
      if (memcmp(BuiltinName.data()+16, "es", 2))
        break;
      switch (BuiltinName[18]) {
      default: break;
      case 'd':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+19, "ec128", 5))
          break;
        return Intrinsic::x86_aesni_aesdec;	 // "__builtin_ia32_aesdec128"
      case 'e':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+19, "nc128", 5))
          break;
        return Intrinsic::x86_aesni_aesenc;	 // "__builtin_ia32_aesenc128"
      case 'i':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+19, "mc128", 5))
          break;
        return Intrinsic::x86_aesni_aesimc;	 // "__builtin_ia32_aesimc128"
      }
      break;
    case 'b':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "extr_u", 6))
        break;
      switch (BuiltinName[22]) {
      default: break;
      case '3':	 // 1 string to match.
        if (BuiltinName[23] != '2')
          break;
        return Intrinsic::x86_bmi_bextr_32;	 // "__builtin_ia32_bextr_u32"
      case '6':	 // 1 string to match.
        if (BuiltinName[23] != '4')
          break;
        return Intrinsic::x86_bmi_bextr_64;	 // "__builtin_ia32_bextr_u64"
      }
      break;
    case 'c':	 // 11 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'o':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+17, "misdneq", 7))
          break;
        return Intrinsic::x86_sse2_comineq_sd;	 // "__builtin_ia32_comisdneq"
      case 'v':	 // 10 strings to match.
        if (BuiltinName[17] != 't')
          break;
        switch (BuiltinName[18]) {
        default: break;
        case 's':	 // 2 strings to match.
          switch (BuiltinName[19]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+20, "2usi", 4))
              break;
            return Intrinsic::x86_avx512_cvtsd2usi;	 // "__builtin_ia32_cvtsd2usi"
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+20, "2usi", 4))
              break;
            return Intrinsic::x86_avx512_cvtss2usi;	 // "__builtin_ia32_cvtss2usi"
          }
          break;
        case 't':	 // 6 strings to match.
          switch (BuiltinName[19]) {
          default: break;
          case 'p':	 // 4 strings to match.
            switch (BuiltinName[20]) {
            default: break;
            case 'd':	 // 2 strings to match.
              if (BuiltinName[21] != '2')
                break;
              switch (BuiltinName[22]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (BuiltinName[23] != 'q')
                  break;
                return Intrinsic::x86_sse2_cvttpd2dq;	 // "__builtin_ia32_cvttpd2dq"
              case 'p':	 // 1 string to match.
                if (BuiltinName[23] != 'i')
                  break;
                return Intrinsic::x86_sse_cvttpd2pi;	 // "__builtin_ia32_cvttpd2pi"
              }
              break;
            case 's':	 // 2 strings to match.
              if (BuiltinName[21] != '2')
                break;
              switch (BuiltinName[22]) {
              default: break;
              case 'd':	 // 1 string to match.
                if (BuiltinName[23] != 'q')
                  break;
                return Intrinsic::x86_sse2_cvttps2dq;	 // "__builtin_ia32_cvttps2dq"
              case 'p':	 // 1 string to match.
                if (BuiltinName[23] != 'i')
                  break;
                return Intrinsic::x86_sse_cvttps2pi;	 // "__builtin_ia32_cvttps2pi"
              }
              break;
            }
            break;
          case 's':	 // 2 strings to match.
            switch (BuiltinName[20]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "2si", 3))
                break;
              return Intrinsic::x86_sse2_cvttsd2si;	 // "__builtin_ia32_cvttsd2si"
            case 's':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "2si", 3))
                break;
              return Intrinsic::x86_sse_cvttss2si;	 // "__builtin_ia32_cvttss2si"
            }
            break;
          }
          break;
        case 'u':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+19, "si2s", 4))
            break;
          switch (BuiltinName[23]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_avx512_cvtusi2sd;	 // "__builtin_ia32_cvtusi2sd"
          case 's':	 // 1 string to match.
            return Intrinsic::x86_avx512_cvtusi2ss;	 // "__builtin_ia32_cvtusi2ss"
          }
          break;
        }
        break;
      }
      break;
    case 'g':	 // 4 strings to match.
      if (memcmp(BuiltinName.data()+16, "ather", 5))
        break;
      switch (BuiltinName[21]) {
      default: break;
      case 'd':	 // 2 strings to match.
        if (BuiltinName[22] != '_')
          break;
        switch (BuiltinName[23]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::x86_avx2_gather_d_d;	 // "__builtin_ia32_gatherd_d"
        case 'q':	 // 1 string to match.
          return Intrinsic::x86_avx2_gather_d_q;	 // "__builtin_ia32_gatherd_q"
        }
        break;
      case 'q':	 // 2 strings to match.
        if (BuiltinName[22] != '_')
          break;
        switch (BuiltinName[23]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::x86_avx2_gather_q_d;	 // "__builtin_ia32_gatherq_d"
        case 'q':	 // 1 string to match.
          return Intrinsic::x86_avx2_gather_q_q;	 // "__builtin_ia32_gatherq_q"
        }
        break;
      }
      break;
    case 'h':	 // 4 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'a':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "ddp", 3))
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "256", 3))
            break;
          return Intrinsic::x86_avx_hadd_pd_256;	 // "__builtin_ia32_haddpd256"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "256", 3))
            break;
          return Intrinsic::x86_avx_hadd_ps_256;	 // "__builtin_ia32_haddps256"
        }
        break;
      case 's':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "ubp", 3))
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "256", 3))
            break;
          return Intrinsic::x86_avx_hsub_pd_256;	 // "__builtin_ia32_hsubpd256"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "256", 3))
            break;
          return Intrinsic::x86_avx_hsub_ps_256;	 // "__builtin_ia32_hsubps256"
        }
        break;
      }
      break;
    case 'm':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "askload", 7))
        break;
      switch (BuiltinName[23]) {
      default: break;
      case 'd':	 // 1 string to match.
        return Intrinsic::x86_avx2_maskload_d;	 // "__builtin_ia32_maskloadd"
      case 'q':	 // 1 string to match.
        return Intrinsic::x86_avx2_maskload_q;	 // "__builtin_ia32_maskloadq"
      }
      break;
    case 'p':	 // 82 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'a':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+17, "dds", 3))
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'b':	 // 2 strings to match.
          switch (BuiltinName[21]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "28", 2))
              break;
            return Intrinsic::x86_sse2_padds_b;	 // "__builtin_ia32_paddsb128"
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "56", 2))
              break;
            return Intrinsic::x86_avx2_padds_b;	 // "__builtin_ia32_paddsb256"
          }
          break;
        case 'w':	 // 2 strings to match.
          switch (BuiltinName[21]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "28", 2))
              break;
            return Intrinsic::x86_sse2_padds_w;	 // "__builtin_ia32_paddsw128"
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "56", 2))
              break;
            return Intrinsic::x86_avx2_padds_w;	 // "__builtin_ia32_paddsw256"
          }
          break;
        }
        break;
      case 'e':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+17, "rmti256", 7))
          break;
        return Intrinsic::x86_avx2_vperm2i128;	 // "__builtin_ia32_permti256"
      case 'h':	 // 8 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'a':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+18, "dd", 2))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'd':	 // 2 strings to match.
            switch (BuiltinName[21]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "28", 2))
                break;
              return Intrinsic::x86_ssse3_phadd_d_128;	 // "__builtin_ia32_phaddd128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "56", 2))
                break;
              return Intrinsic::x86_avx2_phadd_d;	 // "__builtin_ia32_phaddd256"
            }
            break;
          case 'w':	 // 2 strings to match.
            switch (BuiltinName[21]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "28", 2))
                break;
              return Intrinsic::x86_ssse3_phadd_w_128;	 // "__builtin_ia32_phaddw128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "56", 2))
                break;
              return Intrinsic::x86_avx2_phadd_w;	 // "__builtin_ia32_phaddw256"
            }
            break;
          }
          break;
        case 's':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+18, "ub", 2))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'd':	 // 2 strings to match.
            switch (BuiltinName[21]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "28", 2))
                break;
              return Intrinsic::x86_ssse3_phsub_d_128;	 // "__builtin_ia32_phsubd128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "56", 2))
                break;
              return Intrinsic::x86_avx2_phsub_d;	 // "__builtin_ia32_phsubd256"
            }
            break;
          case 'w':	 // 2 strings to match.
            switch (BuiltinName[21]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "28", 2))
                break;
              return Intrinsic::x86_ssse3_phsub_w_128;	 // "__builtin_ia32_phsubw128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "56", 2))
                break;
              return Intrinsic::x86_avx2_phsub_w;	 // "__builtin_ia32_phsubw256"
            }
            break;
          }
          break;
        }
        break;
      case 'm':	 // 29 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'a':	 // 13 strings to match.
          switch (BuiltinName[18]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+19, "dubsw", 5))
              break;
            return Intrinsic::x86_ssse3_pmadd_ub_sw;	 // "__builtin_ia32_pmaddubsw"
          case 'x':	 // 12 strings to match.
            switch (BuiltinName[19]) {
            default: break;
            case 's':	 // 6 strings to match.
              switch (BuiltinName[20]) {
              default: break;
              case 'b':	 // 2 strings to match.
                switch (BuiltinName[21]) {
                default: break;
                case '1':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+22, "28", 2))
                    break;
                  return Intrinsic::x86_sse41_pmaxsb;	 // "__builtin_ia32_pmaxsb128"
                case '2':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+22, "56", 2))
                    break;
                  return Intrinsic::x86_avx2_pmaxs_b;	 // "__builtin_ia32_pmaxsb256"
                }
                break;
              case 'd':	 // 2 strings to match.
                switch (BuiltinName[21]) {
                default: break;
                case '1':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+22, "28", 2))
                    break;
                  return Intrinsic::x86_sse41_pmaxsd;	 // "__builtin_ia32_pmaxsd128"
                case '2':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+22, "56", 2))
                    break;
                  return Intrinsic::x86_avx2_pmaxs_d;	 // "__builtin_ia32_pmaxsd256"
                }
                break;
              case 'w':	 // 2 strings to match.
                switch (BuiltinName[21]) {
                default: break;
                case '1':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+22, "28", 2))
                    break;
                  return Intrinsic::x86_sse2_pmaxs_w;	 // "__builtin_ia32_pmaxsw128"
                case '2':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+22, "56", 2))
                    break;
                  return Intrinsic::x86_avx2_pmaxs_w;	 // "__builtin_ia32_pmaxsw256"
                }
                break;
              }
              break;
            case 'u':	 // 6 strings to match.
              switch (BuiltinName[20]) {
              default: break;
              case 'b':	 // 2 strings to match.
                switch (BuiltinName[21]) {
                default: break;
                case '1':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+22, "28", 2))
                    break;
                  return Intrinsic::x86_sse2_pmaxu_b;	 // "__builtin_ia32_pmaxub128"
                case '2':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+22, "56", 2))
                    break;
                  return Intrinsic::x86_avx2_pmaxu_b;	 // "__builtin_ia32_pmaxub256"
                }
                break;
              case 'd':	 // 2 strings to match.
                switch (BuiltinName[21]) {
                default: break;
                case '1':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+22, "28", 2))
                    break;
                  return Intrinsic::x86_sse41_pmaxud;	 // "__builtin_ia32_pmaxud128"
                case '2':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+22, "56", 2))
                    break;
                  return Intrinsic::x86_avx2_pmaxu_d;	 // "__builtin_ia32_pmaxud256"
                }
                break;
              case 'w':	 // 2 strings to match.
                switch (BuiltinName[21]) {
                default: break;
                case '1':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+22, "28", 2))
                    break;
                  return Intrinsic::x86_sse41_pmaxuw;	 // "__builtin_ia32_pmaxuw128"
                case '2':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+22, "56", 2))
                    break;
                  return Intrinsic::x86_avx2_pmaxu_w;	 // "__builtin_ia32_pmaxuw256"
                }
                break;
              }
              break;
            }
            break;
          }
          break;
        case 'i':	 // 12 strings to match.
          if (BuiltinName[18] != 'n')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 's':	 // 6 strings to match.
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 2 strings to match.
              switch (BuiltinName[21]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "28", 2))
                  break;
                return Intrinsic::x86_sse41_pminsb;	 // "__builtin_ia32_pminsb128"
              case '2':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "56", 2))
                  break;
                return Intrinsic::x86_avx2_pmins_b;	 // "__builtin_ia32_pminsb256"
              }
              break;
            case 'd':	 // 2 strings to match.
              switch (BuiltinName[21]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "28", 2))
                  break;
                return Intrinsic::x86_sse41_pminsd;	 // "__builtin_ia32_pminsd128"
              case '2':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "56", 2))
                  break;
                return Intrinsic::x86_avx2_pmins_d;	 // "__builtin_ia32_pminsd256"
              }
              break;
            case 'w':	 // 2 strings to match.
              switch (BuiltinName[21]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "28", 2))
                  break;
                return Intrinsic::x86_sse2_pmins_w;	 // "__builtin_ia32_pminsw128"
              case '2':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "56", 2))
                  break;
                return Intrinsic::x86_avx2_pmins_w;	 // "__builtin_ia32_pminsw256"
              }
              break;
            }
            break;
          case 'u':	 // 6 strings to match.
            switch (BuiltinName[20]) {
            default: break;
            case 'b':	 // 2 strings to match.
              switch (BuiltinName[21]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "28", 2))
                  break;
                return Intrinsic::x86_sse2_pminu_b;	 // "__builtin_ia32_pminub128"
              case '2':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "56", 2))
                  break;
                return Intrinsic::x86_avx2_pminu_b;	 // "__builtin_ia32_pminub256"
              }
              break;
            case 'd':	 // 2 strings to match.
              switch (BuiltinName[21]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "28", 2))
                  break;
                return Intrinsic::x86_sse41_pminud;	 // "__builtin_ia32_pminud128"
              case '2':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "56", 2))
                  break;
                return Intrinsic::x86_avx2_pminu_d;	 // "__builtin_ia32_pminud256"
              }
              break;
            case 'w':	 // 2 strings to match.
              switch (BuiltinName[21]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "28", 2))
                  break;
                return Intrinsic::x86_sse41_pminuw;	 // "__builtin_ia32_pminuw128"
              case '2':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "56", 2))
                  break;
                return Intrinsic::x86_avx2_pminu_w;	 // "__builtin_ia32_pminuw256"
              }
              break;
            }
            break;
          }
          break;
        case 'u':	 // 4 strings to match.
          if (BuiltinName[18] != 'l')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'd':	 // 2 strings to match.
            if (BuiltinName[20] != 'q')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "28", 2))
                break;
              return Intrinsic::x86_sse41_pmuldq;	 // "__builtin_ia32_pmuldq128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "56", 2))
                break;
              return Intrinsic::x86_avx2_pmul_dq;	 // "__builtin_ia32_pmuldq256"
            }
            break;
          case 'h':	 // 2 strings to match.
            if (BuiltinName[20] != 'w')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "28", 2))
                break;
              return Intrinsic::x86_sse2_pmulh_w;	 // "__builtin_ia32_pmulhw128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "56", 2))
                break;
              return Intrinsic::x86_avx2_pmulh_w;	 // "__builtin_ia32_pmulhw256"
            }
            break;
          }
          break;
        }
        break;
      case 's':	 // 30 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'a':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+18, "dbw", 3))
            break;
          switch (BuiltinName[21]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "28", 2))
              break;
            return Intrinsic::x86_sse2_psad_bw;	 // "__builtin_ia32_psadbw128"
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "56", 2))
              break;
            return Intrinsic::x86_avx2_psad_bw;	 // "__builtin_ia32_psadbw256"
          }
          break;
        case 'h':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+18, "ufb", 3))
            break;
          switch (BuiltinName[21]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "28", 2))
              break;
            return Intrinsic::x86_ssse3_pshuf_b_128;	 // "__builtin_ia32_pshufb128"
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "56", 2))
              break;
            return Intrinsic::x86_avx2_pshuf_b;	 // "__builtin_ia32_pshufb256"
          }
          break;
        case 'i':	 // 6 strings to match.
          if (memcmp(BuiltinName.data()+18, "gn", 2))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'b':	 // 2 strings to match.
            switch (BuiltinName[21]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "28", 2))
                break;
              return Intrinsic::x86_ssse3_psign_b_128;	 // "__builtin_ia32_psignb128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "56", 2))
                break;
              return Intrinsic::x86_avx2_psign_b;	 // "__builtin_ia32_psignb256"
            }
            break;
          case 'd':	 // 2 strings to match.
            switch (BuiltinName[21]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "28", 2))
                break;
              return Intrinsic::x86_ssse3_psign_d_128;	 // "__builtin_ia32_psignd128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "56", 2))
                break;
              return Intrinsic::x86_avx2_psign_d;	 // "__builtin_ia32_psignd256"
            }
            break;
          case 'w':	 // 2 strings to match.
            switch (BuiltinName[21]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "28", 2))
                break;
              return Intrinsic::x86_ssse3_psign_w_128;	 // "__builtin_ia32_psignw128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "56", 2))
                break;
              return Intrinsic::x86_avx2_psign_w;	 // "__builtin_ia32_psignw256"
            }
            break;
          }
          break;
        case 'l':	 // 6 strings to match.
          if (BuiltinName[18] != 'l')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'd':	 // 2 strings to match.
            if (BuiltinName[20] != 'i')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "28", 2))
                break;
              return Intrinsic::x86_sse2_pslli_d;	 // "__builtin_ia32_pslldi128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "56", 2))
                break;
              return Intrinsic::x86_avx2_pslli_d;	 // "__builtin_ia32_pslldi256"
            }
            break;
          case 'q':	 // 2 strings to match.
            if (BuiltinName[20] != 'i')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "28", 2))
                break;
              return Intrinsic::x86_sse2_pslli_q;	 // "__builtin_ia32_psllqi128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "56", 2))
                break;
              return Intrinsic::x86_avx2_pslli_q;	 // "__builtin_ia32_psllqi256"
            }
            break;
          case 'w':	 // 2 strings to match.
            if (BuiltinName[20] != 'i')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "28", 2))
                break;
              return Intrinsic::x86_sse2_pslli_w;	 // "__builtin_ia32_psllwi128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "56", 2))
                break;
              return Intrinsic::x86_avx2_pslli_w;	 // "__builtin_ia32_psllwi256"
            }
            break;
          }
          break;
        case 'r':	 // 10 strings to match.
          switch (BuiltinName[18]) {
          default: break;
          case 'a':	 // 4 strings to match.
            switch (BuiltinName[19]) {
            default: break;
            case 'd':	 // 2 strings to match.
              if (BuiltinName[20] != 'i')
                break;
              switch (BuiltinName[21]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "28", 2))
                  break;
                return Intrinsic::x86_sse2_psrai_d;	 // "__builtin_ia32_psradi128"
              case '2':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "56", 2))
                  break;
                return Intrinsic::x86_avx2_psrai_d;	 // "__builtin_ia32_psradi256"
              }
              break;
            case 'w':	 // 2 strings to match.
              if (BuiltinName[20] != 'i')
                break;
              switch (BuiltinName[21]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "28", 2))
                  break;
                return Intrinsic::x86_sse2_psrai_w;	 // "__builtin_ia32_psrawi128"
              case '2':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "56", 2))
                  break;
                return Intrinsic::x86_avx2_psrai_w;	 // "__builtin_ia32_psrawi256"
              }
              break;
            }
            break;
          case 'l':	 // 6 strings to match.
            switch (BuiltinName[19]) {
            default: break;
            case 'd':	 // 2 strings to match.
              if (BuiltinName[20] != 'i')
                break;
              switch (BuiltinName[21]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "28", 2))
                  break;
                return Intrinsic::x86_sse2_psrli_d;	 // "__builtin_ia32_psrldi128"
              case '2':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "56", 2))
                  break;
                return Intrinsic::x86_avx2_psrli_d;	 // "__builtin_ia32_psrldi256"
              }
              break;
            case 'q':	 // 2 strings to match.
              if (BuiltinName[20] != 'i')
                break;
              switch (BuiltinName[21]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "28", 2))
                  break;
                return Intrinsic::x86_sse2_psrli_q;	 // "__builtin_ia32_psrlqi128"
              case '2':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "56", 2))
                  break;
                return Intrinsic::x86_avx2_psrli_q;	 // "__builtin_ia32_psrlqi256"
              }
              break;
            case 'w':	 // 2 strings to match.
              if (BuiltinName[20] != 'i')
                break;
              switch (BuiltinName[21]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "28", 2))
                  break;
                return Intrinsic::x86_sse2_psrli_w;	 // "__builtin_ia32_psrlwi128"
              case '2':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+22, "56", 2))
                  break;
                return Intrinsic::x86_avx2_psrli_w;	 // "__builtin_ia32_psrlwi256"
              }
              break;
            }
            break;
          }
          break;
        case 'u':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+18, "bs", 2))
            break;
          switch (BuiltinName[20]) {
          default: break;
          case 'b':	 // 2 strings to match.
            switch (BuiltinName[21]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "28", 2))
                break;
              return Intrinsic::x86_sse2_psubs_b;	 // "__builtin_ia32_psubsb128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "56", 2))
                break;
              return Intrinsic::x86_avx2_psubs_b;	 // "__builtin_ia32_psubsb256"
            }
            break;
          case 'w':	 // 2 strings to match.
            switch (BuiltinName[21]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "28", 2))
                break;
              return Intrinsic::x86_sse2_psubs_w;	 // "__builtin_ia32_psubsw128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "56", 2))
                break;
              return Intrinsic::x86_avx2_psubs_w;	 // "__builtin_ia32_psubsw256"
            }
            break;
          }
          break;
        }
        break;
      case 't':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+17, "est", 3))
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'c':	 // 2 strings to match.
          switch (BuiltinName[21]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "28", 2))
              break;
            return Intrinsic::x86_sse41_ptestc;	 // "__builtin_ia32_ptestc128"
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "56", 2))
              break;
            return Intrinsic::x86_avx_ptestc_256;	 // "__builtin_ia32_ptestc256"
          }
          break;
        case 'z':	 // 2 strings to match.
          switch (BuiltinName[21]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "28", 2))
              break;
            return Intrinsic::x86_sse41_ptestz;	 // "__builtin_ia32_ptestz128"
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "56", 2))
              break;
            return Intrinsic::x86_avx_ptestz_256;	 // "__builtin_ia32_ptestz256"
          }
          break;
        }
        break;
      case 'u':	 // 6 strings to match.
        if (memcmp(BuiltinName.data()+17, "npck", 4))
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'h':	 // 3 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'b':	 // 1 string to match.
            if (BuiltinName[23] != 'w')
              break;
            return Intrinsic::x86_mmx_punpckhbw;	 // "__builtin_ia32_punpckhbw"
          case 'd':	 // 1 string to match.
            if (BuiltinName[23] != 'q')
              break;
            return Intrinsic::x86_mmx_punpckhdq;	 // "__builtin_ia32_punpckhdq"
          case 'w':	 // 1 string to match.
            if (BuiltinName[23] != 'd')
              break;
            return Intrinsic::x86_mmx_punpckhwd;	 // "__builtin_ia32_punpckhwd"
          }
          break;
        case 'l':	 // 3 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case 'b':	 // 1 string to match.
            if (BuiltinName[23] != 'w')
              break;
            return Intrinsic::x86_mmx_punpcklbw;	 // "__builtin_ia32_punpcklbw"
          case 'd':	 // 1 string to match.
            if (BuiltinName[23] != 'q')
              break;
            return Intrinsic::x86_mmx_punpckldq;	 // "__builtin_ia32_punpckldq"
          case 'w':	 // 1 string to match.
            if (BuiltinName[23] != 'd')
              break;
            return Intrinsic::x86_mmx_punpcklwd;	 // "__builtin_ia32_punpcklwd"
          }
          break;
        }
        break;
      }
      break;
    case 's':	 // 8 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'h':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "a1", 2))
          break;
        switch (BuiltinName[19]) {
        default: break;
        case 'n':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "exte", 4))
            break;
          return Intrinsic::x86_sha1nexte;	 // "__builtin_ia32_sha1nexte"
        case 'r':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "nds4", 4))
            break;
          return Intrinsic::x86_sha1rnds4;	 // "__builtin_ia32_sha1rnds4"
        }
        break;
      case 'q':	 // 6 strings to match.
        if (memcmp(BuiltinName.data()+17, "rt", 2))
          break;
        switch (BuiltinName[19]) {
        default: break;
        case 'p':	 // 4 strings to match.
          switch (BuiltinName[20]) {
          default: break;
          case 'd':	 // 2 strings to match.
            switch (BuiltinName[21]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "56", 2))
                break;
              return Intrinsic::x86_avx_sqrt_pd_256;	 // "__builtin_ia32_sqrtpd256"
            case '5':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "12", 2))
                break;
              return Intrinsic::x86_avx512_sqrt_pd_512;	 // "__builtin_ia32_sqrtpd512"
            }
            break;
          case 's':	 // 2 strings to match.
            switch (BuiltinName[21]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "56", 2))
                break;
              return Intrinsic::x86_avx_sqrt_ps_256;	 // "__builtin_ia32_sqrtps256"
            case '5':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+22, "12", 2))
                break;
              return Intrinsic::x86_avx512_sqrt_ps_512;	 // "__builtin_ia32_sqrtps512"
            }
            break;
          }
          break;
        case 'r':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+20, "nds", 3))
            break;
          switch (BuiltinName[23]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_avx512_sqrt_sd;	 // "__builtin_ia32_sqrtrndsd"
          case 's':	 // 1 string to match.
            return Intrinsic::x86_avx512_sqrt_ss;	 // "__builtin_ia32_sqrtrndss"
          }
          break;
        }
        break;
      }
      break;
    case 'u':	 // 5 strings to match.
      if (memcmp(BuiltinName.data()+16, "comisd", 6))
        break;
      switch (BuiltinName[22]) {
      default: break;
      case 'e':	 // 1 string to match.
        if (BuiltinName[23] != 'q')
          break;
        return Intrinsic::x86_sse2_ucomieq_sd;	 // "__builtin_ia32_ucomisdeq"
      case 'g':	 // 2 strings to match.
        switch (BuiltinName[23]) {
        default: break;
        case 'e':	 // 1 string to match.
          return Intrinsic::x86_sse2_ucomige_sd;	 // "__builtin_ia32_ucomisdge"
        case 't':	 // 1 string to match.
          return Intrinsic::x86_sse2_ucomigt_sd;	 // "__builtin_ia32_ucomisdgt"
        }
        break;
      case 'l':	 // 2 strings to match.
        switch (BuiltinName[23]) {
        default: break;
        case 'e':	 // 1 string to match.
          return Intrinsic::x86_sse2_ucomile_sd;	 // "__builtin_ia32_ucomisdle"
        case 't':	 // 1 string to match.
          return Intrinsic::x86_sse2_ucomilt_sd;	 // "__builtin_ia32_ucomisdlt"
        }
        break;
      }
      break;
    case 'v':	 // 10 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'c':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "vtp", 3))
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'h':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "2ps", 3))
            break;
          return Intrinsic::x86_vcvtph2ps_128;	 // "__builtin_ia32_vcvtph2ps"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "2ph", 3))
            break;
          return Intrinsic::x86_vcvtps2ph_128;	 // "__builtin_ia32_vcvtps2ph"
        }
        break;
      case 'f':	 // 8 strings to match.
        if (memcmp(BuiltinName.data()+17, "nm", 2))
          break;
        switch (BuiltinName[19]) {
        default: break;
        case 'a':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+20, "dd", 2))
            break;
          switch (BuiltinName[22]) {
          default: break;
          case 'p':	 // 2 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_fma_vfnmadd_pd;	 // "__builtin_ia32_vfnmaddpd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_fma_vfnmadd_ps;	 // "__builtin_ia32_vfnmaddps"
            }
            break;
          case 's':	 // 2 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_fma_vfnmadd_sd;	 // "__builtin_ia32_vfnmaddsd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_fma_vfnmadd_ss;	 // "__builtin_ia32_vfnmaddss"
            }
            break;
          }
          break;
        case 's':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+20, "ub", 2))
            break;
          switch (BuiltinName[22]) {
          default: break;
          case 'p':	 // 2 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_fma_vfnmsub_pd;	 // "__builtin_ia32_vfnmsubpd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_fma_vfnmsub_ps;	 // "__builtin_ia32_vfnmsubps"
            }
            break;
          case 's':	 // 2 strings to match.
            switch (BuiltinName[23]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_fma_vfnmsub_sd;	 // "__builtin_ia32_vfnmsubsd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_fma_vfnmsub_ss;	 // "__builtin_ia32_vfnmsubss"
            }
            break;
          }
          break;
        }
        break;
      }
      break;
    }
    break;
  case 25:	 // 73 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_ia32_", 15))
      break;
    switch (BuiltinName[15]) {
    default: break;
    case 'b':	 // 4 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'e':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "xtri_u", 6))
          break;
        switch (BuiltinName[23]) {
        default: break;
        case '3':	 // 1 string to match.
          if (BuiltinName[24] != '2')
            break;
          return Intrinsic::x86_tbm_bextri_u32;	 // "__builtin_ia32_bextri_u32"
        case '6':	 // 1 string to match.
          if (BuiltinName[24] != '4')
            break;
          return Intrinsic::x86_tbm_bextri_u64;	 // "__builtin_ia32_bextri_u64"
        }
        break;
      case 'l':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "endp", 4))
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "256", 3))
            break;
          return Intrinsic::x86_avx_blend_pd_256;	 // "__builtin_ia32_blendpd256"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "256", 3))
            break;
          return Intrinsic::x86_avx_blend_ps_256;	 // "__builtin_ia32_blendps256"
        }
        break;
      }
      break;
    case 'c':	 // 6 strings to match.
      if (memcmp(BuiltinName.data()+16, "vt", 2))
        break;
      switch (BuiltinName[18]) {
      default: break;
      case 's':	 // 4 strings to match.
        switch (BuiltinName[19]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "2si64", 5))
            break;
          return Intrinsic::x86_sse2_cvtsd2si64;	 // "__builtin_ia32_cvtsd2si64"
        case 'i':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+20, "642s", 4))
            break;
          switch (BuiltinName[24]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_sse2_cvtsi642sd;	 // "__builtin_ia32_cvtsi642sd"
          case 's':	 // 1 string to match.
            return Intrinsic::x86_sse_cvtsi642ss;	 // "__builtin_ia32_cvtsi642ss"
          }
          break;
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "2si64", 5))
            break;
          return Intrinsic::x86_sse_cvtss2si64;	 // "__builtin_ia32_cvtss2si64"
        }
        break;
      case 't':	 // 2 strings to match.
        if (BuiltinName[19] != 's')
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "2usi", 4))
            break;
          return Intrinsic::x86_avx512_cvttsd2usi;	 // "__builtin_ia32_cvttsd2usi"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "2usi", 4))
            break;
          return Intrinsic::x86_avx512_cvttss2usi;	 // "__builtin_ia32_cvttss2usi"
        }
        break;
      }
      break;
    case 'g':	 // 4 strings to match.
      if (memcmp(BuiltinName.data()+16, "ather", 5))
        break;
      switch (BuiltinName[21]) {
      default: break;
      case 'd':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+22, "_p", 2))
          break;
        switch (BuiltinName[24]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::x86_avx2_gather_d_pd;	 // "__builtin_ia32_gatherd_pd"
        case 's':	 // 1 string to match.
          return Intrinsic::x86_avx2_gather_d_ps;	 // "__builtin_ia32_gatherd_ps"
        }
        break;
      case 'q':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+22, "_p", 2))
          break;
        switch (BuiltinName[24]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::x86_avx2_gather_q_pd;	 // "__builtin_ia32_gatherq_pd"
        case 's':	 // 1 string to match.
          return Intrinsic::x86_avx2_gather_q_ps;	 // "__builtin_ia32_gatherq_ps"
        }
        break;
      }
      break;
    case 'k':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "ortest", 6))
        break;
      switch (BuiltinName[22]) {
      default: break;
      case 'c':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+23, "hi", 2))
          break;
        return Intrinsic::x86_avx512_kortestc_w;	 // "__builtin_ia32_kortestchi"
      case 'z':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+23, "hi", 2))
          break;
        return Intrinsic::x86_avx512_kortestz_w;	 // "__builtin_ia32_kortestzhi"
      }
      break;
    case 'm':	 // 7 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'a':	 // 5 strings to match.
        if (memcmp(BuiltinName.data()+17, "sk", 2))
          break;
        switch (BuiltinName[19]) {
        default: break;
        case 'l':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+20, "oadp", 4))
            break;
          switch (BuiltinName[24]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_avx_maskload_pd;	 // "__builtin_ia32_maskloadpd"
          case 's':	 // 1 string to match.
            return Intrinsic::x86_avx_maskload_ps;	 // "__builtin_ia32_maskloadps"
          }
          break;
        case 'm':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "ovdqu", 5))
            break;
          return Intrinsic::x86_sse2_maskmov_dqu;	 // "__builtin_ia32_maskmovdqu"
        case 's':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+20, "tore", 4))
            break;
          switch (BuiltinName[24]) {
          default: break;
          case 'd':	 // 1 string to match.
            return Intrinsic::x86_avx2_maskstore_d;	 // "__builtin_ia32_maskstored"
          case 'q':	 // 1 string to match.
            return Intrinsic::x86_avx2_maskstore_q;	 // "__builtin_ia32_maskstoreq"
          }
          break;
        }
        break;
      case 'p':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "sadbw", 5))
          break;
        switch (BuiltinName[22]) {
        default: break;
        case '1':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+23, "28", 2))
            break;
          return Intrinsic::x86_sse41_mpsadbw;	 // "__builtin_ia32_mpsadbw128"
        case '2':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+23, "56", 2))
            break;
          return Intrinsic::x86_avx2_mpsadbw;	 // "__builtin_ia32_mpsadbw256"
        }
        break;
      }
      break;
    case 'p':	 // 30 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'a':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+17, "ddus", 4))
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'b':	 // 2 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "28", 2))
              break;
            return Intrinsic::x86_sse2_paddus_b;	 // "__builtin_ia32_paddusb128"
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "56", 2))
              break;
            return Intrinsic::x86_avx2_paddus_b;	 // "__builtin_ia32_paddusb256"
          }
          break;
        case 'w':	 // 2 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "28", 2))
              break;
            return Intrinsic::x86_sse2_paddus_w;	 // "__builtin_ia32_paddusw128"
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "56", 2))
              break;
            return Intrinsic::x86_avx2_paddus_w;	 // "__builtin_ia32_paddusw256"
          }
          break;
        }
        break;
      case 'b':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+17, "lend", 4))
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'd':	 // 2 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "28", 2))
              break;
            return Intrinsic::x86_avx2_pblendd_128;	 // "__builtin_ia32_pblendd128"
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "56", 2))
              break;
            return Intrinsic::x86_avx2_pblendd_256;	 // "__builtin_ia32_pblendd256"
          }
          break;
        case 'w':	 // 2 strings to match.
          switch (BuiltinName[22]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "28", 2))
              break;
            return Intrinsic::x86_sse41_pblendw;	 // "__builtin_ia32_pblendw128"
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "56", 2))
              break;
            return Intrinsic::x86_avx2_pblendw;	 // "__builtin_ia32_pblendw256"
          }
          break;
        }
        break;
      case 'h':	 // 4 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'a':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+18, "ddsw", 4))
            break;
          switch (BuiltinName[22]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "28", 2))
              break;
            return Intrinsic::x86_ssse3_phadd_sw_128;	 // "__builtin_ia32_phaddsw128"
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "56", 2))
              break;
            return Intrinsic::x86_avx2_phadd_sw;	 // "__builtin_ia32_phaddsw256"
          }
          break;
        case 's':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+18, "ubsw", 4))
            break;
          switch (BuiltinName[22]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "28", 2))
              break;
            return Intrinsic::x86_ssse3_phsub_sw_128;	 // "__builtin_ia32_phsubsw128"
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "56", 2))
              break;
            return Intrinsic::x86_avx2_phsub_sw;	 // "__builtin_ia32_phsubsw256"
          }
          break;
        }
        break;
      case 'm':	 // 6 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'a':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+18, "ddwd", 4))
            break;
          switch (BuiltinName[22]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "28", 2))
              break;
            return Intrinsic::x86_sse2_pmadd_wd;	 // "__builtin_ia32_pmaddwd128"
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "56", 2))
              break;
            return Intrinsic::x86_avx2_pmadd_wd;	 // "__builtin_ia32_pmaddwd256"
          }
          break;
        case 'u':	 // 4 strings to match.
          if (BuiltinName[18] != 'l')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'h':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+20, "uw", 2))
              break;
            switch (BuiltinName[22]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+23, "28", 2))
                break;
              return Intrinsic::x86_sse2_pmulhu_w;	 // "__builtin_ia32_pmulhuw128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+23, "56", 2))
                break;
              return Intrinsic::x86_avx2_pmulhu_w;	 // "__builtin_ia32_pmulhuw256"
            }
            break;
          case 'u':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+20, "dq", 2))
              break;
            switch (BuiltinName[22]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+23, "28", 2))
                break;
              return Intrinsic::x86_sse2_pmulu_dq;	 // "__builtin_ia32_pmuludq128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+23, "56", 2))
                break;
              return Intrinsic::x86_avx2_pmulu_dq;	 // "__builtin_ia32_pmuludq256"
            }
            break;
          }
          break;
        }
        break;
      case 's':	 // 10 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'l':	 // 3 strings to match.
          if (memcmp(BuiltinName.data()+18, "ldqi", 4))
            break;
          switch (BuiltinName[22]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "28", 2))
              break;
            return Intrinsic::x86_sse2_psll_dq;	 // "__builtin_ia32_pslldqi128"
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "56", 2))
              break;
            return Intrinsic::x86_avx2_psll_dq;	 // "__builtin_ia32_pslldqi256"
          case '5':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "12", 2))
              break;
            return Intrinsic::x86_avx512_psll_dq;	 // "__builtin_ia32_pslldqi512"
          }
          break;
        case 'r':	 // 3 strings to match.
          if (memcmp(BuiltinName.data()+18, "ldqi", 4))
            break;
          switch (BuiltinName[22]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "28", 2))
              break;
            return Intrinsic::x86_sse2_psrl_dq;	 // "__builtin_ia32_psrldqi128"
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "56", 2))
              break;
            return Intrinsic::x86_avx2_psrl_dq;	 // "__builtin_ia32_psrldqi256"
          case '5':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "12", 2))
              break;
            return Intrinsic::x86_avx512_psrl_dq;	 // "__builtin_ia32_psrldqi512"
          }
          break;
        case 'u':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+18, "bus", 3))
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'b':	 // 2 strings to match.
            switch (BuiltinName[22]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+23, "28", 2))
                break;
              return Intrinsic::x86_sse2_psubus_b;	 // "__builtin_ia32_psubusb128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+23, "56", 2))
                break;
              return Intrinsic::x86_avx2_psubus_b;	 // "__builtin_ia32_psubusb256"
            }
            break;
          case 'w':	 // 2 strings to match.
            switch (BuiltinName[22]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+23, "28", 2))
                break;
              return Intrinsic::x86_sse2_psubus_w;	 // "__builtin_ia32_psubusw128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+23, "56", 2))
                break;
              return Intrinsic::x86_avx2_psubus_w;	 // "__builtin_ia32_psubusw256"
            }
            break;
          }
          break;
        }
        break;
      case 't':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "estm", 4))
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "512", 3))
            break;
          return Intrinsic::x86_avx512_mask_ptestm_d_512;	 // "__builtin_ia32_ptestmd512"
        case 'q':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "512", 3))
            break;
          return Intrinsic::x86_avx512_mask_ptestm_q_512;	 // "__builtin_ia32_ptestmq512"
        }
        break;
      }
      break;
    case 'r':	 // 9 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'd':	 // 4 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'f':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+18, "sbase", 5))
            break;
          switch (BuiltinName[23]) {
          default: break;
          case '3':	 // 1 string to match.
            if (BuiltinName[24] != '2')
              break;
            return Intrinsic::x86_rdfsbase_32;	 // "__builtin_ia32_rdfsbase32"
          case '6':	 // 1 string to match.
            if (BuiltinName[24] != '4')
              break;
            return Intrinsic::x86_rdfsbase_64;	 // "__builtin_ia32_rdfsbase64"
          }
          break;
        case 'g':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+18, "sbase", 5))
            break;
          switch (BuiltinName[23]) {
          default: break;
          case '3':	 // 1 string to match.
            if (BuiltinName[24] != '2')
              break;
            return Intrinsic::x86_rdgsbase_32;	 // "__builtin_ia32_rdgsbase32"
          case '6':	 // 1 string to match.
            if (BuiltinName[24] != '4')
              break;
            return Intrinsic::x86_rdgsbase_64;	 // "__builtin_ia32_rdgsbase64"
          }
          break;
        }
        break;
      case 'n':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "dscales", 7))
          break;
        switch (BuiltinName[24]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::x86_avx512_rndscale_sd;	 // "__builtin_ia32_rndscalesd"
        case 's':	 // 1 string to match.
          return Intrinsic::x86_avx512_rndscale_ss;	 // "__builtin_ia32_rndscaless"
        }
        break;
      case 'o':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "undp", 4))
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "256", 3))
            break;
          return Intrinsic::x86_avx_round_pd_256;	 // "__builtin_ia32_roundpd256"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "256", 3))
            break;
          return Intrinsic::x86_avx_round_ps_256;	 // "__builtin_ia32_roundps256"
        }
        break;
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+17, "qrtps256", 8))
          break;
        return Intrinsic::x86_avx_rsqrt_ps_256;	 // "__builtin_ia32_rsqrtps256"
      }
      break;
    case 's':	 // 3 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'h':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "a256msg", 7))
          break;
        switch (BuiltinName[24]) {
        default: break;
        case '1':	 // 1 string to match.
          return Intrinsic::x86_sha256msg1;	 // "__builtin_ia32_sha256msg1"
        case '2':	 // 1 string to match.
          return Intrinsic::x86_sha256msg2;	 // "__builtin_ia32_sha256msg2"
        }
        break;
      case 't':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+17, "orelv4si", 8))
          break;
        return Intrinsic::x86_sse2_storel_dq;	 // "__builtin_ia32_storelv4si"
      }
      break;
    case 'u':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+16, "comisdneq", 9))
        break;
      return Intrinsic::x86_sse2_ucomineq_sd;	 // "__builtin_ia32_ucomisdneq"
    case 'v':	 // 3 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 't':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "estnzcp", 7))
          break;
        switch (BuiltinName[24]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::x86_avx_vtestnzc_pd;	 // "__builtin_ia32_vtestnzcpd"
        case 's':	 // 1 string to match.
          return Intrinsic::x86_avx_vtestnzc_ps;	 // "__builtin_ia32_vtestnzcps"
        }
        break;
      case 'z':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+17, "eroupper", 8))
          break;
        return Intrinsic::x86_avx_vzeroupper;	 // "__builtin_ia32_vzeroupper"
      }
      break;
    case 'w':	 // 4 strings to match.
      if (BuiltinName[16] != 'r')
        break;
      switch (BuiltinName[17]) {
      default: break;
      case 'f':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+18, "sbase", 5))
          break;
        switch (BuiltinName[23]) {
        default: break;
        case '3':	 // 1 string to match.
          if (BuiltinName[24] != '2')
            break;
          return Intrinsic::x86_wrfsbase_32;	 // "__builtin_ia32_wrfsbase32"
        case '6':	 // 1 string to match.
          if (BuiltinName[24] != '4')
            break;
          return Intrinsic::x86_wrfsbase_64;	 // "__builtin_ia32_wrfsbase64"
        }
        break;
      case 'g':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+18, "sbase", 5))
          break;
        switch (BuiltinName[23]) {
        default: break;
        case '3':	 // 1 string to match.
          if (BuiltinName[24] != '2')
            break;
          return Intrinsic::x86_wrgsbase_32;	 // "__builtin_ia32_wrgsbase32"
        case '6':	 // 1 string to match.
          if (BuiltinName[24] != '4')
            break;
          return Intrinsic::x86_wrgsbase_64;	 // "__builtin_ia32_wrgsbase64"
        }
        break;
      }
      break;
    }
    break;
  case 26:	 // 92 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_ia32_", 15))
      break;
    switch (BuiltinName[15]) {
    default: break;
    case 'a':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "ddsubp", 6))
        break;
      switch (BuiltinName[22]) {
      default: break;
      case 'd':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+23, "256", 3))
          break;
        return Intrinsic::x86_avx_addsub_pd_256;	 // "__builtin_ia32_addsubpd256"
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+23, "256", 3))
          break;
        return Intrinsic::x86_avx_addsub_ps_256;	 // "__builtin_ia32_addsubps256"
      }
      break;
    case 'b':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "lendvp", 6))
        break;
      switch (BuiltinName[22]) {
      default: break;
      case 'd':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+23, "256", 3))
          break;
        return Intrinsic::x86_avx_blendv_pd_256;	 // "__builtin_ia32_blendvpd256"
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+23, "256", 3))
          break;
        return Intrinsic::x86_avx_blendv_ps_256;	 // "__builtin_ia32_blendvps256"
      }
      break;
    case 'c':	 // 12 strings to match.
      if (memcmp(BuiltinName.data()+16, "vt", 2))
        break;
      switch (BuiltinName[18]) {
      default: break;
      case 'd':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+19, "q2p", 3))
          break;
        switch (BuiltinName[22]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+23, "256", 3))
            break;
          return Intrinsic::x86_avx_cvtdq2_pd_256;	 // "__builtin_ia32_cvtdq2pd256"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+23, "256", 3))
            break;
          return Intrinsic::x86_avx_cvtdq2_ps_256;	 // "__builtin_ia32_cvtdq2ps256"
        }
        break;
      case 'p':	 // 4 strings to match.
        switch (BuiltinName[19]) {
        default: break;
        case 'd':	 // 2 strings to match.
          if (BuiltinName[20] != '2')
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "q256", 4))
              break;
            return Intrinsic::x86_avx_cvt_pd2dq_256;	 // "__builtin_ia32_cvtpd2dq256"
          case 'p':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "s256", 4))
              break;
            return Intrinsic::x86_avx_cvt_pd2_ps_256;	 // "__builtin_ia32_cvtpd2ps256"
          }
          break;
        case 's':	 // 2 strings to match.
          if (BuiltinName[20] != '2')
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "q256", 4))
              break;
            return Intrinsic::x86_avx_cvt_ps2dq_256;	 // "__builtin_ia32_cvtps2dq256"
          case 'p':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "d256", 4))
              break;
            return Intrinsic::x86_avx_cvt_ps2_pd_256;	 // "__builtin_ia32_cvtps2pd256"
          }
          break;
        }
        break;
      case 's':	 // 2 strings to match.
        switch (BuiltinName[19]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "2usi64", 6))
            break;
          return Intrinsic::x86_avx512_cvtsd2usi64;	 // "__builtin_ia32_cvtsd2usi64"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "2usi64", 6))
            break;
          return Intrinsic::x86_avx512_cvtss2usi64;	 // "__builtin_ia32_cvtss2usi64"
        }
        break;
      case 't':	 // 2 strings to match.
        if (BuiltinName[19] != 's')
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "2si64", 5))
            break;
          return Intrinsic::x86_sse2_cvttsd2si64;	 // "__builtin_ia32_cvttsd2si64"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "2si64", 5))
            break;
          return Intrinsic::x86_sse_cvttss2si64;	 // "__builtin_ia32_cvttss2si64"
        }
        break;
      case 'u':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+19, "si642s", 6))
          break;
        switch (BuiltinName[25]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::x86_avx512_cvtusi642sd;	 // "__builtin_ia32_cvtusi642sd"
        case 's':	 // 1 string to match.
          return Intrinsic::x86_avx512_cvtusi642ss;	 // "__builtin_ia32_cvtusi642ss"
        }
        break;
      }
      break;
    case 'g':	 // 4 strings to match.
      if (memcmp(BuiltinName.data()+16, "atherpf", 7))
        break;
      switch (BuiltinName[23]) {
      default: break;
      case 'd':	 // 2 strings to match.
        if (BuiltinName[24] != 'p')
          break;
        switch (BuiltinName[25]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::x86_avx512_gatherpf_dpd_512;	 // "__builtin_ia32_gatherpfdpd"
        case 's':	 // 1 string to match.
          return Intrinsic::x86_avx512_gatherpf_dps_512;	 // "__builtin_ia32_gatherpfdps"
        }
        break;
      case 'q':	 // 2 strings to match.
        if (BuiltinName[24] != 'p')
          break;
        switch (BuiltinName[25]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::x86_avx512_gatherpf_qpd_512;	 // "__builtin_ia32_gatherpfqpd"
        case 's':	 // 1 string to match.
          return Intrinsic::x86_avx512_gatherpf_qps_512;	 // "__builtin_ia32_gatherpfqps"
        }
        break;
      }
      break;
    case 'i':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+16, "nsertps128", 10))
        break;
      return Intrinsic::x86_sse41_insertps;	 // "__builtin_ia32_insertps128"
    case 'm':	 // 6 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'a':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "skstorep", 8))
          break;
        switch (BuiltinName[25]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::x86_avx_maskstore_pd;	 // "__builtin_ia32_maskstorepd"
        case 's':	 // 1 string to match.
          return Intrinsic::x86_avx_maskstore_ps;	 // "__builtin_ia32_maskstoreps"
        }
        break;
      case 'o':	 // 4 strings to match.
        if (BuiltinName[17] != 'v')
          break;
        switch (BuiltinName[18]) {
        default: break;
        case 'm':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+19, "skp", 3))
            break;
          switch (BuiltinName[22]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "256", 3))
              break;
            return Intrinsic::x86_avx_movmsk_pd_256;	 // "__builtin_ia32_movmskpd256"
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "256", 3))
              break;
            return Intrinsic::x86_avx_movmsk_ps_256;	 // "__builtin_ia32_movmskps256"
          }
          break;
        case 'n':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+19, "tdqa", 4))
            break;
          switch (BuiltinName[23]) {
          default: break;
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "56", 2))
              break;
            return Intrinsic::x86_avx2_movntdqa;	 // "__builtin_ia32_movntdqa256"
          case '5':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "12", 2))
              break;
            return Intrinsic::x86_avx512_movntdqa;	 // "__builtin_ia32_movntdqa512"
          }
          break;
        }
        break;
      }
      break;
    case 'p':	 // 45 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'a':	 // 8 strings to match.
        if (memcmp(BuiltinName.data()+17, "ck", 2))
          break;
        switch (BuiltinName[19]) {
        default: break;
        case 's':	 // 4 strings to match.
          if (BuiltinName[20] != 's')
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'd':	 // 2 strings to match.
            if (BuiltinName[22] != 'w')
              break;
            switch (BuiltinName[23]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+24, "28", 2))
                break;
              return Intrinsic::x86_sse2_packssdw_128;	 // "__builtin_ia32_packssdw128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+24, "56", 2))
                break;
              return Intrinsic::x86_avx2_packssdw;	 // "__builtin_ia32_packssdw256"
            }
            break;
          case 'w':	 // 2 strings to match.
            if (BuiltinName[22] != 'b')
              break;
            switch (BuiltinName[23]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+24, "28", 2))
                break;
              return Intrinsic::x86_sse2_packsswb_128;	 // "__builtin_ia32_packsswb128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+24, "56", 2))
                break;
              return Intrinsic::x86_avx2_packsswb;	 // "__builtin_ia32_packsswb256"
            }
            break;
          }
          break;
        case 'u':	 // 4 strings to match.
          if (BuiltinName[20] != 's')
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'd':	 // 2 strings to match.
            if (BuiltinName[22] != 'w')
              break;
            switch (BuiltinName[23]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+24, "28", 2))
                break;
              return Intrinsic::x86_sse41_packusdw;	 // "__builtin_ia32_packusdw128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+24, "56", 2))
                break;
              return Intrinsic::x86_avx2_packusdw;	 // "__builtin_ia32_packusdw256"
            }
            break;
          case 'w':	 // 2 strings to match.
            if (BuiltinName[22] != 'b')
              break;
            switch (BuiltinName[23]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+24, "28", 2))
                break;
              return Intrinsic::x86_sse2_packuswb_128;	 // "__builtin_ia32_packuswb128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+24, "56", 2))
                break;
              return Intrinsic::x86_avx2_packuswb;	 // "__builtin_ia32_packuswb256"
            }
            break;
          }
          break;
        }
        break;
      case 'b':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "lendvb", 6))
          break;
        switch (BuiltinName[23]) {
        default: break;
        case '1':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+24, "28", 2))
            break;
          return Intrinsic::x86_sse41_pblendvb;	 // "__builtin_ia32_pblendvb128"
        case '2':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+24, "56", 2))
            break;
          return Intrinsic::x86_avx2_pblendvb;	 // "__builtin_ia32_pblendvb256"
        }
        break;
      case 'm':	 // 33 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'o':	 // 31 strings to match.
          if (BuiltinName[18] != 'v')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'm':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+20, "skb", 3))
              break;
            switch (BuiltinName[23]) {
            default: break;
            case '1':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+24, "28", 2))
                break;
              return Intrinsic::x86_sse2_pmovmskb_128;	 // "__builtin_ia32_pmovmskb128"
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+24, "56", 2))
                break;
              return Intrinsic::x86_avx2_pmovmskb;	 // "__builtin_ia32_pmovmskb256"
            }
            break;
          case 's':	 // 12 strings to match.
            if (BuiltinName[20] != 'x')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'b':	 // 6 strings to match.
              switch (BuiltinName[22]) {
              default: break;
              case 'd':	 // 2 strings to match.
                switch (BuiltinName[23]) {
                default: break;
                case '1':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "28", 2))
                    break;
                  return Intrinsic::x86_sse41_pmovsxbd;	 // "__builtin_ia32_pmovsxbd128"
                case '2':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "56", 2))
                    break;
                  return Intrinsic::x86_avx2_pmovsxbd;	 // "__builtin_ia32_pmovsxbd256"
                }
                break;
              case 'q':	 // 2 strings to match.
                switch (BuiltinName[23]) {
                default: break;
                case '1':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "28", 2))
                    break;
                  return Intrinsic::x86_sse41_pmovsxbq;	 // "__builtin_ia32_pmovsxbq128"
                case '2':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "56", 2))
                    break;
                  return Intrinsic::x86_avx2_pmovsxbq;	 // "__builtin_ia32_pmovsxbq256"
                }
                break;
              case 'w':	 // 2 strings to match.
                switch (BuiltinName[23]) {
                default: break;
                case '1':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "28", 2))
                    break;
                  return Intrinsic::x86_sse41_pmovsxbw;	 // "__builtin_ia32_pmovsxbw128"
                case '2':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "56", 2))
                    break;
                  return Intrinsic::x86_avx2_pmovsxbw;	 // "__builtin_ia32_pmovsxbw256"
                }
                break;
              }
              break;
            case 'd':	 // 2 strings to match.
              if (BuiltinName[22] != 'q')
                break;
              switch (BuiltinName[23]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+24, "28", 2))
                  break;
                return Intrinsic::x86_sse41_pmovsxdq;	 // "__builtin_ia32_pmovsxdq128"
              case '2':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+24, "56", 2))
                  break;
                return Intrinsic::x86_avx2_pmovsxdq;	 // "__builtin_ia32_pmovsxdq256"
              }
              break;
            case 'w':	 // 4 strings to match.
              switch (BuiltinName[22]) {
              default: break;
              case 'd':	 // 2 strings to match.
                switch (BuiltinName[23]) {
                default: break;
                case '1':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "28", 2))
                    break;
                  return Intrinsic::x86_sse41_pmovsxwd;	 // "__builtin_ia32_pmovsxwd128"
                case '2':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "56", 2))
                    break;
                  return Intrinsic::x86_avx2_pmovsxwd;	 // "__builtin_ia32_pmovsxwd256"
                }
                break;
              case 'q':	 // 2 strings to match.
                switch (BuiltinName[23]) {
                default: break;
                case '1':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "28", 2))
                    break;
                  return Intrinsic::x86_sse41_pmovsxwq;	 // "__builtin_ia32_pmovsxwq128"
                case '2':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "56", 2))
                    break;
                  return Intrinsic::x86_avx2_pmovsxwq;	 // "__builtin_ia32_pmovsxwq256"
                }
                break;
              }
              break;
            }
            break;
          case 'z':	 // 17 strings to match.
            if (BuiltinName[20] != 'x')
              break;
            switch (BuiltinName[21]) {
            default: break;
            case 'b':	 // 8 strings to match.
              switch (BuiltinName[22]) {
              default: break;
              case 'd':	 // 3 strings to match.
                switch (BuiltinName[23]) {
                default: break;
                case '1':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "28", 2))
                    break;
                  return Intrinsic::x86_sse41_pmovzxbd;	 // "__builtin_ia32_pmovzxbd128"
                case '2':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "56", 2))
                    break;
                  return Intrinsic::x86_avx2_pmovzxbd;	 // "__builtin_ia32_pmovzxbd256"
                case '5':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "12", 2))
                    break;
                  return Intrinsic::x86_avx512_pmovzxbd;	 // "__builtin_ia32_pmovzxbd512"
                }
                break;
              case 'q':	 // 3 strings to match.
                switch (BuiltinName[23]) {
                default: break;
                case '1':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "28", 2))
                    break;
                  return Intrinsic::x86_sse41_pmovzxbq;	 // "__builtin_ia32_pmovzxbq128"
                case '2':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "56", 2))
                    break;
                  return Intrinsic::x86_avx2_pmovzxbq;	 // "__builtin_ia32_pmovzxbq256"
                case '5':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "12", 2))
                    break;
                  return Intrinsic::x86_avx512_pmovzxbq;	 // "__builtin_ia32_pmovzxbq512"
                }
                break;
              case 'w':	 // 2 strings to match.
                switch (BuiltinName[23]) {
                default: break;
                case '1':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "28", 2))
                    break;
                  return Intrinsic::x86_sse41_pmovzxbw;	 // "__builtin_ia32_pmovzxbw128"
                case '2':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "56", 2))
                    break;
                  return Intrinsic::x86_avx2_pmovzxbw;	 // "__builtin_ia32_pmovzxbw256"
                }
                break;
              }
              break;
            case 'd':	 // 3 strings to match.
              if (BuiltinName[22] != 'q')
                break;
              switch (BuiltinName[23]) {
              default: break;
              case '1':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+24, "28", 2))
                  break;
                return Intrinsic::x86_sse41_pmovzxdq;	 // "__builtin_ia32_pmovzxdq128"
              case '2':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+24, "56", 2))
                  break;
                return Intrinsic::x86_avx2_pmovzxdq;	 // "__builtin_ia32_pmovzxdq256"
              case '5':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+24, "12", 2))
                  break;
                return Intrinsic::x86_avx512_pmovzxdq;	 // "__builtin_ia32_pmovzxdq512"
              }
              break;
            case 'w':	 // 6 strings to match.
              switch (BuiltinName[22]) {
              default: break;
              case 'd':	 // 3 strings to match.
                switch (BuiltinName[23]) {
                default: break;
                case '1':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "28", 2))
                    break;
                  return Intrinsic::x86_sse41_pmovzxwd;	 // "__builtin_ia32_pmovzxwd128"
                case '2':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "56", 2))
                    break;
                  return Intrinsic::x86_avx2_pmovzxwd;	 // "__builtin_ia32_pmovzxwd256"
                case '5':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "12", 2))
                    break;
                  return Intrinsic::x86_avx512_pmovzxwd;	 // "__builtin_ia32_pmovzxwd512"
                }
                break;
              case 'q':	 // 3 strings to match.
                switch (BuiltinName[23]) {
                default: break;
                case '1':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "28", 2))
                    break;
                  return Intrinsic::x86_sse41_pmovzxwq;	 // "__builtin_ia32_pmovzxwq128"
                case '2':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "56", 2))
                    break;
                  return Intrinsic::x86_avx2_pmovzxwq;	 // "__builtin_ia32_pmovzxwq256"
                case '5':	 // 1 string to match.
                  if (memcmp(BuiltinName.data()+24, "12", 2))
                    break;
                  return Intrinsic::x86_avx512_pmovzxwq;	 // "__builtin_ia32_pmovzxwq512"
                }
                break;
              }
              break;
            }
            break;
          }
          break;
        case 'u':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+18, "lhrsw", 5))
            break;
          switch (BuiltinName[23]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "28", 2))
              break;
            return Intrinsic::x86_ssse3_pmul_hr_sw_128;	 // "__builtin_ia32_pmulhrsw128"
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "56", 2))
              break;
            return Intrinsic::x86_avx2_pmul_hr_sw;	 // "__builtin_ia32_pmulhrsw256"
          }
          break;
        }
        break;
      case 't':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "estnzc", 6))
          break;
        switch (BuiltinName[23]) {
        default: break;
        case '1':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+24, "28", 2))
            break;
          return Intrinsic::x86_sse41_ptestnzc;	 // "__builtin_ia32_ptestnzc128"
        case '2':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+24, "56", 2))
            break;
          return Intrinsic::x86_avx_ptestnzc_256;	 // "__builtin_ia32_ptestnzc256"
        }
        break;
      }
      break;
    case 's':	 // 4 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'h':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+17, "a256rnds2", 9))
          break;
        return Intrinsic::x86_sha256rnds2;	 // "__builtin_ia32_sha256rnds2"
      case 't':	 // 3 strings to match.
        if (memcmp(BuiltinName.data()+17, "ore", 3))
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "qu256", 5))
            break;
          return Intrinsic::x86_avx_storeu_dq_256;	 // "__builtin_ia32_storedqu256"
        case 'u':	 // 2 strings to match.
          if (BuiltinName[21] != 'p')
            break;
          switch (BuiltinName[22]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "256", 3))
              break;
            return Intrinsic::x86_avx_storeu_pd_256;	 // "__builtin_ia32_storeupd256"
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "256", 3))
              break;
            return Intrinsic::x86_avx_storeu_ps_256;	 // "__builtin_ia32_storeups256"
          }
          break;
        }
        break;
      }
      break;
    case 'v':	 // 16 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'f':	 // 12 strings to match.
        if (BuiltinName[17] != 'm')
          break;
        switch (BuiltinName[18]) {
        default: break;
        case 'a':	 // 6 strings to match.
          if (memcmp(BuiltinName.data()+19, "dd", 2))
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'p':	 // 4 strings to match.
            switch (BuiltinName[22]) {
            default: break;
            case 'd':	 // 2 strings to match.
              switch (BuiltinName[23]) {
              default: break;
              case '2':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+24, "56", 2))
                  break;
                return Intrinsic::x86_fma_vfmadd_pd_256;	 // "__builtin_ia32_vfmaddpd256"
              case '5':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+24, "12", 2))
                  break;
                return Intrinsic::x86_fma_vfmadd_pd_512;	 // "__builtin_ia32_vfmaddpd512"
              }
              break;
            case 's':	 // 2 strings to match.
              switch (BuiltinName[23]) {
              default: break;
              case '2':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+24, "56", 2))
                  break;
                return Intrinsic::x86_fma_vfmadd_ps_256;	 // "__builtin_ia32_vfmaddps256"
              case '5':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+24, "12", 2))
                  break;
                return Intrinsic::x86_fma_vfmadd_ps_512;	 // "__builtin_ia32_vfmaddps512"
              }
              break;
            }
            break;
          case 's':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+22, "ubp", 3))
              break;
            switch (BuiltinName[25]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_fma_vfmaddsub_pd;	 // "__builtin_ia32_vfmaddsubpd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_fma_vfmaddsub_ps;	 // "__builtin_ia32_vfmaddsubps"
            }
            break;
          }
          break;
        case 's':	 // 6 strings to match.
          if (memcmp(BuiltinName.data()+19, "ub", 2))
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'a':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+22, "ddp", 3))
              break;
            switch (BuiltinName[25]) {
            default: break;
            case 'd':	 // 1 string to match.
              return Intrinsic::x86_fma_vfmsubadd_pd;	 // "__builtin_ia32_vfmsubaddpd"
            case 's':	 // 1 string to match.
              return Intrinsic::x86_fma_vfmsubadd_ps;	 // "__builtin_ia32_vfmsubaddps"
            }
            break;
          case 'p':	 // 4 strings to match.
            switch (BuiltinName[22]) {
            default: break;
            case 'd':	 // 2 strings to match.
              switch (BuiltinName[23]) {
              default: break;
              case '2':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+24, "56", 2))
                  break;
                return Intrinsic::x86_fma_vfmsub_pd_256;	 // "__builtin_ia32_vfmsubpd256"
              case '5':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+24, "12", 2))
                  break;
                return Intrinsic::x86_fma_vfmsub_pd_512;	 // "__builtin_ia32_vfmsubpd512"
              }
              break;
            case 's':	 // 2 strings to match.
              switch (BuiltinName[23]) {
              default: break;
              case '2':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+24, "56", 2))
                  break;
                return Intrinsic::x86_fma_vfmsub_ps_256;	 // "__builtin_ia32_vfmsubps256"
              case '5':	 // 1 string to match.
                if (memcmp(BuiltinName.data()+24, "12", 2))
                  break;
                return Intrinsic::x86_fma_vfmsub_ps_512;	 // "__builtin_ia32_vfmsubps512"
              }
              break;
            }
            break;
          }
          break;
        }
        break;
      case 't':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+17, "est", 3))
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'c':	 // 2 strings to match.
          if (BuiltinName[21] != 'p')
            break;
          switch (BuiltinName[22]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "256", 3))
              break;
            return Intrinsic::x86_avx_vtestc_pd_256;	 // "__builtin_ia32_vtestcpd256"
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "256", 3))
              break;
            return Intrinsic::x86_avx_vtestc_ps_256;	 // "__builtin_ia32_vtestcps256"
          }
          break;
        case 'z':	 // 2 strings to match.
          if (BuiltinName[21] != 'p')
            break;
          switch (BuiltinName[22]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "256", 3))
              break;
            return Intrinsic::x86_avx_vtestz_pd_256;	 // "__builtin_ia32_vtestzpd256"
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+23, "256", 3))
              break;
            return Intrinsic::x86_avx_vtestz_ps_256;	 // "__builtin_ia32_vtestzps256"
          }
          break;
        }
        break;
      }
      break;
    }
    break;
  case 27:	 // 48 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_ia32_", 15))
      break;
    switch (BuiltinName[15]) {
    default: break;
    case 'c':	 // 4 strings to match.
      if (memcmp(BuiltinName.data()+16, "vtt", 3))
        break;
      switch (BuiltinName[19]) {
      default: break;
      case 'p':	 // 2 strings to match.
        switch (BuiltinName[20]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "2dq256", 6))
            break;
          return Intrinsic::x86_avx_cvtt_pd2dq_256;	 // "__builtin_ia32_cvttpd2dq256"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "2dq256", 6))
            break;
          return Intrinsic::x86_avx_cvtt_ps2dq_256;	 // "__builtin_ia32_cvttps2dq256"
        }
        break;
      case 's':	 // 2 strings to match.
        switch (BuiltinName[20]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "2usi64", 6))
            break;
          return Intrinsic::x86_avx512_cvttsd2usi64;	 // "__builtin_ia32_cvttsd2usi64"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "2usi64", 6))
            break;
          return Intrinsic::x86_avx512_cvttss2usi64;	 // "__builtin_ia32_cvttss2usi64"
        }
        break;
      }
      break;
    case 'e':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+16, "xtractps128", 11))
        break;
      return Intrinsic::x86_sse41_extractps;	 // "__builtin_ia32_extractps128"
    case 'g':	 // 8 strings to match.
      if (memcmp(BuiltinName.data()+16, "ather", 5))
        break;
      switch (BuiltinName[21]) {
      default: break;
      case 'd':	 // 4 strings to match.
        switch (BuiltinName[22]) {
        default: break;
        case '_':	 // 2 strings to match.
          switch (BuiltinName[23]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "256", 3))
              break;
            return Intrinsic::x86_avx2_gather_d_d_256;	 // "__builtin_ia32_gatherd_d256"
          case 'q':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "256", 3))
              break;
            return Intrinsic::x86_avx2_gather_d_q_256;	 // "__builtin_ia32_gatherd_q256"
          }
          break;
        case 'i':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+23, "v8d", 3))
            break;
          switch (BuiltinName[26]) {
          default: break;
          case 'f':	 // 1 string to match.
            return Intrinsic::x86_avx512_gather_qpd_512;	 // "__builtin_ia32_gatherdiv8df"
          case 'i':	 // 1 string to match.
            return Intrinsic::x86_avx512_gather_qpq_512;	 // "__builtin_ia32_gatherdiv8di"
          }
          break;
        }
        break;
      case 'q':	 // 2 strings to match.
        if (BuiltinName[22] != '_')
          break;
        switch (BuiltinName[23]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+24, "256", 3))
            break;
          return Intrinsic::x86_avx2_gather_q_d_256;	 // "__builtin_ia32_gatherq_d256"
        case 'q':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+24, "256", 3))
            break;
          return Intrinsic::x86_avx2_gather_q_q_256;	 // "__builtin_ia32_gatherq_q256"
        }
        break;
      case 's':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+22, "iv8d", 4))
          break;
        switch (BuiltinName[26]) {
        default: break;
        case 'f':	 // 1 string to match.
          return Intrinsic::x86_avx512_gather_dpd_512;	 // "__builtin_ia32_gathersiv8df"
        case 'i':	 // 1 string to match.
          return Intrinsic::x86_avx512_gather_dpq_512;	 // "__builtin_ia32_gathersiv8di"
        }
        break;
      }
      break;
    case 'm':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "askload", 7))
        break;
      switch (BuiltinName[23]) {
      default: break;
      case 'd':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+24, "256", 3))
          break;
        return Intrinsic::x86_avx2_maskload_d_256;	 // "__builtin_ia32_maskloadd256"
      case 'q':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+24, "256", 3))
          break;
        return Intrinsic::x86_avx2_maskload_q_256;	 // "__builtin_ia32_maskloadq256"
      }
      break;
    case 'p':	 // 9 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'c':	 // 5 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'l':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "mulqdq128", 9))
            break;
          return Intrinsic::x86_pclmulqdq;	 // "__builtin_ia32_pclmulqdq128"
        case 'm':	 // 4 strings to match.
          if (BuiltinName[18] != 'p')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'e':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+20, "str", 3))
              break;
            switch (BuiltinName[23]) {
            default: break;
            case 'i':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+24, "128", 3))
                break;
              return Intrinsic::x86_sse42_pcmpestri128;	 // "__builtin_ia32_pcmpestri128"
            case 'm':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+24, "128", 3))
                break;
              return Intrinsic::x86_sse42_pcmpestrm128;	 // "__builtin_ia32_pcmpestrm128"
            }
            break;
          case 'i':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+20, "str", 3))
              break;
            switch (BuiltinName[23]) {
            default: break;
            case 'i':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+24, "128", 3))
                break;
              return Intrinsic::x86_sse42_pcmpistri128;	 // "__builtin_ia32_pcmpistri128"
            case 'm':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+24, "128", 3))
                break;
              return Intrinsic::x86_sse42_pcmpistrm128;	 // "__builtin_ia32_pcmpistrm128"
            }
            break;
          }
          break;
        }
        break;
      case 'e':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "rmvars", 6))
          break;
        switch (BuiltinName[23]) {
        default: break;
        case 'f':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+24, "256", 3))
            break;
          return Intrinsic::x86_avx2_permps;	 // "__builtin_ia32_permvarsf256"
        case 'i':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+24, "256", 3))
            break;
          return Intrinsic::x86_avx2_permd;	 // "__builtin_ia32_permvarsi256"
        }
        break;
      case 'm':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "addubsw", 7))
          break;
        switch (BuiltinName[24]) {
        default: break;
        case '1':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+25, "28", 2))
            break;
          return Intrinsic::x86_ssse3_pmadd_ub_sw_128;	 // "__builtin_ia32_pmaddubsw128"
        case '2':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+25, "56", 2))
            break;
          return Intrinsic::x86_avx2_pmadd_ub_sw;	 // "__builtin_ia32_pmaddubsw256"
        }
        break;
      }
      break;
    case 'r':	 // 6 strings to match.
      if (memcmp(BuiltinName.data()+16, "cp", 2))
        break;
      switch (BuiltinName[18]) {
      default: break;
      case '1':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+19, "4s", 2))
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "_mask", 5))
            break;
          return Intrinsic::x86_avx512_rcp14_sd;	 // "__builtin_ia32_rcp14sd_mask"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "_mask", 5))
            break;
          return Intrinsic::x86_avx512_rcp14_ss;	 // "__builtin_ia32_rcp14ss_mask"
        }
        break;
      case '2':	 // 4 strings to match.
        if (BuiltinName[19] != '8')
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'p':	 // 2 strings to match.
          switch (BuiltinName[21]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "_mask", 5))
              break;
            return Intrinsic::x86_avx512_rcp28_pd;	 // "__builtin_ia32_rcp28pd_mask"
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "_mask", 5))
              break;
            return Intrinsic::x86_avx512_rcp28_ps;	 // "__builtin_ia32_rcp28ps_mask"
          }
          break;
        case 's':	 // 2 strings to match.
          switch (BuiltinName[21]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "_mask", 5))
              break;
            return Intrinsic::x86_avx512_rcp28_sd;	 // "__builtin_ia32_rcp28sd_mask"
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "_mask", 5))
              break;
            return Intrinsic::x86_avx512_rcp28_ss;	 // "__builtin_ia32_rcp28ss_mask"
          }
          break;
        }
        break;
      }
      break;
    case 's':	 // 4 strings to match.
      if (memcmp(BuiltinName.data()+16, "catterpf", 8))
        break;
      switch (BuiltinName[24]) {
      default: break;
      case 'd':	 // 2 strings to match.
        if (BuiltinName[25] != 'p')
          break;
        switch (BuiltinName[26]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::x86_avx512_scatterpf_dpd_512;	 // "__builtin_ia32_scatterpfdpd"
        case 's':	 // 1 string to match.
          return Intrinsic::x86_avx512_scatterpf_dps_512;	 // "__builtin_ia32_scatterpfdps"
        }
        break;
      case 'q':	 // 2 strings to match.
        if (BuiltinName[25] != 'p')
          break;
        switch (BuiltinName[26]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::x86_avx512_scatterpf_qpd_512;	 // "__builtin_ia32_scatterpfqpd"
        case 's':	 // 1 string to match.
          return Intrinsic::x86_avx512_scatterpf_qps_512;	 // "__builtin_ia32_scatterpfqps"
        }
        break;
      }
      break;
    case 'v':	 // 14 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'c':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "vtp", 3))
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'h':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "2ps256", 6))
            break;
          return Intrinsic::x86_vcvtph2ps_256;	 // "__builtin_ia32_vcvtph2ps256"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "2ph256", 6))
            break;
          return Intrinsic::x86_vcvtps2ph_256;	 // "__builtin_ia32_vcvtps2ph256"
        }
        break;
      case 'e':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "c_", 2))
          break;
        switch (BuiltinName[19]) {
        default: break;
        case 'e':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "xt_v4hi", 7))
            break;
          return Intrinsic::x86_mmx_pextr_w;	 // "__builtin_ia32_vec_ext_v4hi"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "et_v4hi", 7))
            break;
          return Intrinsic::x86_mmx_pinsr_w;	 // "__builtin_ia32_vec_set_v4hi"
        }
        break;
      case 'f':	 // 8 strings to match.
        if (memcmp(BuiltinName.data()+17, "nm", 2))
          break;
        switch (BuiltinName[19]) {
        default: break;
        case 'a':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+20, "ddp", 3))
            break;
          switch (BuiltinName[23]) {
          default: break;
          case 'd':	 // 2 strings to match.
            switch (BuiltinName[24]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+25, "56", 2))
                break;
              return Intrinsic::x86_fma_vfnmadd_pd_256;	 // "__builtin_ia32_vfnmaddpd256"
            case '5':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+25, "12", 2))
                break;
              return Intrinsic::x86_fma_vfnmadd_pd_512;	 // "__builtin_ia32_vfnmaddpd512"
            }
            break;
          case 's':	 // 2 strings to match.
            switch (BuiltinName[24]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+25, "56", 2))
                break;
              return Intrinsic::x86_fma_vfnmadd_ps_256;	 // "__builtin_ia32_vfnmaddps256"
            case '5':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+25, "12", 2))
                break;
              return Intrinsic::x86_fma_vfnmadd_ps_512;	 // "__builtin_ia32_vfnmaddps512"
            }
            break;
          }
          break;
        case 's':	 // 4 strings to match.
          if (memcmp(BuiltinName.data()+20, "ubp", 3))
            break;
          switch (BuiltinName[23]) {
          default: break;
          case 'd':	 // 2 strings to match.
            switch (BuiltinName[24]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+25, "56", 2))
                break;
              return Intrinsic::x86_fma_vfnmsub_pd_256;	 // "__builtin_ia32_vfnmsubpd256"
            case '5':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+25, "12", 2))
                break;
              return Intrinsic::x86_fma_vfnmsub_pd_512;	 // "__builtin_ia32_vfnmsubpd512"
            }
            break;
          case 's':	 // 2 strings to match.
            switch (BuiltinName[24]) {
            default: break;
            case '2':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+25, "56", 2))
                break;
              return Intrinsic::x86_fma_vfnmsub_ps_256;	 // "__builtin_ia32_vfnmsubps256"
            case '5':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+25, "12", 2))
                break;
              return Intrinsic::x86_fma_vfnmsub_ps_512;	 // "__builtin_ia32_vfnmsubps512"
            }
            break;
          }
          break;
        }
        break;
      case 'p':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "ermilvarp", 9))
          break;
        switch (BuiltinName[26]) {
        default: break;
        case 'd':	 // 1 string to match.
          return Intrinsic::x86_avx_vpermilvar_pd;	 // "__builtin_ia32_vpermilvarpd"
        case 's':	 // 1 string to match.
          return Intrinsic::x86_avx_vpermilvar_ps;	 // "__builtin_ia32_vpermilvarps"
        }
        break;
      }
      break;
    }
    break;
  case 28:	 // 42 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_ia32_", 15))
      break;
    switch (BuiltinName[15]) {
    default: break;
    case 'a':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "es", 2))
        break;
      switch (BuiltinName[18]) {
      default: break;
      case 'd':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+19, "eclast128", 9))
          break;
        return Intrinsic::x86_aesni_aesdeclast;	 // "__builtin_ia32_aesdeclast128"
      case 'e':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+19, "nclast128", 9))
          break;
        return Intrinsic::x86_aesni_aesenclast;	 // "__builtin_ia32_aesenclast128"
      }
      break;
    case 'c':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "mpp", 3))
        break;
      switch (BuiltinName[19]) {
      default: break;
      case 'd':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+20, "512_mask", 8))
          break;
        return Intrinsic::x86_avx512_mask_cmp_pd_512;	 // "__builtin_ia32_cmppd512_mask"
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+20, "512_mask", 8))
          break;
        return Intrinsic::x86_avx512_mask_cmp_ps_512;	 // "__builtin_ia32_cmpps512_mask"
      }
      break;
    case 'g':	 // 8 strings to match.
      if (memcmp(BuiltinName.data()+16, "ather", 5))
        break;
      switch (BuiltinName[21]) {
      default: break;
      case 'd':	 // 4 strings to match.
        switch (BuiltinName[22]) {
        default: break;
        case '_':	 // 2 strings to match.
          if (BuiltinName[23] != 'p')
            break;
          switch (BuiltinName[24]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "256", 3))
              break;
            return Intrinsic::x86_avx2_gather_d_pd_256;	 // "__builtin_ia32_gatherd_pd256"
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "256", 3))
              break;
            return Intrinsic::x86_avx2_gather_d_ps_256;	 // "__builtin_ia32_gatherd_ps256"
          }
          break;
        case 'i':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+23, "v16s", 4))
            break;
          switch (BuiltinName[27]) {
          default: break;
          case 'f':	 // 1 string to match.
            return Intrinsic::x86_avx512_gather_qps_512;	 // "__builtin_ia32_gatherdiv16sf"
          case 'i':	 // 1 string to match.
            return Intrinsic::x86_avx512_gather_qpi_512;	 // "__builtin_ia32_gatherdiv16si"
          }
          break;
        }
        break;
      case 'q':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+22, "_p", 2))
          break;
        switch (BuiltinName[24]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+25, "256", 3))
            break;
          return Intrinsic::x86_avx2_gather_q_pd_256;	 // "__builtin_ia32_gatherq_pd256"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+25, "256", 3))
            break;
          return Intrinsic::x86_avx2_gather_q_ps_256;	 // "__builtin_ia32_gatherq_ps256"
        }
        break;
      case 's':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+22, "iv16s", 5))
          break;
        switch (BuiltinName[27]) {
        default: break;
        case 'f':	 // 1 string to match.
          return Intrinsic::x86_avx512_gather_dps_512;	 // "__builtin_ia32_gathersiv16sf"
        case 'i':	 // 1 string to match.
          return Intrinsic::x86_avx512_gather_dpi_512;	 // "__builtin_ia32_gathersiv16si"
        }
        break;
      }
      break;
    case 'i':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+16, "nsert128i256", 12))
        break;
      return Intrinsic::x86_avx2_vinserti128;	 // "__builtin_ia32_insert128i256"
    case 'm':	 // 8 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'a':	 // 6 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 's':	 // 4 strings to match.
          if (BuiltinName[18] != 'k')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'l':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+20, "oadp", 4))
              break;
            switch (BuiltinName[24]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+25, "256", 3))
                break;
              return Intrinsic::x86_avx_maskload_pd_256;	 // "__builtin_ia32_maskloadpd256"
            case 's':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+25, "256", 3))
                break;
              return Intrinsic::x86_avx_maskload_ps_256;	 // "__builtin_ia32_maskloadps256"
            }
            break;
          case 's':	 // 2 strings to match.
            if (memcmp(BuiltinName.data()+20, "tore", 4))
              break;
            switch (BuiltinName[24]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+25, "256", 3))
                break;
              return Intrinsic::x86_avx2_maskstore_d_256;	 // "__builtin_ia32_maskstored256"
            case 'q':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+25, "256", 3))
                break;
              return Intrinsic::x86_avx2_maskstore_q_256;	 // "__builtin_ia32_maskstoreq256"
            }
            break;
          }
          break;
        case 'x':	 // 2 strings to match.
          if (BuiltinName[18] != 'p')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+20, "512_mask", 8))
              break;
            return Intrinsic::x86_avx512_mask_max_pd_512;	 // "__builtin_ia32_maxpd512_mask"
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+20, "512_mask", 8))
              break;
            return Intrinsic::x86_avx512_mask_max_ps_512;	 // "__builtin_ia32_maxps512_mask"
          }
          break;
        }
        break;
      case 'i':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "np", 2))
          break;
        switch (BuiltinName[19]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "512_mask", 8))
            break;
          return Intrinsic::x86_avx512_mask_min_pd_512;	 // "__builtin_ia32_minpd512_mask"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "512_mask", 8))
            break;
          return Intrinsic::x86_avx512_mask_min_ps_512;	 // "__builtin_ia32_minps512_mask"
        }
        break;
      }
      break;
    case 'p':	 // 15 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'a':	 // 4 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'b':	 // 2 strings to match.
          if (BuiltinName[18] != 's')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+20, "512_mask", 8))
              break;
            return Intrinsic::x86_avx512_mask_pabs_d_512;	 // "__builtin_ia32_pabsd512_mask"
          case 'q':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+20, "512_mask", 8))
              break;
            return Intrinsic::x86_avx512_mask_pabs_q_512;	 // "__builtin_ia32_pabsq512_mask"
          }
          break;
        case 'n':	 // 2 strings to match.
          if (BuiltinName[18] != 'd')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+20, "512_mask", 8))
              break;
            return Intrinsic::x86_avx512_mask_pand_d_512;	 // "__builtin_ia32_pandd512_mask"
          case 'q':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+20, "512_mask", 8))
              break;
            return Intrinsic::x86_avx512_mask_pand_q_512;	 // "__builtin_ia32_pandq512_mask"
          }
          break;
        }
        break;
      case 'c':	 // 10 strings to match.
        if (memcmp(BuiltinName.data()+17, "mp", 2))
          break;
        switch (BuiltinName[19]) {
        default: break;
        case 'e':	 // 5 strings to match.
          if (memcmp(BuiltinName.data()+20, "stri", 4))
            break;
          switch (BuiltinName[24]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "128", 3))
              break;
            return Intrinsic::x86_sse42_pcmpestria128;	 // "__builtin_ia32_pcmpestria128"
          case 'c':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "128", 3))
              break;
            return Intrinsic::x86_sse42_pcmpestric128;	 // "__builtin_ia32_pcmpestric128"
          case 'o':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "128", 3))
              break;
            return Intrinsic::x86_sse42_pcmpestrio128;	 // "__builtin_ia32_pcmpestrio128"
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "128", 3))
              break;
            return Intrinsic::x86_sse42_pcmpestris128;	 // "__builtin_ia32_pcmpestris128"
          case 'z':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "128", 3))
              break;
            return Intrinsic::x86_sse42_pcmpestriz128;	 // "__builtin_ia32_pcmpestriz128"
          }
          break;
        case 'i':	 // 5 strings to match.
          if (memcmp(BuiltinName.data()+20, "stri", 4))
            break;
          switch (BuiltinName[24]) {
          default: break;
          case 'a':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "128", 3))
              break;
            return Intrinsic::x86_sse42_pcmpistria128;	 // "__builtin_ia32_pcmpistria128"
          case 'c':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "128", 3))
              break;
            return Intrinsic::x86_sse42_pcmpistric128;	 // "__builtin_ia32_pcmpistric128"
          case 'o':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "128", 3))
              break;
            return Intrinsic::x86_sse42_pcmpistrio128;	 // "__builtin_ia32_pcmpistrio128"
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "128", 3))
              break;
            return Intrinsic::x86_sse42_pcmpistris128;	 // "__builtin_ia32_pcmpistris128"
          case 'z':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+25, "128", 3))
              break;
            return Intrinsic::x86_sse42_pcmpistriz128;	 // "__builtin_ia32_pcmpistriz128"
          }
          break;
        }
        break;
      case 'h':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+17, "minposuw128", 11))
          break;
        return Intrinsic::x86_sse41_phminposuw;	 // "__builtin_ia32_phminposuw128"
      }
      break;
    case 's':	 // 4 strings to match.
      if (memcmp(BuiltinName.data()+16, "catter", 6))
        break;
      switch (BuiltinName[22]) {
      default: break;
      case 'd':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+23, "iv8d", 4))
          break;
        switch (BuiltinName[27]) {
        default: break;
        case 'f':	 // 1 string to match.
          return Intrinsic::x86_avx512_scatter_qpd_512;	 // "__builtin_ia32_scatterdiv8df"
        case 'i':	 // 1 string to match.
          return Intrinsic::x86_avx512_scatter_qpq_512;	 // "__builtin_ia32_scatterdiv8di"
        }
        break;
      case 's':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+23, "iv8d", 4))
          break;
        switch (BuiltinName[27]) {
        default: break;
        case 'f':	 // 1 string to match.
          return Intrinsic::x86_avx512_scatter_dpd_512;	 // "__builtin_ia32_scattersiv8df"
        case 'i':	 // 1 string to match.
          return Intrinsic::x86_avx512_scatter_dpq_512;	 // "__builtin_ia32_scattersiv8di"
        }
        break;
      }
      break;
    case 'v':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "testnzcp", 8))
        break;
      switch (BuiltinName[24]) {
      default: break;
      case 'd':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+25, "256", 3))
          break;
        return Intrinsic::x86_avx_vtestnzc_pd_256;	 // "__builtin_ia32_vtestnzcpd256"
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+25, "256", 3))
          break;
        return Intrinsic::x86_avx_vtestnzc_ps_256;	 // "__builtin_ia32_vtestnzcps256"
      }
      break;
    }
    break;
  case 29:	 // 40 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_ia32_", 15))
      break;
    switch (BuiltinName[15]) {
    default: break;
    case 'e':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+16, "xtract128i256", 13))
        break;
      return Intrinsic::x86_avx2_vextracti128;	 // "__builtin_ia32_extract128i256"
    case 'm':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "askstorep", 9))
        break;
      switch (BuiltinName[25]) {
      default: break;
      case 'd':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+26, "256", 3))
          break;
        return Intrinsic::x86_avx_maskstore_pd_256;	 // "__builtin_ia32_maskstorepd256"
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+26, "256", 3))
          break;
        return Intrinsic::x86_avx_maskstore_ps_256;	 // "__builtin_ia32_maskstoreps256"
      }
      break;
    case 'p':	 // 19 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'b':	 // 10 strings to match.
        if (memcmp(BuiltinName.data()+17, "roadcast", 8))
          break;
        switch (BuiltinName[25]) {
        default: break;
        case 'b':	 // 2 strings to match.
          switch (BuiltinName[26]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "28", 2))
              break;
            return Intrinsic::x86_avx2_pbroadcastb_128;	 // "__builtin_ia32_pbroadcastb128"
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "56", 2))
              break;
            return Intrinsic::x86_avx2_pbroadcastb_256;	 // "__builtin_ia32_pbroadcastb256"
          }
          break;
        case 'd':	 // 3 strings to match.
          switch (BuiltinName[26]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "28", 2))
              break;
            return Intrinsic::x86_avx2_pbroadcastd_128;	 // "__builtin_ia32_pbroadcastd128"
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "56", 2))
              break;
            return Intrinsic::x86_avx2_pbroadcastd_256;	 // "__builtin_ia32_pbroadcastd256"
          case '5':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "12", 2))
              break;
            return Intrinsic::x86_avx512_pbroadcastd_512;	 // "__builtin_ia32_pbroadcastd512"
          }
          break;
        case 'q':	 // 3 strings to match.
          switch (BuiltinName[26]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "28", 2))
              break;
            return Intrinsic::x86_avx2_pbroadcastq_128;	 // "__builtin_ia32_pbroadcastq128"
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "56", 2))
              break;
            return Intrinsic::x86_avx2_pbroadcastq_256;	 // "__builtin_ia32_pbroadcastq256"
          case '5':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "12", 2))
              break;
            return Intrinsic::x86_avx512_pbroadcastq_512;	 // "__builtin_ia32_pbroadcastq512"
          }
          break;
        case 'w':	 // 2 strings to match.
          switch (BuiltinName[26]) {
          default: break;
          case '1':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "28", 2))
              break;
            return Intrinsic::x86_avx2_pbroadcastw_128;	 // "__builtin_ia32_pbroadcastw128"
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "56", 2))
              break;
            return Intrinsic::x86_avx2_pbroadcastw_256;	 // "__builtin_ia32_pbroadcastw256"
          }
          break;
        }
        break;
      case 'm':	 // 9 strings to match.
        switch (BuiltinName[17]) {
        default: break;
        case 'a':	 // 4 strings to match.
          if (BuiltinName[18] != 'x')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 's':	 // 2 strings to match.
            switch (BuiltinName[20]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "512_mask", 8))
                break;
              return Intrinsic::x86_avx512_mask_pmaxs_d_512;	 // "__builtin_ia32_pmaxsd512_mask"
            case 'q':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "512_mask", 8))
                break;
              return Intrinsic::x86_avx512_mask_pmaxs_q_512;	 // "__builtin_ia32_pmaxsq512_mask"
            }
            break;
          case 'u':	 // 2 strings to match.
            switch (BuiltinName[20]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "512_mask", 8))
                break;
              return Intrinsic::x86_avx512_mask_pmaxu_d_512;	 // "__builtin_ia32_pmaxud512_mask"
            case 'q':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "512_mask", 8))
                break;
              return Intrinsic::x86_avx512_mask_pmaxu_q_512;	 // "__builtin_ia32_pmaxuq512_mask"
            }
            break;
          }
          break;
        case 'i':	 // 4 strings to match.
          if (BuiltinName[18] != 'n')
            break;
          switch (BuiltinName[19]) {
          default: break;
          case 's':	 // 2 strings to match.
            switch (BuiltinName[20]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "512_mask", 8))
                break;
              return Intrinsic::x86_avx512_mask_pmins_d_512;	 // "__builtin_ia32_pminsd512_mask"
            case 'q':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "512_mask", 8))
                break;
              return Intrinsic::x86_avx512_mask_pmins_q_512;	 // "__builtin_ia32_pminsq512_mask"
            }
            break;
          case 'u':	 // 2 strings to match.
            switch (BuiltinName[20]) {
            default: break;
            case 'd':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "512_mask", 8))
                break;
              return Intrinsic::x86_avx512_mask_pminu_d_512;	 // "__builtin_ia32_pminud512_mask"
            case 'q':	 // 1 string to match.
              if (memcmp(BuiltinName.data()+21, "512_mask", 8))
                break;
              return Intrinsic::x86_avx512_mask_pminu_q_512;	 // "__builtin_ia32_pminuq512_mask"
            }
            break;
          }
          break;
        case 'u':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+18, "ldq512_mask", 11))
            break;
          return Intrinsic::x86_avx512_mask_pmul_dq_512;	 // "__builtin_ia32_pmuldq512_mask"
        }
        break;
      }
      break;
    case 'r':	 // 6 strings to match.
      if (memcmp(BuiltinName.data()+16, "sqrt", 4))
        break;
      switch (BuiltinName[20]) {
      default: break;
      case '1':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+21, "4s", 2))
          break;
        switch (BuiltinName[23]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+24, "_mask", 5))
            break;
          return Intrinsic::x86_avx512_rsqrt14_sd;	 // "__builtin_ia32_rsqrt14sd_mask"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+24, "_mask", 5))
            break;
          return Intrinsic::x86_avx512_rsqrt14_ss;	 // "__builtin_ia32_rsqrt14ss_mask"
        }
        break;
      case '2':	 // 4 strings to match.
        if (BuiltinName[21] != '8')
          break;
        switch (BuiltinName[22]) {
        default: break;
        case 'p':	 // 2 strings to match.
          switch (BuiltinName[23]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "_mask", 5))
              break;
            return Intrinsic::x86_avx512_rsqrt28_pd;	 // "__builtin_ia32_rsqrt28pd_mask"
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "_mask", 5))
              break;
            return Intrinsic::x86_avx512_rsqrt28_ps;	 // "__builtin_ia32_rsqrt28ps_mask"
          }
          break;
        case 's':	 // 2 strings to match.
          switch (BuiltinName[23]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "_mask", 5))
              break;
            return Intrinsic::x86_avx512_rsqrt28_sd;	 // "__builtin_ia32_rsqrt28sd_mask"
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+24, "_mask", 5))
              break;
            return Intrinsic::x86_avx512_rsqrt28_ss;	 // "__builtin_ia32_rsqrt28ss_mask"
          }
          break;
        }
        break;
      }
      break;
    case 's':	 // 4 strings to match.
      if (memcmp(BuiltinName.data()+16, "catter", 6))
        break;
      switch (BuiltinName[22]) {
      default: break;
      case 'd':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+23, "iv16s", 5))
          break;
        switch (BuiltinName[28]) {
        default: break;
        case 'f':	 // 1 string to match.
          return Intrinsic::x86_avx512_scatter_qps_512;	 // "__builtin_ia32_scatterdiv16sf"
        case 'i':	 // 1 string to match.
          return Intrinsic::x86_avx512_scatter_qpi_512;	 // "__builtin_ia32_scatterdiv16si"
        }
        break;
      case 's':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+23, "iv16s", 5))
          break;
        switch (BuiltinName[28]) {
        default: break;
        case 'f':	 // 1 string to match.
          return Intrinsic::x86_avx512_scatter_dps_512;	 // "__builtin_ia32_scattersiv16sf"
        case 'i':	 // 1 string to match.
          return Intrinsic::x86_avx512_scatter_dpi_512;	 // "__builtin_ia32_scattersiv16si"
        }
        break;
      }
      break;
    case 'v':	 // 8 strings to match.
      if (memcmp(BuiltinName.data()+16, "fm", 2))
        break;
      switch (BuiltinName[18]) {
      default: break;
      case 'a':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+19, "ddsubp", 6))
          break;
        switch (BuiltinName[25]) {
        default: break;
        case 'd':	 // 2 strings to match.
          switch (BuiltinName[26]) {
          default: break;
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "56", 2))
              break;
            return Intrinsic::x86_fma_vfmaddsub_pd_256;	 // "__builtin_ia32_vfmaddsubpd256"
          case '5':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "12", 2))
              break;
            return Intrinsic::x86_fma_vfmaddsub_pd_512;	 // "__builtin_ia32_vfmaddsubpd512"
          }
          break;
        case 's':	 // 2 strings to match.
          switch (BuiltinName[26]) {
          default: break;
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "56", 2))
              break;
            return Intrinsic::x86_fma_vfmaddsub_ps_256;	 // "__builtin_ia32_vfmaddsubps256"
          case '5':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "12", 2))
              break;
            return Intrinsic::x86_fma_vfmaddsub_ps_512;	 // "__builtin_ia32_vfmaddsubps512"
          }
          break;
        }
        break;
      case 's':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+19, "ubaddp", 6))
          break;
        switch (BuiltinName[25]) {
        default: break;
        case 'd':	 // 2 strings to match.
          switch (BuiltinName[26]) {
          default: break;
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "56", 2))
              break;
            return Intrinsic::x86_fma_vfmsubadd_pd_256;	 // "__builtin_ia32_vfmsubaddpd256"
          case '5':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "12", 2))
              break;
            return Intrinsic::x86_fma_vfmsubadd_pd_512;	 // "__builtin_ia32_vfmsubaddpd512"
          }
          break;
        case 's':	 // 2 strings to match.
          switch (BuiltinName[26]) {
          default: break;
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "56", 2))
              break;
            return Intrinsic::x86_fma_vfmsubadd_ps_256;	 // "__builtin_ia32_vfmsubaddps256"
          case '5':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+27, "12", 2))
              break;
            return Intrinsic::x86_fma_vfmsubadd_ps_512;	 // "__builtin_ia32_vfmsubaddps512"
          }
          break;
        }
        break;
      }
      break;
    }
    break;
  case 30:	 // 14 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_ia32_", 15))
      break;
    switch (BuiltinName[15]) {
    default: break;
    case 'l':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "oadup", 5))
        break;
      switch (BuiltinName[21]) {
      default: break;
      case 'd':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+22, "512_mask", 8))
          break;
        return Intrinsic::x86_avx512_mask_loadu_pd_512;	 // "__builtin_ia32_loadupd512_mask"
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+22, "512_mask", 8))
          break;
        return Intrinsic::x86_avx512_mask_loadu_ps_512;	 // "__builtin_ia32_loadups512_mask"
      }
      break;
    case 'p':	 // 3 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'c':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "mpeq", 4))
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "512_mask", 8))
            break;
          return Intrinsic::x86_avx512_mask_pcmpeq_d_512;	 // "__builtin_ia32_pcmpeqd512_mask"
        case 'q':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "512_mask", 8))
            break;
          return Intrinsic::x86_avx512_mask_pcmpeq_q_512;	 // "__builtin_ia32_pcmpeqq512_mask"
        }
        break;
      case 'm':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+17, "uludq512_mask", 13))
          break;
        return Intrinsic::x86_avx512_mask_pmulu_dq_512;	 // "__builtin_ia32_pmuludq512_mask"
      }
      break;
    case 'r':	 // 4 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'c':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "p14p", 4))
          break;
        switch (BuiltinName[21]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "512_mask", 8))
            break;
          return Intrinsic::x86_avx512_rcp14_pd_512;	 // "__builtin_ia32_rcp14pd512_mask"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+22, "512_mask", 8))
            break;
          return Intrinsic::x86_avx512_rcp14_ps_512;	 // "__builtin_ia32_rcp14ps512_mask"
        }
        break;
      case 'n':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "dscalep", 7))
          break;
        switch (BuiltinName[24]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+25, "_mask", 5))
            break;
          return Intrinsic::x86_avx512_mask_rndscale_pd_512;	 // "__builtin_ia32_rndscalepd_mask"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+25, "_mask", 5))
            break;
          return Intrinsic::x86_avx512_mask_rndscale_ps_512;	 // "__builtin_ia32_rndscaleps_mask"
        }
        break;
      }
      break;
    case 'v':	 // 5 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'b':	 // 3 strings to match.
        if (memcmp(BuiltinName.data()+17, "roadcasts", 9))
          break;
        switch (BuiltinName[26]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+27, "512", 3))
            break;
          return Intrinsic::x86_avx512_vbroadcast_sd_512;	 // "__builtin_ia32_vbroadcastsd512"
        case 's':	 // 2 strings to match.
          switch (BuiltinName[27]) {
          default: break;
          case '5':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+28, "12", 2))
              break;
            return Intrinsic::x86_avx512_vbroadcast_ss_512;	 // "__builtin_ia32_vbroadcastss512"
          case '_':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+28, "ps", 2))
              break;
            return Intrinsic::x86_avx2_vbroadcast_ss_ps;	 // "__builtin_ia32_vbroadcastss_ps"
          }
          break;
        }
        break;
      case 'p':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "ermilvarp", 9))
          break;
        switch (BuiltinName[26]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+27, "256", 3))
            break;
          return Intrinsic::x86_avx_vpermilvar_pd_256;	 // "__builtin_ia32_vpermilvarpd256"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+27, "256", 3))
            break;
          return Intrinsic::x86_avx_vpermilvar_ps_256;	 // "__builtin_ia32_vpermilvarps256"
        }
        break;
      }
      break;
    }
    break;
  case 31:	 // 12 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_ia32_", 15))
      break;
    switch (BuiltinName[15]) {
    default: break;
    case 'b':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "lendm", 5))
        break;
      switch (BuiltinName[21]) {
      default: break;
      case 'd':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+22, "_512_mask", 9))
          break;
        return Intrinsic::x86_avx512_mask_blend_d_512;	 // "__builtin_ia32_blendmd_512_mask"
      case 'q':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+22, "_512_mask", 9))
          break;
        return Intrinsic::x86_avx512_mask_blend_q_512;	 // "__builtin_ia32_blendmq_512_mask"
      }
      break;
    case 'c':	 // 5 strings to match.
      if (memcmp(BuiltinName.data()+16, "vt", 2))
        break;
      switch (BuiltinName[18]) {
      default: break;
      case 'd':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+19, "q2p", 3))
          break;
        switch (BuiltinName[22]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+23, "512_mask", 8))
            break;
          return Intrinsic::x86_avx512_mask_cvtdq2pd_512;	 // "__builtin_ia32_cvtdq2pd512_mask"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+23, "512_mask", 8))
            break;
          return Intrinsic::x86_avx512_mask_cvtdq2ps_512;	 // "__builtin_ia32_cvtdq2ps512_mask"
        }
        break;
      case 'p':	 // 3 strings to match.
        switch (BuiltinName[19]) {
        default: break;
        case 'd':	 // 2 strings to match.
          if (BuiltinName[20] != '2')
            break;
          switch (BuiltinName[21]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "q512_mask", 9))
              break;
            return Intrinsic::x86_avx512_mask_cvtpd2dq_512;	 // "__builtin_ia32_cvtpd2dq512_mask"
          case 'p':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+22, "s512_mask", 9))
              break;
            return Intrinsic::x86_avx512_mask_cvtpd2ps_512;	 // "__builtin_ia32_cvtpd2ps512_mask"
          }
          break;
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "2dq512_mask", 11))
            break;
          return Intrinsic::x86_avx512_mask_cvtps2dq_512;	 // "__builtin_ia32_cvtps2dq512_mask"
        }
        break;
      }
      break;
    case 's':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "toreup", 6))
        break;
      switch (BuiltinName[22]) {
      default: break;
      case 'd':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+23, "512_mask", 8))
          break;
        return Intrinsic::x86_avx512_mask_storeu_pd_512;	 // "__builtin_ia32_storeupd512_mask"
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+23, "512_mask", 8))
          break;
        return Intrinsic::x86_avx512_mask_storeu_ps_512;	 // "__builtin_ia32_storeups512_mask"
      }
      break;
    case 'v':	 // 3 strings to match.
      if (memcmp(BuiltinName.data()+16, "perm2f128_", 10))
        break;
      switch (BuiltinName[26]) {
      default: break;
      case 'p':	 // 2 strings to match.
        switch (BuiltinName[27]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+28, "256", 3))
            break;
          return Intrinsic::x86_avx_vperm2f128_pd_256;	 // "__builtin_ia32_vperm2f128_pd256"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+28, "256", 3))
            break;
          return Intrinsic::x86_avx_vperm2f128_ps_256;	 // "__builtin_ia32_vperm2f128_ps256"
        }
        break;
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+27, "i256", 4))
          break;
        return Intrinsic::x86_avx_vperm2f128_si_256;	 // "__builtin_ia32_vperm2f128_si256"
      }
      break;
    }
    break;
  case 32:	 // 19 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_ia32_", 15))
      break;
    switch (BuiltinName[15]) {
    default: break;
    case 'b':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "lendmp", 6))
        break;
      switch (BuiltinName[22]) {
      default: break;
      case 'd':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+23, "_512_mask", 9))
          break;
        return Intrinsic::x86_avx512_mask_blend_pd_512;	 // "__builtin_ia32_blendmpd_512_mask"
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+23, "_512_mask", 9))
          break;
        return Intrinsic::x86_avx512_mask_blend_ps_512;	 // "__builtin_ia32_blendmps_512_mask"
      }
      break;
    case 'c':	 // 6 strings to match.
      if (memcmp(BuiltinName.data()+16, "vt", 2))
        break;
      switch (BuiltinName[18]) {
      default: break;
      case 'p':	 // 2 strings to match.
        switch (BuiltinName[19]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "2udq512_mask", 12))
            break;
          return Intrinsic::x86_avx512_mask_cvtpd2udq_512;	 // "__builtin_ia32_cvtpd2udq512_mask"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+20, "2udq512_mask", 12))
            break;
          return Intrinsic::x86_avx512_mask_cvtps2udq_512;	 // "__builtin_ia32_cvtps2udq512_mask"
        }
        break;
      case 't':	 // 2 strings to match.
        if (BuiltinName[19] != 'p')
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "2dq512_mask", 11))
            break;
          return Intrinsic::x86_avx512_mask_cvttpd2dq_512;	 // "__builtin_ia32_cvttpd2dq512_mask"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "2dq512_mask", 11))
            break;
          return Intrinsic::x86_avx512_mask_cvttps2dq_512;	 // "__builtin_ia32_cvttps2dq512_mask"
        }
        break;
      case 'u':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+19, "dq2p", 4))
          break;
        switch (BuiltinName[23]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+24, "512_mask", 8))
            break;
          return Intrinsic::x86_avx512_mask_cvtudq2pd_512;	 // "__builtin_ia32_cvtudq2pd512_mask"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+24, "512_mask", 8))
            break;
          return Intrinsic::x86_avx512_mask_cvtudq2ps_512;	 // "__builtin_ia32_cvtudq2ps512_mask"
        }
        break;
      }
      break;
    case 'l':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "oaddqu", 6))
        break;
      switch (BuiltinName[22]) {
      default: break;
      case 'd':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+23, "i512_mask", 9))
          break;
        return Intrinsic::x86_avx512_mask_loadu_q_512;	 // "__builtin_ia32_loaddqudi512_mask"
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+23, "i512_mask", 9))
          break;
        return Intrinsic::x86_avx512_mask_loadu_d_512;	 // "__builtin_ia32_loaddqusi512_mask"
      }
      break;
    case 'r':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "sqrt14p", 7))
        break;
      switch (BuiltinName[23]) {
      default: break;
      case 'd':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+24, "512_mask", 8))
          break;
        return Intrinsic::x86_avx512_rsqrt14_pd_512;	 // "__builtin_ia32_rsqrt14pd512_mask"
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+24, "512_mask", 8))
          break;
        return Intrinsic::x86_avx512_rsqrt14_ps_512;	 // "__builtin_ia32_rsqrt14ps512_mask"
      }
      break;
    case 'v':	 // 7 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'c':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "vtp", 3))
          break;
        switch (BuiltinName[20]) {
        default: break;
        case 'h':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "2ps512_mask", 11))
            break;
          return Intrinsic::x86_avx512_mask_vcvtph2ps_512;	 // "__builtin_ia32_vcvtph2ps512_mask"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+21, "2ph512_mask", 11))
            break;
          return Intrinsic::x86_avx512_mask_vcvtps2ph_512;	 // "__builtin_ia32_vcvtps2ph512_mask"
        }
        break;
      case 'i':	 // 3 strings to match.
        if (memcmp(BuiltinName.data()+17, "nsertf128_", 10))
          break;
        switch (BuiltinName[27]) {
        default: break;
        case 'p':	 // 2 strings to match.
          switch (BuiltinName[28]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+29, "256", 3))
              break;
            return Intrinsic::x86_avx_vinsertf128_pd_256;	 // "__builtin_ia32_vinsertf128_pd256"
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+29, "256", 3))
              break;
            return Intrinsic::x86_avx_vinsertf128_ps_256;	 // "__builtin_ia32_vinsertf128_ps256"
          }
          break;
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+28, "i256", 4))
            break;
          return Intrinsic::x86_avx_vinsertf128_si_256;	 // "__builtin_ia32_vinsertf128_si256"
        }
        break;
      case 'p':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "lzcnt", 5))
          break;
        switch (BuiltinName[22]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+23, "_512_mask", 9))
            break;
          return Intrinsic::x86_avx512_mask_lzcnt_d_512;	 // "__builtin_ia32_vplzcntd_512_mask"
        case 'q':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+23, "_512_mask", 9))
            break;
          return Intrinsic::x86_avx512_mask_lzcnt_q_512;	 // "__builtin_ia32_vplzcntq_512_mask"
        }
        break;
      }
      break;
    }
    break;
  case 33:	 // 12 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_ia32_", 15))
      break;
    switch (BuiltinName[15]) {
    default: break;
    case 'a':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+16, "eskeygenassist128", 17))
        break;
      return Intrinsic::x86_aesni_aeskeygenassist;	 // "__builtin_ia32_aeskeygenassist128"
    case 'c':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "vttp", 4))
        break;
      switch (BuiltinName[20]) {
      default: break;
      case 'd':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+21, "2udq512_mask", 12))
          break;
        return Intrinsic::x86_avx512_mask_cvttpd2udq_512;	 // "__builtin_ia32_cvttpd2udq512_mask"
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+21, "2udq512_mask", 12))
          break;
        return Intrinsic::x86_avx512_mask_cvttps2udq_512;	 // "__builtin_ia32_cvttps2udq512_mask"
      }
      break;
    case 's':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+16, "toredqu", 7))
        break;
      switch (BuiltinName[23]) {
      default: break;
      case 'd':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+24, "i512_mask", 9))
          break;
        return Intrinsic::x86_avx512_mask_storeu_q_512;	 // "__builtin_ia32_storedqudi512_mask"
      case 's':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+24, "i512_mask", 9))
          break;
        return Intrinsic::x86_avx512_mask_storeu_d_512;	 // "__builtin_ia32_storedqusi512_mask"
      }
      break;
    case 'v':	 // 7 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'b':	 // 4 strings to match.
        if (memcmp(BuiltinName.data()+17, "roadcasts", 9))
          break;
        switch (BuiltinName[26]) {
        default: break;
        case 'd':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+27, "_pd", 3))
            break;
          switch (BuiltinName[30]) {
          default: break;
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+31, "56", 2))
              break;
            return Intrinsic::x86_avx2_vbroadcast_sd_pd_256;	 // "__builtin_ia32_vbroadcastsd_pd256"
          case '5':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+31, "12", 2))
              break;
            return Intrinsic::x86_avx512_vbroadcast_sd_pd_512;	 // "__builtin_ia32_vbroadcastsd_pd512"
          }
          break;
        case 's':	 // 2 strings to match.
          if (memcmp(BuiltinName.data()+27, "_ps", 3))
            break;
          switch (BuiltinName[30]) {
          default: break;
          case '2':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+31, "56", 2))
              break;
            return Intrinsic::x86_avx2_vbroadcast_ss_ps_256;	 // "__builtin_ia32_vbroadcastss_ps256"
          case '5':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+31, "12", 2))
              break;
            return Intrinsic::x86_avx512_vbroadcast_ss_ps_512;	 // "__builtin_ia32_vbroadcastss_ps512"
          }
          break;
        }
        break;
      case 'e':	 // 3 strings to match.
        if (memcmp(BuiltinName.data()+17, "xtractf128_", 11))
          break;
        switch (BuiltinName[28]) {
        default: break;
        case 'p':	 // 2 strings to match.
          switch (BuiltinName[29]) {
          default: break;
          case 'd':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+30, "256", 3))
              break;
            return Intrinsic::x86_avx_vextractf128_pd_256;	 // "__builtin_ia32_vextractf128_pd256"
          case 's':	 // 1 string to match.
            if (memcmp(BuiltinName.data()+30, "256", 3))
              break;
            return Intrinsic::x86_avx_vextractf128_ps_256;	 // "__builtin_ia32_vextractf128_ps256"
          }
          break;
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+29, "i256", 4))
            break;
          return Intrinsic::x86_avx_vextractf128_si_256;	 // "__builtin_ia32_vextractf128_si256"
        }
        break;
      }
      break;
    }
    break;
  case 34:	 // 2 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_ia32_vpermt2var", 25))
      break;
    switch (BuiltinName[25]) {
    default: break;
    case 'd':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+26, "512_mask", 8))
        break;
      return Intrinsic::x86_avx512_mask_vpermt_d_512;	 // "__builtin_ia32_vpermt2vard512_mask"
    case 'q':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+26, "512_mask", 8))
        break;
      return Intrinsic::x86_avx512_mask_vpermt_q_512;	 // "__builtin_ia32_vpermt2varq512_mask"
    }
    break;
  case 35:	 // 10 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_ia32_", 15))
      break;
    switch (BuiltinName[15]) {
    default: break;
    case 'p':	 // 6 strings to match.
      if (BuiltinName[16] != 's')
        break;
      switch (BuiltinName[17]) {
      default: break;
      case 'l':	 // 3 strings to match.
        if (memcmp(BuiltinName.data()+18, "ldqi", 4))
          break;
        switch (BuiltinName[22]) {
        default: break;
        case '1':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+23, "28_byteshift", 12))
            break;
          return Intrinsic::x86_sse2_psll_dq_bs;	 // "__builtin_ia32_pslldqi128_byteshift"
        case '2':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+23, "56_byteshift", 12))
            break;
          return Intrinsic::x86_avx2_psll_dq_bs;	 // "__builtin_ia32_pslldqi256_byteshift"
        case '5':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+23, "12_byteshift", 12))
            break;
          return Intrinsic::x86_avx512_psll_dq_bs;	 // "__builtin_ia32_pslldqi512_byteshift"
        }
        break;
      case 'r':	 // 3 strings to match.
        if (memcmp(BuiltinName.data()+18, "ldqi", 4))
          break;
        switch (BuiltinName[22]) {
        default: break;
        case '1':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+23, "28_byteshift", 12))
            break;
          return Intrinsic::x86_sse2_psrl_dq_bs;	 // "__builtin_ia32_psrldqi128_byteshift"
        case '2':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+23, "56_byteshift", 12))
            break;
          return Intrinsic::x86_avx2_psrl_dq_bs;	 // "__builtin_ia32_psrldqi256_byteshift"
        case '5':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+23, "12_byteshift", 12))
            break;
          return Intrinsic::x86_avx512_psrl_dq_bs;	 // "__builtin_ia32_psrldqi512_byteshift"
        }
        break;
      }
      break;
    case 'v':	 // 4 strings to match.
      switch (BuiltinName[16]) {
      default: break;
      case 'b':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "roadcastf128_p", 14))
          break;
        switch (BuiltinName[31]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+32, "256", 3))
            break;
          return Intrinsic::x86_avx_vbroadcastf128_pd_256;	 // "__builtin_ia32_vbroadcastf128_pd256"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+32, "256", 3))
            break;
          return Intrinsic::x86_avx_vbroadcastf128_ps_256;	 // "__builtin_ia32_vbroadcastf128_ps256"
        }
        break;
      case 'p':	 // 2 strings to match.
        if (memcmp(BuiltinName.data()+17, "ermt2varp", 9))
          break;
        switch (BuiltinName[26]) {
        default: break;
        case 'd':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+27, "512_mask", 8))
            break;
          return Intrinsic::x86_avx512_mask_vpermt_pd_512;	 // "__builtin_ia32_vpermt2varpd512_mask"
        case 's':	 // 1 string to match.
          if (memcmp(BuiltinName.data()+27, "512_mask", 8))
            break;
          return Intrinsic::x86_avx512_mask_vpermt_ps_512;	 // "__builtin_ia32_vpermt2varps512_mask"
        }
        break;
      }
      break;
    }
    break;
  case 36:	 // 2 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_ia32_vpconflict", 25))
      break;
    switch (BuiltinName[25]) {
    default: break;
    case 'd':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+26, "i_512_mask", 10))
        break;
      return Intrinsic::x86_avx512_mask_conflict_q_512;	 // "__builtin_ia32_vpconflictdi_512_mask"
    case 's':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+26, "i_512_mask", 10))
        break;
      return Intrinsic::x86_avx512_mask_conflict_d_512;	 // "__builtin_ia32_vpconflictsi_512_mask"
    }
    break;
  case 38:	 // 3 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_ia32_pbroadcast", 25))
      break;
    switch (BuiltinName[25]) {
    default: break;
    case 'd':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+26, "512_gpr_mask", 12))
        break;
      return Intrinsic::x86_avx512_mask_pbroadcast_d_gpr_512;	 // "__builtin_ia32_pbroadcastd512_gpr_mask"
    case 'q':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+26, "512_", 4))
        break;
      switch (BuiltinName[30]) {
      default: break;
      case 'g':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+31, "pr_mask", 7))
          break;
        return Intrinsic::x86_avx512_mask_pbroadcast_q_gpr_512;	 // "__builtin_ia32_pbroadcastq512_gpr_mask"
      case 'm':	 // 1 string to match.
        if (memcmp(BuiltinName.data()+31, "em_mask", 7))
          break;
        return Intrinsic::x86_avx512_mask_pbroadcast_q_mem_512;	 // "__builtin_ia32_pbroadcastq512_mem_mask"
      }
      break;
    }
    break;
  }
  }
  if (TargetPrefix == "xcore") {
  switch (BuiltinName.size()) {
  default: break;
  case 15:	 // 3 strings to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_", 10))
      break;
    switch (BuiltinName[10]) {
    default: break;
    case 'g':	 // 2 strings to match.
      if (memcmp(BuiltinName.data()+11, "et", 2))
        break;
      switch (BuiltinName[13]) {
      default: break;
      case 'i':	 // 1 string to match.
        if (BuiltinName[14] != 'd')
          break;
        return Intrinsic::xcore_getid;	 // "__builtin_getid"
      case 'p':	 // 1 string to match.
        if (BuiltinName[14] != 's')
          break;
        return Intrinsic::xcore_getps;	 // "__builtin_getps"
      }
      break;
    case 's':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+11, "etps", 4))
        break;
      return Intrinsic::xcore_setps;	 // "__builtin_setps"
    }
    break;
  case 16:	 // 1 string to match.
    if (memcmp(BuiltinName.data()+0, "__builtin_bitrev", 16))
      break;
    return Intrinsic::xcore_bitrev;	 // "__builtin_bitrev"
  }
  }
  return Intrinsic::not_intrinsic;
}
#endif

// Get the LLVM intrinsic that corresponds to a MS builtin.
// This is used by the C front-end.  The MS builtin name is passed
// in as a BuiltinName, and a target prefix (e.g. 'arm') is passed
// in as a TargetPrefix.  The result is assigned to 'IntrinsicID'.
#ifdef GET_LLVM_INTRINSIC_FOR_MS_BUILTIN
Intrinsic::ID Intrinsic::getIntrinsicForMSBuiltin(const char *TP, const char *BN) {
  StringRef BuiltinName(BN);
  StringRef TargetPrefix(TP);

  if (TargetPrefix == "arm") {
  switch (BuiltinName.size()) {
  default: break;
  case 5:	 // 3 strings to match.
    if (memcmp(BuiltinName.data()+0, "__", 2))
      break;
    switch (BuiltinName[2]) {
    default: break;
    case 'd':	 // 2 strings to match.
      switch (BuiltinName[3]) {
      default: break;
      case 'm':	 // 1 string to match.
        if (BuiltinName[4] != 'b')
          break;
        return Intrinsic::arm_dmb;	 // "__dmb"
      case 's':	 // 1 string to match.
        if (BuiltinName[4] != 'b')
          break;
        return Intrinsic::arm_dsb;	 // "__dsb"
      }
      break;
    case 'i':	 // 1 string to match.
      if (memcmp(BuiltinName.data()+3, "sb", 2))
        break;
      return Intrinsic::arm_isb;	 // "__isb"
    }
    break;
  case 18:	 // 1 string to match.
    if (memcmp(BuiltinName.data()+0, "_MoveToCoprocessor", 18))
      break;
    return Intrinsic::arm_mcr;	 // "_MoveToCoprocessor"
  case 19:	 // 1 string to match.
    if (memcmp(BuiltinName.data()+0, "_MoveToCoprocessor2", 19))
      break;
    return Intrinsic::arm_mcr2;	 // "_MoveToCoprocessor2"
  case 20:	 // 1 string to match.
    if (memcmp(BuiltinName.data()+0, "_MoveFromCoprocessor", 20))
      break;
    return Intrinsic::arm_mrc;	 // "_MoveFromCoprocessor"
  case 21:	 // 1 string to match.
    if (memcmp(BuiltinName.data()+0, "_MoveFromCoprocessor2", 21))
      break;
    return Intrinsic::arm_mrc2;	 // "_MoveFromCoprocessor2"
  }
}  return Intrinsic::not_intrinsic;
}
#endif

#if defined(_MSC_VER) && defined(setjmp_undefined_for_msvc)
// let's return it to _setjmp state
#  pragma pop_macro("setjmp")
#  undef setjmp_undefined_for_msvc
#endif