Merge "Introduce Rbit for instruction clarity" into main
diff --git a/src/android/net/apf/ApfV4Generator.java b/src/android/net/apf/ApfV4Generator.java
index bc48bef..f94e7f6 100644
--- a/src/android/net/apf/ApfV4Generator.java
+++ b/src/android/net/apf/ApfV4Generator.java
@@ -16,6 +16,8 @@
package android.net.apf;
+import static android.net.apf.ApfV4Generator.Rbit.Rbit0;
+import static android.net.apf.ApfV4Generator.Rbit.Rbit1;
import static android.net.apf.ApfV4Generator.Register.R0;
import static android.net.apf.ApfV4Generator.Register.R1;
@@ -161,12 +163,17 @@
}
}
public enum Register {
- R0(0),
- R1(1);
+ R0,
+ R1;
+ }
+
+ public enum Rbit {
+ Rbit0(0),
+ Rbit1(1);
final int value;
- private Register(int value) {
+ Rbit(int value) {
this.value = value;
}
}
@@ -296,7 +303,7 @@
class Instruction {
private final byte mOpcode; // A "Opcode" value.
- private final byte mRegister; // A "Register" value.
+ private final Rbit mRbit; // A "Rbit" value.
public final List<IntImmediate> mIntImms = new ArrayList<>();
// When mOpcode is a jump:
private int mTargetLabelSize;
@@ -310,7 +317,7 @@
Instruction(Opcodes opcode, Register register) {
mOpcode = (byte) opcode.value;
- mRegister = (byte) register.value;
+ mRbit = register == R0 ? Rbit0 : Rbit1;
}
Instruction(ExtendedOpcodes extendedOpcodes, Register register) {
@@ -482,7 +489,7 @@
*/
private byte generateInstructionByte() {
int sizeField = generateImmSizeField();
- return (byte)((mOpcode << 3) | (sizeField << 1) | mRegister);
+ return (byte) ((mOpcode << 3) | (sizeField << 1) | (byte) mRbit.value);
}
/**