commit | a836b2d10357a016747f606cf4a8a04ab4d359f2 | [log] [tgz] |
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author | fang hui <hui.fang@nxp.com> | Wed Nov 22 21:45:41 2017 +0800 |
committer | Marty Faltesek <mfaltesek@google.com> | Tue Feb 20 17:37:57 2018 +0000 |
tree | 5b368ca085df039e27c95ac278c51f4cb0e8b542 | |
parent | c4baa54eac348454692090f417b13252312af329 [diff] |
Revert "MLK-14498-2 ARM: imx7d: clk: select uart clock parent and rate" This reverts commit 4f447cb8bccb1d40973e46478d7b11aa61961c90. The commit changes the parent of UART5 from OSC to PLL , cause earlycon baudrate error. Change-Id: I06ff91eb54b16c89d3741eb985868b8b842205f0 (cherry picked from commit c3a453462faee5a94a6722f19427444138b8925c)