| commit | a59797e41ce5f898a849674b8022cb0fa34e63c8 | [log] [tgz] |
|---|---|---|
| author | Ananth Krishna R <ananth.krishna.r@intel.com> | Fri Feb 20 18:45:15 2015 +0530 |
| committer | Mihai Serban <mihai.serban@intel.com> | Thu Jan 07 17:54:45 2016 +0200 |
| tree | 5ad934e75f6c739d805c980d78a8ba8ef05b06cc | |
| parent | 7f5013d8ba55e7cb61dc662baf6bc7cadf17f9a6 [diff] |
Enabling Module level DVFS for CHT This patch add the necessary changes to enable frequency scaling at module level. Synchronizes each cpu with it sibling one at CPUfreq level. This is better for systems with independant VCC for each modules. Change-Id: I3c70b57d30112e0f0821d18c3d263552015930de Tracked-On: https://jira01.devtools.intel.com/browse/GMINL-5644 Signed-off-by: Ananth Krishna R <ananth.krishna.r@intel.com> Signed-off-by: Kumar P, Mahesh <mahesh.kumar.p@intel.com>