blob: d84e80fc1fb0e2b4435be9b3aa6a0cc60eefdc29 [file] [log] [blame]
/*
* Copyright 2015 Technexion Ltd.
*
* Author: Wig Cheng <wig.cheng@technexion.com>
* Richard Hu <richard.hu@technexion.com>
* Tapani Utriainen <tapani@technexion.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include "imx6ul.dtsi"
/ {
model = "Technexion Pico i.MX6 UltraLite Board";
compatible = "fsl,imx6ul-pico", "fsl,imx6ul";
memory {
reg = <0x80000000 0x10000000>;
};
chosen {
stdout-path = &uart6;
};
backlight {
compatible = "pwm-backlight";
pwms = <&pwm3 0 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
status = "okay";
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
reg_sd1_vmmc: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "VSD_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
};
wlreg_on: fixedregulator@100 {
compatible = "regulator-fixed";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-name = "wlreg_on";
gpio = <&gpio4 8 0>;
startup-delay-us = <100>;
enable-active-high;
};
bt_on: bt_on {
compatible = "regulator-fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "bt_on";
gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
regulator-boot-on;
};
reg_2p5v: 2p5v {
compatible = "regulator-fixed";
regulator-name = "2P5V";
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
regulator-always-on;
};
reg_3p3v: 3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_usb_otg_vbus: usb_otg_vbus {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_otg1>;
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio1 6 0>;
};
};
bcmdhd_wlan_0: bcmdhd_wlan@0 {
compatible = "android,bcmdhd_wlan";
pinctrl-0 = <&pinctrl_wifi_ctrl>;
wlreg_on-supply = <&wlreg_on>;
};
sound {
compatible = "fsl,imx6ul-sgtl5000",
"fsl,imx-audio-sgtl5000";
model = "imx6ul-sgtl5000";
cpu-dai = <&sai1>;
audio-codec = <&codec>;
audio-routing =
"LINE_IN", "Line In Jack",
"MIC_IN", "Mic Jack",
"Mic Jack", "Mic Bias",
"Headphone Jack", "HP_OUT";
mux-int-port = <1>;
mux-ext-port = <1>;
};
clocks {
sys_mclk: clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24576000>;
};
};
external_gpio {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio>;
enable-gpios = <&gpio4 19 0>,
<&gpio4 21 0>,
<&gpio4 22 0>,
<&gpio4 23 0>,
<&gpio4 24 0>,
<&gpio1 29 0>,
<&gpio5 2 0>;
status = "okay";
};
leds {
compatible = "gpio-leds";
led0 {
label = "led0";
gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
};
};
&cpu0 {
/*
* on i.MX6UL, no seperated VDD_ARM_IN and VDD_SOC_IN,
* to align with other platform and use the same cpufreq
* driver, still use the seperated OPP define for arm
* and soc.
*/
operating-points = <
/* kHz uV */
528000 1175000
396000 1175000
198000 1175000
>;
fsl,soc-operating-points = <
/* KHz uV */
528000 1175000
396000 1175000
198000 1175000
>;
arm-supply = <&sw1b_reg>;
soc-supply = <&sw1b_reg>;
fsl,arm-soc-shared = <1>;
};
&clks {
assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
assigned-clock-rates = <786432000>;
};
&sai1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai1>;
status = "okay";
};
&csi {
status = "disabled";
};
&gpc {
fsl,cpu_pupscr_sw2iso = <0x1>;
fsl,cpu_pupscr_sw = <0x0>;
fsl,cpu_pdnscr_iso2sw = <0x1>;
fsl,cpu_pdnscr_iso = <0x1>;
fsl,wdog-reset = <1>; /* watchdog select of reset source */
fsl,ldo-bypass = <0>; /* DCDC, ldo-enable */
};
&uart5 { /* Bluetooth */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5 &pinctrl_bt_ctrl>;
fsl,uart-has-rtscts;
status = "okay";
};
&uart6 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart6>;
status = "okay";
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
pmic: pfuze3000@08 {
compatible = "fsl,pfuze3000";
reg = <0x08>;
regulators {
sw1a_reg: sw1a {
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
/* VDD_ARM_SOC_IN*/
sw1b_reg: sw1b {
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1475000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
sw2_reg: sw2 {
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
/* DRAM */
sw3a_reg: sw3 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1650000>;
regulator-boot-on;
regulator-always-on;
};
/* DRAM */
vref_reg: vrefddr {
regulator-boot-on;
regulator-always-on;
};
vgen1_reg: vldo1 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vgen2_reg: vldo2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
regulator-always-on;
};
vgen3_reg: vccsd {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vgen4_reg: v33 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vgen5_reg: vldo3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vgen6_reg: vldo4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
adc: adc081c {
compatible = "ti,adc081c";
reg = <0x50>;
vref-supply = <&reg_3p3v>;
};
};
&i2c2 {
clock_frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
};
&i2c3 {
clock_frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
codec: sgtl5000@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clocks = <&sys_mclk 1>;
VDDA-supply = <&reg_2p5v>;
VDDIO-supply = <&reg_3p3v>;
};
};
&iomuxc {
pinctrl-names = "default";
pico-imx6ul {
pinctrl_uart5: uart5grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO04__UART5_DCE_TX 0x1b0b1
MX6UL_PAD_GPIO1_IO05__UART5_DCE_RX 0x1b0b1
MX6UL_PAD_GPIO1_IO08__UART5_DCE_RTS 0x1b0b1
MX6UL_PAD_GPIO1_IO09__UART5_DCE_CTS 0x1b0b1
>;
};
pinctrl_uart6: uart6grp {
fsl,pins = <
MX6UL_PAD_CSI_MCLK__UART6_DCE_TX 0x1b0b1
MX6UL_PAD_CSI_PIXCLK__UART6_DCE_RX 0x1b0b1
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
MX6UL_PAD_UART1_RTS_B__USDHC1_CD_B 0x03029
>;
};
pinctrl_usdhc1b: usdhc1grpB {
fsl,pins = <
MX6UL_PAD_NAND_READY_B__USDHC1_DATA4 0x17059
MX6UL_PAD_NAND_CE0_B__USDHC1_DATA5 0x17059
MX6UL_PAD_NAND_CE1_B__USDHC1_DATA6 0x17059
MX6UL_PAD_NAND_CLE__USDHC1_DATA7 0x17059
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO02__I2C1_SCL 0x4001b8b0
MX6UL_PAD_GPIO1_IO03__I2C1_SDA 0x4001b8b0
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6UL_PAD_UART1_TX_DATA__I2C3_SCL 0x4001b8b0
MX6UL_PAD_UART1_RX_DATA__I2C3_SDA 0x4001b8b0
>;
};
pinctrl_wifi_ctrl: wifi_ctrlgrp {
fsl,pins = <
MX6UL_PAD_NAND_DATA06__GPIO4_IO08 0x03029 /* wifi-reg-on */
MX6UL_PAD_NAND_DATA04__GPIO4_IO06 0x79 /* wifi-host-wake */
>;
};
pinctrl_bt_ctrl: bt_ctrlgrp {
fsl,pins = <
MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x79 /* bluetooth-reg-on */
MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x79 /* bluetooth-wake */
MX6UL_PAD_NAND_DATA05__GPIO4_IO07 0x79 /* bluetooth-host-wake */
>;
};
pinctrl_lcdif_dat: lcdifdatgrp {
fsl,pins = <
MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79
MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79
MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79
MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79
MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79
MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79
MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79
MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79
MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79
MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79
MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79
MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79
MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79
MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79
MX6UL_PAD_LCD_DATA18__LCDIF_DATA18 0x79
MX6UL_PAD_LCD_DATA19__LCDIF_DATA19 0x79
MX6UL_PAD_LCD_DATA20__LCDIF_DATA20 0x79
MX6UL_PAD_LCD_DATA21__LCDIF_DATA21 0x79
MX6UL_PAD_LCD_DATA22__LCDIF_DATA22 0x79
MX6UL_PAD_LCD_DATA23__LCDIF_DATA23 0x79
>;
};
pinctrl_lcdif_ctrl: lcdifctrlgrp {
fsl,pins = <
MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79
MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79
MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79
MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79
/* used for lcd reset */
MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x79
>;
};
pinctrl_gpmi_nand: gpmi-nand {
fsl,pins = <
MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1
MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1
MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1
MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000
MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1
MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1
MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1
MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1
MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1
MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1
MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1
MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1
MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1
MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1
MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1
>;
};
pinctrl_enet2: enet2grp {
fsl,pins = <
MX6UL_PAD_ENET1_TX_DATA1__ENET2_MDIO 0x1b0b0
MX6UL_PAD_ENET1_TX_EN__ENET2_MDC 0x1b0b0
MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
// MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x1b0b0
MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x80000000
MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x79
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10059
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
>;
};
pinctrl_sai1: sai1grp {
fsl,pins = <
MX6UL_PAD_CSI_DATA04__SAI1_TX_SYNC 0x1b0b0
MX6UL_PAD_CSI_DATA05__SAI1_TX_BCLK 0x1b0b0
MX6UL_PAD_CSI_DATA06__SAI1_RX_DATA 0x110b0
MX6UL_PAD_CSI_DATA07__SAI1_TX_DATA 0x1f0b8
>;
};
pinctrl_ecspi3: ecspi3grp {
fsl,pins = <
// MX6UL_PAD_UART2_TX_DATA__ECSPI3_SS0 0x10b0
MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20 0x10b0
MX6UL_PAD_UART2_RX_DATA__ECSPI3_SCLK 0x10b0
MX6UL_PAD_UART2_CTS_B__ECSPI3_MOSI 0x10b0
MX6UL_PAD_UART2_RTS_B__ECSPI3_MISO 0x10b0
>;
};
pinctrl_flexcan1: flexcan1grp {
fsl,pins = <
MX6UL_PAD_ENET1_RX_DATA0__FLEXCAN1_TX 0x1b020
MX6UL_PAD_ENET1_RX_DATA1__FLEXCAN1_RX 0x1b020
>;
};
pinctrl_flexcan2: flexcan2grp {
fsl,pins = <
MX6UL_PAD_ENET1_TX_DATA0__FLEXCAN2_RX 0x1b020
MX6UL_PAD_ENET1_RX_EN__FLEXCAN2_TX 0x1b020
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b0
MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b0
MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b0
MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b0b0
>;
};
pinctrl_pwm3: pwm3grp {
fsl,pins = <
MX6UL_PAD_NAND_ALE__PWM3_OUT 0x110b0
>;
};
pinctrl_usb_otg1_id: usbotg1idgrp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059
>;
};
pinctrl_usb_otg1: usbotg1grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO06__GPIO1_IO06 0x10b0
>;
};
pinctrl_qspi: qspigrp {
fsl,pins = <
MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00 0x70a1
MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01 0x70a1
MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02 0x70a1
MX6UL_PAD_NAND_CLE__QSPI_A_DATA03 0x70a1
MX6UL_PAD_NAND_WP_B__QSPI_A_SCLK 0x70a1
MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B 0x70a1
MX6UL_PAD_NAND_DATA07__QSPI_A_SS1_B 0x70a1
>;
};
pinctrl_pwm7: pwm7grp {
fsl,pins = <
MX6UL_PAD_ENET1_TX_CLK__PWM7_OUT 0x110b0
>;
};
pinctrl_pwm8: pwm8grp {
fsl,pins = <
MX6UL_PAD_ENET1_RX_ER__PWM8_OUT 0x110b0
>;
};
pinctrl_gpio: gpio {
fsl,pins = <
MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x79
MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0x79
MX6UL_PAD_CSI_DATA00__GPIO4_IO21 0x79
MX6UL_PAD_CSI_DATA01__GPIO4_IO22 0x79
MX6UL_PAD_CSI_DATA02__GPIO4_IO23 0x79
MX6UL_PAD_CSI_DATA03__GPIO4_IO24 0x79
MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x79
MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x79
>;
};
};
};
&pwm3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm3>;
clocks = <&clks IMX6UL_CLK_PWM3>,
<&clks IMX6UL_CLK_PWM3>;
status = "okay";
};
&usbotg1 {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_otg1_id>;
dr_mode = "otg";
disable-over-current;
status = "okay";
};
&usbotg2 {
dr_mode = "host";
disable-over-current;
status = "okay";
};
&lcdif {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcdif_dat
&pinctrl_lcdif_ctrl>;
display = <&display0>;
status = "okay";
display0: display {
bits-per-pixel = <32>;
bus-width = <24>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <33200000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <210>;
hback-porch = <46>;
hsync-len = <1>;
vback-porch = <22>;
vfront-porch = <23>;
vsync-len = <1>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
};
};
};
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
status = "disabled";
nand-on-flash-bbt;
};
&fec2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet2>;
phy-mode = "rmii";
phy-handle = <&ethphy1>;
status = "okay";
phy-reset-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
phy-reset-duration = <11>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
max-speed = <100>;
interrupt-parent = <&gpio5>;
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>;
};
};
};
&usdhc1 { /* Baseboard microSD slot */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;
pinctrl-1 = <&pinctrl_usdhc1b>;
bus-width = <8>;
no-1-8-v;
keep-power-in-suspend;
status = "okay";
};
&usdhc2 { /* Wifi SDIO */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
no-1-8-v;
wifi-host;
pm-ignore-notify;
keep-power-in-suspend;
enable-sdio-wakeup;
status = "okay";
};
&ecspi3 {
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi3>;
status = "okay";
spidev@0 {
compatible = "spidev";
spi-max-frequency = <60000000>;
reg = <0>;
};
};
&flexcan1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan1>;
status = "okay";
};
&flexcan2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan2>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
fsl,uart-has-rtscts;
status = "okay";
};
&qspi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
status = "disabled";
fsl,qspi-has-second-chip = <1>;
ddrsmp=<0>;
flash0: mt25q512@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q512";
spi-max-frequency = <59000000>;
spi-nor,ddr-quad-read-dummy = <6>;
reg = <0>;
};
};
&pwm1 {
clocks = <&clks IMX6UL_CLK_DUMMY>,
<&clks IMX6UL_CLK_DUMMY>;
};
&pwm7 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm7>;
clocks = <&clks IMX6UL_CLK_PWM7>,
<&clks IMX6UL_CLK_PWM7>;
status = "okay";
};
&pwm8 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm8>;
clocks = <&clks IMX6UL_CLK_PWM8>,
<&clks IMX6UL_CLK_PWM8>;
status = "okay";
};