| commit | 665ba4da201e548c62e39be0851091593bbb21d7 | [log] [tgz] |
|---|---|---|
| author | Paul Daniel Faria <paulfaria@google.com> | Wed Apr 26 21:35:43 2023 +0000 |
| committer | Paul Daniel Faria <paulfaria@google.com> | Wed Apr 26 21:46:32 2023 +0000 |
| tree | ce07c4c57d41d4c163cbf2d74c4b13a25d7ad8fc | |
| parent | e527d42ae4088eab194430fa39fdcade3007ed25 [diff] |
Increase size of RISCV x registers array by 1 In order to avoid hard-to-catch off-by-one errors in accessing the x register of the guest CPU state, the size of the x field will be increased to 32. This also removes the need to offset the register access in the helper functions. The check for 0 is left in since we don't want to read or write it directly. We only need to check for raw accesses to 0 now, which should be easier to spot. Test: mm and tree-hugger Bug: 279808127 Change-Id: I7cf2bc082bdcae68b34788bd9377ae74f9acca39
Berberis: dynamic binary translator to run Android apps with riscv64 native code on x86_64 devices or emulators.