diff --git a/cachegrind/cg_main.c b/cachegrind/cg_main.c
index 685b973..ec9c6e9 100644
--- a/cachegrind/cg_main.c
+++ b/cachegrind/cg_main.c
@@ -1045,9 +1045,10 @@
                       const VexArchInfo* archinfo_host,
                       IRType gWordTy, IRType hWordTy )
 {
-   Int        i, isize;
+   Int        i;
+   UInt       isize;
    IRStmt*    st;
-   Addr64     cia; /* address of current insn */
+   Addr       cia; /* address of current insn */
    CgState    cgs;
    IRTypeEnv* tyenv = sbIn->tyenv;
    InstrInfo* curr_inode = NULL;
@@ -1242,7 +1243,7 @@
                   we can pass it to the branch predictor simulation
                   functions easily. */
                Bool     inverted;
-               Addr64   nia, sea;
+               Addr     nia, sea;
                IRConst* dst;
                IRType   tyW    = hWordTy;
                IROp     widen  = tyW==Ity_I32  ? Iop_1Uto32  : Iop_1Uto64;
@@ -1257,15 +1258,13 @@
                   inverted by the ir optimiser.  To do that, figure out
                   the next (fallthrough) instruction's address and the
                   side exit address and see if they are the same. */
-               nia = cia + (Addr64)isize;
-               if (tyW == Ity_I32)
-                  nia &= 0xFFFFFFFFULL;
+               nia = cia + isize;
 
                /* Side exit address */
                dst = st->Ist.Exit.dst;
                if (tyW == Ity_I32) {
                   tl_assert(dst->tag == Ico_U32);
-                  sea = (Addr64)(UInt)dst->Ico.U32;
+                  sea = dst->Ico.U32;
                } else {
                   tl_assert(tyW == Ity_I64);
                   tl_assert(dst->tag == Ico_U64);
diff --git a/callgrind/main.c b/callgrind/main.c
index 6845d9d..05df95d 100644
--- a/callgrind/main.c
+++ b/callgrind/main.c
@@ -880,7 +880,7 @@
 	  if (Ist_IMark == st->tag) {
 	      inPreamble = False;
 
-	      instrAddr = (Addr)ULong_to_Ptr(st->Ist.IMark.addr);
+	      instrAddr = st->Ist.IMark.addr;
 	      instrLen  = st->Ist.IMark.len;
 
 	      (*instrs)++;
@@ -994,7 +994,7 @@
    st = sbIn->stmts[i];
    CLG_ASSERT(Ist_IMark == st->tag);
 
-   origAddr = (Addr)st->Ist.IMark.addr + (Addr)st->Ist.IMark.delta;
+   origAddr = st->Ist.IMark.addr + st->Ist.IMark.delta;
    CLG_ASSERT(origAddr == st->Ist.IMark.addr 
                           + st->Ist.IMark.delta);  // XXX: check no overflow
 
@@ -1026,9 +1026,9 @@
 	    break;
 
 	 case Ist_IMark: {
-            Addr64 cia   = st->Ist.IMark.addr + st->Ist.IMark.delta;
-            Int    isize = st->Ist.IMark.len;
-            CLG_ASSERT(clgs.instr_offset == (Addr)cia - origAddr);
+            Addr   cia   = st->Ist.IMark.addr + st->Ist.IMark.delta;
+            UInt   isize = st->Ist.IMark.len;
+            CLG_ASSERT(clgs.instr_offset == cia - origAddr);
 	    // If Vex fails to decode an instruction, the size will be zero.
 	    // Pretend otherwise.
 	    if (isize == 0) isize = VG_MIN_INSTR_SZB;
diff --git a/coregrind/m_translate.c b/coregrind/m_translate.c
index 212ed6f..6c3c899 100644
--- a/coregrind/m_translate.c
+++ b/coregrind/m_translate.c
@@ -202,11 +202,11 @@
 /* Given a guest IP, get an origin tag for a 1-element stack trace,
    and wrap it up in an IR atom that can be passed as the origin-tag
    value for a stack-adjustment helper function. */
-static IRExpr* mk_ecu_Expr ( Addr64 guest_IP )
+static IRExpr* mk_ecu_Expr ( Addr guest_IP )
 {
    UInt ecu;
    ExeContext* ec
-      = VG_(make_depth_1_ExeContext_from_Addr)( (Addr)guest_IP );
+      = VG_(make_depth_1_ExeContext_from_Addr)( guest_IP );
    vg_assert(ec);
    ecu = VG_(get_ECU_from_ExeContext)( ec );
    vg_assert(VG_(is_plausible_ECU)(ecu));
@@ -280,7 +280,7 @@
 
    /* Set up stuff for tracking the guest IP */
    Bool   curr_IP_known = False;
-   Addr64 curr_IP       = 0;
+   Addr   curr_IP       = 0;
 
    /* Set up BB */
    IRSB* bb     = emptyIRSB();
diff --git a/exp-bbv/bbv_main.c b/exp-bbv/bbv_main.c
index 82ac7ea..d7008c1 100644
--- a/exp-bbv/bbv_main.c
+++ b/exp-bbv/bbv_main.c
@@ -257,7 +257,7 @@
    /* Check if the instruction pointed to is one that needs */
    /*   special handling.  If so, set a bit in the return   */
    /*   value indicating what type.                         */
-static Int get_inst_type(Int len, Addr addr)
+static Int get_inst_type(UInt len, Addr addr)
 {
    int result=0;
 
@@ -342,7 +342,7 @@
    IRSB     *sbOut;
    IRStmt   *st;
    struct BB_info  *bbInfo;
-   Addr64   origAddr,ourAddr;
+   Addr     origAddr,ourAddr;
    IRDirty  *di;
    IRExpr   **argv, *arg1;
    Int      regparms,opcode_type;
diff --git a/exp-sgcheck/h_main.c b/exp-sgcheck/h_main.c
index ed1ac1d..fc2650d 100644
--- a/exp-sgcheck/h_main.c
+++ b/exp-sgcheck/h_main.c
@@ -628,7 +628,7 @@
    tl_assert(sizeof(Addr)   == sizeof(void*));
    tl_assert(sizeof(ULong)  == 8);
    tl_assert(sizeof(Long)   == 8);
-   tl_assert(sizeof(Addr64) == 8);
+   tl_assert(sizeof(Addr)   == sizeof(void*));
    tl_assert(sizeof(UInt)   == 4);
    tl_assert(sizeof(Int)    == 4);
 
diff --git a/exp-sgcheck/sg_main.c b/exp-sgcheck/sg_main.c
index f6f5fc4..22c1000 100644
--- a/exp-sgcheck/sg_main.c
+++ b/exp-sgcheck/sg_main.c
@@ -2063,7 +2063,7 @@
 
 struct _SGEnv {
    /* the current insn's IP */
-   Addr64 curr_IP;
+   Addr curr_IP;
    /* whether the above is actually known */
    Bool curr_IP_known;
    /* if we find a mem ref, is it the first for this insn?  Used for
@@ -2224,7 +2224,7 @@
 
       case Ist_IMark:
          env->curr_IP_known = True;
-         env->curr_IP       = (Addr)st->Ist.IMark.addr;
+         env->curr_IP       = st->Ist.IMark.addr;
          env->firstRef      = True;
          break;
 
diff --git a/helgrind/hg_main.c b/helgrind/hg_main.c
index 3f13074..f9917ea 100644
--- a/helgrind/hg_main.c
+++ b/helgrind/hg_main.c
@@ -4445,13 +4445,13 @@
 /* Figure out if GA is a guest code address in the dynamic linker, and
    if so return True.  Otherwise (and in case of any doubt) return
    False.  (sidedly safe w/ False as the safe value) */
-static Bool is_in_dynamic_linker_shared_object( Addr64 ga )
+static Bool is_in_dynamic_linker_shared_object( Addr ga )
 {
    DebugInfo* dinfo;
    const HChar* soname;
    if (0) return False;
 
-   dinfo = VG_(find_DebugInfo)( (Addr)ga );
+   dinfo = VG_(find_DebugInfo)( ga );
    if (!dinfo) return False;
 
    soname = VG_(DebugInfo_get_soname)(dinfo);
@@ -4485,10 +4485,10 @@
 {
    Int     i;
    IRSB*   bbOut;
-   Addr64  cia; /* address of current insn */
+   Addr    cia; /* address of current insn */
    IRStmt* st;
    Bool    inLDSO = False;
-   Addr64  inLDSOmask4K = 1; /* mismatches on first check */
+   Addr    inLDSOmask4K = 1; /* mismatches on first check */
 
    const Int goff_sp = layout->offset_SP;
 
@@ -4546,12 +4546,12 @@
                Avoid flooding is_in_dynamic_linker_shared_object with
                requests by only checking at transitions between 4K
                pages. */
-            if ((cia & ~(Addr64)0xFFF) != inLDSOmask4K) {
-               if (0) VG_(printf)("NEW %#lx\n", (Addr)cia);
-               inLDSOmask4K = cia & ~(Addr64)0xFFF;
+            if ((cia & ~(Addr)0xFFF) != inLDSOmask4K) {
+               if (0) VG_(printf)("NEW %#lx\n", cia);
+               inLDSOmask4K = cia & ~(Addr)0xFFF;
                inLDSO = is_in_dynamic_linker_shared_object(cia);
             } else {
-               if (0) VG_(printf)("old %#lx\n", (Addr)cia);
+               if (0) VG_(printf)("old %#lx\n", cia);
             }
             break;
 
diff --git a/memcheck/mc_translate.c b/memcheck/mc_translate.c
index e4516c7..31249f1 100644
--- a/memcheck/mc_translate.c
+++ b/memcheck/mc_translate.c
@@ -6221,7 +6221,6 @@
    tl_assert(sizeof(Addr)   == sizeof(void*));
    tl_assert(sizeof(ULong)  == 8);
    tl_assert(sizeof(Long)   == 8);
-   tl_assert(sizeof(Addr64) == 8);
    tl_assert(sizeof(UInt)   == 4);
    tl_assert(sizeof(Int)    == 4);