tree 0c3bfb2ebe8ac88f69367ac98b5095b11a459aaa
parent f5530ec9316238e1536ac0abc26781e62e2bb13a
author dejanj <dejanj@8f6e269a-dfd6-0310-a8e1-e2731360e62c> 1382431966 +0000
committer dejanj <dejanj@8f6e269a-dfd6-0310-a8e1-e2731360e62c> 1382431966 +0000

mips32: Fixed the problem with FCSR register.

Until now, Valgrind has read two registers to calculate FCSR
value. From now on, Valgrind reads exact number of fpu
registers (one or two).


git-svn-id: svn://svn.valgrind.org/vex/trunk@2794 8f6e269a-dfd6-0310-a8e1-e2731360e62c