| commit | a445f1bbe9763e289e1004055b21a9ac6e005bd9 | [log] [tgz] |
|---|---|---|
| author | dejanj <dejanj@8f6e269a-dfd6-0310-a8e1-e2731360e62c> | Tue Oct 22 08:52:46 2013 +0000 |
| committer | dejanj <dejanj@8f6e269a-dfd6-0310-a8e1-e2731360e62c> | Tue Oct 22 08:52:46 2013 +0000 |
| tree | 0c3bfb2ebe8ac88f69367ac98b5095b11a459aaa | |
| parent | f5530ec9316238e1536ac0abc26781e62e2bb13a [diff] |
mips32: Fixed the problem with FCSR register. Until now, Valgrind has read two registers to calculate FCSR value. From now on, Valgrind reads exact number of fpu registers (one or two). git-svn-id: svn://svn.valgrind.org/vex/trunk@2794 8f6e269a-dfd6-0310-a8e1-e2731360e62c