tree 7c681cf993ba5b571691527565628a9b9a6ada77
parent dc9259cd72f56d4fc21c6eced42a1d74fb9f7f5e
author dejanj <dejanj@8f6e269a-dfd6-0310-a8e1-e2731360e62c> 1393510639 +0000
committer dejanj <dejanj@8f6e269a-dfd6-0310-a8e1-e2731360e62c> 1393510639 +0000

mips32: Fpu guest registers are ULong and the initial values need to be
extended.

Because we are supporting both big and little endian mips32 we need to
make sure that the initial values for the fpu registers are the same for both
endian.


git-svn-id: svn://svn.valgrind.org/vex/trunk@2827 8f6e269a-dfd6-0310-a8e1-e2731360e62c