Implement SIMD (de)interleaving loads/stores:
  LD1/ST1 (multiple 1-elem structs to/from 1 reg
  LD2/ST2 (multiple 2-elem structs to/from 2 regs
  LD3/ST3 (multiple 3-elem structs to/from 3 regs
  LD4/ST4 (multiple 4-elem structs to/from 4 regs
Also:
  LDNP, STNP  (load/store vector pair, non-temporal)



git-svn-id: svn://svn.valgrind.org/vex/trunk@2976 8f6e269a-dfd6-0310-a8e1-e2731360e62c
3 files changed