commit 147865ccf6e5711cd910f2b1532da59ad1d78bb9
author sewardj <sewardj@a5019735-40e9-0310-863c-91ae7b9d1cf9> Tue Aug 26 17:30:07 2014 +0000
committer sewardj <sewardj@a5019735-40e9-0310-863c-91ae7b9d1cf9> Tue Aug 26 17:30:07 2014 +0000
tree 874658eb7a6f10fe886403aabe4c457ca4751f66
parent 6f30631aacfa11891147ae26bf0506b771eb5784

Iop_Rol64x2 was handled as if it were a 32x4 case.  This moves
it to the right place.


git-svn-id: svn://svn.valgrind.org/valgrind/trunk@14361 a5019735-40e9-0310-863c-91ae7b9d1cf9

memcheck/mc_translate.c

diff --git a/memcheck/mc_translate.c b/memcheck/mc_translate.c
index e7ad3a1..073cff0 100644
--- a/memcheck/mc_translate.c
+++ b/memcheck/mc_translate.c
@@ -3148,7 +3148,6 @@
       case Iop_Sar32x4:
       case Iop_Sal32x4:
       case Iop_Rol32x4:
-      case Iop_Rol64x2:
          return mkUifUV128(mce,
                    assignNew('V', mce, Ity_V128, binop(op, vatom1, atom2)),
                    mkPCast32x4(mce,vatom2)
@@ -3158,6 +3157,7 @@
       case Iop_Shr64x2:
       case Iop_Sar64x2:
       case Iop_Sal64x2:
+      case Iop_Rol64x2:
          return mkUifUV128(mce,
                    assignNew('V', mce, Ity_V128, binop(op, vatom1, atom2)),
                    mkPCast64x2(mce,vatom2)