| commit | dce7663c19dd793697570fc60a01aa2159448bf7 | [log] [tgz] |
|---|---|---|
| author | George Karpenkov <cheshire@google.com> | Wed Sep 11 13:19:29 2019 -0700 |
| committer | TensorFlower Gardener <gardener@tensorflow.org> | Wed Sep 11 13:37:04 2019 -0700 |
| tree | 20293c053d5c08c0dd197939bc93cc73269a8dd9 | |
| parent | a3354d8e44704b890bebc4b556e5f95580b1ac53 [diff] |
[XLA] Reverse the order in which buffers are considered for assignment. Buffer which outlives the computation is always considered first; given that, makes more sense to consider buffers in the reverse order, so that they are processed contiguously. This change lets the input program consisting of 6+ convolutions (even number) fit into three buffers instead of four. To elaborate on the example, we use a table showing the buffer assignment for the program above (the table only shows the output buffer, the input buffer is implicitly the output buffer of the previous instruction). Previously ========== Buffer assignment starts by assigning a separate buffer to the input and output parameters: param | B0 conv0 | conv1 | conv2 | conv3 | conv4 | conv5 | B1 Next, values are processed in post-order (top-down in this example), and values which fit into existing buffers are assigned: param | B0 conv0 | B1 conv1 | conv2 | B1 conv3 | conv4 | conv5 | B1 Note that live range interference does not let us assign buffers to conv1, conv3 or conv4 yet. Next, heap simulator runs, and it gets to assign input buffers to conv1, conv3 and conv4, resulting in: param | B0 conv0 | B1 conv1 | B2 conv2 | B1 conv3 | B3 conv4 | B2 conv5 | B1 Again, two buffers are necessary due to interference between conv3 and conv4. After this change ================= We again start with: param | B0 conv0 | conv1 | conv2 | conv3 | conv4 | conv5 | B1 But now we process buffers in the reverse order, yielding: param | B0 conv0 | conv1 | B1 conv2 | conv3 | B1 conv4 | conv5 | B1 And after the heap simulator run: param | B0 conv0 | B2 conv1 | B1 conv2 | B2 conv3 | B1 conv4 | B2 conv5 | B1 Resulting in three buffers instead of two. PiperOrigin-RevId: 268527168
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