Rename to underlying type rather than alias
Towards removing typedef. This changes from typedef to typedef'd type. This
doesn't cover all cases.
PiperOrigin-RevId: 385701626
Change-Id: I2987d233cfec6d75f725c338128ea7a76701fc1e
diff --git a/tensorflow/compiler/tf2xla/kernels/all_reduce_op.cc b/tensorflow/compiler/tf2xla/kernels/all_reduce_op.cc
index d85189c..0735e62 100644
--- a/tensorflow/compiler/tf2xla/kernels/all_reduce_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/all_reduce_op.cc
@@ -36,7 +36,7 @@
}
void Compile(XlaOpKernelContext* ctx) override {
- int64 group_key, group_size;
+ int64_t group_key, group_size;
OP_REQUIRES_OK(ctx, ctx->ConstantInputAsIntScalar("group_key", &group_key));
OP_REQUIRES_OK(ctx,
ctx->ConstantInputAsIntScalar("group_size", &group_size));
diff --git a/tensorflow/compiler/tf2xla/kernels/batchtospace_op.cc b/tensorflow/compiler/tf2xla/kernels/batchtospace_op.cc
index 6b675fa..596b0c7 100644
--- a/tensorflow/compiler/tf2xla/kernels/batchtospace_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/batchtospace_op.cc
@@ -46,10 +46,10 @@
", 2] instead of ",
xla::ShapeUtil::HumanString(crops.shape())));
- const int64 batch_size = input_shape[0];
+ const int64_t batch_size = input_shape[0];
// Compute the product of the block_shape values.
- int64 block_num_elems = 1;
+ int64_t block_num_elems = 1;
for (int i = 0; i < block_rank; ++i) {
block_num_elems *= block_shape[i];
}
@@ -126,8 +126,8 @@
std::vector<int64> end_indices = reshaped_permuted_shape;
std::vector<int64> strides(input_rank, 1);
for (int i = 0; i < block_rank; ++i) {
- int64 crop_start = crops.Get<int64>({i, 0});
- int64 crop_end = crops.Get<int64>({i, 1});
+ int64_t crop_start = crops.Get<int64>({i, 0});
+ int64_t crop_end = crops.Get<int64>({i, 1});
OP_REQUIRES(ctx, crop_start >= 0 && crop_end >= 0,
errors::InvalidArgument("Crops must be non-negative"));
start_indices[1 + i] = crop_start;
diff --git a/tensorflow/compiler/tf2xla/kernels/bcast_ops.cc b/tensorflow/compiler/tf2xla/kernels/bcast_ops.cc
index c022284..aaa6350 100644
--- a/tensorflow/compiler/tf2xla/kernels/bcast_ops.cc
+++ b/tensorflow/compiler/tf2xla/kernels/bcast_ops.cc
@@ -55,9 +55,9 @@
"Incompatible shapes: [", absl::StrJoin(shapes[0], ","),
"] vs. [", absl::StrJoin(shapes[1], ","), "]"));
- const int64 len = bcast.output_shape().size();
+ const int64_t len = bcast.output_shape().size();
Tensor output(DT_INT32, TensorShape({len}));
- for (int64 i = 0; i < len; ++i) {
+ for (int64_t i = 0; i < len; ++i) {
output.flat<int32>()(i) = static_cast<int32>(bcast.output_shape()[i]);
}
ctx->SetConstantOutput(0, output);
@@ -110,9 +110,9 @@
private:
void Output(XlaOpKernelContext* ctx, int idx, const BCast::Vec& v) {
- const int64 len = v.size();
+ const int64_t len = v.size();
Tensor constant(DT_INT32, TensorShape({len}));
- for (int64 i = 0; i < len; ++i) {
+ for (int64_t i = 0; i < len; ++i) {
constant.flat<int32>()(i) = static_cast<int32>(v[i]);
}
ctx->SetConstantOutput(idx, constant);
diff --git a/tensorflow/compiler/tf2xla/kernels/broadcast_to_op.cc b/tensorflow/compiler/tf2xla/kernels/broadcast_to_op.cc
index 807c061..f872361 100644
--- a/tensorflow/compiler/tf2xla/kernels/broadcast_to_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/broadcast_to_op.cc
@@ -38,7 +38,7 @@
std::vector<bool> dynamic_dims;
OP_REQUIRES_OK(
context, context->ResolveInputDynamismIntoPredVector(1, &dynamic_dims));
- for (int64 dim = 0; dim < dynamic_dims.size(); ++dim) {
+ for (int64_t dim = 0; dim < dynamic_dims.size(); ++dim) {
if (dynamic_dims[dim]) {
output = xla::SetDimensionSize(
output,
diff --git a/tensorflow/compiler/tf2xla/kernels/cast_op.cc b/tensorflow/compiler/tf2xla/kernels/cast_op.cc
index d0b60d9..2865315 100644
--- a/tensorflow/compiler/tf2xla/kernels/cast_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/cast_op.cc
@@ -75,7 +75,7 @@
// Bitcast to same-width integer, mask off the LSBs, bitcast back to the
// source datatype.
- int64 mask = ~((1L << mantissa_difference) - 1);
+ int64_t mask = ~((1L << mantissa_difference) - 1);
xla::PrimitiveType same_width_int =
xla::primitive_util::UnsignedIntegralTypeForBitWidth(src_bitwidth);
OP_REQUIRES(ctx, same_width_int != xla::PRIMITIVE_TYPE_INVALID,
diff --git a/tensorflow/compiler/tf2xla/kernels/categorical_op.cc b/tensorflow/compiler/tf2xla/kernels/categorical_op.cc
index dc2a270..2c18dd2 100644
--- a/tensorflow/compiler/tf2xla/kernels/categorical_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/categorical_op.cc
@@ -44,7 +44,7 @@
// Get the logits
const xla::XlaOp& logits = ctx->Input(0);
TensorShape logits_shape = ctx->InputShape(0);
- int64 num_samples;
+ int64_t num_samples;
OP_REQUIRES_OK(ctx, ctx->ConstantInputAsIntScalar(1, &num_samples));
OP_REQUIRES(ctx, TensorShapeUtils::IsMatrix(logits_shape),
errors::InvalidArgument("logits should be a matrix, got shape ",
@@ -54,15 +54,15 @@
"num_samples should be nonnegative, got ", num_samples));
for (int i = 0; i < 2; i++) {
- const int64 dim = logits_shape.dim_size(i);
+ const int64_t dim = logits_shape.dim_size(i);
OP_REQUIRES(
ctx, static_cast<int>(dim) == dim,
errors::InvalidArgument("logits.shape = ", logits_shape.DebugString(),
" too large for int"));
}
- const int64 batch_size = logits_shape.dim_size(0);
- const int64 num_classes = logits_shape.dim_size(1);
+ const int64_t batch_size = logits_shape.dim_size(0);
+ const int64_t num_classes = logits_shape.dim_size(1);
xla::Shape uniform_shape;
int class_dimension;
diff --git a/tensorflow/compiler/tf2xla/kernels/concat_op.cc b/tensorflow/compiler/tf2xla/kernels/concat_op.cc
index d0f24b5..484f568 100644
--- a/tensorflow/compiler/tf2xla/kernels/concat_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/concat_op.cc
@@ -49,7 +49,7 @@
errors::InvalidArgument(
"Concat dim tensor should be a scalar, but got shape ",
concat_dim_tensor_shape.DebugString()));
- int64 concat_dim;
+ int64_t concat_dim;
OP_REQUIRES_OK(ctx,
ctx->ConstantInputAsIntScalar(axis_index_, &concat_dim));
@@ -156,9 +156,9 @@
const TensorShape inp0_shape = ctx->InputShape(1);
std::vector<int64> inp0_dims;
OP_REQUIRES_OK(ctx, ctx->ConstantInputAsIntVector(1, &inp0_dims));
- const int64 inp0_rank = inp0_shape.num_elements();
+ const int64_t inp0_rank = inp0_shape.num_elements();
- int64 cdim;
+ int64_t cdim;
OP_REQUIRES_OK(ctx, ctx->ConstantInputAsIntScalar(0, &cdim));
VLOG(1) << "ConcatOffset " << cdim << "," << inp0_rank;
@@ -178,7 +178,7 @@
Tensor out_constant(DT_INT32, TensorShape({inp0_rank}));
auto out_vec = out_constant.vec<int32>();
- for (int64 j = 0; j < inp0_rank; ++j) {
+ for (int64_t j = 0; j < inp0_rank; ++j) {
if (j == axis) {
out_vec(j) = offset;
offset += inp_dims[j];
diff --git a/tensorflow/compiler/tf2xla/kernels/conv_op_helpers.cc b/tensorflow/compiler/tf2xla/kernels/conv_op_helpers.cc
index 3ac9400..ef4bf76 100644
--- a/tensorflow/compiler/tf2xla/kernels/conv_op_helpers.cc
+++ b/tensorflow/compiler/tf2xla/kernels/conv_op_helpers.cc
@@ -47,10 +47,10 @@
// If `shape` is [H, W, ..., M, N] returns [H, W, ..., 1, M*N].
xla::Shape GroupedFilterShapeForDepthwiseConvolution(
const xla::Shape& filter_shape) {
- int64 input_feature_dim = filter_shape.dimensions_size() - 2;
- int64 output_feature_dim = filter_shape.dimensions_size() - 1;
- int64 depthwise_multiplier = filter_shape.dimensions(output_feature_dim);
- int64 input_feature = filter_shape.dimensions(input_feature_dim);
+ int64_t input_feature_dim = filter_shape.dimensions_size() - 2;
+ int64_t output_feature_dim = filter_shape.dimensions_size() - 1;
+ int64_t depthwise_multiplier = filter_shape.dimensions(output_feature_dim);
+ int64_t input_feature = filter_shape.dimensions(input_feature_dim);
// Create a [H, W, ..., 1, M*N] reshape of the filter.
xla::Shape grouped_filter_shape = filter_shape;
@@ -62,7 +62,7 @@
// Returns the transposed filter for use in BackpropInput of group convolution.
xla::XlaOp TransposeFilterForGroupConvolutionBackpropInput(
- xla::XlaOp filter, const xla::Shape& filter_shape, int64 num_groups,
+ xla::XlaOp filter, const xla::Shape& filter_shape, int64_t num_groups,
int num_spatial_dims) {
// 1. Reshape from [H, W, ..., filter_in_depth, out_depth] to [H, W, ...,
// filter_in_depth, G, out_depth / G]
@@ -209,9 +209,9 @@
int batch_dim = GetTensorBatchDimIndex(num_dims, attrs.data_format);
int feature_dim = GetTensorFeatureDimIndex(num_dims, attrs.data_format);
- int64 filter_in_depth = filter_shape.dimensions(attrs.num_spatial_dims),
- out_depth = filter_shape.dimensions(attrs.num_spatial_dims + 1),
- in_depth = input_shape.dimensions(feature_dim);
+ int64_t filter_in_depth = filter_shape.dimensions(attrs.num_spatial_dims),
+ out_depth = filter_shape.dimensions(attrs.num_spatial_dims + 1),
+ in_depth = input_shape.dimensions(feature_dim);
// The 'C' dimension for input is in_depth.
// It must be a multiple of the filter's in_depth.
if (in_depth % filter_in_depth != 0) {
@@ -219,7 +219,7 @@
"Depth of input must be a multiple of depth of filter: ", in_depth,
" vs ", filter_in_depth);
}
- int64 feature_group_count = in_depth / filter_in_depth;
+ int64_t feature_group_count = in_depth / filter_in_depth;
if (out_depth % feature_group_count != 0) {
return errors::InvalidArgument(
"Depth of output must be a multiple of the number of groups: ",
@@ -244,7 +244,8 @@
dims.set_kernel_output_feature_dimension(attrs.num_spatial_dims + 1);
xla::PaddingType padding_type = xla::PaddingType::PADDING_INVALID;
for (int i = 0; i < attrs.num_spatial_dims; ++i) {
- const int64 dim = GetTensorSpatialDimIndex(num_dims, attrs.data_format, i);
+ const int64_t dim =
+ GetTensorSpatialDimIndex(num_dims, attrs.data_format, i);
if (input_shape.is_dynamic_dimension(dim)) {
TF_RET_CHECK(attrs.padding == VALID || attrs.padding == SAME)
<< "Dynamic convolution only supports valid and same padding";
@@ -266,7 +267,7 @@
attrs.explicit_paddings.at(dim * 2 + 1)};
}
- int64 unused_output_size;
+ int64_t unused_output_size;
TF_RETURN_IF_ERROR(GetWindowedOutputSizeVerboseV2(
input_shape.dimensions(dim), filter_shape.dimensions(i),
rhs_dilation[i], window_strides[i], attrs.padding, &unused_output_size,
@@ -304,10 +305,10 @@
TF_ASSIGN_OR_RETURN(xla::Shape out_backprop_shape,
builder->GetShape(out_backprop));
- int64 in_depth = input_shape.dimensions(feature_dim),
- filter_in_depth = filter_shape.dimensions(attrs.num_spatial_dims),
- feature_group_count =
- attrs.depthwise ? filter_in_depth : in_depth / filter_in_depth;
+ int64_t in_depth = input_shape.dimensions(feature_dim),
+ filter_in_depth = filter_shape.dimensions(attrs.num_spatial_dims),
+ feature_group_count =
+ attrs.depthwise ? filter_in_depth : in_depth / filter_in_depth;
xla::Shape grouped_filter_shape =
attrs.depthwise ? GroupedFilterShapeForDepthwiseConvolution(filter_shape)
@@ -341,7 +342,7 @@
std::vector<int64> ones(attrs.num_spatial_dims, 1);
xla::PaddingType padding_type = xla::PaddingType::PADDING_INVALID;
for (int i = 0; i < attrs.num_spatial_dims; ++i) {
- int64 dim = GetTensorSpatialDimIndex(num_dims, attrs.data_format, i);
+ int64_t dim = GetTensorSpatialDimIndex(num_dims, attrs.data_format, i);
if (out_backprop_shape.is_dynamic_dimension(dim)) {
TF_RET_CHECK(attrs.padding == VALID || attrs.padding == SAME)
<< "Dynamic convolution only supports valid and same padding";
@@ -428,10 +429,10 @@
int num_dims = attrs.num_spatial_dims + 2;
int n_dim = GetTensorBatchDimIndex(num_dims, attrs.data_format);
int c_dim = GetTensorFeatureDimIndex(num_dims, attrs.data_format);
- int64 in_depth = input_shape.dimensions(c_dim),
- filter_in_depth = filter_shape.dimensions(attrs.num_spatial_dims),
- batch_group_count =
- attrs.depthwise ? filter_in_depth : in_depth / filter_in_depth;
+ int64_t in_depth = input_shape.dimensions(c_dim),
+ filter_in_depth = filter_shape.dimensions(attrs.num_spatial_dims),
+ batch_group_count =
+ attrs.depthwise ? filter_in_depth : in_depth / filter_in_depth;
std::vector<std::pair<int64, int64>> padding(attrs.num_spatial_dims);
std::vector<int64> rhs_dilation(attrs.num_spatial_dims);
@@ -456,8 +457,8 @@
dnums.add_output_spatial_dimensions(i);
}
xla::PaddingType padding_type = xla::PaddingType::PADDING_INVALID;
- for (int64 i = 0; i < attrs.num_spatial_dims; ++i) {
- int64 dim = GetTensorSpatialDimIndex(num_dims, attrs.data_format, i);
+ for (int64_t i = 0; i < attrs.num_spatial_dims; ++i) {
+ int64_t dim = GetTensorSpatialDimIndex(num_dims, attrs.data_format, i);
if (activations_shape.is_dynamic_dimension(dim)) {
TF_RET_CHECK(attrs.padding == VALID || attrs.padding == SAME)
<< "Dynamic convolution only supports valid and same padding";
@@ -478,7 +479,7 @@
// The padded_in_rows should be such that when we convolve this with the
// expanded_out_rows as a filter, we should get filter_rows back.
- const int64 padded_in_size =
+ const int64_t padded_in_size =
dims.spatial_dims[i].expanded_output_size +
(dims.spatial_dims[i].filter_size - 1) * attrs.dilations[dim];
@@ -496,7 +497,7 @@
// and input "C" is not used at all.
//
// We apply negative padding in this case.
- const int64 pad_total = padded_in_size - dims.spatial_dims[i].input_size;
+ const int64_t pad_total = padded_in_size - dims.spatial_dims[i].input_size;
// + For the EXPLICIT padding, we pad the top/left side with the explicit
// padding and pad the bottom/right side with the remaining space.
@@ -508,11 +509,10 @@
// In addition, if the padded input size is smaller than the input size,
// we need to ignore some training elements of the input. We do this by
// applying negative padding on the right/bottom.
- const int64 pad_before = attrs.padding == Padding::EXPLICIT
- ? attrs.explicit_paddings[2 * dim]
- : attrs.padding == Padding::SAME
- ? std::max<int64>(pad_total / 2, 0)
- : 0;
+ const int64_t pad_before =
+ attrs.padding == Padding::EXPLICIT ? attrs.explicit_paddings[2 * dim]
+ : attrs.padding == Padding::SAME ? std::max<int64>(pad_total / 2, 0)
+ : 0;
padding[i] = {pad_before, pad_total - pad_before};
}
diff --git a/tensorflow/compiler/tf2xla/kernels/cwise_ops.cc b/tensorflow/compiler/tf2xla/kernels/cwise_ops.cc
index 0de5939..2d6f75d 100644
--- a/tensorflow/compiler/tf2xla/kernels/cwise_ops.cc
+++ b/tensorflow/compiler/tf2xla/kernels/cwise_ops.cc
@@ -48,7 +48,7 @@
// Find out mismatched dimensions that are non-broadcastable.
// Reconcile the
// difference by slicing the bigger dimension.
- for (int64 i = 0; i < lhs_xla_shape.rank(); ++i) {
+ for (int64_t i = 0; i < lhs_xla_shape.rank(); ++i) {
if (lhs_xla_shape.is_dynamic_dimension(i)) {
if (!rhs_xla_shape.is_dynamic_dimension(i) &&
lhs_xla_shape.dimensions(i) > rhs_xla_shape.dimensions(i) &&
@@ -79,7 +79,7 @@
// Note that we can't slice N into M because M could be a
// dynamic size 1 dim that's meant to be broadcasted to N.
auto size = xla::GetDimensionSize(op, i);
- int64 diff =
+ int64_t diff =
rhs_xla_shape.dimensions(i) - lhs_xla_shape.dimensions(i);
op = xla::PadInDim(
op, xla::Zero(ctx->builder(), lhs_xla_shape.element_type()),
diff --git a/tensorflow/compiler/tf2xla/kernels/depthtospace_op.cc b/tensorflow/compiler/tf2xla/kernels/depthtospace_op.cc
index df8bee7..241bfbe 100644
--- a/tensorflow/compiler/tf2xla/kernels/depthtospace_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/depthtospace_op.cc
@@ -80,7 +80,7 @@
for (int i = 0; i < num_spatial_dims; ++i) {
reshaped_shape.push_back(input_shape[1 + i]);
}
- int64 block_elems = 1;
+ int64_t block_elems = 1;
for (int i = 0; i < num_spatial_dims; ++i) {
reshaped_shape.push_back(block_size_);
block_elems *= block_size_;
@@ -102,7 +102,7 @@
} else {
// NCHW format.
reshaped_shape.push_back(input_shape[0]);
- int64 block_elems = 1;
+ int64_t block_elems = 1;
for (int i = 0; i < num_spatial_dims; ++i) {
reshaped_shape.push_back(block_size_);
block_elems *= block_size_;
diff --git a/tensorflow/compiler/tf2xla/kernels/diag_op.cc b/tensorflow/compiler/tf2xla/kernels/diag_op.cc
index b0ff7c6..f6c7988 100644
--- a/tensorflow/compiler/tf2xla/kernels/diag_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/diag_op.cc
@@ -31,7 +31,7 @@
namespace {
// Create a diagonal / batch diagonal matrix with 'input' on the diagonal.
-xla::XlaOp CreateDiagonal(xla::XlaOp input, int64 last_dim_size,
+xla::XlaOp CreateDiagonal(xla::XlaOp input, int64_t last_dim_size,
absl::Span<const int64> other_dims) {
xla::XlaBuilder* builder = input.builder();
// Create two matrices that have the following forms, and compare them:
@@ -96,7 +96,7 @@
// [0, 0, 0, 4]]
// Flattens the input to 1D.
- int64 size = input_shape.num_elements();
+ int64_t size = input_shape.num_elements();
input = xla::Reshape(input, {size});
// Create an R2 with the R1 diagonal.
diff --git a/tensorflow/compiler/tf2xla/kernels/dynamic_partition_op.cc b/tensorflow/compiler/tf2xla/kernels/dynamic_partition_op.cc
index 9910b8e..f99c18a 100644
--- a/tensorflow/compiler/tf2xla/kernels/dynamic_partition_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/dynamic_partition_op.cc
@@ -47,7 +47,8 @@
// Returns a S32 tensor representing how many items in `input` are equal to
// `target`
- xla::XlaOp CountS32(XlaOpKernelContext* ctx, xla::XlaOp input, int64 target) {
+ xla::XlaOp CountS32(XlaOpKernelContext* ctx, xla::XlaOp input,
+ int64_t target) {
xla::XlaOp equal_dim =
xla::Compare(input, xla::ConstantR0<int32>(ctx->builder(), target), {},
xla::ComparisonDirection::kEq);
@@ -61,7 +62,7 @@
DynamicPartition1D(XlaOpKernelContext* ctx, xla::XlaOp data_1d,
xla::XlaOp partitions_1d, const xla::Shape& data_1d_shape,
const xla::Shape& partition_1d_shape) {
- int64 input_count = data_1d_shape.dimensions(0);
+ int64_t input_count = data_1d_shape.dimensions(0);
std::vector<xla::XlaOp> to_sort = {partitions_1d, data_1d};
std::vector<xla::PrimitiveType> types_to_sort = {
partition_1d_shape.element_type(), data_1d_shape.element_type()};
@@ -77,7 +78,7 @@
// `partition_start[i]` is sum(partition_start[0:i])
std::vector<xla::XlaOp> partition_start(num_partitions_);
xla::XlaOp count_so_far = xla::Zero(ctx->builder(), xla::S32);
- for (int64 i = 0; i < num_partitions_; ++i) {
+ for (int64_t i = 0; i < num_partitions_; ++i) {
xla::XlaOp count = CountS32(ctx, sorted_partitions, /*target=*/i);
partition_length[i] = count;
partition_start[i] = count_so_far;
@@ -95,7 +96,7 @@
xla::Pad(sorted_data, xla::Zero(ctx->builder(), ctx->input_xla_type(0)),
padding_config);
std::vector<xla::XlaOp> output(num_partitions_);
- for (int64 i = 0; i < num_partitions_; ++i) {
+ for (int64_t i = 0; i < num_partitions_; ++i) {
// Dynamic size will be set later after this function.
padded_data = xla::RemoveDynamicDimension(padded_data, 0);
// Slice full size out of the input starting from the offsets.
@@ -130,7 +131,7 @@
if (data_shape.rank() > partition_shape.rank()) {
// Broadcast parititon_shape so that it can be the same as data_shape.
std::vector<int64> broadcasted_dims;
- for (int64 i = 0; i < partition_shape.rank(); ++i) {
+ for (int64_t i = 0; i < partition_shape.rank(); ++i) {
broadcasted_dims.push_back(i);
}
partitions = xla::BroadcastInDim(partitions, data_shape.dimensions(),
@@ -144,13 +145,13 @@
std::vector<int64> output_shape_bound_dims;
output_shape_bound_dims.push_back(
xla::ShapeUtil::ElementsIn(partition_shape));
- int64 count_diff = 1;
- for (int64 i = partition_shape.rank(); i < data_shape.rank(); ++i) {
+ int64_t count_diff = 1;
+ for (int64_t i = partition_shape.rank(); i < data_shape.rank(); ++i) {
output_shape_bound_dims.push_back(data_shape.dimensions(i));
count_diff *= data_shape.dimensions(i);
}
- int64 input_count = xla::ShapeUtil::ElementsIn(data_shape);
+ int64_t input_count = xla::ShapeUtil::ElementsIn(data_shape);
auto data_1d = xla::Reshape(data, {input_count});
auto partitions_1d = xla::Reshape(partitions, {input_count});
xla::Shape data_1d_shape =
@@ -162,10 +163,10 @@
std::vector<xla::XlaOp> output, partition_length;
std::tie(output, partition_length) = DynamicPartition1D(
ctx, data_1d, partitions_1d, data_1d_shape, partitions_1d_shape);
- for (int64 i = 0; i < num_partitions_; ++i) {
+ for (int64_t i = 0; i < num_partitions_; ++i) {
auto reshape = xla::Reshape(output[i], output_shape_bound_dims);
if (partitions_are_static) {
- int64 size = absl::c_count(partitions_static, i);
+ int64_t size = absl::c_count(partitions_static, i);
ctx->SetOutput(i, xla::SliceInDim(reshape, 0, size, 1, 0));
} else {
xla::XlaOp length;
diff --git a/tensorflow/compiler/tf2xla/kernels/dynamic_slice_ops.cc b/tensorflow/compiler/tf2xla/kernels/dynamic_slice_ops.cc
index 5dbc083..87ea0b1 100644
--- a/tensorflow/compiler/tf2xla/kernels/dynamic_slice_ops.cc
+++ b/tensorflow/compiler/tf2xla/kernels/dynamic_slice_ops.cc
@@ -28,7 +28,7 @@
namespace tensorflow {
namespace {
-absl::InlinedVector<xla::XlaOp, 4> SliceVector(xla::XlaOp input, int64 rank) {
+absl::InlinedVector<xla::XlaOp, 4> SliceVector(xla::XlaOp input, int64_t rank) {
absl::InlinedVector<xla::XlaOp, 4> scalar_indices;
scalar_indices.reserve(rank);
for (int i = 0; i < rank; i++)
@@ -50,7 +50,7 @@
const TensorShape update_shape = ctx->InputShape("update");
const TensorShape index_shape = ctx->InputShape("indices");
- int64 rank = input_shape.dims();
+ int64_t rank = input_shape.dims();
OP_REQUIRES(
ctx,
TensorShapeUtils::IsVector(index_shape) &&
@@ -87,7 +87,7 @@
const TensorShape start_indices_shape = ctx->InputShape("start_indices");
const TensorShape size_indices_shape = ctx->InputShape("size_indices");
- int64 rank = input_shape.dims();
+ int64_t rank = input_shape.dims();
OP_REQUIRES(ctx,
TensorShapeUtils::IsVector(start_indices_shape) &&
start_indices_shape.num_elements() == rank,
diff --git a/tensorflow/compiler/tf2xla/kernels/dynamic_stitch_op.cc b/tensorflow/compiler/tf2xla/kernels/dynamic_stitch_op.cc
index 65423c7..d8e5bbe 100644
--- a/tensorflow/compiler/tf2xla/kernels/dynamic_stitch_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/dynamic_stitch_op.cc
@@ -77,7 +77,7 @@
// This happens when data shape is a dynamic shape with bound with
// indices_shape is a concrete shape. We use slice to reconcile the
// mismatch.
- for (int64 i = 0; i < indices_shape.dims(); ++i) {
+ for (int64_t i = 0; i < indices_shape.dims(); ++i) {
data_shape.set_dim(i, indices_shape.dim_size(i));
data[input_num] = xla::SliceInDim(data[input_num], 0,
indices_shape.dim_size(i), 1, i);
@@ -123,7 +123,7 @@
}
}
int number_of_indices = max_index + 1;
- int64 result_rank = 1 + data0_shape.dims() - indices0_shape.dims();
+ int64_t result_rank = 1 + data0_shape.dims() - indices0_shape.dims();
if (number_of_indices == 0) {
std::vector<int64> result_shape(result_rank);
for (int d = indices0_shape.dims(); d < data0_shape.dims(); d++) {
diff --git a/tensorflow/compiler/tf2xla/kernels/extract_image_patches_op.cc b/tensorflow/compiler/tf2xla/kernels/extract_image_patches_op.cc
index 63e3f18..dcebfaa 100644
--- a/tensorflow/compiler/tf2xla/kernels/extract_image_patches_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/extract_image_patches_op.cc
@@ -99,13 +99,13 @@
ctx, input_shape.dims() == num_dims,
errors::InvalidArgument("input must be ", num_dims, "-dimensional",
input_shape.DebugString()));
- const int64 depth = input_shape.dim_size(feature_dim);
+ const int64_t depth = input_shape.dim_size(feature_dim);
xla::XlaBuilder* builder = ctx->builder();
// The following code is equivalent to:
// eye = np.eye(kH * kW * D).reshape([kH, kW, D, kH * kW * kD])
- int64 kernel_size = 1;
+ int64_t kernel_size = 1;
std::vector<int64> kernel_shape(num_dims, 1);
for (int i = 0; i < num_spatial_dims; ++i) {
int input_dim = GetTensorSpatialDimIndex(num_dims, data_format, i);
@@ -137,14 +137,14 @@
dims.set_kernel_output_feature_dimension(num_spatial_dims + 1);
for (int i = 0; i < num_spatial_dims; ++i) {
- const int64 dim = GetTensorSpatialDimIndex(num_dims, data_format, i);
+ const int64_t dim = GetTensorSpatialDimIndex(num_dims, data_format, i);
dims.add_input_spatial_dimensions(dim);
dims.add_kernel_spatial_dimensions(i);
dims.add_output_spatial_dimensions(dim);
window_strides[i] = strides_.at(dim);
rhs_dilation[i] = dilations_.at(dim);
- int64 unused_output_size;
+ int64_t unused_output_size;
OP_REQUIRES_OK(
ctx, GetWindowedOutputSizeVerboseV2(
input_shape.dim_size(dim), ksizes_[dim], rhs_dilation[i],
diff --git a/tensorflow/compiler/tf2xla/kernels/fill_op.cc b/tensorflow/compiler/tf2xla/kernels/fill_op.cc
index 5e489b1..7fff517 100644
--- a/tensorflow/compiler/tf2xla/kernels/fill_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/fill_op.cc
@@ -53,7 +53,7 @@
OP_REQUIRES_OK(ctx, ctx->ConstantInputAsIntVector("dims", &dynamic_dims));
auto output = xla::Broadcast(ctx->Input("value"), dims);
- for (int64 i = 0; i < dims.size(); ++i) {
+ for (int64_t i = 0; i < dims.size(); ++i) {
// If a dimension is dynamic, call set-dimension-size on the output.
if (dynamic_dims[i] == -1) {
auto dynamic_dim_size = xla::Slice(ctx->Input(0), {i}, {i + 1}, {1});
diff --git a/tensorflow/compiler/tf2xla/kernels/gather_op.cc b/tensorflow/compiler/tf2xla/kernels/gather_op.cc
index e8a3dab..5521255 100644
--- a/tensorflow/compiler/tf2xla/kernels/gather_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/gather_op.cc
@@ -34,7 +34,7 @@
Status XlaGather(const xla::XlaOp& input, const TensorShape& input_shape,
const xla::XlaOp& indices, const TensorShape& indices_shape,
- int64 axis, bool indices_are_nd, DataType dtype,
+ int64_t axis, bool indices_are_nd, DataType dtype,
DataType index_type, xla::XlaBuilder* builder,
xla::XlaOp* gather_output) {
// There is no deep reason why we need this precondition, but this is the only
@@ -49,17 +49,17 @@
//
// If the indices are N-dimensional, then the minor dimension of indices
// should be of size N and correspond to the N indices.
- int64 num_index_dims;
- int64 num_indices = 1;
+ int64_t num_index_dims;
+ int64_t num_indices = 1;
if (indices_are_nd) {
CHECK_GE(indices_shape.dims(), 1);
num_index_dims = indices_shape.dim_size(indices_shape.dims() - 1);
- for (int64 i = 0, e = indices_shape.dims() - 1; i < e; i++) {
+ for (int64_t i = 0, e = indices_shape.dims() - 1; i < e; i++) {
num_indices *= indices_shape.dim_size(i);
}
} else {
num_index_dims = 1;
- for (int64 i = 0, e = indices_shape.dims(); i < e; i++) {
+ for (int64_t i = 0, e = indices_shape.dims(); i < e; i++) {
num_indices *= indices_shape.dim_size(i);
}
}
@@ -86,7 +86,7 @@
return Status::OK();
}
- for (int64 i = 0; i < num_index_dims; ++i) {
+ for (int64_t i = 0; i < num_index_dims; ++i) {
if (input_shape.dim_size(axis + i) == 0) {
return errors::InvalidArgument("Gather dimension ", axis + i,
" is of size zero in tensor with shape ",
@@ -122,8 +122,8 @@
xla::GatherDimensionNumbers dim_numbers;
std::vector<int64> slice_sizes;
slice_sizes.reserve(input_shape.dims());
- for (int64 i = 0; i < input_shape.dims(); i++) {
- int64 window_bound;
+ for (int64_t i = 0; i < input_shape.dims(); i++) {
+ int64_t window_bound;
if (axis <= i && i < (axis + num_index_dims)) {
dim_numbers.add_collapsed_slice_dims(i);
window_bound = 1;
@@ -136,7 +136,7 @@
if (i < axis) {
dim_numbers.add_offset_dims(i);
} else if (i >= (axis + num_index_dims)) {
- int64 indices_rank =
+ int64_t indices_rank =
indices_are_nd ? (indices_shape.dims() - 1) : indices_shape.dims();
dim_numbers.add_offset_dims(i + indices_rank - num_index_dims);
}
@@ -144,7 +144,7 @@
dim_numbers.set_index_vector_dim(indices_are_nd ? (indices_shape.dims() - 1)
: indices_shape.dims());
- for (int64 i = axis; i < axis + num_index_dims; i++) {
+ for (int64_t i = axis; i < axis + num_index_dims; i++) {
dim_numbers.add_start_index_map(i);
}
@@ -170,7 +170,7 @@
return errors::InvalidArgument("axis must be int32 or int64");
}
- int64 axis_input;
+ int64_t axis_input;
TF_RETURN_IF_ERROR(context->ConstantInputAsIntScalar(2, &axis_input));
const auto params_dims = input_shape.dims();
@@ -278,7 +278,7 @@
errors::InvalidArgument("params must be at least a vector"));
OP_REQUIRES(context, TensorShapeUtils::IsVectorOrHigher(indices_shape),
errors::InvalidArgument("indices must be at least a vector"));
- const int64 num_index_dims =
+ const int64_t num_index_dims =
indices_shape.dim_size(indices_shape.dims() - 1);
OP_REQUIRES(
context, num_index_dims <= params_shape.dims(),
diff --git a/tensorflow/compiler/tf2xla/kernels/gather_op_helpers.h b/tensorflow/compiler/tf2xla/kernels/gather_op_helpers.h
index 7bd2523..83ab176 100644
--- a/tensorflow/compiler/tf2xla/kernels/gather_op_helpers.h
+++ b/tensorflow/compiler/tf2xla/kernels/gather_op_helpers.h
@@ -35,7 +35,7 @@
// of scalar indices.
Status XlaGather(const xla::XlaOp& input, const TensorShape& input_shape,
const xla::XlaOp& indices, const TensorShape& indices_shape,
- int64 axis, bool indices_are_nd, DataType dtype,
+ int64_t axis, bool indices_are_nd, DataType dtype,
DataType index_type, xla::XlaBuilder* builder,
xla::XlaOp* gather_output);
diff --git a/tensorflow/compiler/tf2xla/kernels/image_ops.cc b/tensorflow/compiler/tf2xla/kernels/image_ops.cc
index a68484c..29a08e7 100644
--- a/tensorflow/compiler/tf2xla/kernels/image_ops.cc
+++ b/tensorflow/compiler/tf2xla/kernels/image_ops.cc
@@ -103,7 +103,7 @@
errors::InvalidArgument("input must be at least 1D",
input_shape.DebugString()));
int channel_dim = input_shape.dims() - 1;
- int64 channels = input_shape.dim_size(channel_dim);
+ int64_t channels = input_shape.dim_size(channel_dim);
OP_REQUIRES(
context, channels == 3,
errors::FailedPrecondition("input must have 3 channels but input has ",
@@ -141,7 +141,7 @@
errors::InvalidArgument("input must be at least 1D",
input_shape.DebugString()));
int channel_dim = input_shape.dims() - 1;
- int64 channels = input_shape.dim_size(channel_dim);
+ int64_t channels = input_shape.dim_size(channel_dim);
OP_REQUIRES(
context, channels == 3,
errors::FailedPrecondition("input must have 3 channels but input has ",
@@ -181,8 +181,8 @@
int height_dim = input_shape.dims() - 3;
int width_dim = input_shape.dims() - 2;
int channel_dim = input_shape.dims() - 1;
- const int64 height = input_shape.dim_size(height_dim);
- const int64 width = input_shape.dim_size(width_dim);
+ const int64_t height = input_shape.dim_size(height_dim);
+ const int64_t width = input_shape.dim_size(width_dim);
OP_REQUIRES(context, TensorShapeUtils::IsScalar(factor_shape),
errors::InvalidArgument("contrast_factor must be scalar: ",
@@ -231,7 +231,7 @@
errors::InvalidArgument("scale must be scalar: ",
scale_shape.DebugString()));
const int channel_dim = input_shape.dims() - 1;
- const int64 channels = input_shape.dim_size(channel_dim);
+ const int64_t channels = input_shape.dim_size(channel_dim);
OP_REQUIRES(
context, channels == 3,
errors::InvalidArgument("input must have 3 channels but instead has ",
@@ -285,7 +285,7 @@
errors::InvalidArgument("delta must be scalar: ",
delta_shape.DebugString()));
const int channel_dim = input_shape.dims() - 1;
- const int64 channels = input_shape.dim_size(channel_dim);
+ const int64_t channels = input_shape.dim_size(channel_dim);
OP_REQUIRES(
context, channels == 3,
errors::InvalidArgument("input must have 3 channels but instead has ",
@@ -334,7 +334,7 @@
const int64 num_boxes;
const int64 output_size;
- explicit WhileCondFn(int64 num_boxes, int64 output_size)
+ explicit WhileCondFn(int64_t num_boxes, int64_t output_size)
: num_boxes(num_boxes), output_size(output_size) {}
StatusOr<xla::XlaOp> operator()(absl::Span<const xla::XlaOp> values,
@@ -356,7 +356,7 @@
struct SuppressBodyFn {
const int64 num_boxes;
- explicit SuppressBodyFn(int64 num_boxes) : num_boxes(num_boxes) {}
+ explicit SuppressBodyFn(int64_t num_boxes) : num_boxes(num_boxes) {}
StatusOr<std::vector<xla::XlaOp>> operator()(
absl::Span<const xla::XlaOp> values, xla::XlaBuilder* builder) const {
@@ -410,7 +410,7 @@
OP_REQUIRES(context, TensorShapeUtils::IsMatrix(boxes_shape),
errors::InvalidArgument("boxes must be 2-D, currently: ",
boxes_shape.DebugString()));
- const int64 num_boxes = boxes_shape.dim_size(0);
+ const int64_t num_boxes = boxes_shape.dim_size(0);
OP_REQUIRES(context, boxes_shape.dim_size(1) == 4,
errors::InvalidArgument("boxes must have 4 columns",
boxes_shape.DebugString()));
@@ -433,7 +433,7 @@
xla::PrimitiveType scores_xla_type = context->InputXlaType("scores");
const xla::XlaOp boxes_input = context->Input("boxes");
const xla::XlaOp scores_input = context->Input("scores");
- int64 output_size;
+ int64_t output_size;
OP_REQUIRES_OK(context, context->ConstantInputAsIntScalar(2, &output_size));
OP_REQUIRES(
context, output_size >= 0,
diff --git a/tensorflow/compiler/tf2xla/kernels/image_resize_ops.cc b/tensorflow/compiler/tf2xla/kernels/image_resize_ops.cc
index 8e53ca1..b090dcc 100644
--- a/tensorflow/compiler/tf2xla/kernels/image_resize_ops.cc
+++ b/tensorflow/compiler/tf2xla/kernels/image_resize_ops.cc
@@ -102,12 +102,13 @@
dims.stride[i] = dims.kernel_size[i] = 1;
} else {
// The scaling factor changes depending on the alignment of corners.
- const int64 in_size_factor = align_corners ? in_size[i] - 1 : in_size[i];
- const int64 out_size_factor =
+ const int64_t in_size_factor =
+ align_corners ? in_size[i] - 1 : in_size[i];
+ const int64_t out_size_factor =
align_corners ? out_size[i] - 1 : out_size[i];
- int64 gcd = MathUtil::GCD(static_cast<uint64>(in_size_factor),
- static_cast<uint64>(out_size_factor));
+ int64_t gcd = MathUtil::GCD(static_cast<uint64>(in_size_factor),
+ static_cast<uint64>(out_size_factor));
dims.stride[i] = in_size_factor / gcd;
dims.kernel_size[i] = out_size_factor / gcd;
}
@@ -121,10 +122,10 @@
// + lhs_dilation * (in_size - 1) + 1
// 2. dilated_input_dim = (2 * dims.kernel-size - 1)
// + dims.stride * (out_size - 1)
-int64 CalculateUpperPadding(int64 in_size, int64 out_size, int64 kernel_size,
- int64 stride) {
- int64 padding = (2 * kernel_size - 1) + (out_size - 1) * stride -
- (kernel_size - 1) - 1 - (kernel_size * (in_size - 1));
+int64 CalculateUpperPadding(int64_t in_size, int64_t out_size,
+ int64_t kernel_size, int64_t stride) {
+ int64_t padding = (2 * kernel_size - 1) + (out_size - 1) * stride -
+ (kernel_size - 1) - 1 - (kernel_size * (in_size - 1));
return padding;
}
@@ -141,9 +142,9 @@
// each dimension due to the symmetry of the kernel along all axis to reduce the
// computational intensity.
xla::XlaOp MakeBilinear1DKernel(xla::XlaBuilder* builder,
- xla::PrimitiveType type, int64 n) {
+ xla::PrimitiveType type, int64_t n) {
std::vector<float> kernel(n * 2 - 1);
- for (int64 i = 0; i < n; ++i) {
+ for (int64_t i = 0; i < n; ++i) {
float v = (i + 1.0f) / n;
kernel[i] = v;
kernel[n * 2 - 2 - i] = v;
@@ -161,7 +162,7 @@
// for nearest neighbor resize already chose to default to the right,
// so we want to be consistent).
xla::XlaOp MakeNearestNeighbor1DKernel(xla::XlaBuilder* builder,
- xla::PrimitiveType type, int64 n) {
+ xla::PrimitiveType type, int64_t n) {
std::vector<float> kernel(n * 2 - 1, 0.0f);
std::fill(&kernel[n / 2], &kernel[(3 * n) / 2], 1.0f);
@@ -170,12 +171,12 @@
// Kernels with more than 16 spatial elements are considered intense and the
// kernel should be applied to each dimension independently.
-const int64 kMax2DKernelSize = 16;
+const int64_t kMax2DKernelSize = 16;
xla::XlaOp MakeGeneralResizeKernel(xla::XlaBuilder* builder,
xla::PrimitiveType type,
absl::Span<const int64> kernel_size,
- int64 channels, bool is_kernel_bilinear) {
+ int64_t channels, bool is_kernel_bilinear) {
auto make_kernel_func =
is_kernel_bilinear ? MakeBilinear1DKernel : MakeNearestNeighbor1DKernel;
@@ -193,7 +194,7 @@
xla::XlaOp MakeGeneralResizeKernelInDim(xla::XlaBuilder* builder,
xla::PrimitiveType type,
absl::Span<const int64> kernel_size,
- int64 channels, int64 dim,
+ int64_t channels, int64_t dim,
bool is_kernel_bilinear) {
auto make_kernel_func =
is_kernel_bilinear ? MakeBilinear1DKernel : MakeNearestNeighbor1DKernel;
@@ -231,7 +232,7 @@
xla::XlaOp ResizeUsingDilationAndConvolution(
xla::XlaBuilder* builder, const xla::XlaOp& input, xla::PrimitiveType type,
const int num_spatial_dims, absl::Span<const int64> in_size,
- absl::Span<const int64> out_size, const int64 channels,
+ absl::Span<const int64> out_size, const int64_t channels,
const bool align_corners, bool is_kernel_bilinear) {
// Picture for a 1x3 to 1x4 bilinear resize:
// stride = 2, kernel size = 3
@@ -294,7 +295,7 @@
num_extended[0] = upper_padding[0] / (dims.kernel_size[0]);
num_extended[1] = upper_padding[1] / (dims.kernel_size[1]);
- const int64 batch_dim_size =
+ const int64_t batch_dim_size =
builder->GetShape(input).ValueOrDie().dimensions(0);
if (num_extended[0] > 0) {
auto slice = xla::Slice(
@@ -377,7 +378,7 @@
xla::XlaOp ResizeUsingDilationAndConvolutionGradOp(
xla::XlaBuilder* builder, const xla::XlaOp& grad, xla::PrimitiveType type,
const int num_spatial_dims, absl::Span<const int64> in_size,
- absl::Span<const int64> grad_size, const int64 channels,
+ absl::Span<const int64> grad_size, const int64_t channels,
const bool align_corners, bool is_kernel_bilinear) {
ResizeConvolutionDims dims =
ComputeResizeConvolutionParameters(in_size, grad_size, align_corners);
@@ -477,11 +478,11 @@
errors::InvalidArgument("input must be 4-dimensional",
input_shape.DebugString()));
// First dimension always assumed to be batch
- const int64 batch = input_shape.dim_size(0);
+ const int64_t batch = input_shape.dim_size(0);
std::vector<int64> in_size = {input_shape.dim_size(1),
input_shape.dim_size(2)};
// Last/4th dimension always assumed to be num channels
- const int64 channels = input_shape.dim_size(3);
+ const int64_t channels = input_shape.dim_size(3);
OP_REQUIRES(ctx, in_size[0] > 0 && in_size[1] > 0,
errors::InvalidArgument("input size must be positive, got [",
in_size[0], ",", in_size[1], "]"));
@@ -529,7 +530,7 @@
for (int dim = 0; dim < in_size.size(); ++dim) {
// If the pairwise_distance function more accurately estimated performance,
// this threshold could be reduced.
- constexpr int64 kSmallDimThreshold = 1 << 10;
+ constexpr int64_t kSmallDimThreshold = 1 << 10;
if (in_size[dim] > out_size[dim] || out_size[dim] < kSmallDimThreshold) {
std::vector<int64> next_size = in_size;
next_size[dim] = out_size[dim];
@@ -543,7 +544,8 @@
// This function approximates the cost of a bilinear resize from a src_size to
// a dst_size. The accuracy is okay, but empirically, the algorithm makes some
// suboptimal choices. A better cost model would improve performance.
- auto pairwise_distance = [align_corners_](int64 src_size, int64 dst_size) {
+ auto pairwise_distance = [align_corners_](int64_t src_size,
+ int64_t dst_size) {
auto params = ComputeResizeConvolutionParameters({src_size}, {dst_size},
align_corners_);
return params.stride[0];
@@ -552,10 +554,10 @@
for (int dim = 0; dim < in_size.size(); ++dim) {
std::vector<int64> distances(out_size[dim] + 1);
std::vector<int64> next_step(out_size[dim] + 1);
- for (int64 i = distances.size() - 2; i >= in_size[dim]; --i) {
+ for (int64_t i = distances.size() - 2; i >= in_size[dim]; --i) {
distances[i] = INT64_MAX;
- for (int64 j = i + 1; j < distances.size(); ++j) {
- int64 distance = pairwise_distance(i, j) + distances[j];
+ for (int64_t j = i + 1; j < distances.size(); ++j) {
+ int64_t distance = pairwise_distance(i, j) + distances[j];
if (distance < distances[i]) {
distances[i] = distance;
next_step[i] = j;
@@ -644,10 +646,10 @@
OP_REQUIRES(ctx, input_shape.dims() == 4,
errors::InvalidArgument("input must be 4-dimensional",
input_shape.DebugString()));
- const int64 batch = input_shape.dim_size(0);
+ const int64_t batch = input_shape.dim_size(0);
std::vector<int64> in_size = {input_shape.dim_size(1),
input_shape.dim_size(2)};
- const int64 channels = input_shape.dim_size(3);
+ const int64_t channels = input_shape.dim_size(3);
OP_REQUIRES(ctx, in_size[0] > 0 && in_size[1] > 0,
errors::InvalidArgument("input size must be positive, got [",
in_size[0], ",", in_size[1], "]"));
@@ -656,10 +658,10 @@
OP_REQUIRES(ctx, grad_shape.dims() == 4,
errors::InvalidArgument("gradient must be 4-dimensional",
grad_shape.DebugString()));
- const int64 grad_batch = grad_shape.dim_size(0);
+ const int64_t grad_batch = grad_shape.dim_size(0);
const std::vector<int64> grad_size = {grad_shape.dim_size(1),
grad_shape.dim_size(2)};
- const int64 grad_channels = grad_shape.dim_size(3);
+ const int64_t grad_channels = grad_shape.dim_size(3);
OP_REQUIRES(ctx, batch == grad_batch,
errors::InvalidArgument(
"activations and gradients must have the same batch size (",
diff --git a/tensorflow/compiler/tf2xla/kernels/in_topk_op.cc b/tensorflow/compiler/tf2xla/kernels/in_topk_op.cc
index 246d3f6..94bff4b 100644
--- a/tensorflow/compiler/tf2xla/kernels/in_topk_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/in_topk_op.cc
@@ -39,7 +39,7 @@
}
void Compile(XlaOpKernelContext* context) override {
- int64 k;
+ int64_t k;
OP_REQUIRES_OK(context, context->ConstantInputAsIntScalar(2, &k));
OP_REQUIRES(context, k >= 0,
errors::InvalidArgument("Need k >= 0, got ", k));
@@ -53,7 +53,7 @@
errors::InvalidArgument("targets must be == 1-D, got shape ",
targets_shape.DebugString()));
- int64 batch_size = predictions_shape.dim_size(0);
+ int64_t batch_size = predictions_shape.dim_size(0);
OP_REQUIRES(context, batch_size == targets_shape.dim_size(0),
errors::InvalidArgument(
"targets must have same elements as predictions rows. Had ",
diff --git a/tensorflow/compiler/tf2xla/kernels/index_ops.cc b/tensorflow/compiler/tf2xla/kernels/index_ops.cc
index df6d9b4..63c30d5 100644
--- a/tensorflow/compiler/tf2xla/kernels/index_ops.cc
+++ b/tensorflow/compiler/tf2xla/kernels/index_ops.cc
@@ -44,7 +44,7 @@
"dim must be a scalar, but received tensor of shape: ",
dimension_shape.DebugString()));
- int64 dim;
+ int64_t dim;
OP_REQUIRES_OK(ctx, ctx->ConstantInputAsIntScalar(1, &dim));
const int input_dims = input_shape.dims();
@@ -54,7 +54,7 @@
ctx, axis >= 0 && axis < input_dims,
errors::InvalidArgument("Expected dimension in the range [", -input_dims,
", ", input_dims, "), but got ", dim));
- const int64 axis_size = input_shape.dim_size(axis);
+ const int64_t axis_size = input_shape.dim_size(axis);
OP_REQUIRES(
ctx, axis_size > 0,
errors::InvalidArgument("Reduction axis ", dim, " is empty in shape ",
diff --git a/tensorflow/compiler/tf2xla/kernels/matrix_diag_ops.cc b/tensorflow/compiler/tf2xla/kernels/matrix_diag_ops.cc
index c8da751..d5caa75 100644
--- a/tensorflow/compiler/tf2xla/kernels/matrix_diag_ops.cc
+++ b/tensorflow/compiler/tf2xla/kernels/matrix_diag_ops.cc
@@ -53,8 +53,8 @@
// Reads or infers lower_diag_index and upper_diag_index from kernel's input
// parameter "k". Also validates their values.
std::pair<int64, int64> ProcessDiagIndex(XlaOpKernelContext* context) {
- int64 lower_diag_index = 0;
- int64 upper_diag_index = 0;
+ int64_t lower_diag_index = 0;
+ int64_t upper_diag_index = 0;
TensorShape diag_index_shape = context->InputShape("k");
// Wrapping OP_REQUIRES* macros with a function because they can "return;"
@@ -90,10 +90,10 @@
// Makes sure lower_diag_index and upper_diag_index are consistent with the
// input matrix size.
void ValidateDiagIndexWithOutputMatrixSize(XlaOpKernelContext* context,
- const int64 lower_diag_index,
- const int64 upper_diag_index,
- const int64 num_rows,
- const int64 num_cols) {
+ const int64_t lower_diag_index,
+ const int64_t upper_diag_index,
+ const int64_t num_rows,
+ const int64_t num_cols) {
// `lower_diag_index == 0` condition is added to handle matrix shape = 0.
OP_REQUIRES(context,
(-num_rows < lower_diag_index && lower_diag_index < num_cols) ||
@@ -115,10 +115,12 @@
// Kernel to set matrix diagonals.
xla::XlaOp SetMatrixDiag(const xla::XlaOp input, const xla::XlaOp diag,
- const TensorShape& input_shape, const int64 diag_rank,
- const int64 num_diags, const int64 lower_diag_index,
- const int64 upper_diag_index, const int64 max_diag_len,
- const int64 num_rows, const int64 num_cols,
+ const TensorShape& input_shape,
+ const int64_t diag_rank, const int64_t num_diags,
+ const int64_t lower_diag_index,
+ const int64_t upper_diag_index,
+ const int64_t max_diag_len, const int64_t num_rows,
+ const int64_t num_cols,
const bool left_align_superdiagonal,
const bool left_align_subdiagonal) {
// Creates a padding config.
@@ -158,14 +160,14 @@
std::vector<int64> broadcast_dimensions(input_rank - 1);
absl::c_iota(broadcast_dimensions, 0);
auto output = input;
- for (int64 diag_index = lower_diag_index; diag_index <= upper_diag_index;
+ for (int64_t diag_index = lower_diag_index; diag_index <= upper_diag_index;
++diag_index) {
// Extracts a single diagonal.
auto diag_slice = diag;
if (num_diags > 1) {
// The result of SliceInDim has dims: [<batch_dim>, 1, max_diag_len].
// We call Collapse to make the dims: [<batch_dim>, max_diag_len].
- const int64 mapped_diag_index = upper_diag_index - diag_index;
+ const int64_t mapped_diag_index = upper_diag_index - diag_index;
diag_slice = xla::Collapse(
xla::SliceInDim(diag, mapped_diag_index, mapped_diag_index + 1, 1,
diag_rank - 2),
@@ -253,10 +255,10 @@
// Initializes MatrixDiagV2-specific variables.
// Input arguments providing the values of num_rows and num_cols can be
// absent (-1) and will be inferred later.
- int64 lower_diag_index = 0;
- int64 upper_diag_index = 0;
- int64 num_rows = -1;
- int64 num_cols = -1;
+ int64_t lower_diag_index = 0;
+ int64_t upper_diag_index = 0;
+ int64_t num_rows = -1;
+ int64_t num_cols = -1;
xla::XlaOp padding_value = zero;
// MatrixDiag and MatrixDiagV2 both use this OpKernel. MatrixDiag only has
@@ -270,18 +272,18 @@
}
// More size validations.
- const int64 diag_rank = diag_shape.dims();
- const int64 max_diag_len = diag_shape.dim_size(diag_rank - 1);
- const int64 num_diags = upper_diag_index - lower_diag_index + 1;
+ const int64_t diag_rank = diag_shape.dims();
+ const int64_t max_diag_len = diag_shape.dim_size(diag_rank - 1);
+ const int64_t num_diags = upper_diag_index - lower_diag_index + 1;
OP_REQUIRES(
context,
num_diags == 1 || num_diags == diag_shape.dim_size(diag_rank - 2),
errors::InvalidArgument(
"The number of diagonals provided in the input does not "
"match the lower_diag_index and upper_diag_index range."));
- const int64 min_num_rows =
+ const int64_t min_num_rows =
max_diag_len - std::min(upper_diag_index, int64{0});
- const int64 min_num_cols =
+ const int64_t min_num_cols =
max_diag_len + std::max(lower_diag_index, int64{0});
OP_REQUIRES(context, num_rows == -1 || num_rows >= min_num_rows,
errors::InvalidArgument("The number of rows is too small."));
@@ -366,8 +368,8 @@
const xla::XlaOp zero = XlaHelpers::Zero(context->builder(), dtype);
// Initializes MatrixDiagPartV2-specific variables.
- int64 lower_diag_index = 0;
- int64 upper_diag_index = 0;
+ int64_t lower_diag_index = 0;
+ int64_t upper_diag_index = 0;
xla::XlaOp padding_value = zero;
// MatrixDiagPart and MatrixDiagPartV2 both use this OpKernel.
@@ -379,8 +381,8 @@
}
// Checks if diag sizes are consistent with input.
- const int64 num_rows = input_shape.dim_size(input_rank - 2);
- const int64 num_cols = input_shape.dim_size(input_rank - 1);
+ const int64_t num_rows = input_shape.dim_size(input_rank - 2);
+ const int64_t num_cols = input_shape.dim_size(input_rank - 1);
ValidateDiagIndexWithOutputMatrixSize(context, lower_diag_index,
upper_diag_index, num_rows, num_cols);
@@ -410,8 +412,8 @@
xla::XlaOp single_diag =
is_gpu_ ? xla::GetMatrixDiagonalViaGather(input, diag_index)
: xla::GetMatrixDiagonal(input, diag_index);
- const int64 diag_len = ComputeDiagLen(diag_index, num_rows, num_cols);
- const int64 padding_len = max_diag_len - diag_len;
+ const int64_t diag_len = ComputeDiagLen(diag_index, num_rows, num_cols);
+ const int64_t padding_len = max_diag_len - diag_len;
if (padding_len > 0) {
if (IsLeftAligned(diag_index, left_align_superdiagonal_,
left_align_subdiagonal_)) {
@@ -481,15 +483,15 @@
// MatrixSetDiag and MatrixSetDiagV2 both use this OpKernel. MatrixSetDiag
// only has two inputs, so we have to check the number of inputs before
// reading additional parameters in MatrixSetDiagV2.
- int64 lower_diag_index = 0;
- int64 upper_diag_index = 0;
+ int64_t lower_diag_index = 0;
+ int64_t upper_diag_index = 0;
if (context->num_inputs() > kNumV1Inputs) {
std::tie(lower_diag_index, upper_diag_index) = ProcessDiagIndex(context);
}
// Checks if diag sizes are consistent with input.
- const int64 num_rows = input_shape.dim_size(input_rank - 2);
- const int64 num_cols = input_shape.dim_size(input_rank - 1);
+ const int64_t num_rows = input_shape.dim_size(input_rank - 2);
+ const int64_t num_cols = input_shape.dim_size(input_rank - 1);
ValidateDiagIndexWithOutputMatrixSize(context, lower_diag_index,
upper_diag_index, num_rows, num_cols);
const Eigen::Index num_diags = upper_diag_index - lower_diag_index + 1;
diff --git a/tensorflow/compiler/tf2xla/kernels/matrix_inverse_op.cc b/tensorflow/compiler/tf2xla/kernels/matrix_inverse_op.cc
index a684afd..79bc055 100644
--- a/tensorflow/compiler/tf2xla/kernels/matrix_inverse_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/matrix_inverse_op.cc
@@ -29,7 +29,7 @@
void Compile(XlaOpKernelContext* ctx) override {
const TensorShape input_shape = ctx->InputShape(0);
- int64 ndims = input_shape.dims();
+ int64_t ndims = input_shape.dims();
OP_REQUIRES(
ctx, ndims >= 2,
errors::InvalidArgument("Input must have rank >= 2, got ", ndims));
diff --git a/tensorflow/compiler/tf2xla/kernels/matrix_solve_op.cc b/tensorflow/compiler/tf2xla/kernels/matrix_solve_op.cc
index 0aebccb..d026725 100644
--- a/tensorflow/compiler/tf2xla/kernels/matrix_solve_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/matrix_solve_op.cc
@@ -30,7 +30,7 @@
void Compile(XlaOpKernelContext* ctx) override {
const TensorShape matrix_shape = ctx->InputShape(0);
- int64 matrix_ndims = matrix_shape.dims();
+ int64_t matrix_ndims = matrix_shape.dims();
OP_REQUIRES(ctx, matrix_ndims >= 2,
errors::InvalidArgument(
"Input matrix must have rank >= 2, got ", matrix_ndims));
diff --git a/tensorflow/compiler/tf2xla/kernels/matrix_triangular_solve_op.cc b/tensorflow/compiler/tf2xla/kernels/matrix_triangular_solve_op.cc
index 8d222d9..c41c503 100644
--- a/tensorflow/compiler/tf2xla/kernels/matrix_triangular_solve_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/matrix_triangular_solve_op.cc
@@ -83,8 +83,8 @@
xla::XlaOp rhs, const TensorShape& rhs_shape,
const MatMulBCast& broadcast_helper) {
// Get the batch shape.
- int64 m = lhs_shape.dim_size(lhs_shape.dims() - 1);
- int64 n = rhs_shape.dim_size(rhs_shape.dims() - 1);
+ int64_t m = lhs_shape.dim_size(lhs_shape.dims() - 1);
+ int64_t n = rhs_shape.dim_size(rhs_shape.dims() - 1);
TensorShape lhs_broadcast_shape(broadcast_helper.output_batch_shape());
lhs_broadcast_shape.AddDim(m);
diff --git a/tensorflow/compiler/tf2xla/kernels/mirror_pad_op.cc b/tensorflow/compiler/tf2xla/kernels/mirror_pad_op.cc
index af85729..9991bd9 100644
--- a/tensorflow/compiler/tf2xla/kernels/mirror_pad_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/mirror_pad_op.cc
@@ -38,13 +38,13 @@
// e.g. input is [1, 2, 3] and paddings is [0, 2], then the output is:
// - [1, 2, 3, 2, 1] in reflect mode
// - [1, 2, 3, 3, 2] in symmetric mode.
- int64 excluded_edges = mode == MirrorPadMode::REFLECT ? 1 : 0;
+ int64_t excluded_edges = mode == MirrorPadMode::REFLECT ? 1 : 0;
xla::XlaOp accum = t;
- for (int64 dimno = original_shape.rank() - 1; dimno >= 0; --dimno) {
+ for (int64_t dimno = original_shape.rank() - 1; dimno >= 0; --dimno) {
auto t_rev = xla::Rev(accum, {dimno});
- int64 lhs_padding = pad_literal.Get<int64>({dimno, 0});
- int64 rhs_padding = pad_literal.Get<int64>({dimno, 1});
- int64 dim_size = original_shape.dimensions(dimno);
+ int64_t lhs_padding = pad_literal.Get<int64>({dimno, 0});
+ int64_t rhs_padding = pad_literal.Get<int64>({dimno, 1});
+ int64_t dim_size = original_shape.dimensions(dimno);
// Padding amounts on each side must be no more than the size of the
// original shape.
@@ -125,13 +125,13 @@
// e.g. input is [1, 2, 3] and paddings is [0, 2], then the output is:
// - [1, 2, 3, 2, 1] in reflect mode
// - [1, 2, 3, 3, 2] in symmetric mode.
- int64 excluded_edges = mode == MirrorPadMode::REFLECT ? 1 : 0;
+ int64_t excluded_edges = mode == MirrorPadMode::REFLECT ? 1 : 0;
xla::XlaOp grad = t;
- for (int64 dimno = original_shape.rank() - 1; dimno >= 0; --dimno) {
- int64 lhs_padding = pad_literal.Get<int64>({dimno, 0});
- int64 rhs_padding = pad_literal.Get<int64>({dimno, 1});
- int64 dim_size = original_shape.dimensions(dimno);
- int64 result_dim_size = dim_size - lhs_padding - rhs_padding;
+ for (int64_t dimno = original_shape.rank() - 1; dimno >= 0; --dimno) {
+ int64_t lhs_padding = pad_literal.Get<int64>({dimno, 0});
+ int64_t rhs_padding = pad_literal.Get<int64>({dimno, 1});
+ int64_t dim_size = original_shape.dimensions(dimno);
+ int64_t result_dim_size = dim_size - lhs_padding - rhs_padding;
// Padding amounts on each side must be no more than the size of the
// original shape.
diff --git a/tensorflow/compiler/tf2xla/kernels/one_hot_op.cc b/tensorflow/compiler/tf2xla/kernels/one_hot_op.cc
index aba5457..e6ea22e 100644
--- a/tensorflow/compiler/tf2xla/kernels/one_hot_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/one_hot_op.cc
@@ -56,7 +56,7 @@
const int axis = (axis_ == -1) ? indices_dims : axis_;
// The one-hot dimension.
- int64 depth;
+ int64_t depth;
OP_REQUIRES_OK(ctx, ctx->ConstantInputAsIntScalar(1, &depth));
OP_REQUIRES(
ctx, depth >= 0,
diff --git a/tensorflow/compiler/tf2xla/kernels/quantize_and_dequantize_op.cc b/tensorflow/compiler/tf2xla/kernels/quantize_and_dequantize_op.cc
index 22efbe4..016691d 100644
--- a/tensorflow/compiler/tf2xla/kernels/quantize_and_dequantize_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/quantize_and_dequantize_op.cc
@@ -78,7 +78,7 @@
} else {
std::vector<int64> dimensions_to_reduce;
TensorShape input_shape = ctx->InputShape(0);
- int64 input_rank = input_shape.dims();
+ int64_t input_rank = input_shape.dims();
OP_REQUIRES(ctx, input_rank >= 1,
errors::Unimplemented("QuantizeAndDequantizeOp with axis "
"!= -1 requires minimum rank 1"));
@@ -86,7 +86,7 @@
ctx, axis_ >= 0 && axis_ < input_rank,
errors::Unimplemented("QuantizeAndDequantizeOp with invalid axis"));
dimensions_to_reduce.reserve(input_rank - 1);
- for (int64 i = 0; i < input_rank; ++i) {
+ for (int64_t i = 0; i < input_rank; ++i) {
if (i != axis_) {
dimensions_to_reduce.push_back(i);
}
diff --git a/tensorflow/compiler/tf2xla/kernels/reduction_ops_common.cc b/tensorflow/compiler/tf2xla/kernels/reduction_ops_common.cc
index b4284a5..d3e995e 100644
--- a/tensorflow/compiler/tf2xla/kernels/reduction_ops_common.cc
+++ b/tensorflow/compiler/tf2xla/kernels/reduction_ops_common.cc
@@ -72,8 +72,8 @@
absl::InlinedVector<bool, 4> bitmap(data_shape.dims(), false);
std::vector<int64> xla_axes;
- for (int64 i = 0; i < axes_tensor_shape.num_elements(); ++i) {
- int64 index = axes[i];
+ for (int64_t i = 0; i < axes_tensor_shape.num_elements(); ++i) {
+ int64_t index = axes[i];
OP_REQUIRES(ctx,
!(index < -data_shape.dims() || index >= data_shape.dims()),
errors::InvalidArgument("Invalid reduction dimension (", index,
@@ -93,7 +93,7 @@
for (int i = 0; i < data_shape.dims(); ++i) {
if (!bitmap[i]) {
// If we are not reducing along dimension i.
- int64 dim = data_shape.dim_size(i);
+ int64_t dim = data_shape.dim_size(i);
final_shape.push_back(dim);
} else if (keep_dims_) {
// We are reducing along dimension i, but we want to keep the
diff --git a/tensorflow/compiler/tf2xla/kernels/resampler_ops.cc b/tensorflow/compiler/tf2xla/kernels/resampler_ops.cc
index f9985d5..de0d979 100644
--- a/tensorflow/compiler/tf2xla/kernels/resampler_ops.cc
+++ b/tensorflow/compiler/tf2xla/kernels/resampler_ops.cc
@@ -61,7 +61,7 @@
broadcast_dims.push_back(4);
broadcast_dims.push_back(2);
- const int64 broadcast_dims_size = broadcast_dims.size();
+ const int64_t broadcast_dims_size = broadcast_dims.size();
std::vector<int64> last_two_dims_indices = {(broadcast_dims_size - 2),
(broadcast_dims_size - 1)};
@@ -136,9 +136,9 @@
// 'gather_indices' is of dimension [batch, dim_0, ..., dim_n, 3] where the last
// dimension of size 3 is (batch_no, x, y).
XlaOp Gather2by2Neighbors(xla::XlaBuilder* b, XlaOp data, XlaOp gather_indices,
- int64 data_channels, int warp_dims) {
+ int64_t data_channels, int warp_dims) {
xla::GatherDimensionNumbers gather_dim_numbers;
- const int64 neighbor_data_dimensions = warp_dims + 2;
+ const int64_t neighbor_data_dimensions = warp_dims + 2;
// Since the Gather output dimensions are [batch, dim_0, ... dim_n, 2, 2,
// data_channels], the offset dimensions for Gather is the last 3 dimensions.
gather_dim_numbers.add_offset_dims(neighbor_data_dimensions - 3);
@@ -165,10 +165,10 @@
// resulting tensor of dimension: [batch, dim_0, ...dim_n, 2, 2, data_channels].
// This function can also be seen as the inverse of 'Gather2by2Neighbors'.
XlaOp ScatterToGradData(XlaOpKernelContext* ctx, XlaOp grad_data, XlaOp indices,
- XlaOp updates, int64 warp_dims,
+ XlaOp updates, int64_t warp_dims,
xla::PrimitiveType xla_type) {
xla::ScatterDimensionNumbers scatter_dim_numbers;
- const int64 neighbor_data_dimensions = warp_dims + 2;
+ const int64_t neighbor_data_dimensions = warp_dims + 2;
// Since the Scatter output dimensions are [batch, dim_0, ... dim_n, 2, 2,
// data_channels], the update window dimensions is the last 3 dimensions.
scatter_dim_numbers.add_update_window_dims(neighbor_data_dimensions - 3);
@@ -195,7 +195,7 @@
XlaOp BoundSamples(XlaOpKernelContext* ctx, XlaOp warp,
xla::PrimitiveType warp_type, TensorShape warp_shape,
std::vector<int64> result_dims,
- std::vector<int64> broadcasted_dims, int64 last_warp_dim,
+ std::vector<int64> broadcasted_dims, int64_t last_warp_dim,
xla::Shape data_shape, XlaOp sample) {
auto is_gt_minus_one =
xla::Gt(warp,
@@ -248,7 +248,7 @@
XlaOp CalculateGradData(XlaOpKernelContext* ctx, XlaOp grad_output, XlaOp ratio,
XlaOp gather_indices, XlaOp warp,
xla::PrimitiveType warp_type, TensorShape warp_shape,
- int64 last_warp_dim, int64 data_channels,
+ int64_t last_warp_dim, int64_t data_channels,
xla::Shape data_shape) {
// Weights tensor has dimension [batch, dim_0, ... dim_n, 4].
auto weights = BilinearWeights(ctx, ratio, warp_shape, warp_type);
@@ -318,9 +318,9 @@
ctx, padded_grad_data, shifted_gather_indices,
grad_output_multiply_weights, warp_shape.dims(), warp_type);
- const int64 batch_size = data_shape.dimensions(0);
- const int64 width = data_shape.dimensions(1);
- const int64 height = data_shape.dimensions(2);
+ const int64_t batch_size = data_shape.dimensions(0);
+ const int64_t width = data_shape.dimensions(1);
+ const int64_t height = data_shape.dimensions(2);
// Slice out the result accounting for the padding.
return xla::Slice(
updated_grad_data, /*start_indices=*/{0, 1, 1, 0},
@@ -358,7 +358,7 @@
// bottom right corner in a 2x2 neighborhood.
XlaOp CalculateGradWarp(XlaOpKernelContext* ctx, XlaOp grad_output, XlaOp ratio,
XlaOp gather_indices, XlaOp data,
- TensorShape warp_shape, int64 data_channels,
+ TensorShape warp_shape, int64_t data_channels,
xla::PrimitiveType data_type, xla::Shape data_shape) {
auto warp_dims = warp_shape.dim_sizes();
std::vector<int64> warp_dims_without_last_dims(warp_dims.begin(),
@@ -372,7 +372,7 @@
auto neighbor_broadcast_shape =
xla::ShapeUtil::MakeShape(data_type, neighbor_broadcast_dims);
- const int64 last_warp_dim = warp_shape.dims() - 1;
+ const int64_t last_warp_dim = warp_shape.dims() - 1;
// Pad data with 0, before gathering such that 0 will be returned for samples
// in the range of (-1, 0) or (image_dimension-1, image_dimension).
@@ -489,7 +489,7 @@
OP_REQUIRES(ctx, data_shape.dims() == 4,
errors::InvalidArgument("data must be 4-dimensional",
data_shape.DebugString()));
- const int64 data_channels = data_shape.dim_size(3);
+ const int64_t data_channels = data_shape.dim_size(3);
xla::PrimitiveType data_type = ctx->input_xla_type(0);
TensorShape warp_shape = ctx->InputShape("warp");
@@ -501,7 +501,7 @@
errors::InvalidArgument("warp sizes must be positive, got [",
size, "]"));
}
- const int64 last_warp_dim = warp_shape.dims() - 1;
+ const int64_t last_warp_dim = warp_shape.dims() - 1;
// Last dimension of warp shape must be of size 2.
OP_REQUIRES(ctx, warp_shape.dim_size(last_warp_dim) == 2,
errors::InvalidArgument(
@@ -610,7 +610,7 @@
OP_REQUIRES(ctx, data_shape_tf.dims() == 4,
errors::InvalidArgument("data must be 4-dimensional",
data_shape_tf.DebugString()));
- const int64 data_channels = data_shape_tf.dim_size(3);
+ const int64_t data_channels = data_shape_tf.dim_size(3);
xla::PrimitiveType data_type = ctx->input_xla_type(0);
TensorShape warp_shape = ctx->InputShape("warp");
@@ -623,7 +623,7 @@
size, "]"));
}
// Last dimension of warp shape must be of size 2.
- const int64 last_warp_dim = warp_shape.dims() - 1;
+ const int64_t last_warp_dim = warp_shape.dims() - 1;
OP_REQUIRES(ctx, warp_shape.dim_size(last_warp_dim) == 2,
errors::InvalidArgument(
"the last dimension of warp must be exactly size 2."));
diff --git a/tensorflow/compiler/tf2xla/kernels/reshape_op.cc b/tensorflow/compiler/tf2xla/kernels/reshape_op.cc
index 9fce6d5..2b6eb8d 100644
--- a/tensorflow/compiler/tf2xla/kernels/reshape_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/reshape_op.cc
@@ -43,7 +43,7 @@
OP_REQUIRES(ctx, TensorShapeUtils::IsVector(sizes_shape),
errors::InvalidArgument("sizes input must be 1-D, not shape ",
sizes_shape.DebugString()));
- const int64 num_dims = sizes_shape.num_elements();
+ const int64_t num_dims = sizes_shape.num_elements();
std::vector<int64> shape_input;
OP_REQUIRES_OK(ctx,
@@ -53,7 +53,7 @@
// dimensions, and find the index of the unspecified one if there
// is one.
TensorShape shape;
- int64 product = 1;
+ int64_t product = 1;
int unknown_index = -1;
bool shape_has_zero_dim = false;
for (int d = 0; d < num_dims; ++d) {
@@ -81,7 +81,7 @@
}
auto input = ctx->Input(0);
if (unknown_index != -1) {
- int64 input_num_elements = 1;
+ int64_t input_num_elements = 1;
bool input_has_zero_dim = false;
for (int dim = 0; dim < input_shape.dims(); dim++) {
// For zero dimension, we don't count it into `input_num_elements`
@@ -94,7 +94,7 @@
}
}
- int64 missing = input_num_elements / product;
+ int64_t missing = input_num_elements / product;
if (!input_has_zero_dim) {
if (input_xla_shape->is_static() || input_xla_shape->rank() != 1) {
OP_REQUIRES(
@@ -108,7 +108,7 @@
// sure the input is multiple of the product of the known dimensions.
// (We can probably do that for >1D shapes but that involves
// factorizing the number of missing elements.)
- int64 padded_input_num =
+ int64_t padded_input_num =
xla::CeilOfRatio(input_num_elements, product) * product;
missing = padded_input_num / product;
input = xla::PadInDim(
@@ -134,7 +134,7 @@
std::vector<xla::XlaOp> output_dim_sizes;
std::vector<bool> dims_are_dynamic;
- for (int64 i = 0; i < shape.dims(); ++i) {
+ for (int64_t i = 0; i < shape.dims(); ++i) {
output_dim_sizes.push_back(
xla::Reshape(xla::Slice(ctx->Input(1), {i}, {i + 1}, {1}), {}));
}
@@ -151,7 +151,7 @@
xla::CommonFactors(input_shape.dim_sizes(), shape.dim_sizes());
// Find common_factors that the input belongs to.
- for (int64 i = 0; i < common_factors.size() - 1; ++i) {
+ for (int64_t i = 0; i < common_factors.size() - 1; ++i) {
auto start = common_factors[i];
auto end = common_factors[i + 1];
bool input_is_dynamic = false;
@@ -159,7 +159,7 @@
// reshape(Tensor([2, 3, 3]), [3, -1, 3]) product of the group
// containing -1 will be 6.
xla::XlaOp product = xla::One(ctx->builder(), xla::S32);
- for (int64 dim = start.first; dim < end.first; ++dim) {
+ for (int64_t dim = start.first; dim < end.first; ++dim) {
if (input_xla_shape->is_dynamic_dimension(dim)) {
input_is_dynamic = true;
}
@@ -169,7 +169,7 @@
// The real size for the -1 dimension in a reshape. E.g., in
// reshape(Tensor([2, 3, 3]), [3, -1, 3]) this will be 2.
xla::XlaOp unknown_dim_size = product;
- for (int64 dim = start.second; dim < end.second; ++dim) {
+ for (int64_t dim = start.second; dim < end.second; ++dim) {
if (dim == unknown_index) {
unknown_dim_in_group = true;
} else {
diff --git a/tensorflow/compiler/tf2xla/kernels/roll_op.cc b/tensorflow/compiler/tf2xla/kernels/roll_op.cc
index 5908dbe..ae08273 100644
--- a/tensorflow/compiler/tf2xla/kernels/roll_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/roll_op.cc
@@ -31,7 +31,7 @@
const TensorShape shift_shape = ctx->InputShape(1);
const TensorShape axis_shape = ctx->InputShape(2);
- int64 input_dims = input_shape.dims();
+ int64_t input_dims = input_shape.dims();
OP_REQUIRES(ctx, input_dims >= 1,
errors::InvalidArgument("input must be 1-D or higher"));
OP_REQUIRES(ctx, shift_shape.dims() <= 1,
@@ -51,10 +51,10 @@
xla::XlaOp output = ctx->Input(0);
xla::PrimitiveType shift_type = ctx->input_xla_type(1);
- int64 num_axes = axis_shape.dims() == 0 ? 1 : axis_shape.dim_size(0);
- for (int64 i = 0; i != num_axes; ++i) {
- int64 cur_axis = axis_shape.dims() == 0 ? *axis.GetIntegralAsS64({})
- : *axis.GetIntegralAsS64({i});
+ int64_t num_axes = axis_shape.dims() == 0 ? 1 : axis_shape.dim_size(0);
+ for (int64_t i = 0; i != num_axes; ++i) {
+ int64_t cur_axis = axis_shape.dims() == 0 ? *axis.GetIntegralAsS64({})
+ : *axis.GetIntegralAsS64({i});
OP_REQUIRES(ctx, cur_axis >= -input_dims && cur_axis < input_dims,
errors::InvalidArgument(
absl::StrCat("axis ", cur_axis, " is out of range [-",
diff --git a/tensorflow/compiler/tf2xla/kernels/scan_ops.cc b/tensorflow/compiler/tf2xla/kernels/scan_ops.cc
index f6b5f4e..35b4c0d 100644
--- a/tensorflow/compiler/tf2xla/kernels/scan_ops.cc
+++ b/tensorflow/compiler/tf2xla/kernels/scan_ops.cc
@@ -54,7 +54,7 @@
errors::InvalidArgument("ScanOp: axis must be a scalar, not ",
tensor_axis_shape.DebugString()));
- int64 axis;
+ int64_t axis;
OP_REQUIRES_OK(ctx, ctx->ConstantInputAsIntScalar(1, &axis));
if (axis < 0) {
axis += input_shape.dims();
diff --git a/tensorflow/compiler/tf2xla/kernels/segment_reduction_ops.cc b/tensorflow/compiler/tf2xla/kernels/segment_reduction_ops.cc
index d63b814..fca4938 100644
--- a/tensorflow/compiler/tf2xla/kernels/segment_reduction_ops.cc
+++ b/tensorflow/compiler/tf2xla/kernels/segment_reduction_ops.cc
@@ -56,7 +56,7 @@
auto indices = ctx->Input(1);
TensorShape indices_shape = ctx->InputShape(1);
- int64 num_segments;
+ int64_t num_segments;
OP_REQUIRES_OK(ctx, ctx->ConstantInputAsIntScalar(2, &num_segments));
OP_REQUIRES(ctx, data_shape.dims() >= indices_shape.dims(),
@@ -99,13 +99,13 @@
buffer_dims_are_dynamic.insert(buffer_dims_are_dynamic.begin(),
num_segments_is_dynamic);
// Build the segment shape part.
- for (int64 i = indices_shape.dims(); i < data_shape.dims(); ++i) {
+ for (int64_t i = indices_shape.dims(); i < data_shape.dims(); ++i) {
buffer_dims.push_back(xla::GetDimensionSize(data, i));
buffer_dims_are_dynamic.push_back(
ctx->InputXlaShape(0)->is_dynamic_dimension(i));
}
- for (int64 i = 0; i < buffer_dims.size(); ++i) {
+ for (int64_t i = 0; i < buffer_dims.size(); ++i) {
if (buffer_dims_are_dynamic[i]) {
// For each dynamic dimension, call set-dimension-size on it.
buffer = xla::SetDimensionSize(buffer, buffer_dims[i], i);
diff --git a/tensorflow/compiler/tf2xla/kernels/sequence_ops.cc b/tensorflow/compiler/tf2xla/kernels/sequence_ops.cc
index 4bd72b4..742cbc1 100644
--- a/tensorflow/compiler/tf2xla/kernels/sequence_ops.cc
+++ b/tensorflow/compiler/tf2xla/kernels/sequence_ops.cc
@@ -56,7 +56,7 @@
"Requires start >= limit when delta < 0: ", start, "/", limit);
}
}
- int64 size =
+ int64_t size =
(std::is_integral<T>::value
? ((std::abs(limit - start) + std::abs(delta) - 1) / std::abs(delta))
: std::ceil(std::abs((limit - start) / delta)));
@@ -163,7 +163,7 @@
errors::InvalidArgument("num must be a scalar, not shape ",
num_in_shape.DebugString()));
- int64 num;
+ int64_t num;
OP_REQUIRES_OK(ctx, ctx->ConstantInputAsIntScalar("num", &num));
OP_REQUIRES(ctx, num > 0,
errors::InvalidArgument("Requires num > 0: ", num));
diff --git a/tensorflow/compiler/tf2xla/kernels/shape_op.cc b/tensorflow/compiler/tf2xla/kernels/shape_op.cc
index 2cef5cd..a8ac000 100644
--- a/tensorflow/compiler/tf2xla/kernels/shape_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/shape_op.cc
@@ -46,7 +46,7 @@
std::vector<xla::XlaOp> operands;
const int rank = input_shape.dims();
if (rank != 0) {
- for (int64 i = 0; i < rank; ++i) {
+ for (int64_t i = 0; i < rank; ++i) {
operands.push_back(xla::Broadcast(
xla::ConvertElementType(xla::GetDimensionSize(ctx->Input(0), i),
ctx->output_xla_type(0)),
@@ -96,7 +96,7 @@
errors::InvalidArgument("XlaSetBound should only be used to set a "
"bound to the an int32 scalar value: got",
bound_shape.DebugString()));
- int64 bound;
+ int64_t bound;
OP_REQUIRES_OK(ctx, ctx->ConstantInputAsIntScalar("bound", &bound));
xla::Literal bound_literal = xla::LiteralUtil::CreateR0<int32>(bound);
xla::XlaOp result =
@@ -129,7 +129,7 @@
ctx, dim_index_shape.dims() == 0 && size_shape.dims() == 0,
errors::InvalidArgument("XlaSetDynamicDimensionSizeOp's dim_index and "
"size has to be int32 scalar value"));
- int64 dim_index;
+ int64_t dim_index;
OP_REQUIRES_OK(ctx, ctx->ConstantInputAsIntScalar("dim_index", &dim_index));
xla::XlaOp result =
@@ -158,7 +158,7 @@
ctx, dim_index_shape.dims() == 0,
errors::InvalidArgument("XlaRemoveDynamicDimensionSizeOp's dim_index "
"has to be int32 scalar value"));
- int64 dim_index;
+ int64_t dim_index;
OP_REQUIRES_OK(ctx, ctx->ConstantInputAsIntScalar("dim_index", &dim_index));
xla::XlaOp result = xla::RemoveDynamicDimension(ctx->Input(0), dim_index);
@@ -185,7 +185,7 @@
if (rank != 0) {
// Each dimension can be dynamic, so use GetDimensionSize to get the
// runtime dimension.
- for (int64 dim = 0; dim < rank; ++dim) {
+ for (int64_t dim = 0; dim < rank; ++dim) {
operands.push_back(xla::Broadcast(
xla::ConvertElementType(xla::GetDimensionSize(ctx->Input(i), dim),
ctx->output_xla_type(i)),
@@ -241,7 +241,7 @@
const int rank = input_shape.dims();
xla::XlaBuilder* builder = ctx->builder();
auto size = xla::One(builder, xla::U32);
- for (int64 i = 0; i < rank; ++i) {
+ for (int64_t i = 0; i < rank; ++i) {
size = xla::Mul(
size, xla::ConvertElementType(xla::GetDimensionSize(ctx->Input(0), i),
xla::U32));
@@ -382,12 +382,12 @@
const xla::Shape& list_shape = list_shape_or.ValueOrDie();
std::vector<std::vector<xla::XlaOp>> list_dynamic_dims;
list_dynamic_dims.reserve(list_shape.tuple_shapes_size() - 1);
- for (int64 i = 0; i < list_shape.tuple_shapes_size() - 1; ++i) {
+ for (int64_t i = 0; i < list_shape.tuple_shapes_size() - 1; ++i) {
// Set dynamic dimension size to 0 for initialization value.
std::vector<xla::XlaOp> dynamic_dims;
const xla::Shape& shape = list_shape.tuple_shapes(i);
auto sub_element = xla::GetTupleElement(list, i);
- for (int64 dim = 0; dim < shape.dimensions_size(); ++dim) {
+ for (int64_t dim = 0; dim < shape.dimensions_size(); ++dim) {
dynamic_dims.push_back(xla::GetDimensionSize(sub_element, dim));
}
list_dynamic_dims.push_back(dynamic_dims);
@@ -411,7 +411,7 @@
auto result = xla::Broadcast(zero, input_shape.dimensions());
// Setting up dynamic dimensions of the broadcast.
- for (int64 i = 0; i < input_shape.dimensions_size(); ++i) {
+ for (int64_t i = 0; i < input_shape.dimensions_size(); ++i) {
if (input_shape.is_dynamic_dimension(i)) {
xla::XlaOp input_dynamic_dim = xla::GetDimensionSize(input, i);
result = xla::SetDimensionSize(result, input_dynamic_dim, i);
diff --git a/tensorflow/compiler/tf2xla/kernels/shape_util.cc b/tensorflow/compiler/tf2xla/kernels/shape_util.cc
index b18e3f9..029d076 100644
--- a/tensorflow/compiler/tf2xla/kernels/shape_util.cc
+++ b/tensorflow/compiler/tf2xla/kernels/shape_util.cc
@@ -27,7 +27,7 @@
if (shape_constant->dtype() == DT_INT32) {
auto vec = shape_constant->vec<int32>();
for (int i = 0; i < dims; ++i) {
- int64 dim_size = input_shape.dim_size(i);
+ int64_t dim_size = input_shape.dim_size(i);
if (!FastBoundsCheck(dim_size, std::numeric_limits<int32>::max())) {
return errors::InvalidArgument(
"Shape with out_type=int32 does not support tensors > int32max",
@@ -38,7 +38,7 @@
} else {
auto vec = shape_constant->vec<int64>();
for (int i = 0; i < dims; ++i) {
- int64 dim_size = input_shape.dim_size(i);
+ int64_t dim_size = input_shape.dim_size(i);
vec(i) = dim_size;
}
}
diff --git a/tensorflow/compiler/tf2xla/kernels/slice_op.cc b/tensorflow/compiler/tf2xla/kernels/slice_op.cc
index cb8b295..f20b588 100644
--- a/tensorflow/compiler/tf2xla/kernels/slice_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/slice_op.cc
@@ -73,8 +73,8 @@
}
for (int i = 0; i < input_dims; ++i) {
- int64 b = begin[i];
- int64 s = wrapped_size[i];
+ int64_t b = begin[i];
+ int64_t s = wrapped_size[i];
if (input_shape.dim_size(i) == 0) {
OP_REQUIRES(ctx, b == 0 && s == 0,
errors::InvalidArgument(
@@ -105,7 +105,7 @@
std::vector<int64> dynamic_size;
OP_REQUIRES_OK(ctx, ctx->ConstantInputAsIntVector(2, &dynamic_size));
- for (int64 i = 0; i < size.size(); ++i) {
+ for (int64_t i = 0; i < size.size(); ++i) {
if (dynamic_size[i] == -1) {
if (size[i] != -1) {
// If there is a dynamic dimension, properly set dimension size of
diff --git a/tensorflow/compiler/tf2xla/kernels/softmax_op.cc b/tensorflow/compiler/tf2xla/kernels/softmax_op.cc
index 7eea268..520c73f 100644
--- a/tensorflow/compiler/tf2xla/kernels/softmax_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/softmax_op.cc
@@ -145,8 +145,8 @@
"Must have at least one class, but got logits shape ",
logits_shape.DebugString()));
- int64 batch_size = logits_shape.dim_size(0);
- int64 depth = logits_shape.dim_size(1);
+ int64_t batch_size = logits_shape.dim_size(0);
+ int64_t depth = logits_shape.dim_size(1);
const DataType logits_type = input_type(0);
const xla::PrimitiveType xla_logits_type = ctx->input_xla_type(0);
diff --git a/tensorflow/compiler/tf2xla/kernels/sort_ops.cc b/tensorflow/compiler/tf2xla/kernels/sort_ops.cc
index bc7ef63..a36526b 100644
--- a/tensorflow/compiler/tf2xla/kernels/sort_ops.cc
+++ b/tensorflow/compiler/tf2xla/kernels/sort_ops.cc
@@ -69,7 +69,7 @@
std::vector<TensorShape> input_shapes;
OP_REQUIRES_OK(context,
context->InputList("inputs", &inputs, &input_shapes));
- int64 dimension;
+ int64_t dimension;
OP_REQUIRES_OK(context,
context->ConstantInputAsIntScalar("dimension", &dimension));
diff --git a/tensorflow/compiler/tf2xla/kernels/spacetobatch_op.cc b/tensorflow/compiler/tf2xla/kernels/spacetobatch_op.cc
index 52bed26..7727800 100644
--- a/tensorflow/compiler/tf2xla/kernels/spacetobatch_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/spacetobatch_op.cc
@@ -52,12 +52,12 @@
// input according to `paddings` to produce `padded` of shape `padded_shape`.
xla::PaddingConfig padding_config;
std::vector<int64> padded_shape(input_shape.begin(), input_shape.end());
- int64 block_num_elems = 1LL;
+ int64_t block_num_elems = 1LL;
padding_config.add_dimensions(); // Don't pad the batch dimension.
for (int i = 0; i < block_rank; ++i) {
auto* dim = padding_config.add_dimensions();
- int64 pad_start = paddings.Get<int64>({i, 0});
- int64 pad_end = paddings.Get<int64>({i, 1});
+ int64_t pad_start = paddings.Get<int64>({i, 0});
+ int64_t pad_end = paddings.Get<int64>({i, 1});
OP_REQUIRES(ctx, pad_start >= 0 && pad_end >= 0,
errors::InvalidArgument("Paddings must be non-negative"));
dim->set_edge_padding_low(pad_start);
@@ -85,7 +85,7 @@
// padded_shape[M] / block_shape[M-1],
// block_shape[M-1]] +
// remaining_shape
- const int64 batch_size = input_shape[0];
+ const int64_t batch_size = input_shape[0];
std::vector<int64> reshaped_padded_shape(input_rank + block_rank);
reshaped_padded_shape[0] = batch_size;
for (int i = 0; i < block_rank; ++i) {
diff --git a/tensorflow/compiler/tf2xla/kernels/spacetodepth_op.cc b/tensorflow/compiler/tf2xla/kernels/spacetodepth_op.cc
index b72f33e..05df476 100644
--- a/tensorflow/compiler/tf2xla/kernels/spacetodepth_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/spacetodepth_op.cc
@@ -76,7 +76,7 @@
transpose_order.reserve(input_rank);
output_shape.reserve(input_rank);
if (data_format == FORMAT_NHWC) {
- int64 block_elems = 1;
+ int64_t block_elems = 1;
for (int i = 0; i < num_spatial_dims; ++i) {
OP_REQUIRES(ctx, input_shape[1 + i] % block_size_ == 0,
errors::InvalidArgument(
@@ -108,7 +108,7 @@
output_shape.push_back(input_shape[feature_dim] * block_elems);
} else {
// FORMAT_NCHW
- int64 block_elems = 1;
+ int64_t block_elems = 1;
for (int i = 0; i < num_spatial_dims; ++i) {
OP_REQUIRES(ctx, input_shape[2 + i] % block_size_ == 0,
errors::InvalidArgument(
diff --git a/tensorflow/compiler/tf2xla/kernels/split_op.cc b/tensorflow/compiler/tf2xla/kernels/split_op.cc
index dbaa84c..06b1268 100644
--- a/tensorflow/compiler/tf2xla/kernels/split_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/split_op.cc
@@ -42,7 +42,7 @@
ctx, TensorShapeUtils::IsScalar(split_dim_shape),
errors::InvalidArgument("split_dim must be a scalar but has rank ",
split_dim_shape.dims()));
- int64 split_dim_orig;
+ int64_t split_dim_orig;
OP_REQUIRES_OK(ctx, ctx->ConstantInputAsIntScalar(0, &split_dim_orig));
int32 split_dim = split_dim_orig < 0 ? split_dim_orig + input_shape.dims()
@@ -78,7 +78,7 @@
for (int i = 0; i < input_shape.dims(); ++i) {
// Initially set up the limits to be the full size of the input:
// the split dimension is filled in below.
- int64 dim = input_shape.dim_size(i);
+ int64_t dim = input_shape.dim_size(i);
limits[i] = dim;
}
@@ -109,10 +109,10 @@
errors::InvalidArgument(
"split_dim_tensor must have exactly one element."));
- int64 split_dim_orig;
+ int64_t split_dim_orig;
OP_REQUIRES_OK(ctx, ctx->ConstantInputAsIntScalar(2, &split_dim_orig));
- int64 split_dim = split_dim_orig < 0 ? split_dim_orig + input_shape.dims()
- : split_dim_orig;
+ int64_t split_dim = split_dim_orig < 0 ? split_dim_orig + input_shape.dims()
+ : split_dim_orig;
OP_REQUIRES(ctx, 0 <= split_dim && split_dim < input_shape.dims(),
errors::InvalidArgument("-input rank(-", input_shape.dims(),
") <= split_dim < input rank (",
@@ -147,7 +147,7 @@
OP_REQUIRES_OK(ctx, ctx->ConstantInputAsIntVector(1, &split_sizes));
for (int i = 0; i < num_split; ++i) {
- int64 slice_size = split_sizes[i];
+ int64_t slice_size = split_sizes[i];
if (slice_size == -1) {
OP_REQUIRES(
ctx, neg_one_dim == -1,
diff --git a/tensorflow/compiler/tf2xla/kernels/spmd_manual_sharding_ops.cc b/tensorflow/compiler/tf2xla/kernels/spmd_manual_sharding_ops.cc
index 330a11e..86dde48 100644
--- a/tensorflow/compiler/tf2xla/kernels/spmd_manual_sharding_ops.cc
+++ b/tensorflow/compiler/tf2xla/kernels/spmd_manual_sharding_ops.cc
@@ -47,12 +47,12 @@
"proto."));
}
auto output_shape = input_shape_or.ValueOrDie();
- int64 rank = output_shape.rank();
+ int64_t rank = output_shape.rank();
if (sharding.type() == xla::OpSharding::OTHER) {
- for (int64 i = 0; i < rank; ++i) {
- int64 partitions_i = sharding.tile_assignment_dimensions(i);
+ for (int64_t i = 0; i < rank; ++i) {
+ int64_t partitions_i = sharding.tile_assignment_dimensions(i);
if (partitions_i == 1) continue;
- int64 dim_size =
+ int64_t dim_size =
xla::CeilOfRatio(output_shape.dimensions(i), partitions_i);
output_shape.set_dimensions(i, dim_size);
}
diff --git a/tensorflow/compiler/tf2xla/kernels/stack_ops.cc b/tensorflow/compiler/tf2xla/kernels/stack_ops.cc
index a93d137..0df5e77 100644
--- a/tensorflow/compiler/tf2xla/kernels/stack_ops.cc
+++ b/tensorflow/compiler/tf2xla/kernels/stack_ops.cc
@@ -96,7 +96,7 @@
}
void Compile(XlaOpKernelContext* ctx) override {
- int64 max_size;
+ int64_t max_size;
OP_REQUIRES_OK(ctx, ctx->ConstantInputAsIntScalar(0, &max_size));
OP_REQUIRES(
ctx, max_size >= 0,
diff --git a/tensorflow/compiler/tf2xla/kernels/strided_slice_op.cc b/tensorflow/compiler/tf2xla/kernels/strided_slice_op.cc
index 7eefd0b..62e941d 100644
--- a/tensorflow/compiler/tf2xla/kernels/strided_slice_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/strided_slice_op.cc
@@ -63,14 +63,14 @@
const std::vector<bool>& ends_are_dynamic) {
const TensorShape input_shape = ctx->InputShape(0);
xla::XlaOp slice = ctx->Input(0);
- for (int64 i = 0; i < ctx->InputShape("begin").dims(); ++i) {
+ for (int64_t i = 0; i < ctx->InputShape("begin").dims(); ++i) {
OP_REQUIRES(ctx, strides[i] == 1,
errors::InvalidArgument(
"Strides have to be one when inputs are not constant."));
}
// Infer static output shape, reconcile unknown dimension with input dim
// size.
- for (int64 i = 0; i < partial_final_shape.dims(); ++i) {
+ for (int64_t i = 0; i < partial_final_shape.dims(); ++i) {
if (partial_final_shape.dim_size(i) == -1) {
// Use input shape to update unknown dimension of partial shape -- if a
// dimension is unknown, we use input shape as bound.
@@ -86,7 +86,7 @@
"shape for strided slice: ",
partial_final_shape.DebugString(),
", output shape must be a compile-time constant"));
- for (int64 i = 0; i < partial_processing_shape.dims(); ++i) {
+ for (int64_t i = 0; i < partial_processing_shape.dims(); ++i) {
if (partial_processing_shape.dim_size(i) == -1) {
// Use input shape to update unknown dimension of partial shape -- if a
// dimension is unknown, we use input shape as bound.
@@ -110,8 +110,8 @@
xla::PaddingConfig padding_config;
bool need_padding = false;
std::vector<bool> result_dims_are_dynamic;
- for (int64 i = 0; i < input_shape.dims(); ++i) {
- int64 sparse_index = shape_spec.processing_to_sparse_mapping[i];
+ for (int64_t i = 0; i < input_shape.dims(); ++i) {
+ int64_t sparse_index = shape_spec.processing_to_sparse_mapping[i];
bool shrink_axis_set = (1 << i) & shape_spec.shrink_axis_dense_mask;
auto* dims = padding_config.add_dimensions();
dims->set_edge_padding_low(0);
@@ -138,12 +138,12 @@
std::vector<xla::XlaOp> start_indices;
std::vector<xla::XlaOp> slice_sizes_dynamic;
xla::Shape input_xla_shape = ctx->InputXlaShape(0).ValueOrDie();
- for (int64 i = 0; i < input_shape.dims(); ++i) {
+ for (int64_t i = 0; i < input_shape.dims(); ++i) {
bool begin_mask = (1 << i) & shape_spec.begin_dense_mask;
bool end_mask = (1 << i) & shape_spec.end_dense_mask;
auto zero = xla::Zero(ctx->builder(), ctx->InputXlaType("begin"));
xla::XlaOp begin_index, end_index;
- int64 sparse_index = shape_spec.processing_to_sparse_mapping[i];
+ int64_t sparse_index = shape_spec.processing_to_sparse_mapping[i];
bool xla_input_is_dynamic = input_xla_shape.is_dynamic_dimension(i);
xla::XlaOp dim_size;
if (xla_input_is_dynamic) {
@@ -185,7 +185,7 @@
slice =
xla::DynamicSlice(slice, start_indices, processing_shape.dim_sizes());
- for (int64 i = 0; i < input_shape.dims(); ++i) {
+ for (int64_t i = 0; i < input_shape.dims(); ++i) {
if (result_dims_are_dynamic[i]) {
slice = xla::SetDimensionSize(slice, slice_sizes_dynamic[i], i);
}
@@ -289,14 +289,14 @@
return;
}
- for (int64 i = 0; i < final_shape.dims(); ++i) {
- int64 input_index = shape_spec.output_to_processing_mapping[i];
+ for (int64_t i = 0; i < final_shape.dims(); ++i) {
+ int64_t input_index = shape_spec.output_to_processing_mapping[i];
if (input_index == -1) {
continue;
}
bool input_is_dynamic = xla_shape.is_dynamic_dimension(input_index);
- int64 sparse_index = shape_spec.output_to_sparse_mapping[i];
+ int64_t sparse_index = shape_spec.output_to_sparse_mapping[i];
bool end_is_dynamic =
sparse_index == -1 ? false : ends_are_dynamic[sparse_index];
bool backward_slice = sparse_index == -1
@@ -404,7 +404,7 @@
end_mask_, ellipsis_mask_, new_axis_mask_, shrink_axis_mask_,
&processing_shape, &final_shape, &dummy, &dummy, &dummy,
&begin, &end, &strides, &shape_spec));
- for (int64 i = 0; i < processing_shape.dims(); ++i) {
+ for (int64_t i = 0; i < processing_shape.dims(); ++i) {
OP_REQUIRES(
ctx, strides[i] == 1,
errors::InvalidArgument("Strides in strided slice grad have to be "
@@ -422,13 +422,13 @@
// dynamic update slice.
auto input_sizes_padded = input_shape.dim_sizes();
bool need_padding = false;
- for (int64 i = 0; i < processing_shape.dims(); ++i) {
+ for (int64_t i = 0; i < processing_shape.dims(); ++i) {
if (processing_shape.dim_size(i) == -1) {
input_sizes_padded[i] *= 2;
need_padding = true;
}
}
- for (int64 i = 0; i < grad_shape.rank(); ++i) {
+ for (int64_t i = 0; i < grad_shape.rank(); ++i) {
// Use grad shape, which is known, to update unknown processing shape.
// Grad shape is the output of the ValidateStridedSliceOp function in
// forward pass, thus we use output_to_processing_mapping.
@@ -440,11 +440,11 @@
std::vector<xla::XlaOp> begins;
begins.reserve(processing_shape.dims());
- for (int64 i = 0; i < input_shape.dims(); ++i) {
+ for (int64_t i = 0; i < input_shape.dims(); ++i) {
bool begin_mask = (1 << i) & shape_spec.begin_dense_mask;
// Similarly, use processing_to_sparse_mapping to find out corresponding
// begin dim of the gradient, as indices for dynamic update slice.
- int64 begin_dim = shape_spec.processing_to_sparse_mapping[i];
+ int64_t begin_dim = shape_spec.processing_to_sparse_mapping[i];
xla::XlaOp begin_index;
auto zero = xla::Zero(ctx->builder(), ctx->InputXlaType("begin"));
if (begin_mask) {
@@ -542,7 +542,7 @@
// not sufficient simply to use "end[i]" to compute the padding in
// cases where the stride does not divide evenly into the interval
// between begin[i] and end[i].)
- int64 size =
+ int64_t size =
dims->edge_padding_low() + processing_shape.dim_size(i) +
(processing_shape.dim_size(i) - 1) * dims->interior_padding();
dims->set_edge_padding_high(input_shape.dim_size(i) - size);
@@ -552,7 +552,7 @@
dims->set_interior_padding(-strides[i] - 1);
// Pad the lower dimension up to the expected input shape.
- int64 size =
+ int64_t size =
dims->edge_padding_high() + processing_shape.dim_size(i) +
(processing_shape.dim_size(i) - 1) * dims->interior_padding();
dims->set_edge_padding_low(input_shape.dim_size(i) - size);
@@ -570,7 +570,7 @@
OP_REQUIRES_OK(ctx, ctx->ConstantInputAsIntVector(0, &dynamic_size));
// Input of strided_slice_op has to have the same shape as output.
DCHECK_EQ(grad_shape.rank(), input_shape.dims());
- for (int64 dim = 0; dim < input_shape.dims(); ++dim) {
+ for (int64_t dim = 0; dim < input_shape.dims(); ++dim) {
DCHECK_EQ(grad_shape.dimensions(dim), input_shape.dim_size(dim));
if (dynamic_size[dim] == -1) {
// Input is a dynamic dimension, set the same dynamic dimension size in
diff --git a/tensorflow/compiler/tf2xla/kernels/tensor_array_ops.cc b/tensorflow/compiler/tf2xla/kernels/tensor_array_ops.cc
index b98b98c..dcdc37b 100644
--- a/tensorflow/compiler/tf2xla/kernels/tensor_array_ops.cc
+++ b/tensorflow/compiler/tf2xla/kernels/tensor_array_ops.cc
@@ -146,7 +146,7 @@
}
void Compile(XlaOpKernelContext* ctx) override {
- int64 size;
+ int64_t size;
OP_REQUIRES_OK(ctx, ctx->ConstantInputAsIntScalar(0, &size));
OP_REQUIRES(ctx, size >= 0,
errors::InvalidArgument("TensorArray size must be >= 0"));
@@ -489,7 +489,7 @@
std::vector<int64> lengths;
OP_REQUIRES_OK(ctx, ctx->ConstantInputAsIntVector(2, &lengths));
- int64 length = 0;
+ int64_t length = 0;
if (!lengths.empty()) {
length = lengths[0];
for (int i = 1; i < lengths.size(); ++i) {
diff --git a/tensorflow/compiler/tf2xla/kernels/tensor_list_ops.cc b/tensorflow/compiler/tf2xla/kernels/tensor_list_ops.cc
index f28aa21..638962e 100644
--- a/tensorflow/compiler/tf2xla/kernels/tensor_list_ops.cc
+++ b/tensorflow/compiler/tf2xla/kernels/tensor_list_ops.cc
@@ -50,7 +50,7 @@
// dynamic XlaOp representing the dynamic size is returned.
StatusOr<std::vector<std::vector<xla::XlaOp>>> GetTensorListDynamicDims(
XlaOpKernelContext* ctx, const xla::Shape& element_shape,
- const xla::Shape& list_shape, int64 num_elements) {
+ const xla::Shape& list_shape, int64_t num_elements) {
std::vector<int64> dynamic_sizes;
// The multiplier can be a dynamic value.
TF_RETURN_IF_ERROR(ctx->ConstantInputAsIntVector(0, &dynamic_sizes));
@@ -69,7 +69,7 @@
dynamic_dims.push_back(
xla::ConstantR0<int32>(ctx->builder(), num_elements));
}
- for (int64 dim = 0; dim < element_shape.dimensions_size(); ++dim) {
+ for (int64_t dim = 0; dim < element_shape.dimensions_size(); ++dim) {
if (dims_are_dynamic[dim]) {
auto dynamic_dim_size = xla::Slice(ctx->Input(0), {dim}, {dim + 1}, {1});
dynamic_dim_size = xla::Reshape(dynamic_dim_size, {});
@@ -89,7 +89,7 @@
explicit TensorListLengthOp(OpKernelConstruction* ctx) : XlaOpKernel(ctx) {}
void Compile(XlaOpKernelContext* ctx) override {
- int64 leading_dim;
+ int64_t leading_dim;
xla::XlaOp leading_dim_size;
bool leading_dim_is_dynamic;
OP_REQUIRES_OK(ctx, GetLeadingDimForTensorList(ctx->Input(0), &leading_dim,
@@ -143,7 +143,7 @@
}
void Compile(XlaOpKernelContext* ctx) override {
- int64 num_elements;
+ int64_t num_elements;
OP_REQUIRES_OK(ctx, ctx->ConstantInputAsIntScalar(1, &num_elements));
bool num_element_is_dynamic;
OP_REQUIRES_OK(
@@ -213,7 +213,7 @@
}
void Compile(XlaOpKernelContext* ctx) override {
- int64 max_num_elements;
+ int64_t max_num_elements;
OP_REQUIRES_OK(ctx, ctx->ConstantInputAsIntScalar(1, &max_num_elements));
bool num_element_is_dynamic;
OP_REQUIRES_OK(
@@ -314,7 +314,7 @@
break;
case DT_INT32: {
std::vector<int32> size;
- for (int64 s : list_shape.dimensions()) {
+ for (int64_t s : list_shape.dimensions()) {
size.push_back(s);
}
ctx->SetOutput(0, xla::ConstantR1<int32>(b, size));
@@ -489,8 +489,8 @@
OP_REQUIRES(
ctx, element_dims.size() > 1,
errors::Unimplemented("TensorList of scalars is not supported"));
- int64 num_elements = element_dims[0];
- int64 tensor_lengths = element_dims[1];
+ int64_t num_elements = element_dims[0];
+ int64_t tensor_lengths = element_dims[1];
std::vector<int64> new_dims = {num_elements * tensor_lengths};
@@ -540,8 +540,8 @@
OP_REQUIRES_OK(ctx, ctx->ConstantInputAsIntVector(2, &lengths));
OP_REQUIRES(ctx, !lengths.empty(),
errors::Unimplemented("Length has to be non-empty"));
- int64 length = lengths[0];
- for (int64 len : lengths) {
+ int64_t length = lengths[0];
+ for (int64_t len : lengths) {
OP_REQUIRES(ctx, len == length,
errors::Unimplemented("All lengths have to be the same"));
}
diff --git a/tensorflow/compiler/tf2xla/kernels/tensor_list_utils.cc b/tensorflow/compiler/tf2xla/kernels/tensor_list_utils.cc
index 156f9bf..705b803 100644
--- a/tensorflow/compiler/tf2xla/kernels/tensor_list_utils.cc
+++ b/tensorflow/compiler/tf2xla/kernels/tensor_list_utils.cc
@@ -189,7 +189,7 @@
}
xla::XlaOp BuildUninitializedTensorList(xla::XlaBuilder* b,
- int64 leading_dimension,
+ int64_t leading_dimension,
bool leading_size_is_dynamic,
xla::XlaOp leading_dim_size) {
auto zero =
@@ -223,7 +223,7 @@
}
Status GetTensorListShapeFromElementTensorListShape(
- const xla::Shape& element_tensor_list_shape, int64 leading_dim,
+ const xla::Shape& element_tensor_list_shape, int64_t leading_dim,
bool leading_dim_is_dynamic, xla::Shape* tensor_list_shape) {
std::vector<xla::Shape> shapes;
int tuple_size = xla::ShapeUtil::TupleElementCount(element_tensor_list_shape);
@@ -245,7 +245,7 @@
}
Status GetTensorListShapeFromElementShape(const xla::Shape& element_shape,
- int64 leading_dim,
+ int64_t leading_dim,
bool leading_dim_is_dynamic,
xla::Shape* tensor_list_shape) {
if (!element_shape.IsArray()) {
@@ -280,7 +280,7 @@
xla::ConstantLiteral(b, xla::LiteralUtil::Zero(shape.element_type()));
xla::XlaOp zeros = xla::Broadcast(zero, shape.dimensions());
TF_RET_CHECK(dynamic_dims[i].size() == shape.dimensions_size());
- for (int64 dim = 0; dim < shape.dimensions_size(); ++dim) {
+ for (int64_t dim = 0; dim < shape.dimensions_size(); ++dim) {
zeros = xla::SetDimensionSize(zeros, dynamic_dims[i][dim], dim);
}
elements.push_back(zeros);
@@ -296,7 +296,7 @@
Status GetInitializedTensorListForElement(xla::XlaOp list, xla::XlaOp element,
bool element_is_tensor_list,
xla::XlaOp* initialized_list) {
- int64 leading_dim;
+ int64_t leading_dim;
xla::XlaOp leading_dim_dynamic_size;
bool leading_dim_is_dynamic;
TF_RETURN_IF_ERROR(GetLeadingDimForTensorList(
@@ -329,7 +329,7 @@
// Prepare dynamic dimension dimensions for zero tensor list. The dynamic
// sizes are created by reading the dynamic dimension size of sub-elements.
std::vector<std::vector<xla::XlaOp>> list_dynamic_dims;
- for (int64 i = 0; i < list_shape.tuple_shapes_size() - 1; ++i) {
+ for (int64_t i = 0; i < list_shape.tuple_shapes_size() - 1; ++i) {
std::vector<xla::XlaOp> dynamic_dims;
const xla::Shape& shape = list_shape.tuple_shapes(i);
dynamic_dims.push_back(leading_dim_dynamic_size);
@@ -339,7 +339,7 @@
} else {
sub_element = element;
}
- for (int64 dim = 0; dim < shape.dimensions_size() - 1; ++dim) {
+ for (int64_t dim = 0; dim < shape.dimensions_size() - 1; ++dim) {
dynamic_dims.push_back(xla::GetDimensionSize(sub_element, dim));
}
list_dynamic_dims.push_back(dynamic_dims);
@@ -525,7 +525,7 @@
xla::XlaOp read = xla::DynamicSlice(list_part, start_indices, slice_shape);
// Propagate dynamic dimensions from buffer to the sliced buffer, except for
// leading dimension (which is always static 1).
- for (int64 i = 1; i < buffer_shape.dimensions_size(); ++i) {
+ for (int64_t i = 1; i < buffer_shape.dimensions_size(); ++i) {
if (buffer_shape.is_dynamic_dimension(i)) {
auto buffer = xla::GetTupleElement(list, 0);
auto gds = xla::GetDimensionSize(buffer, i);
diff --git a/tensorflow/compiler/tf2xla/kernels/tensor_list_utils.h b/tensorflow/compiler/tf2xla/kernels/tensor_list_utils.h
index 549ccd5..3f13d16 100644
--- a/tensorflow/compiler/tf2xla/kernels/tensor_list_utils.h
+++ b/tensorflow/compiler/tf2xla/kernels/tensor_list_utils.h
@@ -60,7 +60,7 @@
// Returns an uninitialized TensorList.
xla::XlaOp BuildUninitializedTensorList(xla::XlaBuilder* b,
- int64 leading_dimension,
+ int64_t leading_dimension,
bool leading_size_is_dynamic,
xla::XlaOp leading_dim_size);
@@ -74,7 +74,7 @@
// Returns TensorList shape for the element shape.
// Element shape must be a normal tensor shape.
Status GetTensorListShapeFromElementShape(const xla::Shape& element_shape,
- int64 leading_dim,
+ int64_t leading_dim,
bool leading_dim_is_dynamic,
xla::Shape* tensor_list_shape);
diff --git a/tensorflow/compiler/tf2xla/kernels/tile_ops.cc b/tensorflow/compiler/tf2xla/kernels/tile_ops.cc
index 5989eb5..9c98a91 100644
--- a/tensorflow/compiler/tf2xla/kernels/tile_ops.cc
+++ b/tensorflow/compiler/tf2xla/kernels/tile_ops.cc
@@ -70,7 +70,7 @@
xla::ValueInferenceMode::kUpperBound));
std::vector<int64> output_dims(input_shape.dims());
- for (int64 i = 0; i < input_shape.dims(); ++i) {
+ for (int64_t i = 0; i < input_shape.dims(); ++i) {
OP_REQUIRES(ctx, multiples_bounds[i] >= 0,
errors::InvalidArgument("Expected multiples[", i,
"] >= 0, but got ", output_dims[i]));
@@ -89,7 +89,7 @@
if (all_multiples_are_static) {
// If all multiples are 1, than the input is the same as the output.
if (absl::c_all_of(multiples_bounds,
- [](int64 multiple) { return multiple == 1; })) {
+ [](int64_t multiple) { return multiple == 1; })) {
ctx->SetOutput(0, input);
return;
}
@@ -102,7 +102,7 @@
if (!all_multiples_are_static) {
// Some values of multiples are unknown at compile time, this is a dynamic
// tile op. We need to call set dimension size.
- for (int64 i = 0; i < multiples_are_dynamic.size(); ++i) {
+ for (int64_t i = 0; i < multiples_are_dynamic.size(); ++i) {
if (!multiples_are_dynamic[i]) {
continue;
}
diff --git a/tensorflow/compiler/tf2xla/kernels/topk_op.cc b/tensorflow/compiler/tf2xla/kernels/topk_op.cc
index b4c2a37..df5b181 100644
--- a/tensorflow/compiler/tf2xla/kernels/topk_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/topk_op.cc
@@ -31,7 +31,7 @@
}
void Compile(XlaOpKernelContext* context) override {
- int64 k;
+ int64_t k;
OP_REQUIRES_OK(context, context->ConstantInputAsIntScalar(1, &k));
OP_REQUIRES(context, k >= 0,
errors::InvalidArgument("Need k >= 0, got ", k));
diff --git a/tensorflow/compiler/tf2xla/kernels/unique_op.cc b/tensorflow/compiler/tf2xla/kernels/unique_op.cc
index 393b84a..5457c67 100644
--- a/tensorflow/compiler/tf2xla/kernels/unique_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/unique_op.cc
@@ -101,7 +101,7 @@
xla::XlaComputation BuildOuterLoopCond(XlaOpKernelContext* ctx,
xla::Shape outer_loop_shape,
- int64 list_size) {
+ int64_t list_size) {
std::unique_ptr<xla::XlaBuilder> builder =
ctx->builder()->CreateSubBuilder("outer_loop_body");
auto param =
@@ -150,7 +150,7 @@
// common), DCE will only keep the fastpath.
auto iota_shape = input_shape;
iota_shape.set_element_type(xla::S32);
- int64 input_count = input_shape.dimensions(0);
+ int64_t input_count = input_shape.dimensions(0);
xla::XlaOp iota = xla::Iota(ctx->builder(), iota_shape, 0);
std::vector<xla::XlaOp> to_sort = {input, iota};
std::vector<xla::PrimitiveType> types_to_sort = {input_shape.element_type(),
@@ -226,7 +226,7 @@
OP_REQUIRES(ctx, input_shape.rank() == 1,
xla::InvalidArgument("Input to UniqueOp must be rank-1: %s",
input_shape.ToString()));
- int64 list_size = input_shape.dimensions()[0];
+ int64_t list_size = input_shape.dimensions()[0];
auto indices_shape =
xla::ShapeUtil::ChangeElementType(input_shape, xla::S32);
auto outer_loop_shape = xla::ShapeUtil::MakeTupleShape(
diff --git a/tensorflow/compiler/tf2xla/kernels/where_op.cc b/tensorflow/compiler/tf2xla/kernels/where_op.cc
index d0ee79c..b1d18b1 100644
--- a/tensorflow/compiler/tf2xla/kernels/where_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/where_op.cc
@@ -44,7 +44,7 @@
auto iota_shape = input_shape.ValueOrDie();
iota_shape.set_element_type(xla::S32);
- int64 flattened_size = xla::Product(iota_shape.dimensions());
+ int64_t flattened_size = xla::Product(iota_shape.dimensions());
xla::XlaOp reshaped_condition = xla::Reshape(condition, {flattened_size});
xla::XlaOp zeros = xla::ZerosLike(reshaped_condition);
xla::XlaOp zeros_int = xla::ConvertElementType(zeros, xla::S32);
@@ -60,7 +60,7 @@
std::vector<xla::PrimitiveType> types_to_sort = {xla::S32};
// Generate iota for each dimension, which after combining becomes
// indices of each element.
- for (int64 axis = 0; axis < iota_shape.rank(); ++axis) {
+ for (int64_t axis = 0; axis < iota_shape.rank(); ++axis) {
xla::XlaOp iota = xla::Iota(ctx->builder(), iota_shape, axis);
xla::XlaOp reshaped = xla::Reshape(iota, {flattened_size});
to_sort.push_back(reshaped);
@@ -72,7 +72,7 @@
/*dimension=*/0,
/*is_stable=*/true);
std::vector<xla::XlaOp> to_concat;
- for (int64 i = 0; i < iota_shape.rank(); ++i) {
+ for (int64_t i = 0; i < iota_shape.rank(); ++i) {
xla::XlaOp index_single_dim = xla::GetTupleElement(sorted, i + 1);
to_concat.push_back(xla::Reshape(index_single_dim, {flattened_size, 1}));
}
diff --git a/tensorflow/compiler/tf2xla/kernels/while_op.cc b/tensorflow/compiler/tf2xla/kernels/while_op.cc
index 6b22b37..3f6072a 100644
--- a/tensorflow/compiler/tf2xla/kernels/while_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/while_op.cc
@@ -521,7 +521,7 @@
if (input_shape != list_shape) {
// Prepare dynamic dimensions for element shapes.
std::vector<std::vector<xla::XlaOp>> list_dynamic_dims;
- for (int64 i = 0; i < list_shape.tuple_shapes_size() - 1; ++i) {
+ for (int64_t i = 0; i < list_shape.tuple_shapes_size() - 1; ++i) {
std::vector<xla::XlaOp> dynamic_dims;
const xla::Shape& shape = list_shape.tuple_shapes(i);
@@ -541,7 +541,7 @@
// Set dynamic dimension size to 0 for element value. Inside the while
// loop, TensorlistSetItem will properly set the element shape's
// dynamic dimension.
- for (int64 dim = 1; dim < shape.dimensions_size(); ++dim) {
+ for (int64_t dim = 1; dim < shape.dimensions_size(); ++dim) {
int32 dim_size = shape.dimensions(dim);
if (shape.is_dynamic_dimension(dim)) {
dim_size = 0;
diff --git a/tensorflow/compiler/tf2xla/kernels/xla_conv_op.cc b/tensorflow/compiler/tf2xla/kernels/xla_conv_op.cc
index 4b84d60..43fe5f9 100644
--- a/tensorflow/compiler/tf2xla/kernels/xla_conv_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/xla_conv_op.cc
@@ -49,7 +49,7 @@
std::vector<int64> window_strides;
std::vector<int64> lhs_dilation;
std::vector<int64> rhs_dilation;
- int64 feature_group_count;
+ int64_t feature_group_count;
OP_REQUIRES_OK(context, context->ConstantInputAsIntVector("window_strides",
&window_strides));
OP_REQUIRES_OK(context, context->ConstantInputAsIntVector("lhs_dilation",
diff --git a/tensorflow/compiler/tf2xla/kernels/xla_pad_op.cc b/tensorflow/compiler/tf2xla/kernels/xla_pad_op.cc
index d35101a..5933c31 100644
--- a/tensorflow/compiler/tf2xla/kernels/xla_pad_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/xla_pad_op.cc
@@ -63,7 +63,7 @@
"rank (",
padding_interior.size(), " vs. ", rank, ")"));
- auto non_negative = [](int64 x) { return x >= 0; };
+ auto non_negative = [](int64_t x) { return x >= 0; };
OP_REQUIRES(
context, absl::c_all_of(padding_interior, non_negative),
errors::InvalidArgument("padding_interior must be non-negative, got [",
diff --git a/tensorflow/compiler/tf2xla/kernels/xla_reduce_op.cc b/tensorflow/compiler/tf2xla/kernels/xla_reduce_op.cc
index 1e09efc..d97b670 100644
--- a/tensorflow/compiler/tf2xla/kernels/xla_reduce_op.cc
+++ b/tensorflow/compiler/tf2xla/kernels/xla_reduce_op.cc
@@ -62,7 +62,7 @@
errors::InvalidArgument("init_value must be a scalar but got ",
init_value_shape.DebugString()));
- auto dim_in_range = [rank](int64 dim) { return dim >= 0 && dim < rank; };
+ auto dim_in_range = [rank](int64_t dim) { return dim >= 0 && dim < rank; };
OP_REQUIRES(context,
rank >= dimensions_to_reduce_.size() &&
absl::c_all_of(dimensions_to_reduce_, dim_in_range),
@@ -217,7 +217,7 @@
xla::ShapeUtil::HumanString(expected_shape), " got ",
xla::ShapeUtil::HumanString(reducer.xla_output_shape)));
- auto dim_in_range = [rank](int64 dim) { return dim >= 0 && dim < rank; };
+ auto dim_in_range = [rank](int64_t dim) { return dim >= 0 && dim < rank; };
OP_REQUIRES(context,
rank >= dimensions_to_reduce_.size() &&
absl::c_all_of(dimensions_to_reduce_, dim_in_range),
