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android / platform / external / swiftshader / 06a0e23bbc8ff4dbb137387adee503bd307a8759 / . / third_party / llvm-7.0 / configs / common / lib / Target / Mips / MipsGenMCCodeEmitter.inc
blob: b66faa35e0ea9742fed7f683a95fd25769b6f942 [file] [log] [blame]
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|* *|
|* Machine Code Emitter *|
|* *|
|* Automatically generated file, do not edit! *|
|* *|
\*===----------------------------------------------------------------------===*/
uint64_t MipsMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
static const uint64_t InstBits[] = {
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(0),
UINT64_C(2080375378), // ABSQ_S_PH
UINT64_C(4412), // ABSQ_S_PH_MM
UINT64_C(2080374866), // ABSQ_S_QB
UINT64_C(316), // ABSQ_S_QB_MMR2
UINT64_C(2080375890), // ABSQ_S_W
UINT64_C(8508), // ABSQ_S_W_MM
UINT64_C(32), // ADD
UINT64_C(3959422976), // ADDIUPC
UINT64_C(2013265920), // ADDIUPC_MM
UINT64_C(2013265920), // ADDIUPC_MMR6
UINT64_C(27649), // ADDIUR1SP_MM
UINT64_C(27648), // ADDIUR2_MM
UINT64_C(19456), // ADDIUS5_MM
UINT64_C(19457), // ADDIUSP_MM
UINT64_C(805306368), // ADDIU_MMR6
UINT64_C(2080375320), // ADDQH_PH
UINT64_C(77), // ADDQH_PH_MMR2
UINT64_C(2080375448), // ADDQH_R_PH
UINT64_C(1101), // ADDQH_R_PH_MMR2
UINT64_C(2080375960), // ADDQH_R_W
UINT64_C(1165), // ADDQH_R_W_MMR2
UINT64_C(2080375832), // ADDQH_W
UINT64_C(141), // ADDQH_W_MMR2
UINT64_C(2080375440), // ADDQ_PH
UINT64_C(13), // ADDQ_PH_MM
UINT64_C(2080375696), // ADDQ_S_PH
UINT64_C(1037), // ADDQ_S_PH_MM
UINT64_C(2080376208), // ADDQ_S_W
UINT64_C(773), // ADDQ_S_W_MM
UINT64_C(2080375824), // ADDSC
UINT64_C(901), // ADDSC_MM
UINT64_C(2021654544), // ADDS_A_B
UINT64_C(2027946000), // ADDS_A_D
UINT64_C(2023751696), // ADDS_A_H
UINT64_C(2025848848), // ADDS_A_W
UINT64_C(2030043152), // ADDS_S_B
UINT64_C(2036334608), // ADDS_S_D
UINT64_C(2032140304), // ADDS_S_H
UINT64_C(2034237456), // ADDS_S_W
UINT64_C(2038431760), // ADDS_U_B
UINT64_C(2044723216), // ADDS_U_D
UINT64_C(2040528912), // ADDS_U_H
UINT64_C(2042626064), // ADDS_U_W
UINT64_C(1024), // ADDU16_MM
UINT64_C(1024), // ADDU16_MMR6
UINT64_C(2080374808), // ADDUH_QB
UINT64_C(333), // ADDUH_QB_MMR2
UINT64_C(2080374936), // ADDUH_R_QB
UINT64_C(1357), // ADDUH_R_QB_MMR2
UINT64_C(336), // ADDU_MMR6
UINT64_C(2080375312), // ADDU_PH
UINT64_C(269), // ADDU_PH_MMR2
UINT64_C(2080374800), // ADDU_QB
UINT64_C(205), // ADDU_QB_MM
UINT64_C(2080375568), // ADDU_S_PH
UINT64_C(1293), // ADDU_S_PH_MMR2
UINT64_C(2080375056), // ADDU_S_QB
UINT64_C(1229), // ADDU_S_QB_MM
UINT64_C(2013265926), // ADDVI_B
UINT64_C(2019557382), // ADDVI_D
UINT64_C(2015363078), // ADDVI_H
UINT64_C(2017460230), // ADDVI_W
UINT64_C(2013265934), // ADDV_B
UINT64_C(2019557390), // ADDV_D
UINT64_C(2015363086), // ADDV_H
UINT64_C(2017460238), // ADDV_W
UINT64_C(2080375888), // ADDWC
UINT64_C(965), // ADDWC_MM
UINT64_C(2013265936), // ADD_A_B
UINT64_C(2019557392), // ADD_A_D
UINT64_C(2015363088), // ADD_A_H
UINT64_C(2017460240), // ADD_A_W
UINT64_C(272), // ADD_MM
UINT64_C(272), // ADD_MMR6
UINT64_C(536870912), // ADDi
UINT64_C(268435456), // ADDi_MM
UINT64_C(603979776), // ADDiu
UINT64_C(805306368), // ADDiu_MM
UINT64_C(33), // ADDu
UINT64_C(336), // ADDu_MM
UINT64_C(2080375328), // ALIGN
UINT64_C(31), // ALIGN_MMR6
UINT64_C(3961454592), // ALUIPC
UINT64_C(2015297536), // ALUIPC_MMR6
UINT64_C(36), // AND
UINT64_C(17536), // AND16_MM
UINT64_C(17409), // AND16_MMR6
UINT64_C(36), // AND64
UINT64_C(11264), // ANDI16_MM
UINT64_C(11264), // ANDI16_MMR6
UINT64_C(2013265920), // ANDI_B
UINT64_C(3489660928), // ANDI_MMR6
UINT64_C(592), // AND_MM
UINT64_C(592), // AND_MMR6
UINT64_C(2013265950), // AND_V
UINT64_C(805306368), // ANDi
UINT64_C(805306368), // ANDi64
UINT64_C(3489660928), // ANDi_MM
UINT64_C(2080374833), // APPEND
UINT64_C(533), // APPEND_MMR2
UINT64_C(2046820369), // ASUB_S_B
UINT64_C(2053111825), // ASUB_S_D
UINT64_C(2048917521), // ASUB_S_H
UINT64_C(2051014673), // ASUB_S_W
UINT64_C(2055208977), // ASUB_U_B
UINT64_C(2061500433), // ASUB_U_D
UINT64_C(2057306129), // ASUB_U_H
UINT64_C(2059403281), // ASUB_U_W
UINT64_C(1006632960), // AUI
UINT64_C(3961389056), // AUIPC
UINT64_C(2015232000), // AUIPC_MMR6
UINT64_C(268435456), // AUI_MMR6
UINT64_C(2063597584), // AVER_S_B
UINT64_C(2069889040), // AVER_S_D
UINT64_C(2065694736), // AVER_S_H
UINT64_C(2067791888), // AVER_S_W
UINT64_C(2071986192), // AVER_U_B
UINT64_C(2078277648), // AVER_U_D
UINT64_C(2074083344), // AVER_U_H
UINT64_C(2076180496), // AVER_U_W
UINT64_C(2046820368), // AVE_S_B
UINT64_C(2053111824), // AVE_S_D
UINT64_C(2048917520), // AVE_S_H
UINT64_C(2051014672), // AVE_S_W
UINT64_C(2055208976), // AVE_U_B
UINT64_C(2061500432), // AVE_U_D
UINT64_C(2057306128), // AVE_U_H
UINT64_C(2059403280), // AVE_U_W
UINT64_C(4026550272), // AddiuRxImmX16
UINT64_C(4026533888), // AddiuRxPcImmX16
UINT64_C(18432), // AddiuRxRxImm16
UINT64_C(4026550272), // AddiuRxRxImmX16
UINT64_C(4026548224), // AddiuRxRyOffMemX16
UINT64_C(25344), // AddiuSpImm16
UINT64_C(4026544896), // AddiuSpImmX16
UINT64_C(57345), // AdduRxRyRz16
UINT64_C(59404), // AndRxRxRy16
UINT64_C(52224), // B16_MM
UINT64_C(1879048232), // BADDu
UINT64_C(68222976), // BAL
UINT64_C(3892314112), // BALC
UINT64_C(3019898880), // BALC_MMR6
UINT64_C(2080375857), // BALIGN
UINT64_C(2236), // BALIGN_MMR2
UINT64_C(3355443200), // BBIT0
UINT64_C(3623878656), // BBIT032
UINT64_C(3892314112), // BBIT1
UINT64_C(4160749568), // BBIT132
UINT64_C(3355443200), // BC
UINT64_C(52224), // BC16_MMR6
UINT64_C(1159725056), // BC1EQZ
UINT64_C(1090519040), // BC1EQZC_MMR6
UINT64_C(1157627904), // BC1F
UINT64_C(1157758976), // BC1FL
UINT64_C(1132462080), // BC1F_MM
UINT64_C(1168113664), // BC1NEZ
UINT64_C(1092616192), // BC1NEZC_MMR6
UINT64_C(1157693440), // BC1T
UINT64_C(1157824512), // BC1TL
UINT64_C(1134559232), // BC1T_MM
UINT64_C(1226833920), // BC2EQZ
UINT64_C(1094713344), // BC2EQZC_MMR6
UINT64_C(1235222528), // BC2NEZ
UINT64_C(1096810496), // BC2NEZC_MMR6
UINT64_C(2045771785), // BCLRI_B
UINT64_C(2038431753), // BCLRI_D
UINT64_C(2044723209), // BCLRI_H
UINT64_C(2042626057), // BCLRI_W
UINT64_C(2038431757), // BCLR_B
UINT64_C(2044723213), // BCLR_D
UINT64_C(2040528909), // BCLR_H
UINT64_C(2042626061), // BCLR_W
UINT64_C(2483027968), // BC_MMR6
UINT64_C(268435456), // BEQ
UINT64_C(268435456), // BEQ64
UINT64_C(536870912), // BEQC
UINT64_C(536870912), // BEQC64
UINT64_C(1946157056), // BEQC_MMR6
UINT64_C(1342177280), // BEQL
UINT64_C(35840), // BEQZ16_MM
UINT64_C(536870912), // BEQZALC
UINT64_C(1946157056), // BEQZALC_MMR6
UINT64_C(3623878656), // BEQZC
UINT64_C(35840), // BEQZC16_MMR6
UINT64_C(3623878656), // BEQZC64
UINT64_C(1088421888), // BEQZC_MM
UINT64_C(2147483648), // BEQZC_MMR6
UINT64_C(2483027968), // BEQ_MM
UINT64_C(1476395008), // BGEC
UINT64_C(1476395008), // BGEC64
UINT64_C(4093640704), // BGEC_MMR6
UINT64_C(402653184), // BGEUC
UINT64_C(402653184), // BGEUC64
UINT64_C(3221225472), // BGEUC_MMR6
UINT64_C(67174400), // BGEZ
UINT64_C(67174400), // BGEZ64
UINT64_C(68222976), // BGEZAL
UINT64_C(402653184), // BGEZALC
UINT64_C(3221225472), // BGEZALC_MMR6
UINT64_C(68354048), // BGEZALL
UINT64_C(1113587712), // BGEZALS_MM
UINT64_C(1080033280), // BGEZAL_MM
UINT64_C(1476395008), // BGEZC
UINT64_C(1476395008), // BGEZC64
UINT64_C(4093640704), // BGEZC_MMR6
UINT64_C(67305472), // BGEZL
UINT64_C(1077936128), // BGEZ_MM
UINT64_C(469762048), // BGTZ
UINT64_C(469762048), // BGTZ64
UINT64_C(469762048), // BGTZALC
UINT64_C(3758096384), // BGTZALC_MMR6
UINT64_C(1543503872), // BGTZC
UINT64_C(1543503872), // BGTZC64
UINT64_C(3556769792), // BGTZC_MMR6
UINT64_C(1543503872), // BGTZL
UINT64_C(1086324736), // BGTZ_MM
UINT64_C(2070937609), // BINSLI_B
UINT64_C(2063597577), // BINSLI_D
UINT64_C(2069889033), // BINSLI_H
UINT64_C(2067791881), // BINSLI_W
UINT64_C(2063597581), // BINSL_B
UINT64_C(2069889037), // BINSL_D
UINT64_C(2065694733), // BINSL_H
UINT64_C(2067791885), // BINSL_W
UINT64_C(2079326217), // BINSRI_B
UINT64_C(2071986185), // BINSRI_D
UINT64_C(2078277641), // BINSRI_H
UINT64_C(2076180489), // BINSRI_W
UINT64_C(2071986189), // BINSR_B
UINT64_C(2078277645), // BINSR_D
UINT64_C(2074083341), // BINSR_H
UINT64_C(2076180493), // BINSR_W
UINT64_C(2080376530), // BITREV
UINT64_C(12604), // BITREV_MM
UINT64_C(2080374816), // BITSWAP
UINT64_C(2876), // BITSWAP_MMR6
UINT64_C(402653184), // BLEZ
UINT64_C(402653184), // BLEZ64
UINT64_C(402653184), // BLEZALC
UINT64_C(3221225472), // BLEZALC_MMR6
UINT64_C(1476395008), // BLEZC
UINT64_C(1476395008), // BLEZC64
UINT64_C(4093640704), // BLEZC_MMR6
UINT64_C(1476395008), // BLEZL
UINT64_C(1082130432), // BLEZ_MM
UINT64_C(1543503872), // BLTC
UINT64_C(1543503872), // BLTC64
UINT64_C(3556769792), // BLTC_MMR6
UINT64_C(469762048), // BLTUC
UINT64_C(469762048), // BLTUC64
UINT64_C(3758096384), // BLTUC_MMR6
UINT64_C(67108864), // BLTZ
UINT64_C(67108864), // BLTZ64
UINT64_C(68157440), // BLTZAL
UINT64_C(469762048), // BLTZALC
UINT64_C(3758096384), // BLTZALC_MMR6
UINT64_C(68288512), // BLTZALL
UINT64_C(1109393408), // BLTZALS_MM
UINT64_C(1075838976), // BLTZAL_MM
UINT64_C(1543503872), // BLTZC
UINT64_C(1543503872), // BLTZC64
UINT64_C(3556769792), // BLTZC_MMR6
UINT64_C(67239936), // BLTZL
UINT64_C(1073741824), // BLTZ_MM
UINT64_C(2013265921), // BMNZI_B
UINT64_C(2021654558), // BMNZ_V
UINT64_C(2030043137), // BMZI_B
UINT64_C(2023751710), // BMZ_V
UINT64_C(335544320), // BNE
UINT64_C(335544320), // BNE64
UINT64_C(1610612736), // BNEC
UINT64_C(1610612736), // BNEC64
UINT64_C(2080374784), // BNEC_MMR6
UINT64_C(2062549001), // BNEGI_B
UINT64_C(2055208969), // BNEGI_D
UINT64_C(2061500425), // BNEGI_H
UINT64_C(2059403273), // BNEGI_W
UINT64_C(2055208973), // BNEG_B
UINT64_C(2061500429), // BNEG_D
UINT64_C(2057306125), // BNEG_H
UINT64_C(2059403277), // BNEG_W
UINT64_C(1409286144), // BNEL
UINT64_C(44032), // BNEZ16_MM
UINT64_C(1610612736), // BNEZALC
UINT64_C(2080374784), // BNEZALC_MMR6
UINT64_C(4160749568), // BNEZC
UINT64_C(44032), // BNEZC16_MMR6
UINT64_C(4160749568), // BNEZC64
UINT64_C(1084227584), // BNEZC_MM
UINT64_C(2684354560), // BNEZC_MMR6
UINT64_C(3019898880), // BNE_MM
UINT64_C(1610612736), // BNVC
UINT64_C(2080374784), // BNVC_MMR6
UINT64_C(1199570944), // BNZ_B
UINT64_C(1205862400), // BNZ_D
UINT64_C(1201668096), // BNZ_H
UINT64_C(1172307968), // BNZ_V
UINT64_C(1203765248), // BNZ_W
UINT64_C(536870912), // BOVC
UINT64_C(1946157056), // BOVC_MMR6
UINT64_C(68943872), // BPOSGE32
UINT64_C(1126170624), // BPOSGE32C_MMR3
UINT64_C(1130364928), // BPOSGE32_MM
UINT64_C(13), // BREAK
UINT64_C(18048), // BREAK16_MM
UINT64_C(17435), // BREAK16_MMR6
UINT64_C(7), // BREAK_MM
UINT64_C(7), // BREAK_MMR6
UINT64_C(2046820353), // BSELI_B
UINT64_C(2025848862), // BSEL_V
UINT64_C(2054160393), // BSETI_B
UINT64_C(2046820361), // BSETI_D
UINT64_C(2053111817), // BSETI_H
UINT64_C(2051014665), // BSETI_W
UINT64_C(2046820365), // BSET_B
UINT64_C(2053111821), // BSET_D
UINT64_C(2048917517), // BSET_H
UINT64_C(2051014669), // BSET_W
UINT64_C(1191182336), // BZ_B
UINT64_C(1197473792), // BZ_D
UINT64_C(1193279488), // BZ_H
UINT64_C(1163919360), // BZ_V
UINT64_C(1195376640), // BZ_W
UINT64_C(8192), // BeqzRxImm16
UINT64_C(4026540032), // BeqzRxImmX16
UINT64_C(4096), // Bimm16
UINT64_C(4026535936), // BimmX16
UINT64_C(10240), // BnezRxImm16
UINT64_C(4026542080), // BnezRxImmX16
UINT64_C(59397), // Break16
UINT64_C(24576), // Bteqz16
UINT64_C(4026544128), // BteqzX16
UINT64_C(24832), // Btnez16
UINT64_C(4026544384), // BtnezX16
UINT64_C(3154116608), // CACHE
UINT64_C(2080374811), // CACHEE
UINT64_C(1610655232), // CACHEE_MM
UINT64_C(536895488), // CACHE_MM
UINT64_C(536895488), // CACHE_MMR6
UINT64_C(2080374821), // CACHE_R6
UINT64_C(1176502282), // CEIL_L_D64
UINT64_C(1409307451), // CEIL_L_D_MMR6
UINT64_C(1174405130), // CEIL_L_S
UINT64_C(1409291067), // CEIL_L_S_MMR6
UINT64_C(1176502286), // CEIL_W_D32
UINT64_C(1176502286), // CEIL_W_D64
UINT64_C(1409309499), // CEIL_W_D_MMR6
UINT64_C(1409309499), // CEIL_W_MM
UINT64_C(1174405134), // CEIL_W_S
UINT64_C(1409293115), // CEIL_W_S_MM
UINT64_C(1409293115), // CEIL_W_S_MMR6
UINT64_C(2013265927), // CEQI_B
UINT64_C(2019557383), // CEQI_D
UINT64_C(2015363079), // CEQI_H
UINT64_C(2017460231), // CEQI_W
UINT64_C(2013265935), // CEQ_B
UINT64_C(2019557391), // CEQ_D
UINT64_C(2015363087), // CEQ_H
UINT64_C(2017460239), // CEQ_W
UINT64_C(1145044992), // CFC1
UINT64_C(1409290299), // CFC1_MM
UINT64_C(52540), // CFC2_MM
UINT64_C(2021523481), // CFCMSA
UINT64_C(1879048242), // CINS
UINT64_C(1879048243), // CINS32
UINT64_C(1879048242), // CINS64_32
UINT64_C(1879048242), // CINS_i32
UINT64_C(1176502299), // CLASS_D
UINT64_C(1409286752), // CLASS_D_MMR6
UINT64_C(1174405147), // CLASS_S
UINT64_C(1409286240), // CLASS_S_MMR6
UINT64_C(2046820359), // CLEI_S_B
UINT64_C(2053111815), // CLEI_S_D
UINT64_C(2048917511), // CLEI_S_H
UINT64_C(2051014663), // CLEI_S_W
UINT64_C(2055208967), // CLEI_U_B
UINT64_C(2061500423), // CLEI_U_D
UINT64_C(2057306119), // CLEI_U_H
UINT64_C(2059403271), // CLEI_U_W
UINT64_C(2046820367), // CLE_S_B
UINT64_C(2053111823), // CLE_S_D
UINT64_C(2048917519), // CLE_S_H
UINT64_C(2051014671), // CLE_S_W
UINT64_C(2055208975), // CLE_U_B
UINT64_C(2061500431), // CLE_U_D
UINT64_C(2057306127), // CLE_U_H
UINT64_C(2059403279), // CLE_U_W
UINT64_C(1879048225), // CLO
UINT64_C(19260), // CLO_MM
UINT64_C(19260), // CLO_MMR6
UINT64_C(81), // CLO_R6
UINT64_C(2030043143), // CLTI_S_B
UINT64_C(2036334599), // CLTI_S_D
UINT64_C(2032140295), // CLTI_S_H
UINT64_C(2034237447), // CLTI_S_W
UINT64_C(2038431751), // CLTI_U_B
UINT64_C(2044723207), // CLTI_U_D
UINT64_C(2040528903), // CLTI_U_H
UINT64_C(2042626055), // CLTI_U_W
UINT64_C(2030043151), // CLT_S_B
UINT64_C(2036334607), // CLT_S_D
UINT64_C(2032140303), // CLT_S_H
UINT64_C(2034237455), // CLT_S_W
UINT64_C(2038431759), // CLT_U_B
UINT64_C(2044723215), // CLT_U_D
UINT64_C(2040528911), // CLT_U_H
UINT64_C(2042626063), // CLT_U_W
UINT64_C(1879048224), // CLZ
UINT64_C(23356), // CLZ_MM
UINT64_C(80), // CLZ_MMR6
UINT64_C(80), // CLZ_R6
UINT64_C(2080376337), // CMPGDU_EQ_QB
UINT64_C(389), // CMPGDU_EQ_QB_MMR2
UINT64_C(2080376465), // CMPGDU_LE_QB
UINT64_C(517), // CMPGDU_LE_QB_MMR2
UINT64_C(2080376401), // CMPGDU_LT_QB
UINT64_C(453), // CMPGDU_LT_QB_MMR2
UINT64_C(2080375057), // CMPGU_EQ_QB
UINT64_C(1476395205), // CMPGU_EQ_QB_MM
UINT64_C(2080375185), // CMPGU_LE_QB
UINT64_C(1476395333), // CMPGU_LE_QB_MM
UINT64_C(2080375121), // CMPGU_LT_QB
UINT64_C(1476395269), // CMPGU_LT_QB_MM
UINT64_C(2080374801), // CMPU_EQ_QB
UINT64_C(581), // CMPU_EQ_QB_MM
UINT64_C(2080374929), // CMPU_LE_QB
UINT64_C(709), // CMPU_LE_QB_MM
UINT64_C(2080374865), // CMPU_LT_QB
UINT64_C(645), // CMPU_LT_QB_MM
UINT64_C(1409286165), // CMP_AF_D_MMR6
UINT64_C(1409286149), // CMP_AF_S_MMR6
UINT64_C(1184890882), // CMP_EQ_D
UINT64_C(1409286293), // CMP_EQ_D_MMR6
UINT64_C(2080375313), // CMP_EQ_PH
UINT64_C(5), // CMP_EQ_PH_MM
UINT64_C(1182793730), // CMP_EQ_S
UINT64_C(1409286277), // CMP_EQ_S_MMR6
UINT64_C(1184890880), // CMP_F_D
UINT64_C(1182793728), // CMP_F_S
UINT64_C(1184890886), // CMP_LE_D
UINT64_C(1409286549), // CMP_LE_D_MMR6
UINT64_C(2080375441), // CMP_LE_PH
UINT64_C(133), // CMP_LE_PH_MM
UINT64_C(1182793734), // CMP_LE_S
UINT64_C(1409286533), // CMP_LE_S_MMR6
UINT64_C(1184890884), // CMP_LT_D
UINT64_C(1409286421), // CMP_LT_D_MMR6
UINT64_C(2080375377), // CMP_LT_PH
UINT64_C(69), // CMP_LT_PH_MM
UINT64_C(1182793732), // CMP_LT_S
UINT64_C(1409286405), // CMP_LT_S_MMR6
UINT64_C(1184890888), // CMP_SAF_D
UINT64_C(1409286677), // CMP_SAF_D_MMR6
UINT64_C(1182793736), // CMP_SAF_S
UINT64_C(1409286661), // CMP_SAF_S_MMR6
UINT64_C(1184890890), // CMP_SEQ_D
UINT64_C(1409286805), // CMP_SEQ_D_MMR6
UINT64_C(1182793738), // CMP_SEQ_S
UINT64_C(1409286789), // CMP_SEQ_S_MMR6
UINT64_C(1184890894), // CMP_SLE_D
UINT64_C(1409287061), // CMP_SLE_D_MMR6
UINT64_C(1182793742), // CMP_SLE_S
UINT64_C(1409287045), // CMP_SLE_S_MMR6
UINT64_C(1184890892), // CMP_SLT_D
UINT64_C(1409286933), // CMP_SLT_D_MMR6
UINT64_C(1182793740), // CMP_SLT_S
UINT64_C(1409286917), // CMP_SLT_S_MMR6
UINT64_C(1184890891), // CMP_SUEQ_D
UINT64_C(1409286869), // CMP_SUEQ_D_MMR6
UINT64_C(1182793739), // CMP_SUEQ_S
UINT64_C(1409286853), // CMP_SUEQ_S_MMR6
UINT64_C(1184890895), // CMP_SULE_D
UINT64_C(1409287125), // CMP_SULE_D_MMR6
UINT64_C(1182793743), // CMP_SULE_S
UINT64_C(1409287109), // CMP_SULE_S_MMR6
UINT64_C(1184890893), // CMP_SULT_D
UINT64_C(1409286997), // CMP_SULT_D_MMR6
UINT64_C(1182793741), // CMP_SULT_S
UINT64_C(1409286981), // CMP_SULT_S_MMR6
UINT64_C(1184890889), // CMP_SUN_D
UINT64_C(1409286741), // CMP_SUN_D_MMR6
UINT64_C(1182793737), // CMP_SUN_S
UINT64_C(1409286725), // CMP_SUN_S_MMR6
UINT64_C(1184890883), // CMP_UEQ_D
UINT64_C(1409286357), // CMP_UEQ_D_MMR6
UINT64_C(1182793731), // CMP_UEQ_S
UINT64_C(1409286341), // CMP_UEQ_S_MMR6
UINT64_C(1184890887), // CMP_ULE_D
UINT64_C(1409286613), // CMP_ULE_D_MMR6
UINT64_C(1182793735), // CMP_ULE_S
UINT64_C(1409286597), // CMP_ULE_S_MMR6
UINT64_C(1184890885), // CMP_ULT_D
UINT64_C(1409286485), // CMP_ULT_D_MMR6
UINT64_C(1182793733), // CMP_ULT_S
UINT64_C(1409286469), // CMP_ULT_S_MMR6
UINT64_C(1184890881), // CMP_UN_D
UINT64_C(1409286229), // CMP_UN_D_MMR6
UINT64_C(1182793729), // CMP_UN_S
UINT64_C(1409286213), // CMP_UN_S_MMR6
UINT64_C(2021654553), // COPY_S_B
UINT64_C(2025324569), // COPY_S_D
UINT64_C(2023751705), // COPY_S_H
UINT64_C(2024800281), // COPY_S_W
UINT64_C(2025848857), // COPY_U_B
UINT64_C(2027946009), // COPY_U_H
UINT64_C(2028994585), // COPY_U_W
UINT64_C(2080374799), // CRC32B
UINT64_C(2080375055), // CRC32CB
UINT64_C(2080375247), // CRC32CD
UINT64_C(2080375119), // CRC32CH
UINT64_C(2080375183), // CRC32CW
UINT64_C(2080374991), // CRC32D
UINT64_C(2080374863), // CRC32H
UINT64_C(2080374927), // CRC32W
UINT64_C(1153433600), // CTC1
UINT64_C(1409292347), // CTC1_MM
UINT64_C(56636), // CTC2_MM
UINT64_C(2017329177), // CTCMSA
UINT64_C(1174405153), // CVT_D32_S
UINT64_C(1409291131), // CVT_D32_S_MM
UINT64_C(1182793761), // CVT_D32_W
UINT64_C(1409299323), // CVT_D32_W_MM
UINT64_C(1184890913), // CVT_D64_L
UINT64_C(1174405153), // CVT_D64_S
UINT64_C(1409291131), // CVT_D64_S_MM
UINT64_C(1182793761), // CVT_D64_W
UINT64_C(1409299323), // CVT_D64_W_MM
UINT64_C(1409307515), // CVT_D_L_MMR6
UINT64_C(1176502309), // CVT_L_D64
UINT64_C(1409302843), // CVT_L_D64_MM
UINT64_C(1409302843), // CVT_L_D_MMR6
UINT64_C(1174405157), // CVT_L_S
UINT64_C(1409286459), // CVT_L_S_MM
UINT64_C(1409286459), // CVT_L_S_MMR6
UINT64_C(1176502304), // CVT_S_D32
UINT64_C(1409293179), // CVT_S_D32_MM
UINT64_C(1176502304), // CVT_S_D64
UINT64_C(1409293179), // CVT_S_D64_MM
UINT64_C(1184890912), // CVT_S_L
UINT64_C(1409309563), // CVT_S_L_MMR6
UINT64_C(1182793760), // CVT_S_W
UINT64_C(1409301371), // CVT_S_W_MM
UINT64_C(1409301371), // CVT_S_W_MMR6
UINT64_C(1176502308), // CVT_W_D32
UINT64_C(1409304891), // CVT_W_D32_MM
UINT64_C(1176502308), // CVT_W_D64
UINT64_C(1409304891), // CVT_W_D64_MM
UINT64_C(1174405156), // CVT_W_S
UINT64_C(1409288507), // CVT_W_S_MM
UINT64_C(1409288507), // CVT_W_S_MMR6
UINT64_C(1176502322), // C_EQ_D32
UINT64_C(1409287356), // C_EQ_D32_MM
UINT64_C(1176502322), // C_EQ_D64
UINT64_C(1409287356), // C_EQ_D64_MM
UINT64_C(1174405170), // C_EQ_S
UINT64_C(1409286332), // C_EQ_S_MM
UINT64_C(1176502320), // C_F_D32
UINT64_C(1409287228), // C_F_D32_MM
UINT64_C(1176502320), // C_F_D64
UINT64_C(1409287228), // C_F_D64_MM
UINT64_C(1174405168), // C_F_S
UINT64_C(1409286204), // C_F_S_MM
UINT64_C(1176502334), // C_LE_D32
UINT64_C(1409288124), // C_LE_D32_MM
UINT64_C(1176502334), // C_LE_D64
UINT64_C(1409288124), // C_LE_D64_MM
UINT64_C(1174405182), // C_LE_S
UINT64_C(1409287100), // C_LE_S_MM
UINT64_C(1176502332), // C_LT_D32
UINT64_C(1409287996), // C_LT_D32_MM
UINT64_C(1176502332), // C_LT_D64
UINT64_C(1409287996), // C_LT_D64_MM
UINT64_C(1174405180), // C_LT_S
UINT64_C(1409286972), // C_LT_S_MM
UINT64_C(1176502333), // C_NGE_D32
UINT64_C(1409288060), // C_NGE_D32_MM
UINT64_C(1176502333), // C_NGE_D64
UINT64_C(1409288060), // C_NGE_D64_MM
UINT64_C(1174405181), // C_NGE_S
UINT64_C(1409287036), // C_NGE_S_MM
UINT64_C(1176502329), // C_NGLE_D32
UINT64_C(1409287804), // C_NGLE_D32_MM
UINT64_C(1176502329), // C_NGLE_D64
UINT64_C(1409287804), // C_NGLE_D64_MM
UINT64_C(1174405177), // C_NGLE_S
UINT64_C(1409286780), // C_NGLE_S_MM
UINT64_C(1176502331), // C_NGL_D32
UINT64_C(1409287932), // C_NGL_D32_MM
UINT64_C(1176502331), // C_NGL_D64
UINT64_C(1409287932), // C_NGL_D64_MM
UINT64_C(1174405179), // C_NGL_S
UINT64_C(1409286908), // C_NGL_S_MM
UINT64_C(1176502335), // C_NGT_D32
UINT64_C(1409288188), // C_NGT_D32_MM
UINT64_C(1176502335), // C_NGT_D64
UINT64_C(1409288188), // C_NGT_D64_MM
UINT64_C(1174405183), // C_NGT_S
UINT64_C(1409287164), // C_NGT_S_MM
UINT64_C(1176502326), // C_OLE_D32
UINT64_C(1409287612), // C_OLE_D32_MM
UINT64_C(1176502326), // C_OLE_D64
UINT64_C(1409287612), // C_OLE_D64_MM
UINT64_C(1174405174), // C_OLE_S
UINT64_C(1409286588), // C_OLE_S_MM
UINT64_C(1176502324), // C_OLT_D32
UINT64_C(1409287484), // C_OLT_D32_MM
UINT64_C(1176502324), // C_OLT_D64
UINT64_C(1409287484), // C_OLT_D64_MM
UINT64_C(1174405172), // C_OLT_S
UINT64_C(1409286460), // C_OLT_S_MM
UINT64_C(1176502330), // C_SEQ_D32
UINT64_C(1409287868), // C_SEQ_D32_MM
UINT64_C(1176502330), // C_SEQ_D64
UINT64_C(1409287868), // C_SEQ_D64_MM
UINT64_C(1174405178), // C_SEQ_S
UINT64_C(1409286844), // C_SEQ_S_MM
UINT64_C(1176502328), // C_SF_D32
UINT64_C(1409287740), // C_SF_D32_MM
UINT64_C(1176502328), // C_SF_D64
UINT64_C(1409287740), // C_SF_D64_MM
UINT64_C(1174405176), // C_SF_S
UINT64_C(1409286716), // C_SF_S_MM
UINT64_C(1176502323), // C_UEQ_D32
UINT64_C(1409287420), // C_UEQ_D32_MM
UINT64_C(1176502323), // C_UEQ_D64
UINT64_C(1409287420), // C_UEQ_D64_MM
UINT64_C(1174405171), // C_UEQ_S
UINT64_C(1409286396), // C_UEQ_S_MM
UINT64_C(1176502327), // C_ULE_D32
UINT64_C(1409287676), // C_ULE_D32_MM
UINT64_C(1176502327), // C_ULE_D64
UINT64_C(1409287676), // C_ULE_D64_MM
UINT64_C(1174405175), // C_ULE_S
UINT64_C(1409286652), // C_ULE_S_MM
UINT64_C(1176502325), // C_ULT_D32
UINT64_C(1409287548), // C_ULT_D32_MM
UINT64_C(1176502325), // C_ULT_D64
UINT64_C(1409287548), // C_ULT_D64_MM
UINT64_C(1174405173), // C_ULT_S
UINT64_C(1409286524), // C_ULT_S_MM
UINT64_C(1176502321), // C_UN_D32
UINT64_C(1409287292), // C_UN_D32_MM
UINT64_C(1176502321), // C_UN_D64
UINT64_C(1409287292), // C_UN_D64_MM
UINT64_C(1174405169), // C_UN_S
UINT64_C(1409286268), // C_UN_S_MM
UINT64_C(59402), // CmpRxRy16
UINT64_C(28672), // CmpiRxImm16
UINT64_C(4026560512), // CmpiRxImmX16
UINT64_C(44), // DADD
UINT64_C(1610612736), // DADDi
UINT64_C(1677721600), // DADDiu
UINT64_C(45), // DADDu
UINT64_C(67502080), // DAHI
UINT64_C(2080375332), // DALIGN
UINT64_C(69074944), // DATI
UINT64_C(1946157056), // DAUI
UINT64_C(2080374820), // DBITSWAP
UINT64_C(1879048229), // DCLO
UINT64_C(83), // DCLO_R6
UINT64_C(1879048228), // DCLZ
UINT64_C(82), // DCLZ_R6
UINT64_C(158), // DDIV
UINT64_C(159), // DDIVU
UINT64_C(1107296287), // DERET
UINT64_C(58236), // DERET_MM
UINT64_C(58236), // DERET_MMR6
UINT64_C(2080374787), // DEXT
UINT64_C(2080374787), // DEXT64_32
UINT64_C(2080374785), // DEXTM
UINT64_C(2080374786), // DEXTU
UINT64_C(1096835072), // DI
UINT64_C(2080374791), // DINS
UINT64_C(2080374789), // DINSM
UINT64_C(2080374790), // DINSU
UINT64_C(154), // DIV
UINT64_C(155), // DIVU
UINT64_C(408), // DIVU_MMR6
UINT64_C(280), // DIV_MMR6
UINT64_C(2046820370), // DIV_S_B
UINT64_C(2053111826), // DIV_S_D
UINT64_C(2048917522), // DIV_S_H
UINT64_C(2051014674), // DIV_S_W
UINT64_C(2055208978), // DIV_U_B
UINT64_C(2061500434), // DIV_U_D
UINT64_C(2057306130), // DIV_U_H
UINT64_C(2059403282), // DIV_U_W
UINT64_C(18300), // DI_MM
UINT64_C(18300), // DI_MMR6
UINT64_C(21), // DLSA
UINT64_C(21), // DLSA_R6
UINT64_C(1075838976), // DMFC0
UINT64_C(1142947840), // DMFC1
UINT64_C(1210056704), // DMFC2
UINT64_C(1210056704), // DMFC2_OCTEON
UINT64_C(1080033536), // DMFGC0
UINT64_C(222), // DMOD
UINT64_C(223), // DMODU
UINT64_C(1096813505), // DMT
UINT64_C(1084227584), // DMTC0
UINT64_C(1151336448), // DMTC1
UINT64_C(1218445312), // DMTC2
UINT64_C(1218445312), // DMTC2_OCTEON
UINT64_C(1080034048), // DMTGC0
UINT64_C(220), // DMUH
UINT64_C(221), // DMUHU
UINT64_C(1879048195), // DMUL
UINT64_C(28), // DMULT
UINT64_C(29), // DMULTu
UINT64_C(157), // DMULU
UINT64_C(156), // DMUL_R6
UINT64_C(2019557395), // DOTP_S_D
UINT64_C(2015363091), // DOTP_S_H
UINT64_C(2017460243), // DOTP_S_W
UINT64_C(2027946003), // DOTP_U_D
UINT64_C(2023751699), // DOTP_U_H
UINT64_C(2025848851), // DOTP_U_W
UINT64_C(2036334611), // DPADD_S_D
UINT64_C(2032140307), // DPADD_S_H
UINT64_C(2034237459), // DPADD_S_W
UINT64_C(2044723219), // DPADD_U_D
UINT64_C(2040528915), // DPADD_U_H
UINT64_C(2042626067), // DPADD_U_W
UINT64_C(2080376496), // DPAQX_SA_W_PH
UINT64_C(12988), // DPAQX_SA_W_PH_MMR2
UINT64_C(2080376368), // DPAQX_S_W_PH
UINT64_C(8892), // DPAQX_S_W_PH_MMR2
UINT64_C(2080375600), // DPAQ_SA_L_W
UINT64_C(4796), // DPAQ_SA_L_W_MM
UINT64_C(2080375088), // DPAQ_S_W_PH
UINT64_C(700), // DPAQ_S_W_PH_MM
UINT64_C(2080375024), // DPAU_H_QBL
UINT64_C(8380), // DPAU_H_QBL_MM
UINT64_C(2080375280), // DPAU_H_QBR
UINT64_C(12476), // DPAU_H_QBR_MM
UINT64_C(2080375344), // DPAX_W_PH
UINT64_C(4284), // DPAX_W_PH_MMR2
UINT64_C(2080374832), // DPA_W_PH
UINT64_C(188), // DPA_W_PH_MMR2
UINT64_C(1879048237), // DPOP
UINT64_C(2080376560), // DPSQX_SA_W_PH
UINT64_C(14012), // DPSQX_SA_W_PH_MMR2
UINT64_C(2080376432), // DPSQX_S_W_PH
UINT64_C(9916), // DPSQX_S_W_PH_MMR2
UINT64_C(2080375664), // DPSQ_SA_L_W
UINT64_C(5820), // DPSQ_SA_L_W_MM
UINT64_C(2080375152), // DPSQ_S_W_PH
UINT64_C(1724), // DPSQ_S_W_PH_MM
UINT64_C(2053111827), // DPSUB_S_D
UINT64_C(2048917523), // DPSUB_S_H
UINT64_C(2051014675), // DPSUB_S_W
UINT64_C(2061500435), // DPSUB_U_D
UINT64_C(2057306131), // DPSUB_U_H
UINT64_C(2059403283), // DPSUB_U_W
UINT64_C(2080375536), // DPSU_H_QBL
UINT64_C(9404), // DPSU_H_QBL_MM
UINT64_C(2080375792), // DPSU_H_QBR
UINT64_C(13500), // DPSU_H_QBR_MM
UINT64_C(2080375408), // DPSX_W_PH
UINT64_C(5308), // DPSX_W_PH_MMR2
UINT64_C(2080374896), // DPS_W_PH
UINT64_C(1212), // DPS_W_PH_MMR2
UINT64_C(2097210), // DROTR
UINT64_C(2097214), // DROTR32
UINT64_C(86), // DROTRV
UINT64_C(2080374948), // DSBH
UINT64_C(30), // DSDIV
UINT64_C(2080375140), // DSHD
UINT64_C(56), // DSLL
UINT64_C(60), // DSLL32
UINT64_C(60), // DSLL64_32
UINT64_C(20), // DSLLV
UINT64_C(59), // DSRA
UINT64_C(63), // DSRA32
UINT64_C(23), // DSRAV
UINT64_C(58), // DSRL
UINT64_C(62), // DSRL32
UINT64_C(22), // DSRLV
UINT64_C(46), // DSUB
UINT64_C(47), // DSUBu
UINT64_C(31), // DUDIV
UINT64_C(1096810532), // DVP
UINT64_C(1096810497), // DVPE
UINT64_C(6524), // DVP_MMR6
UINT64_C(59418), // DivRxRy16
UINT64_C(59419), // DivuRxRy16
UINT64_C(192), // EHB
UINT64_C(6144), // EHB_MM
UINT64_C(6144), // EHB_MMR6
UINT64_C(1096835104), // EI
UINT64_C(22396), // EI_MM
UINT64_C(22396), // EI_MMR6
UINT64_C(1096813537), // EMT
UINT64_C(1107296280), // ERET
UINT64_C(1107296344), // ERETNC
UINT64_C(127868), // ERETNC_MMR6
UINT64_C(62332), // ERET_MM
UINT64_C(62332), // ERET_MMR6
UINT64_C(1096810500), // EVP
UINT64_C(1096810529), // EVPE
UINT64_C(14716), // EVP_MMR6
UINT64_C(2080374784), // EXT
UINT64_C(2080374968), // EXTP
UINT64_C(2080375480), // EXTPDP
UINT64_C(2080375544), // EXTPDPV
UINT64_C(14524), // EXTPDPV_MM
UINT64_C(13948), // EXTPDP_MM
UINT64_C(2080375032), // EXTPV
UINT64_C(10428), // EXTPV_MM
UINT64_C(9852), // EXTP_MM
UINT64_C(2080375288), // EXTRV_RS_W
UINT64_C(11964), // EXTRV_RS_W_MM
UINT64_C(2080375160), // EXTRV_R_W
UINT64_C(7868), // EXTRV_R_W_MM
UINT64_C(2080375800), // EXTRV_S_H
UINT64_C(16060), // EXTRV_S_H_MM
UINT64_C(2080374904), // EXTRV_W
UINT64_C(3772), // EXTRV_W_MM
UINT64_C(2080375224), // EXTR_RS_W
UINT64_C(11900), // EXTR_RS_W_MM
UINT64_C(2080375096), // EXTR_R_W
UINT64_C(7804), // EXTR_R_W_MM
UINT64_C(2080375736), // EXTR_S_H
UINT64_C(15996), // EXTR_S_H_MM
UINT64_C(2080374840), // EXTR_W
UINT64_C(3708), // EXTR_W_MM
UINT64_C(1879048250), // EXTS
UINT64_C(1879048251), // EXTS32
UINT64_C(44), // EXT_MM
UINT64_C(44), // EXT_MMR6
UINT64_C(1176502277), // FABS_D32
UINT64_C(1409295227), // FABS_D32_MM
UINT64_C(1176502277), // FABS_D64
UINT64_C(1409295227), // FABS_D64_MM
UINT64_C(1174405125), // FABS_S
UINT64_C(1409287035), // FABS_S_MM
UINT64_C(2015363099), // FADD_D
UINT64_C(1176502272), // FADD_D32
UINT64_C(1409286448), // FADD_D32_MM
UINT64_C(1176502272), // FADD_D64
UINT64_C(1409286448), // FADD_D64_MM
UINT64_C(1174405120), // FADD_S
UINT64_C(1409286192), // FADD_S_MM
UINT64_C(1409286192), // FADD_S_MMR6
UINT64_C(2013265947), // FADD_W
UINT64_C(2015363098), // FCAF_D
UINT64_C(2013265946), // FCAF_W
UINT64_C(2023751706), // FCEQ_D
UINT64_C(2021654554), // FCEQ_W
UINT64_C(2065760286), // FCLASS_D
UINT64_C(2065694750), // FCLASS_W
UINT64_C(2040528922), // FCLE_D
UINT64_C(2038431770), // FCLE_W
UINT64_C(2032140314), // FCLT_D
UINT64_C(2030043162), // FCLT_W
UINT64_C(1176502320), // FCMP_D32
UINT64_C(1409287228), // FCMP_D32_MM
UINT64_C(1176502320), // FCMP_D64
UINT64_C(1174405168), // FCMP_S32
UINT64_C(1409286204), // FCMP_S32_MM
UINT64_C(2027946012), // FCNE_D
UINT64_C(2025848860), // FCNE_W
UINT64_C(2019557404), // FCOR_D
UINT64_C(2017460252), // FCOR_W
UINT64_C(2027946010), // FCUEQ_D
UINT64_C(2025848858), // FCUEQ_W
UINT64_C(2044723226), // FCULE_D
UINT64_C(2042626074), // FCULE_W
UINT64_C(2036334618), // FCULT_D
UINT64_C(2034237466), // FCULT_W
UINT64_C(2023751708), // FCUNE_D
UINT64_C(2021654556), // FCUNE_W
UINT64_C(2019557402), // FCUN_D
UINT64_C(2017460250), // FCUN_W
UINT64_C(2027946011), // FDIV_D
UINT64_C(1176502275), // FDIV_D32
UINT64_C(1409286640), // FDIV_D32_MM
UINT64_C(1176502275), // FDIV_D64
UINT64_C(1409286640), // FDIV_D64_MM
UINT64_C(1174405123), // FDIV_S
UINT64_C(1409286384), // FDIV_S_MM
UINT64_C(1409286384), // FDIV_S_MMR6
UINT64_C(2025848859), // FDIV_W
UINT64_C(2046820379), // FEXDO_H
UINT64_C(2048917531), // FEXDO_W
UINT64_C(2044723227), // FEXP2_D
UINT64_C(2042626075), // FEXP2_W
UINT64_C(2066808862), // FEXUPL_D
UINT64_C(2066743326), // FEXUPL_W
UINT64_C(2066939934), // FEXUPR_D
UINT64_C(2066874398), // FEXUPR_W
UINT64_C(2067595294), // FFINT_S_D
UINT64_C(2067529758), // FFINT_S_W
UINT64_C(2067726366), // FFINT_U_D
UINT64_C(2067660830), // FFINT_U_W
UINT64_C(2067071006), // FFQL_D
UINT64_C(2067005470), // FFQL_W
UINT64_C(2067202078), // FFQR_D
UINT64_C(2067136542), // FFQR_W
UINT64_C(2063597598), // FILL_B
UINT64_C(2063794206), // FILL_D
UINT64_C(2063663134), // FILL_H
UINT64_C(2063728670), // FILL_W
UINT64_C(2066677790), // FLOG2_D
UINT64_C(2066612254), // FLOG2_W
UINT64_C(1176502283), // FLOOR_L_D64
UINT64_C(1409303355), // FLOOR_L_D_MMR6
UINT64_C(1174405131), // FLOOR_L_S
UINT64_C(1409286971), // FLOOR_L_S_MMR6
UINT64_C(1176502287), // FLOOR_W_D32
UINT64_C(1176502287), // FLOOR_W_D64
UINT64_C(1409305403), // FLOOR_W_D_MMR6
UINT64_C(1409305403), // FLOOR_W_MM
UINT64_C(1174405135), // FLOOR_W_S
UINT64_C(1409289019), // FLOOR_W_S_MM
UINT64_C(1409289019), // FLOOR_W_S_MMR6
UINT64_C(2032140315), // FMADD_D
UINT64_C(2030043163), // FMADD_W
UINT64_C(2078277659), // FMAX_A_D
UINT64_C(2076180507), // FMAX_A_W
UINT64_C(2074083355), // FMAX_D
UINT64_C(2071986203), // FMAX_W
UINT64_C(2069889051), // FMIN_A_D
UINT64_C(2067791899), // FMIN_A_W
UINT64_C(2065694747), // FMIN_D
UINT64_C(2063597595), // FMIN_W
UINT64_C(1176502278), // FMOV_D32
UINT64_C(1409294459), // FMOV_D32_MM
UINT64_C(1176502278), // FMOV_D64
UINT64_C(1409294459), // FMOV_D64_MM
UINT64_C(1174405126), // FMOV_S
UINT64_C(1409286267), // FMOV_S_MM
UINT64_C(1409286267), // FMOV_S_MMR6
UINT64_C(2036334619), // FMSUB_D
UINT64_C(2034237467), // FMSUB_W
UINT64_C(2023751707), // FMUL_D
UINT64_C(1176502274), // FMUL_D32
UINT64_C(1409286576), // FMUL_D32_MM
UINT64_C(1176502274), // FMUL_D64
UINT64_C(1409286576), // FMUL_D64_MM
UINT64_C(1174405122), // FMUL_S
UINT64_C(1409286320), // FMUL_S_MM
UINT64_C(1409286320), // FMUL_S_MMR6
UINT64_C(2021654555), // FMUL_W
UINT64_C(1176502279), // FNEG_D32
UINT64_C(1409297275), // FNEG_D32_MM
UINT64_C(1176502279), // FNEG_D64
UINT64_C(1409297275), // FNEG_D64_MM
UINT64_C(1174405127), // FNEG_S
UINT64_C(1409289083), // FNEG_S_MM
UINT64_C(1409289083), // FNEG_S_MMR6
UINT64_C(2080374792), // FORK
UINT64_C(2066415646), // FRCP_D
UINT64_C(2066350110), // FRCP_W
UINT64_C(2066546718), // FRINT_D
UINT64_C(2066481182), // FRINT_W
UINT64_C(2066284574), // FRSQRT_D
UINT64_C(2066219038), // FRSQRT_W
UINT64_C(2048917530), // FSAF_D
UINT64_C(2046820378), // FSAF_W
UINT64_C(2057306138), // FSEQ_D
UINT64_C(2055208986), // FSEQ_W
UINT64_C(2074083354), // FSLE_D
UINT64_C(2071986202), // FSLE_W
UINT64_C(2065694746), // FSLT_D
UINT64_C(2063597594), // FSLT_W
UINT64_C(2061500444), // FSNE_D
UINT64_C(2059403292), // FSNE_W
UINT64_C(2053111836), // FSOR_D
UINT64_C(2051014684), // FSOR_W
UINT64_C(2066153502), // FSQRT_D
UINT64_C(1176502276), // FSQRT_D32
UINT64_C(1409305147), // FSQRT_D32_MM
UINT64_C(1176502276), // FSQRT_D64
UINT64_C(1409305147), // FSQRT_D64_MM
UINT64_C(1174405124), // FSQRT_S
UINT64_C(1409288763), // FSQRT_S_MM
UINT64_C(2066087966), // FSQRT_W
UINT64_C(2019557403), // FSUB_D
UINT64_C(1176502273), // FSUB_D32
UINT64_C(1409286512), // FSUB_D32_MM
UINT64_C(1176502273), // FSUB_D64
UINT64_C(1409286512), // FSUB_D64_MM
UINT64_C(1174405121), // FSUB_S
UINT64_C(1409286256), // FSUB_S_MM
UINT64_C(1409286256), // FSUB_S_MMR6
UINT64_C(2017460251), // FSUB_W
UINT64_C(2061500442), // FSUEQ_D
UINT64_C(2059403290), // FSUEQ_W
UINT64_C(2078277658), // FSULE_D
UINT64_C(2076180506), // FSULE_W
UINT64_C(2069889050), // FSULT_D
UINT64_C(2067791898), // FSULT_W
UINT64_C(2057306140), // FSUNE_D
UINT64_C(2055208988), // FSUNE_W
UINT64_C(2053111834), // FSUN_D
UINT64_C(2051014682), // FSUN_W
UINT64_C(2067333150), // FTINT_S_D
UINT64_C(2067267614), // FTINT_S_W
UINT64_C(2067464222), // FTINT_U_D
UINT64_C(2067398686), // FTINT_U_W
UINT64_C(2055208987), // FTQ_H
UINT64_C(2057306139), // FTQ_W
UINT64_C(2065891358), // FTRUNC_S_D
UINT64_C(2065825822), // FTRUNC_S_W
UINT64_C(2066022430), // FTRUNC_U_D
UINT64_C(2065956894), // FTRUNC_U_W
UINT64_C(2080374845), // GINVI
UINT64_C(24956), // GINVI_MMR6
UINT64_C(2080374973), // GINVT
UINT64_C(29052), // GINVT_MMR6
UINT64_C(2053111829), // HADD_S_D
UINT64_C(2048917525), // HADD_S_H
UINT64_C(2051014677), // HADD_S_W
UINT64_C(2061500437), // HADD_U_D
UINT64_C(2057306133), // HADD_U_H
UINT64_C(2059403285), // HADD_U_W
UINT64_C(2069889045), // HSUB_S_D
UINT64_C(2065694741), // HSUB_S_H
UINT64_C(2067791893), // HSUB_S_W
UINT64_C(2078277653), // HSUB_U_D
UINT64_C(2074083349), // HSUB_U_H
UINT64_C(2076180501), // HSUB_U_W
UINT64_C(1107296296), // HYPCALL
UINT64_C(50044), // HYPCALL_MM
UINT64_C(2063597588), // ILVEV_B
UINT64_C(2069889044), // ILVEV_D
UINT64_C(2065694740), // ILVEV_H
UINT64_C(2067791892), // ILVEV_W
UINT64_C(2046820372), // ILVL_B
UINT64_C(2053111828), // ILVL_D
UINT64_C(2048917524), // ILVL_H
UINT64_C(2051014676), // ILVL_W
UINT64_C(2071986196), // ILVOD_B
UINT64_C(2078277652), // ILVOD_D
UINT64_C(2074083348), // ILVOD_H
UINT64_C(2076180500), // ILVOD_W
UINT64_C(2055208980), // ILVR_B
UINT64_C(2061500436), // ILVR_D
UINT64_C(2057306132), // ILVR_H
UINT64_C(2059403284), // ILVR_W
UINT64_C(2080374788), // INS
UINT64_C(2030043161), // INSERT_B
UINT64_C(2033713177), // INSERT_D
UINT64_C(2032140313), // INSERT_H
UINT64_C(2033188889), // INSERT_W
UINT64_C(2080374796), // INSV
UINT64_C(2034237465), // INSVE_B
UINT64_C(2037907481), // INSVE_D
UINT64_C(2036334617), // INSVE_H
UINT64_C(2037383193), // INSVE_W
UINT64_C(16700), // INSV_MM
UINT64_C(12), // INS_MM
UINT64_C(12), // INS_MMR6
UINT64_C(134217728), // J
UINT64_C(201326592), // JAL
UINT64_C(9), // JALR
UINT64_C(17856), // JALR16_MM
UINT64_C(9), // JALR64
UINT64_C(17419), // JALRC16_MMR6
UINT64_C(7996), // JALRC_HB_MMR6
UINT64_C(3900), // JALRC_MMR6
UINT64_C(17888), // JALRS16_MM
UINT64_C(20284), // JALRS_MM
UINT64_C(1033), // JALR_HB
UINT64_C(1033), // JALR_HB64
UINT64_C(3900), // JALR_MM
UINT64_C(1946157056), // JALS_MM
UINT64_C(1946157056), // JALX
UINT64_C(4026531840), // JALX_MM
UINT64_C(4093640704), // JAL_MM
UINT64_C(4160749568), // JIALC
UINT64_C(4160749568), // JIALC64
UINT64_C(2147483648), // JIALC_MMR6
UINT64_C(3623878656), // JIC
UINT64_C(3623878656), // JIC64
UINT64_C(2684354560), // JIC_MMR6
UINT64_C(8), // JR
UINT64_C(17792), // JR16_MM
UINT64_C(8), // JR64
UINT64_C(18176), // JRADDIUSP
UINT64_C(17824), // JRC16_MM
UINT64_C(17411), // JRC16_MMR6
UINT64_C(17427), // JRCADDIUSP_MMR6
UINT64_C(1032), // JR_HB
UINT64_C(1032), // JR_HB64
UINT64_C(1033), // JR_HB64_R6
UINT64_C(1033), // JR_HB_R6
UINT64_C(3900), // JR_MM
UINT64_C(3556769792), // J_MM
UINT64_C(402653184), // Jal16
UINT64_C(402653184), // JalB16
UINT64_C(59424), // JrRa16
UINT64_C(59616), // JrcRa16
UINT64_C(59584), // JrcRx16
UINT64_C(59392), // JumpLinkReg16
UINT64_C(2147483648), // LB
UINT64_C(2147483648), // LB64
UINT64_C(2080374828), // LBE
UINT64_C(1610639360), // LBE_MM
UINT64_C(2048), // LBU16_MM
UINT64_C(2080375178), // LBUX
UINT64_C(549), // LBUX_MM
UINT64_C(335544320), // LBU_MMR6
UINT64_C(469762048), // LB_MM
UINT64_C(469762048), // LB_MMR6
UINT64_C(2415919104), // LBu
UINT64_C(2415919104), // LBu64
UINT64_C(2080374824), // LBuE
UINT64_C(1610637312), // LBuE_MM
UINT64_C(335544320), // LBu_MM
UINT64_C(3690987520), // LD
UINT64_C(3556769792), // LDC1
UINT64_C(3556769792), // LDC164
UINT64_C(3154116608), // LDC1_D64_MMR6
UINT64_C(3154116608), // LDC1_MM
UINT64_C(3623878656), // LDC2
UINT64_C(536879104), // LDC2_MMR6
UINT64_C(1237319680), // LDC2_R6
UINT64_C(3690987520), // LDC3
UINT64_C(2063597575), // LDI_B
UINT64_C(2069889031), // LDI_D
UINT64_C(2065694727), // LDI_H
UINT64_C(2067791879), // LDI_W
UINT64_C(1744830464), // LDL
UINT64_C(3960995840), // LDPC
UINT64_C(1811939328), // LDR
UINT64_C(1275068417), // LDXC1
UINT64_C(1275068417), // LDXC164
UINT64_C(2013265952), // LD_B
UINT64_C(2013265955), // LD_D
UINT64_C(2013265953), // LD_H
UINT64_C(2013265954), // LD_W
UINT64_C(603979776), // LEA_ADDiu
UINT64_C(1677721600), // LEA_ADDiu64
UINT64_C(805306368), // LEA_ADDiu_MM
UINT64_C(2214592512), // LH
UINT64_C(2214592512), // LH64
UINT64_C(2080374829), // LHE
UINT64_C(1610639872), // LHE_MM
UINT64_C(10240), // LHU16_MM
UINT64_C(2080375050), // LHX
UINT64_C(357), // LHX_MM
UINT64_C(1006632960), // LH_MM
UINT64_C(2483027968), // LHu
UINT64_C(2483027968), // LHu64
UINT64_C(2080374825), // LHuE
UINT64_C(1610637824), // LHuE_MM
UINT64_C(872415232), // LHu_MM
UINT64_C(60416), // LI16_MM
UINT64_C(60416), // LI16_MMR6
UINT64_C(3221225472), // LL
UINT64_C(3221225472), // LL64
UINT64_C(2080374838), // LL64_R6
UINT64_C(3489660928), // LLD
UINT64_C(2080374839), // LLD_R6
UINT64_C(2080374830), // LLE
UINT64_C(1610640384), // LLE_MM
UINT64_C(1610625024), // LL_MM
UINT64_C(1610625024), // LL_MMR6
UINT64_C(2080374838), // LL_R6
UINT64_C(5), // LSA
UINT64_C(15), // LSA_MMR6
UINT64_C(5), // LSA_R6
UINT64_C(268435456), // LUI_MMR6
UINT64_C(1275068421), // LUXC1
UINT64_C(1275068421), // LUXC164
UINT64_C(1409286472), // LUXC1_MM
UINT64_C(1006632960), // LUi
UINT64_C(1006632960), // LUi64
UINT64_C(1101004800), // LUi_MM
UINT64_C(2348810240), // LW
UINT64_C(26624), // LW16_MM
UINT64_C(2348810240), // LW64
UINT64_C(3288334336), // LWC1
UINT64_C(2617245696), // LWC1_MM
UINT64_C(3355443200), // LWC2
UINT64_C(536870912), // LWC2_MMR6
UINT64_C(1228931072), // LWC2_R6
UINT64_C(3422552064), // LWC3
UINT64_C(2348810240), // LWDSP
UINT64_C(4227858432), // LWDSP_MM
UINT64_C(2080374831), // LWE
UINT64_C(1610640896), // LWE_MM
UINT64_C(25600), // LWGP_MM
UINT64_C(2281701376), // LWL
UINT64_C(2281701376), // LWL64
UINT64_C(2080374809), // LWLE
UINT64_C(1610638336), // LWLE_MM
UINT64_C(1610612736), // LWL_MM
UINT64_C(17664), // LWM16_MM
UINT64_C(17410), // LWM16_MMR6
UINT64_C(536891392), // LWM32_MM
UINT64_C(3959947264), // LWPC
UINT64_C(2013790208), // LWPC_MMR6
UINT64_C(536875008), // LWP_MM
UINT64_C(2550136832), // LWR
UINT64_C(2550136832), // LWR64
UINT64_C(2080374810), // LWRE
UINT64_C(1610638848), // LWRE_MM
UINT64_C(1610616832), // LWR_MM
UINT64_C(18432), // LWSP_MM
UINT64_C(3960471552), // LWUPC
UINT64_C(1610670080), // LWU_MM
UINT64_C(2080374794), // LWX
UINT64_C(1275068416), // LWXC1
UINT64_C(1409286216), // LWXC1_MM
UINT64_C(280), // LWXS_MM
UINT64_C(421), // LWX_MM
UINT64_C(4227858432), // LW_MM
UINT64_C(4227858432), // LW_MMR6
UINT64_C(2617245696), // LWu
UINT64_C(4026570752), // LbRxRyOffMemX16
UINT64_C(4026572800), // LbuRxRyOffMemX16
UINT64_C(4026572800), // LhRxRyOffMemX16
UINT64_C(4026572800), // LhuRxRyOffMemX16
UINT64_C(26624), // LiRxImm16
UINT64_C(4026558464), // LiRxImmAlignX16
UINT64_C(4026558464), // LiRxImmX16
UINT64_C(45056), // LwRxPcTcp16
UINT64_C(4026576896), // LwRxPcTcpX16
UINT64_C(4026570752), // LwRxRyOffMemX16
UINT64_C(4026568704), // LwRxSpImmX16
UINT64_C(1879048192), // MADD
UINT64_C(1176502296), // MADDF_D
UINT64_C(1409287096), // MADDF_D_MMR6
UINT64_C(1174405144), // MADDF_S
UINT64_C(1409286584), // MADDF_S_MMR6
UINT64_C(2067791900), // MADDR_Q_H
UINT64_C(2069889052), // MADDR_Q_W
UINT64_C(1879048193), // MADDU
UINT64_C(1879048193), // MADDU_DSP
UINT64_C(6844), // MADDU_DSP_MM
UINT64_C(56124), // MADDU_MM
UINT64_C(2021654546), // MADDV_B
UINT64_C(2027946002), // MADDV_D
UINT64_C(2023751698), // MADDV_H
UINT64_C(2025848850), // MADDV_W
UINT64_C(1275068449), // MADD_D32
UINT64_C(1409286153), // MADD_D32_MM
UINT64_C(1275068449), // MADD_D64
UINT64_C(1879048192), // MADD_DSP
UINT64_C(2748), // MADD_DSP_MM
UINT64_C(52028), // MADD_MM
UINT64_C(2034237468), // MADD_Q_H
UINT64_C(2036334620), // MADD_Q_W
UINT64_C(1275068448), // MADD_S
UINT64_C(1409286145), // MADD_S_MM
UINT64_C(2080375856), // MAQ_SA_W_PHL
UINT64_C(14972), // MAQ_SA_W_PHL_MM
UINT64_C(2080375984), // MAQ_SA_W_PHR
UINT64_C(10876), // MAQ_SA_W_PHR_MM
UINT64_C(2080376112), // MAQ_S_W_PHL
UINT64_C(6780), // MAQ_S_W_PHL_MM
UINT64_C(2080376240), // MAQ_S_W_PHR
UINT64_C(2684), // MAQ_S_W_PHR_MM
UINT64_C(1176502303), // MAXA_D
UINT64_C(1409286699), // MAXA_D_MMR6
UINT64_C(1174405151), // MAXA_S
UINT64_C(1409286187), // MAXA_S_MMR6
UINT64_C(2030043142), // MAXI_S_B
UINT64_C(2036334598), // MAXI_S_D
UINT64_C(2032140294), // MAXI_S_H
UINT64_C(2034237446), // MAXI_S_W
UINT64_C(2038431750), // MAXI_U_B
UINT64_C(2044723206), // MAXI_U_D
UINT64_C(2040528902), // MAXI_U_H
UINT64_C(2042626054), // MAXI_U_W
UINT64_C(2063597582), // MAX_A_B
UINT64_C(2069889038), // MAX_A_D
UINT64_C(2065694734), // MAX_A_H
UINT64_C(2067791886), // MAX_A_W
UINT64_C(1176502301), // MAX_D
UINT64_C(1409286667), // MAX_D_MMR6
UINT64_C(1174405149), // MAX_S
UINT64_C(2030043150), // MAX_S_B
UINT64_C(2036334606), // MAX_S_D
UINT64_C(2032140302), // MAX_S_H
UINT64_C(1409286155), // MAX_S_MMR6
UINT64_C(2034237454), // MAX_S_W
UINT64_C(2038431758), // MAX_U_B
UINT64_C(2044723214), // MAX_U_D
UINT64_C(2040528910), // MAX_U_H
UINT64_C(2042626062), // MAX_U_W
UINT64_C(1073741824), // MFC0
UINT64_C(252), // MFC0_MMR6
UINT64_C(1140850688), // MFC1
UINT64_C(1140850688), // MFC1_D64
UINT64_C(1409294395), // MFC1_MM
UINT64_C(1409294395), // MFC1_MMR6
UINT64_C(1207959552), // MFC2
UINT64_C(19772), // MFC2_MMR6
UINT64_C(1080033280), // MFGC0
UINT64_C(1276), // MFGC0_MM
UINT64_C(244), // MFHC0_MMR6
UINT64_C(1147142144), // MFHC1_D32
UINT64_C(1409298491), // MFHC1_D32_MM
UINT64_C(1147142144), // MFHC1_D64
UINT64_C(1409298491), // MFHC1_D64_MM
UINT64_C(36156), // MFHC2_MMR6
UINT64_C(1080034304), // MFHGC0
UINT64_C(1268), // MFHGC0_MM
UINT64_C(16), // MFHI
UINT64_C(17920), // MFHI16_MM
UINT64_C(16), // MFHI64
UINT64_C(16), // MFHI_DSP
UINT64_C(124), // MFHI_DSP_MM
UINT64_C(3452), // MFHI_MM
UINT64_C(18), // MFLO
UINT64_C(17984), // MFLO16_MM
UINT64_C(18), // MFLO64
UINT64_C(18), // MFLO_DSP
UINT64_C(4220), // MFLO_DSP_MM
UINT64_C(7548), // MFLO_MM
UINT64_C(1090519040), // MFTR
UINT64_C(1176502302), // MINA_D
UINT64_C(1409286691), // MINA_D_MMR6
UINT64_C(1174405150), // MINA_S
UINT64_C(1409286179), // MINA_S_MMR6
UINT64_C(2046820358), // MINI_S_B
UINT64_C(2053111814), // MINI_S_D
UINT64_C(2048917510), // MINI_S_H
UINT64_C(2051014662), // MINI_S_W
UINT64_C(2055208966), // MINI_U_B
UINT64_C(2061500422), // MINI_U_D
UINT64_C(2057306118), // MINI_U_H
UINT64_C(2059403270), // MINI_U_W
UINT64_C(2071986190), // MIN_A_B
UINT64_C(2078277646), // MIN_A_D
UINT64_C(2074083342), // MIN_A_H
UINT64_C(2076180494), // MIN_A_W
UINT64_C(1176502300), // MIN_D
UINT64_C(1409286659), // MIN_D_MMR6
UINT64_C(1174405148), // MIN_S
UINT64_C(2046820366), // MIN_S_B
UINT64_C(2053111822), // MIN_S_D
UINT64_C(2048917518), // MIN_S_H
UINT64_C(1409286147), // MIN_S_MMR6
UINT64_C(2051014670), // MIN_S_W
UINT64_C(2055208974), // MIN_U_B
UINT64_C(2061500430), // MIN_U_D
UINT64_C(2057306126), // MIN_U_H
UINT64_C(2059403278), // MIN_U_W
UINT64_C(218), // MOD
UINT64_C(2080375952), // MODSUB
UINT64_C(661), // MODSUB_MM
UINT64_C(219), // MODU
UINT64_C(472), // MODU_MMR6
UINT64_C(344), // MOD_MMR6
UINT64_C(2063597586), // MOD_S_B
UINT64_C(2069889042), // MOD_S_D
UINT64_C(2065694738), // MOD_S_H
UINT64_C(2067791890), // MOD_S_W
UINT64_C(2071986194), // MOD_U_B
UINT64_C(2078277650), // MOD_U_D
UINT64_C(2074083346), // MOD_U_H
UINT64_C(2076180498), // MOD_U_W
UINT64_C(3072), // MOVE16_MM
UINT64_C(3072), // MOVE16_MMR6
UINT64_C(33792), // MOVEP_MM
UINT64_C(17412), // MOVEP_MMR6
UINT64_C(2025717785), // MOVE_V
UINT64_C(1176502289), // MOVF_D32
UINT64_C(1409286688), // MOVF_D32_MM
UINT64_C(1176502289), // MOVF_D64
UINT64_C(1), // MOVF_I
UINT64_C(1), // MOVF_I64
UINT64_C(1409286523), // MOVF_I_MM
UINT64_C(1174405137), // MOVF_S
UINT64_C(1409286176), // MOVF_S_MM
UINT64_C(1176502291), // MOVN_I64_D64
UINT64_C(11), // MOVN_I64_I
UINT64_C(11), // MOVN_I64_I64
UINT64_C(1174405139), // MOVN_I64_S
UINT64_C(1176502291), // MOVN_I_D32
UINT64_C(1409286456), // MOVN_I_D32_MM
UINT64_C(1176502291), // MOVN_I_D64
UINT64_C(11), // MOVN_I_I
UINT64_C(11), // MOVN_I_I64
UINT64_C(24), // MOVN_I_MM
UINT64_C(1174405139), // MOVN_I_S
UINT64_C(1409286200), // MOVN_I_S_MM
UINT64_C(1176567825), // MOVT_D32
UINT64_C(1409286752), // MOVT_D32_MM
UINT64_C(1176567825), // MOVT_D64
UINT64_C(65537), // MOVT_I
UINT64_C(65537), // MOVT_I64
UINT64_C(1409288571), // MOVT_I_MM
UINT64_C(1174470673), // MOVT_S
UINT64_C(1409286240), // MOVT_S_MM
UINT64_C(1176502290), // MOVZ_I64_D64
UINT64_C(10), // MOVZ_I64_I
UINT64_C(10), // MOVZ_I64_I64
UINT64_C(1174405138), // MOVZ_I64_S
UINT64_C(1176502290), // MOVZ_I_D32
UINT64_C(1409286520), // MOVZ_I_D32_MM
UINT64_C(1176502290), // MOVZ_I_D64
UINT64_C(10), // MOVZ_I_I
UINT64_C(10), // MOVZ_I_I64
UINT64_C(88), // MOVZ_I_MM
UINT64_C(1174405138), // MOVZ_I_S
UINT64_C(1409286264), // MOVZ_I_S_MM
UINT64_C(1879048196), // MSUB
UINT64_C(1176502297), // MSUBF_D
UINT64_C(1409287160), // MSUBF_D_MMR6
UINT64_C(1174405145), // MSUBF_S
UINT64_C(1409286648), // MSUBF_S_MMR6
UINT64_C(2071986204), // MSUBR_Q_H
UINT64_C(2074083356), // MSUBR_Q_W
UINT64_C(1879048197), // MSUBU
UINT64_C(1879048197), // MSUBU_DSP
UINT64_C(15036), // MSUBU_DSP_MM
UINT64_C(64316), // MSUBU_MM
UINT64_C(2030043154), // MSUBV_B
UINT64_C(2036334610), // MSUBV_D
UINT64_C(2032140306), // MSUBV_H
UINT64_C(2034237458), // MSUBV_W
UINT64_C(1275068457), // MSUB_D32
UINT64_C(1409286185), // MSUB_D32_MM
UINT64_C(1275068457), // MSUB_D64
UINT64_C(1879048196), // MSUB_DSP
UINT64_C(10940), // MSUB_DSP_MM
UINT64_C(60220), // MSUB_MM
UINT64_C(2038431772), // MSUB_Q_H
UINT64_C(2040528924), // MSUB_Q_W
UINT64_C(1275068456), // MSUB_S
UINT64_C(1409286177), // MSUB_S_MM
UINT64_C(1082130432), // MTC0
UINT64_C(764), // MTC0_MMR6
UINT64_C(1149239296), // MTC1
UINT64_C(1149239296), // MTC1_D64
UINT64_C(1409296443), // MTC1_MM
UINT64_C(1409296443), // MTC1_MMR6
UINT64_C(1216348160), // MTC2
UINT64_C(23868), // MTC2_MMR6
UINT64_C(1080033792), // MTGC0
UINT64_C(1788), // MTGC0_MM
UINT64_C(756), // MTHC0_MMR6
UINT64_C(1155530752), // MTHC1_D32
UINT64_C(1409300539), // MTHC1_D32_MM
UINT64_C(1155530752), // MTHC1_D64
UINT64_C(1409300539), // MTHC1_D64_MM
UINT64_C(40252), // MTHC2_MMR6
UINT64_C(1080034816), // MTHGC0
UINT64_C(1780), // MTHGC0_MM
UINT64_C(17), // MTHI
UINT64_C(17), // MTHI64
UINT64_C(17), // MTHI_DSP
UINT64_C(8316), // MTHI_DSP_MM
UINT64_C(11644), // MTHI_MM
UINT64_C(2080376824), // MTHLIP
UINT64_C(636), // MTHLIP_MM
UINT64_C(19), // MTLO
UINT64_C(19), // MTLO64
UINT64_C(19), // MTLO_DSP
UINT64_C(12412), // MTLO_DSP_MM
UINT64_C(15740), // MTLO_MM
UINT64_C(1879048200), // MTM0
UINT64_C(1879048204), // MTM1
UINT64_C(1879048205), // MTM2
UINT64_C(1879048201), // MTP0
UINT64_C(1879048202), // MTP1
UINT64_C(1879048203), // MTP2
UINT64_C(1098907648), // MTTR
UINT64_C(216), // MUH
UINT64_C(217), // MUHU
UINT64_C(216), // MUHU_MMR6
UINT64_C(88), // MUH_MMR6
UINT64_C(1879048194), // MUL
UINT64_C(2080376592), // MULEQ_S_W_PHL
UINT64_C(37), // MULEQ_S_W_PHL_MM
UINT64_C(2080376656), // MULEQ_S_W_PHR
UINT64_C(101), // MULEQ_S_W_PHR_MM
UINT64_C(2080375184), // MULEU_S_PH_QBL
UINT64_C(149), // MULEU_S_PH_QBL_MM
UINT64_C(2080375248), // MULEU_S_PH_QBR
UINT64_C(213), // MULEU_S_PH_QBR_MM
UINT64_C(2080376784), // MULQ_RS_PH
UINT64_C(277), // MULQ_RS_PH_MM
UINT64_C(2080376280), // MULQ_RS_W
UINT64_C(405), // MULQ_RS_W_MMR2
UINT64_C(2080376720), // MULQ_S_PH
UINT64_C(341), // MULQ_S_PH_MMR2
UINT64_C(2080376216), // MULQ_S_W
UINT64_C(469), // MULQ_S_W_MMR2
UINT64_C(2063597596), // MULR_Q_H
UINT64_C(2065694748), // MULR_Q_W
UINT64_C(2080375216), // MULSAQ_S_W_PH
UINT64_C(15548), // MULSAQ_S_W_PH_MM
UINT64_C(2080374960), // MULSA_W_PH
UINT64_C(11452), // MULSA_W_PH_MMR2
UINT64_C(24), // MULT
UINT64_C(25), // MULTU_DSP
UINT64_C(7356), // MULTU_DSP_MM
UINT64_C(24), // MULT_DSP
UINT64_C(3260), // MULT_DSP_MM
UINT64_C(35644), // MULT_MM
UINT64_C(25), // MULTu
UINT64_C(39740), // MULTu_MM
UINT64_C(153), // MULU
UINT64_C(152), // MULU_MMR6
UINT64_C(2013265938), // MULV_B
UINT64_C(2019557394), // MULV_D
UINT64_C(2015363090), // MULV_H
UINT64_C(2017460242), // MULV_W
UINT64_C(528), // MUL_MM
UINT64_C(24), // MUL_MMR6
UINT64_C(2080375576), // MUL_PH
UINT64_C(45), // MUL_PH_MMR2
UINT64_C(2030043164), // MUL_Q_H
UINT64_C(2032140316), // MUL_Q_W
UINT64_C(152), // MUL_R6
UINT64_C(2080375704), // MUL_S_PH
UINT64_C(1069), // MUL_S_PH_MMR2
UINT64_C(59408), // Mfhi16
UINT64_C(59410), // Mflo16
UINT64_C(25856), // Move32R16
UINT64_C(26368), // MoveR3216
UINT64_C(2064121886), // NLOC_B
UINT64_C(2064318494), // NLOC_D
UINT64_C(2064187422), // NLOC_H
UINT64_C(2064252958), // NLOC_W
UINT64_C(2064384030), // NLZC_B
UINT64_C(2064580638), // NLZC_D
UINT64_C(2064449566), // NLZC_H
UINT64_C(2064515102), // NLZC_W
UINT64_C(1275068465), // NMADD_D32
UINT64_C(1409286154), // NMADD_D32_MM
UINT64_C(1275068465), // NMADD_D64
UINT64_C(1275068464), // NMADD_S
UINT64_C(1409286146), // NMADD_S_MM
UINT64_C(1275068473), // NMSUB_D32
UINT64_C(1409286186), // NMSUB_D32_MM
UINT64_C(1275068473), // NMSUB_D64
UINT64_C(1275068472), // NMSUB_S
UINT64_C(1409286178), // NMSUB_S_MM
UINT64_C(39), // NOR
UINT64_C(39), // NOR64
UINT64_C(2046820352), // NORI_B
UINT64_C(720), // NOR_MM
UINT64_C(720), // NOR_MMR6
UINT64_C(2017460254), // NOR_V
UINT64_C(17408), // NOT16_MM
UINT64_C(17408), // NOT16_MMR6
UINT64_C(59421), // NegRxRy16
UINT64_C(59407), // NotRxRy16
UINT64_C(37), // OR
UINT64_C(17600), // OR16_MM
UINT64_C(17417), // OR16_MMR6
UINT64_C(37), // OR64
UINT64_C(2030043136), // ORI_B
UINT64_C(1342177280), // ORI_MMR6
UINT64_C(656), // OR_MM
UINT64_C(656), // OR_MMR6
UINT64_C(2015363102), // OR_V
UINT64_C(872415232), // ORi
UINT64_C(872415232), // ORi64
UINT64_C(1342177280), // ORi_MM
UINT64_C(59405), // OrRxRxRy16
UINT64_C(2080375697), // PACKRL_PH
UINT64_C(429), // PACKRL_PH_MM
UINT64_C(320), // PAUSE
UINT64_C(10240), // PAUSE_MM
UINT64_C(10240), // PAUSE_MMR6
UINT64_C(2030043156), // PCKEV_B
UINT64_C(2036334612), // PCKEV_D
UINT64_C(2032140308), // PCKEV_H
UINT64_C(2034237460), // PCKEV_W
UINT64_C(2038431764), // PCKOD_B
UINT64_C(2044723220), // PCKOD_D
UINT64_C(2040528916), // PCKOD_H
UINT64_C(2042626068), // PCKOD_W
UINT64_C(2063859742), // PCNT_B
UINT64_C(2064056350), // PCNT_D
UINT64_C(2063925278), // PCNT_H
UINT64_C(2063990814), // PCNT_W
UINT64_C(2080375505), // PICK_PH
UINT64_C(557), // PICK_PH_MM
UINT64_C(2080374993), // PICK_QB
UINT64_C(493), // PICK_QB_MM
UINT64_C(1879048236), // POP
UINT64_C(2080375058), // PRECEQU_PH_QBL
UINT64_C(2080375186), // PRECEQU_PH_QBLA
UINT64_C(29500), // PRECEQU_PH_QBLA_MM
UINT64_C(28988), // PRECEQU_PH_QBL_MM
UINT64_C(2080375122), // PRECEQU_PH_QBR
UINT64_C(2080375250), // PRECEQU_PH_QBRA
UINT64_C(37692), // PRECEQU_PH_QBRA_MM
UINT64_C(37180), // PRECEQU_PH_QBR_MM
UINT64_C(2080375570), // PRECEQ_W_PHL
UINT64_C(20796), // PRECEQ_W_PHL_MM
UINT64_C(2080375634), // PRECEQ_W_PHR
UINT64_C(24892), // PRECEQ_W_PHR_MM
UINT64_C(2080376594), // PRECEU_PH_QBL
UINT64_C(2080376722), // PRECEU_PH_QBLA
UINT64_C(45884), // PRECEU_PH_QBLA_MM
UINT64_C(45372), // PRECEU_PH_QBL_MM
UINT64_C(2080376658), // PRECEU_PH_QBR
UINT64_C(2080376786), // PRECEU_PH_QBRA
UINT64_C(54076), // PRECEU_PH_QBRA_MM
UINT64_C(53564), // PRECEU_PH_QBR_MM
UINT64_C(2080375761), // PRECRQU_S_QB_PH
UINT64_C(365), // PRECRQU_S_QB_PH_MM
UINT64_C(2080376081), // PRECRQ_PH_W
UINT64_C(237), // PRECRQ_PH_W_MM
UINT64_C(2080375569), // PRECRQ_QB_PH
UINT64_C(173), // PRECRQ_QB_PH_MM
UINT64_C(2080376145), // PRECRQ_RS_PH_W
UINT64_C(301), // PRECRQ_RS_PH_W_MM
UINT64_C(2080375633), // PRECR_QB_PH
UINT64_C(109), // PRECR_QB_PH_MMR2
UINT64_C(2080376721), // PRECR_SRA_PH_W
UINT64_C(973), // PRECR_SRA_PH_W_MMR2
UINT64_C(2080376785), // PRECR_SRA_R_PH_W
UINT64_C(1997), // PRECR_SRA_R_PH_W_MMR2
UINT64_C(3422552064), // PREF
UINT64_C(2080374819), // PREFE
UINT64_C(1610654720), // PREFE_MM
UINT64_C(1409286560), // PREFX_MM
UINT64_C(1610620928), // PREF_MM
UINT64_C(1610620928), // PREF_MMR6
UINT64_C(2080374837), // PREF_R6
UINT64_C(2080374897), // PREPEND
UINT64_C(597), // PREPEND_MMR2
UINT64_C(2080376080), // RADDU_W_QB
UINT64_C(61756), // RADDU_W_QB_MM
UINT64_C(2080375992), // RDDSP
UINT64_C(1660), // RDDSP_MM
UINT64_C(2080374843), // RDHWR
UINT64_C(2080374843), // RDHWR64
UINT64_C(27452), // RDHWR_MM
UINT64_C(448), // RDHWR_MMR6
UINT64_C(57724), // RDPGPR_MMR6
UINT64_C(1176502293), // RECIP_D32
UINT64_C(1409307195), // RECIP_D32_MM
UINT64_C(1176502293), // RECIP_D64
UINT64_C(1409307195), // RECIP_D64_MM
UINT64_C(1174405141), // RECIP_S
UINT64_C(1409290811), // RECIP_S_MM
UINT64_C(2080375506), // REPLV_PH
UINT64_C(828), // REPLV_PH_MM
UINT64_C(2080374994), // REPLV_QB
UINT64_C(4924), // REPLV_QB_MM
UINT64_C(2080375442), // REPL_PH
UINT64_C(61), // REPL_PH_MM
UINT64_C(2080374930), // REPL_QB
UINT64_C(1532), // REPL_QB_MM
UINT64_C(1176502298), // RINT_D
UINT64_C(1409286688), // RINT_D_MMR6
UINT64_C(1174405146), // RINT_S
UINT64_C(1409286176), // RINT_S_MMR6
UINT64_C(2097154), // ROTR
UINT64_C(70), // ROTRV
UINT64_C(208), // ROTRV_MM
UINT64_C(192), // ROTR_MM
UINT64_C(1176502280), // ROUND_L_D64
UINT64_C(1409315643), // ROUND_L_D_MMR6
UINT64_C(1174405128), // ROUND_L_S
UINT64_C(1409299259), // ROUND_L_S_MMR6
UINT64_C(1176502284), // ROUND_W_D32
UINT64_C(1176502284), // ROUND_W_D64
UINT64_C(1409317691), // ROUND_W_D_MMR6
UINT64_C(1409317691), // ROUND_W_MM
UINT64_C(1174405132), // ROUND_W_S
UINT64_C(1409301307), // ROUND_W_S_MM
UINT64_C(1409301307), // ROUND_W_S_MMR6
UINT64_C(1176502294), // RSQRT_D32
UINT64_C(1409303099), // RSQRT_D32_MM
UINT64_C(1176502294), // RSQRT_D64
UINT64_C(1409303099), // RSQRT_D64_MM
UINT64_C(1174405142), // RSQRT_S
UINT64_C(1409286715), // RSQRT_S_MM
UINT64_C(25728), // Restore16
UINT64_C(25728), // RestoreX16
UINT64_C(2020605962), // SAT_S_B
UINT64_C(2013265930), // SAT_S_D
UINT64_C(2019557386), // SAT_S_H
UINT64_C(2017460234), // SAT_S_W
UINT64_C(2028994570), // SAT_U_B
UINT64_C(2021654538), // SAT_U_D
UINT64_C(2027945994), // SAT_U_H
UINT64_C(2025848842), // SAT_U_W
UINT64_C(2684354560), // SB
UINT64_C(34816), // SB16_MM
UINT64_C(34816), // SB16_MMR6
UINT64_C(2684354560), // SB64
UINT64_C(2080374812), // SBE
UINT64_C(1610655744), // SBE_MM
UINT64_C(402653184), // SB_MM
UINT64_C(402653184), // SB_MMR6
UINT64_C(3758096384), // SC
UINT64_C(3758096384), // SC64
UINT64_C(2080374822), // SC64_R6
UINT64_C(4026531840), // SCD
UINT64_C(2080374823), // SCD_R6
UINT64_C(2080374814), // SCE
UINT64_C(1610656768), // SCE_MM
UINT64_C(1610657792), // SC_MM
UINT64_C(1610657792), // SC_MMR6
UINT64_C(2080374822), // SC_R6
UINT64_C(4227858432), // SD
UINT64_C(1879048255), // SDBBP
UINT64_C(18112), // SDBBP16_MM
UINT64_C(17467), // SDBBP16_MMR6
UINT64_C(56188), // SDBBP_MM
UINT64_C(56188), // SDBBP_MMR6
UINT64_C(14), // SDBBP_R6
UINT64_C(4093640704), // SDC1
UINT64_C(4093640704), // SDC164
UINT64_C(3087007744), // SDC1_D64_MMR6
UINT64_C(3087007744), // SDC1_MM
UINT64_C(4160749568), // SDC2
UINT64_C(536911872), // SDC2_MMR6
UINT64_C(1239416832), // SDC2_R6
UINT64_C(4227858432), // SDC3
UINT64_C(26), // SDIV
UINT64_C(43836), // SDIV_MM
UINT64_C(2952790016), // SDL
UINT64_C(3019898880), // SDR
UINT64_C(1275068425), // SDXC1
UINT64_C(1275068425), // SDXC164
UINT64_C(2080375840), // SEB
UINT64_C(2080375840), // SEB64
UINT64_C(11068), // SEB_MM
UINT64_C(2080376352), // SEH
UINT64_C(2080376352), // SEH64
UINT64_C(15164), // SEH_MM
UINT64_C(53), // SELEQZ
UINT64_C(53), // SELEQZ64
UINT64_C(1176502292), // SELEQZ_D
UINT64_C(1409286712), // SELEQZ_D_MMR6
UINT64_C(320), // SELEQZ_MMR6
UINT64_C(1174405140), // SELEQZ_S
UINT64_C(1409286200), // SELEQZ_S_MMR6
UINT64_C(55), // SELNEZ
UINT64_C(55), // SELNEZ64
UINT64_C(1176502295), // SELNEZ_D
UINT64_C(1409286776), // SELNEZ_D_MMR6
UINT64_C(384), // SELNEZ_MMR6
UINT64_C(1174405143), // SELNEZ_S
UINT64_C(1409286264), // SELNEZ_S_MMR6
UINT64_C(1176502288), // SEL_D
UINT64_C(1409286840), // SEL_D_MMR6
UINT64_C(1174405136), // SEL_S
UINT64_C(1409286328), // SEL_S_MMR6
UINT64_C(1879048234), // SEQ
UINT64_C(1879048238), // SEQi
UINT64_C(2751463424), // SH
UINT64_C(43008), // SH16_MM
UINT64_C(43008), // SH16_MMR6
UINT64_C(2751463424), // SH64
UINT64_C(2080374813), // SHE
UINT64_C(1610656256), // SHE_MM
UINT64_C(2013265922), // SHF_B
UINT64_C(2030043138), // SHF_H
UINT64_C(2046820354), // SHF_W
UINT64_C(2080376504), // SHILO
UINT64_C(2080376568), // SHILOV
UINT64_C(4732), // SHILOV_MM
UINT64_C(29), // SHILO_MM
UINT64_C(2080375443), // SHLLV_PH
UINT64_C(14), // SHLLV_PH_MM
UINT64_C(2080374931), // SHLLV_QB
UINT64_C(917), // SHLLV_QB_MM
UINT64_C(2080375699), // SHLLV_S_PH
UINT64_C(1038), // SHLLV_S_PH_MM
UINT64_C(2080376211), // SHLLV_S_W
UINT64_C(981), // SHLLV_S_W_MM
UINT64_C(2080375315), // SHLL_PH
UINT64_C(949), // SHLL_PH_MM
UINT64_C(2080374803), // SHLL_QB
UINT64_C(2172), // SHLL_QB_MM
UINT64_C(2080375571), // SHLL_S_PH
UINT64_C(2997), // SHLL_S_PH_MM
UINT64_C(2080376083), // SHLL_S_W
UINT64_C(1013), // SHLL_S_W_MM
UINT64_C(2080375507), // SHRAV_PH
UINT64_C(397), // SHRAV_PH_MM
UINT64_C(2080375187), // SHRAV_QB
UINT64_C(461), // SHRAV_QB_MMR2
UINT64_C(2080375763), // SHRAV_R_PH
UINT64_C(1421), // SHRAV_R_PH_MM
UINT64_C(2080375251), // SHRAV_R_QB
UINT64_C(1485), // SHRAV_R_QB_MMR2
UINT64_C(2080376275), // SHRAV_R_W
UINT64_C(725), // SHRAV_R_W_MM
UINT64_C(2080375379), // SHRA_PH
UINT64_C(821), // SHRA_PH_MM
UINT64_C(2080375059), // SHRA_QB
UINT64_C(508), // SHRA_QB_MMR2
UINT64_C(2080375635), // SHRA_R_PH
UINT64_C(1845), // SHRA_R_PH_MM
UINT64_C(2080375123), // SHRA_R_QB
UINT64_C(4604), // SHRA_R_QB_MMR2
UINT64_C(2080376147), // SHRA_R_W
UINT64_C(757), // SHRA_R_W_MM
UINT64_C(2080376531), // SHRLV_PH
UINT64_C(789), // SHRLV_PH_MMR2
UINT64_C(2080374995), // SHRLV_QB
UINT64_C(853), // SHRLV_QB_MM
UINT64_C(2080376403), // SHRL_PH
UINT64_C(1020), // SHRL_PH_MMR2
UINT64_C(2080374867), // SHRL_QB
UINT64_C(6268), // SHRL_QB_MM
UINT64_C(939524096), // SH_MM
UINT64_C(939524096), // SH_MMR6
UINT64_C(2013265945), // SLDI_B
UINT64_C(2016935961), // SLDI_D
UINT64_C(2015363097), // SLDI_H
UINT64_C(2016411673), // SLDI_W
UINT64_C(2013265940), // SLD_B
UINT64_C(2019557396), // SLD_D
UINT64_C(2015363092), // SLD_H
UINT64_C(2017460244), // SLD_W
UINT64_C(0), // SLL
UINT64_C(9216), // SLL16_MM
UINT64_C(9216), // SLL16_MMR6
UINT64_C(0), // SLL64_32
UINT64_C(0), // SLL64_64
UINT64_C(2020605961), // SLLI_B
UINT64_C(2013265929), // SLLI_D
UINT64_C(2019557385), // SLLI_H
UINT64_C(2017460233), // SLLI_W
UINT64_C(4), // SLLV
UINT64_C(16), // SLLV_MM
UINT64_C(2013265933), // SLL_B
UINT64_C(2019557389), // SLL_D
UINT64_C(2015363085), // SLL_H
UINT64_C(0), // SLL_MM
UINT64_C(0), // SLL_MMR6
UINT64_C(2017460237), // SLL_W
UINT64_C(42), // SLT
UINT64_C(42), // SLT64
UINT64_C(848), // SLT_MM
UINT64_C(671088640), // SLTi
UINT64_C(671088640), // SLTi64
UINT64_C(2415919104), // SLTi_MM
UINT64_C(738197504), // SLTiu
UINT64_C(738197504), // SLTiu64
UINT64_C(2952790016), // SLTiu_MM
UINT64_C(43), // SLTu
UINT64_C(43), // SLTu64
UINT64_C(912), // SLTu_MM
UINT64_C(1879048235), // SNE
UINT64_C(1879048239), // SNEi
UINT64_C(2017460249), // SPLATI_B
UINT64_C(2021130265), // SPLATI_D
UINT64_C(2019557401), // SPLATI_H
UINT64_C(2020605977), // SPLATI_W
UINT64_C(2021654548), // SPLAT_B
UINT64_C(2027946004), // SPLAT_D
UINT64_C(2023751700), // SPLAT_H
UINT64_C(2025848852), // SPLAT_W
UINT64_C(3), // SRA
UINT64_C(2028994569), // SRAI_B
UINT64_C(2021654537), // SRAI_D
UINT64_C(2027945993), // SRAI_H
UINT64_C(2025848841), // SRAI_W
UINT64_C(2037383178), // SRARI_B
UINT64_C(2030043146), // SRARI_D
UINT64_C(2036334602), // SRARI_H
UINT64_C(2034237450), // SRARI_W
UINT64_C(2021654549), // SRAR_B
UINT64_C(2027946005), // SRAR_D
UINT64_C(2023751701), // SRAR_H
UINT64_C(2025848853), // SRAR_W
UINT64_C(7), // SRAV
UINT64_C(144), // SRAV_MM
UINT64_C(2021654541), // SRA_B
UINT64_C(2027945997), // SRA_D
UINT64_C(2023751693), // SRA_H
UINT64_C(128), // SRA_MM
UINT64_C(2025848845), // SRA_W
UINT64_C(2), // SRL
UINT64_C(9217), // SRL16_MM
UINT64_C(9217), // SRL16_MMR6
UINT64_C(2037383177), // SRLI_B
UINT64_C(2030043145), // SRLI_D
UINT64_C(2036334601), // SRLI_H
UINT64_C(2034237449), // SRLI_W
UINT64_C(2045771786), // SRLRI_B
UINT64_C(2038431754), // SRLRI_D
UINT64_C(2044723210), // SRLRI_H
UINT64_C(2042626058), // SRLRI_W
UINT64_C(2030043157), // SRLR_B
UINT64_C(2036334613), // SRLR_D
UINT64_C(2032140309), // SRLR_H
UINT64_C(2034237461), // SRLR_W
UINT64_C(6), // SRLV
UINT64_C(80), // SRLV_MM
UINT64_C(2030043149), // SRL_B
UINT64_C(2036334605), // SRL_D
UINT64_C(2032140301), // SRL_H
UINT64_C(64), // SRL_MM
UINT64_C(2034237453), // SRL_W
UINT64_C(64), // SSNOP
UINT64_C(2048), // SSNOP_MM
UINT64_C(2048), // SSNOP_MMR6
UINT64_C(2013265956), // ST_B
UINT64_C(2013265959), // ST_D
UINT64_C(2013265957), // ST_H
UINT64_C(2013265958), // ST_W
UINT64_C(34), // SUB
UINT64_C(2080375384), // SUBQH_PH
UINT64_C(589), // SUBQH_PH_MMR2
UINT64_C(2080375512), // SUBQH_R_PH
UINT64_C(1613), // SUBQH_R_PH_MMR2
UINT64_C(2080376024), // SUBQH_R_W
UINT64_C(1677), // SUBQH_R_W_MMR2
UINT64_C(2080375896), // SUBQH_W
UINT64_C(653), // SUBQH_W_MMR2
UINT64_C(2080375504), // SUBQ_PH
UINT64_C(525), // SUBQ_PH_MM
UINT64_C(2080375760), // SUBQ_S_PH
UINT64_C(1549), // SUBQ_S_PH_MM
UINT64_C(2080376272), // SUBQ_S_W
UINT64_C(837), // SUBQ_S_W_MM
UINT64_C(2030043153), // SUBSUS_U_B
UINT64_C(2036334609), // SUBSUS_U_D
UINT64_C(2032140305), // SUBSUS_U_H
UINT64_C(2034237457), // SUBSUS_U_W
UINT64_C(2038431761), // SUBSUU_S_B
UINT64_C(2044723217), // SUBSUU_S_D
UINT64_C(2040528913), // SUBSUU_S_H
UINT64_C(2042626065), // SUBSUU_S_W
UINT64_C(2013265937), // SUBS_S_B
UINT64_C(2019557393), // SUBS_S_D
UINT64_C(2015363089), // SUBS_S_H
UINT64_C(2017460241), // SUBS_S_W
UINT64_C(2021654545), // SUBS_U_B
UINT64_C(2027946001), // SUBS_U_D
UINT64_C(2023751697), // SUBS_U_H
UINT64_C(2025848849), // SUBS_U_W
UINT64_C(1025), // SUBU16_MM
UINT64_C(1025), // SUBU16_MMR6
UINT64_C(2080374872), // SUBUH_QB
UINT64_C(845), // SUBUH_QB_MMR2
UINT64_C(2080375000), // SUBUH_R_QB
UINT64_C(1869), // SUBUH_R_QB_MMR2
UINT64_C(464), // SUBU_MMR6
UINT64_C(2080375376), // SUBU_PH
UINT64_C(781), // SUBU_PH_MMR2
UINT64_C(2080374864), // SUBU_QB
UINT64_C(717), // SUBU_QB_MM
UINT64_C(2080375632), // SUBU_S_PH
UINT64_C(1805), // SUBU_S_PH_MMR2
UINT64_C(2080375120), // SUBU_S_QB
UINT64_C(1741), // SUBU_S_QB_MM
UINT64_C(2021654534), // SUBVI_B
UINT64_C(2027945990), // SUBVI_D
UINT64_C(2023751686), // SUBVI_H
UINT64_C(2025848838), // SUBVI_W
UINT64_C(2021654542), // SUBV_B
UINT64_C(2027945998), // SUBV_D
UINT64_C(2023751694), // SUBV_H
UINT64_C(2025848846), // SUBV_W
UINT64_C(400), // SUB_MM
UINT64_C(400), // SUB_MMR6
UINT64_C(35), // SUBu
UINT64_C(464), // SUBu_MM
UINT64_C(1275068429), // SUXC1
UINT64_C(1275068429), // SUXC164
UINT64_C(1409286536), // SUXC1_MM
UINT64_C(2885681152), // SW
UINT64_C(59392), // SW16_MM
UINT64_C(59392), // SW16_MMR6
UINT64_C(2885681152), // SW64
UINT64_C(3825205248), // SWC1
UINT64_C(2550136832), // SWC1_MM
UINT64_C(3892314112), // SWC2
UINT64_C(536903680), // SWC2_MMR6
UINT64_C(1231028224), // SWC2_R6
UINT64_C(3959422976), // SWC3
UINT64_C(2885681152), // SWDSP
UINT64_C(4160749568), // SWDSP_MM
UINT64_C(2080374815), // SWE
UINT64_C(1610657280), // SWE_MM
UINT64_C(2818572288), // SWL
UINT64_C(2818572288), // SWL64
UINT64_C(2080374817), // SWLE
UINT64_C(1610653696), // SWLE_MM
UINT64_C(1610645504), // SWL_MM
UINT64_C(17728), // SWM16_MM
UINT64_C(17418), // SWM16_MMR6
UINT64_C(536924160), // SWM32_MM
UINT64_C(536907776), // SWP_MM
UINT64_C(3087007744), // SWR
UINT64_C(3087007744), // SWR64
UINT64_C(2080374818), // SWRE
UINT64_C(1610654208), // SWRE_MM
UINT64_C(1610649600), // SWR_MM
UINT64_C(51200), // SWSP_MM
UINT64_C(51200), // SWSP_MMR6
UINT64_C(1275068424), // SWXC1
UINT64_C(1409286280), // SWXC1_MM
UINT64_C(4160749568), // SW_MM
UINT64_C(4160749568), // SW_MMR6
UINT64_C(15), // SYNC
UINT64_C(69140480), // SYNCI
UINT64_C(1107296256), // SYNCI_MM
UINT64_C(1098907648), // SYNCI_MMR6
UINT64_C(27516), // SYNC_MM
UINT64_C(27516), // SYNC_MMR6
UINT64_C(12), // SYSCALL
UINT64_C(35708), // SYSCALL_MM
UINT64_C(25728), // Save16
UINT64_C(25728), // SaveX16
UINT64_C(4026580992), // SbRxRyOffMemX16
UINT64_C(59537), // SebRx16
UINT64_C(59569), // SehRx16
UINT64_C(4026583040), // ShRxRyOffMemX16
UINT64_C(4026544128), // SllX16
UINT64_C(59396), // SllvRxRy16
UINT64_C(59394), // SltRxRy16
UINT64_C(20480), // SltiRxImm16
UINT64_C(4026552320), // SltiRxImmX16
UINT64_C(22528), // SltiuRxImm16
UINT64_C(4026554368), // SltiuRxImmX16
UINT64_C(59395), // SltuRxRy16
UINT64_C(4026544131), // SraX16
UINT64_C(59399), // SravRxRy16
UINT64_C(4026544130), // SrlX16
UINT64_C(59398), // SrlvRxRy16
UINT64_C(57347), // SubuRxRyRz16
UINT64_C(4026587136), // SwRxRyOffMemX16
UINT64_C(4026585088), // SwRxSpImmX16
UINT64_C(52), // TEQ
UINT64_C(67895296), // TEQI
UINT64_C(1103101952), // TEQI_MM
UINT64_C(60), // TEQ_MM
UINT64_C(48), // TGE
UINT64_C(67633152), // TGEI
UINT64_C(67698688), // TGEIU
UINT64_C(1096810496), // TGEIU_MM
UINT64_C(1092616192), // TGEI_MM
UINT64_C(49), // TGEU
UINT64_C(1084), // TGEU_MM
UINT64_C(572), // TGE_MM
UINT64_C(1107296267), // TLBGINV
UINT64_C(1107296268), // TLBGINVF
UINT64_C(20860), // TLBGINVF_MM
UINT64_C(16764), // TLBGINV_MM
UINT64_C(1107296272), // TLBGP
UINT64_C(380), // TLBGP_MM
UINT64_C(1107296265), // TLBGR
UINT64_C(4476), // TLBGR_MM
UINT64_C(1107296266), // TLBGWI
UINT64_C(8572), // TLBGWI_MM
UINT64_C(1107296270), // TLBGWR
UINT64_C(12668), // TLBGWR_MM
UINT64_C(1107296259), // TLBINV
UINT64_C(1107296260), // TLBINVF
UINT64_C(21372), // TLBINVF_MMR6
UINT64_C(17276), // TLBINV_MMR6
UINT64_C(1107296264), // TLBP
UINT64_C(892), // TLBP_MM
UINT64_C(1107296257), // TLBR
UINT64_C(4988), // TLBR_MM
UINT64_C(1107296258), // TLBWI
UINT64_C(9084), // TLBWI_MM
UINT64_C(1107296262), // TLBWR
UINT64_C(13180), // TLBWR_MM
UINT64_C(50), // TLT
UINT64_C(67764224), // TLTI
UINT64_C(1094713344), // TLTIU_MM
UINT64_C(1090519040), // TLTI_MM
UINT64_C(51), // TLTU
UINT64_C(2620), // TLTU_MM
UINT64_C(2108), // TLT_MM
UINT64_C(54), // TNE
UINT64_C(68026368), // TNEI
UINT64_C(1098907648), // TNEI_MM
UINT64_C(3132), // TNE_MM
UINT64_C(1176502281), // TRUNC_L_D64
UINT64_C(1409311547), // TRUNC_L_D_MMR6
UINT64_C(1174405129), // TRUNC_L_S
UINT64_C(1409295163), // TRUNC_L_S_MMR6
UINT64_C(1176502285), // TRUNC_W_D32
UINT64_C(1176502285), // TRUNC_W_D64
UINT64_C(1409313595), // TRUNC_W_D_MMR6
UINT64_C(1409313595), // TRUNC_W_MM
UINT64_C(1174405133), // TRUNC_W_S
UINT64_C(1409297211), // TRUNC_W_S_MM
UINT64_C(1409297211), // TRUNC_W_S_MMR6
UINT64_C(67829760), // TTLTIU
UINT64_C(27), // UDIV
UINT64_C(47932), // UDIV_MM
UINT64_C(1879048209), // V3MULU
UINT64_C(1879048208), // VMM0
UINT64_C(1879048207), // VMULU
UINT64_C(2013265941), // VSHF_B
UINT64_C(2019557397), // VSHF_D
UINT64_C(2015363093), // VSHF_H
UINT64_C(2017460245), // VSHF_W
UINT64_C(1107296288), // WAIT
UINT64_C(37756), // WAIT_MM
UINT64_C(37756), // WAIT_MMR6
UINT64_C(2080376056), // WRDSP
UINT64_C(5756), // WRDSP_MM
UINT64_C(61820), // WRPGPR_MMR6
UINT64_C(2080374944), // WSBH
UINT64_C(31548), // WSBH_MM
UINT64_C(31548), // WSBH_MMR6
UINT64_C(38), // XOR
UINT64_C(17472), // XOR16_MM
UINT64_C(17416), // XOR16_MMR6
UINT64_C(38), // XOR64
UINT64_C(2063597568), // XORI_B
UINT64_C(1879048192), // XORI_MMR6
UINT64_C(784), // XOR_MM
UINT64_C(784), // XOR_MMR6
UINT64_C(2019557406), // XOR_V
UINT64_C(939524096), // XORi
UINT64_C(939524096), // XORi64
UINT64_C(1879048192), // XORi_MM
UINT64_C(59406), // XorRxRxRy16
UINT64_C(2080374793), // YIELD
UINT64_C(0)
};
const unsigned opcode = MI.getOpcode();
uint64_t Value = InstBits[opcode];
uint64_t op = 0;
(void)op; // suppress warning
switch (opcode) {
case Mips::Break16:
case Mips::DERET:
case Mips::DERET_MM:
case Mips::DERET_MMR6:
case Mips::EHB:
case Mips::EHB_MM:
case Mips::EHB_MMR6:
case Mips::ERET:
case Mips::ERETNC:
case Mips::ERETNC_MMR6:
case Mips::ERET_MM:
case Mips::ERET_MMR6:
case Mips::JrRa16:
case Mips::JrcRa16:
case Mips::PAUSE:
case Mips::PAUSE_MM:
case Mips::PAUSE_MMR6:
case Mips::Restore16:
case Mips::RestoreX16:
case Mips::SSNOP:
case Mips::SSNOP_MM:
case Mips::SSNOP_MMR6:
case Mips::Save16:
case Mips::SaveX16:
case Mips::TLBGINV:
case Mips::TLBGINVF:
case Mips::TLBGINVF_MM:
case Mips::TLBGINV_MM:
case Mips::TLBGP:
case Mips::TLBGP_MM:
case Mips::TLBGR:
case Mips::TLBGR_MM:
case Mips::TLBGWI:
case Mips::TLBGWI_MM:
case Mips::TLBGWR:
case Mips::TLBGWR_MM:
case Mips::TLBINV:
case Mips::TLBINVF:
case Mips::TLBINVF_MMR6:
case Mips::TLBINV_MMR6:
case Mips::TLBP:
case Mips::TLBP_MM:
case Mips::TLBR:
case Mips::TLBR_MM:
case Mips::TLBWI:
case Mips::TLBWI_MM:
case Mips::TLBWR:
case Mips::TLBWR_MM:
case Mips::WAIT: {
break;
}
case Mips::MTHLIP:
case Mips::SHILOV: {
// op: ac
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(3)) << 11;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
break;
}
case Mips::DPAQX_SA_W_PH:
case Mips::DPAQX_S_W_PH:
case Mips::DPAQ_SA_L_W:
case Mips::DPAQ_S_W_PH:
case Mips::DPAU_H_QBL:
case Mips::DPAU_H_QBR:
case Mips::DPAX_W_PH:
case Mips::DPA_W_PH:
case Mips::DPSQX_SA_W_PH:
case Mips::DPSQX_S_W_PH:
case Mips::DPSQ_SA_L_W:
case Mips::DPSQ_S_W_PH:
case Mips::DPSU_H_QBL:
case Mips::DPSU_H_QBR:
case Mips::DPSX_W_PH:
case Mips::DPS_W_PH:
case Mips::MADDU_DSP:
case Mips::MADD_DSP:
case Mips::MAQ_SA_W_PHL:
case Mips::MAQ_SA_W_PHR:
case Mips::MAQ_S_W_PHL:
case Mips::MAQ_S_W_PHR:
case Mips::MSUBU_DSP:
case Mips::MSUB_DSP:
case Mips::MULSAQ_S_W_PH:
case Mips::MULSA_W_PH:
case Mips::MULTU_DSP:
case Mips::MULT_DSP: {
// op: ac
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(3)) << 11;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::SHILO: {
// op: ac
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(3)) << 11;
// op: shift
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(63)) << 20;
break;
}
case Mips::CACHEE:
case Mips::CACHE_R6:
case Mips::PREFE:
case Mips::PREF_R6: {
// op: addr
op = getMemEncoding(MI, 0, Fixups, STI);
Value |= (op & UINT64_C(2031616)) << 5;
Value |= (op & UINT64_C(511)) << 7;
// op: hint
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::SYNCI: {
// op: addr
op = getMemEncoding(MI, 0, Fixups, STI);
Value |= (op & UINT64_C(2031616)) << 5;
Value |= op & UINT64_C(65535);
break;
}
case Mips::CACHE:
case Mips::PREF: {
// op: addr
op = getMemEncoding(MI, 0, Fixups, STI);
Value |= (op & UINT64_C(2031616)) << 5;
Value |= op & UINT64_C(65535);
// op: hint
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::LD_B:
case Mips::ST_B: {
// op: addr
op = getMemEncoding(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(1023)) << 16;
Value |= (op & UINT64_C(2031616)) >> 5;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::LBE:
case Mips::LBuE:
case Mips::LHE:
case Mips::LHuE:
case Mips::LLE:
case Mips::LWE:
case Mips::LWLE:
case Mips::LWRE:
case Mips::SBE:
case Mips::SHE:
case Mips::SWE:
case Mips::SWLE:
case Mips::SWRE: {
// op: addr
op = getMemEncoding(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(2031616)) << 5;
Value |= (op & UINT64_C(511)) << 7;
// op: hint
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::SCE: {
// op: addr
op = getMemEncoding(MI, 2, Fixups, STI);
Value |= (op & UINT64_C(2031616)) << 5;
Value |= (op & UINT64_C(511)) << 7;
// op: hint
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::LD_H:
case Mips::ST_H: {
// op: addr
op = getMemEncoding<1>(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(1023)) << 16;
Value |= (op & UINT64_C(2031616)) >> 5;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::LD_W:
case Mips::ST_W: {
// op: addr
op = getMemEncoding<2>(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(1023)) << 16;
Value |= (op & UINT64_C(2031616)) >> 5;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::LD_D:
case Mips::ST_D: {
// op: addr
op = getMemEncoding<3>(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(1023)) << 16;
Value |= (op & UINT64_C(2031616)) >> 5;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::CACHE_MM:
case Mips::CACHE_MMR6:
case Mips::PREF_MM:
case Mips::PREF_MMR6: {
// op: addr
op = getMemEncodingMMImm12(MI, 0, Fixups, STI);
Value |= op & UINT64_C(2031616);
Value |= op & UINT64_C(4095);
// op: hint
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
break;
}
case Mips::SYNCI_MM:
case Mips::SYNCI_MMR6: {
// op: addr
op = getMemEncodingMMImm16(MI, 0, Fixups, STI);
Value |= op & UINT64_C(2097151);
break;
}
case Mips::LBU_MMR6:
case Mips::LB_MMR6: {
// op: addr
op = getMemEncodingMMImm16(MI, 1, Fixups, STI);
Value |= op & UINT64_C(2097151);
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
break;
}
case Mips::CACHEE_MM:
case Mips::PREFE_MM: {
// op: addr
op = getMemEncodingMMImm9(MI, 0, Fixups, STI);
Value |= op & UINT64_C(2031616);
Value |= op & UINT64_C(511);
// op: hint
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
break;
}
case Mips::HYPCALL: {
// op: code_
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(1023)) << 11;
break;
}
case Mips::HYPCALL_MM:
case Mips::SDBBP_MM:
case Mips::SDBBP_MMR6:
case Mips::SYSCALL_MM:
case Mips::WAIT_MM:
case Mips::WAIT_MMR6: {
// op: code_
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(1023)) << 16;
break;
}
case Mips::SDBBP:
case Mips::SDBBP_R6:
case Mips::SYSCALL: {
// op: code_
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(1048575)) << 6;
break;
}
case Mips::BREAK16_MMR6:
case Mips::SDBBP16_MMR6: {
// op: code_
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(15)) << 6;
break;
}
case Mips::BREAK16_MM:
case Mips::SDBBP16_MM: {
// op: code_
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= op & UINT64_C(15);
break;
}
case Mips::BREAK:
case Mips::BREAK_MM:
case Mips::BREAK_MMR6: {
// op: code_1
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(1023)) << 16;
// op: code_2
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(1023)) << 6;
break;
}
case Mips::BC2EQZ:
case Mips::BC2NEZ: {
// op: ct
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: offset
op = getBranchTargetOpValue(MI, 1, Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::MOVEP_MMR6: {
// op: dst_regs
op = getMovePRegPairOpValue(MI, 0, Fixups, STI);
Value |= (op & UINT64_C(7)) << 7;
// op: rt
op = getMovePRegSingleOpValue(MI, 3, Fixups, STI);
Value |= (op & UINT64_C(7)) << 4;
// op: rs
op = getMovePRegSingleOpValue(MI, 2, Fixups, STI);
Value |= (op & UINT64_C(4)) << 1;
Value |= op & UINT64_C(3);
break;
}
case Mips::MOVEP_MM: {
// op: dst_regs
op = getMovePRegPairOpValue(MI, 0, Fixups, STI);
Value |= (op & UINT64_C(7)) << 7;
// op: rt
op = getMovePRegSingleOpValue(MI, 3, Fixups, STI);
Value |= (op & UINT64_C(7)) << 4;
// op: rs
op = getMovePRegSingleOpValue(MI, 2, Fixups, STI);
Value |= (op & UINT64_C(7)) << 1;
break;
}
case Mips::BC1F:
case Mips::BC1FL:
case Mips::BC1T:
case Mips::BC1TL: {
// op: fcc
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 18;
// op: offset
op = getBranchTargetOpValue(MI, 1, Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::BC1F_MM:
case Mips::BC1T_MM: {
// op: fcc
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 18;
// op: offset
op = getBranchTargetOpValueMM(MI, 1, Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::LUXC1_MM:
case Mips::LWXC1_MM: {
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: base
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: index
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
break;
}
case Mips::MOVN_I_D32_MM:
case Mips::MOVN_I_S_MM:
case Mips::MOVZ_I_D32_MM:
case Mips::MOVZ_I_S_MM: {
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
break;
}
case Mips::CEIL_W_MM:
case Mips::CEIL_W_S_MM:
case Mips::CVT_D32_S_MM:
case Mips::CVT_D32_W_MM:
case Mips::CVT_D64_S_MM:
case Mips::CVT_D64_W_MM:
case Mips::CVT_L_D64_MM:
case Mips::CVT_L_S_MM:
case Mips::CVT_S_D32_MM:
case Mips::CVT_S_D64_MM:
case Mips::CVT_S_W_MM:
case Mips::CVT_W_D32_MM:
case Mips::CVT_W_D64_MM:
case Mips::CVT_W_S_MM:
case Mips::FABS_D32_MM:
case Mips::FABS_D64_MM:
case Mips::FABS_S_MM:
case Mips::FLOOR_W_MM:
case Mips::FLOOR_W_S_MM:
case Mips::FMOV_D32_MM:
case Mips::FMOV_D64_MM:
case Mips::FMOV_S_MM:
case Mips::FNEG_D32_MM:
case Mips::FNEG_D64_MM:
case Mips::FNEG_S_MM:
case Mips::FSQRT_D32_MM:
case Mips::FSQRT_D64_MM:
case Mips::FSQRT_S_MM:
case Mips::RECIP_D32_MM:
case Mips::RECIP_D64_MM:
case Mips::RECIP_S_MM:
case Mips::ROUND_W_MM:
case Mips::ROUND_W_S_MM:
case Mips::RSQRT_D32_MM:
case Mips::RSQRT_D64_MM:
case Mips::RSQRT_S_MM:
case Mips::TRUNC_W_MM:
case Mips::TRUNC_W_S_MM: {
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::MOVF_D32_MM:
case Mips::MOVF_S_MM:
case Mips::MOVT_D32_MM:
case Mips::MOVT_S_MM: {
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: fcc
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(7)) << 13;
break;
}
case Mips::LDXC1:
case Mips::LDXC164:
case Mips::LUXC1:
case Mips::LUXC164:
case Mips::LWXC1: {
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
// op: base
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: index
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::MADD_D32:
case Mips::MADD_D64:
case Mips::MADD_S:
case Mips::MSUB_D32:
case Mips::MSUB_D64:
case Mips::MSUB_S:
case Mips::NMADD_D32:
case Mips::NMADD_D64:
case Mips::NMADD_S:
case Mips::NMSUB_D32:
case Mips::NMSUB_D64:
case Mips::NMSUB_S: {
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
// op: fr
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: ft
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::CEIL_L_D64:
case Mips::CEIL_L_S:
case Mips::CEIL_W_D32:
case Mips::CEIL_W_D64:
case Mips::CEIL_W_S:
case Mips::CVT_D32_S:
case Mips::CVT_D32_W:
case Mips::CVT_D64_L:
case Mips::CVT_D64_S:
case Mips::CVT_D64_W:
case Mips::CVT_L_D64:
case Mips::CVT_L_S:
case Mips::CVT_S_D32:
case Mips::CVT_S_D64:
case Mips::CVT_S_L:
case Mips::CVT_S_W:
case Mips::CVT_W_D32:
case Mips::CVT_W_D64:
case Mips::CVT_W_S:
case Mips::FABS_D32:
case Mips::FABS_D64:
case Mips::FABS_S:
case Mips::FLOOR_L_D64:
case Mips::FLOOR_L_S:
case Mips::FLOOR_W_D32:
case Mips::FLOOR_W_D64:
case Mips::FLOOR_W_S:
case Mips::FMOV_D32:
case Mips::FMOV_D64:
case Mips::FMOV_S:
case Mips::FNEG_D32:
case Mips::FNEG_D64:
case Mips::FNEG_S:
case Mips::FSQRT_D32:
case Mips::FSQRT_D64:
case Mips::FSQRT_S:
case Mips::RECIP_D32:
case Mips::RECIP_D64:
case Mips::RECIP_S:
case Mips::ROUND_L_D64:
case Mips::ROUND_L_S:
case Mips::ROUND_W_D32:
case Mips::ROUND_W_D64:
case Mips::ROUND_W_S:
case Mips::RSQRT_D32:
case Mips::RSQRT_D64:
case Mips::RSQRT_S:
case Mips::TRUNC_L_D64:
case Mips::TRUNC_L_S:
case Mips::TRUNC_W_D32:
case Mips::TRUNC_W_D64:
case Mips::TRUNC_W_S: {
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::MOVF_D32:
case Mips::MOVF_D64:
case Mips::MOVF_S:
case Mips::MOVT_D32:
case Mips::MOVT_D64:
case Mips::MOVT_S: {
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: fcc
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(7)) << 18;
break;
}
case Mips::CMP_EQ_D:
case Mips::CMP_EQ_S:
case Mips::CMP_F_D:
case Mips::CMP_F_S:
case Mips::CMP_LE_D:
case Mips::CMP_LE_S:
case Mips::CMP_LT_D:
case Mips::CMP_LT_S:
case Mips::CMP_SAF_D:
case Mips::CMP_SAF_S:
case Mips::CMP_SEQ_D:
case Mips::CMP_SEQ_S:
case Mips::CMP_SLE_D:
case Mips::CMP_SLE_S:
case Mips::CMP_SLT_D:
case Mips::CMP_SLT_S:
case Mips::CMP_SUEQ_D:
case Mips::CMP_SUEQ_S:
case Mips::CMP_SULE_D:
case Mips::CMP_SULE_S:
case Mips::CMP_SULT_D:
case Mips::CMP_SULT_S:
case Mips::CMP_SUN_D:
case Mips::CMP_SUN_S:
case Mips::CMP_UEQ_D:
case Mips::CMP_UEQ_S:
case Mips::CMP_ULE_D:
case Mips::CMP_ULE_S:
case Mips::CMP_ULT_D:
case Mips::CMP_ULT_S:
case Mips::CMP_UN_D:
case Mips::CMP_UN_S:
case Mips::FADD_D32:
case Mips::FADD_D64:
case Mips::FADD_S:
case Mips::FDIV_D32:
case Mips::FDIV_D64:
case Mips::FDIV_S:
case Mips::FMUL_D32:
case Mips::FMUL_D64:
case Mips::FMUL_S:
case Mips::FSUB_D32:
case Mips::FSUB_D64:
case Mips::FSUB_S: {
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: ft
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::MOVN_I64_D64:
case Mips::MOVN_I64_S:
case Mips::MOVN_I_D32:
case Mips::MOVN_I_D64:
case Mips::MOVN_I_S:
case Mips::MOVZ_I64_D64:
case Mips::MOVZ_I64_S:
case Mips::MOVZ_I_D32:
case Mips::MOVZ_I_D64:
case Mips::MOVZ_I_S: {
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::SUXC1_MM:
case Mips::SWXC1_MM: {
// op: fs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: base
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: index
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
break;
}
case Mips::SDXC1:
case Mips::SDXC164:
case Mips::SUXC1:
case Mips::SUXC164:
case Mips::SWXC1: {
// op: fs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: base
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: index
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::FCMP_D32:
case Mips::FCMP_D64:
case Mips::FCMP_S32: {
// op: fs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: ft
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: cond
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= op & UINT64_C(15);
break;
}
case Mips::FCMP_D32_MM:
case Mips::FCMP_S32_MM: {
// op: fs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: ft
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: cond
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(15)) << 6;
break;
}
case Mips::CLASS_D:
case Mips::CLASS_S:
case Mips::RINT_D:
case Mips::RINT_S: {
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::C_EQ_D32:
case Mips::C_EQ_D64:
case Mips::C_EQ_S:
case Mips::C_F_D32:
case Mips::C_F_D64:
case Mips::C_F_S:
case Mips::C_LE_D32:
case Mips::C_LE_D64:
case Mips::C_LE_S:
case Mips::C_LT_D32:
case Mips::C_LT_D64:
case Mips::C_LT_S:
case Mips::C_NGE_D32:
case Mips::C_NGE_D64:
case Mips::C_NGE_S:
case Mips::C_NGLE_D32:
case Mips::C_NGLE_D64:
case Mips::C_NGLE_S:
case Mips::C_NGL_D32:
case Mips::C_NGL_D64:
case Mips::C_NGL_S:
case Mips::C_NGT_D32:
case Mips::C_NGT_D64:
case Mips::C_NGT_S:
case Mips::C_OLE_D32:
case Mips::C_OLE_D64:
case Mips::C_OLE_S:
case Mips::C_OLT_D32:
case Mips::C_OLT_D64:
case Mips::C_OLT_S:
case Mips::C_SEQ_D32:
case Mips::C_SEQ_D64:
case Mips::C_SEQ_S:
case Mips::C_SF_D32:
case Mips::C_SF_D64:
case Mips::C_SF_S:
case Mips::C_UEQ_D32:
case Mips::C_UEQ_D64:
case Mips::C_UEQ_S:
case Mips::C_ULE_D32:
case Mips::C_ULE_D64:
case Mips::C_ULE_S:
case Mips::C_ULT_D32:
case Mips::C_ULT_D64:
case Mips::C_ULT_S:
case Mips::C_UN_D32:
case Mips::C_UN_D64:
case Mips::C_UN_S: {
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: ft
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: fcc
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 8;
break;
}
case Mips::C_EQ_D32_MM:
case Mips::C_EQ_D64_MM:
case Mips::C_EQ_S_MM:
case Mips::C_F_D32_MM:
case Mips::C_F_D64_MM:
case Mips::C_F_S_MM:
case Mips::C_LE_D32_MM:
case Mips::C_LE_D64_MM:
case Mips::C_LE_S_MM:
case Mips::C_LT_D32_MM:
case Mips::C_LT_D64_MM:
case Mips::C_LT_S_MM:
case Mips::C_NGE_D32_MM:
case Mips::C_NGE_D64_MM:
case Mips::C_NGE_S_MM:
case Mips::C_NGLE_D32_MM:
case Mips::C_NGLE_D64_MM:
case Mips::C_NGLE_S_MM:
case Mips::C_NGL_D32_MM:
case Mips::C_NGL_D64_MM:
case Mips::C_NGL_S_MM:
case Mips::C_NGT_D32_MM:
case Mips::C_NGT_D64_MM:
case Mips::C_NGT_S_MM:
case Mips::C_OLE_D32_MM:
case Mips::C_OLE_D64_MM:
case Mips::C_OLE_S_MM:
case Mips::C_OLT_D32_MM:
case Mips::C_OLT_D64_MM:
case Mips::C_OLT_S_MM:
case Mips::C_SEQ_D32_MM:
case Mips::C_SEQ_D64_MM:
case Mips::C_SEQ_S_MM:
case Mips::C_SF_D32_MM:
case Mips::C_SF_D64_MM:
case Mips::C_SF_S_MM:
case Mips::C_UEQ_D32_MM:
case Mips::C_UEQ_D64_MM:
case Mips::C_UEQ_S_MM:
case Mips::C_ULE_D32_MM:
case Mips::C_ULE_D64_MM:
case Mips::C_ULE_S_MM:
case Mips::C_ULT_D32_MM:
case Mips::C_ULT_D64_MM:
case Mips::C_ULT_S_MM:
case Mips::C_UN_D32_MM:
case Mips::C_UN_D64_MM:
case Mips::C_UN_S_MM: {
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: ft
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: fcc
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 13;
break;
}
case Mips::CLASS_D_MMR6:
case Mips::CLASS_S_MMR6:
case Mips::RINT_D_MMR6:
case Mips::RINT_S_MMR6: {
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::BC1EQZ:
case Mips::BC1NEZ: {
// op: ft
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: offset
op = getBranchTargetOpValue(MI, 1, Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::LDC1_D64_MMR6:
case Mips::SDC1_D64_MMR6: {
// op: ft
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: addr
op = getMemEncodingMMImm16(MI, 1, Fixups, STI);
Value |= op & UINT64_C(2097151);
break;
}
case Mips::CEIL_L_D_MMR6:
case Mips::CEIL_L_S_MMR6:
case Mips::CEIL_W_D_MMR6:
case Mips::CEIL_W_S_MMR6:
case Mips::CVT_D_L_MMR6:
case Mips::CVT_L_D_MMR6:
case Mips::CVT_L_S_MMR6:
case Mips::CVT_S_L_MMR6:
case Mips::CVT_S_W_MMR6:
case Mips::CVT_W_S_MMR6:
case Mips::FLOOR_L_D_MMR6:
case Mips::FLOOR_L_S_MMR6:
case Mips::FLOOR_W_D_MMR6:
case Mips::FLOOR_W_S_MMR6:
case Mips::FMOV_S_MMR6:
case Mips::FNEG_S_MMR6:
case Mips::ROUND_L_D_MMR6:
case Mips::ROUND_L_S_MMR6:
case Mips::ROUND_W_D_MMR6:
case Mips::ROUND_W_S_MMR6:
case Mips::TRUNC_L_D_MMR6:
case Mips::TRUNC_L_S_MMR6:
case Mips::TRUNC_W_D_MMR6:
case Mips::TRUNC_W_S_MMR6: {
// op: ft
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::FADD_S_MMR6:
case Mips::FDIV_S_MMR6:
case Mips::FMUL_S_MMR6:
case Mips::FSUB_S_MMR6: {
// op: ft
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::MAXA_D:
case Mips::MAXA_S:
case Mips::MAX_D:
case Mips::MAX_S:
case Mips::MINA_D:
case Mips::MINA_S:
case Mips::MIN_D:
case Mips::MIN_S:
case Mips::SELEQZ_D:
case Mips::SELEQZ_S:
case Mips::SELNEZ_D:
case Mips::SELNEZ_S: {
// op: ft
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::CMP_AF_D_MMR6:
case Mips::CMP_AF_S_MMR6:
case Mips::CMP_EQ_D_MMR6:
case Mips::CMP_EQ_S_MMR6:
case Mips::CMP_LE_D_MMR6:
case Mips::CMP_LE_S_MMR6:
case Mips::CMP_LT_D_MMR6:
case Mips::CMP_LT_S_MMR6:
case Mips::CMP_SAF_D_MMR6:
case Mips::CMP_SAF_S_MMR6:
case Mips::CMP_SEQ_D_MMR6:
case Mips::CMP_SEQ_S_MMR6:
case Mips::CMP_SLE_D_MMR6:
case Mips::CMP_SLE_S_MMR6:
case Mips::CMP_SLT_D_MMR6:
case Mips::CMP_SLT_S_MMR6:
case Mips::CMP_SUEQ_D_MMR6:
case Mips::CMP_SUEQ_S_MMR6:
case Mips::CMP_SULE_D_MMR6:
case Mips::CMP_SULE_S_MMR6:
case Mips::CMP_SULT_D_MMR6:
case Mips::CMP_SULT_S_MMR6:
case Mips::CMP_SUN_D_MMR6:
case Mips::CMP_SUN_S_MMR6:
case Mips::CMP_UEQ_D_MMR6:
case Mips::CMP_UEQ_S_MMR6:
case Mips::CMP_ULE_D_MMR6:
case Mips::CMP_ULE_S_MMR6:
case Mips::CMP_ULT_D_MMR6:
case Mips::CMP_ULT_S_MMR6:
case Mips::CMP_UN_D_MMR6:
case Mips::CMP_UN_S_MMR6:
case Mips::FADD_D32_MM:
case Mips::FADD_D64_MM:
case Mips::FADD_S_MM:
case Mips::FDIV_D32_MM:
case Mips::FDIV_D64_MM:
case Mips::FDIV_S_MM:
case Mips::FMUL_D32_MM:
case Mips::FMUL_D64_MM:
case Mips::FMUL_S_MM:
case Mips::FSUB_D32_MM:
case Mips::FSUB_D64_MM:
case Mips::FSUB_S_MM:
case Mips::MAXA_D_MMR6:
case Mips::MAXA_S_MMR6:
case Mips::MAX_D_MMR6:
case Mips::MAX_S_MMR6:
case Mips::MINA_D_MMR6:
case Mips::MINA_S_MMR6:
case Mips::MIN_D_MMR6:
case Mips::MIN_S_MMR6:
case Mips::SELEQZ_D_MMR6:
case Mips::SELEQZ_S_MMR6:
case Mips::SELNEZ_D_MMR6:
case Mips::SELNEZ_S_MMR6: {
// op: ft
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::MADDF_D:
case Mips::MADDF_S:
case Mips::MSUBF_D:
case Mips::MSUBF_S:
case Mips::SEL_D:
case Mips::SEL_S: {
// op: ft
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::MADDF_D_MMR6:
case Mips::MADDF_S_MMR6:
case Mips::MSUBF_D_MMR6:
case Mips::MSUBF_S_MMR6:
case Mips::SEL_D_MMR6:
case Mips::SEL_S_MMR6: {
// op: ft
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::MADD_D32_MM:
case Mips::MADD_S_MM:
case Mips::MSUB_D32_MM:
case Mips::MSUB_S_MM:
case Mips::NMADD_D32_MM:
case Mips::NMADD_S_MM:
case Mips::NMSUB_D32_MM:
case Mips::NMSUB_S_MM: {
// op: ft
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: fd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: fr
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::ADDVI_B:
case Mips::ADDVI_D:
case Mips::ADDVI_H:
case Mips::ADDVI_W:
case Mips::CEQI_B:
case Mips::CEQI_D:
case Mips::CEQI_H:
case Mips::CEQI_W:
case Mips::CLEI_S_B:
case Mips::CLEI_S_D:
case Mips::CLEI_S_H:
case Mips::CLEI_S_W:
case Mips::CLEI_U_B:
case Mips::CLEI_U_D:
case Mips::CLEI_U_H:
case Mips::CLEI_U_W:
case Mips::CLTI_S_B:
case Mips::CLTI_S_D:
case Mips::CLTI_S_H:
case Mips::CLTI_S_W:
case Mips::CLTI_U_B:
case Mips::CLTI_U_D:
case Mips::CLTI_U_H:
case Mips::CLTI_U_W:
case Mips::MAXI_S_B:
case Mips::MAXI_S_D:
case Mips::MAXI_S_H:
case Mips::MAXI_S_W:
case Mips::MAXI_U_B:
case Mips::MAXI_U_D:
case Mips::MAXI_U_H:
case Mips::MAXI_U_W:
case Mips::MINI_S_B:
case Mips::MINI_S_D:
case Mips::MINI_S_H:
case Mips::MINI_S_W:
case Mips::MINI_U_B:
case Mips::MINI_U_D:
case Mips::MINI_U_H:
case Mips::MINI_U_W:
case Mips::SUBVI_B:
case Mips::SUBVI_D:
case Mips::SUBVI_H:
case Mips::SUBVI_W: {
// op: imm
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::ADDIUSP_MM: {
// op: imm
op = getSImm9AddiuspValue(MI, 0, Fixups, STI);
Value |= (op & UINT64_C(511)) << 1;
break;
}
case Mips::JRCADDIUSP_MMR6: {
// op: imm
op = getUImm5Lsl2Encoding(MI, 0, Fixups, STI);
Value |= (op & UINT64_C(31)) << 5;
break;
}
case Mips::JRADDIUSP: {
// op: imm
op = getUImm5Lsl2Encoding(MI, 0, Fixups, STI);
Value |= op & UINT64_C(31);
break;
}
case Mips::Bimm16: {
// op: imm11
op = getBranchTargetOpValue(MI, 0, Fixups, STI);
Value |= op & UINT64_C(2047);
break;
}
case Mips::AddiuRxRyOffMemX16: {
// op: imm15
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(2032)) << 16;
Value |= (op & UINT64_C(30720)) << 5;
Value |= op & UINT64_C(15);
// op: rx
op = getMemEncoding(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(7)) << 8;
// op: ry
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 5;
break;
}
case Mips::BimmX16: {
// op: imm16
op = getBranchTargetOpValue(MI, 0, Fixups, STI);
Value |= (op & UINT64_C(2016)) << 16;
Value |= (op & UINT64_C(63488)) << 5;
Value |= op & UINT64_C(31);
break;
}
case Mips::AddiuSpImmX16:
case Mips::BteqzX16:
case Mips::BtnezX16: {
// op: imm16
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(2016)) << 16;
Value |= (op & UINT64_C(63488)) << 5;
Value |= op & UINT64_C(31);
break;
}
case Mips::AddiuRxImmX16:
case Mips::AddiuRxPcImmX16:
case Mips::AddiuRxRxImmX16:
case Mips::BeqzRxImmX16:
case Mips::BnezRxImmX16:
case Mips::CmpiRxImmX16:
case Mips::LiRxImmAlignX16:
case Mips::LiRxImmX16:
case Mips::LwRxPcTcpX16:
case Mips::SltiRxImmX16:
case Mips::SltiuRxImmX16: {
// op: imm16
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(2016)) << 16;
Value |= (op & UINT64_C(63488)) << 5;
Value |= op & UINT64_C(31);
// op: rx
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 8;
break;
}
case Mips::LbRxRyOffMemX16:
case Mips::LbuRxRyOffMemX16:
case Mips::LhRxRyOffMemX16:
case Mips::LhuRxRyOffMemX16:
case Mips::LwRxRyOffMemX16:
case Mips::LwRxSpImmX16:
case Mips::SbRxRyOffMemX16:
case Mips::ShRxRyOffMemX16:
case Mips::SwRxRyOffMemX16:
case Mips::SwRxSpImmX16: {
// op: imm16
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(2016)) << 16;
Value |= (op & UINT64_C(63488)) << 5;
Value |= op & UINT64_C(31);
// op: rx
op = getMemEncoding(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(7)) << 8;
// op: ry
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 5;
break;
}
case Mips::Jal16:
case Mips::JalB16: {
// op: imm26
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(2031616)) << 5;
Value |= (op & UINT64_C(65011712)) >> 5;
Value |= op & UINT64_C(65535);
break;
}
case Mips::AddiuSpImm16:
case Mips::Bteqz16:
case Mips::Btnez16: {
// op: imm8
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= op & UINT64_C(255);
break;
}
case Mips::PREFX_MM: {
// op: index
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: base
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: hint
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::LBUX_MM:
case Mips::LHX_MM:
case Mips::LWX_MM: {
// op: index
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: base
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::COPY_S_D: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(1)) << 16;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::SPLATI_D: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(1)) << 16;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::INSVE_D: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(1)) << 16;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::COPY_S_B:
case Mips::COPY_U_B: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(15)) << 16;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::SPLATI_B: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(15)) << 16;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::INSVE_B: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(15)) << 16;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::COPY_S_W:
case Mips::COPY_U_W: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(3)) << 16;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::SPLATI_W: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(3)) << 16;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::INSVE_W: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(3)) << 16;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::COPY_S_H:
case Mips::COPY_U_H: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(7)) << 16;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::SPLATI_H: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(7)) << 16;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::INSVE_H: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(7)) << 16;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::INSERT_D: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(1)) << 16;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::SLDI_D: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(1)) << 16;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::INSERT_B: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(15)) << 16;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::SLDI_B: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(15)) << 16;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::INSERT_W: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(3)) << 16;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::SLDI_W: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(3)) << 16;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::INSERT_H: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(7)) << 16;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::SLDI_H: {
// op: n
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(7)) << 16;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::BALC:
case Mips::BC: {
// op: offset
op = getBranchTarget26OpValue(MI, 0, Fixups, STI);
Value |= op & UINT64_C(67108863);
break;
}
case Mips::BALC_MMR6:
case Mips::BC_MMR6: {
// op: offset
op = getBranchTarget26OpValueMM(MI, 0, Fixups, STI);
Value |= op & UINT64_C(67108863);
break;
}
case Mips::BAL:
case Mips::BPOSGE32: {
// op: offset
op = getBranchTargetOpValue(MI, 0, Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::BNZ_B:
case Mips::BNZ_D:
case Mips::BNZ_H:
case Mips::BNZ_V:
case Mips::BNZ_W:
case Mips::BZ_B:
case Mips::BZ_D:
case Mips::BZ_H:
case Mips::BZ_V:
case Mips::BZ_W: {
// op: offset
op = getBranchTargetOpValue(MI, 1, Fixups, STI);
Value |= op & UINT64_C(65535);
// op: wt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::BPOSGE32C_MMR3: {
// op: offset
op = getBranchTargetOpValue1SImm16(MI, 0, Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::BPOSGE32_MM: {
// op: offset
op = getBranchTargetOpValueMM(MI, 0, Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::B16_MM:
case Mips::BC16_MMR6: {
// op: offset
op = getBranchTargetOpValueMMPC10(MI, 0, Fixups, STI);
Value |= op & UINT64_C(1023);
break;
}
case Mips::Move32R16: {
// op: r32
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 5;
Value |= op & UINT64_C(24);
// op: rz
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= op & UINT64_C(7);
break;
}
case Mips::MFHI:
case Mips::MFHI64:
case Mips::MFLO:
case Mips::MFLO64: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::MFHI_DSP:
case Mips::MFLO_DSP: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: ac
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(3)) << 21;
break;
}
case Mips::LWXS_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: base
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: index
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
break;
}
case Mips::LBUX:
case Mips::LHX:
case Mips::LWX: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: base
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: index
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::REPL_PH:
case Mips::REPL_PH_MM:
case Mips::REPL_QB: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: imm
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(1023)) << 16;
break;
}
case Mips::RDDSP: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: mask
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(1023)) << 16;
break;
}
case Mips::ADDQH_PH_MMR2:
case Mips::ADDQH_R_PH_MMR2:
case Mips::ADDQH_R_W_MMR2:
case Mips::ADDQH_W_MMR2:
case Mips::ADDQ_PH_MM:
case Mips::ADDQ_S_PH_MM:
case Mips::ADDQ_S_W_MM:
case Mips::ADDSC_MM:
case Mips::ADDUH_QB_MMR2:
case Mips::ADDUH_R_QB_MMR2:
case Mips::ADDU_PH_MMR2:
case Mips::ADDU_QB_MM:
case Mips::ADDU_S_PH_MMR2:
case Mips::ADDU_S_QB_MM:
case Mips::ADDWC_MM:
case Mips::CMPGDU_EQ_QB_MMR2:
case Mips::CMPGDU_LE_QB_MMR2:
case Mips::CMPGDU_LT_QB_MMR2:
case Mips::MODSUB_MM:
case Mips::MULEQ_S_W_PHL_MM:
case Mips::MULEQ_S_W_PHR_MM:
case Mips::MULEU_S_PH_QBL_MM:
case Mips::MULEU_S_PH_QBR_MM:
case Mips::MULQ_RS_PH_MM:
case Mips::MULQ_RS_W_MMR2:
case Mips::MULQ_S_PH_MMR2:
case Mips::MULQ_S_W_MMR2:
case Mips::MUL_PH_MMR2:
case Mips::MUL_S_PH_MMR2:
case Mips::PACKRL_PH_MM:
case Mips::PICK_PH_MM:
case Mips::PICK_QB_MM:
case Mips::PRECRQU_S_QB_PH_MM:
case Mips::PRECRQ_PH_W_MM:
case Mips::PRECRQ_QB_PH_MM:
case Mips::PRECRQ_RS_PH_W_MM:
case Mips::PRECR_QB_PH_MMR2:
case Mips::SELEQZ_MMR6:
case Mips::SELNEZ_MMR6:
case Mips::SUBQH_PH_MMR2:
case Mips::SUBQH_R_PH_MMR2:
case Mips::SUBQH_R_W_MMR2:
case Mips::SUBQH_W_MMR2:
case Mips::SUBQ_PH_MM:
case Mips::SUBQ_S_PH_MM:
case Mips::SUBQ_S_W_MM:
case Mips::SUBUH_QB_MMR2:
case Mips::SUBUH_R_QB_MMR2:
case Mips::SUBU_PH_MMR2:
case Mips::SUBU_QB_MM:
case Mips::SUBU_S_PH_MMR2:
case Mips::SUBU_S_QB_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
break;
}
case Mips::LSA_MMR6: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: imm2
op = getUImmWithOffsetEncoding<2, 1>(MI, 3, Fixups, STI);
Value |= (op & UINT64_C(3)) << 9;
break;
}
case Mips::CLO_R6:
case Mips::CLZ_R6:
case Mips::DCLO_R6:
case Mips::DCLZ_R6:
case Mips::DPOP:
case Mips::JALR:
case Mips::JALR64:
case Mips::JALR_HB:
case Mips::JALR_HB64:
case Mips::POP:
case Mips::RADDU_W_QB: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
break;
}
case Mips::MOVF_I:
case Mips::MOVF_I64:
case Mips::MOVT_I:
case Mips::MOVT_I64: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: fcc
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(7)) << 18;
break;
}
case Mips::ADD:
case Mips::ADDQH_PH:
case Mips::ADDQH_R_PH:
case Mips::ADDQH_R_W:
case Mips::ADDQH_W:
case Mips::ADDQ_PH:
case Mips::ADDQ_S_PH:
case Mips::ADDQ_S_W:
case Mips::ADDSC:
case Mips::ADDUH_QB:
case Mips::ADDUH_R_QB:
case Mips::ADDU_PH:
case Mips::ADDU_QB:
case Mips::ADDU_S_PH:
case Mips::ADDU_S_QB:
case Mips::ADDWC:
case Mips::ADDu:
case Mips::AND:
case Mips::AND64:
case Mips::BADDu:
case Mips::DADD:
case Mips::DADDu:
case Mips::DDIV:
case Mips::DDIVU:
case Mips::DIV:
case Mips::DIVU:
case Mips::DMOD:
case Mips::DMODU:
case Mips::DMUH:
case Mips::DMUHU:
case Mips::DMUL:
case Mips::DMULU:
case Mips::DMUL_R6:
case Mips::DSUB:
case Mips::DSUBu:
case Mips::MOD:
case Mips::MODSUB:
case Mips::MODU:
case Mips::MOVN_I64_I:
case Mips::MOVN_I64_I64:
case Mips::MOVN_I_I:
case Mips::MOVN_I_I64:
case Mips::MOVZ_I64_I:
case Mips::MOVZ_I64_I64:
case Mips::MOVZ_I_I:
case Mips::MOVZ_I_I64:
case Mips::MUH:
case Mips::MUHU:
case Mips::MUL:
case Mips::MULEQ_S_W_PHL:
case Mips::MULEQ_S_W_PHR:
case Mips::MULEU_S_PH_QBL:
case Mips::MULEU_S_PH_QBR:
case Mips::MULQ_RS_PH:
case Mips::MULQ_RS_W:
case Mips::MULQ_S_PH:
case Mips::MULQ_S_W:
case Mips::MULU:
case Mips::MUL_PH:
case Mips::MUL_R6:
case Mips::MUL_S_PH:
case Mips::NOR:
case Mips::NOR64:
case Mips::OR:
case Mips::OR64:
case Mips::SELEQZ:
case Mips::SELEQZ64:
case Mips::SELNEZ:
case Mips::SELNEZ64:
case Mips::SEQ:
case Mips::SLT:
case Mips::SLT64:
case Mips::SLTu:
case Mips::SLTu64:
case Mips::SNE:
case Mips::SUB:
case Mips::SUBQH_PH:
case Mips::SUBQH_R_PH:
case Mips::SUBQH_R_W:
case Mips::SUBQH_W:
case Mips::SUBQ_PH:
case Mips::SUBQ_S_PH:
case Mips::SUBQ_S_W:
case Mips::SUBUH_QB:
case Mips::SUBUH_R_QB:
case Mips::SUBU_PH:
case Mips::SUBU_QB:
case Mips::SUBU_S_PH:
case Mips::SUBU_S_QB:
case Mips::SUBu:
case Mips::V3MULU:
case Mips::VMM0:
case Mips::VMULU:
case Mips::XOR:
case Mips::XOR64: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::ALIGN: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: bp
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(3)) << 6;
break;
}
case Mips::ALIGN_MMR6: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: bp
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(3)) << 9;
break;
}
case Mips::DALIGN: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: bp
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(7)) << 6;
break;
}
case Mips::DLSA_R6:
case Mips::LSA_R6: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: imm2
op = getUImmWithOffsetEncoding<2, 1>(MI, 3, Fixups, STI);
Value |= (op & UINT64_C(3)) << 6;
break;
}
case Mips::SHLLV_PH_MM:
case Mips::SHLLV_QB_MM:
case Mips::SHLLV_S_PH_MM:
case Mips::SHLLV_S_W_MM:
case Mips::SHRAV_PH_MM:
case Mips::SHRAV_QB_MMR2:
case Mips::SHRAV_R_PH_MM:
case Mips::SHRAV_R_QB_MMR2:
case Mips::SHRAV_R_W_MM:
case Mips::SHRLV_PH_MMR2:
case Mips::SHRLV_QB_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
break;
}
case Mips::ABSQ_S_PH:
case Mips::ABSQ_S_QB:
case Mips::ABSQ_S_W:
case Mips::BITREV:
case Mips::BITSWAP:
case Mips::DBITSWAP:
case Mips::DSBH:
case Mips::DSHD:
case Mips::DSLL64_32:
case Mips::PRECEQU_PH_QBL:
case Mips::PRECEQU_PH_QBLA:
case Mips::PRECEQU_PH_QBR:
case Mips::PRECEQU_PH_QBRA:
case Mips::PRECEQ_W_PHL:
case Mips::PRECEQ_W_PHR:
case Mips::PRECEU_PH_QBL:
case Mips::PRECEU_PH_QBLA:
case Mips::PRECEU_PH_QBR:
case Mips::PRECEU_PH_QBRA:
case Mips::REPLV_PH:
case Mips::REPLV_QB:
case Mips::SEB:
case Mips::SEB64:
case Mips::SEH:
case Mips::SEH64:
case Mips::SLL64_32:
case Mips::SLL64_64:
case Mips::WSBH: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::DROTRV:
case Mips::DSLLV:
case Mips::DSRAV:
case Mips::DSRLV:
case Mips::ROTRV:
case Mips::SLLV:
case Mips::SRAV:
case Mips::SRLV: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
break;
}
case Mips::SHLLV_PH:
case Mips::SHLLV_QB:
case Mips::SHLLV_S_PH:
case Mips::SHLLV_S_W:
case Mips::SHLL_PH:
case Mips::SHLL_QB:
case Mips::SHLL_S_PH:
case Mips::SHLL_S_W:
case Mips::SHRAV_PH:
case Mips::SHRAV_QB:
case Mips::SHRAV_R_PH:
case Mips::SHRAV_R_QB:
case Mips::SHRAV_R_W:
case Mips::SHRA_PH:
case Mips::SHRA_QB:
case Mips::SHRA_R_PH:
case Mips::SHRA_R_QB:
case Mips::SHRA_R_W:
case Mips::SHRLV_PH:
case Mips::SHRLV_QB:
case Mips::SHRL_PH:
case Mips::SHRL_QB: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rs_sa
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
break;
}
case Mips::DROTR:
case Mips::DROTR32:
case Mips::DSLL:
case Mips::DSLL32:
case Mips::DSRA:
case Mips::DSRA32:
case Mips::DSRL:
case Mips::DSRL32:
case Mips::ROTR:
case Mips::SLL:
case Mips::SRA:
case Mips::SRL: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: shamt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::ROTRV_MM:
case Mips::SLLV_MM:
case Mips::SRAV_MM:
case Mips::SRLV_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::ADDU_MMR6:
case Mips::ADD_MMR6:
case Mips::AND_MMR6:
case Mips::DIVU_MMR6:
case Mips::DIV_MMR6:
case Mips::MODU_MMR6:
case Mips::MOD_MMR6:
case Mips::MUHU_MMR6:
case Mips::MUH_MMR6:
case Mips::MULU_MMR6:
case Mips::MUL_MMR6:
case Mips::NOR_MMR6:
case Mips::OR_MMR6:
case Mips::SUBU_MMR6:
case Mips::SUB_MMR6:
case Mips::XOR_MMR6: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::MFHI_MM:
case Mips::MFLO_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::BITSWAP_MMR6: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
break;
}
case Mips::CLO:
case Mips::CLZ:
case Mips::DCLO:
case Mips::DCLZ: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
Value |= (op & UINT64_C(31)) << 11;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
break;
}
case Mips::CLO_MM:
case Mips::CLZ_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::MOVF_I_MM:
case Mips::MOVT_I_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: fcc
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(7)) << 13;
break;
}
case Mips::SEB_MM:
case Mips::SEH_MM:
case Mips::WSBH_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::ROTR_MM:
case Mips::SLL_MM:
case Mips::SLL_MMR6:
case Mips::SRA_MM:
case Mips::SRL_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: shamt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::CFCMSA: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
// op: cs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::LI16_MM:
case Mips::LI16_MMR6: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 7;
// op: imm
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= op & UINT64_C(127);
break;
}
case Mips::ADDIUR1SP_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 7;
// op: imm
op = getUImm6Lsl2Encoding(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(63)) << 1;
break;
}
case Mips::ADDIUR2_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 7;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(7)) << 4;
// op: imm
op = getSImm3Lsa2Value(MI, 2, Fixups, STI);
Value |= (op & UINT64_C(7)) << 1;
break;
}
case Mips::ANDI16_MM:
case Mips::ANDI16_MMR6: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 7;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(7)) << 4;
// op: imm
op = getUImm4AndValue(MI, 2, Fixups, STI);
Value |= op & UINT64_C(15);
break;
}
case Mips::SLL16_MM:
case Mips::SLL16_MMR6:
case Mips::SRL16_MM:
case Mips::SRL16_MMR6: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 7;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(7)) << 4;
// op: shamt
op = getUImm3Mod8Encoding(MI, 2, Fixups, STI);
Value |= (op & UINT64_C(7)) << 1;
break;
}
case Mips::ADDU16_MM:
case Mips::SUBU16_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 7;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(7)) << 4;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(7)) << 1;
break;
}
case Mips::MFHI16_MM:
case Mips::MFLO16_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= op & UINT64_C(31);
break;
}
case Mips::ADDIUS5_MM: {
// op: rd
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 5;
// op: imm
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(15)) << 1;
break;
}
case Mips::DVP_MMR6:
case Mips::EVP_MMR6:
case Mips::JR_MM:
case Mips::MTHI_MM:
case Mips::MTLO_MM: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::MFHI_DSP_MM:
case Mips::MFLO_DSP_MM: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: ac
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(3)) << 14;
break;
}
case Mips::TEQI_MM:
case Mips::TGEIU_MM:
case Mips::TGEI_MM:
case Mips::TLTIU_MM:
case Mips::TLTI_MM:
case Mips::TNEI_MM: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: imm16
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::BEQZC_MM:
case Mips::BGEZALS_MM:
case Mips::BGEZAL_MM:
case Mips::BGEZ_MM:
case Mips::BGTZ_MM:
case Mips::BLEZ_MM:
case Mips::BLTZALS_MM:
case Mips::BLTZAL_MM:
case Mips::BLTZ_MM:
case Mips::BNEZC_MM: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: offset
op = getBranchTargetOpValueMM(MI, 1, Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::MADDU_MM:
case Mips::MADD_MM:
case Mips::MSUBU_MM:
case Mips::MSUB_MM:
case Mips::MULT_MM:
case Mips::MULTu_MM:
case Mips::SDIV_MM:
case Mips::UDIV_MM: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
break;
}
case Mips::TEQ_MM:
case Mips::TGEU_MM:
case Mips::TGE_MM:
case Mips::TLTU_MM:
case Mips::TLT_MM:
case Mips::TNE_MM: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: code_
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(15)) << 12;
break;
}
case Mips::BEQ_MM:
case Mips::BNE_MM: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: offset
op = getBranchTargetOpValueMM(MI, 2, Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::GINVI_MMR6: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: type
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(3)) << 9;
break;
}
case Mips::GINVT_MMR6: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: type
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(3)) << 9;
break;
}
case Mips::JR:
case Mips::JR64:
case Mips::JR_HB:
case Mips::JR_HB64:
case Mips::JR_HB64_R6:
case Mips::JR_HB_R6:
case Mips::MTHI:
case Mips::MTHI64:
case Mips::MTLO:
case Mips::MTLO64:
case Mips::MTM0:
case Mips::MTM1:
case Mips::MTM2:
case Mips::MTP0:
case Mips::MTP1:
case Mips::MTP2: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
break;
}
case Mips::ALUIPC:
case Mips::AUIPC: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: imm
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::DAHI:
case Mips::DATI: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: imm
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::LDPC: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: imm
op = getSimm18Lsl3Encoding(MI, 1, Fixups, STI);
Value |= op & UINT64_C(262143);
break;
}
case Mips::ADDIUPC:
case Mips::LWPC:
case Mips::LWUPC: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: imm
op = getSimm19Lsl2Encoding(MI, 1, Fixups, STI);
Value |= op & UINT64_C(524287);
break;
}
case Mips::TEQI:
case Mips::TGEI:
case Mips::TGEIU:
case Mips::TLTI:
case Mips::TNEI:
case Mips::TTLTIU: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: imm16
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::WRDSP: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: mask
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(1023)) << 11;
break;
}
case Mips::BEQZC:
case Mips::BEQZC64:
case Mips::BNEZC:
case Mips::BNEZC64: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: offset
op = getBranchTarget21OpValue(MI, 1, Fixups, STI);
Value |= op & UINT64_C(2097151);
break;
}
case Mips::BEQZC_MMR6:
case Mips::BNEZC_MMR6: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: offset
op = getBranchTarget21OpValueMM(MI, 1, Fixups, STI);
Value |= op & UINT64_C(2097151);
break;
}
case Mips::BGEZ:
case Mips::BGEZ64:
case Mips::BGEZAL:
case Mips::BGEZALL:
case Mips::BGEZL:
case Mips::BGTZ:
case Mips::BGTZ64:
case Mips::BGTZL:
case Mips::BLEZ:
case Mips::BLEZ64:
case Mips::BLEZL:
case Mips::BLTZ:
case Mips::BLTZ64:
case Mips::BLTZAL:
case Mips::BLTZALL:
case Mips::BLTZL: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: offset
op = getBranchTargetOpValue(MI, 1, Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::BBIT0:
case Mips::BBIT032:
case Mips::BBIT1:
case Mips::BBIT132: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: p
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: offset
op = getBranchTargetOpValue(MI, 2, Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::CMPU_EQ_QB:
case Mips::CMPU_LE_QB:
case Mips::CMPU_LT_QB:
case Mips::CMP_EQ_PH:
case Mips::CMP_LE_PH:
case Mips::CMP_LT_PH:
case Mips::DMULT:
case Mips::DMULTu:
case Mips::DSDIV:
case Mips::DUDIV:
case Mips::MADD:
case Mips::MADDU:
case Mips::MSUB:
case Mips::MSUBU:
case Mips::MULT:
case Mips::MULTu:
case Mips::SDIV:
case Mips::UDIV: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::TEQ:
case Mips::TGE:
case Mips::TGEU:
case Mips::TLT:
case Mips::TLTU:
case Mips::TNE: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: code_
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(1023)) << 6;
break;
}
case Mips::BEQ:
case Mips::BEQ64:
case Mips::BEQC:
case Mips::BEQC64:
case Mips::BEQL:
case Mips::BGEC:
case Mips::BGEC64:
case Mips::BGEUC:
case Mips::BGEUC64:
case Mips::BLTC:
case Mips::BLTC64:
case Mips::BLTUC:
case Mips::BLTUC64:
case Mips::BNE:
case Mips::BNE64:
case Mips::BNEC:
case Mips::BNEC64:
case Mips::BNEL:
case Mips::BNVC:
case Mips::BOVC: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: offset
op = getBranchTargetOpValue(MI, 2, Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::FORK: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::GINVI: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: type_
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(3)) << 8;
break;
}
case Mips::GINVT: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: type_
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(3)) << 8;
break;
}
case Mips::JALRC16_MMR6:
case Mips::JRC16_MMR6: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 5;
break;
}
case Mips::ADDIUPC_MM: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 23;
// op: imm
op = getSimm23Lsl2Encoding(MI, 1, Fixups, STI);
Value |= op & UINT64_C(8388607);
break;
}
case Mips::BEQZ16_MM:
case Mips::BEQZC16_MMR6:
case Mips::BNEZ16_MM:
case Mips::BNEZC16_MMR6: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 7;
// op: offset
op = getBranchTarget7OpValueMM(MI, 1, Fixups, STI);
Value |= op & UINT64_C(127);
break;
}
case Mips::JALR16_MM:
case Mips::JALRS16_MM:
case Mips::JR16_MM:
case Mips::JRC16_MM: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= op & UINT64_C(31);
break;
}
case Mips::CTCMSA: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: cd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::FILL_B:
case Mips::FILL_D:
case Mips::FILL_H:
case Mips::FILL_W: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::MTHI_DSP_MM:
case Mips::MTHLIP_MM:
case Mips::MTLO_DSP_MM:
case Mips::SHILOV_MM: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: ac
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(3)) << 14;
break;
}
case Mips::JALRS_MM:
case Mips::JALR_MM: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
break;
}
case Mips::CLO_MMR6: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
break;
}
case Mips::AUI_MMR6: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: imm
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::ADDi_MM:
case Mips::ADDiu_MM:
case Mips::ANDi_MM:
case Mips::ORi_MM:
case Mips::XORi_MM: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: imm16
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::MTHI_DSP:
case Mips::MTLO_DSP: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: ac
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(3)) << 11;
break;
}
case Mips::YIELD: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::CLZ_MMR6: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::AUI:
case Mips::DAUI: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: imm
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::SEQi:
case Mips::SNEi: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: imm10
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(1023)) << 6;
break;
}
case Mips::ADDi:
case Mips::ADDiu:
case Mips::ANDi:
case Mips::ANDi64:
case Mips::DADDi:
case Mips::DADDiu:
case Mips::ORi:
case Mips::ORi64:
case Mips::XORi:
case Mips::XORi64: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: imm16
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::PRECR_SRA_PH_W:
case Mips::PRECR_SRA_R_PH_W: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: sa
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::CRC32B:
case Mips::CRC32CB:
case Mips::CRC32CD:
case Mips::CRC32CH:
case Mips::CRC32CW:
case Mips::CRC32D:
case Mips::CRC32H:
case Mips::CRC32W: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::CMPGDU_EQ_QB:
case Mips::CMPGDU_LE_QB:
case Mips::CMPGDU_LT_QB:
case Mips::CMPGU_EQ_QB:
case Mips::CMPGU_LE_QB:
case Mips::CMPGU_LT_QB:
case Mips::PACKRL_PH:
case Mips::PICK_PH:
case Mips::PICK_QB:
case Mips::PRECRQU_S_QB_PH:
case Mips::PRECRQ_PH_W:
case Mips::PRECRQ_QB_PH:
case Mips::PRECRQ_RS_PH_W:
case Mips::PRECR_QB_PH: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::DLSA:
case Mips::LSA: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: sa
op = getUImmWithOffsetEncoding<2, 1>(MI, 3, Fixups, STI);
Value |= (op & UINT64_C(3)) << 6;
break;
}
case Mips::ADDU16_MMR6:
case Mips::SUBU16_MMR6: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(7)) << 7;
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(7)) << 4;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 1;
break;
}
case Mips::MOVE16_MM:
case Mips::MOVE16_MMR6: {
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= op & UINT64_C(31);
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 5;
break;
}
case Mips::DI:
case Mips::DI_MM:
case Mips::DI_MMR6:
case Mips::DMT:
case Mips::DVP:
case Mips::DVPE:
case Mips::EI:
case Mips::EI_MM:
case Mips::EI_MMR6:
case Mips::EMT:
case Mips::EVP:
case Mips::EVPE: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::EXTP:
case Mips::EXTPDP:
case Mips::EXTPDPV:
case Mips::EXTPV:
case Mips::EXTRV_RS_W:
case Mips::EXTRV_R_W:
case Mips::EXTRV_S_H:
case Mips::EXTRV_W:
case Mips::EXTR_RS_W:
case Mips::EXTR_R_W:
case Mips::EXTR_S_H:
case Mips::EXTR_W: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: ac
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(3)) << 11;
// op: shift_rs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
break;
}
case Mips::LL64_R6:
case Mips::LLD_R6:
case Mips::LL_R6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: addr
op = getMemEncoding(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(2031616)) << 5;
Value |= (op & UINT64_C(511)) << 7;
break;
}
case Mips::LB:
case Mips::LB64:
case Mips::LBu:
case Mips::LBu64:
case Mips::LD:
case Mips::LDC1:
case Mips::LDC164:
case Mips::LDC2:
case Mips::LDC3:
case Mips::LDL:
case Mips::LDR:
case Mips::LEA_ADDiu:
case Mips::LEA_ADDiu64:
case Mips::LH:
case Mips::LH64:
case Mips::LHu:
case Mips::LHu64:
case Mips::LL:
case Mips::LL64:
case Mips::LLD:
case Mips::LW:
case Mips::LW64:
case Mips::LWC1:
case Mips::LWC2:
case Mips::LWC3:
case Mips::LWDSP:
case Mips::LWL:
case Mips::LWL64:
case Mips::LWR:
case Mips::LWR64:
case Mips::LWu:
case Mips::SB:
case Mips::SB64:
case Mips::SD:
case Mips::SDC1:
case Mips::SDC164:
case Mips::SDC2:
case Mips::SDC3:
case Mips::SDL:
case Mips::SDR:
case Mips::SH:
case Mips::SH64:
case Mips::SW:
case Mips::SW64:
case Mips::SWC1:
case Mips::SWC2:
case Mips::SWC3:
case Mips::SWDSP:
case Mips::SWL:
case Mips::SWL64:
case Mips::SWR:
case Mips::SWR64: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: addr
op = getMemEncoding(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(2031616)) << 5;
Value |= op & UINT64_C(65535);
break;
}
case Mips::LDC2_R6:
case Mips::LWC2_R6:
case Mips::SDC2_R6:
case Mips::SWC2_R6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: addr
op = getMemEncoding(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(2031616)) >> 5;
Value |= op & UINT64_C(2047);
break;
}
case Mips::CFC1:
case Mips::DMFC1:
case Mips::MFC1:
case Mips::MFC1_D64:
case Mips::MFHC1_D32:
case Mips::MFHC1_D64: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::DMFC2_OCTEON:
case Mips::DMTC2_OCTEON:
case Mips::LUi:
case Mips::LUi64:
case Mips::LUi_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: imm16
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::BEQZALC:
case Mips::BGTZALC:
case Mips::BGTZC:
case Mips::BGTZC64:
case Mips::BLEZALC:
case Mips::BLEZC:
case Mips::BLEZC64:
case Mips::BNEZALC: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: offset
op = getBranchTargetOpValue(MI, 1, Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::BC1EQZC_MMR6:
case Mips::BC1NEZC_MMR6:
case Mips::BC2EQZC_MMR6:
case Mips::BC2NEZC_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: offset
op = getBranchTargetOpValueMM(MI, 1, Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::JIALC:
case Mips::JIALC64:
case Mips::JIALC_MMR6:
case Mips::JIC:
case Mips::JIC64:
case Mips::JIC_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: offset
op = getJumpOffset16OpValue(MI, 1, Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::RDHWR:
case Mips::RDHWR64: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: sel
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(7)) << 6;
break;
}
case Mips::DMFC0:
case Mips::DMFC2:
case Mips::DMFGC0:
case Mips::MFC0:
case Mips::MFC2:
case Mips::MFGC0:
case Mips::MFHGC0: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: sel
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= op & UINT64_C(7);
break;
}
case Mips::SLTi:
case Mips::SLTi64:
case Mips::SLTiu:
case Mips::SLTiu64: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: imm16
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::CINS:
case Mips::CINS32:
case Mips::CINS64_32:
case Mips::CINS_i32:
case Mips::EXTS:
case Mips::EXTS32: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: pos
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
// op: lenm1
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::DINS:
case Mips::DINSM:
case Mips::DINSU:
case Mips::INS: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: pos
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
// op: size
op = getSizeInsEncoding(MI, 3, Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::DEXT:
case Mips::DEXT64_32:
case Mips::DEXTM:
case Mips::DEXTU:
case Mips::EXT: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: pos
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
// op: size
op = getUImmWithOffsetEncoding<5, 1>(MI, 3, Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::APPEND:
case Mips::BALIGN:
case Mips::PREPEND: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: sa
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::INSV: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
break;
}
case Mips::LWU_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: addr
op = getMemEncoding(MI, 1, Fixups, STI);
Value |= op & UINT64_C(2031616);
Value |= op & UINT64_C(4095);
break;
}
case Mips::LBE_MM:
case Mips::LBuE_MM:
case Mips::LHE_MM:
case Mips::LHuE_MM:
case Mips::LLE_MM:
case Mips::LWE_MM:
case Mips::SBE_MM:
case Mips::SHE_MM:
case Mips::SWE_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: addr
op = getMemEncoding(MI, 1, Fixups, STI);
Value |= op & UINT64_C(2031616);
Value |= op & UINT64_C(511);
break;
}
case Mips::LEA_ADDiu_MM:
case Mips::LH_MM:
case Mips::LHu_MM:
case Mips::LWDSP_MM:
case Mips::LW_MM:
case Mips::LW_MMR6:
case Mips::SB_MM:
case Mips::SB_MMR6:
case Mips::SH_MM:
case Mips::SH_MMR6:
case Mips::SWDSP_MM:
case Mips::SW_MM:
case Mips::SW_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: addr
op = getMemEncoding(MI, 1, Fixups, STI);
Value |= op & UINT64_C(2097151);
break;
}
case Mips::LWP_MM:
case Mips::SWP_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: addr
op = getMemEncoding(MI, 2, Fixups, STI);
Value |= op & UINT64_C(2031616);
Value |= op & UINT64_C(4095);
break;
}
case Mips::LDC2_MMR6:
case Mips::LWC2_MMR6:
case Mips::SDC2_MMR6:
case Mips::SWC2_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: addr
op = getMemEncodingMMImm11(MI, 1, Fixups, STI);
Value |= op & UINT64_C(2031616);
Value |= op & UINT64_C(2047);
break;
}
case Mips::LL_MM:
case Mips::LWL_MM:
case Mips::LWR_MM:
case Mips::SWL_MM:
case Mips::SWR_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: addr
op = getMemEncodingMMImm12(MI, 1, Fixups, STI);
Value |= op & UINT64_C(2031616);
Value |= op & UINT64_C(4095);
break;
}
case Mips::LB_MM:
case Mips::LBu_MM:
case Mips::LDC1_MM:
case Mips::LWC1_MM:
case Mips::SDC1_MM:
case Mips::SWC1_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: addr
op = getMemEncodingMMImm16(MI, 1, Fixups, STI);
Value |= op & UINT64_C(2097151);
break;
}
case Mips::LL_MMR6:
case Mips::LWLE_MM:
case Mips::LWRE_MM:
case Mips::SWLE_MM:
case Mips::SWRE_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: addr
op = getMemEncodingMMImm9(MI, 1, Fixups, STI);
Value |= op & UINT64_C(2031616);
Value |= op & UINT64_C(511);
break;
}
case Mips::CFC1_MM:
case Mips::MFC1_MM:
case Mips::MFC1_MMR6:
case Mips::MFHC1_D32_MM:
case Mips::MFHC1_D64_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::REPL_QB_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: imm
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(255)) << 13;
break;
}
case Mips::ALUIPC_MMR6:
case Mips::AUIPC_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: imm
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::EXTPDP_MM:
case Mips::EXTP_MM:
case Mips::EXTR_RS_W_MM:
case Mips::EXTR_R_W_MM:
case Mips::EXTR_S_H_MM:
case Mips::EXTR_W_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: imm
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: ac
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(3)) << 14;
break;
}
case Mips::ADDIUPC_MMR6:
case Mips::LWPC_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: imm
op = getSimm19Lsl2Encoding(MI, 1, Fixups, STI);
Value |= op & UINT64_C(524287);
break;
}
case Mips::LUI_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: imm16
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::CFC2_MM:
case Mips::MFC2_MMR6:
case Mips::MFHC2_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: impl
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::RDDSP_MM:
case Mips::WRDSP_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: mask
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(127)) << 14;
break;
}
case Mips::BGTZC_MMR6:
case Mips::BLEZC_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: offset
op = getBranchTargetOpValueLsl2MMR6(MI, 1, Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::BEQZALC_MMR6:
case Mips::BGTZALC_MMR6:
case Mips::BLEZALC_MMR6:
case Mips::BNEZALC_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: offset
op = getBranchTargetOpValueMM(MI, 1, Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::RDHWR_MM:
case Mips::RDPGPR_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::ABSQ_S_PH_MM:
case Mips::ABSQ_S_QB_MMR2:
case Mips::ABSQ_S_W_MM:
case Mips::BITREV_MM:
case Mips::JALRC_HB_MMR6:
case Mips::JALRC_MMR6:
case Mips::PRECEQU_PH_QBLA_MM:
case Mips::PRECEQU_PH_QBL_MM:
case Mips::PRECEQU_PH_QBRA_MM:
case Mips::PRECEQU_PH_QBR_MM:
case Mips::PRECEQ_W_PHL_MM:
case Mips::PRECEQ_W_PHR_MM:
case Mips::PRECEU_PH_QBLA_MM:
case Mips::PRECEU_PH_QBL_MM:
case Mips::PRECEU_PH_QBRA_MM:
case Mips::PRECEU_PH_QBR_MM:
case Mips::RADDU_W_QB_MM:
case Mips::REPLV_PH_MM:
case Mips::REPLV_QB_MM:
case Mips::WRPGPR_MMR6:
case Mips::WSBH_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::BALIGN_MMR2: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: bp
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(3)) << 14;
break;
}
case Mips::ADDIU_MMR6:
case Mips::ANDI_MMR6:
case Mips::ORI_MMR6:
case Mips::SLTi_MM:
case Mips::SLTiu_MM:
case Mips::XORI_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: imm16
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::BNVC_MMR6:
case Mips::BOVC_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: offset
op = getBranchTargetOpValueMMR6(MI, 2, Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::INS_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: pos
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
// op: size
op = getSizeInsEncoding(MI, 3, Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::EXT_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: pos
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
// op: size
op = getUImmWithOffsetEncoding<5, 1>(MI, 3, Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::SHLL_PH_MM:
case Mips::SHLL_S_PH_MM:
case Mips::SHRA_PH_MM:
case Mips::SHRA_R_PH_MM:
case Mips::SHRL_PH_MMR2: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: sa
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(15)) << 12;
break;
}
case Mips::APPEND_MMR2:
case Mips::PRECR_SRA_PH_W_MMR2:
case Mips::PRECR_SRA_R_PH_W_MMR2:
case Mips::PREPEND_MMR2:
case Mips::SHLL_S_W_MM:
case Mips::SHRA_R_W_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: sa
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::SHLL_QB_MM:
case Mips::SHRA_QB_MMR2:
case Mips::SHRA_R_QB_MMR2:
case Mips::SHRL_QB_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: sa
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(7)) << 13;
break;
}
case Mips::MFC0_MMR6:
case Mips::MFGC0_MM:
case Mips::MFHC0_MMR6:
case Mips::MFHGC0_MM:
case Mips::RDHWR_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: sel
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(7)) << 11;
break;
}
case Mips::INS_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: size
op = getSizeInsEncoding(MI, 3, Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: pos
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::EXT_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: size
op = getUImmWithOffsetEncoding<5, 1>(MI, 3, Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: pos
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::INSV_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::EXTPDPV_MM:
case Mips::EXTPV_MM:
case Mips::EXTRV_RS_W_MM:
case Mips::EXTRV_R_W_MM:
case Mips::EXTRV_S_H_MM:
case Mips::EXTRV_W_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: ac
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(3)) << 14;
break;
}
case Mips::BGEZALC:
case Mips::BGEZC:
case Mips::BGEZC64:
case Mips::BLTZALC:
case Mips::BLTZC:
case Mips::BLTZC64: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
Value |= (op & UINT64_C(31)) << 16;
// op: offset
op = getBranchTargetOpValue(MI, 1, Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::BGEZC_MMR6:
case Mips::BLTZC_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
Value |= (op & UINT64_C(31)) << 16;
// op: offset
op = getBranchTargetOpValueLsl2MMR6(MI, 1, Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::BGEZALC_MMR6:
case Mips::BLTZALC_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
Value |= (op & UINT64_C(31)) << 16;
// op: offset
op = getBranchTargetOpValueMM(MI, 1, Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::LWSP_MM:
case Mips::SWSP_MM:
case Mips::SWSP_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 5;
// op: offset
op = getMemEncodingMMSPImm5Lsl2(MI, 1, Fixups, STI);
Value |= op & UINT64_C(31);
break;
}
case Mips::NOT16_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 3;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= op & UINT64_C(7);
break;
}
case Mips::LBU16_MM:
case Mips::SB16_MM:
case Mips::SB16_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 7;
// op: addr
op = getMemEncodingMMImm4(MI, 1, Fixups, STI);
Value |= op & UINT64_C(127);
break;
}
case Mips::LHU16_MM:
case Mips::SH16_MM:
case Mips::SH16_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 7;
// op: addr
op = getMemEncodingMMImm4Lsl1(MI, 1, Fixups, STI);
Value |= op & UINT64_C(127);
break;
}
case Mips::LW16_MM:
case Mips::SW16_MM:
case Mips::SW16_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 7;
// op: addr
op = getMemEncodingMMImm4Lsl2(MI, 1, Fixups, STI);
Value |= op & UINT64_C(127);
break;
}
case Mips::LWGP_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 7;
// op: offset
op = getMemEncodingMMGPImm7Lsl2(MI, 1, Fixups, STI);
Value |= op & UINT64_C(127);
break;
}
case Mips::NOT16_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 7;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(7)) << 4;
break;
}
case Mips::SC64_R6:
case Mips::SCD_R6:
case Mips::SC_R6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: addr
op = getMemEncoding(MI, 2, Fixups, STI);
Value |= (op & UINT64_C(2031616)) << 5;
Value |= (op & UINT64_C(511)) << 7;
break;
}
case Mips::SC:
case Mips::SC64:
case Mips::SCD: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: addr
op = getMemEncoding(MI, 2, Fixups, STI);
Value |= (op & UINT64_C(2031616)) << 5;
Value |= op & UINT64_C(65535);
break;
}
case Mips::CTC1:
case Mips::DMTC1:
case Mips::MTC1:
case Mips::MTC1_D64: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::DMTC0:
case Mips::DMTC2:
case Mips::DMTGC0:
case Mips::MTC0:
case Mips::MTC2:
case Mips::MTGC0:
case Mips::MTHGC0: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: sel
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= op & UINT64_C(7);
break;
}
case Mips::MFTR:
case Mips::MTTR: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: u
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(1)) << 5;
// op: h
op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
Value |= (op & UINT64_C(1)) << 4;
// op: sel
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= op & UINT64_C(7);
break;
}
case Mips::SCE_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: addr
op = getMemEncoding(MI, 2, Fixups, STI);
Value |= op & UINT64_C(2031616);
Value |= op & UINT64_C(511);
break;
}
case Mips::SC_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: addr
op = getMemEncodingMMImm12(MI, 2, Fixups, STI);
Value |= op & UINT64_C(2031616);
Value |= op & UINT64_C(4095);
break;
}
case Mips::SC_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: addr
op = getMemEncodingMMImm9(MI, 2, Fixups, STI);
Value |= op & UINT64_C(2031616);
Value |= op & UINT64_C(511);
break;
}
case Mips::CTC1_MM:
case Mips::MTC1_MM:
case Mips::MTC1_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::CTC2_MM:
case Mips::MTC2_MMR6:
case Mips::MTHC2_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: impl
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::CMPU_EQ_QB_MM:
case Mips::CMPU_LE_QB_MM:
case Mips::CMPU_LT_QB_MM:
case Mips::CMP_EQ_PH_MM:
case Mips::CMP_LE_PH_MM:
case Mips::CMP_LT_PH_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::BEQC_MMR6:
case Mips::BGEC_MMR6:
case Mips::BGEUC_MMR6:
case Mips::BLTC_MMR6:
case Mips::BLTUC_MMR6:
case Mips::BNEC_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: offset
op = getBranchTargetOpValueLsl2MMR6(MI, 2, Fixups, STI);
Value |= op & UINT64_C(65535);
break;
}
case Mips::MTC0_MMR6:
case Mips::MTGC0_MM:
case Mips::MTHC0_MMR6:
case Mips::MTHGC0_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: sel
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(7)) << 11;
break;
}
case Mips::MTHC1_D32:
case Mips::MTHC1_D64: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::SPLAT_B:
case Mips::SPLAT_D:
case Mips::SPLAT_H:
case Mips::SPLAT_W: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::MTHC1_D32_MM:
case Mips::MTHC1_D64_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: fs
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::DPAQX_SA_W_PH_MMR2:
case Mips::DPAQX_S_W_PH_MMR2:
case Mips::DPAQ_SA_L_W_MM:
case Mips::DPAQ_S_W_PH_MM:
case Mips::DPAU_H_QBL_MM:
case Mips::DPAU_H_QBR_MM:
case Mips::DPAX_W_PH_MMR2:
case Mips::DPA_W_PH_MMR2:
case Mips::DPSQX_SA_W_PH_MMR2:
case Mips::DPSQX_S_W_PH_MMR2:
case Mips::DPSQ_SA_L_W_MM:
case Mips::DPSQ_S_W_PH_MM:
case Mips::DPSU_H_QBL_MM:
case Mips::DPSU_H_QBR_MM:
case Mips::DPSX_W_PH_MMR2:
case Mips::DPS_W_PH_MMR2:
case Mips::MADDU_DSP_MM:
case Mips::MADD_DSP_MM:
case Mips::MAQ_SA_W_PHL_MM:
case Mips::MAQ_SA_W_PHR_MM:
case Mips::MAQ_S_W_PHL_MM:
case Mips::MAQ_S_W_PHR_MM:
case Mips::MSUBU_DSP_MM:
case Mips::MSUB_DSP_MM:
case Mips::MULSAQ_S_W_PH_MM:
case Mips::MULSA_W_PH_MMR2:
case Mips::MULTU_DSP_MM:
case Mips::MULT_DSP_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: ac
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(3)) << 14;
break;
}
case Mips::ADD_MM:
case Mips::ADDu_MM:
case Mips::AND_MM:
case Mips::CMPGU_EQ_QB_MM:
case Mips::CMPGU_LE_QB_MM:
case Mips::CMPGU_LT_QB_MM:
case Mips::MOVN_I_MM:
case Mips::MOVZ_I_MM:
case Mips::MUL_MM:
case Mips::NOR_MM:
case Mips::OR_MM:
case Mips::SLT_MM:
case Mips::SLTu_MM:
case Mips::SUB_MM:
case Mips::SUBu_MM:
case Mips::XOR_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: rd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
break;
}
case Mips::AND16_MM:
case Mips::OR16_MM:
case Mips::XOR16_MM: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(7)) << 3;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= op & UINT64_C(7);
break;
}
case Mips::AND16_MMR6:
case Mips::OR16_MMR6:
case Mips::XOR16_MMR6: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(7)) << 7;
// op: rs
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(7)) << 4;
break;
}
case Mips::SLD_B:
case Mips::SLD_D:
case Mips::SLD_H:
case Mips::SLD_W: {
// op: rt
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::LWM32_MM:
case Mips::SWM32_MM: {
// op: rt
op = getRegisterListOpValue(MI, 0, Fixups, STI);
Value |= (op & UINT64_C(31)) << 21;
// op: addr
op = getMemEncodingMMImm12(MI, 1, Fixups, STI);
Value |= op & UINT64_C(2031616);
Value |= op & UINT64_C(4095);
break;
}
case Mips::LWM16_MM:
case Mips::SWM16_MM: {
// op: rt
op = getRegisterListOpValue16(MI, 0, Fixups, STI);
Value |= (op & UINT64_C(3)) << 4;
// op: addr
op = getMemEncodingMMImm4sp(MI, 1, Fixups, STI);
Value |= op & UINT64_C(15);
break;
}
case Mips::LWM16_MMR6:
case Mips::SWM16_MMR6: {
// op: rt
op = getRegisterListOpValue16(MI, 0, Fixups, STI);
Value |= (op & UINT64_C(3)) << 8;
// op: addr
op = getMemEncodingMMImm4sp(MI, 1, Fixups, STI);
Value |= (op & UINT64_C(15)) << 4;
break;
}
case Mips::JrcRx16:
case Mips::JumpLinkReg16:
case Mips::SebRx16:
case Mips::SehRx16: {
// op: rx
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 8;
break;
}
case Mips::AddiuRxRxImm16:
case Mips::BeqzRxImm16:
case Mips::BnezRxImm16:
case Mips::CmpiRxImm16:
case Mips::LiRxImm16:
case Mips::LwRxPcTcp16:
case Mips::SltiRxImm16:
case Mips::SltiuRxImm16: {
// op: rx
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 8;
// op: imm8
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= op & UINT64_C(255);
break;
}
case Mips::Mfhi16:
case Mips::Mflo16: {
// op: rx
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 8;
// op: ry
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 5;
break;
}
case Mips::CmpRxRy16:
case Mips::DivRxRy16:
case Mips::DivuRxRy16:
case Mips::NegRxRy16:
case Mips::NotRxRy16:
case Mips::SltRxRy16:
case Mips::SltuRxRy16: {
// op: rx
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 8;
// op: ry
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(7)) << 5;
break;
}
case Mips::AndRxRxRy16:
case Mips::OrRxRxRy16:
case Mips::SllvRxRy16:
case Mips::SravRxRy16:
case Mips::SrlvRxRy16:
case Mips::XorRxRxRy16: {
// op: rx
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(7)) << 8;
// op: ry
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(7)) << 5;
break;
}
case Mips::AdduRxRyRz16:
case Mips::SubuRxRyRz16: {
// op: rx
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(7)) << 8;
// op: ry
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(7)) << 5;
// op: rz
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 2;
break;
}
case Mips::MoveR3216: {
// op: ry
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(15)) << 4;
// op: r32
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= op & UINT64_C(15);
break;
}
case Mips::LDI_B:
case Mips::LDI_D:
case Mips::LDI_H:
case Mips::LDI_W: {
// op: s10
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(1023)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::SllX16:
case Mips::SraX16:
case Mips::SrlX16: {
// op: sa6
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 22;
Value |= (op & UINT64_C(32)) << 16;
// op: rx
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(7)) << 8;
// op: ry
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(7)) << 5;
break;
}
case Mips::SHILO_MM: {
// op: shift
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(63)) << 16;
// op: ac
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(3)) << 14;
break;
}
case Mips::SYNC_MM:
case Mips::SYNC_MMR6: {
// op: stype
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::SYNC: {
// op: stype
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::J:
case Mips::JAL:
case Mips::JALX:
case Mips::JALX_MM: {
// op: target
op = getJumpTargetOpValue(MI, 0, Fixups, STI);
Value |= op & UINT64_C(67108863);
break;
}
case Mips::JALS_MM:
case Mips::JAL_MM:
case Mips::J_MM: {
// op: target
op = getJumpTargetOpValueMM(MI, 0, Fixups, STI);
Value |= op & UINT64_C(67108863);
break;
}
case Mips::ANDI_B:
case Mips::NORI_B:
case Mips::ORI_B:
case Mips::SHF_B:
case Mips::SHF_H:
case Mips::SHF_W:
case Mips::XORI_B: {
// op: u8
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(255)) << 16;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::BMNZI_B:
case Mips::BMZI_B:
case Mips::BSELI_B: {
// op: u8
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(255)) << 16;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::FCLASS_D:
case Mips::FCLASS_W:
case Mips::FEXUPL_D:
case Mips::FEXUPL_W:
case Mips::FEXUPR_D:
case Mips::FEXUPR_W:
case Mips::FFINT_S_D:
case Mips::FFINT_S_W:
case Mips::FFINT_U_D:
case Mips::FFINT_U_W:
case Mips::FFQL_D:
case Mips::FFQL_W:
case Mips::FFQR_D:
case Mips::FFQR_W:
case Mips::FLOG2_D:
case Mips::FLOG2_W:
case Mips::FRCP_D:
case Mips::FRCP_W:
case Mips::FRINT_D:
case Mips::FRINT_W:
case Mips::FRSQRT_D:
case Mips::FRSQRT_W:
case Mips::FSQRT_D:
case Mips::FSQRT_W:
case Mips::FTINT_S_D:
case Mips::FTINT_S_W:
case Mips::FTINT_U_D:
case Mips::FTINT_U_W:
case Mips::FTRUNC_S_D:
case Mips::FTRUNC_S_W:
case Mips::FTRUNC_U_D:
case Mips::FTRUNC_U_W:
case Mips::MOVE_V:
case Mips::NLOC_B:
case Mips::NLOC_D:
case Mips::NLOC_H:
case Mips::NLOC_W:
case Mips::NLZC_B:
case Mips::NLZC_D:
case Mips::NLZC_H:
case Mips::NLZC_W:
case Mips::PCNT_B:
case Mips::PCNT_D:
case Mips::PCNT_H:
case Mips::PCNT_W: {
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::BCLRI_H:
case Mips::BNEGI_H:
case Mips::BSETI_H:
case Mips::SAT_S_H:
case Mips::SAT_U_H:
case Mips::SLLI_H:
case Mips::SRAI_H:
case Mips::SRARI_H:
case Mips::SRLI_H:
case Mips::SRLRI_H: {
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
// op: m
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(15)) << 16;
break;
}
case Mips::BCLRI_W:
case Mips::BNEGI_W:
case Mips::BSETI_W:
case Mips::SAT_S_W:
case Mips::SAT_U_W:
case Mips::SLLI_W:
case Mips::SRAI_W:
case Mips::SRARI_W:
case Mips::SRLI_W:
case Mips::SRLRI_W: {
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
// op: m
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::BCLRI_D:
case Mips::BNEGI_D:
case Mips::BSETI_D:
case Mips::SAT_S_D:
case Mips::SAT_U_D:
case Mips::SLLI_D:
case Mips::SRAI_D:
case Mips::SRARI_D:
case Mips::SRLI_D:
case Mips::SRLRI_D: {
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
// op: m
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(63)) << 16;
break;
}
case Mips::BCLRI_B:
case Mips::BNEGI_B:
case Mips::BSETI_B:
case Mips::SAT_S_B:
case Mips::SAT_U_B:
case Mips::SLLI_B:
case Mips::SRAI_B:
case Mips::SRARI_B:
case Mips::SRLI_B:
case Mips::SRLRI_B: {
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
// op: m
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(7)) << 16;
break;
}
case Mips::BINSLI_H:
case Mips::BINSRI_H: {
// op: ws
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
// op: m
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(15)) << 16;
break;
}
case Mips::BINSLI_W:
case Mips::BINSRI_W: {
// op: ws
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
// op: m
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
break;
}
case Mips::BINSLI_D:
case Mips::BINSRI_D: {
// op: ws
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
// op: m
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(63)) << 16;
break;
}
case Mips::BINSLI_B:
case Mips::BINSRI_B: {
// op: ws
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
// op: m
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(7)) << 16;
break;
}
case Mips::ADDS_A_B:
case Mips::ADDS_A_D:
case Mips::ADDS_A_H:
case Mips::ADDS_A_W:
case Mips::ADDS_S_B:
case Mips::ADDS_S_D:
case Mips::ADDS_S_H:
case Mips::ADDS_S_W:
case Mips::ADDS_U_B:
case Mips::ADDS_U_D:
case Mips::ADDS_U_H:
case Mips::ADDS_U_W:
case Mips::ADDV_B:
case Mips::ADDV_D:
case Mips::ADDV_H:
case Mips::ADDV_W:
case Mips::ADD_A_B:
case Mips::ADD_A_D:
case Mips::ADD_A_H:
case Mips::ADD_A_W:
case Mips::AND_V:
case Mips::ASUB_S_B:
case Mips::ASUB_S_D:
case Mips::ASUB_S_H:
case Mips::ASUB_S_W:
case Mips::ASUB_U_B:
case Mips::ASUB_U_D:
case Mips::ASUB_U_H:
case Mips::ASUB_U_W:
case Mips::AVER_S_B:
case Mips::AVER_S_D:
case Mips::AVER_S_H:
case Mips::AVER_S_W:
case Mips::AVER_U_B:
case Mips::AVER_U_D:
case Mips::AVER_U_H:
case Mips::AVER_U_W:
case Mips::AVE_S_B:
case Mips::AVE_S_D:
case Mips::AVE_S_H:
case Mips::AVE_S_W:
case Mips::AVE_U_B:
case Mips::AVE_U_D:
case Mips::AVE_U_H:
case Mips::AVE_U_W:
case Mips::BCLR_B:
case Mips::BCLR_D:
case Mips::BCLR_H:
case Mips::BCLR_W:
case Mips::BNEG_B:
case Mips::BNEG_D:
case Mips::BNEG_H:
case Mips::BNEG_W:
case Mips::BSET_B:
case Mips::BSET_D:
case Mips::BSET_H:
case Mips::BSET_W:
case Mips::CEQ_B:
case Mips::CEQ_D:
case Mips::CEQ_H:
case Mips::CEQ_W:
case Mips::CLE_S_B:
case Mips::CLE_S_D:
case Mips::CLE_S_H:
case Mips::CLE_S_W:
case Mips::CLE_U_B:
case Mips::CLE_U_D:
case Mips::CLE_U_H:
case Mips::CLE_U_W:
case Mips::CLT_S_B:
case Mips::CLT_S_D:
case Mips::CLT_S_H:
case Mips::CLT_S_W:
case Mips::CLT_U_B:
case Mips::CLT_U_D:
case Mips::CLT_U_H:
case Mips::CLT_U_W:
case Mips::DIV_S_B:
case Mips::DIV_S_D:
case Mips::DIV_S_H:
case Mips::DIV_S_W:
case Mips::DIV_U_B:
case Mips::DIV_U_D:
case Mips::DIV_U_H:
case Mips::DIV_U_W:
case Mips::DOTP_S_D:
case Mips::DOTP_S_H:
case Mips::DOTP_S_W:
case Mips::DOTP_U_D:
case Mips::DOTP_U_H:
case Mips::DOTP_U_W:
case Mips::FADD_D:
case Mips::FADD_W:
case Mips::FCAF_D:
case Mips::FCAF_W:
case Mips::FCEQ_D:
case Mips::FCEQ_W:
case Mips::FCLE_D:
case Mips::FCLE_W:
case Mips::FCLT_D:
case Mips::FCLT_W:
case Mips::FCNE_D:
case Mips::FCNE_W:
case Mips::FCOR_D:
case Mips::FCOR_W:
case Mips::FCUEQ_D:
case Mips::FCUEQ_W:
case Mips::FCULE_D:
case Mips::FCULE_W:
case Mips::FCULT_D:
case Mips::FCULT_W:
case Mips::FCUNE_D:
case Mips::FCUNE_W:
case Mips::FCUN_D:
case Mips::FCUN_W:
case Mips::FDIV_D:
case Mips::FDIV_W:
case Mips::FEXDO_H:
case Mips::FEXDO_W:
case Mips::FEXP2_D:
case Mips::FEXP2_W:
case Mips::FMAX_A_D:
case Mips::FMAX_A_W:
case Mips::FMAX_D:
case Mips::FMAX_W:
case Mips::FMIN_A_D:
case Mips::FMIN_A_W:
case Mips::FMIN_D:
case Mips::FMIN_W:
case Mips::FMUL_D:
case Mips::FMUL_W:
case Mips::FSAF_D:
case Mips::FSAF_W:
case Mips::FSEQ_D:
case Mips::FSEQ_W:
case Mips::FSLE_D:
case Mips::FSLE_W:
case Mips::FSLT_D:
case Mips::FSLT_W:
case Mips::FSNE_D:
case Mips::FSNE_W:
case Mips::FSOR_D:
case Mips::FSOR_W:
case Mips::FSUB_D:
case Mips::FSUB_W:
case Mips::FSUEQ_D:
case Mips::FSUEQ_W:
case Mips::FSULE_D:
case Mips::FSULE_W:
case Mips::FSULT_D:
case Mips::FSULT_W:
case Mips::FSUNE_D:
case Mips::FSUNE_W:
case Mips::FSUN_D:
case Mips::FSUN_W:
case Mips::FTQ_H:
case Mips::FTQ_W:
case Mips::HADD_S_D:
case Mips::HADD_S_H:
case Mips::HADD_S_W:
case Mips::HADD_U_D:
case Mips::HADD_U_H:
case Mips::HADD_U_W:
case Mips::HSUB_S_D:
case Mips::HSUB_S_H:
case Mips::HSUB_S_W:
case Mips::HSUB_U_D:
case Mips::HSUB_U_H:
case Mips::HSUB_U_W:
case Mips::ILVEV_B:
case Mips::ILVEV_D:
case Mips::ILVEV_H:
case Mips::ILVEV_W:
case Mips::ILVL_B:
case Mips::ILVL_D:
case Mips::ILVL_H:
case Mips::ILVL_W:
case Mips::ILVOD_B:
case Mips::ILVOD_D:
case Mips::ILVOD_H:
case Mips::ILVOD_W:
case Mips::ILVR_B:
case Mips::ILVR_D:
case Mips::ILVR_H:
case Mips::ILVR_W:
case Mips::MAX_A_B:
case Mips::MAX_A_D:
case Mips::MAX_A_H:
case Mips::MAX_A_W:
case Mips::MAX_S_B:
case Mips::MAX_S_D:
case Mips::MAX_S_H:
case Mips::MAX_S_W:
case Mips::MAX_U_B:
case Mips::MAX_U_D:
case Mips::MAX_U_H:
case Mips::MAX_U_W:
case Mips::MIN_A_B:
case Mips::MIN_A_D:
case Mips::MIN_A_H:
case Mips::MIN_A_W:
case Mips::MIN_S_B:
case Mips::MIN_S_D:
case Mips::MIN_S_H:
case Mips::MIN_S_W:
case Mips::MIN_U_B:
case Mips::MIN_U_D:
case Mips::MIN_U_H:
case Mips::MIN_U_W:
case Mips::MOD_S_B:
case Mips::MOD_S_D:
case Mips::MOD_S_H:
case Mips::MOD_S_W:
case Mips::MOD_U_B:
case Mips::MOD_U_D:
case Mips::MOD_U_H:
case Mips::MOD_U_W:
case Mips::MULR_Q_H:
case Mips::MULR_Q_W:
case Mips::MULV_B:
case Mips::MULV_D:
case Mips::MULV_H:
case Mips::MULV_W:
case Mips::MUL_Q_H:
case Mips::MUL_Q_W:
case Mips::NOR_V:
case Mips::OR_V:
case Mips::PCKEV_B:
case Mips::PCKEV_D:
case Mips::PCKEV_H:
case Mips::PCKEV_W:
case Mips::PCKOD_B:
case Mips::PCKOD_D:
case Mips::PCKOD_H:
case Mips::PCKOD_W:
case Mips::SLL_B:
case Mips::SLL_D:
case Mips::SLL_H:
case Mips::SLL_W:
case Mips::SRAR_B:
case Mips::SRAR_D:
case Mips::SRAR_H:
case Mips::SRAR_W:
case Mips::SRA_B:
case Mips::SRA_D:
case Mips::SRA_H:
case Mips::SRA_W:
case Mips::SRLR_B:
case Mips::SRLR_D:
case Mips::SRLR_H:
case Mips::SRLR_W:
case Mips::SRL_B:
case Mips::SRL_D:
case Mips::SRL_H:
case Mips::SRL_W:
case Mips::SUBSUS_U_B:
case Mips::SUBSUS_U_D:
case Mips::SUBSUS_U_H:
case Mips::SUBSUS_U_W:
case Mips::SUBSUU_S_B:
case Mips::SUBSUU_S_D:
case Mips::SUBSUU_S_H:
case Mips::SUBSUU_S_W:
case Mips::SUBS_S_B:
case Mips::SUBS_S_D:
case Mips::SUBS_S_H:
case Mips::SUBS_S_W:
case Mips::SUBS_U_B:
case Mips::SUBS_U_D:
case Mips::SUBS_U_H:
case Mips::SUBS_U_W:
case Mips::SUBV_B:
case Mips::SUBV_D:
case Mips::SUBV_H:
case Mips::SUBV_W:
case Mips::XOR_V: {
// op: wt
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
case Mips::BINSL_B:
case Mips::BINSL_D:
case Mips::BINSL_H:
case Mips::BINSL_W:
case Mips::BINSR_B:
case Mips::BINSR_D:
case Mips::BINSR_H:
case Mips::BINSR_W:
case Mips::BMNZ_V:
case Mips::BMZ_V:
case Mips::BSEL_V:
case Mips::DPADD_S_D:
case Mips::DPADD_S_H:
case Mips::DPADD_S_W:
case Mips::DPADD_U_D:
case Mips::DPADD_U_H:
case Mips::DPADD_U_W:
case Mips::DPSUB_S_D:
case Mips::DPSUB_S_H:
case Mips::DPSUB_S_W:
case Mips::DPSUB_U_D:
case Mips::DPSUB_U_H:
case Mips::DPSUB_U_W:
case Mips::FMADD_D:
case Mips::FMADD_W:
case Mips::FMSUB_D:
case Mips::FMSUB_W:
case Mips::MADDR_Q_H:
case Mips::MADDR_Q_W:
case Mips::MADDV_B:
case Mips::MADDV_D:
case Mips::MADDV_H:
case Mips::MADDV_W:
case Mips::MADD_Q_H:
case Mips::MADD_Q_W:
case Mips::MSUBR_Q_H:
case Mips::MSUBR_Q_W:
case Mips::MSUBV_B:
case Mips::MSUBV_D:
case Mips::MSUBV_H:
case Mips::MSUBV_W:
case Mips::MSUB_Q_H:
case Mips::MSUB_Q_W:
case Mips::VSHF_B:
case Mips::VSHF_D:
case Mips::VSHF_H:
case Mips::VSHF_W: {
// op: wt
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
Value |= (op & UINT64_C(31)) << 16;
// op: ws
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
Value |= (op & UINT64_C(31)) << 11;
// op: wd
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
Value |= (op & UINT64_C(31)) << 6;
break;
}
default:
std::string msg;
raw_string_ostream Msg(msg);
Msg << "Not supported instr: " << MI;
report_fatal_error(Msg.str());
}
return Value;
}
#ifdef ENABLE_INSTR_PREDICATE_VERIFIER
#undef ENABLE_INSTR_PREDICATE_VERIFIER
#include <sstream>
// Flags for subtarget features that participate in instruction matching.
enum SubtargetFeatureFlag : uint64_t {
Feature_HasMips2 = (1ULL << 10),
Feature_HasMips3_32 = (1ULL << 16),
Feature_HasMips3_32r2 = (1ULL << 17),
Feature_HasMips3 = (1ULL << 11),
Feature_NotMips3 = (1ULL << 44),
Feature_HasMips4_32 = (1ULL << 18),
Feature_NotMips4_32 = (1ULL << 46),
Feature_HasMips4_32r2 = (1ULL << 19),
Feature_HasMips5_32r2 = (1ULL << 20),
Feature_HasMips32 = (1ULL << 12),
Feature_HasMips32r2 = (1ULL << 13),
Feature_HasMips32r5 = (1ULL << 14),
Feature_HasMips32r6 = (1ULL << 15),
Feature_NotMips32r6 = (1ULL << 45),
Feature_IsGP64bit = (1ULL << 31),
Feature_IsGP32bit = (1ULL << 30),
Feature_IsPTR64bit = (1ULL << 35),
Feature_IsPTR32bit = (1ULL << 34),
Feature_HasMips64 = (1ULL << 21),
Feature_NotMips64 = (1ULL << 47),
Feature_HasMips64r2 = (1ULL << 22),
Feature_HasMips64r5 = (1ULL << 23),
Feature_HasMips64r6 = (1ULL << 24),
Feature_NotMips64r6 = (1ULL << 48),
Feature_InMips16Mode = (1ULL << 28),
Feature_NotInMips16Mode = (1ULL << 43),
Feature_HasCnMips = (1ULL << 1),
Feature_NotCnMips = (1ULL << 40),
Feature_IsSym32 = (1ULL << 37),
Feature_IsSym64 = (1ULL << 38),
Feature_HasStdEnc = (1ULL << 25),
Feature_InMicroMips = (1ULL << 27),
Feature_NotInMicroMips = (1ULL << 42),
Feature_HasEVA = (1ULL << 5),
Feature_HasMSA = (1ULL << 7),
Feature_HasMadd4 = (1ULL << 9),
Feature_HasMT = (1ULL << 8),
Feature_UseIndirectJumpsHazard = (1ULL << 49),
Feature_NoIndirectJumpGuards = (1ULL << 39),
Feature_HasCRC = (1ULL << 0),
Feature_HasVirt = (1ULL << 26),
Feature_HasGINV = (1ULL << 6),
Feature_IsFP64bit = (1ULL << 29),
Feature_NotFP64bit = (1ULL << 41),
Feature_IsSingleFloat = (1ULL << 36),
Feature_IsNotSingleFloat = (1ULL << 32),
Feature_IsNotSoftFloat = (1ULL << 33),
Feature_HasDSP = (1ULL << 2),
Feature_HasDSPR2 = (1ULL << 3),
Feature_HasDSPR3 = (1ULL << 4),
Feature_None = 0
};
#ifndef NDEBUG
static const char *SubtargetFeatureNames[] = {
"Feature_HasCRC",
"Feature_HasCnMips",
"Feature_HasDSP",
"Feature_HasDSPR2",
"Feature_HasDSPR3",
"Feature_HasEVA",
"Feature_HasGINV",
"Feature_HasMSA",
"Feature_HasMT",
"Feature_HasMadd4",
"Feature_HasMips2",
"Feature_HasMips3",
"Feature_HasMips32",
"Feature_HasMips32r2",
"Feature_HasMips32r5",
"Feature_HasMips32r6",
"Feature_HasMips3_32",
"Feature_HasMips3_32r2",
"Feature_HasMips4_32",
"Feature_HasMips4_32r2",
"Feature_HasMips5_32r2",
"Feature_HasMips64",
"Feature_HasMips64r2",
"Feature_HasMips64r5",
"Feature_HasMips64r6",
"Feature_HasStdEnc",
"Feature_HasVirt",
"Feature_InMicroMips",
"Feature_InMips16Mode",
"Feature_IsFP64bit",
"Feature_IsGP32bit",
"Feature_IsGP64bit",
"Feature_IsNotSingleFloat",
"Feature_IsNotSoftFloat",
"Feature_IsPTR32bit",
"Feature_IsPTR64bit",
"Feature_IsSingleFloat",
"Feature_IsSym32",
"Feature_IsSym64",
"Feature_NoIndirectJumpGuards",
"Feature_NotCnMips",
"Feature_NotFP64bit",
"Feature_NotInMicroMips",
"Feature_NotInMips16Mode",
"Feature_NotMips3",
"Feature_NotMips32r6",
"Feature_NotMips4_32",
"Feature_NotMips64",
"Feature_NotMips64r6",
"Feature_UseIndirectJumpsHazard",
nullptr
};
#endif // NDEBUG
uint64_t MipsMCCodeEmitter::
computeAvailableFeatures(const FeatureBitset& FB) const {
uint64_t Features = 0;
if ((FB[Mips::FeatureMips2]))
Features |= Feature_HasMips2;
if ((FB[Mips::FeatureMips3_32]))
Features |= Feature_HasMips3_32;
if ((FB[Mips::FeatureMips3_32r2]))
Features |= Feature_HasMips3_32r2;
if ((FB[Mips::FeatureMips3]))
Features |= Feature_HasMips3;
if ((!FB[Mips::FeatureMips3]))
Features |= Feature_NotMips3;
if ((FB[Mips::FeatureMips4_32]))
Features |= Feature_HasMips4_32;
if ((!FB[Mips::FeatureMips4_32]))
Features |= Feature_NotMips4_32;
if ((FB[Mips::FeatureMips4_32r2]))
Features |= Feature_HasMips4_32r2;
if ((FB[Mips::FeatureMips5_32r2]))
Features |= Feature_HasMips5_32r2;
if ((FB[Mips::FeatureMips32]))
Features |= Feature_HasMips32;
if ((FB[Mips::FeatureMips32r2]))
Features |= Feature_HasMips32r2;
if ((FB[Mips::FeatureMips32r5]))
Features |= Feature_HasMips32r5;
if ((FB[Mips::FeatureMips32r6]))
Features |= Feature_HasMips32r6;
if ((!FB[Mips::FeatureMips32r6]))
Features |= Feature_NotMips32r6;
if ((FB[Mips::FeatureGP64Bit]))
Features |= Feature_IsGP64bit;
if ((!FB[Mips::FeatureGP64Bit]))
Features |= Feature_IsGP32bit;
if ((FB[Mips::FeaturePTR64Bit]))
Features |= Feature_IsPTR64bit;
if ((!FB[Mips::FeaturePTR64Bit]))
Features |= Feature_IsPTR32bit;
if ((FB[Mips::FeatureMips64]))
Features |= Feature_HasMips64;
if ((!FB[Mips::FeatureMips64]))
Features |= Feature_NotMips64;
if ((FB[Mips::FeatureMips64r2]))
Features |= Feature_HasMips64r2;
if ((FB[Mips::FeatureMips64r5]))
Features |= Feature_HasMips64r5;
if ((FB[Mips::FeatureMips64r6]))
Features |= Feature_HasMips64r6;
if ((!FB[Mips::FeatureMips64r6]))
Features |= Feature_NotMips64r6;
if ((FB[Mips::FeatureMips16]))
Features |= Feature_InMips16Mode;
if ((!FB[Mips::FeatureMips16]))
Features |= Feature_NotInMips16Mode;
if ((FB[Mips::FeatureCnMips]))
Features |= Feature_HasCnMips;
if ((!FB[Mips::FeatureCnMips]))
Features |= Feature_NotCnMips;
if ((FB[Mips::FeatureSym32]))
Features |= Feature_IsSym32;
if ((!FB[Mips::FeatureSym32]))
Features |= Feature_IsSym64;
if ((!FB[Mips::FeatureMips16]))
Features |= Feature_HasStdEnc;
if ((FB[Mips::FeatureMicroMips]))
Features |= Feature_InMicroMips;
if ((!FB[Mips::FeatureMicroMips]))
Features |= Feature_NotInMicroMips;
if ((FB[Mips::FeatureEVA]))
Features |= Feature_HasEVA;
if ((FB[Mips::FeatureMSA]))
Features |= Feature_HasMSA;
if ((!FB[Mips::FeatureMadd4]))
Features |= Feature_HasMadd4;
if ((FB[Mips::FeatureMT]))
Features |= Feature_HasMT;
if ((FB[Mips::FeatureUseIndirectJumpsHazard]))
Features |= Feature_UseIndirectJumpsHazard;
if ((!FB[Mips::FeatureUseIndirectJumpsHazard]))
Features |= Feature_NoIndirectJumpGuards;
if ((FB[Mips::FeatureCRC]))
Features |= Feature_HasCRC;
if ((FB[Mips::FeatureVirt]))
Features |= Feature_HasVirt;
if ((FB[Mips::FeatureGINV]))
Features |= Feature_HasGINV;
if ((FB[Mips::FeatureFP64Bit]))
Features |= Feature_IsFP64bit;
if ((!FB[Mips::FeatureFP64Bit]))
Features |= Feature_NotFP64bit;
if ((FB[Mips::FeatureSingleFloat]))
Features |= Feature_IsSingleFloat;
if ((!FB[Mips::FeatureSingleFloat]))
Features |= Feature_IsNotSingleFloat;
if ((!FB[Mips::FeatureSoftFloat]))
Features |= Feature_IsNotSoftFloat;
if ((FB[Mips::FeatureDSP]))
Features |= Feature_HasDSP;
if ((FB[Mips::FeatureDSPR2]))
Features |= Feature_HasDSPR2;
if ((FB[Mips::FeatureDSPR3]))
Features |= Feature_HasDSPR3;
return Features;
}
void MipsMCCodeEmitter::verifyInstructionPredicates(
const MCInst &Inst, uint64_t AvailableFeatures) const {
#ifndef NDEBUG
static uint64_t RequiredFeatures[] = {
0, // PHI = 0
0, // INLINEASM = 1
0, // CFI_INSTRUCTION = 2
0, // EH_LABEL = 3
0, // GC_LABEL = 4
0, // ANNOTATION_LABEL = 5
0, // KILL = 6
0, // EXTRACT_SUBREG = 7
0, // INSERT_SUBREG = 8
0, // IMPLICIT_DEF = 9
0, // SUBREG_TO_REG = 10
0, // COPY_TO_REGCLASS = 11
0, // DBG_VALUE = 12
0, // DBG_LABEL = 13
0, // REG_SEQUENCE = 14
0, // COPY = 15
0, // BUNDLE = 16
0, // LIFETIME_START = 17
0, // LIFETIME_END = 18
0, // STACKMAP = 19
0, // FENTRY_CALL = 20
0, // PATCHPOINT = 21
0, // LOAD_STACK_GUARD = 22
0, // STATEPOINT = 23
0, // LOCAL_ESCAPE = 24
0, // FAULTING_OP = 25
0, // PATCHABLE_OP = 26
0, // PATCHABLE_FUNCTION_ENTER = 27
0, // PATCHABLE_RET = 28
0, // PATCHABLE_FUNCTION_EXIT = 29
0, // PATCHABLE_TAIL_CALL = 30
0, // PATCHABLE_EVENT_CALL = 31
0, // PATCHABLE_TYPED_EVENT_CALL = 32
0, // ICALL_BRANCH_FUNNEL = 33
0, // G_ADD = 34
0, // G_SUB = 35
0, // G_MUL = 36
0, // G_SDIV = 37
0, // G_UDIV = 38
0, // G_SREM = 39
0, // G_UREM = 40
0, // G_AND = 41
0, // G_OR = 42
0, // G_XOR = 43
0, // G_IMPLICIT_DEF = 44
0, // G_PHI = 45
0, // G_FRAME_INDEX = 46
0, // G_GLOBAL_VALUE = 47
0, // G_EXTRACT = 48
0, // G_UNMERGE_VALUES = 49
0, // G_INSERT = 50
0, // G_MERGE_VALUES = 51
0, // G_PTRTOINT = 52
0, // G_INTTOPTR = 53
0, // G_BITCAST = 54
0, // G_LOAD = 55
0, // G_SEXTLOAD = 56
0, // G_ZEXTLOAD = 57
0, // G_STORE = 58
0, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 59
0, // G_ATOMIC_CMPXCHG = 60
0, // G_ATOMICRMW_XCHG = 61
0, // G_ATOMICRMW_ADD = 62
0, // G_ATOMICRMW_SUB = 63
0, // G_ATOMICRMW_AND = 64
0, // G_ATOMICRMW_NAND = 65
0, // G_ATOMICRMW_OR = 66
0, // G_ATOMICRMW_XOR = 67
0, // G_ATOMICRMW_MAX = 68
0, // G_ATOMICRMW_MIN = 69
0, // G_ATOMICRMW_UMAX = 70
0, // G_ATOMICRMW_UMIN = 71
0, // G_BRCOND = 72
0, // G_BRINDIRECT = 73
0, // G_INTRINSIC = 74
0, // G_INTRINSIC_W_SIDE_EFFECTS = 75
0, // G_ANYEXT = 76
0, // G_TRUNC = 77
0, // G_CONSTANT = 78
0, // G_FCONSTANT = 79
0, // G_VASTART = 80
0, // G_VAARG = 81
0, // G_SEXT = 82
0, // G_ZEXT = 83
0, // G_SHL = 84
0, // G_LSHR = 85
0, // G_ASHR = 86
0, // G_ICMP = 87
0, // G_FCMP = 88
0, // G_SELECT = 89
0, // G_UADDE = 90
0, // G_USUBE = 91
0, // G_SADDO = 92
0, // G_SSUBO = 93
0, // G_UMULO = 94
0, // G_SMULO = 95
0, // G_UMULH = 96
0, // G_SMULH = 97
0, // G_FADD = 98
0, // G_FSUB = 99
0, // G_FMUL = 100
0, // G_FMA = 101
0, // G_FDIV = 102
0, // G_FREM = 103
0, // G_FPOW = 104
0, // G_FEXP = 105
0, // G_FEXP2 = 106
0, // G_FLOG = 107
0, // G_FLOG2 = 108
0, // G_FNEG = 109
0, // G_FPEXT = 110
0, // G_FPTRUNC = 111
0, // G_FPTOSI = 112
0, // G_FPTOUI = 113
0, // G_SITOFP = 114
0, // G_UITOFP = 115
0, // G_FABS = 116
0, // G_GEP = 117
0, // G_PTR_MASK = 118
0, // G_BR = 119
0, // G_INSERT_VECTOR_ELT = 120
0, // G_EXTRACT_VECTOR_ELT = 121
0, // G_SHUFFLE_VECTOR = 122
0, // G_BSWAP = 123
0, // G_ADDRSPACE_CAST = 124
0, // G_BLOCK_ADDR = 125
0, // ABSMacro = 126
0, // ADJCALLSTACKDOWN = 127
0, // ADJCALLSTACKUP = 128
Feature_HasStdEnc | Feature_HasMSA | 0, // AND_V_D_PSEUDO = 129
Feature_HasStdEnc | Feature_HasMSA | 0, // AND_V_H_PSEUDO = 130
Feature_HasStdEnc | Feature_HasMSA | 0, // AND_V_W_PSEUDO = 131
Feature_NotInMips16Mode | 0, // ATOMIC_CMP_SWAP_I16 = 132
Feature_NotInMips16Mode | 0, // ATOMIC_CMP_SWAP_I16_POSTRA = 133
Feature_NotInMips16Mode | 0, // ATOMIC_CMP_SWAP_I32 = 134
Feature_NotInMips16Mode | 0, // ATOMIC_CMP_SWAP_I32_POSTRA = 135
Feature_NotInMips16Mode | 0, // ATOMIC_CMP_SWAP_I64 = 136
Feature_NotInMips16Mode | 0, // ATOMIC_CMP_SWAP_I64_POSTRA = 137
Feature_NotInMips16Mode | 0, // ATOMIC_CMP_SWAP_I8 = 138
Feature_NotInMips16Mode | 0, // ATOMIC_CMP_SWAP_I8_POSTRA = 139
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_ADD_I16 = 140
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_ADD_I16_POSTRA = 141
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_ADD_I32 = 142
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_ADD_I32_POSTRA = 143
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_ADD_I64 = 144
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_ADD_I64_POSTRA = 145
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_ADD_I8 = 146
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_ADD_I8_POSTRA = 147
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_AND_I16 = 148
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_AND_I16_POSTRA = 149
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_AND_I32 = 150
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_AND_I32_POSTRA = 151
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_AND_I64 = 152
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_AND_I64_POSTRA = 153
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_AND_I8 = 154
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_AND_I8_POSTRA = 155
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_NAND_I16 = 156
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_NAND_I16_POSTRA = 157
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_NAND_I32 = 158
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_NAND_I32_POSTRA = 159
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_NAND_I64 = 160
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_NAND_I64_POSTRA = 161
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_NAND_I8 = 162
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_NAND_I8_POSTRA = 163
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_OR_I16 = 164
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_OR_I16_POSTRA = 165
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_OR_I32 = 166
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_OR_I32_POSTRA = 167
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_OR_I64 = 168
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_OR_I64_POSTRA = 169
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_OR_I8 = 170
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_OR_I8_POSTRA = 171
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_SUB_I16 = 172
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_SUB_I16_POSTRA = 173
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_SUB_I32 = 174
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_SUB_I32_POSTRA = 175
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_SUB_I64 = 176
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_SUB_I64_POSTRA = 177
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_SUB_I8 = 178
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_SUB_I8_POSTRA = 179
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_XOR_I16 = 180
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_XOR_I16_POSTRA = 181
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_XOR_I32 = 182
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_XOR_I32_POSTRA = 183
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_XOR_I64 = 184
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_XOR_I64_POSTRA = 185
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_XOR_I8 = 186
Feature_NotInMips16Mode | 0, // ATOMIC_LOAD_XOR_I8_POSTRA = 187
Feature_NotInMips16Mode | 0, // ATOMIC_SWAP_I16 = 188
Feature_NotInMips16Mode | 0, // ATOMIC_SWAP_I16_POSTRA = 189
Feature_NotInMips16Mode | 0, // ATOMIC_SWAP_I32 = 190
Feature_NotInMips16Mode | 0, // ATOMIC_SWAP_I32_POSTRA = 191
Feature_NotInMips16Mode | 0, // ATOMIC_SWAP_I64 = 192
Feature_NotInMips16Mode | 0, // ATOMIC_SWAP_I64_POSTRA = 193
Feature_NotInMips16Mode | 0, // ATOMIC_SWAP_I8 = 194
Feature_NotInMips16Mode | 0, // ATOMIC_SWAP_I8_POSTRA = 195
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // B = 196
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BAL_BR = 197
Feature_InMicroMips | Feature_NotMips32r6 | 0, // BAL_BR_MM = 198
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BEQLImmMacro = 199
0, // BGE = 200
0, // BGEImmMacro = 201
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGEL = 202
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGELImmMacro = 203
0, // BGEU = 204
0, // BGEUImmMacro = 205
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGEUL = 206
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGEULImmMacro = 207
0, // BGT = 208
0, // BGTImmMacro = 209
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGTL = 210
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGTLImmMacro = 211
0, // BGTU = 212
0, // BGTUImmMacro = 213
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGTUL = 214
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BGTULImmMacro = 215
0, // BLE = 216
0, // BLEImmMacro = 217
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLEL = 218
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLELImmMacro = 219
0, // BLEU = 220
0, // BLEUImmMacro = 221
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLEUL = 222
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLEULImmMacro = 223
0, // BLT = 224
0, // BLTImmMacro = 225
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLTL = 226
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLTLImmMacro = 227
0, // BLTU = 228
0, // BLTUImmMacro = 229
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLTUL = 230
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BLTULImmMacro = 231
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // BNELImmMacro = 232
0, // BPOSGE32_PSEUDO = 233
Feature_HasStdEnc | Feature_HasMSA | 0, // BSEL_D_PSEUDO = 234
Feature_HasStdEnc | Feature_HasMSA | 0, // BSEL_FD_PSEUDO = 235
Feature_HasStdEnc | Feature_HasMSA | 0, // BSEL_FW_PSEUDO = 236
Feature_HasStdEnc | Feature_HasMSA | 0, // BSEL_H_PSEUDO = 237
Feature_HasStdEnc | Feature_HasMSA | 0, // BSEL_W_PSEUDO = 238
Feature_InMicroMips | Feature_NotMips32r6 | 0, // B_MM = 239
0, // B_MMR6_Pseudo = 240
Feature_InMicroMips | 0, // B_MM_Pseudo = 241
0, // BeqImm = 242
0, // BneImm = 243
Feature_InMips16Mode | 0, // BteqzT8CmpX16 = 244
Feature_InMips16Mode | 0, // BteqzT8CmpiX16 = 245
Feature_InMips16Mode | 0, // BteqzT8SltX16 = 246
Feature_InMips16Mode | 0, // BteqzT8SltiX16 = 247
Feature_InMips16Mode | 0, // BteqzT8SltiuX16 = 248
Feature_InMips16Mode | 0, // BteqzT8SltuX16 = 249
Feature_InMips16Mode | 0, // BtnezT8CmpX16 = 250
Feature_InMips16Mode | 0, // BtnezT8CmpiX16 = 251
Feature_InMips16Mode | 0, // BtnezT8SltX16 = 252
Feature_InMips16Mode | 0, // BtnezT8SltiX16 = 253
Feature_InMips16Mode | 0, // BtnezT8SltiuX16 = 254
Feature_InMips16Mode | 0, // BtnezT8SltuX16 = 255
Feature_NotInMips16Mode | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // BuildPairF64 = 256
Feature_NotInMips16Mode | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // BuildPairF64_64 = 257
Feature_HasMT | 0, // CFTC1 = 258
Feature_InMips16Mode | 0, // CONSTPOOL_ENTRY = 259
Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_FD_PSEUDO = 260
Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_FW_PSEUDO = 261
Feature_HasMT | 0, // CTTC1 = 262
Feature_InMips16Mode | 0, // Constant32 = 263
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // DMULImmMacro = 264
Feature_HasMips3 | Feature_NotMips64r6 | Feature_NotCnMips | 0, // DMULMacro = 265
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // DMULOMacro = 266
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // DMULOUMacro = 267
Feature_HasStdEnc | Feature_HasMips64 | 0, // DROL = 268
Feature_HasStdEnc | Feature_HasMips64 | 0, // DROLImm = 269
Feature_HasStdEnc | Feature_HasMips64 | 0, // DROR = 270
Feature_HasStdEnc | Feature_HasMips64 | 0, // DRORImm = 271
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DSDivIMacro = 272
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DSDivMacro = 273
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DSRemIMacro = 274
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DSRemMacro = 275
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DUDivIMacro = 276
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DUDivMacro = 277
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DURemIMacro = 278
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DURemMacro = 279
Feature_NotInMips16Mode | 0, // ERet = 280
Feature_NotInMips16Mode | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // ExtractElementF64 = 281
Feature_NotInMips16Mode | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // ExtractElementF64_64 = 282
Feature_HasStdEnc | Feature_HasMSA | 0, // FABS_D = 283
Feature_HasStdEnc | Feature_HasMSA | 0, // FABS_W = 284
Feature_HasStdEnc | Feature_HasMSA | 0, // FEXP2_D_1_PSEUDO = 285
Feature_HasStdEnc | Feature_HasMSA | 0, // FEXP2_W_1_PSEUDO = 286
Feature_HasStdEnc | Feature_HasMSA | 0, // FILL_FD_PSEUDO = 287
Feature_HasStdEnc | Feature_HasMSA | 0, // FILL_FW_PSEUDO = 288
Feature_InMips16Mode | 0, // GotPrologue16 = 289
Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_B_VIDX64_PSEUDO = 290
Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_B_VIDX_PSEUDO = 291
Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_D_VIDX64_PSEUDO = 292
Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_D_VIDX_PSEUDO = 293
Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_FD_PSEUDO = 294
Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_FD_VIDX64_PSEUDO = 295
Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_FD_VIDX_PSEUDO = 296
Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_FW_PSEUDO = 297
Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_FW_VIDX64_PSEUDO = 298
Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_FW_VIDX_PSEUDO = 299
Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_H_VIDX64_PSEUDO = 300
Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_H_VIDX_PSEUDO = 301
Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_W_VIDX64_PSEUDO = 302
Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_W_VIDX_PSEUDO = 303
Feature_NotInMips16Mode | Feature_NoIndirectJumpGuards | 0, // JALR64Pseudo = 304
Feature_NotInMips16Mode | Feature_UseIndirectJumpsHazard | 0, // JALRHB64Pseudo = 305
Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // JALRHBPseudo = 306
Feature_HasStdEnc | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // JALRPseudo = 307
0, // JalOneReg = 308
0, // JalTwoReg = 309
Feature_HasStdEnc | Feature_NotMips3 | 0, // LDMacro = 310
Feature_HasMSA | 0, // LD_F16 = 311
Feature_NotInMips16Mode | 0, // LOAD_ACC128 = 312
Feature_NotInMips16Mode | 0, // LOAD_ACC64 = 313
Feature_NotInMips16Mode | 0, // LOAD_ACC64DSP = 314
Feature_NotInMips16Mode | 0, // LOAD_CCOND_DSP = 315
Feature_NotInMips16Mode | 0, // LONG_BRANCH_ADDiu = 316
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LONG_BRANCH_DADDiu = 317
Feature_NotInMips16Mode | 0, // LONG_BRANCH_LUi = 318
Feature_InMicroMips | 0, // LWM_MM = 319
0, // LoadAddrImm32 = 320
0, // LoadAddrImm64 = 321
0, // LoadAddrReg32 = 322
0, // LoadAddrReg64 = 323
0, // LoadImm32 = 324
0, // LoadImm64 = 325
Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // LoadImmDoubleFGR = 326
Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // LoadImmDoubleFGR_32 = 327
0, // LoadImmDoubleGPR = 328
Feature_IsNotSoftFloat | 0, // LoadImmSingleFGR = 329
0, // LoadImmSingleGPR = 330
Feature_InMips16Mode | 0, // LwConstant32 = 331
Feature_HasMT | 0, // MFTACX = 332
Feature_HasMT | 0, // MFTC0 = 333
Feature_HasMT | 0, // MFTC1 = 334
Feature_HasMT | 0, // MFTDSP = 335
Feature_HasMT | 0, // MFTGPR = 336
Feature_HasMT | 0, // MFTHC1 = 337
Feature_HasMT | 0, // MFTHI = 338
Feature_HasMT | 0, // MFTLO = 339
0, // MIPSeh_return32 = 340
0, // MIPSeh_return64 = 341
Feature_HasMSA | 0, // MSA_FP_EXTEND_D_PSEUDO = 342
Feature_HasMSA | 0, // MSA_FP_EXTEND_W_PSEUDO = 343
Feature_HasMSA | 0, // MSA_FP_ROUND_D_PSEUDO = 344
Feature_HasMSA | 0, // MSA_FP_ROUND_W_PSEUDO = 345
Feature_HasMT | 0, // MTTACX = 346
Feature_HasMT | 0, // MTTC0 = 347
Feature_HasMT | 0, // MTTC1 = 348
Feature_HasMT | 0, // MTTDSP = 349
Feature_HasMT | 0, // MTTGPR = 350
Feature_HasMT | 0, // MTTHC1 = 351
Feature_HasMT | 0, // MTTHI = 352
Feature_HasMT | 0, // MTTLO = 353
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MULImmMacro = 354
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MULOMacro = 355
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MULOUMacro = 356
Feature_InMips16Mode | 0, // MultRxRy16 = 357
Feature_InMips16Mode | 0, // MultRxRyRz16 = 358
Feature_InMips16Mode | 0, // MultuRxRy16 = 359
Feature_InMips16Mode | 0, // MultuRxRyRz16 = 360
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // NOP = 361
Feature_IsGP32bit | 0, // NORImm = 362
Feature_IsGP64bit | 0, // NORImm64 = 363
Feature_HasStdEnc | Feature_HasMSA | 0, // NOR_V_D_PSEUDO = 364
Feature_HasStdEnc | Feature_HasMSA | 0, // NOR_V_H_PSEUDO = 365
Feature_HasStdEnc | Feature_HasMSA | 0, // NOR_V_W_PSEUDO = 366
Feature_HasStdEnc | Feature_HasMSA | 0, // OR_V_D_PSEUDO = 367
Feature_HasStdEnc | Feature_HasMSA | 0, // OR_V_H_PSEUDO = 368
Feature_HasStdEnc | Feature_HasMSA | 0, // OR_V_W_PSEUDO = 369
Feature_HasDSP | 0, // PseudoCMPU_EQ_QB = 370
Feature_HasDSP | 0, // PseudoCMPU_LE_QB = 371
Feature_HasDSP | 0, // PseudoCMPU_LT_QB = 372
Feature_HasDSP | 0, // PseudoCMP_EQ_PH = 373
Feature_HasDSP | 0, // PseudoCMP_LE_PH = 374
Feature_HasDSP | 0, // PseudoCMP_LT_PH = 375
Feature_NotInMips16Mode | Feature_IsNotSoftFloat | 0, // PseudoCVT_D32_W = 376
Feature_NotInMips16Mode | Feature_IsNotSoftFloat | 0, // PseudoCVT_D64_L = 377
Feature_NotInMips16Mode | Feature_IsNotSoftFloat | 0, // PseudoCVT_D64_W = 378
Feature_NotInMips16Mode | Feature_IsNotSoftFloat | 0, // PseudoCVT_S_L = 379
Feature_NotInMips16Mode | Feature_IsNotSoftFloat | 0, // PseudoCVT_S_W = 380
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoDMULT = 381
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoDMULTu = 382
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoDSDIV = 383
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoDUDIV = 384
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // PseudoIndirectBranch = 385
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // PseudoIndirectBranch64 = 386
Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // PseudoIndirectBranch64R6 = 387
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // PseudoIndirectBranchR6 = 388
Feature_InMicroMips | Feature_NotMips32r6 | 0, // PseudoIndirectBranch_MM = 389
Feature_InMicroMips | Feature_HasMips32r6 | 0, // PseudoIndirectBranch_MMR6 = 390
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // PseudoIndirectHazardBranch = 391
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // PseudoIndirectHazardBranch64 = 392
Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // PseudoIndrectHazardBranch64R6 = 393
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // PseudoIndrectHazardBranchR6 = 394
Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMADD = 395
Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMADDU = 396
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMFHI = 397
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMFHI64 = 398
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMFLO = 399
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMFLO64 = 400
Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMSUB = 401
Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMSUBU = 402
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMTLOHI = 403
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMTLOHI64 = 404
Feature_NotInMips16Mode | 0, // PseudoMTLOHI_DSP = 405
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMULT = 406
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // PseudoMULTu = 407
Feature_HasDSP | 0, // PseudoPICK_PH = 408
Feature_HasDSP | 0, // PseudoPICK_QB = 409
0, // PseudoReturn = 410
0, // PseudoReturn64 = 411
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // PseudoSDIV = 412
Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips4_32 | 0, // PseudoSELECTFP_F_D32 = 413
Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips4_32 | 0, // PseudoSELECTFP_F_D64 = 414
Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECTFP_F_I = 415
Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECTFP_F_I64 = 416
Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECTFP_F_S = 417
Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips4_32 | 0, // PseudoSELECTFP_T_D32 = 418
Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips4_32 | 0, // PseudoSELECTFP_T_D64 = 419
Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECTFP_T_I = 420
Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECTFP_T_I64 = 421
Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECTFP_T_S = 422
Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips4_32 | 0, // PseudoSELECT_D32 = 423
Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips4_32 | 0, // PseudoSELECT_D64 = 424
Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECT_I = 425
Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECT_I64 = 426
Feature_HasStdEnc | Feature_NotMips4_32 | 0, // PseudoSELECT_S = 427
Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // PseudoTRUNC_W_D = 428
Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // PseudoTRUNC_W_D32 = 429
0, // PseudoTRUNC_W_S = 430
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // PseudoUDIV = 431
0, // ROL = 432
0, // ROLImm = 433
0, // ROR = 434
0, // RORImm = 435
Feature_NotInMips16Mode | 0, // RetRA = 436
Feature_InMips16Mode | 0, // RetRA16 = 437
Feature_InMicroMips | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SDIV_MM_Pseudo = 438
Feature_HasStdEnc | Feature_NotMips3 | 0, // SDMacro = 439
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SDivIMacro = 440
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SDivMacro = 441
Feature_NotCnMips | 0, // SEQIMacro = 442
Feature_NotCnMips | 0, // SEQMacro = 443
Feature_IsGP64bit | 0, // SLTImm64 = 444
Feature_IsGP64bit | 0, // SLTUImm64 = 445
0, // SNZ_B_PSEUDO = 446
0, // SNZ_D_PSEUDO = 447
0, // SNZ_H_PSEUDO = 448
0, // SNZ_V_PSEUDO = 449
0, // SNZ_W_PSEUDO = 450
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SRemIMacro = 451
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SRemMacro = 452
Feature_NotInMips16Mode | 0, // STORE_ACC128 = 453
Feature_NotInMips16Mode | 0, // STORE_ACC64 = 454
Feature_NotInMips16Mode | 0, // STORE_ACC64DSP = 455
Feature_NotInMips16Mode | 0, // STORE_CCOND_DSP = 456
Feature_HasMSA | 0, // ST_F16 = 457
Feature_InMicroMips | 0, // SWM_MM = 458
0, // SZ_B_PSEUDO = 459
0, // SZ_D_PSEUDO = 460
0, // SZ_H_PSEUDO = 461
0, // SZ_V_PSEUDO = 462
0, // SZ_W_PSEUDO = 463
Feature_InMips16Mode | 0, // SelBeqZ = 464
Feature_InMips16Mode | 0, // SelBneZ = 465
Feature_InMips16Mode | 0, // SelTBteqZCmp = 466
Feature_InMips16Mode | 0, // SelTBteqZCmpi = 467
Feature_InMips16Mode | 0, // SelTBteqZSlt = 468
Feature_InMips16Mode | 0, // SelTBteqZSlti = 469
Feature_InMips16Mode | 0, // SelTBteqZSltiu = 470
Feature_InMips16Mode | 0, // SelTBteqZSltu = 471
Feature_InMips16Mode | 0, // SelTBtneZCmp = 472
Feature_InMips16Mode | 0, // SelTBtneZCmpi = 473
Feature_InMips16Mode | 0, // SelTBtneZSlt = 474
Feature_InMips16Mode | 0, // SelTBtneZSlti = 475
Feature_InMips16Mode | 0, // SelTBtneZSltiu = 476
Feature_InMips16Mode | 0, // SelTBtneZSltu = 477
Feature_InMips16Mode | 0, // SltCCRxRy16 = 478
Feature_InMips16Mode | 0, // SltiCCRxImmX16 = 479
Feature_InMips16Mode | 0, // SltiuCCRxImmX16 = 480
Feature_InMips16Mode | 0, // SltuCCRxRy16 = 481
Feature_InMips16Mode | 0, // SltuRxRyRz16 = 482
Feature_HasStdEnc | Feature_NotInMips16Mode | Feature_NotInMicroMips | 0, // TAILCALL = 483
Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // TAILCALL64R6REG = 484
Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // TAILCALLHB64R6REG = 485
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // TAILCALLHBR6REG = 486
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // TAILCALLR6REG = 487
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // TAILCALLREG = 488
Feature_HasStdEnc | Feature_IsPTR64bit | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // TAILCALLREG64 = 489
Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // TAILCALLREGHB = 490
Feature_HasStdEnc | Feature_IsPTR64bit | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMips16Mode | Feature_NotInMicroMips | Feature_UseIndirectJumpsHazard | 0, // TAILCALLREGHB64 = 491
Feature_InMicroMips | Feature_NotMips32r6 | 0, // TAILCALLREG_MM = 492
Feature_InMicroMips | Feature_HasMips32r6 | 0, // TAILCALLREG_MMR6 = 493
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // TAILCALL_MM = 494
Feature_InMicroMips | Feature_HasMips32r6 | 0, // TAILCALL_MMR6 = 495
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // TRAP = 496
Feature_InMicroMips | 0, // TRAP_MM = 497
Feature_InMicroMips | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // UDIV_MM_Pseudo = 498
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // UDivIMacro = 499
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // UDivMacro = 500
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // URemIMacro = 501
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // URemMacro = 502
0, // Ulh = 503
0, // Ulhu = 504
0, // Ulw = 505
0, // Ush = 506
0, // Usw = 507
Feature_HasStdEnc | Feature_HasMSA | 0, // XOR_V_D_PSEUDO = 508
Feature_HasStdEnc | Feature_HasMSA | 0, // XOR_V_H_PSEUDO = 509
Feature_HasStdEnc | Feature_HasMSA | 0, // XOR_V_W_PSEUDO = 510
Feature_HasDSP | 0, // ABSQ_S_PH = 511
Feature_InMicroMips | Feature_HasDSP | 0, // ABSQ_S_PH_MM = 512
Feature_HasDSPR2 | 0, // ABSQ_S_QB = 513
Feature_InMicroMips | Feature_HasDSPR2 | 0, // ABSQ_S_QB_MMR2 = 514
Feature_HasDSP | 0, // ABSQ_S_W = 515
Feature_InMicroMips | Feature_HasDSP | 0, // ABSQ_S_W_MM = 516
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // ADD = 517
Feature_HasStdEnc | Feature_HasMips32r6 | 0, // ADDIUPC = 518
Feature_InMicroMips | Feature_NotMips32r6 | 0, // ADDIUPC_MM = 519
Feature_InMicroMips | Feature_HasMips32r6 | 0, // ADDIUPC_MMR6 = 520
Feature_InMicroMips | 0, // ADDIUR1SP_MM = 521
Feature_InMicroMips | 0, // ADDIUR2_MM = 522
Feature_InMicroMips | 0, // ADDIUS5_MM = 523
Feature_InMicroMips | 0, // ADDIUSP_MM = 524
Feature_InMicroMips | Feature_HasMips32r6 | 0, // ADDIU_MMR6 = 525
Feature_HasDSPR2 | 0, // ADDQH_PH = 526
Feature_InMicroMips | Feature_HasDSPR2 | 0, // ADDQH_PH_MMR2 = 527
Feature_HasDSPR2 | 0, // ADDQH_R_PH = 528
Feature_InMicroMips | Feature_HasDSPR2 | 0, // ADDQH_R_PH_MMR2 = 529
Feature_HasDSPR2 | 0, // ADDQH_R_W = 530
Feature_InMicroMips | Feature_HasDSPR2 | 0, // ADDQH_R_W_MMR2 = 531
Feature_HasDSPR2 | 0, // ADDQH_W = 532
Feature_InMicroMips | Feature_HasDSPR2 | 0, // ADDQH_W_MMR2 = 533
Feature_HasDSP | 0, // ADDQ_PH = 534
Feature_InMicroMips | Feature_HasDSP | 0, // ADDQ_PH_MM = 535
Feature_HasDSP | 0, // ADDQ_S_PH = 536
Feature_InMicroMips | Feature_HasDSP | 0, // ADDQ_S_PH_MM = 537
Feature_HasDSP | 0, // ADDQ_S_W = 538
Feature_InMicroMips | Feature_HasDSP | 0, // ADDQ_S_W_MM = 539
Feature_HasDSP | 0, // ADDSC = 540
Feature_InMicroMips | Feature_HasDSP | 0, // ADDSC_MM = 541
Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_A_B = 542
Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_A_D = 543
Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_A_H = 544
Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_A_W = 545
Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_S_B = 546
Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_S_D = 547
Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_S_H = 548
Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_S_W = 549
Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_U_B = 550
Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_U_D = 551
Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_U_H = 552
Feature_HasStdEnc | Feature_HasMSA | 0, // ADDS_U_W = 553
Feature_InMicroMips | Feature_NotMips32r6 | 0, // ADDU16_MM = 554
Feature_InMicroMips | Feature_HasMips32r6 | 0, // ADDU16_MMR6 = 555
Feature_HasDSPR2 | 0, // ADDUH_QB = 556
Feature_InMicroMips | Feature_HasDSPR2 | 0, // ADDUH_QB_MMR2 = 557
Feature_HasDSPR2 | 0, // ADDUH_R_QB = 558
Feature_InMicroMips | Feature_HasDSPR2 | 0, // ADDUH_R_QB_MMR2 = 559
Feature_InMicroMips | Feature_HasMips32r6 | 0, // ADDU_MMR6 = 560
Feature_HasDSPR2 | 0, // ADDU_PH = 561
Feature_InMicroMips | Feature_HasDSPR2 | 0, // ADDU_PH_MMR2 = 562
Feature_HasDSP | 0, // ADDU_QB = 563
Feature_InMicroMips | Feature_HasDSP | 0, // ADDU_QB_MM = 564
Feature_HasDSPR2 | 0, // ADDU_S_PH = 565
Feature_InMicroMips | Feature_HasDSPR2 | 0, // ADDU_S_PH_MMR2 = 566
Feature_HasDSP | 0, // ADDU_S_QB = 567
Feature_InMicroMips | Feature_HasDSP | 0, // ADDU_S_QB_MM = 568
Feature_HasStdEnc | Feature_HasMSA | 0, // ADDVI_B = 569
Feature_HasStdEnc | Feature_HasMSA | 0, // ADDVI_D = 570
Feature_HasStdEnc | Feature_HasMSA | 0, // ADDVI_H = 571
Feature_HasStdEnc | Feature_HasMSA | 0, // ADDVI_W = 572
Feature_HasStdEnc | Feature_HasMSA | 0, // ADDV_B = 573
Feature_HasStdEnc | Feature_HasMSA | 0, // ADDV_D = 574
Feature_HasStdEnc | Feature_HasMSA | 0, // ADDV_H = 575
Feature_HasStdEnc | Feature_HasMSA | 0, // ADDV_W = 576
Feature_HasDSP | 0, // ADDWC = 577
Feature_InMicroMips | Feature_HasDSP | 0, // ADDWC_MM = 578
Feature_HasStdEnc | Feature_HasMSA | 0, // ADD_A_B = 579
Feature_HasStdEnc | Feature_HasMSA | 0, // ADD_A_D = 580
Feature_HasStdEnc | Feature_HasMSA | 0, // ADD_A_H = 581
Feature_HasStdEnc | Feature_HasMSA | 0, // ADD_A_W = 582
Feature_InMicroMips | Feature_NotMips32r6 | 0, // ADD_MM = 583
Feature_InMicroMips | Feature_HasMips32r6 | 0, // ADD_MMR6 = 584
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // ADDi = 585
Feature_InMicroMips | Feature_NotMips32r6 | 0, // ADDi_MM = 586
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // ADDiu = 587
Feature_InMicroMips | Feature_NotMips32r6 | 0, // ADDiu_MM = 588
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // ADDu = 589
Feature_InMicroMips | Feature_NotMips32r6 | 0, // ADDu_MM = 590
Feature_HasStdEnc | Feature_HasMips32r6 | 0, // ALIGN = 591
Feature_InMicroMips | Feature_HasMips32r6 | 0, // ALIGN_MMR6 = 592
Feature_HasStdEnc | Feature_HasMips32r6 | 0, // ALUIPC = 593
Feature_InMicroMips | Feature_HasMips32r6 | 0, // ALUIPC_MMR6 = 594
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // AND = 595
Feature_InMicroMips | Feature_NotMips32r6 | 0, // AND16_MM = 596
Feature_InMicroMips | Feature_HasMips32r6 | 0, // AND16_MMR6 = 597
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // AND64 = 598
Feature_InMicroMips | Feature_NotMips32r6 | 0, // ANDI16_MM = 599
Feature_InMicroMips | Feature_HasMips32r6 | 0, // ANDI16_MMR6 = 600
Feature_HasStdEnc | Feature_HasMSA | 0, // ANDI_B = 601
Feature_InMicroMips | Feature_HasMips32r6 | 0, // ANDI_MMR6 = 602
Feature_InMicroMips | Feature_NotMips32r6 | 0, // AND_MM = 603
Feature_InMicroMips | Feature_HasMips32r6 | 0, // AND_MMR6 = 604
Feature_HasStdEnc | Feature_HasMSA | 0, // AND_V = 605
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // ANDi = 606
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // ANDi64 = 607
Feature_InMicroMips | Feature_NotMips32r6 | 0, // ANDi_MM = 608
Feature_HasDSPR2 | 0, // APPEND = 609
Feature_InMicroMips | Feature_HasDSPR2 | 0, // APPEND_MMR2 = 610
Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_S_B = 611
Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_S_D = 612
Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_S_H = 613
Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_S_W = 614
Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_U_B = 615
Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_U_D = 616
Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_U_H = 617
Feature_HasStdEnc | Feature_HasMSA | 0, // ASUB_U_W = 618
Feature_HasStdEnc | Feature_HasMips32r6 | 0, // AUI = 619
Feature_HasStdEnc | Feature_HasMips32r6 | 0, // AUIPC = 620
Feature_InMicroMips | Feature_HasMips32r6 | 0, // AUIPC_MMR6 = 621
Feature_InMicroMips | Feature_HasMips32r6 | 0, // AUI_MMR6 = 622
Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_S_B = 623
Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_S_D = 624
Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_S_H = 625
Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_S_W = 626
Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_U_B = 627
Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_U_D = 628
Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_U_H = 629
Feature_HasStdEnc | Feature_HasMSA | 0, // AVER_U_W = 630
Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_S_B = 631
Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_S_D = 632
Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_S_H = 633
Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_S_W = 634
Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_U_B = 635
Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_U_D = 636
Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_U_H = 637
Feature_HasStdEnc | Feature_HasMSA | 0, // AVE_U_W = 638
Feature_InMips16Mode | 0, // AddiuRxImmX16 = 639
Feature_InMips16Mode | 0, // AddiuRxPcImmX16 = 640
Feature_InMips16Mode | 0, // AddiuRxRxImm16 = 641
Feature_InMips16Mode | 0, // AddiuRxRxImmX16 = 642
Feature_InMips16Mode | 0, // AddiuRxRyOffMemX16 = 643
Feature_InMips16Mode | 0, // AddiuSpImm16 = 644
Feature_InMips16Mode | 0, // AddiuSpImmX16 = 645
Feature_InMips16Mode | 0, // AdduRxRyRz16 = 646
Feature_InMips16Mode | 0, // AndRxRxRy16 = 647
Feature_InMicroMips | 0, // B16_MM = 648
Feature_HasCnMips | 0, // BADDu = 649
Feature_HasStdEnc | Feature_HasMips32r6 | 0, // BAL = 650
Feature_HasStdEnc | Feature_HasMips32r6 | 0, // BALC = 651
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BALC_MMR6 = 652
Feature_HasDSPR2 | 0, // BALIGN = 653
Feature_InMicroMips | Feature_HasDSPR2 | 0, // BALIGN_MMR2 = 654
Feature_HasCnMips | 0, // BBIT0 = 655
Feature_HasCnMips | 0, // BBIT032 = 656
Feature_HasCnMips | 0, // BBIT1 = 657
Feature_HasCnMips | 0, // BBIT132 = 658
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BC = 659
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BC16_MMR6 = 660
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // BC1EQZ = 661
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // BC1EQZC_MMR6 = 662
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // BC1F = 663
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // BC1FL = 664
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // BC1F_MM = 665
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // BC1NEZ = 666
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // BC1NEZC_MMR6 = 667
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // BC1T = 668
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // BC1TL = 669
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // BC1T_MM = 670
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BC2EQZ = 671
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BC2EQZC_MMR6 = 672
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BC2NEZ = 673
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BC2NEZC_MMR6 = 674
Feature_HasStdEnc | Feature_HasMSA | 0, // BCLRI_B = 675
Feature_HasStdEnc | Feature_HasMSA | 0, // BCLRI_D = 676
Feature_HasStdEnc | Feature_HasMSA | 0, // BCLRI_H = 677
Feature_HasStdEnc | Feature_HasMSA | 0, // BCLRI_W = 678
Feature_HasStdEnc | Feature_HasMSA | 0, // BCLR_B = 679
Feature_HasStdEnc | Feature_HasMSA | 0, // BCLR_D = 680
Feature_HasStdEnc | Feature_HasMSA | 0, // BCLR_H = 681
Feature_HasStdEnc | Feature_HasMSA | 0, // BCLR_W = 682
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BC_MMR6 = 683
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BEQ = 684
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // BEQ64 = 685
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BEQC = 686
Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BEQC64 = 687
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BEQC_MMR6 = 688
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BEQL = 689
Feature_InMicroMips | Feature_NotMips32r6 | 0, // BEQZ16_MM = 690
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BEQZALC = 691
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BEQZALC_MMR6 = 692
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BEQZC = 693
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BEQZC16_MMR6 = 694
Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BEQZC64 = 695
Feature_InMicroMips | Feature_NotMips32r6 | 0, // BEQZC_MM = 696
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BEQZC_MMR6 = 697
Feature_InMicroMips | Feature_NotMips32r6 | 0, // BEQ_MM = 698
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BGEC = 699
Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BGEC64 = 700
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BGEC_MMR6 = 701
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BGEUC = 702
Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BGEUC64 = 703
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BGEUC_MMR6 = 704
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BGEZ = 705
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // BGEZ64 = 706
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BGEZAL = 707
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BGEZALC = 708
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BGEZALC_MMR6 = 709
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BGEZALL = 710
Feature_InMicroMips | Feature_NotMips32r6 | 0, // BGEZALS_MM = 711
Feature_InMicroMips | Feature_NotMips32r6 | 0, // BGEZAL_MM = 712
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BGEZC = 713
Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BGEZC64 = 714
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BGEZC_MMR6 = 715
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BGEZL = 716
Feature_InMicroMips | Feature_NotMips32r6 | 0, // BGEZ_MM = 717
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BGTZ = 718
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // BGTZ64 = 719
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BGTZALC = 720
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BGTZALC_MMR6 = 721
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BGTZC = 722
Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BGTZC64 = 723
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BGTZC_MMR6 = 724
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BGTZL = 725
Feature_InMicroMips | Feature_NotMips32r6 | 0, // BGTZ_MM = 726
Feature_HasStdEnc | Feature_HasMSA | 0, // BINSLI_B = 727
Feature_HasStdEnc | Feature_HasMSA | 0, // BINSLI_D = 728
Feature_HasStdEnc | Feature_HasMSA | 0, // BINSLI_H = 729
Feature_HasStdEnc | Feature_HasMSA | 0, // BINSLI_W = 730
Feature_HasStdEnc | Feature_HasMSA | 0, // BINSL_B = 731
Feature_HasStdEnc | Feature_HasMSA | 0, // BINSL_D = 732
Feature_HasStdEnc | Feature_HasMSA | 0, // BINSL_H = 733
Feature_HasStdEnc | Feature_HasMSA | 0, // BINSL_W = 734
Feature_HasStdEnc | Feature_HasMSA | 0, // BINSRI_B = 735
Feature_HasStdEnc | Feature_HasMSA | 0, // BINSRI_D = 736
Feature_HasStdEnc | Feature_HasMSA | 0, // BINSRI_H = 737
Feature_HasStdEnc | Feature_HasMSA | 0, // BINSRI_W = 738
Feature_HasStdEnc | Feature_HasMSA | 0, // BINSR_B = 739
Feature_HasStdEnc | Feature_HasMSA | 0, // BINSR_D = 740
Feature_HasStdEnc | Feature_HasMSA | 0, // BINSR_H = 741
Feature_HasStdEnc | Feature_HasMSA | 0, // BINSR_W = 742
Feature_HasDSP | 0, // BITREV = 743
Feature_InMicroMips | Feature_HasDSP | 0, // BITREV_MM = 744
Feature_HasStdEnc | Feature_HasMips32r6 | 0, // BITSWAP = 745
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BITSWAP_MMR6 = 746
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BLEZ = 747
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // BLEZ64 = 748
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BLEZALC = 749
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BLEZALC_MMR6 = 750
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BLEZC = 751
Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BLEZC64 = 752
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BLEZC_MMR6 = 753
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BLEZL = 754
Feature_InMicroMips | Feature_NotMips32r6 | 0, // BLEZ_MM = 755
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BLTC = 756
Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BLTC64 = 757
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BLTC_MMR6 = 758
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BLTUC = 759
Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BLTUC64 = 760
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BLTUC_MMR6 = 761
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BLTZ = 762
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // BLTZ64 = 763
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BLTZAL = 764
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BLTZALC = 765
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BLTZALC_MMR6 = 766
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BLTZALL = 767
Feature_InMicroMips | Feature_NotMips32r6 | 0, // BLTZALS_MM = 768
Feature_InMicroMips | Feature_NotMips32r6 | 0, // BLTZAL_MM = 769
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BLTZC = 770
Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BLTZC64 = 771
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BLTZC_MMR6 = 772
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BLTZL = 773
Feature_InMicroMips | Feature_NotMips32r6 | 0, // BLTZ_MM = 774
Feature_HasStdEnc | Feature_HasMSA | 0, // BMNZI_B = 775
Feature_HasStdEnc | Feature_HasMSA | 0, // BMNZ_V = 776
Feature_HasStdEnc | Feature_HasMSA | 0, // BMZI_B = 777
Feature_HasStdEnc | Feature_HasMSA | 0, // BMZ_V = 778
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BNE = 779
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // BNE64 = 780
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BNEC = 781
Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BNEC64 = 782
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BNEC_MMR6 = 783
Feature_HasStdEnc | Feature_HasMSA | 0, // BNEGI_B = 784
Feature_HasStdEnc | Feature_HasMSA | 0, // BNEGI_D = 785
Feature_HasStdEnc | Feature_HasMSA | 0, // BNEGI_H = 786
Feature_HasStdEnc | Feature_HasMSA | 0, // BNEGI_W = 787
Feature_HasStdEnc | Feature_HasMSA | 0, // BNEG_B = 788
Feature_HasStdEnc | Feature_HasMSA | 0, // BNEG_D = 789
Feature_HasStdEnc | Feature_HasMSA | 0, // BNEG_H = 790
Feature_HasStdEnc | Feature_HasMSA | 0, // BNEG_W = 791
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BNEL = 792
Feature_InMicroMips | Feature_NotMips32r6 | 0, // BNEZ16_MM = 793
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BNEZALC = 794
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BNEZALC_MMR6 = 795
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BNEZC = 796
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BNEZC16_MMR6 = 797
Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // BNEZC64 = 798
Feature_InMicroMips | Feature_NotMips32r6 | 0, // BNEZC_MM = 799
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BNEZC_MMR6 = 800
Feature_InMicroMips | Feature_NotMips32r6 | 0, // BNE_MM = 801
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BNVC = 802
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BNVC_MMR6 = 803
Feature_HasStdEnc | Feature_HasMSA | 0, // BNZ_B = 804
Feature_HasStdEnc | Feature_HasMSA | 0, // BNZ_D = 805
Feature_HasStdEnc | Feature_HasMSA | 0, // BNZ_H = 806
Feature_HasStdEnc | Feature_HasMSA | 0, // BNZ_V = 807
Feature_HasStdEnc | Feature_HasMSA | 0, // BNZ_W = 808
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // BOVC = 809
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BOVC_MMR6 = 810
Feature_HasDSP | Feature_NotInMicroMips | 0, // BPOSGE32 = 811
Feature_InMicroMips | Feature_HasDSPR3 | 0, // BPOSGE32C_MMR3 = 812
Feature_InMicroMips | Feature_NotMips32r6 | Feature_HasDSP | 0, // BPOSGE32_MM = 813
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BREAK = 814
Feature_InMicroMips | Feature_NotMips32r6 | 0, // BREAK16_MM = 815
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BREAK16_MMR6 = 816
Feature_InMicroMips | 0, // BREAK_MM = 817
Feature_InMicroMips | Feature_HasMips32r6 | 0, // BREAK_MMR6 = 818
Feature_HasStdEnc | Feature_HasMSA | 0, // BSELI_B = 819
Feature_HasStdEnc | Feature_HasMSA | 0, // BSEL_V = 820
Feature_HasStdEnc | Feature_HasMSA | 0, // BSETI_B = 821
Feature_HasStdEnc | Feature_HasMSA | 0, // BSETI_D = 822
Feature_HasStdEnc | Feature_HasMSA | 0, // BSETI_H = 823
Feature_HasStdEnc | Feature_HasMSA | 0, // BSETI_W = 824
Feature_HasStdEnc | Feature_HasMSA | 0, // BSET_B = 825
Feature_HasStdEnc | Feature_HasMSA | 0, // BSET_D = 826
Feature_HasStdEnc | Feature_HasMSA | 0, // BSET_H = 827
Feature_HasStdEnc | Feature_HasMSA | 0, // BSET_W = 828
Feature_HasStdEnc | Feature_HasMSA | 0, // BZ_B = 829
Feature_HasStdEnc | Feature_HasMSA | 0, // BZ_D = 830
Feature_HasStdEnc | Feature_HasMSA | 0, // BZ_H = 831
Feature_HasStdEnc | Feature_HasMSA | 0, // BZ_V = 832
Feature_HasStdEnc | Feature_HasMSA | 0, // BZ_W = 833
Feature_InMips16Mode | 0, // BeqzRxImm16 = 834
Feature_InMips16Mode | 0, // BeqzRxImmX16 = 835
Feature_InMips16Mode | 0, // Bimm16 = 836
Feature_InMips16Mode | 0, // BimmX16 = 837
Feature_InMips16Mode | 0, // BnezRxImm16 = 838
Feature_InMips16Mode | 0, // BnezRxImmX16 = 839
Feature_InMips16Mode | 0, // Break16 = 840
Feature_InMips16Mode | 0, // Bteqz16 = 841
Feature_InMips16Mode | 0, // BteqzX16 = 842
Feature_InMips16Mode | 0, // Btnez16 = 843
Feature_InMips16Mode | 0, // BtnezX16 = 844
Feature_HasStdEnc | Feature_HasMips3_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // CACHE = 845
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // CACHEE = 846
Feature_InMicroMips | Feature_HasEVA | 0, // CACHEE_MM = 847
Feature_InMicroMips | Feature_NotMips32r6 | 0, // CACHE_MM = 848
Feature_InMicroMips | Feature_HasMips32r6 | 0, // CACHE_MMR6 = 849
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // CACHE_R6 = 850
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips3_32 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CEIL_L_D64 = 851
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CEIL_L_D_MMR6 = 852
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CEIL_L_S = 853
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CEIL_L_S_MMR6 = 854
Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CEIL_W_D32 = 855
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CEIL_W_D64 = 856
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CEIL_W_D_MMR6 = 857
Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // CEIL_W_MM = 858
Feature_HasStdEnc | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CEIL_W_S = 859
Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // CEIL_W_S_MM = 860
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CEIL_W_S_MMR6 = 861
Feature_HasStdEnc | Feature_HasMSA | 0, // CEQI_B = 862
Feature_HasStdEnc | Feature_HasMSA | 0, // CEQI_D = 863
Feature_HasStdEnc | Feature_HasMSA | 0, // CEQI_H = 864
Feature_HasStdEnc | Feature_HasMSA | 0, // CEQI_W = 865
Feature_HasStdEnc | Feature_HasMSA | 0, // CEQ_B = 866
Feature_HasStdEnc | Feature_HasMSA | 0, // CEQ_D = 867
Feature_HasStdEnc | Feature_HasMSA | 0, // CEQ_H = 868
Feature_HasStdEnc | Feature_HasMSA | 0, // CEQ_W = 869
Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CFC1 = 870
Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // CFC1_MM = 871
Feature_InMicroMips | 0, // CFC2_MM = 872
Feature_HasStdEnc | Feature_HasMSA | 0, // CFCMSA = 873
Feature_HasMips64 | Feature_HasCnMips | Feature_NotInMicroMips | 0, // CINS = 874
Feature_HasMips64 | Feature_HasCnMips | Feature_NotInMicroMips | 0, // CINS32 = 875
Feature_HasMips64 | Feature_HasCnMips | Feature_NotInMicroMips | 0, // CINS64_32 = 876
Feature_HasMips64 | Feature_HasCnMips | Feature_NotInMicroMips | 0, // CINS_i32 = 877
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CLASS_D = 878
Feature_InMicroMips | Feature_HasMips32r6 | 0, // CLASS_D_MMR6 = 879
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CLASS_S = 880
Feature_InMicroMips | Feature_HasMips32r6 | 0, // CLASS_S_MMR6 = 881
Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_S_B = 882
Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_S_D = 883
Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_S_H = 884
Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_S_W = 885
Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_U_B = 886
Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_U_D = 887
Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_U_H = 888
Feature_HasStdEnc | Feature_HasMSA | 0, // CLEI_U_W = 889
Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_S_B = 890
Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_S_D = 891
Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_S_H = 892
Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_S_W = 893
Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_U_B = 894
Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_U_D = 895
Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_U_H = 896
Feature_HasStdEnc | Feature_HasMSA | 0, // CLE_U_W = 897
Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // CLO = 898
Feature_InMicroMips | 0, // CLO_MM = 899
Feature_InMicroMips | Feature_HasMips32r6 | 0, // CLO_MMR6 = 900
Feature_HasStdEnc | Feature_HasMips32r6 | 0, // CLO_R6 = 901
Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_S_B = 902
Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_S_D = 903
Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_S_H = 904
Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_S_W = 905
Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_U_B = 906
Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_U_D = 907
Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_U_H = 908
Feature_HasStdEnc | Feature_HasMSA | 0, // CLTI_U_W = 909
Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_S_B = 910
Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_S_D = 911
Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_S_H = 912
Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_S_W = 913
Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_U_B = 914
Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_U_D = 915
Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_U_H = 916
Feature_HasStdEnc | Feature_HasMSA | 0, // CLT_U_W = 917
Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // CLZ = 918
Feature_InMicroMips | 0, // CLZ_MM = 919
Feature_InMicroMips | Feature_HasMips32r6 | 0, // CLZ_MMR6 = 920
Feature_HasStdEnc | Feature_HasMips32r6 | 0, // CLZ_R6 = 921
Feature_HasDSPR2 | 0, // CMPGDU_EQ_QB = 922
Feature_InMicroMips | Feature_HasDSPR2 | 0, // CMPGDU_EQ_QB_MMR2 = 923
Feature_HasDSPR2 | 0, // CMPGDU_LE_QB = 924
Feature_InMicroMips | Feature_HasDSPR2 | 0, // CMPGDU_LE_QB_MMR2 = 925
Feature_HasDSPR2 | 0, // CMPGDU_LT_QB = 926
Feature_InMicroMips | Feature_HasDSPR2 | 0, // CMPGDU_LT_QB_MMR2 = 927
Feature_HasDSP | 0, // CMPGU_EQ_QB = 928
Feature_InMicroMips | Feature_HasDSP | 0, // CMPGU_EQ_QB_MM = 929
Feature_HasDSP | 0, // CMPGU_LE_QB = 930
Feature_InMicroMips | Feature_HasDSP | 0, // CMPGU_LE_QB_MM = 931
Feature_HasDSP | 0, // CMPGU_LT_QB = 932
Feature_InMicroMips | Feature_HasDSP | 0, // CMPGU_LT_QB_MM = 933
Feature_HasDSP | 0, // CMPU_EQ_QB = 934
Feature_InMicroMips | Feature_HasDSP | 0, // CMPU_EQ_QB_MM = 935
Feature_HasDSP | 0, // CMPU_LE_QB = 936
Feature_InMicroMips | Feature_HasDSP | 0, // CMPU_LE_QB_MM = 937
Feature_HasDSP | 0, // CMPU_LT_QB = 938
Feature_InMicroMips | Feature_HasDSP | 0, // CMPU_LT_QB_MM = 939
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_AF_D_MMR6 = 940
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_AF_S_MMR6 = 941
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_EQ_D = 942
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_EQ_D_MMR6 = 943
Feature_HasDSP | 0, // CMP_EQ_PH = 944
Feature_InMicroMips | Feature_HasDSP | 0, // CMP_EQ_PH_MM = 945
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_EQ_S = 946
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_EQ_S_MMR6 = 947
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_F_D = 948
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_F_S = 949
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_LE_D = 950
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_LE_D_MMR6 = 951
Feature_HasDSP | 0, // CMP_LE_PH = 952
Feature_InMicroMips | Feature_HasDSP | 0, // CMP_LE_PH_MM = 953
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_LE_S = 954
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_LE_S_MMR6 = 955
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_LT_D = 956
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_LT_D_MMR6 = 957
Feature_HasDSP | 0, // CMP_LT_PH = 958
Feature_InMicroMips | Feature_HasDSP | 0, // CMP_LT_PH_MM = 959
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_LT_S = 960
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_LT_S_MMR6 = 961
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SAF_D = 962
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SAF_D_MMR6 = 963
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SAF_S = 964
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SAF_S_MMR6 = 965
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SEQ_D = 966
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SEQ_D_MMR6 = 967
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SEQ_S = 968
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SEQ_S_MMR6 = 969
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SLE_D = 970
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SLE_D_MMR6 = 971
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SLE_S = 972
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SLE_S_MMR6 = 973
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SLT_D = 974
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SLT_D_MMR6 = 975
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SLT_S = 976
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SLT_S_MMR6 = 977
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SUEQ_D = 978
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SUEQ_D_MMR6 = 979
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SUEQ_S = 980
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SUEQ_S_MMR6 = 981
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SULE_D = 982
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SULE_D_MMR6 = 983
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SULE_S = 984
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SULE_S_MMR6 = 985
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SULT_D = 986
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SULT_D_MMR6 = 987
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SULT_S = 988
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SULT_S_MMR6 = 989
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SUN_D = 990
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SUN_D_MMR6 = 991
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_SUN_S = 992
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_SUN_S_MMR6 = 993
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_UEQ_D = 994
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_UEQ_D_MMR6 = 995
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_UEQ_S = 996
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_UEQ_S_MMR6 = 997
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_ULE_D = 998
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_ULE_D_MMR6 = 999
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_ULE_S = 1000
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_ULE_S_MMR6 = 1001
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_ULT_D = 1002
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_ULT_D_MMR6 = 1003
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_ULT_S = 1004
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_ULT_S_MMR6 = 1005
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_UN_D = 1006
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_UN_D_MMR6 = 1007
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CMP_UN_S = 1008
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CMP_UN_S_MMR6 = 1009
Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_S_B = 1010
Feature_HasStdEnc | Feature_HasMSA | Feature_HasMips64 | 0, // COPY_S_D = 1011
Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_S_H = 1012
Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_S_W = 1013
Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_U_B = 1014
Feature_HasStdEnc | Feature_HasMSA | 0, // COPY_U_H = 1015
Feature_HasStdEnc | Feature_HasMSA | Feature_HasMips64 | 0, // COPY_U_W = 1016
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32B = 1017
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32CB = 1018
Feature_HasStdEnc | Feature_HasMips64r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32CD = 1019
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32CH = 1020
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32CW = 1021
Feature_HasStdEnc | Feature_HasMips64r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32D = 1022
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32H = 1023
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasCRC | Feature_NotInMicroMips | 0, // CRC32W = 1024
Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CTC1 = 1025
Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // CTC1_MM = 1026
Feature_InMicroMips | 0, // CTC2_MM = 1027
Feature_HasStdEnc | Feature_HasMSA | 0, // CTCMSA = 1028
Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_D32_S = 1029
Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // CVT_D32_S_MM = 1030
Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_D32_W = 1031
Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // CVT_D32_W_MM = 1032
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips3_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_D64_L = 1033
Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_D64_S = 1034
Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // CVT_D64_S_MM = 1035
Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_D64_W = 1036
Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // CVT_D64_W_MM = 1037
Feature_InMicroMips | Feature_IsFP64bit | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CVT_D_L_MMR6 = 1038
Feature_HasStdEnc | Feature_HasMips3_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_L_D64 = 1039
Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // CVT_L_D64_MM = 1040
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CVT_L_D_MMR6 = 1041
Feature_HasStdEnc | Feature_HasMips3_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_L_S = 1042
Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // CVT_L_S_MM = 1043
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CVT_L_S_MMR6 = 1044
Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_S_D32 = 1045
Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // CVT_S_D32_MM = 1046
Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_S_D64 = 1047
Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // CVT_S_D64_MM = 1048
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips3_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_S_L = 1049
Feature_InMicroMips | Feature_IsFP64bit | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CVT_S_L_MMR6 = 1050
Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_S_W = 1051
Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // CVT_S_W_MM = 1052
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CVT_S_W_MMR6 = 1053
Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_W_D32 = 1054
Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // CVT_W_D32_MM = 1055
Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_W_D64 = 1056
Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // CVT_W_D64_MM = 1057
Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CVT_W_S = 1058
Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // CVT_W_S_MM = 1059
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // CVT_W_S_MMR6 = 1060
Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_EQ_D32 = 1061
Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_EQ_D32_MM = 1062
Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_EQ_D64 = 1063
Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_EQ_D64_MM = 1064
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_EQ_S = 1065
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_EQ_S_MM = 1066
Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_F_D32 = 1067
Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_F_D32_MM = 1068
Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_F_D64 = 1069
Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_F_D64_MM = 1070
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_F_S = 1071
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_F_S_MM = 1072
Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_LE_D32 = 1073
Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_LE_D32_MM = 1074
Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_LE_D64 = 1075
Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_LE_D64_MM = 1076
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_LE_S = 1077
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_LE_S_MM = 1078
Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_LT_D32 = 1079
Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_LT_D32_MM = 1080
Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_LT_D64 = 1081
Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_LT_D64_MM = 1082
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_LT_S = 1083
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_LT_S_MM = 1084
Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGE_D32 = 1085
Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGE_D32_MM = 1086
Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGE_D64 = 1087
Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGE_D64_MM = 1088
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGE_S = 1089
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGE_S_MM = 1090
Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGLE_D32 = 1091
Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGLE_D32_MM = 1092
Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGLE_D64 = 1093
Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGLE_D64_MM = 1094
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGLE_S = 1095
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGLE_S_MM = 1096
Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGL_D32 = 1097
Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGL_D32_MM = 1098
Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGL_D64 = 1099
Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGL_D64_MM = 1100
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGL_S = 1101
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGL_S_MM = 1102
Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGT_D32 = 1103
Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGT_D32_MM = 1104
Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGT_D64 = 1105
Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGT_D64_MM = 1106
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_NGT_S = 1107
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_NGT_S_MM = 1108
Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_OLE_D32 = 1109
Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_OLE_D32_MM = 1110
Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_OLE_D64 = 1111
Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_OLE_D64_MM = 1112
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_OLE_S = 1113
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_OLE_S_MM = 1114
Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_OLT_D32 = 1115
Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_OLT_D32_MM = 1116
Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_OLT_D64 = 1117
Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_OLT_D64_MM = 1118
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_OLT_S = 1119
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_OLT_S_MM = 1120
Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_SEQ_D32 = 1121
Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_SEQ_D32_MM = 1122
Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_SEQ_D64 = 1123
Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_SEQ_D64_MM = 1124
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_SEQ_S = 1125
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_SEQ_S_MM = 1126
Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_SF_D32 = 1127
Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_SF_D32_MM = 1128
Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_SF_D64 = 1129
Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_SF_D64_MM = 1130
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_SF_S = 1131
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_SF_S_MM = 1132
Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_UEQ_D32 = 1133
Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_UEQ_D32_MM = 1134
Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_UEQ_D64 = 1135
Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_UEQ_D64_MM = 1136
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_UEQ_S = 1137
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_UEQ_S_MM = 1138
Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_ULE_D32 = 1139
Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_ULE_D32_MM = 1140
Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_ULE_D64 = 1141
Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_ULE_D64_MM = 1142
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_ULE_S = 1143
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_ULE_S_MM = 1144
Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_ULT_D32 = 1145
Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_ULT_D32_MM = 1146
Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_ULT_D64 = 1147
Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_ULT_D64_MM = 1148
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_ULT_S = 1149
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_ULT_S_MM = 1150
Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_UN_D32 = 1151
Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_UN_D32_MM = 1152
Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_UN_D64 = 1153
Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_UN_D64_MM = 1154
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // C_UN_S = 1155
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // C_UN_S_MM = 1156
Feature_InMips16Mode | 0, // CmpRxRy16 = 1157
Feature_InMips16Mode | 0, // CmpiRxImm16 = 1158
Feature_InMips16Mode | 0, // CmpiRxImmX16 = 1159
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DADD = 1160
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // DADDi = 1161
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DADDiu = 1162
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DADDu = 1163
Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DAHI = 1164
Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DALIGN = 1165
Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DATI = 1166
Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DAUI = 1167
Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DBITSWAP = 1168
Feature_HasStdEnc | Feature_HasMips64 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DCLO = 1169
Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DCLO_R6 = 1170
Feature_HasStdEnc | Feature_HasMips64 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DCLZ = 1171
Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DCLZ_R6 = 1172
Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DDIV = 1173
Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DDIVU = 1174
Feature_HasStdEnc | Feature_HasMips32 | Feature_NotInMicroMips | 0, // DERET = 1175
Feature_InMicroMips | 0, // DERET_MM = 1176
Feature_InMicroMips | Feature_HasMips32r6 | 0, // DERET_MMR6 = 1177
Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DEXT = 1178
Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DEXT64_32 = 1179
Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DEXTM = 1180
Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DEXTU = 1181
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // DI = 1182
Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DINS = 1183
Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DINSM = 1184
Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DINSU = 1185
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // DIV = 1186
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // DIVU = 1187
Feature_InMicroMips | Feature_HasMips32r6 | 0, // DIVU_MMR6 = 1188
Feature_InMicroMips | Feature_HasMips32r6 | 0, // DIV_MMR6 = 1189
Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_S_B = 1190
Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_S_D = 1191
Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_S_H = 1192
Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_S_W = 1193
Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_U_B = 1194
Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_U_D = 1195
Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_U_H = 1196
Feature_HasStdEnc | Feature_HasMSA | 0, // DIV_U_W = 1197
Feature_InMicroMips | 0, // DI_MM = 1198
Feature_InMicroMips | Feature_HasMips32r6 | 0, // DI_MMR6 = 1199
Feature_HasStdEnc | Feature_HasMSA | Feature_HasMips64 | 0, // DLSA = 1200
Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DLSA_R6 = 1201
Feature_HasMips64 | 0, // DMFC0 = 1202
Feature_HasStdEnc | Feature_HasMips3 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // DMFC1 = 1203
Feature_HasMips64 | 0, // DMFC2 = 1204
Feature_HasCnMips | 0, // DMFC2_OCTEON = 1205
Feature_HasStdEnc | Feature_HasMips64r5 | Feature_HasVirt | 0, // DMFGC0 = 1206
Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DMOD = 1207
Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DMODU = 1208
Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // DMT = 1209
Feature_HasMips64 | 0, // DMTC0 = 1210
Feature_HasStdEnc | Feature_HasMips3 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // DMTC1 = 1211
Feature_HasMips64 | 0, // DMTC2 = 1212
Feature_HasCnMips | 0, // DMTC2_OCTEON = 1213
Feature_HasStdEnc | Feature_HasMips64r5 | Feature_HasVirt | 0, // DMTGC0 = 1214
Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DMUH = 1215
Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DMUHU = 1216
Feature_HasCnMips | 0, // DMUL = 1217
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DMULT = 1218
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DMULTu = 1219
Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DMULU = 1220
Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // DMUL_R6 = 1221
Feature_HasStdEnc | Feature_HasMSA | 0, // DOTP_S_D = 1222
Feature_HasStdEnc | Feature_HasMSA | 0, // DOTP_S_H = 1223
Feature_HasStdEnc | Feature_HasMSA | 0, // DOTP_S_W = 1224
Feature_HasStdEnc | Feature_HasMSA | 0, // DOTP_U_D = 1225
Feature_HasStdEnc | Feature_HasMSA | 0, // DOTP_U_H = 1226
Feature_HasStdEnc | Feature_HasMSA | 0, // DOTP_U_W = 1227
Feature_HasStdEnc | Feature_HasMSA | 0, // DPADD_S_D = 1228
Feature_HasStdEnc | Feature_HasMSA | 0, // DPADD_S_H = 1229
Feature_HasStdEnc | Feature_HasMSA | 0, // DPADD_S_W = 1230
Feature_HasStdEnc | Feature_HasMSA | 0, // DPADD_U_D = 1231
Feature_HasStdEnc | Feature_HasMSA | 0, // DPADD_U_H = 1232
Feature_HasStdEnc | Feature_HasMSA | 0, // DPADD_U_W = 1233
Feature_HasDSPR2 | 0, // DPAQX_SA_W_PH = 1234
Feature_InMicroMips | Feature_HasDSPR2 | 0, // DPAQX_SA_W_PH_MMR2 = 1235
Feature_HasDSPR2 | 0, // DPAQX_S_W_PH = 1236
Feature_InMicroMips | Feature_HasDSPR2 | 0, // DPAQX_S_W_PH_MMR2 = 1237
Feature_HasDSP | 0, // DPAQ_SA_L_W = 1238
Feature_InMicroMips | Feature_HasDSP | 0, // DPAQ_SA_L_W_MM = 1239
Feature_HasDSP | 0, // DPAQ_S_W_PH = 1240
Feature_InMicroMips | Feature_HasDSP | 0, // DPAQ_S_W_PH_MM = 1241
Feature_HasDSP | 0, // DPAU_H_QBL = 1242
Feature_InMicroMips | Feature_HasDSP | 0, // DPAU_H_QBL_MM = 1243
Feature_HasDSP | 0, // DPAU_H_QBR = 1244
Feature_InMicroMips | Feature_HasDSP | 0, // DPAU_H_QBR_MM = 1245
Feature_HasDSPR2 | 0, // DPAX_W_PH = 1246
Feature_InMicroMips | Feature_HasDSPR2 | 0, // DPAX_W_PH_MMR2 = 1247
Feature_HasDSPR2 | 0, // DPA_W_PH = 1248
Feature_InMicroMips | Feature_HasDSPR2 | 0, // DPA_W_PH_MMR2 = 1249
Feature_HasCnMips | 0, // DPOP = 1250
Feature_HasDSPR2 | 0, // DPSQX_SA_W_PH = 1251
Feature_InMicroMips | Feature_HasDSPR2 | 0, // DPSQX_SA_W_PH_MMR2 = 1252
Feature_HasDSPR2 | 0, // DPSQX_S_W_PH = 1253
Feature_InMicroMips | Feature_HasDSPR2 | 0, // DPSQX_S_W_PH_MMR2 = 1254
Feature_HasDSP | 0, // DPSQ_SA_L_W = 1255
Feature_InMicroMips | Feature_HasDSP | 0, // DPSQ_SA_L_W_MM = 1256
Feature_HasDSP | 0, // DPSQ_S_W_PH = 1257
Feature_InMicroMips | Feature_HasDSP | 0, // DPSQ_S_W_PH_MM = 1258
Feature_HasStdEnc | Feature_HasMSA | 0, // DPSUB_S_D = 1259
Feature_HasStdEnc | Feature_HasMSA | 0, // DPSUB_S_H = 1260
Feature_HasStdEnc | Feature_HasMSA | 0, // DPSUB_S_W = 1261
Feature_HasStdEnc | Feature_HasMSA | 0, // DPSUB_U_D = 1262
Feature_HasStdEnc | Feature_HasMSA | 0, // DPSUB_U_H = 1263
Feature_HasStdEnc | Feature_HasMSA | 0, // DPSUB_U_W = 1264
Feature_HasDSP | 0, // DPSU_H_QBL = 1265
Feature_InMicroMips | Feature_HasDSP | 0, // DPSU_H_QBL_MM = 1266
Feature_HasDSP | 0, // DPSU_H_QBR = 1267
Feature_InMicroMips | Feature_HasDSP | 0, // DPSU_H_QBR_MM = 1268
Feature_HasDSPR2 | 0, // DPSX_W_PH = 1269
Feature_InMicroMips | Feature_HasDSPR2 | 0, // DPSX_W_PH_MMR2 = 1270
Feature_HasDSPR2 | 0, // DPS_W_PH = 1271
Feature_InMicroMips | Feature_HasDSPR2 | 0, // DPS_W_PH_MMR2 = 1272
Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DROTR = 1273
Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DROTR32 = 1274
Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DROTRV = 1275
Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DSBH = 1276
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DSDIV = 1277
Feature_HasStdEnc | Feature_HasMips64r2 | Feature_NotInMicroMips | 0, // DSHD = 1278
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSLL = 1279
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSLL32 = 1280
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // DSLL64_32 = 1281
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSLLV = 1282
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSRA = 1283
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSRA32 = 1284
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSRAV = 1285
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSRL = 1286
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSRL32 = 1287
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSRLV = 1288
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSUB = 1289
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // DSUBu = 1290
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // DUDIV = 1291
Feature_HasStdEnc | Feature_HasMips32r6 | 0, // DVP = 1292
Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // DVPE = 1293
Feature_InMicroMips | Feature_HasMips32r6 | 0, // DVP_MMR6 = 1294
Feature_InMips16Mode | 0, // DivRxRy16 = 1295
Feature_InMips16Mode | 0, // DivuRxRy16 = 1296
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // EHB = 1297
Feature_InMicroMips | 0, // EHB_MM = 1298
Feature_InMicroMips | Feature_HasMips32r6 | 0, // EHB_MMR6 = 1299
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // EI = 1300
Feature_InMicroMips | 0, // EI_MM = 1301
Feature_InMicroMips | Feature_HasMips32r6 | 0, // EI_MMR6 = 1302
Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // EMT = 1303
Feature_HasStdEnc | Feature_HasMips3_32 | Feature_NotInMicroMips | 0, // ERET = 1304
Feature_HasStdEnc | Feature_HasMips32r5 | Feature_NotInMicroMips | 0, // ERETNC = 1305
Feature_InMicroMips | Feature_HasMips32r6 | 0, // ERETNC_MMR6 = 1306
Feature_InMicroMips | 0, // ERET_MM = 1307
Feature_InMicroMips | Feature_HasMips32r6 | 0, // ERET_MMR6 = 1308
Feature_HasStdEnc | Feature_HasMips32r6 | 0, // EVP = 1309
Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // EVPE = 1310
Feature_InMicroMips | Feature_HasMips32r6 | 0, // EVP_MMR6 = 1311
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // EXT = 1312
Feature_HasDSP | 0, // EXTP = 1313
Feature_HasDSP | 0, // EXTPDP = 1314
Feature_HasDSP | 0, // EXTPDPV = 1315
Feature_InMicroMips | Feature_HasDSP | 0, // EXTPDPV_MM = 1316
Feature_InMicroMips | Feature_HasDSP | 0, // EXTPDP_MM = 1317
Feature_HasDSP | 0, // EXTPV = 1318
Feature_InMicroMips | Feature_HasDSP | 0, // EXTPV_MM = 1319
Feature_InMicroMips | Feature_HasDSP | 0, // EXTP_MM = 1320
Feature_HasDSP | 0, // EXTRV_RS_W = 1321
Feature_InMicroMips | Feature_HasDSP | 0, // EXTRV_RS_W_MM = 1322
Feature_HasDSP | 0, // EXTRV_R_W = 1323
Feature_InMicroMips | Feature_HasDSP | 0, // EXTRV_R_W_MM = 1324
Feature_HasDSP | 0, // EXTRV_S_H = 1325
Feature_InMicroMips | Feature_HasDSP | 0, // EXTRV_S_H_MM = 1326
Feature_HasDSP | 0, // EXTRV_W = 1327
Feature_InMicroMips | Feature_HasDSP | 0, // EXTRV_W_MM = 1328
Feature_HasDSP | 0, // EXTR_RS_W = 1329
Feature_InMicroMips | Feature_HasDSP | 0, // EXTR_RS_W_MM = 1330
Feature_HasDSP | 0, // EXTR_R_W = 1331
Feature_InMicroMips | Feature_HasDSP | 0, // EXTR_R_W_MM = 1332
Feature_HasDSP | 0, // EXTR_S_H = 1333
Feature_InMicroMips | Feature_HasDSP | 0, // EXTR_S_H_MM = 1334
Feature_HasDSP | 0, // EXTR_W = 1335
Feature_InMicroMips | Feature_HasDSP | 0, // EXTR_W_MM = 1336
Feature_HasMips64 | Feature_HasCnMips | Feature_NotInMicroMips | 0, // EXTS = 1337
Feature_HasMips64 | Feature_HasCnMips | Feature_NotInMicroMips | 0, // EXTS32 = 1338
Feature_InMicroMips | Feature_NotMips32r6 | 0, // EXT_MM = 1339
Feature_InMicroMips | Feature_HasMips32r6 | 0, // EXT_MMR6 = 1340
Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FABS_D32 = 1341
Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FABS_D32_MM = 1342
Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FABS_D64 = 1343
Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FABS_D64_MM = 1344
Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FABS_S = 1345
Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FABS_S_MM = 1346
Feature_HasStdEnc | Feature_HasMSA | 0, // FADD_D = 1347
Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FADD_D32 = 1348
Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FADD_D32_MM = 1349
Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FADD_D64 = 1350
Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FADD_D64_MM = 1351
Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FADD_S = 1352
Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FADD_S_MM = 1353
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FADD_S_MMR6 = 1354
Feature_HasStdEnc | Feature_HasMSA | 0, // FADD_W = 1355
Feature_HasStdEnc | Feature_HasMSA | 0, // FCAF_D = 1356
Feature_HasStdEnc | Feature_HasMSA | 0, // FCAF_W = 1357
Feature_HasStdEnc | Feature_HasMSA | 0, // FCEQ_D = 1358
Feature_HasStdEnc | Feature_HasMSA | 0, // FCEQ_W = 1359
Feature_HasStdEnc | Feature_HasMSA | 0, // FCLASS_D = 1360
Feature_HasStdEnc | Feature_HasMSA | 0, // FCLASS_W = 1361
Feature_HasStdEnc | Feature_HasMSA | 0, // FCLE_D = 1362
Feature_HasStdEnc | Feature_HasMSA | 0, // FCLE_W = 1363
Feature_HasStdEnc | Feature_HasMSA | 0, // FCLT_D = 1364
Feature_HasStdEnc | Feature_HasMSA | 0, // FCLT_W = 1365
Feature_HasStdEnc | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FCMP_D32 = 1366
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // FCMP_D32_MM = 1367
Feature_HasStdEnc | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | 0, // FCMP_D64 = 1368
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FCMP_S32 = 1369
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // FCMP_S32_MM = 1370
Feature_HasStdEnc | Feature_HasMSA | 0, // FCNE_D = 1371
Feature_HasStdEnc | Feature_HasMSA | 0, // FCNE_W = 1372
Feature_HasStdEnc | Feature_HasMSA | 0, // FCOR_D = 1373
Feature_HasStdEnc | Feature_HasMSA | 0, // FCOR_W = 1374
Feature_HasStdEnc | Feature_HasMSA | 0, // FCUEQ_D = 1375
Feature_HasStdEnc | Feature_HasMSA | 0, // FCUEQ_W = 1376
Feature_HasStdEnc | Feature_HasMSA | 0, // FCULE_D = 1377
Feature_HasStdEnc | Feature_HasMSA | 0, // FCULE_W = 1378
Feature_HasStdEnc | Feature_HasMSA | 0, // FCULT_D = 1379
Feature_HasStdEnc | Feature_HasMSA | 0, // FCULT_W = 1380
Feature_HasStdEnc | Feature_HasMSA | 0, // FCUNE_D = 1381
Feature_HasStdEnc | Feature_HasMSA | 0, // FCUNE_W = 1382
Feature_HasStdEnc | Feature_HasMSA | 0, // FCUN_D = 1383
Feature_HasStdEnc | Feature_HasMSA | 0, // FCUN_W = 1384
Feature_HasStdEnc | Feature_HasMSA | 0, // FDIV_D = 1385
Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FDIV_D32 = 1386
Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FDIV_D32_MM = 1387
Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FDIV_D64 = 1388
Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FDIV_D64_MM = 1389
Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FDIV_S = 1390
Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FDIV_S_MM = 1391
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FDIV_S_MMR6 = 1392
Feature_HasStdEnc | Feature_HasMSA | 0, // FDIV_W = 1393
Feature_HasStdEnc | Feature_HasMSA | 0, // FEXDO_H = 1394
Feature_HasStdEnc | Feature_HasMSA | 0, // FEXDO_W = 1395
Feature_HasStdEnc | Feature_HasMSA | 0, // FEXP2_D = 1396
Feature_HasStdEnc | Feature_HasMSA | 0, // FEXP2_W = 1397
Feature_HasStdEnc | Feature_HasMSA | 0, // FEXUPL_D = 1398
Feature_HasStdEnc | Feature_HasMSA | 0, // FEXUPL_W = 1399
Feature_HasStdEnc | Feature_HasMSA | 0, // FEXUPR_D = 1400
Feature_HasStdEnc | Feature_HasMSA | 0, // FEXUPR_W = 1401
Feature_HasStdEnc | Feature_HasMSA | 0, // FFINT_S_D = 1402
Feature_HasStdEnc | Feature_HasMSA | 0, // FFINT_S_W = 1403
Feature_HasStdEnc | Feature_HasMSA | 0, // FFINT_U_D = 1404
Feature_HasStdEnc | Feature_HasMSA | 0, // FFINT_U_W = 1405
Feature_HasStdEnc | Feature_HasMSA | 0, // FFQL_D = 1406
Feature_HasStdEnc | Feature_HasMSA | 0, // FFQL_W = 1407
Feature_HasStdEnc | Feature_HasMSA | 0, // FFQR_D = 1408
Feature_HasStdEnc | Feature_HasMSA | 0, // FFQR_W = 1409
Feature_HasStdEnc | Feature_HasMSA | 0, // FILL_B = 1410
Feature_HasStdEnc | Feature_HasMSA | Feature_HasMips64 | 0, // FILL_D = 1411
Feature_HasStdEnc | Feature_HasMSA | 0, // FILL_H = 1412
Feature_HasStdEnc | Feature_HasMSA | 0, // FILL_W = 1413
Feature_HasStdEnc | Feature_HasMSA | 0, // FLOG2_D = 1414
Feature_HasStdEnc | Feature_HasMSA | 0, // FLOG2_W = 1415
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips3_32 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FLOOR_L_D64 = 1416
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FLOOR_L_D_MMR6 = 1417
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FLOOR_L_S = 1418
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FLOOR_L_S_MMR6 = 1419
Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FLOOR_W_D32 = 1420
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FLOOR_W_D64 = 1421
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FLOOR_W_D_MMR6 = 1422
Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FLOOR_W_MM = 1423
Feature_HasStdEnc | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FLOOR_W_S = 1424
Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FLOOR_W_S_MM = 1425
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FLOOR_W_S_MMR6 = 1426
Feature_HasStdEnc | Feature_HasMSA | 0, // FMADD_D = 1427
Feature_HasStdEnc | Feature_HasMSA | 0, // FMADD_W = 1428
Feature_HasStdEnc | Feature_HasMSA | 0, // FMAX_A_D = 1429
Feature_HasStdEnc | Feature_HasMSA | 0, // FMAX_A_W = 1430
Feature_HasStdEnc | Feature_HasMSA | 0, // FMAX_D = 1431
Feature_HasStdEnc | Feature_HasMSA | 0, // FMAX_W = 1432
Feature_HasStdEnc | Feature_HasMSA | 0, // FMIN_A_D = 1433
Feature_HasStdEnc | Feature_HasMSA | 0, // FMIN_A_W = 1434
Feature_HasStdEnc | Feature_HasMSA | 0, // FMIN_D = 1435
Feature_HasStdEnc | Feature_HasMSA | 0, // FMIN_W = 1436
Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FMOV_D32 = 1437
Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FMOV_D32_MM = 1438
Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FMOV_D64 = 1439
Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FMOV_D64_MM = 1440
Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FMOV_S = 1441
Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FMOV_S_MM = 1442
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FMOV_S_MMR6 = 1443
Feature_HasStdEnc | Feature_HasMSA | 0, // FMSUB_D = 1444
Feature_HasStdEnc | Feature_HasMSA | 0, // FMSUB_W = 1445
Feature_HasStdEnc | Feature_HasMSA | 0, // FMUL_D = 1446
Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FMUL_D32 = 1447
Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FMUL_D32_MM = 1448
Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FMUL_D64 = 1449
Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FMUL_D64_MM = 1450
Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FMUL_S = 1451
Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FMUL_S_MM = 1452
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FMUL_S_MMR6 = 1453
Feature_HasStdEnc | Feature_HasMSA | 0, // FMUL_W = 1454
Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FNEG_D32 = 1455
Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FNEG_D32_MM = 1456
Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FNEG_D64 = 1457
Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FNEG_D64_MM = 1458
Feature_HasStdEnc | Feature_IsNotSoftFloat | 0, // FNEG_S = 1459
Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FNEG_S_MM = 1460
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FNEG_S_MMR6 = 1461
Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // FORK = 1462
Feature_HasStdEnc | Feature_HasMSA | 0, // FRCP_D = 1463
Feature_HasStdEnc | Feature_HasMSA | 0, // FRCP_W = 1464
Feature_HasStdEnc | Feature_HasMSA | 0, // FRINT_D = 1465
Feature_HasStdEnc | Feature_HasMSA | 0, // FRINT_W = 1466
Feature_HasStdEnc | Feature_HasMSA | 0, // FRSQRT_D = 1467
Feature_HasStdEnc | Feature_HasMSA | 0, // FRSQRT_W = 1468
Feature_HasStdEnc | Feature_HasMSA | 0, // FSAF_D = 1469
Feature_HasStdEnc | Feature_HasMSA | 0, // FSAF_W = 1470
Feature_HasStdEnc | Feature_HasMSA | 0, // FSEQ_D = 1471
Feature_HasStdEnc | Feature_HasMSA | 0, // FSEQ_W = 1472
Feature_HasStdEnc | Feature_HasMSA | 0, // FSLE_D = 1473
Feature_HasStdEnc | Feature_HasMSA | 0, // FSLE_W = 1474
Feature_HasStdEnc | Feature_HasMSA | 0, // FSLT_D = 1475
Feature_HasStdEnc | Feature_HasMSA | 0, // FSLT_W = 1476
Feature_HasStdEnc | Feature_HasMSA | 0, // FSNE_D = 1477
Feature_HasStdEnc | Feature_HasMSA | 0, // FSNE_W = 1478
Feature_HasStdEnc | Feature_HasMSA | 0, // FSOR_D = 1479
Feature_HasStdEnc | Feature_HasMSA | 0, // FSOR_W = 1480
Feature_HasStdEnc | Feature_HasMSA | 0, // FSQRT_D = 1481
Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FSQRT_D32 = 1482
Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FSQRT_D32_MM = 1483
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FSQRT_D64 = 1484
Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FSQRT_D64_MM = 1485
Feature_HasStdEnc | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FSQRT_S = 1486
Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FSQRT_S_MM = 1487
Feature_HasStdEnc | Feature_HasMSA | 0, // FSQRT_W = 1488
Feature_HasStdEnc | Feature_HasMSA | 0, // FSUB_D = 1489
Feature_HasStdEnc | Feature_NotFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FSUB_D32 = 1490
Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // FSUB_D32_MM = 1491
Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FSUB_D64 = 1492
Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // FSUB_D64_MM = 1493
Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FSUB_S = 1494
Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // FSUB_S_MM = 1495
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // FSUB_S_MMR6 = 1496
Feature_HasStdEnc | Feature_HasMSA | 0, // FSUB_W = 1497
Feature_HasStdEnc | Feature_HasMSA | 0, // FSUEQ_D = 1498
Feature_HasStdEnc | Feature_HasMSA | 0, // FSUEQ_W = 1499
Feature_HasStdEnc | Feature_HasMSA | 0, // FSULE_D = 1500
Feature_HasStdEnc | Feature_HasMSA | 0, // FSULE_W = 1501
Feature_HasStdEnc | Feature_HasMSA | 0, // FSULT_D = 1502
Feature_HasStdEnc | Feature_HasMSA | 0, // FSULT_W = 1503
Feature_HasStdEnc | Feature_HasMSA | 0, // FSUNE_D = 1504
Feature_HasStdEnc | Feature_HasMSA | 0, // FSUNE_W = 1505
Feature_HasStdEnc | Feature_HasMSA | 0, // FSUN_D = 1506
Feature_HasStdEnc | Feature_HasMSA | 0, // FSUN_W = 1507
Feature_HasStdEnc | Feature_HasMSA | 0, // FTINT_S_D = 1508
Feature_HasStdEnc | Feature_HasMSA | 0, // FTINT_S_W = 1509
Feature_HasStdEnc | Feature_HasMSA | 0, // FTINT_U_D = 1510
Feature_HasStdEnc | Feature_HasMSA | 0, // FTINT_U_W = 1511
Feature_HasStdEnc | Feature_HasMSA | 0, // FTQ_H = 1512
Feature_HasStdEnc | Feature_HasMSA | 0, // FTQ_W = 1513
Feature_HasStdEnc | Feature_HasMSA | 0, // FTRUNC_S_D = 1514
Feature_HasStdEnc | Feature_HasMSA | 0, // FTRUNC_S_W = 1515
Feature_HasStdEnc | Feature_HasMSA | 0, // FTRUNC_U_D = 1516
Feature_HasStdEnc | Feature_HasMSA | 0, // FTRUNC_U_W = 1517
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasGINV | Feature_NotInMicroMips | 0, // GINVI = 1518
Feature_InMicroMips | Feature_HasMips32r6 | Feature_HasGINV | 0, // GINVI_MMR6 = 1519
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_HasGINV | Feature_NotInMicroMips | 0, // GINVT = 1520
Feature_InMicroMips | Feature_HasMips32r6 | Feature_HasGINV | 0, // GINVT_MMR6 = 1521
Feature_HasStdEnc | Feature_HasMSA | 0, // HADD_S_D = 1522
Feature_HasStdEnc | Feature_HasMSA | 0, // HADD_S_H = 1523
Feature_HasStdEnc | Feature_HasMSA | 0, // HADD_S_W = 1524
Feature_HasStdEnc | Feature_HasMSA | 0, // HADD_U_D = 1525
Feature_HasStdEnc | Feature_HasMSA | 0, // HADD_U_H = 1526
Feature_HasStdEnc | Feature_HasMSA | 0, // HADD_U_W = 1527
Feature_HasStdEnc | Feature_HasMSA | 0, // HSUB_S_D = 1528
Feature_HasStdEnc | Feature_HasMSA | 0, // HSUB_S_H = 1529
Feature_HasStdEnc | Feature_HasMSA | 0, // HSUB_S_W = 1530
Feature_HasStdEnc | Feature_HasMSA | 0, // HSUB_U_D = 1531
Feature_HasStdEnc | Feature_HasMSA | 0, // HSUB_U_H = 1532
Feature_HasStdEnc | Feature_HasMSA | 0, // HSUB_U_W = 1533
Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // HYPCALL = 1534
Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // HYPCALL_MM = 1535
Feature_HasStdEnc | Feature_HasMSA | 0, // ILVEV_B = 1536
Feature_HasStdEnc | Feature_HasMSA | 0, // ILVEV_D = 1537
Feature_HasStdEnc | Feature_HasMSA | 0, // ILVEV_H = 1538
Feature_HasStdEnc | Feature_HasMSA | 0, // ILVEV_W = 1539
Feature_HasStdEnc | Feature_HasMSA | 0, // ILVL_B = 1540
Feature_HasStdEnc | Feature_HasMSA | 0, // ILVL_D = 1541
Feature_HasStdEnc | Feature_HasMSA | 0, // ILVL_H = 1542
Feature_HasStdEnc | Feature_HasMSA | 0, // ILVL_W = 1543
Feature_HasStdEnc | Feature_HasMSA | 0, // ILVOD_B = 1544
Feature_HasStdEnc | Feature_HasMSA | 0, // ILVOD_D = 1545
Feature_HasStdEnc | Feature_HasMSA | 0, // ILVOD_H = 1546
Feature_HasStdEnc | Feature_HasMSA | 0, // ILVOD_W = 1547
Feature_HasStdEnc | Feature_HasMSA | 0, // ILVR_B = 1548
Feature_HasStdEnc | Feature_HasMSA | 0, // ILVR_D = 1549
Feature_HasStdEnc | Feature_HasMSA | 0, // ILVR_H = 1550
Feature_HasStdEnc | Feature_HasMSA | 0, // ILVR_W = 1551
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // INS = 1552
Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_B = 1553
Feature_HasStdEnc | Feature_HasMSA | Feature_HasMips64 | 0, // INSERT_D = 1554
Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_H = 1555
Feature_HasStdEnc | Feature_HasMSA | 0, // INSERT_W = 1556
Feature_HasDSP | 0, // INSV = 1557
Feature_HasStdEnc | Feature_HasMSA | 0, // INSVE_B = 1558
Feature_HasStdEnc | Feature_HasMSA | 0, // INSVE_D = 1559
Feature_HasStdEnc | Feature_HasMSA | 0, // INSVE_H = 1560
Feature_HasStdEnc | Feature_HasMSA | 0, // INSVE_W = 1561
Feature_InMicroMips | Feature_HasDSP | 0, // INSV_MM = 1562
Feature_InMicroMips | Feature_NotMips32r6 | 0, // INS_MM = 1563
Feature_InMicroMips | Feature_HasMips32r6 | 0, // INS_MMR6 = 1564
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // J = 1565
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // JAL = 1566
Feature_HasStdEnc | Feature_NotInMicroMips | Feature_NoIndirectJumpGuards | 0, // JALR = 1567
Feature_InMicroMips | Feature_NotMips32r6 | 0, // JALR16_MM = 1568
Feature_NotInMips16Mode | 0, // JALR64 = 1569
Feature_InMicroMips | Feature_HasMips32r6 | 0, // JALRC16_MMR6 = 1570
Feature_InMicroMips | Feature_HasMips32r6 | 0, // JALRC_HB_MMR6 = 1571
Feature_InMicroMips | Feature_HasMips32r6 | 0, // JALRC_MMR6 = 1572
Feature_InMicroMips | Feature_NotMips32r6 | 0, // JALRS16_MM = 1573
Feature_InMicroMips | Feature_NotMips32r6 | 0, // JALRS_MM = 1574
Feature_HasStdEnc | Feature_HasMips32 | 0, // JALR_HB = 1575
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // JALR_HB64 = 1576
Feature_InMicroMips | Feature_NotMips32r6 | 0, // JALR_MM = 1577
Feature_InMicroMips | Feature_NotMips32r6 | 0, // JALS_MM = 1578
Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // JALX = 1579
Feature_InMicroMips | Feature_NotMips32r6 | 0, // JALX_MM = 1580
Feature_InMicroMips | Feature_NotMips32r6 | 0, // JAL_MM = 1581
Feature_HasStdEnc | Feature_HasMips32r6 | 0, // JIALC = 1582
Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // JIALC64 = 1583
Feature_InMicroMips | Feature_HasMips32r6 | 0, // JIALC_MMR6 = 1584
Feature_HasStdEnc | Feature_HasMips32r6 | 0, // JIC = 1585
Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips64r6 | 0, // JIC64 = 1586
Feature_InMicroMips | Feature_HasMips32r6 | 0, // JIC_MMR6 = 1587
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // JR = 1588
Feature_InMicroMips | Feature_NotMips32r6 | 0, // JR16_MM = 1589
Feature_NotInMips16Mode | Feature_IsPTR64bit | Feature_NotInMicroMips | 0, // JR64 = 1590
Feature_InMicroMips | Feature_NotMips32r6 | 0, // JRADDIUSP = 1591
Feature_InMicroMips | Feature_NotMips32r6 | 0, // JRC16_MM = 1592
Feature_InMicroMips | Feature_HasMips32r6 | 0, // JRC16_MMR6 = 1593
Feature_InMicroMips | Feature_HasMips32r6 | 0, // JRCADDIUSP_MMR6 = 1594
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // JR_HB = 1595
Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // JR_HB64 = 1596
Feature_HasStdEnc | Feature_HasMips32r6 | 0, // JR_HB64_R6 = 1597
Feature_HasStdEnc | Feature_HasMips32r6 | 0, // JR_HB_R6 = 1598
Feature_InMicroMips | Feature_NotMips32r6 | 0, // JR_MM = 1599
Feature_InMicroMips | Feature_NotMips32r6 | 0, // J_MM = 1600
Feature_InMips16Mode | 0, // Jal16 = 1601
Feature_InMips16Mode | 0, // JalB16 = 1602
Feature_InMips16Mode | 0, // JrRa16 = 1603
Feature_InMips16Mode | 0, // JrcRa16 = 1604
Feature_InMips16Mode | 0, // JrcRx16 = 1605
Feature_InMips16Mode | 0, // JumpLinkReg16 = 1606
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LB = 1607
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LB64 = 1608
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LBE = 1609
Feature_InMicroMips | Feature_HasEVA | 0, // LBE_MM = 1610
Feature_InMicroMips | 0, // LBU16_MM = 1611
Feature_HasDSP | 0, // LBUX = 1612
Feature_InMicroMips | Feature_HasDSP | 0, // LBUX_MM = 1613
Feature_InMicroMips | Feature_HasMips32r6 | 0, // LBU_MMR6 = 1614
Feature_InMicroMips | 0, // LB_MM = 1615
Feature_InMicroMips | Feature_HasMips32r6 | 0, // LB_MMR6 = 1616
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LBu = 1617
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LBu64 = 1618
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LBuE = 1619
Feature_InMicroMips | Feature_HasEVA | 0, // LBuE_MM = 1620
Feature_InMicroMips | 0, // LBu_MM = 1621
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // LD = 1622
Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // LDC1 = 1623
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // LDC164 = 1624
Feature_InMicroMips | Feature_IsFP64bit | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // LDC1_D64_MMR6 = 1625
Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // LDC1_MM = 1626
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LDC2 = 1627
Feature_InMicroMips | Feature_HasMips32r6 | 0, // LDC2_MMR6 = 1628
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // LDC2_R6 = 1629
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotCnMips | Feature_NotInMicroMips | 0, // LDC3 = 1630
Feature_HasStdEnc | Feature_HasMSA | 0, // LDI_B = 1631
Feature_HasStdEnc | Feature_HasMSA | 0, // LDI_D = 1632
Feature_HasStdEnc | Feature_HasMSA | 0, // LDI_H = 1633
Feature_HasStdEnc | Feature_HasMSA | 0, // LDI_W = 1634
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // LDL = 1635
Feature_HasStdEnc | Feature_HasMips64r6 | 0, // LDPC = 1636
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // LDR = 1637
Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // LDXC1 = 1638
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | 0, // LDXC164 = 1639
Feature_HasStdEnc | Feature_HasMSA | 0, // LD_B = 1640
Feature_HasStdEnc | Feature_HasMSA | 0, // LD_D = 1641
Feature_HasStdEnc | Feature_HasMSA | 0, // LD_H = 1642
Feature_HasStdEnc | Feature_HasMSA | 0, // LD_W = 1643
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LEA_ADDiu = 1644
Feature_NotInMips16Mode | Feature_IsGP64bit | Feature_NotInMicroMips | 0, // LEA_ADDiu64 = 1645
Feature_InMicroMips | 0, // LEA_ADDiu_MM = 1646
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LH = 1647
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LH64 = 1648
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LHE = 1649
Feature_InMicroMips | Feature_HasEVA | 0, // LHE_MM = 1650
Feature_InMicroMips | 0, // LHU16_MM = 1651
Feature_HasDSP | 0, // LHX = 1652
Feature_InMicroMips | Feature_HasDSP | 0, // LHX_MM = 1653
Feature_InMicroMips | 0, // LH_MM = 1654
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LHu = 1655
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LHu64 = 1656
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LHuE = 1657
Feature_InMicroMips | Feature_HasEVA | 0, // LHuE_MM = 1658
Feature_InMicroMips | 0, // LHu_MM = 1659
Feature_InMicroMips | Feature_NotMips32r6 | 0, // LI16_MM = 1660
Feature_InMicroMips | Feature_HasMips32r6 | 0, // LI16_MMR6 = 1661
Feature_HasStdEnc | Feature_IsPTR32bit | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LL = 1662
Feature_HasStdEnc | Feature_IsPTR64bit | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LL64 = 1663
Feature_HasStdEnc | Feature_IsPTR64bit | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // LL64_R6 = 1664
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LLD = 1665
Feature_HasStdEnc | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // LLD_R6 = 1666
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LLE = 1667
Feature_InMicroMips | Feature_HasEVA | 0, // LLE_MM = 1668
Feature_InMicroMips | Feature_NotMips32r6 | 0, // LL_MM = 1669
Feature_InMicroMips | Feature_HasMips32r6 | 0, // LL_MMR6 = 1670
Feature_HasStdEnc | Feature_IsPTR32bit | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // LL_R6 = 1671
Feature_HasStdEnc | Feature_HasMSA | 0, // LSA = 1672
Feature_InMicroMips | Feature_HasMips32r6 | 0, // LSA_MMR6 = 1673
Feature_HasStdEnc | Feature_HasMips32r6 | 0, // LSA_R6 = 1674
Feature_InMicroMips | Feature_HasMips32r6 | 0, // LUI_MMR6 = 1675
Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips5_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // LUXC1 = 1676
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips5_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // LUXC164 = 1677
Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // LUXC1_MM = 1678
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LUi = 1679
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LUi64 = 1680
Feature_InMicroMips | Feature_NotMips32r6 | 0, // LUi_MM = 1681
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // LW = 1682
Feature_InMicroMips | 0, // LW16_MM = 1683
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LW64 = 1684
Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // LWC1 = 1685
Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // LWC1_MM = 1686
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LWC2 = 1687
Feature_InMicroMips | Feature_HasMips32r6 | 0, // LWC2_MMR6 = 1688
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // LWC2_R6 = 1689
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotCnMips | Feature_NotInMicroMips | 0, // LWC3 = 1690
Feature_NotInMips16Mode | Feature_HasDSP | 0, // LWDSP = 1691
Feature_InMicroMips | Feature_HasDSP | 0, // LWDSP_MM = 1692
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LWE = 1693
Feature_InMicroMips | Feature_HasEVA | 0, // LWE_MM = 1694
Feature_InMicroMips | 0, // LWGP_MM = 1695
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LWL = 1696
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LWL64 = 1697
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LWLE = 1698
Feature_InMicroMips | Feature_NotMips32r6 | Feature_HasEVA | 0, // LWLE_MM = 1699
Feature_InMicroMips | Feature_NotMips32r6 | 0, // LWL_MM = 1700
Feature_InMicroMips | Feature_NotMips32r6 | 0, // LWM16_MM = 1701
Feature_InMicroMips | Feature_HasMips32r6 | 0, // LWM16_MMR6 = 1702
Feature_InMicroMips | 0, // LWM32_MM = 1703
Feature_HasStdEnc | Feature_HasMips32r6 | 0, // LWPC = 1704
Feature_InMicroMips | Feature_HasMips32r6 | 0, // LWPC_MMR6 = 1705
Feature_InMicroMips | 0, // LWP_MM = 1706
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // LWR = 1707
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // LWR64 = 1708
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_HasEVA | Feature_NotInMicroMips | 0, // LWRE = 1709
Feature_InMicroMips | Feature_NotMips32r6 | Feature_HasEVA | 0, // LWRE_MM = 1710
Feature_InMicroMips | Feature_NotMips32r6 | 0, // LWR_MM = 1711
Feature_InMicroMips | 0, // LWSP_MM = 1712
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // LWUPC = 1713
Feature_InMicroMips | Feature_NotMips32r6 | 0, // LWU_MM = 1714
Feature_HasDSP | 0, // LWX = 1715
Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | 0, // LWXC1 = 1716
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // LWXC1_MM = 1717
Feature_InMicroMips | 0, // LWXS_MM = 1718
Feature_InMicroMips | Feature_HasDSP | 0, // LWX_MM = 1719
Feature_InMicroMips | 0, // LW_MM = 1720
Feature_InMicroMips | Feature_HasMips32r6 | 0, // LW_MMR6 = 1721
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // LWu = 1722
Feature_InMips16Mode | 0, // LbRxRyOffMemX16 = 1723
Feature_InMips16Mode | 0, // LbuRxRyOffMemX16 = 1724
Feature_InMips16Mode | 0, // LhRxRyOffMemX16 = 1725
Feature_InMips16Mode | 0, // LhuRxRyOffMemX16 = 1726
Feature_InMips16Mode | 0, // LiRxImm16 = 1727
Feature_InMips16Mode | 0, // LiRxImmAlignX16 = 1728
Feature_InMips16Mode | 0, // LiRxImmX16 = 1729
Feature_InMips16Mode | 0, // LwRxPcTcp16 = 1730
Feature_InMips16Mode | 0, // LwRxPcTcpX16 = 1731
Feature_InMips16Mode | 0, // LwRxRyOffMemX16 = 1732
Feature_InMips16Mode | 0, // LwRxSpImmX16 = 1733
Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MADD = 1734
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MADDF_D = 1735
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MADDF_D_MMR6 = 1736
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MADDF_S = 1737
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MADDF_S_MMR6 = 1738
Feature_HasStdEnc | Feature_HasMSA | 0, // MADDR_Q_H = 1739
Feature_HasStdEnc | Feature_HasMSA | 0, // MADDR_Q_W = 1740
Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MADDU = 1741
Feature_HasDSP | 0, // MADDU_DSP = 1742
Feature_InMicroMips | Feature_HasDSP | 0, // MADDU_DSP_MM = 1743
Feature_InMicroMips | Feature_NotMips32r6 | 0, // MADDU_MM = 1744
Feature_HasStdEnc | Feature_HasMSA | 0, // MADDV_B = 1745
Feature_HasStdEnc | Feature_HasMSA | 0, // MADDV_D = 1746
Feature_HasStdEnc | Feature_HasMSA | 0, // MADDV_H = 1747
Feature_HasStdEnc | Feature_HasMSA | 0, // MADDV_W = 1748
Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | Feature_HasMadd4 | 0, // MADD_D32 = 1749
Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // MADD_D32_MM = 1750
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | Feature_HasMadd4 | 0, // MADD_D64 = 1751
Feature_HasDSP | 0, // MADD_DSP = 1752
Feature_InMicroMips | Feature_HasDSP | 0, // MADD_DSP_MM = 1753
Feature_InMicroMips | Feature_NotMips32r6 | 0, // MADD_MM = 1754
Feature_HasStdEnc | Feature_HasMSA | 0, // MADD_Q_H = 1755
Feature_HasStdEnc | Feature_HasMSA | 0, // MADD_Q_W = 1756
Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | Feature_HasMadd4 | 0, // MADD_S = 1757
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // MADD_S_MM = 1758
Feature_HasDSP | 0, // MAQ_SA_W_PHL = 1759
Feature_InMicroMips | Feature_HasDSP | 0, // MAQ_SA_W_PHL_MM = 1760
Feature_HasDSP | 0, // MAQ_SA_W_PHR = 1761
Feature_InMicroMips | Feature_HasDSP | 0, // MAQ_SA_W_PHR_MM = 1762
Feature_HasDSP | 0, // MAQ_S_W_PHL = 1763
Feature_InMicroMips | Feature_HasDSP | 0, // MAQ_S_W_PHL_MM = 1764
Feature_HasDSP | 0, // MAQ_S_W_PHR = 1765
Feature_InMicroMips | Feature_HasDSP | 0, // MAQ_S_W_PHR_MM = 1766
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MAXA_D = 1767
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MAXA_D_MMR6 = 1768
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MAXA_S = 1769
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MAXA_S_MMR6 = 1770
Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_S_B = 1771
Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_S_D = 1772
Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_S_H = 1773
Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_S_W = 1774
Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_U_B = 1775
Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_U_D = 1776
Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_U_H = 1777
Feature_HasStdEnc | Feature_HasMSA | 0, // MAXI_U_W = 1778
Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_A_B = 1779
Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_A_D = 1780
Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_A_H = 1781
Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_A_W = 1782
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MAX_D = 1783
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MAX_D_MMR6 = 1784
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MAX_S = 1785
Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_S_B = 1786
Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_S_D = 1787
Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_S_H = 1788
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MAX_S_MMR6 = 1789
Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_S_W = 1790
Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_U_B = 1791
Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_U_D = 1792
Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_U_H = 1793
Feature_HasStdEnc | Feature_HasMSA | 0, // MAX_U_W = 1794
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // MFC0 = 1795
Feature_InMicroMips | Feature_HasMips32r6 | 0, // MFC0_MMR6 = 1796
Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MFC1 = 1797
Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MFC1_D64 = 1798
Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // MFC1_MM = 1799
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MFC1_MMR6 = 1800
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // MFC2 = 1801
Feature_InMicroMips | Feature_HasMips32r6 | 0, // MFC2_MMR6 = 1802
Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // MFGC0 = 1803
Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // MFGC0_MM = 1804
Feature_InMicroMips | Feature_HasMips32r6 | 0, // MFHC0_MMR6 = 1805
Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MFHC1_D32 = 1806
Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // MFHC1_D32_MM = 1807
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MFHC1_D64 = 1808
Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // MFHC1_D64_MM = 1809
Feature_InMicroMips | Feature_HasMips32r6 | 0, // MFHC2_MMR6 = 1810
Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // MFHGC0 = 1811
Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // MFHGC0_MM = 1812
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MFHI = 1813
Feature_InMicroMips | Feature_NotMips32r6 | 0, // MFHI16_MM = 1814
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MFHI64 = 1815
Feature_HasDSP | 0, // MFHI_DSP = 1816
Feature_InMicroMips | Feature_HasDSP | 0, // MFHI_DSP_MM = 1817
Feature_InMicroMips | Feature_NotMips32r6 | 0, // MFHI_MM = 1818
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MFLO = 1819
Feature_InMicroMips | Feature_NotMips32r6 | 0, // MFLO16_MM = 1820
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MFLO64 = 1821
Feature_HasDSP | 0, // MFLO_DSP = 1822
Feature_InMicroMips | Feature_HasDSP | 0, // MFLO_DSP_MM = 1823
Feature_InMicroMips | Feature_NotMips32r6 | 0, // MFLO_MM = 1824
Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // MFTR = 1825
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MINA_D = 1826
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MINA_D_MMR6 = 1827
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MINA_S = 1828
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MINA_S_MMR6 = 1829
Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_S_B = 1830
Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_S_D = 1831
Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_S_H = 1832
Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_S_W = 1833
Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_U_B = 1834
Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_U_D = 1835
Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_U_H = 1836
Feature_HasStdEnc | Feature_HasMSA | 0, // MINI_U_W = 1837
Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_A_B = 1838
Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_A_D = 1839
Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_A_H = 1840
Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_A_W = 1841
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MIN_D = 1842
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MIN_D_MMR6 = 1843
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MIN_S = 1844
Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_S_B = 1845
Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_S_D = 1846
Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_S_H = 1847
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MIN_S_MMR6 = 1848
Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_S_W = 1849
Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_U_B = 1850
Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_U_D = 1851
Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_U_H = 1852
Feature_HasStdEnc | Feature_HasMSA | 0, // MIN_U_W = 1853
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // MOD = 1854
Feature_HasDSP | 0, // MODSUB = 1855
Feature_InMicroMips | Feature_HasDSP | 0, // MODSUB_MM = 1856
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // MODU = 1857
Feature_InMicroMips | Feature_HasMips32r6 | 0, // MODU_MMR6 = 1858
Feature_InMicroMips | Feature_HasMips32r6 | 0, // MOD_MMR6 = 1859
Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_S_B = 1860
Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_S_D = 1861
Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_S_H = 1862
Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_S_W = 1863
Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_U_B = 1864
Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_U_D = 1865
Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_U_H = 1866
Feature_HasStdEnc | Feature_HasMSA | 0, // MOD_U_W = 1867
Feature_InMicroMips | Feature_NotMips32r6 | 0, // MOVE16_MM = 1868
Feature_InMicroMips | Feature_HasMips32r6 | 0, // MOVE16_MMR6 = 1869
Feature_InMicroMips | Feature_NotMips32r6 | 0, // MOVEP_MM = 1870
Feature_InMicroMips | Feature_HasMips32r6 | 0, // MOVEP_MMR6 = 1871
Feature_HasStdEnc | Feature_HasMSA | 0, // MOVE_V = 1872
Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVF_D32 = 1873
Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVF_D32_MM = 1874
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVF_D64 = 1875
Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVF_I = 1876
Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVF_I64 = 1877
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVF_I_MM = 1878
Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVF_S = 1879
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVF_S_MM = 1880
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVN_I64_D64 = 1881
Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVN_I64_I = 1882
Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVN_I64_I64 = 1883
Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVN_I64_S = 1884
Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVN_I_D32 = 1885
Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVN_I_D32_MM = 1886
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVN_I_D64 = 1887
Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVN_I_I = 1888
Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVN_I_I64 = 1889
Feature_InMicroMips | Feature_NotMips32r6 | 0, // MOVN_I_MM = 1890
Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVN_I_S = 1891
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVN_I_S_MM = 1892
Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVT_D32 = 1893
Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVT_D32_MM = 1894
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVT_D64 = 1895
Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVT_I = 1896
Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVT_I64 = 1897
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVT_I_MM = 1898
Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVT_S = 1899
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVT_S_MM = 1900
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVZ_I64_D64 = 1901
Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVZ_I64_I = 1902
Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVZ_I64_I64 = 1903
Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVZ_I64_S = 1904
Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVZ_I_D32 = 1905
Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVZ_I_D32_MM = 1906
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVZ_I_D64 = 1907
Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVZ_I_I = 1908
Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MOVZ_I_I64 = 1909
Feature_InMicroMips | Feature_NotMips32r6 | 0, // MOVZ_I_MM = 1910
Feature_HasStdEnc | Feature_HasMips4_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MOVZ_I_S = 1911
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // MOVZ_I_S_MM = 1912
Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MSUB = 1913
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MSUBF_D = 1914
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MSUBF_D_MMR6 = 1915
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MSUBF_S = 1916
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MSUBF_S_MMR6 = 1917
Feature_HasStdEnc | Feature_HasMSA | 0, // MSUBR_Q_H = 1918
Feature_HasStdEnc | Feature_HasMSA | 0, // MSUBR_Q_W = 1919
Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MSUBU = 1920
Feature_HasDSP | 0, // MSUBU_DSP = 1921
Feature_InMicroMips | Feature_HasDSP | 0, // MSUBU_DSP_MM = 1922
Feature_InMicroMips | Feature_NotMips32r6 | 0, // MSUBU_MM = 1923
Feature_HasStdEnc | Feature_HasMSA | 0, // MSUBV_B = 1924
Feature_HasStdEnc | Feature_HasMSA | 0, // MSUBV_D = 1925
Feature_HasStdEnc | Feature_HasMSA | 0, // MSUBV_H = 1926
Feature_HasStdEnc | Feature_HasMSA | 0, // MSUBV_W = 1927
Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | Feature_HasMadd4 | 0, // MSUB_D32 = 1928
Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // MSUB_D32_MM = 1929
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | Feature_HasMadd4 | 0, // MSUB_D64 = 1930
Feature_HasDSP | 0, // MSUB_DSP = 1931
Feature_InMicroMips | Feature_HasDSP | 0, // MSUB_DSP_MM = 1932
Feature_InMicroMips | Feature_NotMips32r6 | 0, // MSUB_MM = 1933
Feature_HasStdEnc | Feature_HasMSA | 0, // MSUB_Q_H = 1934
Feature_HasStdEnc | Feature_HasMSA | 0, // MSUB_Q_W = 1935
Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | Feature_HasMadd4 | 0, // MSUB_S = 1936
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // MSUB_S_MM = 1937
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // MTC0 = 1938
Feature_InMicroMips | Feature_HasMips32r6 | 0, // MTC0_MMR6 = 1939
Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MTC1 = 1940
Feature_HasStdEnc | Feature_IsFP64bit | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MTC1_D64 = 1941
Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // MTC1_MM = 1942
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // MTC1_MMR6 = 1943
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // MTC2 = 1944
Feature_InMicroMips | Feature_HasMips32r6 | 0, // MTC2_MMR6 = 1945
Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // MTGC0 = 1946
Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // MTGC0_MM = 1947
Feature_InMicroMips | Feature_HasMips32r6 | 0, // MTHC0_MMR6 = 1948
Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MTHC1_D32 = 1949
Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // MTHC1_D32_MM = 1950
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // MTHC1_D64 = 1951
Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // MTHC1_D64_MM = 1952
Feature_InMicroMips | Feature_HasMips32r6 | 0, // MTHC2_MMR6 = 1953
Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // MTHGC0 = 1954
Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // MTHGC0_MM = 1955
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MTHI = 1956
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MTHI64 = 1957
Feature_HasDSP | 0, // MTHI_DSP = 1958
Feature_InMicroMips | Feature_HasDSP | 0, // MTHI_DSP_MM = 1959
Feature_InMicroMips | Feature_NotMips32r6 | 0, // MTHI_MM = 1960
Feature_HasDSP | 0, // MTHLIP = 1961
Feature_InMicroMips | Feature_HasDSP | 0, // MTHLIP_MM = 1962
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MTLO = 1963
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // MTLO64 = 1964
Feature_HasDSP | 0, // MTLO_DSP = 1965
Feature_InMicroMips | Feature_HasDSP | 0, // MTLO_DSP_MM = 1966
Feature_InMicroMips | Feature_NotMips32r6 | 0, // MTLO_MM = 1967
Feature_HasCnMips | 0, // MTM0 = 1968
Feature_HasCnMips | 0, // MTM1 = 1969
Feature_HasCnMips | 0, // MTM2 = 1970
Feature_HasCnMips | 0, // MTP0 = 1971
Feature_HasCnMips | 0, // MTP1 = 1972
Feature_HasCnMips | 0, // MTP2 = 1973
Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // MTTR = 1974
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // MUH = 1975
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // MUHU = 1976
Feature_InMicroMips | Feature_HasMips32r6 | 0, // MUHU_MMR6 = 1977
Feature_InMicroMips | Feature_HasMips32r6 | 0, // MUH_MMR6 = 1978
Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MUL = 1979
Feature_HasDSP | 0, // MULEQ_S_W_PHL = 1980
Feature_InMicroMips | Feature_HasDSP | 0, // MULEQ_S_W_PHL_MM = 1981
Feature_HasDSP | 0, // MULEQ_S_W_PHR = 1982
Feature_InMicroMips | Feature_HasDSP | 0, // MULEQ_S_W_PHR_MM = 1983
Feature_HasDSP | 0, // MULEU_S_PH_QBL = 1984
Feature_InMicroMips | Feature_HasDSP | 0, // MULEU_S_PH_QBL_MM = 1985
Feature_HasDSP | 0, // MULEU_S_PH_QBR = 1986
Feature_InMicroMips | Feature_HasDSP | 0, // MULEU_S_PH_QBR_MM = 1987
Feature_HasDSP | 0, // MULQ_RS_PH = 1988
Feature_InMicroMips | Feature_HasDSP | 0, // MULQ_RS_PH_MM = 1989
Feature_HasDSPR2 | 0, // MULQ_RS_W = 1990
Feature_InMicroMips | Feature_HasDSPR2 | 0, // MULQ_RS_W_MMR2 = 1991
Feature_HasDSPR2 | 0, // MULQ_S_PH = 1992
Feature_InMicroMips | Feature_HasDSPR2 | 0, // MULQ_S_PH_MMR2 = 1993
Feature_HasDSPR2 | 0, // MULQ_S_W = 1994
Feature_InMicroMips | Feature_HasDSPR2 | 0, // MULQ_S_W_MMR2 = 1995
Feature_HasStdEnc | Feature_HasMSA | 0, // MULR_Q_H = 1996
Feature_HasStdEnc | Feature_HasMSA | 0, // MULR_Q_W = 1997
Feature_HasDSP | 0, // MULSAQ_S_W_PH = 1998
Feature_InMicroMips | Feature_HasDSP | 0, // MULSAQ_S_W_PH_MM = 1999
Feature_HasDSPR2 | 0, // MULSA_W_PH = 2000
Feature_InMicroMips | Feature_HasDSPR2 | 0, // MULSA_W_PH_MMR2 = 2001
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MULT = 2002
Feature_HasDSP | 0, // MULTU_DSP = 2003
Feature_InMicroMips | Feature_HasDSP | 0, // MULTU_DSP_MM = 2004
Feature_HasDSP | 0, // MULT_DSP = 2005
Feature_InMicroMips | Feature_HasDSP | 0, // MULT_DSP_MM = 2006
Feature_InMicroMips | Feature_NotMips32r6 | 0, // MULT_MM = 2007
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // MULTu = 2008
Feature_InMicroMips | Feature_NotMips32r6 | 0, // MULTu_MM = 2009
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // MULU = 2010
Feature_InMicroMips | Feature_HasMips32r6 | 0, // MULU_MMR6 = 2011
Feature_HasStdEnc | Feature_HasMSA | 0, // MULV_B = 2012
Feature_HasStdEnc | Feature_HasMSA | 0, // MULV_D = 2013
Feature_HasStdEnc | Feature_HasMSA | 0, // MULV_H = 2014
Feature_HasStdEnc | Feature_HasMSA | 0, // MULV_W = 2015
Feature_InMicroMips | Feature_NotMips32r6 | 0, // MUL_MM = 2016
Feature_InMicroMips | Feature_HasMips32r6 | 0, // MUL_MMR6 = 2017
Feature_HasDSPR2 | 0, // MUL_PH = 2018
Feature_InMicroMips | Feature_HasDSPR2 | 0, // MUL_PH_MMR2 = 2019
Feature_HasStdEnc | Feature_HasMSA | 0, // MUL_Q_H = 2020
Feature_HasStdEnc | Feature_HasMSA | 0, // MUL_Q_W = 2021
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // MUL_R6 = 2022
Feature_HasDSPR2 | 0, // MUL_S_PH = 2023
Feature_InMicroMips | Feature_HasDSPR2 | 0, // MUL_S_PH_MMR2 = 2024
Feature_InMips16Mode | 0, // Mfhi16 = 2025
Feature_InMips16Mode | 0, // Mflo16 = 2026
Feature_InMips16Mode | 0, // Move32R16 = 2027
Feature_InMips16Mode | 0, // MoveR3216 = 2028
Feature_HasStdEnc | Feature_HasMSA | 0, // NLOC_B = 2029
Feature_HasStdEnc | Feature_HasMSA | 0, // NLOC_D = 2030
Feature_HasStdEnc | Feature_HasMSA | 0, // NLOC_H = 2031
Feature_HasStdEnc | Feature_HasMSA | 0, // NLOC_W = 2032
Feature_HasStdEnc | Feature_HasMSA | 0, // NLZC_B = 2033
Feature_HasStdEnc | Feature_HasMSA | 0, // NLZC_D = 2034
Feature_HasStdEnc | Feature_HasMSA | 0, // NLZC_H = 2035
Feature_HasStdEnc | Feature_HasMSA | 0, // NLZC_W = 2036
Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | Feature_NotInMicroMips | 0, // NMADD_D32 = 2037
Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // NMADD_D32_MM = 2038
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | Feature_NotInMicroMips | 0, // NMADD_D64 = 2039
Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | Feature_NotInMicroMips | 0, // NMADD_S = 2040
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // NMADD_S_MM = 2041
Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | Feature_NotInMicroMips | 0, // NMSUB_D32 = 2042
Feature_InMicroMips | Feature_NotFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // NMSUB_D32_MM = 2043
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | Feature_NotInMicroMips | 0, // NMSUB_D64 = 2044
Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | Feature_NotInMicroMips | 0, // NMSUB_S = 2045
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | Feature_HasMadd4 | 0, // NMSUB_S_MM = 2046
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // NOR = 2047
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // NOR64 = 2048
Feature_HasStdEnc | Feature_HasMSA | 0, // NORI_B = 2049
Feature_InMicroMips | Feature_NotMips32r6 | 0, // NOR_MM = 2050
Feature_InMicroMips | Feature_HasMips32r6 | 0, // NOR_MMR6 = 2051
Feature_HasStdEnc | Feature_HasMSA | 0, // NOR_V = 2052
Feature_InMicroMips | Feature_NotMips32r6 | 0, // NOT16_MM = 2053
Feature_InMicroMips | Feature_HasMips32r6 | 0, // NOT16_MMR6 = 2054
Feature_InMips16Mode | 0, // NegRxRy16 = 2055
Feature_InMips16Mode | 0, // NotRxRy16 = 2056
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // OR = 2057
Feature_InMicroMips | Feature_NotMips32r6 | 0, // OR16_MM = 2058
Feature_InMicroMips | Feature_HasMips32r6 | 0, // OR16_MMR6 = 2059
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // OR64 = 2060
Feature_HasStdEnc | Feature_HasMSA | 0, // ORI_B = 2061
Feature_InMicroMips | Feature_HasMips32r6 | 0, // ORI_MMR6 = 2062
Feature_InMicroMips | Feature_NotMips32r6 | 0, // OR_MM = 2063
Feature_InMicroMips | Feature_HasMips32r6 | 0, // OR_MMR6 = 2064
Feature_HasStdEnc | Feature_HasMSA | 0, // OR_V = 2065
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // ORi = 2066
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // ORi64 = 2067
Feature_InMicroMips | Feature_NotMips32r6 | 0, // ORi_MM = 2068
Feature_InMips16Mode | 0, // OrRxRxRy16 = 2069
Feature_HasDSP | 0, // PACKRL_PH = 2070
Feature_InMicroMips | Feature_HasDSP | 0, // PACKRL_PH_MM = 2071
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // PAUSE = 2072
Feature_InMicroMips | 0, // PAUSE_MM = 2073
Feature_InMicroMips | Feature_HasMips32r6 | 0, // PAUSE_MMR6 = 2074
Feature_HasStdEnc | Feature_HasMSA | 0, // PCKEV_B = 2075
Feature_HasStdEnc | Feature_HasMSA | 0, // PCKEV_D = 2076
Feature_HasStdEnc | Feature_HasMSA | 0, // PCKEV_H = 2077
Feature_HasStdEnc | Feature_HasMSA | 0, // PCKEV_W = 2078
Feature_HasStdEnc | Feature_HasMSA | 0, // PCKOD_B = 2079
Feature_HasStdEnc | Feature_HasMSA | 0, // PCKOD_D = 2080
Feature_HasStdEnc | Feature_HasMSA | 0, // PCKOD_H = 2081
Feature_HasStdEnc | Feature_HasMSA | 0, // PCKOD_W = 2082
Feature_HasStdEnc | Feature_HasMSA | 0, // PCNT_B = 2083
Feature_HasStdEnc | Feature_HasMSA | 0, // PCNT_D = 2084
Feature_HasStdEnc | Feature_HasMSA | 0, // PCNT_H = 2085
Feature_HasStdEnc | Feature_HasMSA | 0, // PCNT_W = 2086
Feature_HasDSP | 0, // PICK_PH = 2087
Feature_InMicroMips | Feature_HasDSP | 0, // PICK_PH_MM = 2088
Feature_HasDSP | 0, // PICK_QB = 2089
Feature_InMicroMips | Feature_HasDSP | 0, // PICK_QB_MM = 2090
Feature_HasCnMips | 0, // POP = 2091
Feature_HasDSP | 0, // PRECEQU_PH_QBL = 2092
Feature_HasDSP | 0, // PRECEQU_PH_QBLA = 2093
Feature_InMicroMips | Feature_HasDSP | 0, // PRECEQU_PH_QBLA_MM = 2094
Feature_InMicroMips | Feature_HasDSP | 0, // PRECEQU_PH_QBL_MM = 2095
Feature_HasDSP | 0, // PRECEQU_PH_QBR = 2096
Feature_HasDSP | 0, // PRECEQU_PH_QBRA = 2097
Feature_InMicroMips | Feature_HasDSP | 0, // PRECEQU_PH_QBRA_MM = 2098
Feature_InMicroMips | Feature_HasDSP | 0, // PRECEQU_PH_QBR_MM = 2099
Feature_HasDSP | 0, // PRECEQ_W_PHL = 2100
Feature_InMicroMips | Feature_HasDSP | 0, // PRECEQ_W_PHL_MM = 2101
Feature_HasDSP | 0, // PRECEQ_W_PHR = 2102
Feature_InMicroMips | Feature_HasDSP | 0, // PRECEQ_W_PHR_MM = 2103
Feature_HasDSP | 0, // PRECEU_PH_QBL = 2104
Feature_HasDSP | 0, // PRECEU_PH_QBLA = 2105
Feature_InMicroMips | Feature_HasDSP | 0, // PRECEU_PH_QBLA_MM = 2106
Feature_InMicroMips | Feature_HasDSP | 0, // PRECEU_PH_QBL_MM = 2107
Feature_HasDSP | 0, // PRECEU_PH_QBR = 2108
Feature_HasDSP | 0, // PRECEU_PH_QBRA = 2109
Feature_InMicroMips | Feature_HasDSP | 0, // PRECEU_PH_QBRA_MM = 2110
Feature_InMicroMips | Feature_HasDSP | 0, // PRECEU_PH_QBR_MM = 2111
Feature_HasDSP | 0, // PRECRQU_S_QB_PH = 2112
Feature_InMicroMips | Feature_HasDSP | 0, // PRECRQU_S_QB_PH_MM = 2113
Feature_HasDSP | 0, // PRECRQ_PH_W = 2114
Feature_InMicroMips | Feature_HasDSP | 0, // PRECRQ_PH_W_MM = 2115
Feature_HasDSP | 0, // PRECRQ_QB_PH = 2116
Feature_InMicroMips | Feature_HasDSP | 0, // PRECRQ_QB_PH_MM = 2117
Feature_HasDSP | 0, // PRECRQ_RS_PH_W = 2118
Feature_InMicroMips | Feature_HasDSP | 0, // PRECRQ_RS_PH_W_MM = 2119
Feature_HasDSPR2 | 0, // PRECR_QB_PH = 2120
Feature_InMicroMips | Feature_HasDSPR2 | 0, // PRECR_QB_PH_MMR2 = 2121
Feature_HasDSPR2 | 0, // PRECR_SRA_PH_W = 2122
Feature_InMicroMips | Feature_HasDSPR2 | 0, // PRECR_SRA_PH_W_MMR2 = 2123
Feature_HasDSPR2 | 0, // PRECR_SRA_R_PH_W = 2124
Feature_InMicroMips | Feature_HasDSPR2 | 0, // PRECR_SRA_R_PH_W_MMR2 = 2125
Feature_HasStdEnc | Feature_HasMips3_32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // PREF = 2126
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // PREFE = 2127
Feature_InMicroMips | Feature_HasEVA | 0, // PREFE_MM = 2128
Feature_InMicroMips | Feature_NotMips32r6 | 0, // PREFX_MM = 2129
Feature_InMicroMips | Feature_NotMips32r6 | 0, // PREF_MM = 2130
Feature_InMicroMips | Feature_HasMips32r6 | 0, // PREF_MMR6 = 2131
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // PREF_R6 = 2132
Feature_HasDSPR2 | 0, // PREPEND = 2133
Feature_InMicroMips | Feature_HasDSPR2 | 0, // PREPEND_MMR2 = 2134
Feature_HasDSP | 0, // RADDU_W_QB = 2135
Feature_InMicroMips | Feature_HasDSP | 0, // RADDU_W_QB_MM = 2136
Feature_HasDSP | 0, // RDDSP = 2137
Feature_InMicroMips | Feature_HasDSP | 0, // RDDSP_MM = 2138
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // RDHWR = 2139
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // RDHWR64 = 2140
Feature_InMicroMips | Feature_NotMips32r6 | 0, // RDHWR_MM = 2141
Feature_InMicroMips | Feature_HasMips32r6 | 0, // RDHWR_MMR6 = 2142
Feature_InMicroMips | Feature_HasMips32r6 | 0, // RDPGPR_MMR6 = 2143
Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RECIP_D32 = 2144
Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // RECIP_D32_MM = 2145
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RECIP_D64 = 2146
Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // RECIP_D64_MM = 2147
Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RECIP_S = 2148
Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // RECIP_S_MM = 2149
Feature_HasDSP | 0, // REPLV_PH = 2150
Feature_InMicroMips | Feature_HasDSP | 0, // REPLV_PH_MM = 2151
Feature_HasDSP | 0, // REPLV_QB = 2152
Feature_InMicroMips | Feature_HasDSP | 0, // REPLV_QB_MM = 2153
Feature_HasDSP | 0, // REPL_PH = 2154
Feature_InMicroMips | Feature_HasDSP | 0, // REPL_PH_MM = 2155
Feature_HasDSP | 0, // REPL_QB = 2156
Feature_InMicroMips | Feature_HasDSP | 0, // REPL_QB_MM = 2157
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RINT_D = 2158
Feature_InMicroMips | Feature_HasMips32r6 | 0, // RINT_D_MMR6 = 2159
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RINT_S = 2160
Feature_InMicroMips | Feature_HasMips32r6 | 0, // RINT_S_MMR6 = 2161
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // ROTR = 2162
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // ROTRV = 2163
Feature_InMicroMips | 0, // ROTRV_MM = 2164
Feature_InMicroMips | 0, // ROTR_MM = 2165
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips3_32 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // ROUND_L_D64 = 2166
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // ROUND_L_D_MMR6 = 2167
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // ROUND_L_S = 2168
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // ROUND_L_S_MMR6 = 2169
Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // ROUND_W_D32 = 2170
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // ROUND_W_D64 = 2171
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // ROUND_W_D_MMR6 = 2172
Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // ROUND_W_MM = 2173
Feature_HasStdEnc | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // ROUND_W_S = 2174
Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // ROUND_W_S_MM = 2175
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // ROUND_W_S_MMR6 = 2176
Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RSQRT_D32 = 2177
Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // RSQRT_D32_MM = 2178
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RSQRT_D64 = 2179
Feature_InMicroMips | Feature_IsFP64bit | Feature_IsNotSoftFloat | 0, // RSQRT_D64_MM = 2180
Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // RSQRT_S = 2181
Feature_NotInMips16Mode | Feature_IsNotSoftFloat | 0, // RSQRT_S_MM = 2182
Feature_InMips16Mode | 0, // Restore16 = 2183
Feature_InMips16Mode | 0, // RestoreX16 = 2184
Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_S_B = 2185
Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_S_D = 2186
Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_S_H = 2187
Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_S_W = 2188
Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_U_B = 2189
Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_U_D = 2190
Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_U_H = 2191
Feature_HasStdEnc | Feature_HasMSA | 0, // SAT_U_W = 2192
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SB = 2193
Feature_InMicroMips | Feature_NotMips32r6 | 0, // SB16_MM = 2194
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SB16_MMR6 = 2195
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SB64 = 2196
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // SBE = 2197
Feature_InMicroMips | Feature_HasEVA | 0, // SBE_MM = 2198
Feature_InMicroMips | 0, // SB_MM = 2199
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SB_MMR6 = 2200
Feature_HasStdEnc | Feature_IsPTR32bit | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SC = 2201
Feature_HasStdEnc | Feature_IsPTR64bit | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SC64 = 2202
Feature_HasStdEnc | Feature_IsPTR64bit | Feature_HasMips64r6 | Feature_NotInMicroMips | 0, // SC64_R6 = 2203
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SCD = 2204
Feature_HasStdEnc | Feature_HasMips32r6 | 0, // SCD_R6 = 2205
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // SCE = 2206
Feature_InMicroMips | Feature_HasEVA | 0, // SCE_MM = 2207
Feature_InMicroMips | Feature_NotMips32r6 | 0, // SC_MM = 2208
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SC_MMR6 = 2209
Feature_HasStdEnc | Feature_IsPTR32bit | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // SC_R6 = 2210
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotInMicroMips | 0, // SD = 2211
Feature_HasStdEnc | Feature_HasMips32 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SDBBP = 2212
Feature_InMicroMips | Feature_NotMips32r6 | 0, // SDBBP16_MM = 2213
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SDBBP16_MMR6 = 2214
Feature_InMicroMips | 0, // SDBBP_MM = 2215
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SDBBP_MMR6 = 2216
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // SDBBP_R6 = 2217
Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SDC1 = 2218
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SDC164 = 2219
Feature_InMicroMips | Feature_IsFP64bit | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // SDC1_D64_MMR6 = 2220
Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // SDC1_MM = 2221
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SDC2 = 2222
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SDC2_MMR6 = 2223
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // SDC2_R6 = 2224
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotCnMips | Feature_NotInMicroMips | 0, // SDC3 = 2225
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SDIV = 2226
Feature_InMicroMips | Feature_NotMips32r6 | 0, // SDIV_MM = 2227
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SDL = 2228
Feature_HasStdEnc | Feature_HasMips3 | Feature_NotMips32r6 | Feature_NotMips64r6 | 0, // SDR = 2229
Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SDXC1 = 2230
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | 0, // SDXC164 = 2231
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // SEB = 2232
Feature_HasStdEnc | Feature_HasMips32r2 | 0, // SEB64 = 2233
Feature_InMicroMips | 0, // SEB_MM = 2234
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // SEH = 2235
Feature_HasStdEnc | Feature_HasMips32r2 | 0, // SEH64 = 2236
Feature_InMicroMips | 0, // SEH_MM = 2237
Feature_HasStdEnc | Feature_IsGP32bit | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // SELEQZ = 2238
Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips32r6 | 0, // SELEQZ64 = 2239
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SELEQZ_D = 2240
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SELEQZ_D_MMR6 = 2241
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SELEQZ_MMR6 = 2242
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SELEQZ_S = 2243
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SELEQZ_S_MMR6 = 2244
Feature_HasStdEnc | Feature_IsGP32bit | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // SELNEZ = 2245
Feature_HasStdEnc | Feature_IsGP64bit | Feature_HasMips32r6 | 0, // SELNEZ64 = 2246
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SELNEZ_D = 2247
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SELNEZ_D_MMR6 = 2248
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SELNEZ_MMR6 = 2249
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SELNEZ_S = 2250
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SELNEZ_S_MMR6 = 2251
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SEL_D = 2252
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SEL_D_MMR6 = 2253
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SEL_S = 2254
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SEL_S_MMR6 = 2255
Feature_HasCnMips | 0, // SEQ = 2256
Feature_HasCnMips | 0, // SEQi = 2257
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SH = 2258
Feature_InMicroMips | Feature_NotMips32r6 | 0, // SH16_MM = 2259
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SH16_MMR6 = 2260
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SH64 = 2261
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // SHE = 2262
Feature_InMicroMips | Feature_HasEVA | 0, // SHE_MM = 2263
Feature_HasStdEnc | Feature_HasMSA | 0, // SHF_B = 2264
Feature_HasStdEnc | Feature_HasMSA | 0, // SHF_H = 2265
Feature_HasStdEnc | Feature_HasMSA | 0, // SHF_W = 2266
Feature_HasDSP | 0, // SHILO = 2267
Feature_HasDSP | 0, // SHILOV = 2268
Feature_InMicroMips | Feature_HasDSP | 0, // SHILOV_MM = 2269
Feature_InMicroMips | Feature_HasDSP | 0, // SHILO_MM = 2270
Feature_HasDSP | 0, // SHLLV_PH = 2271
Feature_InMicroMips | Feature_HasDSP | 0, // SHLLV_PH_MM = 2272
Feature_HasDSP | 0, // SHLLV_QB = 2273
Feature_InMicroMips | Feature_HasDSP | 0, // SHLLV_QB_MM = 2274
Feature_HasDSP | 0, // SHLLV_S_PH = 2275
Feature_InMicroMips | Feature_HasDSP | 0, // SHLLV_S_PH_MM = 2276
Feature_HasDSP | 0, // SHLLV_S_W = 2277
Feature_InMicroMips | Feature_HasDSP | 0, // SHLLV_S_W_MM = 2278
Feature_HasDSP | 0, // SHLL_PH = 2279
Feature_InMicroMips | Feature_HasDSP | 0, // SHLL_PH_MM = 2280
Feature_HasDSP | 0, // SHLL_QB = 2281
Feature_InMicroMips | Feature_HasDSP | 0, // SHLL_QB_MM = 2282
Feature_HasDSP | 0, // SHLL_S_PH = 2283
Feature_InMicroMips | Feature_HasDSP | 0, // SHLL_S_PH_MM = 2284
Feature_HasDSP | 0, // SHLL_S_W = 2285
Feature_InMicroMips | Feature_HasDSP | 0, // SHLL_S_W_MM = 2286
Feature_HasDSP | 0, // SHRAV_PH = 2287
Feature_InMicroMips | Feature_HasDSP | 0, // SHRAV_PH_MM = 2288
Feature_HasDSPR2 | 0, // SHRAV_QB = 2289
Feature_InMicroMips | Feature_HasDSPR2 | 0, // SHRAV_QB_MMR2 = 2290
Feature_HasDSP | 0, // SHRAV_R_PH = 2291
Feature_InMicroMips | Feature_HasDSP | 0, // SHRAV_R_PH_MM = 2292
Feature_HasDSPR2 | 0, // SHRAV_R_QB = 2293
Feature_InMicroMips | Feature_HasDSPR2 | 0, // SHRAV_R_QB_MMR2 = 2294
Feature_HasDSP | 0, // SHRAV_R_W = 2295
Feature_InMicroMips | Feature_HasDSP | 0, // SHRAV_R_W_MM = 2296
Feature_HasDSP | 0, // SHRA_PH = 2297
Feature_InMicroMips | Feature_HasDSP | 0, // SHRA_PH_MM = 2298
Feature_HasDSPR2 | 0, // SHRA_QB = 2299
Feature_InMicroMips | Feature_HasDSPR2 | 0, // SHRA_QB_MMR2 = 2300
Feature_HasDSP | 0, // SHRA_R_PH = 2301
Feature_InMicroMips | Feature_HasDSP | 0, // SHRA_R_PH_MM = 2302
Feature_HasDSPR2 | 0, // SHRA_R_QB = 2303
Feature_InMicroMips | Feature_HasDSPR2 | 0, // SHRA_R_QB_MMR2 = 2304
Feature_HasDSP | 0, // SHRA_R_W = 2305
Feature_InMicroMips | Feature_HasDSP | 0, // SHRA_R_W_MM = 2306
Feature_HasDSPR2 | 0, // SHRLV_PH = 2307
Feature_InMicroMips | Feature_HasDSPR2 | 0, // SHRLV_PH_MMR2 = 2308
Feature_HasDSP | 0, // SHRLV_QB = 2309
Feature_InMicroMips | Feature_HasDSP | 0, // SHRLV_QB_MM = 2310
Feature_HasDSPR2 | 0, // SHRL_PH = 2311
Feature_InMicroMips | Feature_HasDSPR2 | 0, // SHRL_PH_MMR2 = 2312
Feature_HasDSP | 0, // SHRL_QB = 2313
Feature_InMicroMips | Feature_HasDSP | 0, // SHRL_QB_MM = 2314
Feature_InMicroMips | 0, // SH_MM = 2315
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SH_MMR6 = 2316
Feature_HasStdEnc | Feature_HasMSA | 0, // SLDI_B = 2317
Feature_HasStdEnc | Feature_HasMSA | 0, // SLDI_D = 2318
Feature_HasStdEnc | Feature_HasMSA | 0, // SLDI_H = 2319
Feature_HasStdEnc | Feature_HasMSA | 0, // SLDI_W = 2320
Feature_HasStdEnc | Feature_HasMSA | 0, // SLD_B = 2321
Feature_HasStdEnc | Feature_HasMSA | 0, // SLD_D = 2322
Feature_HasStdEnc | Feature_HasMSA | 0, // SLD_H = 2323
Feature_HasStdEnc | Feature_HasMSA | 0, // SLD_W = 2324
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SLL = 2325
Feature_InMicroMips | Feature_NotMips32r6 | 0, // SLL16_MM = 2326
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SLL16_MMR6 = 2327
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SLL64_32 = 2328
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SLL64_64 = 2329
Feature_HasStdEnc | Feature_HasMSA | 0, // SLLI_B = 2330
Feature_HasStdEnc | Feature_HasMSA | 0, // SLLI_D = 2331
Feature_HasStdEnc | Feature_HasMSA | 0, // SLLI_H = 2332
Feature_HasStdEnc | Feature_HasMSA | 0, // SLLI_W = 2333
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SLLV = 2334
Feature_InMicroMips | 0, // SLLV_MM = 2335
Feature_HasStdEnc | Feature_HasMSA | 0, // SLL_B = 2336
Feature_HasStdEnc | Feature_HasMSA | 0, // SLL_D = 2337
Feature_HasStdEnc | Feature_HasMSA | 0, // SLL_H = 2338
Feature_InMicroMips | 0, // SLL_MM = 2339
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SLL_MMR6 = 2340
Feature_HasStdEnc | Feature_HasMSA | 0, // SLL_W = 2341
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SLT = 2342
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SLT64 = 2343
Feature_InMicroMips | 0, // SLT_MM = 2344
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SLTi = 2345
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SLTi64 = 2346
Feature_InMicroMips | 0, // SLTi_MM = 2347
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SLTiu = 2348
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SLTiu64 = 2349
Feature_InMicroMips | 0, // SLTiu_MM = 2350
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SLTu = 2351
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SLTu64 = 2352
Feature_InMicroMips | 0, // SLTu_MM = 2353
Feature_HasCnMips | 0, // SNE = 2354
Feature_HasCnMips | 0, // SNEi = 2355
Feature_HasStdEnc | Feature_HasMSA | 0, // SPLATI_B = 2356
Feature_HasStdEnc | Feature_HasMSA | 0, // SPLATI_D = 2357
Feature_HasStdEnc | Feature_HasMSA | 0, // SPLATI_H = 2358
Feature_HasStdEnc | Feature_HasMSA | 0, // SPLATI_W = 2359
Feature_HasStdEnc | Feature_HasMSA | 0, // SPLAT_B = 2360
Feature_HasStdEnc | Feature_HasMSA | 0, // SPLAT_D = 2361
Feature_HasStdEnc | Feature_HasMSA | 0, // SPLAT_H = 2362
Feature_HasStdEnc | Feature_HasMSA | 0, // SPLAT_W = 2363
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SRA = 2364
Feature_HasStdEnc | Feature_HasMSA | 0, // SRAI_B = 2365
Feature_HasStdEnc | Feature_HasMSA | 0, // SRAI_D = 2366
Feature_HasStdEnc | Feature_HasMSA | 0, // SRAI_H = 2367
Feature_HasStdEnc | Feature_HasMSA | 0, // SRAI_W = 2368
Feature_HasStdEnc | Feature_HasMSA | 0, // SRARI_B = 2369
Feature_HasStdEnc | Feature_HasMSA | 0, // SRARI_D = 2370
Feature_HasStdEnc | Feature_HasMSA | 0, // SRARI_H = 2371
Feature_HasStdEnc | Feature_HasMSA | 0, // SRARI_W = 2372
Feature_HasStdEnc | Feature_HasMSA | 0, // SRAR_B = 2373
Feature_HasStdEnc | Feature_HasMSA | 0, // SRAR_D = 2374
Feature_HasStdEnc | Feature_HasMSA | 0, // SRAR_H = 2375
Feature_HasStdEnc | Feature_HasMSA | 0, // SRAR_W = 2376
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SRAV = 2377
Feature_InMicroMips | 0, // SRAV_MM = 2378
Feature_HasStdEnc | Feature_HasMSA | 0, // SRA_B = 2379
Feature_HasStdEnc | Feature_HasMSA | 0, // SRA_D = 2380
Feature_HasStdEnc | Feature_HasMSA | 0, // SRA_H = 2381
Feature_InMicroMips | 0, // SRA_MM = 2382
Feature_HasStdEnc | Feature_HasMSA | 0, // SRA_W = 2383
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SRL = 2384
Feature_InMicroMips | Feature_NotMips32r6 | 0, // SRL16_MM = 2385
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SRL16_MMR6 = 2386
Feature_HasStdEnc | Feature_HasMSA | 0, // SRLI_B = 2387
Feature_HasStdEnc | Feature_HasMSA | 0, // SRLI_D = 2388
Feature_HasStdEnc | Feature_HasMSA | 0, // SRLI_H = 2389
Feature_HasStdEnc | Feature_HasMSA | 0, // SRLI_W = 2390
Feature_HasStdEnc | Feature_HasMSA | 0, // SRLRI_B = 2391
Feature_HasStdEnc | Feature_HasMSA | 0, // SRLRI_D = 2392
Feature_HasStdEnc | Feature_HasMSA | 0, // SRLRI_H = 2393
Feature_HasStdEnc | Feature_HasMSA | 0, // SRLRI_W = 2394
Feature_HasStdEnc | Feature_HasMSA | 0, // SRLR_B = 2395
Feature_HasStdEnc | Feature_HasMSA | 0, // SRLR_D = 2396
Feature_HasStdEnc | Feature_HasMSA | 0, // SRLR_H = 2397
Feature_HasStdEnc | Feature_HasMSA | 0, // SRLR_W = 2398
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SRLV = 2399
Feature_InMicroMips | 0, // SRLV_MM = 2400
Feature_HasStdEnc | Feature_HasMSA | 0, // SRL_B = 2401
Feature_HasStdEnc | Feature_HasMSA | 0, // SRL_D = 2402
Feature_HasStdEnc | Feature_HasMSA | 0, // SRL_H = 2403
Feature_InMicroMips | 0, // SRL_MM = 2404
Feature_HasStdEnc | Feature_HasMSA | 0, // SRL_W = 2405
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SSNOP = 2406
Feature_InMicroMips | 0, // SSNOP_MM = 2407
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SSNOP_MMR6 = 2408
Feature_HasStdEnc | Feature_HasMSA | 0, // ST_B = 2409
Feature_HasStdEnc | Feature_HasMSA | 0, // ST_D = 2410
Feature_HasStdEnc | Feature_HasMSA | 0, // ST_H = 2411
Feature_HasStdEnc | Feature_HasMSA | 0, // ST_W = 2412
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SUB = 2413
Feature_HasDSPR2 | 0, // SUBQH_PH = 2414
Feature_InMicroMips | Feature_HasDSPR2 | 0, // SUBQH_PH_MMR2 = 2415
Feature_HasDSPR2 | 0, // SUBQH_R_PH = 2416
Feature_InMicroMips | Feature_HasDSPR2 | 0, // SUBQH_R_PH_MMR2 = 2417
Feature_HasDSPR2 | 0, // SUBQH_R_W = 2418
Feature_InMicroMips | Feature_HasDSPR2 | 0, // SUBQH_R_W_MMR2 = 2419
Feature_HasDSPR2 | 0, // SUBQH_W = 2420
Feature_InMicroMips | Feature_HasDSPR2 | 0, // SUBQH_W_MMR2 = 2421
Feature_HasDSP | 0, // SUBQ_PH = 2422
Feature_InMicroMips | Feature_HasDSP | 0, // SUBQ_PH_MM = 2423
Feature_HasDSP | 0, // SUBQ_S_PH = 2424
Feature_InMicroMips | Feature_HasDSP | 0, // SUBQ_S_PH_MM = 2425
Feature_HasDSP | 0, // SUBQ_S_W = 2426
Feature_InMicroMips | Feature_HasDSP | 0, // SUBQ_S_W_MM = 2427
Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUS_U_B = 2428
Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUS_U_D = 2429
Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUS_U_H = 2430
Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUS_U_W = 2431
Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUU_S_B = 2432
Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUU_S_D = 2433
Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUU_S_H = 2434
Feature_HasStdEnc | Feature_HasMSA | 0, // SUBSUU_S_W = 2435
Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_S_B = 2436
Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_S_D = 2437
Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_S_H = 2438
Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_S_W = 2439
Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_U_B = 2440
Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_U_D = 2441
Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_U_H = 2442
Feature_HasStdEnc | Feature_HasMSA | 0, // SUBS_U_W = 2443
Feature_InMicroMips | Feature_NotMips32r6 | 0, // SUBU16_MM = 2444
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SUBU16_MMR6 = 2445
Feature_HasDSPR2 | 0, // SUBUH_QB = 2446
Feature_InMicroMips | Feature_HasDSPR2 | 0, // SUBUH_QB_MMR2 = 2447
Feature_HasDSPR2 | 0, // SUBUH_R_QB = 2448
Feature_InMicroMips | Feature_HasDSPR2 | 0, // SUBUH_R_QB_MMR2 = 2449
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SUBU_MMR6 = 2450
Feature_HasDSPR2 | 0, // SUBU_PH = 2451
Feature_InMicroMips | Feature_HasDSPR2 | 0, // SUBU_PH_MMR2 = 2452
Feature_HasDSP | 0, // SUBU_QB = 2453
Feature_InMicroMips | Feature_HasDSP | 0, // SUBU_QB_MM = 2454
Feature_HasDSPR2 | 0, // SUBU_S_PH = 2455
Feature_InMicroMips | Feature_HasDSPR2 | 0, // SUBU_S_PH_MMR2 = 2456
Feature_HasDSP | 0, // SUBU_S_QB = 2457
Feature_InMicroMips | Feature_HasDSP | 0, // SUBU_S_QB_MM = 2458
Feature_HasStdEnc | Feature_HasMSA | 0, // SUBVI_B = 2459
Feature_HasStdEnc | Feature_HasMSA | 0, // SUBVI_D = 2460
Feature_HasStdEnc | Feature_HasMSA | 0, // SUBVI_H = 2461
Feature_HasStdEnc | Feature_HasMSA | 0, // SUBVI_W = 2462
Feature_HasStdEnc | Feature_HasMSA | 0, // SUBV_B = 2463
Feature_HasStdEnc | Feature_HasMSA | 0, // SUBV_D = 2464
Feature_HasStdEnc | Feature_HasMSA | 0, // SUBV_H = 2465
Feature_HasStdEnc | Feature_HasMSA | 0, // SUBV_W = 2466
Feature_InMicroMips | Feature_NotMips32r6 | 0, // SUB_MM = 2467
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SUB_MMR6 = 2468
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SUBu = 2469
Feature_InMicroMips | Feature_NotMips32r6 | 0, // SUBu_MM = 2470
Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips5_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SUXC1 = 2471
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips5_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SUXC164 = 2472
Feature_InMicroMips | Feature_IsFP64bit | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // SUXC1_MM = 2473
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SW = 2474
Feature_InMicroMips | Feature_NotMips32r6 | 0, // SW16_MM = 2475
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SW16_MMR6 = 2476
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SW64 = 2477
Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // SWC1 = 2478
Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // SWC1_MM = 2479
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SWC2 = 2480
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SWC2_MMR6 = 2481
Feature_HasStdEnc | Feature_HasMips32r6 | Feature_NotInMicroMips | 0, // SWC2_R6 = 2482
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotCnMips | Feature_NotInMicroMips | 0, // SWC3 = 2483
Feature_NotInMips16Mode | Feature_HasDSP | 0, // SWDSP = 2484
Feature_InMicroMips | Feature_HasDSP | 0, // SWDSP_MM = 2485
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // SWE = 2486
Feature_InMicroMips | Feature_HasEVA | 0, // SWE_MM = 2487
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SWL = 2488
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SWL64 = 2489
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_HasEVA | Feature_NotInMicroMips | 0, // SWLE = 2490
Feature_InMicroMips | Feature_NotMips32r6 | Feature_HasEVA | 0, // SWLE_MM = 2491
Feature_InMicroMips | Feature_NotMips32r6 | 0, // SWL_MM = 2492
Feature_InMicroMips | Feature_NotMips32r6 | 0, // SWM16_MM = 2493
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SWM16_MMR6 = 2494
Feature_InMicroMips | 0, // SWM32_MM = 2495
Feature_InMicroMips | 0, // SWP_MM = 2496
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // SWR = 2497
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // SWR64 = 2498
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_HasEVA | Feature_NotInMicroMips | 0, // SWRE = 2499
Feature_InMicroMips | Feature_NotMips32r6 | Feature_HasEVA | 0, // SWRE_MM = 2500
Feature_InMicroMips | Feature_NotMips32r6 | 0, // SWR_MM = 2501
Feature_InMicroMips | Feature_NotMips32r6 | 0, // SWSP_MM = 2502
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SWSP_MMR6 = 2503
Feature_HasStdEnc | Feature_HasMips4_32r2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_IsNotSoftFloat | 0, // SWXC1 = 2504
Feature_InMicroMips | Feature_NotMips32r6 | Feature_IsNotSoftFloat | 0, // SWXC1_MM = 2505
Feature_InMicroMips | 0, // SW_MM = 2506
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SW_MMR6 = 2507
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // SYNC = 2508
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // SYNCI = 2509
Feature_InMicroMips | Feature_NotMips32r6 | 0, // SYNCI_MM = 2510
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SYNCI_MMR6 = 2511
Feature_InMicroMips | 0, // SYNC_MM = 2512
Feature_InMicroMips | Feature_HasMips32r6 | 0, // SYNC_MMR6 = 2513
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // SYSCALL = 2514
Feature_InMicroMips | 0, // SYSCALL_MM = 2515
Feature_InMips16Mode | 0, // Save16 = 2516
Feature_InMips16Mode | 0, // SaveX16 = 2517
Feature_InMips16Mode | 0, // SbRxRyOffMemX16 = 2518
Feature_InMips16Mode | 0, // SebRx16 = 2519
Feature_InMips16Mode | 0, // SehRx16 = 2520
Feature_InMips16Mode | 0, // ShRxRyOffMemX16 = 2521
Feature_InMips16Mode | 0, // SllX16 = 2522
Feature_InMips16Mode | 0, // SllvRxRy16 = 2523
Feature_InMips16Mode | 0, // SltRxRy16 = 2524
Feature_InMips16Mode | 0, // SltiRxImm16 = 2525
Feature_InMips16Mode | 0, // SltiRxImmX16 = 2526
Feature_InMips16Mode | 0, // SltiuRxImm16 = 2527
Feature_InMips16Mode | 0, // SltiuRxImmX16 = 2528
Feature_InMips16Mode | 0, // SltuRxRy16 = 2529
Feature_InMips16Mode | 0, // SraX16 = 2530
Feature_InMips16Mode | 0, // SravRxRy16 = 2531
Feature_InMips16Mode | 0, // SrlX16 = 2532
Feature_InMips16Mode | 0, // SrlvRxRy16 = 2533
Feature_InMips16Mode | 0, // SubuRxRyRz16 = 2534
Feature_InMips16Mode | 0, // SwRxRyOffMemX16 = 2535
Feature_InMips16Mode | 0, // SwRxSpImmX16 = 2536
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // TEQ = 2537
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // TEQI = 2538
Feature_InMicroMips | Feature_NotMips32r6 | 0, // TEQI_MM = 2539
Feature_InMicroMips | 0, // TEQ_MM = 2540
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // TGE = 2541
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // TGEI = 2542
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // TGEIU = 2543
Feature_InMicroMips | Feature_NotMips32r6 | 0, // TGEIU_MM = 2544
Feature_InMicroMips | Feature_NotMips32r6 | 0, // TGEI_MM = 2545
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // TGEU = 2546
Feature_InMicroMips | 0, // TGEU_MM = 2547
Feature_InMicroMips | 0, // TGE_MM = 2548
Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // TLBGINV = 2549
Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // TLBGINVF = 2550
Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // TLBGINVF_MM = 2551
Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // TLBGINV_MM = 2552
Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // TLBGP = 2553
Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // TLBGP_MM = 2554
Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // TLBGR = 2555
Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // TLBGR_MM = 2556
Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // TLBGWI = 2557
Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // TLBGWI_MM = 2558
Feature_HasStdEnc | Feature_HasMips32r5 | Feature_HasVirt | Feature_NotInMicroMips | 0, // TLBGWR = 2559
Feature_InMicroMips | Feature_HasMips32r5 | Feature_HasVirt | 0, // TLBGWR_MM = 2560
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // TLBINV = 2561
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_HasEVA | Feature_NotInMicroMips | 0, // TLBINVF = 2562
Feature_InMicroMips | Feature_HasMips32r6 | 0, // TLBINVF_MMR6 = 2563
Feature_InMicroMips | Feature_HasMips32r6 | 0, // TLBINV_MMR6 = 2564
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // TLBP = 2565
Feature_InMicroMips | 0, // TLBP_MM = 2566
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // TLBR = 2567
Feature_InMicroMips | 0, // TLBR_MM = 2568
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // TLBWI = 2569
Feature_InMicroMips | 0, // TLBWI_MM = 2570
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // TLBWR = 2571
Feature_InMicroMips | 0, // TLBWR_MM = 2572
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // TLT = 2573
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // TLTI = 2574
Feature_InMicroMips | Feature_NotMips32r6 | 0, // TLTIU_MM = 2575
Feature_InMicroMips | Feature_NotMips32r6 | 0, // TLTI_MM = 2576
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // TLTU = 2577
Feature_InMicroMips | 0, // TLTU_MM = 2578
Feature_InMicroMips | 0, // TLT_MM = 2579
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotInMicroMips | 0, // TNE = 2580
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // TNEI = 2581
Feature_InMicroMips | Feature_NotMips32r6 | 0, // TNEI_MM = 2582
Feature_InMicroMips | 0, // TNE_MM = 2583
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips3_32 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // TRUNC_L_D64 = 2584
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // TRUNC_L_D_MMR6 = 2585
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // TRUNC_L_S = 2586
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // TRUNC_L_S_MMR6 = 2587
Feature_HasStdEnc | Feature_NotFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // TRUNC_W_D32 = 2588
Feature_HasStdEnc | Feature_IsFP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // TRUNC_W_D64 = 2589
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // TRUNC_W_D_MMR6 = 2590
Feature_InMicroMips | Feature_NotFP64bit | Feature_IsNotSoftFloat | 0, // TRUNC_W_MM = 2591
Feature_HasStdEnc | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // TRUNC_W_S = 2592
Feature_InMicroMips | Feature_IsNotSoftFloat | 0, // TRUNC_W_S_MM = 2593
Feature_InMicroMips | Feature_HasMips32r6 | Feature_IsNotSoftFloat | 0, // TRUNC_W_S_MMR6 = 2594
Feature_HasStdEnc | Feature_HasMips2 | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // TTLTIU = 2595
Feature_HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // UDIV = 2596
Feature_InMicroMips | Feature_NotMips32r6 | 0, // UDIV_MM = 2597
Feature_HasCnMips | 0, // V3MULU = 2598
Feature_HasCnMips | 0, // VMM0 = 2599
Feature_HasCnMips | 0, // VMULU = 2600
Feature_HasStdEnc | Feature_HasMSA | 0, // VSHF_B = 2601
Feature_HasStdEnc | Feature_HasMSA | 0, // VSHF_D = 2602
Feature_HasStdEnc | Feature_HasMSA | 0, // VSHF_H = 2603
Feature_HasStdEnc | Feature_HasMSA | 0, // VSHF_W = 2604
Feature_HasStdEnc | Feature_HasMips3_32 | Feature_NotInMicroMips | 0, // WAIT = 2605
Feature_InMicroMips | 0, // WAIT_MM = 2606
Feature_InMicroMips | Feature_HasMips32r6 | 0, // WAIT_MMR6 = 2607
Feature_HasDSP | Feature_NotInMicroMips | 0, // WRDSP = 2608
Feature_InMicroMips | Feature_HasDSP | 0, // WRDSP_MM = 2609
Feature_InMicroMips | Feature_HasMips32r6 | 0, // WRPGPR_MMR6 = 2610
Feature_HasStdEnc | Feature_HasMips32r2 | Feature_NotInMicroMips | 0, // WSBH = 2611
Feature_InMicroMips | 0, // WSBH_MM = 2612
Feature_InMicroMips | Feature_HasMips32r6 | 0, // WSBH_MMR6 = 2613
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // XOR = 2614
Feature_InMicroMips | Feature_NotMips32r6 | 0, // XOR16_MM = 2615
Feature_InMicroMips | Feature_HasMips32r6 | 0, // XOR16_MMR6 = 2616
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // XOR64 = 2617
Feature_HasStdEnc | Feature_HasMSA | 0, // XORI_B = 2618
Feature_InMicroMips | Feature_HasMips32r6 | 0, // XORI_MMR6 = 2619
Feature_InMicroMips | Feature_NotMips32r6 | 0, // XOR_MM = 2620
Feature_InMicroMips | Feature_HasMips32r6 | 0, // XOR_MMR6 = 2621
Feature_HasStdEnc | Feature_HasMSA | 0, // XOR_V = 2622
Feature_HasStdEnc | Feature_NotInMicroMips | 0, // XORi = 2623
Feature_NotInMips16Mode | Feature_IsGP64bit | 0, // XORi64 = 2624
Feature_InMicroMips | Feature_NotMips32r6 | 0, // XORi_MM = 2625
Feature_InMips16Mode | 0, // XorRxRxRy16 = 2626
Feature_HasStdEnc | Feature_HasMT | Feature_NotInMicroMips | 0, // YIELD = 2627
};
assert(Inst.getOpcode() < 2628);
uint64_t MissingFeatures =
(AvailableFeatures & RequiredFeatures[Inst.getOpcode()]) ^
RequiredFeatures[Inst.getOpcode()];
if (MissingFeatures) {
std::ostringstream Msg;
Msg << "Attempting to emit " << MCII.getName(Inst.getOpcode()).str()
<< " instruction but the ";
for (unsigned i = 0; i < 8 * sizeof(MissingFeatures); ++i)
if (MissingFeatures & (1ULL << i))
Msg << SubtargetFeatureNames[i] << " ";
Msg << "predicate(s) are not met";
report_fatal_error(Msg.str());
}
#else
// Silence unused variable warning on targets that don't use MCII for other purposes (e.g. BPF).
(void)MCII;
#endif // NDEBUG
}
#endif