| $0 = colorGreen (float4 : slot 1/4, L6) |
| $1 = colorGreen (float4 : slot 2/4, L6) |
| $2 = colorGreen (float4 : slot 3/4, L6) |
| $3 = colorGreen (float4 : slot 4/4, L6) |
| $4 = colorRed (float4 : slot 1/4, L6) |
| $5 = colorRed (float4 : slot 2/4, L6) |
| $6 = colorRed (float4 : slot 3/4, L6) |
| $7 = colorRed (float4 : slot 4/4, L6) |
| $8 = testMatrix2x2 (float2x2 : slot 1/4, L7) |
| $9 = testMatrix2x2 (float2x2 : slot 2/4, L7) |
| $10 = testMatrix2x2 (float2x2 : slot 3/4, L7) |
| $11 = testMatrix2x2 (float2x2 : slot 4/4, L7) |
| $12 = [main].result (float4 : slot 1/4, L9) |
| $13 = [main].result (float4 : slot 2/4, L9) |
| $14 = [main].result (float4 : slot 3/4, L9) |
| $15 = [main].result (float4 : slot 4/4, L9) |
| $16 = xy (float2 : slot 1/2, L9) |
| $17 = xy (float2 : slot 2/2, L9) |
| $18 = ok (bool, L10) |
| $19 = a (int, L11) |
| $20 = b (int, L11) |
| $21 = c (float, L12) |
| $22 = d (float, L12) |
| $23 = a_and_b (int, L14) |
| $24 = b_and_a (int, L15) |
| $25 = a_or_b (int, L18) |
| $26 = b_or_a (int, L19) |
| $27 = a_xor_b (int, L22) |
| $28 = b_xor_a (int, L23) |
| $29 = a_eq_b (bool, L26) |
| $30 = b_eq_a (bool, L27) |
| $31 = a_neq_b (bool, L30) |
| $32 = b_neq_a (bool, L31) |
| $33 = a_add_b (int, L34) |
| $34 = b_add_a (int, L35) |
| $35 = c_add_d (float, L38) |
| $36 = d_add_c (float, L39) |
| $37 = a_mul_b (int, L42) |
| $38 = b_mul_a (int, L43) |
| $39 = c_mul_d (float, L46) |
| $40 = d_mul_c (float, L47) |
| F0 = half4 main(float2 xy) |
| |
| 13 registers, 66 instructions: |
| 0 r0 = uniform32 ptr0 0 |
| 1 r1 = splat 3F000000 (0.5) |
| 2 r0 = add_f32 r0 r1 |
| 3 r2 = uniform32 ptr0 4 |
| 4 r3 = uniform32 ptr0 8 |
| 5 r4 = uniform32 ptr0 C |
| 6 r5 = uniform32 ptr0 10 |
| 7 r6 = uniform32 ptr0 14 |
| 8 r7 = uniform32 ptr0 18 |
| 9 r8 = uniform32 ptr0 1C |
| 10 r9 = uniform32 ptr0 20 |
| 11 r10 = uniform32 ptr0 2C |
| 12 r11 = uniform32 ptr0 30 |
| 13 r0 = eq_f32 r0 r1 |
| 14 r12 = add_f32 r10 r11 |
| 15 r12 = eq_f32 r12 r12 |
| 16 r11 = mul_f32 r10 r11 |
| 17 r11 = eq_f32 r11 r11 |
| 18 r11 = bit_and r12 r11 |
| 19 r6 = select r11 r2 r6 |
| 20 r7 = select r11 r3 r7 |
| 21 r8 = select r11 r4 r8 |
| 22 r9 = select r11 r5 r9 |
| loop: |
| 23 r5 = index |
| 24 r5 = add_f32 r5 r1 |
| 25 r5 = eq_f32 r5 r1 |
| 26 r5 = bit_and r5 r0 |
| 27 trace_enter 0 r5 r5 F0 |
| 28 trace_scope 0 r5 r5 1 |
| 29 trace_line 0 r5 r5 L10 |
| 30 trace_line 0 r5 r5 L11 |
| 31 trace_line 0 r5 r5 L12 |
| 32 trace_line 0 r5 r5 L14 |
| 33 trace_line 0 r5 r5 L15 |
| 34 trace_line 0 r5 r5 L16 |
| 35 trace_line 0 r5 r5 L18 |
| 36 trace_line 0 r5 r5 L19 |
| 37 trace_line 0 r5 r5 L20 |
| 38 trace_line 0 r5 r5 L22 |
| 39 trace_line 0 r5 r5 L23 |
| 40 trace_line 0 r5 r5 L24 |
| 41 trace_line 0 r5 r5 L26 |
| 42 trace_line 0 r5 r5 L27 |
| 43 trace_line 0 r5 r5 L28 |
| 44 trace_line 0 r5 r5 L30 |
| 45 trace_line 0 r5 r5 L31 |
| 46 trace_line 0 r5 r5 L32 |
| 47 trace_line 0 r5 r5 L34 |
| 48 trace_line 0 r5 r5 L35 |
| 49 trace_line 0 r5 r5 L36 |
| 50 trace_line 0 r5 r5 L38 |
| 51 trace_line 0 r5 r5 L39 |
| 52 trace_line 0 r5 r5 L40 |
| 53 trace_line 0 r5 r5 L42 |
| 54 trace_line 0 r5 r5 L43 |
| 55 trace_line 0 r5 r5 L44 |
| 56 trace_line 0 r5 r5 L46 |
| 57 trace_line 0 r5 r5 L47 |
| 58 trace_line 0 r5 r5 L48 |
| 59 trace_line 0 r5 r5 L50 |
| 60 trace_scope 0 r5 r5 -1 |
| 61 trace_exit 0 r5 r5 F0 |
| 62 store32 ptr1 r6 |
| 63 store32 ptr2 r7 |
| 64 store32 ptr3 r8 |
| 65 store32 ptr4 r9 |
