Merge remote-tracking branch 'aosp/upstream-master' into update-shaderc

Includes:
806af25f Merge pull request #1442 from dneto0/use-forked-android-ndk-repo
e7f9caea Errors and Build: Fix build warnings, which also improved error messages.
4aeca2df NDK build: Use NDK r17b and its own CMake toolchain file
b75c7065 Travis CI: Fix comments disabling code.
e5b27660 Merge pull request #1440 from dneto0/later-android
3541d8a5 Travis-CI: Use Android NDK r13b specifically
8dafeab4 Merge pull request #1438 from Think-Silicon/getUniformStages
0ea33a26 Non-functional: Retrigger bots; the previous failure looks suspicious.
cf6bd066 HLSL: Fix #1432: Globally initialize local static variables.
f556e5da Reflection exposes the Shader Stages where a Uniform is present
64315a8a Merge pull request #1434 from antiagainst/fix-spirv-tools-header
a2c39a29 Use public SPIRV-Tools header
cd57b4ba Merge pull request #1431 from KhronosGroup/implement-8-16-bit-storage
312dcfb0 Implement GL_EXT_shader_16bit_storage and GL_EXT_shader_8bit_storage extensions.
eefab240 Bump revision.
dccfeedf HLSL: Fix #1423: implement CalculateLevelOfDetailUnclamped().
ab8960fd Merge pull request #1416 from aejsmith/samplerless-texture-functions
513cc4cf Merge branch 'HaydnTrigg-patch-1'
c88edb13 Merge branch 'patch-1' of https://github.com/HaydnTrigg/glslang into HaydnTrigg-patch-1
5e701954 Merge pull request #1420 from KhronosGroup/spir-dis
e2156222 SPV: Add option to print disassembly in standard form using SPIRV-Tools.
6d61684f Bump revision.
802c62bc PP: Rationalize return values of MacroExpand.
9cc81de0 PP/HLSL: Fix #1424: support comma in nested curly braces for macro arg
e47bfaed Add support for GL_EXT_samplerless_texture_functions
e826286f Constant.cpp Floating point divide by zero
0b964b3c Merge pull request #1419 from tgjones/spirv-remap-artifact
9177e05f Include spirv-remap.exe in AppVeyor artifacts
ef1f899b Merge pull request #1413 from karl-lunarg/fix-update
fa403b96 script: Improve update sources script
16cf5a5d Merge pull request #1411 from KhronosGroup/fix-literal-warnings
866f6714 Build: Make literal casting have fewer warnings and be more consistent.
5fe506a8 Merge pull request #1409 from greg-lunarg/remap3
c6831d1e Add support for OpConstantNull and OpConstantSampler to spirv-remap
c99304c5 Bump revision.
2a805d9c Revert "GLSL: Fix #1279: refract does not have a double-type eta."
bea08fe0 Merge pull request #1405 from Igalia/nroberts/amb-arrays
1d024b53 Take into account arrays of opaque types when reserving bindings
2c8265bb GLSL: Fix #1358: Support "struct name", where name could be a user type
1ea8f595 Merge pull request #1402 from greg-lunarg/kg21
ff50b9fb Update spirv-tools known-good
7dc1a989 Merge pull request #1401 from dneto0/bad-e11
617d1b12 Relax a stringToDouble test for, OSX AppleClang 9.1
ba018e67 SPV: Fix #1399 emit ImageGatherExtended when using ConstOffsets operand
ad7645f4 Fix #1360: uint->int width conversions must still be typed as uint.
14b85d3f Fix #1395: GLSL volatile maps to SPIR-V Volatile and Coherent.
d6c97557 Change the major revision number for next commit.
a7eb582a Bump revision.
9c3fde7f Merge pull request #1397 from LoopDawg/warning-fix-4
470a68cf Fix several signed/unsigned comparison compile warnings.

Testing: checkbuild.py on Linux; unit tests on Windows
Change-Id: Ifd09865436af7b700f235c7e93a83f208d63c69b
diff --git a/.appveyor.yml b/.appveyor.yml
index 07e269b..4463fa6 100644
--- a/.appveyor.yml
+++ b/.appveyor.yml
@@ -60,6 +60,7 @@
   # Zip all glslang artifacts for uploading and deploying
   - 7z a glslang-master-windows-"%PLATFORM%"-"%CONFIGURATION%".zip
     bin\glslangValidator.exe
+    bin\spirv-remap.exe
     include\glslang\*
     include\SPIRV\*
     lib\glslang%SUFFIX%.lib
diff --git a/.travis.yml b/.travis.yml
old mode 100644
new mode 100755
index 4fe4b5e..2478912
--- a/.travis.yml
+++ b/.travis.yml
@@ -48,12 +48,16 @@
   - if [[ "$TRAVIS_OS_NAME" == "linux" && "$CC" == "clang" ]]; then
       export CC=clang-3.6 CXX=clang++-3.6;
     fi
-  # Download Android NDK and Android CMake toolchain file.
+  # Download a recent Android NDK and use its android.toolchain.cmake file.
   - if [[ "$BUILD_NDK" == "ON" ]]; then
-      git clone --depth=1 https://github.com/urho3d/android-ndk.git $HOME/android-ndk;
       export ANDROID_NDK=$HOME/android-ndk;
-      git clone --depth=1 https://github.com/taka-no-me/android-cmake.git $HOME/android-cmake;
-      export TOOLCHAIN_PATH=$HOME/android-cmake/android.toolchain.cmake;
+      git init $ANDROID_NDK;
+      pushd $ANDROID_NDK;
+        git remote add dneto0 https://github.com/dneto0/android-ndk.git;
+        git fetch --depth=1 dneto0 r17b-strip;
+        git checkout FETCH_HEAD;
+      popd;
+      export TOOLCHAIN_PATH=$ANDROID_NDK/build/cmake/android.toolchain.cmake;
     fi
 
 before_script:
@@ -63,10 +67,12 @@
 script:
   - mkdir build && cd build
   # For Android, do release building using NDK without testing.
+  # Use android-14, the oldest native API level supporeted by NDK r17b.
+  # We can use newer API levels if we want.
   # For Linux and macOS, do debug/release building with testing.
   - if [[ "$BUILD_NDK" == "ON" ]]; then
       cmake -DCMAKE_TOOLCHAIN_FILE=${TOOLCHAIN_PATH}
-            -DANDROID_NATIVE_API_LEVEL=android-12
+            -DANDROID_NATIVE_API_LEVEL=android-14
             -DCMAKE_BUILD_TYPE=Release
             -DANDROID_ABI="armeabi-v7a with NEON"
             -DBUILD_TESTING=OFF ..;
diff --git a/SPIRV/CMakeLists.txt b/SPIRV/CMakeLists.txt
index 1e5513c..bf2be16 100755
--- a/SPIRV/CMakeLists.txt
+++ b/SPIRV/CMakeLists.txt
@@ -60,6 +60,7 @@
         PRIVATE ${spirv-tools_SOURCE_DIR}/source
     )
     target_link_libraries(SPIRV glslang SPIRV-Tools-opt)
+    target_include_directories(SPIRV PUBLIC ../External)
 else()
     target_link_libraries(SPIRV glslang)
 endif(ENABLE_OPT)
diff --git a/SPIRV/GLSL.ext.KHR.h b/SPIRV/GLSL.ext.KHR.h
old mode 100644
new mode 100755
index d8ea9b6..ec0c06d
--- a/SPIRV/GLSL.ext.KHR.h
+++ b/SPIRV/GLSL.ext.KHR.h
@@ -36,6 +36,7 @@
 static const char* const E_SPV_KHR_multiview                    = "SPV_KHR_multiview";
 static const char* const E_SPV_KHR_shader_draw_parameters       = "SPV_KHR_shader_draw_parameters";
 static const char* const E_SPV_KHR_16bit_storage                = "SPV_KHR_16bit_storage";
+static const char* const E_SPV_KHR_8bit_storage                 = "SPV_KHR_8bit_storage";
 static const char* const E_SPV_KHR_storage_buffer_storage_class = "SPV_KHR_storage_buffer_storage_class";
 static const char* const E_SPV_KHR_post_depth_coverage          = "SPV_KHR_post_depth_coverage";
 
diff --git a/SPIRV/GlslangToSpv.cpp b/SPIRV/GlslangToSpv.cpp
index aa8ed0b..d5fb1ac 100755
--- a/SPIRV/GlslangToSpv.cpp
+++ b/SPIRV/GlslangToSpv.cpp
@@ -190,7 +190,7 @@
                                        glslang::TBasicType typeProxy);
     spv::Id createConversion(glslang::TOperator op, OpDecorations&, spv::Id destTypeId, spv::Id operand,
                              glslang::TBasicType typeProxy);
-    spv::Id createConversionOperation(glslang::TOperator op, spv::Id operand, int vectorSize);
+    spv::Id createIntWidthConversion(glslang::TOperator op, spv::Id operand, int vectorSize);
     spv::Id makeSmearedConstant(spv::Id constant, int vectorSize);
     spv::Id createAtomicOperation(glslang::TOperator op, spv::Decoration precision, spv::Id typeId, std::vector<spv::Id>& operands, glslang::TBasicType typeProxy);
     spv::Id createInvocationsOperation(glslang::TOperator op, spv::Id typeId, std::vector<spv::Id>& operands, glslang::TBasicType typeProxy);
@@ -340,8 +340,10 @@
 {
     if (qualifier.coherent)
         memory.push_back(spv::DecorationCoherent);
-    if (qualifier.volatil)
+    if (qualifier.volatil) {
         memory.push_back(spv::DecorationVolatile);
+        memory.push_back(spv::DecorationCoherent);
+    }
     if (qualifier.restrict)
         memory.push_back(spv::DecorationRestrict);
     if (qualifier.readonly)
@@ -2505,6 +2507,20 @@
         }
     }
 
+    const bool contains8BitType = node->getType().containsBasicType(glslang::EbtInt8)   ||
+                                  node->getType().containsBasicType(glslang::EbtUint8);
+    if (contains8BitType) {
+        if (storageClass == spv::StorageClassPushConstant) {
+            builder.addExtension(spv::E_SPV_KHR_8bit_storage);
+            builder.addCapability(spv::CapabilityStoragePushConstant8);
+        } else if (storageClass == spv::StorageClassUniform) {
+            builder.addExtension(spv::E_SPV_KHR_8bit_storage);
+            builder.addCapability(spv::CapabilityUniformAndStorageBuffer8BitAccess);
+            if (node->getType().getQualifier().storage == glslang::EvqBuffer)
+                builder.addCapability(spv::CapabilityStorageBuffer8BitAccess);
+        }
+    }
+
     const char* name = node->getName().c_str();
     if (glslang::IsAnonymous(name))
         name = "";
@@ -4828,109 +4844,45 @@
     return result;
 }
 
-spv::Id TGlslangToSpvTraverser::createConversionOperation(glslang::TOperator op, spv::Id operand, int vectorSize)
+// For converting integers where both the bitwidth and the signedness could
+// change, but only do the width change here. The caller is still responsible
+// for the signedness conversion.
+spv::Id TGlslangToSpvTraverser::createIntWidthConversion(glslang::TOperator op, spv::Id operand, int vectorSize)
 {
-    spv::Op convOp = spv::OpNop;
-    spv::Id type = 0;
-
-    spv::Id result = 0;
-
+    // Get the result type width, based on the type to convert to.
+    int width = 32;
     switch(op) {
+    case glslang::EOpConvInt16ToUint8:
+    case glslang::EOpConvIntToUint8:
+    case glslang::EOpConvInt64ToUint8:
+    case glslang::EOpConvUint16ToInt8:
+    case glslang::EOpConvUintToInt8:
+    case glslang::EOpConvUint64ToInt8:
+        width = 8;
+        break;
     case glslang::EOpConvInt8ToUint16:
-        convOp = spv::OpSConvert;
-        type   = builder.makeIntType(16);
+    case glslang::EOpConvIntToUint16:
+    case glslang::EOpConvInt64ToUint16:
+    case glslang::EOpConvUint8ToInt16:
+    case glslang::EOpConvUintToInt16:
+    case glslang::EOpConvUint64ToInt16:
+        width = 16;
         break;
     case glslang::EOpConvInt8ToUint:
-        convOp = spv::OpSConvert;
-        type   = builder.makeIntType(32);
+    case glslang::EOpConvInt16ToUint:
+    case glslang::EOpConvInt64ToUint:
+    case glslang::EOpConvUint8ToInt:
+    case glslang::EOpConvUint16ToInt:
+    case glslang::EOpConvUint64ToInt:
+        width = 32;
         break;
     case glslang::EOpConvInt8ToUint64:
-        convOp = spv::OpSConvert;
-        type   = builder.makeIntType(64);
-        break;
-    case glslang::EOpConvInt16ToUint8:
-        convOp = spv::OpSConvert;
-        type   = builder.makeIntType(8);
-        break;
-    case glslang::EOpConvInt16ToUint:
-        convOp = spv::OpSConvert;
-        type   = builder.makeIntType(32);
-        break;
     case glslang::EOpConvInt16ToUint64:
-        convOp = spv::OpSConvert;
-        type   = builder.makeIntType(64);
-        break;
-    case glslang::EOpConvIntToUint8:
-        convOp = spv::OpSConvert;
-        type   = builder.makeIntType(8);
-        break;
-    case glslang::EOpConvIntToUint16:
-        convOp = spv::OpSConvert;
-        type   = builder.makeIntType(16);
-        break;
     case glslang::EOpConvIntToUint64:
-        convOp = spv::OpSConvert;
-        type   = builder.makeIntType(64);
-        break;
-    case glslang::EOpConvInt64ToUint8:
-        convOp = spv::OpSConvert;
-        type   = builder.makeIntType(8);
-        break;
-    case glslang::EOpConvInt64ToUint16:
-        convOp = spv::OpSConvert;
-        type   = builder.makeIntType(16);
-        break;
-    case glslang::EOpConvInt64ToUint:
-        convOp = spv::OpSConvert;
-        type   = builder.makeIntType(32);
-        break;
-    case glslang::EOpConvUint8ToInt16:
-        convOp = spv::OpUConvert;
-        type   = builder.makeIntType(16);
-        break;
-    case glslang::EOpConvUint8ToInt:
-        convOp = spv::OpUConvert;
-        type   = builder.makeIntType(32);
-        break;
     case glslang::EOpConvUint8ToInt64:
-        convOp = spv::OpUConvert;
-        type   = builder.makeIntType(64);
-        break;
-    case glslang::EOpConvUint16ToInt8:
-        convOp = spv::OpUConvert;
-        type   = builder.makeIntType(8);
-        break;
-    case glslang::EOpConvUint16ToInt:
-        convOp = spv::OpUConvert;
-        type   = builder.makeIntType(32);
-        break;
     case glslang::EOpConvUint16ToInt64:
-        convOp = spv::OpUConvert;
-        type   = builder.makeIntType(64);
-        break;
-    case glslang::EOpConvUintToInt8:
-        convOp = spv::OpUConvert;
-        type   = builder.makeIntType(8);
-        break;
-    case glslang::EOpConvUintToInt16:
-        convOp = spv::OpUConvert;
-        type   = builder.makeIntType(16);
-        break;
     case glslang::EOpConvUintToInt64:
-        convOp = spv::OpUConvert;
-        type   = builder.makeIntType(64);
-        break;
-    case glslang::EOpConvUint64ToInt8:
-        convOp = spv::OpUConvert;
-        type   = builder.makeIntType(8);
-        break;
-    case glslang::EOpConvUint64ToInt16:
-        convOp = spv::OpUConvert;
-        type   = builder.makeIntType(16);
-        break;
-    case glslang::EOpConvUint64ToInt:
-        convOp = spv::OpUConvert;
-        type   = builder.makeIntType(32);
+        width = 64;
         break;
 
     default:
@@ -4938,11 +4890,36 @@
         break;
     }
 
+    // Get the conversion operation and result type,
+    // based on the target width, but the source type.
+    spv::Id type = spv::NoType;
+    spv::Op convOp = spv::OpNop;
+    switch(op) {
+    case glslang::EOpConvInt8ToUint16:
+    case glslang::EOpConvInt8ToUint:
+    case glslang::EOpConvInt8ToUint64:
+    case glslang::EOpConvInt16ToUint8:
+    case glslang::EOpConvInt16ToUint:
+    case glslang::EOpConvInt16ToUint64:
+    case glslang::EOpConvIntToUint8:
+    case glslang::EOpConvIntToUint16:
+    case glslang::EOpConvIntToUint64:
+    case glslang::EOpConvInt64ToUint8:
+    case glslang::EOpConvInt64ToUint16:
+    case glslang::EOpConvInt64ToUint:
+        convOp = spv::OpSConvert;
+        type = builder.makeIntType(width);
+        break;
+    default:
+        convOp = spv::OpUConvert;
+        type = builder.makeUintType(width);
+        break;
+    }
+
     if (vectorSize > 0)
         type = builder.makeVectorType(type, vectorSize);
 
-    result = builder.createUnaryOp(convOp, type, operand);
-    return result;
+    return builder.createUnaryOp(convOp, type, operand);
 }
 
 spv::Id TGlslangToSpvTraverser::createConversion(glslang::TOperator op, OpDecorations& decorations, spv::Id destType,
@@ -5217,7 +5194,7 @@
     case glslang::EOpConvUint64ToInt16:
     case glslang::EOpConvUint64ToInt:
         // OpSConvert/OpUConvert + OpBitCast
-        operand = createConversionOperation(op, operand, vectorSize);
+        operand = createIntWidthConversion(op, operand, vectorSize);
 
         if (builder.isInSpecConstCodeGenMode()) {
             // Build zero scalar or vector for OpIAdd.
@@ -6922,8 +6899,9 @@
     // return 3; // change/correct barrier-instruction operands, to match memory model group decisions
     // return 4; // some deeper access chains: for dynamic vector component, and local Boolean component
     // return 5; // make OpArrayLength result type be an int with signedness of 0
-    return 6; // revert version 5 change, which makes a different (new) kind of incorrect code,
-              // versions 4 and 6 each generate OpArrayLength as it has long been done
+    // return 6; // revert version 5 change, which makes a different (new) kind of incorrect code,
+                 // versions 4 and 6 each generate OpArrayLength as it has long been done
+    return 7; // GLSL volatile keyword maps to both SPIR-V decorations Volatile and Coherent
 }
 
 // Write SPIR-V out to a binary file
diff --git a/SPIRV/SPVRemapper.cpp b/SPIRV/SPVRemapper.cpp
index 4bac145..fd0bb89 100755
--- a/SPIRV/SPVRemapper.cpp
+++ b/SPIRV/SPVRemapper.cpp
@@ -220,11 +220,11 @@
     bool spirvbin_t::isConstOp(spv::Op opCode) const
     {
         switch (opCode) {
-        case spv::OpConstantNull:
         case spv::OpConstantSampler:
             error("unimplemented constant type");
             return true;
 
+        case spv::OpConstantNull:
         case spv::OpConstantTrue:
         case spv::OpConstantFalse:
         case spv::OpConstantComposite:
@@ -1326,10 +1326,6 @@
         case spv::OpTypeReserveId:       return 300002;
         case spv::OpTypeQueue:           return 300003;
         case spv::OpTypePipe:            return 300004;
-
-        case spv::OpConstantNull:        return 300005;
-        case spv::OpConstantSampler:     return 300006;
-
         case spv::OpConstantTrue:        return 300007;
         case spv::OpConstantFalse:       return 300008;
         case spv::OpConstantComposite:
@@ -1346,6 +1342,18 @@
                     hash += w * spv[typeStart+w];
                 return hash;
             }
+        case spv::OpConstantNull:
+            {
+                std::uint32_t hash = 500009 + hashType(idPos(spv[typeStart+1]));
+                return hash;
+            }
+        case spv::OpConstantSampler:
+            {
+                std::uint32_t hash = 600011 + hashType(idPos(spv[typeStart+1]));
+                for (unsigned w=3; w < wordCount; ++w)
+                    hash += w * spv[typeStart+w];
+                return hash;
+            }
 
         default:
             error("unknown type opcode");
diff --git a/SPIRV/SpvBuilder.cpp b/SPIRV/SpvBuilder.cpp
old mode 100644
new mode 100755
index 27ce71c..10d655b
--- a/SPIRV/SpvBuilder.cpp
+++ b/SPIRV/SpvBuilder.cpp
@@ -1570,7 +1570,8 @@
 
 // Accept all parameters needed to create a texture instruction.
 // Create the correct instruction based on the inputs, and make the call.
-Id Builder::createTextureCall(Decoration precision, Id resultType, bool sparse, bool fetch, bool proj, bool gather, bool noImplicitLod, const TextureParameters& parameters)
+Id Builder::createTextureCall(Decoration precision, Id resultType, bool sparse, bool fetch, bool proj, bool gather,
+    bool noImplicitLod, const TextureParameters& parameters)
 {
     static const int maxTextureArgs = 10;
     Id texArgs[maxTextureArgs] = {};
@@ -1623,6 +1624,7 @@
         texArgs[numArgs++] = parameters.offset;
     }
     if (parameters.offsets) {
+        addCapability(CapabilityImageGatherExtended);
         mask = (ImageOperandsMask)(mask | ImageOperandsConstOffsetsMask);
         texArgs[numArgs++] = parameters.offsets;
     }
diff --git a/SPIRV/disassemble.cpp b/SPIRV/disassemble.cpp
index b432e65..a8efd69 100755
--- a/SPIRV/disassemble.cpp
+++ b/SPIRV/disassemble.cpp
@@ -716,4 +716,25 @@
     SpirvStream.processInstructions();
 }
 
+#if ENABLE_OPT
+
+#include "spirv-tools/libspirv.h"
+
+// Use the SPIRV-Tools disassembler to print SPIR-V.
+void SpirvToolsDisassemble(std::ostream& out, const std::vector<unsigned int>& spirv)
+{
+    spv_context context = spvContextCreate(SPV_ENV_UNIVERSAL_1_3);
+    spv_text text;
+    spv_diagnostic diagnostic = nullptr;
+    spvBinaryToText(context, &spirv.front(), spirv.size(),
+        SPV_BINARY_TO_TEXT_OPTION_FRIENDLY_NAMES | SPV_BINARY_TO_TEXT_OPTION_INDENT,
+        &text, &diagnostic);
+    if (diagnostic == nullptr)
+        out << text->str;
+    else
+        spvDiagnosticPrint(diagnostic);
+}
+
+#endif
+
 }; // end namespace spv
diff --git a/SPIRV/disassemble.h b/SPIRV/disassemble.h
index 47cef65..bdde5cb 100755
--- a/SPIRV/disassemble.h
+++ b/SPIRV/disassemble.h
@@ -45,8 +45,12 @@
 
 namespace spv {
 
+    // disassemble with glslang custom disassembler
     void Disassemble(std::ostream& out, const std::vector<unsigned int>&);
 
+    // disassemble with SPIRV-Tools disassembler
+    void SpirvToolsDisassemble(std::ostream& out, const std::vector<unsigned int>& stream);
+
 };  // end namespace spv
 
 #endif // disassembler_H
diff --git a/SPIRV/doc.cpp b/SPIRV/doc.cpp
index a905968..ae32efe 100755
--- a/SPIRV/doc.cpp
+++ b/SPIRV/doc.cpp
@@ -790,6 +790,10 @@
     case CapabilityStoragePushConstant16:       return "StoragePushConstant16";
     case CapabilityStorageInputOutput16:        return "StorageInputOutput16";
 
+    case CapabilityStorageBuffer8BitAccess:             return "CapabilityStorageBuffer8BitAccess";
+    case CapabilityUniformAndStorageBuffer8BitAccess:   return "CapabilityUniformAndStorageBuffer8BitAccess";
+    case CapabilityStoragePushConstant8:                return "CapabilityStoragePushConstant8";
+
     case CapabilityDeviceGroup: return "DeviceGroup";
     case CapabilityMultiView:   return "MultiView";
 
diff --git a/SPIRV/spirv.hpp b/SPIRV/spirv.hpp
old mode 100644
new mode 100755
index e21762d..f16c296
--- a/SPIRV/spirv.hpp
+++ b/SPIRV/spirv.hpp
@@ -679,6 +679,9 @@
     CapabilityVariablePointers = 4442,
     CapabilityAtomicStorageOps = 4445,
     CapabilitySampleMaskPostDepthCoverage = 4447,
+    CapabilityStorageBuffer8BitAccess = 4448,
+    CapabilityUniformAndStorageBuffer8BitAccess = 4449,
+    CapabilityStoragePushConstant8 = 4450,
     CapabilityFloat16ImageAMD = 5008,
     CapabilityImageGatherBiasLodAMD = 5009,
     CapabilityFragmentMaskAMD = 5010,
diff --git a/StandAlone/CMakeLists.txt b/StandAlone/CMakeLists.txt
index d500121..5cea53d 100755
--- a/StandAlone/CMakeLists.txt
+++ b/StandAlone/CMakeLists.txt
@@ -33,6 +33,7 @@
 
 target_link_libraries(glslangValidator ${LIBRARIES})
 target_link_libraries(spirv-remap ${LIBRARIES})
+target_include_directories(glslangValidator PUBLIC ../External)
 
 if(WIN32)
     source_group("Source" FILES ${SOURCES})
diff --git a/StandAlone/StandAlone.cpp b/StandAlone/StandAlone.cpp
old mode 100644
new mode 100755
index 6736dbc..a159bc8
--- a/StandAlone/StandAlone.cpp
+++ b/StandAlone/StandAlone.cpp
@@ -102,6 +102,7 @@
     EOptionDumpBareVersion      = (1 << 31),
 };
 bool targetHlslFunctionality1 = false;
+bool SpvToolsDisassembler = false;
 
 //
 // Return codes from main/exit().
@@ -506,6 +507,8 @@
                         sourceEntryPointName = argv[1];
                         bumpArg();
                         break;
+                    } else if (lowerword == "spirv-dis") {
+                        SpvToolsDisassembler = true;
                     } else if (lowerword == "stdin") {
                         Options |= EOptionStdin;
                         shaderStageName = argv[1];
@@ -734,17 +737,18 @@
 
     glslang::TWorkItem* workItem;
     if (Options & EOptionStdin) {
-        worklist.remove(workItem);
-        ShHandle compiler = ShConstructCompiler(FindLanguage("stdin"), Options);
-        if (compiler == 0)
-            return;
+        if (worklist.remove(workItem)) {
+            ShHandle compiler = ShConstructCompiler(FindLanguage("stdin"), Options);
+            if (compiler == nullptr)
+                return;
 
-        CompileFile("stdin", compiler);
+            CompileFile("stdin", compiler);
 
             if (! (Options & EOptionSuppressInfolog))
                 workItem->results = ShGetInfoLog(compiler);
 
-        ShDestruct(compiler);
+            ShDestruct(compiler);
+        }
     } else {
         while (worklist.remove(workItem)) {
             ShHandle compiler = ShConstructCompiler(FindLanguage(workItem->name), Options);
@@ -982,9 +986,15 @@
                         } else {
                             glslang::OutputSpvBin(spirv, GetBinaryName((EShLanguage)stage));
                         }
-                        if (Options & EOptionHumanReadableSpv) {
+#if ENABLE_OPT
+                        if (SpvToolsDisassembler)
+                            spv::SpirvToolsDisassemble(std::cout, spirv);
+#else
+                        if (SpvToolsDisassembler)
+                            printf("SPIRV-Tools is not enabled; use -H for human readable SPIR-V\n");
+#endif
+                        if (!SpvToolsDisassembler && (Options & EOptionHumanReadableSpv))
                             spv::Disassemble(std::cout, spirv);
-                        }
                     }
                 }
             }
@@ -1405,6 +1415,8 @@
            "  --shift-UBO-binding [stage] [num set]... per-descriptor-set shift values\n"
            "  --shift-cbuffer-binding [stage] num  synonym for --shift-UBO-binding\n"
            "  --shift-cbuffer-binding [stage] [num set]... per-descriptor-set shift values\n"
+           "  --spirv-dis                          output standard form disassembly; works only\n"
+           "                                       when a SPIR-V generation option is also used\n"
            "  --sub [stage] num                    synonym for --shift-UBO-binding\n"
            "  --source-entrypoint <name>           the given shader source function is\n"
            "                                       renamed to be the <name> given in -e\n"
diff --git a/Test/110scope.vert b/Test/110scope.vert
old mode 100644
new mode 100755
index e28db0f..86c27a5
--- a/Test/110scope.vert
+++ b/Test/110scope.vert
@@ -71,4 +71,17 @@
 

     int degrees;

     degrees(3.2);

+

+    {

+        S s;

+        s.x = 3;

+        struct S {   // okay, hides S

+            bool b;

+        };

+        S t;

+        t.b = true;

+        struct S {    // ERROR, redefinition of struct S

+            float f;

+        };

+    }

 }

diff --git a/Test/400.geom b/Test/400.geom
index d0a43d7..f8e8955 100755
--- a/Test/400.geom
+++ b/Test/400.geom
@@ -285,10 +285,10 @@
     dvec3v  += reflect(dvec3v, dvec3v);

     dvec4v  += reflect(dvec4v, dvec4v);

 

-    doublev += refract(doublev, doublev, 1.3);

-    dvec2v  += refract(dvec2v, dvec2v,   1.3);

-    dvec3v  += refract(dvec3v, dvec3v,   1.3);

-    dvec4v  += refract(dvec4v, dvec4v,   1.3);

+    doublev += refract(doublev, doublev, doublev);

+    dvec2v  += refract(dvec2v, dvec2v, doublev);

+    dvec3v  += refract(dvec3v, dvec3v, doublev);

+    dvec4v  += refract(dvec4v, dvec4v, doublev);

 

     dmat2   dmat2v   = outerProduct(dvec2v, dvec2v);

     dmat3   dmat3v   = outerProduct(dvec3v, dvec3v);

@@ -300,9 +300,9 @@
     dmat3x4 dmat3x4v = outerProduct(dvec4v, dvec3v);

     dmat4x3 dmat4x3v = outerProduct(dvec3v, dvec4v);

 

-    dmat2v *= matrixCompMult(dmat2v, dmat2v);
-    dmat3v *= matrixCompMult(dmat3v, dmat3v);
-    dmat4v *= matrixCompMult(dmat4v, dmat4v);
+    dmat2v *= matrixCompMult(dmat2v, dmat2v);

+    dmat3v *= matrixCompMult(dmat3v, dmat3v);

+    dmat4v *= matrixCompMult(dmat4v, dmat4v);

     dmat2x3v = matrixCompMult(dmat2x3v, dmat2x3v);

     dmat2x4v = matrixCompMult(dmat2x4v, dmat2x4v);

     dmat3x2v = matrixCompMult(dmat3x2v, dmat3x2v);

diff --git a/Test/baseLegalResults/hlsl.aliasOpaque.frag.out b/Test/baseLegalResults/hlsl.aliasOpaque.frag.out
index f877db6..e65ee7b 100644
--- a/Test/baseLegalResults/hlsl.aliasOpaque.frag.out
+++ b/Test/baseLegalResults/hlsl.aliasOpaque.frag.out
@@ -1,6 +1,6 @@
 hlsl.aliasOpaque.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 87
 
                               Capability Shader
diff --git a/Test/baseLegalResults/hlsl.flattenOpaque.frag.out b/Test/baseLegalResults/hlsl.flattenOpaque.frag.out
index ab9237b..cf3fbab 100644
--- a/Test/baseLegalResults/hlsl.flattenOpaque.frag.out
+++ b/Test/baseLegalResults/hlsl.flattenOpaque.frag.out
@@ -1,6 +1,6 @@
 hlsl.flattenOpaque.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 185
 
                               Capability Shader
diff --git a/Test/baseLegalResults/hlsl.flattenOpaqueInit.vert.out b/Test/baseLegalResults/hlsl.flattenOpaqueInit.vert.out
index 3d0a0bd..bec5aa2 100644
--- a/Test/baseLegalResults/hlsl.flattenOpaqueInit.vert.out
+++ b/Test/baseLegalResults/hlsl.flattenOpaqueInit.vert.out
@@ -1,6 +1,6 @@
 hlsl.flattenOpaqueInit.vert
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 134
 
                               Capability Shader
diff --git a/Test/baseLegalResults/hlsl.flattenOpaqueInitMix.vert.out b/Test/baseLegalResults/hlsl.flattenOpaqueInitMix.vert.out
index 9793d57..14d0cd3 100644
--- a/Test/baseLegalResults/hlsl.flattenOpaqueInitMix.vert.out
+++ b/Test/baseLegalResults/hlsl.flattenOpaqueInitMix.vert.out
@@ -1,6 +1,6 @@
 hlsl.flattenOpaqueInitMix.vert
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 97
 
                               Capability Shader
diff --git a/Test/baseLegalResults/hlsl.flattenSubset.frag.out b/Test/baseLegalResults/hlsl.flattenSubset.frag.out
index 617c719..143c96c 100755
--- a/Test/baseLegalResults/hlsl.flattenSubset.frag.out
+++ b/Test/baseLegalResults/hlsl.flattenSubset.frag.out
@@ -1,6 +1,6 @@
 hlsl.flattenSubset.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 66
 
                               Capability Shader
diff --git a/Test/baseLegalResults/hlsl.flattenSubset2.frag.out b/Test/baseLegalResults/hlsl.flattenSubset2.frag.out
index ef661ba..0d7ab56 100755
--- a/Test/baseLegalResults/hlsl.flattenSubset2.frag.out
+++ b/Test/baseLegalResults/hlsl.flattenSubset2.frag.out
@@ -1,6 +1,6 @@
 hlsl.flattenSubset2.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 53
 
                               Capability Shader
diff --git a/Test/baseLegalResults/hlsl.partialFlattenLocal.vert.out b/Test/baseLegalResults/hlsl.partialFlattenLocal.vert.out
index c479436..27482b3 100755
--- a/Test/baseLegalResults/hlsl.partialFlattenLocal.vert.out
+++ b/Test/baseLegalResults/hlsl.partialFlattenLocal.vert.out
@@ -1,6 +1,6 @@
 hlsl.partialFlattenLocal.vert
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 158
 
                               Capability Shader
diff --git a/Test/baseLegalResults/hlsl.partialFlattenMixed.vert.out b/Test/baseLegalResults/hlsl.partialFlattenMixed.vert.out
index 7e36eb9..e54fb7e 100755
--- a/Test/baseLegalResults/hlsl.partialFlattenMixed.vert.out
+++ b/Test/baseLegalResults/hlsl.partialFlattenMixed.vert.out
@@ -1,6 +1,6 @@
 hlsl.partialFlattenMixed.vert
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 36
 
                               Capability Shader
diff --git a/Test/baseResults/110scope.vert.out b/Test/baseResults/110scope.vert.out
index a07de4f..e23d3c0 100644
--- a/Test/baseResults/110scope.vert.out
+++ b/Test/baseResults/110scope.vert.out
@@ -2,7 +2,8 @@
 ERROR: 0:5: 'a' : redefinition 
 ERROR: 0:57: 'z' : undeclared identifier 
 ERROR: 0:57: 'z' : redefinition 
-ERROR: 3 compilation errors.  No code generated.
+ERROR: 0:83: 'S' : redefinition struct
+ERROR: 4 compilation errors.  No code generated.
 
 
 Shader version: 110
@@ -120,6 +121,21 @@
 0:69            0 (const int)
 0:73      Constant:
 0:73        183.346494
+0:?       Sequence
+0:77        move second child to first child ( temp int)
+0:77          x: direct index for structure ( temp int)
+0:77            's' ( temp structure{ temp int x})
+0:77            Constant:
+0:77              0 (const int)
+0:77          Constant:
+0:77            3 (const int)
+0:82        move second child to first child ( temp bool)
+0:82          b: direct index for structure ( temp bool)
+0:82            't' ( temp structure{ temp bool b})
+0:82            Constant:
+0:82              0 (const int)
+0:82          Constant:
+0:82            true (const bool)
 0:?   Linker Objects
 0:?     'b' ( global bool)
 0:?     'c' ( global bool)
@@ -236,6 +252,21 @@
 0:69            0 (const int)
 0:73      Constant:
 0:73        183.346494
+0:?       Sequence
+0:77        move second child to first child ( temp int)
+0:77          x: direct index for structure ( temp int)
+0:77            's' ( temp structure{ temp int x})
+0:77            Constant:
+0:77              0 (const int)
+0:77          Constant:
+0:77            3 (const int)
+0:82        move second child to first child ( temp bool)
+0:82          b: direct index for structure ( temp bool)
+0:82            't' ( temp structure{ temp bool b})
+0:82            Constant:
+0:82              0 (const int)
+0:82          Constant:
+0:82            true (const bool)
 0:?   Linker Objects
 0:?     'b' ( global bool)
 0:?     'c' ( global bool)
diff --git a/Test/baseResults/120.frag.out b/Test/baseResults/120.frag.out
index e63c001..8909f16 100644
--- a/Test/baseResults/120.frag.out
+++ b/Test/baseResults/120.frag.out
@@ -52,13 +52,12 @@
 ERROR: 0:212: 'sampler2DRect' : Reserved word. 
 ERROR: 0:244: ':' :  wrong operand types: no operation ':' exists that takes a left-hand operand of type ' global void' and a right operand of type ' const int' (or there is no acceptable conversion)
 ERROR: 0:245: ':' :  wrong operand types: no operation ':' exists that takes a left-hand operand of type ' const int' and a right operand of type ' global void' (or there is no acceptable conversion)
-ERROR: 0:248: 'explicit types' : required extension not requested: Possible extensions include:
+ERROR: 0:248: 'half floating-point suffix' : required extension not requested: Possible extensions include:
 GL_AMD_gpu_shader_half_float
 GL_KHX_shader_explicit_arithmetic_types
 GL_KHX_shader_explicit_arithmetic_types_float16
-ERROR: 0:248: 'half floating-point suffix' : not supported with this profile: none
 ERROR: 0:248: '' :  syntax error, unexpected IDENTIFIER, expecting COMMA or SEMICOLON
-ERROR: 56 compilation errors.  No code generated.
+ERROR: 55 compilation errors.  No code generated.
 
 
 Shader version: 120
diff --git a/Test/baseResults/400.geom.out b/Test/baseResults/400.geom.out
index d8f95f9..52ebebc 100644
--- a/Test/baseResults/400.geom.out
+++ b/Test/baseResults/400.geom.out
@@ -844,29 +844,25 @@
 0:288        refract ( global double)
 0:288          'doublev' ( temp double)
 0:288          'doublev' ( temp double)
-0:288          Constant:
-0:288            1.300000
+0:288          'doublev' ( temp double)
 0:289      add second child into first child ( temp 2-component vector of double)
 0:289        'dvec2v' ( temp 2-component vector of double)
 0:289        refract ( global 2-component vector of double)
 0:289          'dvec2v' ( temp 2-component vector of double)
 0:289          'dvec2v' ( temp 2-component vector of double)
-0:289          Constant:
-0:289            1.300000
+0:289          'doublev' ( temp double)
 0:290      add second child into first child ( temp 3-component vector of double)
 0:290        'dvec3v' ( temp 3-component vector of double)
 0:290        refract ( global 3-component vector of double)
 0:290          'dvec3v' ( temp 3-component vector of double)
 0:290          'dvec3v' ( temp 3-component vector of double)
-0:290          Constant:
-0:290            1.300000
+0:290          'doublev' ( temp double)
 0:291      add second child into first child ( temp 4-component vector of double)
 0:291        'dvec4v' ( temp 4-component vector of double)
 0:291        refract ( global 4-component vector of double)
 0:291          'dvec4v' ( temp 4-component vector of double)
 0:291          'dvec4v' ( temp 4-component vector of double)
-0:291          Constant:
-0:291            1.300000
+0:291          'doublev' ( temp double)
 0:293      Sequence
 0:293        move second child to first child ( temp 2X2 matrix of double)
 0:293          'dmat2v' ( temp 2X2 matrix of double)
diff --git a/Test/baseResults/compoundsuffix.frag.hlsl b/Test/baseResults/compoundsuffix.frag.hlsl
index c3d1d97..f47c97d 100644
--- a/Test/baseResults/compoundsuffix.frag.hlsl
+++ b/Test/baseResults/compoundsuffix.frag.hlsl
@@ -1,6 +1,6 @@
 compoundsuffix.frag.hlsl

 // Module Version 10000

-// Generated by (magic number): 80006

+// Generated by (magic number): 80007

 // Id's are bound by 22

 

                               Capability Shader

diff --git a/Test/baseResults/constFold.frag.out b/Test/baseResults/constFold.frag.out
index 33cfcba..2a48c42 100644
--- a/Test/baseResults/constFold.frag.out
+++ b/Test/baseResults/constFold.frag.out
@@ -179,6 +179,10 @@
 0:83        2147483647 (const int)
 0:84      Constant:
 0:84        +1.#INF
+0:84      Constant:
+0:84        -1.#INF
+0:84      Constant:
+0:84        1.#IND
 0:88      Constant:
 0:88        2 (const uint)
 0:88        3 (const uint)
diff --git a/Test/baseResults/cppBad2.vert.out b/Test/baseResults/cppBad2.vert.out
index 0398e5e..af9ff38 100755
--- a/Test/baseResults/cppBad2.vert.out
+++ b/Test/baseResults/cppBad2.vert.out
@@ -1,7 +1,6 @@
 cppBad2.vert
 ERROR: 0:3: 'macro expansion' : End of input in macro b
-ERROR: 0:3: '' : compilation terminated 
-ERROR: 2 compilation errors.  No code generated.
+ERROR: 1 compilation errors.  No code generated.
 
 
 Shader version: 100
diff --git a/Test/baseResults/glsl.entryPointRename.vert.bad.out b/Test/baseResults/glsl.entryPointRename.vert.bad.out
index 0162324..c7ea97e 100644
--- a/Test/baseResults/glsl.entryPointRename.vert.bad.out
+++ b/Test/baseResults/glsl.entryPointRename.vert.bad.out
@@ -2,7 +2,7 @@
 ERROR: Source entry point must be "main"
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 20
 
                               Capability Shader
diff --git a/Test/baseResults/glsl.entryPointRename.vert.out b/Test/baseResults/glsl.entryPointRename.vert.out
index 3dc296c..3dbe13b 100644
--- a/Test/baseResults/glsl.entryPointRename.vert.out
+++ b/Test/baseResults/glsl.entryPointRename.vert.out
@@ -1,6 +1,6 @@
 glsl.entryPointRename.vert
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 20
 
                               Capability Shader
diff --git a/Test/baseResults/glspv.version.frag.out b/Test/baseResults/glspv.version.frag.out
index 7805cfc..4a45b5b 100755
--- a/Test/baseResults/glspv.version.frag.out
+++ b/Test/baseResults/glspv.version.frag.out
@@ -2,7 +2,7 @@
 ERROR: #version: compilation for SPIR-V does not support the compatibility profile
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 6
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.PointSize.geom.out b/Test/baseResults/hlsl.PointSize.geom.out
index c92bc31..0d18f1f 100755
--- a/Test/baseResults/hlsl.PointSize.geom.out
+++ b/Test/baseResults/hlsl.PointSize.geom.out
@@ -70,7 +70,7 @@
 0:?     'OutputStream.ps' ( out float PointSize)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 36
 
                               Capability Geometry
diff --git a/Test/baseResults/hlsl.PointSize.vert.out b/Test/baseResults/hlsl.PointSize.vert.out
index f2221ad..bda0030 100755
--- a/Test/baseResults/hlsl.PointSize.vert.out
+++ b/Test/baseResults/hlsl.PointSize.vert.out
@@ -38,7 +38,7 @@
 0:?     '@entryPointOutput' ( out float PointSize)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 16
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.aliasOpaque.frag.out b/Test/baseResults/hlsl.aliasOpaque.frag.out
index b4980ab..9928278 100755
--- a/Test/baseResults/hlsl.aliasOpaque.frag.out
+++ b/Test/baseResults/hlsl.aliasOpaque.frag.out
@@ -143,7 +143,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 64
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.amend.frag.out b/Test/baseResults/hlsl.amend.frag.out
index 75c0104..fa4ad03 100755
--- a/Test/baseResults/hlsl.amend.frag.out
+++ b/Test/baseResults/hlsl.amend.frag.out
@@ -160,7 +160,7 @@
 0:?     'm' ( global 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 57
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.array.flatten.frag.out b/Test/baseResults/hlsl.array.flatten.frag.out
index 71cd23b..4c8609c 100644
--- a/Test/baseResults/hlsl.array.flatten.frag.out
+++ b/Test/baseResults/hlsl.array.flatten.frag.out
@@ -345,7 +345,7 @@
 0:?     'ps_output.color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 143
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.array.frag.out b/Test/baseResults/hlsl.array.frag.out
index aef21e0..0f68e7c 100755
--- a/Test/baseResults/hlsl.array.frag.out
+++ b/Test/baseResults/hlsl.array.frag.out
@@ -290,7 +290,7 @@
 0:?     'input' (layout( location=1) in 3-element array of 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 126
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.array.implicit-size.frag.out b/Test/baseResults/hlsl.array.implicit-size.frag.out
index 118531c..9af6fed 100644
--- a/Test/baseResults/hlsl.array.implicit-size.frag.out
+++ b/Test/baseResults/hlsl.array.implicit-size.frag.out
@@ -163,7 +163,7 @@
 0:?     'g_mystruct' ( global 2-element array of structure{ temp int i,  temp float f})
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 72
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.array.multidim.frag.out b/Test/baseResults/hlsl.array.multidim.frag.out
index 339a78a..59f64c0 100644
--- a/Test/baseResults/hlsl.array.multidim.frag.out
+++ b/Test/baseResults/hlsl.array.multidim.frag.out
@@ -134,7 +134,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 57
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.assoc.frag.out b/Test/baseResults/hlsl.assoc.frag.out
index 3abe7b1..562a863 100755
--- a/Test/baseResults/hlsl.assoc.frag.out
+++ b/Test/baseResults/hlsl.assoc.frag.out
@@ -132,7 +132,7 @@
 0:?     'a5' (layout( location=4) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 58
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.attribute.expression.comp.out b/Test/baseResults/hlsl.attribute.expression.comp.out
index 52de102..4bef5e7 100644
--- a/Test/baseResults/hlsl.attribute.expression.comp.out
+++ b/Test/baseResults/hlsl.attribute.expression.comp.out
@@ -82,7 +82,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 39
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.attribute.frag.out b/Test/baseResults/hlsl.attribute.frag.out
index 6a3b170..44e963e 100755
--- a/Test/baseResults/hlsl.attribute.frag.out
+++ b/Test/baseResults/hlsl.attribute.frag.out
@@ -50,7 +50,7 @@
 0:?     'input' (layout( location=0) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 24
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.attributeC11.frag.out b/Test/baseResults/hlsl.attributeC11.frag.out
index 19b8c0d..becb500 100755
--- a/Test/baseResults/hlsl.attributeC11.frag.out
+++ b/Test/baseResults/hlsl.attributeC11.frag.out
@@ -94,7 +94,7 @@
 0:?     'input' (layout( location=8) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 51
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.attributeGlobalBuffer.frag.out b/Test/baseResults/hlsl.attributeGlobalBuffer.frag.out
index 365f4e8..e378447 100755
--- a/Test/baseResults/hlsl.attributeGlobalBuffer.frag.out
+++ b/Test/baseResults/hlsl.attributeGlobalBuffer.frag.out
@@ -56,7 +56,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 28
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.automap.frag.out b/Test/baseResults/hlsl.automap.frag.out
index 7664bf6..b9ab49c 100644
--- a/Test/baseResults/hlsl.automap.frag.out
+++ b/Test/baseResults/hlsl.automap.frag.out
@@ -1,29 +1,29 @@
 hlsl.automap.frag
 Uniform reflection:
-t1: offset -1, type 8b5d, size 1, index -1, binding 11
-t2: offset -1, type 8b5e, size 1, index -1, binding 12
-t3: offset -1, type 8b5f, size 1, index -1, binding 13
-t4.@data: offset 0, type 8b52, size 1, index 0, binding -1
-t5.@data: offset 0, type 1405, size 0, index 1, binding -1
-t6: offset -1, type 8dc2, size 1, index -1, binding 16
-s1: offset -1, type 0, size 1, index -1, binding 31
-s2: offset -1, type 0, size 1, index -1, binding 32
-u1: offset -1, type 904c, size 1, index -1, binding 41
-u2: offset -1, type 904d, size 1, index -1, binding 42
-u3: offset -1, type 904e, size 1, index -1, binding 43
-u4: offset -1, type 9051, size 1, index -1, binding 44
-u5.@data: offset 0, type 1405, size 0, index 2, binding -1
-u6.@data: offset 0, type 1406, size 1, index 3, binding -1
-cb1: offset 0, type 1404, size 1, index 4, binding -1
-tb1: offset 0, type 1404, size 1, index 5, binding -1
+t1: offset -1, type 8b5d, size 1, index -1, binding 11, stages 16
+t2: offset -1, type 8b5e, size 1, index -1, binding 12, stages 16
+t3: offset -1, type 8b5f, size 1, index -1, binding 13, stages 16
+t4.@data: offset 0, type 8b52, size 1, index 0, binding -1, stages 16
+t5.@data: offset 0, type 1405, size 0, index 1, binding -1, stages 16
+t6: offset -1, type 8dc2, size 1, index -1, binding 16, stages 16
+s1: offset -1, type 0, size 1, index -1, binding 31, stages 16
+s2: offset -1, type 0, size 1, index -1, binding 32, stages 16
+u1: offset -1, type 904c, size 1, index -1, binding 41, stages 16
+u2: offset -1, type 904d, size 1, index -1, binding 42, stages 16
+u3: offset -1, type 904e, size 1, index -1, binding 43, stages 16
+u4: offset -1, type 9051, size 1, index -1, binding 44, stages 16
+u5.@data: offset 0, type 1405, size 0, index 2, binding -1, stages 16
+u6.@data: offset 0, type 1406, size 1, index 3, binding -1, stages 16
+cb1: offset 0, type 1404, size 1, index 4, binding -1, stages 16
+tb1: offset 0, type 1404, size 1, index 5, binding -1, stages 16
 
 Uniform block reflection:
-t4: offset -1, type ffffffff, size 0, index -1, binding 14
-t5: offset -1, type ffffffff, size 0, index -1, binding 15
-u5: offset -1, type ffffffff, size 0, index -1, binding 45
-u6: offset -1, type ffffffff, size 0, index -1, binding 46
-cb: offset -1, type ffffffff, size 4, index -1, binding 51
-tb: offset -1, type ffffffff, size 4, index -1, binding 17
+t4: offset -1, type ffffffff, size 0, index -1, binding 14, stages 0
+t5: offset -1, type ffffffff, size 0, index -1, binding 15, stages 0
+u5: offset -1, type ffffffff, size 0, index -1, binding 45, stages 0
+u6: offset -1, type ffffffff, size 0, index -1, binding 46, stages 0
+cb: offset -1, type ffffffff, size 4, index -1, binding 51, stages 0
+tb: offset -1, type ffffffff, size 4, index -1, binding 17, stages 0
 
 Vertex attribute reflection:
 
diff --git a/Test/baseResults/hlsl.basic.comp.out b/Test/baseResults/hlsl.basic.comp.out
index 884c64c..d84642e 100755
--- a/Test/baseResults/hlsl.basic.comp.out
+++ b/Test/baseResults/hlsl.basic.comp.out
@@ -64,7 +64,7 @@
 0:?     'gti' ( in 3-component vector of int LocalInvocationID)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 38
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.basic.geom.out b/Test/baseResults/hlsl.basic.geom.out
index 55d8541..f4116d4 100644
--- a/Test/baseResults/hlsl.basic.geom.out
+++ b/Test/baseResults/hlsl.basic.geom.out
@@ -188,7 +188,7 @@
 0:?     'OutputStream.something' (layout( location=1) out int)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 68
 
                               Capability Geometry
diff --git a/Test/baseResults/hlsl.boolConv.vert.out b/Test/baseResults/hlsl.boolConv.vert.out
index 231ebf6..d88955f 100755
--- a/Test/baseResults/hlsl.boolConv.vert.out
+++ b/Test/baseResults/hlsl.boolConv.vert.out
@@ -204,7 +204,7 @@
 0:?     '@entryPointOutput' ( out 4-component vector of float Position)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 99
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.buffer.frag.out b/Test/baseResults/hlsl.buffer.frag.out
index 454c8ae..8d2c514 100755
--- a/Test/baseResults/hlsl.buffer.frag.out
+++ b/Test/baseResults/hlsl.buffer.frag.out
@@ -146,7 +146,7 @@
 0:?     'input' ( in 4-component vector of float FragCoord)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 73
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.calculatelod.dx10.frag.out b/Test/baseResults/hlsl.calculatelod.dx10.frag.out
index cdaf3bf..46b4eea 100644
--- a/Test/baseResults/hlsl.calculatelod.dx10.frag.out
+++ b/Test/baseResults/hlsl.calculatelod.dx10.frag.out
@@ -358,7 +358,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 148
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.calculatelodunclamped.dx10.frag.out b/Test/baseResults/hlsl.calculatelodunclamped.dx10.frag.out
index 160c095..ef5aabe 100644
--- a/Test/baseResults/hlsl.calculatelodunclamped.dx10.frag.out
+++ b/Test/baseResults/hlsl.calculatelodunclamped.dx10.frag.out
@@ -1,20 +1,8 @@
 hlsl.calculatelodunclamped.dx10.frag
-ERROR: 0:28: '' : unimplemented: CalculateLevelOfDetailUnclamped 
-ERROR: 0:29: '' : unimplemented: CalculateLevelOfDetailUnclamped 
-ERROR: 0:30: '' : unimplemented: CalculateLevelOfDetailUnclamped 
-ERROR: 0:32: '' : unimplemented: CalculateLevelOfDetailUnclamped 
-ERROR: 0:33: '' : unimplemented: CalculateLevelOfDetailUnclamped 
-ERROR: 0:34: '' : unimplemented: CalculateLevelOfDetailUnclamped 
-ERROR: 0:36: '' : unimplemented: CalculateLevelOfDetailUnclamped 
-ERROR: 0:37: '' : unimplemented: CalculateLevelOfDetailUnclamped 
-ERROR: 0:38: '' : unimplemented: CalculateLevelOfDetailUnclamped 
-ERROR: 9 compilation errors.  No code generated.
-
-
 Shader version: 500
 gl_FragCoord origin is upper left
 using depth_any
-ERROR: node is still EOpNull!
+0:? Sequence
 0:24  Function Definition: @main( ( temp structure{ temp 4-component vector of float Color,  temp float Depth})
 0:24    Function Parameters: 
 0:?     Sequence
@@ -29,7 +17,7 @@
 0:28              Constant:
 0:28                0.100000
 0:28            Constant:
-0:28              0 (const int)
+0:28              1 (const int)
 0:29      Sequence
 0:29        move second child to first child ( temp float)
 0:29          'txval11' ( temp float)
@@ -41,7 +29,7 @@
 0:29              Constant:
 0:29                0.200000
 0:29            Constant:
-0:29              0 (const int)
+0:29              1 (const int)
 0:30      Sequence
 0:30        move second child to first child ( temp float)
 0:30          'txval12' ( temp float)
@@ -53,7 +41,7 @@
 0:30              Constant:
 0:30                0.300000
 0:30            Constant:
-0:30              0 (const int)
+0:30              1 (const int)
 0:32      Sequence
 0:32        move second child to first child ( temp float)
 0:32          'txval20' ( temp float)
@@ -66,7 +54,7 @@
 0:?                 0.100000
 0:?                 0.200000
 0:32            Constant:
-0:32              0 (const int)
+0:32              1 (const int)
 0:33      Sequence
 0:33        move second child to first child ( temp float)
 0:33          'txval21' ( temp float)
@@ -79,7 +67,7 @@
 0:?                 0.300000
 0:?                 0.400000
 0:33            Constant:
-0:33              0 (const int)
+0:33              1 (const int)
 0:34      Sequence
 0:34        move second child to first child ( temp float)
 0:34          'txval22' ( temp float)
@@ -92,7 +80,7 @@
 0:?                 0.500000
 0:?                 0.600000
 0:34            Constant:
-0:34              0 (const int)
+0:34              1 (const int)
 0:36      Sequence
 0:36        move second child to first child ( temp float)
 0:36          'txval40' ( temp float)
@@ -106,7 +94,7 @@
 0:?                 0.200000
 0:?                 0.300000
 0:36            Constant:
-0:36              0 (const int)
+0:36              1 (const int)
 0:37      Sequence
 0:37        move second child to first child ( temp float)
 0:37          'txval41' ( temp float)
@@ -120,7 +108,7 @@
 0:?                 0.500000
 0:?                 0.600000
 0:37            Constant:
-0:37              0 (const int)
+0:37              1 (const int)
 0:38      Sequence
 0:38        move second child to first child ( temp float)
 0:38          'txval42' ( temp float)
@@ -134,7 +122,7 @@
 0:?                 0.800000
 0:?                 0.900000
 0:38            Constant:
-0:38              0 (const int)
+0:38              1 (const int)
 0:40      move second child to first child ( temp 4-component vector of float)
 0:40        Color: direct index for structure ( temp 4-component vector of float)
 0:40          'psout' ( temp structure{ temp 4-component vector of float Color,  temp float Depth})
@@ -195,7 +183,7 @@
 Shader version: 500
 gl_FragCoord origin is upper left
 using depth_any
-ERROR: node is still EOpNull!
+0:? Sequence
 0:24  Function Definition: @main( ( temp structure{ temp 4-component vector of float Color,  temp float Depth})
 0:24    Function Parameters: 
 0:?     Sequence
@@ -210,7 +198,7 @@
 0:28              Constant:
 0:28                0.100000
 0:28            Constant:
-0:28              0 (const int)
+0:28              1 (const int)
 0:29      Sequence
 0:29        move second child to first child ( temp float)
 0:29          'txval11' ( temp float)
@@ -222,7 +210,7 @@
 0:29              Constant:
 0:29                0.200000
 0:29            Constant:
-0:29              0 (const int)
+0:29              1 (const int)
 0:30      Sequence
 0:30        move second child to first child ( temp float)
 0:30          'txval12' ( temp float)
@@ -234,7 +222,7 @@
 0:30              Constant:
 0:30                0.300000
 0:30            Constant:
-0:30              0 (const int)
+0:30              1 (const int)
 0:32      Sequence
 0:32        move second child to first child ( temp float)
 0:32          'txval20' ( temp float)
@@ -247,7 +235,7 @@
 0:?                 0.100000
 0:?                 0.200000
 0:32            Constant:
-0:32              0 (const int)
+0:32              1 (const int)
 0:33      Sequence
 0:33        move second child to first child ( temp float)
 0:33          'txval21' ( temp float)
@@ -260,7 +248,7 @@
 0:?                 0.300000
 0:?                 0.400000
 0:33            Constant:
-0:33              0 (const int)
+0:33              1 (const int)
 0:34      Sequence
 0:34        move second child to first child ( temp float)
 0:34          'txval22' ( temp float)
@@ -273,7 +261,7 @@
 0:?                 0.500000
 0:?                 0.600000
 0:34            Constant:
-0:34              0 (const int)
+0:34              1 (const int)
 0:36      Sequence
 0:36        move second child to first child ( temp float)
 0:36          'txval40' ( temp float)
@@ -287,7 +275,7 @@
 0:?                 0.200000
 0:?                 0.300000
 0:36            Constant:
-0:36              0 (const int)
+0:36              1 (const int)
 0:37      Sequence
 0:37        move second child to first child ( temp float)
 0:37          'txval41' ( temp float)
@@ -301,7 +289,7 @@
 0:?                 0.500000
 0:?                 0.600000
 0:37            Constant:
-0:37              0 (const int)
+0:37              1 (const int)
 0:38      Sequence
 0:38        move second child to first child ( temp float)
 0:38          'txval42' ( temp float)
@@ -315,7 +303,7 @@
 0:?                 0.800000
 0:?                 0.900000
 0:38            Constant:
-0:38              0 (const int)
+0:38              1 (const int)
 0:40      move second child to first child ( temp 4-component vector of float)
 0:40        Color: direct index for structure ( temp 4-component vector of float)
 0:40          'psout' ( temp structure{ temp 4-component vector of float Color,  temp float Depth})
@@ -369,4 +357,224 @@
 0:?     '@entryPointOutput.Depth' ( out float FragDepth)
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
-SPIR-V is not generated for failed compile or link
+// Module Version 10000
+// Generated by (magic number): 80007
+// Id's are bound by 148
+
+                              Capability Shader
+                              Capability Sampled1D
+                              Capability SampledCubeArray
+                              Capability ImageQuery
+               1:             ExtInstImport  "GLSL.std.450"
+                              MemoryModel Logical GLSL450
+                              EntryPoint Fragment 4  "main" 140 144
+                              ExecutionMode 4 OriginUpperLeft
+                              ExecutionMode 4 DepthReplacing
+                              Source HLSL 500
+                              Name 4  "main"
+                              Name 8  "PS_OUTPUT"
+                              MemberName 8(PS_OUTPUT) 0  "Color"
+                              MemberName 8(PS_OUTPUT) 1  "Depth"
+                              Name 10  "@main("
+                              Name 13  "txval10"
+                              Name 16  "g_tTex1df4a"
+                              Name 20  "g_sSamp"
+                              Name 30  "txval11"
+                              Name 33  "g_tTex1di4a"
+                              Name 41  "txval12"
+                              Name 45  "g_tTex1du4a"
+                              Name 53  "txval20"
+                              Name 56  "g_tTex2df4a"
+                              Name 64  "txval21"
+                              Name 67  "g_tTex2di4a"
+                              Name 76  "txval22"
+                              Name 79  "g_tTex2du4a"
+                              Name 89  "txval40"
+                              Name 92  "g_tTexcdf4a"
+                              Name 101  "txval41"
+                              Name 104  "g_tTexcdi4a"
+                              Name 112  "txval42"
+                              Name 115  "g_tTexcdu4a"
+                              Name 127  "psout"
+                              Name 137  "flattenTemp"
+                              Name 140  "@entryPointOutput.Color"
+                              Name 144  "@entryPointOutput.Depth"
+                              Name 147  "g_tTex1df4"
+                              Decorate 16(g_tTex1df4a) DescriptorSet 0
+                              Decorate 16(g_tTex1df4a) Binding 1
+                              Decorate 20(g_sSamp) DescriptorSet 0
+                              Decorate 20(g_sSamp) Binding 0
+                              Decorate 33(g_tTex1di4a) DescriptorSet 0
+                              Decorate 45(g_tTex1du4a) DescriptorSet 0
+                              Decorate 56(g_tTex2df4a) DescriptorSet 0
+                              Decorate 67(g_tTex2di4a) DescriptorSet 0
+                              Decorate 79(g_tTex2du4a) DescriptorSet 0
+                              Decorate 92(g_tTexcdf4a) DescriptorSet 0
+                              Decorate 104(g_tTexcdi4a) DescriptorSet 0
+                              Decorate 115(g_tTexcdu4a) DescriptorSet 0
+                              Decorate 140(@entryPointOutput.Color) Location 0
+                              Decorate 144(@entryPointOutput.Depth) BuiltIn FragDepth
+                              Decorate 147(g_tTex1df4) DescriptorSet 0
+                              Decorate 147(g_tTex1df4) Binding 0
+               2:             TypeVoid
+               3:             TypeFunction 2
+               6:             TypeFloat 32
+               7:             TypeVector 6(float) 4
+    8(PS_OUTPUT):             TypeStruct 7(fvec4) 6(float)
+               9:             TypeFunction 8(PS_OUTPUT)
+              12:             TypePointer Function 6(float)
+              14:             TypeImage 6(float) 1D array sampled format:Unknown
+              15:             TypePointer UniformConstant 14
+ 16(g_tTex1df4a):     15(ptr) Variable UniformConstant
+              18:             TypeSampler
+              19:             TypePointer UniformConstant 18
+     20(g_sSamp):     19(ptr) Variable UniformConstant
+              22:             TypeSampledImage 14
+              24:    6(float) Constant 1036831949
+              25:             TypeVector 6(float) 2
+              27:             TypeInt 32 1
+              28:     27(int) Constant 1
+              31:             TypeImage 27(int) 1D array sampled format:Unknown
+              32:             TypePointer UniformConstant 31
+ 33(g_tTex1di4a):     32(ptr) Variable UniformConstant
+              36:             TypeSampledImage 31
+              38:    6(float) Constant 1045220557
+              42:             TypeInt 32 0
+              43:             TypeImage 42(int) 1D array sampled format:Unknown
+              44:             TypePointer UniformConstant 43
+ 45(g_tTex1du4a):     44(ptr) Variable UniformConstant
+              48:             TypeSampledImage 43
+              50:    6(float) Constant 1050253722
+              54:             TypeImage 6(float) 2D array sampled format:Unknown
+              55:             TypePointer UniformConstant 54
+ 56(g_tTex2df4a):     55(ptr) Variable UniformConstant
+              59:             TypeSampledImage 54
+              61:   25(fvec2) ConstantComposite 24 38
+              65:             TypeImage 27(int) 2D array sampled format:Unknown
+              66:             TypePointer UniformConstant 65
+ 67(g_tTex2di4a):     66(ptr) Variable UniformConstant
+              70:             TypeSampledImage 65
+              72:    6(float) Constant 1053609165
+              73:   25(fvec2) ConstantComposite 50 72
+              77:             TypeImage 42(int) 2D array sampled format:Unknown
+              78:             TypePointer UniformConstant 77
+ 79(g_tTex2du4a):     78(ptr) Variable UniformConstant
+              82:             TypeSampledImage 77
+              84:    6(float) Constant 1056964608
+              85:    6(float) Constant 1058642330
+              86:   25(fvec2) ConstantComposite 84 85
+              90:             TypeImage 6(float) Cube array sampled format:Unknown
+              91:             TypePointer UniformConstant 90
+ 92(g_tTexcdf4a):     91(ptr) Variable UniformConstant
+              95:             TypeSampledImage 90
+              97:             TypeVector 6(float) 3
+              98:   97(fvec3) ConstantComposite 24 38 50
+             102:             TypeImage 27(int) Cube array sampled format:Unknown
+             103:             TypePointer UniformConstant 102
+104(g_tTexcdi4a):    103(ptr) Variable UniformConstant
+             107:             TypeSampledImage 102
+             109:   97(fvec3) ConstantComposite 72 84 85
+             113:             TypeImage 42(int) Cube array sampled format:Unknown
+             114:             TypePointer UniformConstant 113
+115(g_tTexcdu4a):    114(ptr) Variable UniformConstant
+             118:             TypeSampledImage 113
+             120:    6(float) Constant 1060320051
+             121:    6(float) Constant 1061997773
+             122:    6(float) Constant 1063675494
+             123:   97(fvec3) ConstantComposite 120 121 122
+             126:             TypePointer Function 8(PS_OUTPUT)
+             128:     27(int) Constant 0
+             129:    6(float) Constant 1065353216
+             130:    7(fvec4) ConstantComposite 129 129 129 129
+             131:             TypePointer Function 7(fvec4)
+             139:             TypePointer Output 7(fvec4)
+140(@entryPointOutput.Color):    139(ptr) Variable Output
+             143:             TypePointer Output 6(float)
+144(@entryPointOutput.Depth):    143(ptr) Variable Output
+ 147(g_tTex1df4):     15(ptr) Variable UniformConstant
+         4(main):           2 Function None 3
+               5:             Label
+137(flattenTemp):    126(ptr) Variable Function
+             138:8(PS_OUTPUT) FunctionCall 10(@main()
+                              Store 137(flattenTemp) 138
+             141:    131(ptr) AccessChain 137(flattenTemp) 128
+             142:    7(fvec4) Load 141
+                              Store 140(@entryPointOutput.Color) 142
+             145:     12(ptr) AccessChain 137(flattenTemp) 28
+             146:    6(float) Load 145
+                              Store 144(@entryPointOutput.Depth) 146
+                              Return
+                              FunctionEnd
+      10(@main():8(PS_OUTPUT) Function None 9
+              11:             Label
+     13(txval10):     12(ptr) Variable Function
+     30(txval11):     12(ptr) Variable Function
+     41(txval12):     12(ptr) Variable Function
+     53(txval20):     12(ptr) Variable Function
+     64(txval21):     12(ptr) Variable Function
+     76(txval22):     12(ptr) Variable Function
+     89(txval40):     12(ptr) Variable Function
+    101(txval41):     12(ptr) Variable Function
+    112(txval42):     12(ptr) Variable Function
+      127(psout):    126(ptr) Variable Function
+              17:          14 Load 16(g_tTex1df4a)
+              21:          18 Load 20(g_sSamp)
+              23:          22 SampledImage 17 21
+              26:   25(fvec2) ImageQueryLod 23 24
+              29:    6(float) CompositeExtract 26 1
+                              Store 13(txval10) 29
+              34:          31 Load 33(g_tTex1di4a)
+              35:          18 Load 20(g_sSamp)
+              37:          36 SampledImage 34 35
+              39:   25(fvec2) ImageQueryLod 37 38
+              40:    6(float) CompositeExtract 39 1
+                              Store 30(txval11) 40
+              46:          43 Load 45(g_tTex1du4a)
+              47:          18 Load 20(g_sSamp)
+              49:          48 SampledImage 46 47
+              51:   25(fvec2) ImageQueryLod 49 50
+              52:    6(float) CompositeExtract 51 1
+                              Store 41(txval12) 52
+              57:          54 Load 56(g_tTex2df4a)
+              58:          18 Load 20(g_sSamp)
+              60:          59 SampledImage 57 58
+              62:   25(fvec2) ImageQueryLod 60 61
+              63:    6(float) CompositeExtract 62 1
+                              Store 53(txval20) 63
+              68:          65 Load 67(g_tTex2di4a)
+              69:          18 Load 20(g_sSamp)
+              71:          70 SampledImage 68 69
+              74:   25(fvec2) ImageQueryLod 71 73
+              75:    6(float) CompositeExtract 74 1
+                              Store 64(txval21) 75
+              80:          77 Load 79(g_tTex2du4a)
+              81:          18 Load 20(g_sSamp)
+              83:          82 SampledImage 80 81
+              87:   25(fvec2) ImageQueryLod 83 86
+              88:    6(float) CompositeExtract 87 1
+                              Store 76(txval22) 88
+              93:          90 Load 92(g_tTexcdf4a)
+              94:          18 Load 20(g_sSamp)
+              96:          95 SampledImage 93 94
+              99:   25(fvec2) ImageQueryLod 96 98
+             100:    6(float) CompositeExtract 99 1
+                              Store 89(txval40) 100
+             105:         102 Load 104(g_tTexcdi4a)
+             106:          18 Load 20(g_sSamp)
+             108:         107 SampledImage 105 106
+             110:   25(fvec2) ImageQueryLod 108 109
+             111:    6(float) CompositeExtract 110 1
+                              Store 101(txval41) 111
+             116:         113 Load 115(g_tTexcdu4a)
+             117:          18 Load 20(g_sSamp)
+             119:         118 SampledImage 116 117
+             124:   25(fvec2) ImageQueryLod 119 123
+             125:    6(float) CompositeExtract 124 1
+                              Store 112(txval42) 125
+             132:    131(ptr) AccessChain 127(psout) 128
+                              Store 132 130
+             133:     12(ptr) AccessChain 127(psout) 28
+                              Store 133 129
+             134:8(PS_OUTPUT) Load 127(psout)
+                              ReturnValue 134
+                              FunctionEnd
diff --git a/Test/baseResults/hlsl.cast.frag.out b/Test/baseResults/hlsl.cast.frag.out
index 9eccd51..0aa11be 100755
--- a/Test/baseResults/hlsl.cast.frag.out
+++ b/Test/baseResults/hlsl.cast.frag.out
@@ -70,7 +70,7 @@
 0:?     'input' (layout( location=0) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 34
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.cbuffer-identifier.vert.out b/Test/baseResults/hlsl.cbuffer-identifier.vert.out
index 1d2b9f6..6142ca0 100644
--- a/Test/baseResults/hlsl.cbuffer-identifier.vert.out
+++ b/Test/baseResults/hlsl.cbuffer-identifier.vert.out
@@ -250,7 +250,7 @@
 0:?     'input.Norm' (layout( location=1) in 3-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 106
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.charLit.vert.out b/Test/baseResults/hlsl.charLit.vert.out
index 1e5dcc7..b09fc81 100755
--- a/Test/baseResults/hlsl.charLit.vert.out
+++ b/Test/baseResults/hlsl.charLit.vert.out
@@ -146,7 +146,7 @@
 0:?     '@entryPointOutput' ( out 4-component vector of float Position)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 58
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.clip.frag.out b/Test/baseResults/hlsl.clip.frag.out
index 4e383f9..dbf99bf 100644
--- a/Test/baseResults/hlsl.clip.frag.out
+++ b/Test/baseResults/hlsl.clip.frag.out
@@ -74,7 +74,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 30
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.clipdistance-1.frag.out b/Test/baseResults/hlsl.clipdistance-1.frag.out
index 6a90616..f223ddc 100644
--- a/Test/baseResults/hlsl.clipdistance-1.frag.out
+++ b/Test/baseResults/hlsl.clipdistance-1.frag.out
@@ -98,7 +98,7 @@
 0:?     'cull' ( in 1-element array of float CullDistance)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 53
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.clipdistance-1.geom.out b/Test/baseResults/hlsl.clipdistance-1.geom.out
index 35382ea..144b877 100644
--- a/Test/baseResults/hlsl.clipdistance-1.geom.out
+++ b/Test/baseResults/hlsl.clipdistance-1.geom.out
@@ -550,7 +550,7 @@
 0:?     'OutputStream.clip' ( out 2-element array of float ClipDistance)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 118
 
                               Capability Geometry
diff --git a/Test/baseResults/hlsl.clipdistance-1.vert.out b/Test/baseResults/hlsl.clipdistance-1.vert.out
index f95fd78..d1d1370 100644
--- a/Test/baseResults/hlsl.clipdistance-1.vert.out
+++ b/Test/baseResults/hlsl.clipdistance-1.vert.out
@@ -108,7 +108,7 @@
 0:?     'cull' ( out 1-element array of float CullDistance)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 46
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.clipdistance-2.frag.out b/Test/baseResults/hlsl.clipdistance-2.frag.out
index 447dfaa..64604eb 100644
--- a/Test/baseResults/hlsl.clipdistance-2.frag.out
+++ b/Test/baseResults/hlsl.clipdistance-2.frag.out
@@ -290,7 +290,7 @@
 0:?     'cull' ( in 4-element array of float CullDistance)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 84
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.clipdistance-2.geom.out b/Test/baseResults/hlsl.clipdistance-2.geom.out
index 0b85e59..a8abd02 100644
--- a/Test/baseResults/hlsl.clipdistance-2.geom.out
+++ b/Test/baseResults/hlsl.clipdistance-2.geom.out
@@ -724,7 +724,7 @@
 0:?     'OutputStream.clip' ( out 4-element array of float ClipDistance)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 128
 
                               Capability Geometry
diff --git a/Test/baseResults/hlsl.clipdistance-2.vert.out b/Test/baseResults/hlsl.clipdistance-2.vert.out
index e1480c9..397a25d 100644
--- a/Test/baseResults/hlsl.clipdistance-2.vert.out
+++ b/Test/baseResults/hlsl.clipdistance-2.vert.out
@@ -420,7 +420,7 @@
 0:?     'cull' ( out 4-element array of float CullDistance)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 89
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.clipdistance-3.frag.out b/Test/baseResults/hlsl.clipdistance-3.frag.out
index 2f13f61..3b5082e 100644
--- a/Test/baseResults/hlsl.clipdistance-3.frag.out
+++ b/Test/baseResults/hlsl.clipdistance-3.frag.out
@@ -98,7 +98,7 @@
 0:?     'cull' ( in 2-element array of float CullDistance)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 53
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.clipdistance-3.geom.out b/Test/baseResults/hlsl.clipdistance-3.geom.out
index 8135ab6..f8ba5c6 100644
--- a/Test/baseResults/hlsl.clipdistance-3.geom.out
+++ b/Test/baseResults/hlsl.clipdistance-3.geom.out
@@ -630,7 +630,7 @@
 0:?     'OutputStream.clip1' ( out 4-element array of float ClipDistance)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 127
 
                               Capability Geometry
diff --git a/Test/baseResults/hlsl.clipdistance-3.vert.out b/Test/baseResults/hlsl.clipdistance-3.vert.out
index df0a2b7..01afd17 100644
--- a/Test/baseResults/hlsl.clipdistance-3.vert.out
+++ b/Test/baseResults/hlsl.clipdistance-3.vert.out
@@ -136,7 +136,7 @@
 0:?     'cull' ( out 2-element array of float CullDistance)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 51
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.clipdistance-4.frag.out b/Test/baseResults/hlsl.clipdistance-4.frag.out
index 7dfc461..95f81c9 100644
--- a/Test/baseResults/hlsl.clipdistance-4.frag.out
+++ b/Test/baseResults/hlsl.clipdistance-4.frag.out
@@ -174,7 +174,7 @@
 0:?     'v.ClipRect' ( in 4-element array of float ClipDistance)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 57
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.clipdistance-4.geom.out b/Test/baseResults/hlsl.clipdistance-4.geom.out
index a3bee29..1096e02 100644
--- a/Test/baseResults/hlsl.clipdistance-4.geom.out
+++ b/Test/baseResults/hlsl.clipdistance-4.geom.out
@@ -612,7 +612,7 @@
 0:?     'OutputStream.clip1' ( out 4-element array of float ClipDistance)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 130
 
                               Capability Geometry
diff --git a/Test/baseResults/hlsl.clipdistance-4.vert.out b/Test/baseResults/hlsl.clipdistance-4.vert.out
index 913355c..d05fae4 100644
--- a/Test/baseResults/hlsl.clipdistance-4.vert.out
+++ b/Test/baseResults/hlsl.clipdistance-4.vert.out
@@ -270,7 +270,7 @@
 0:?     '@entryPointOutput.ClipRect' ( out 4-element array of float ClipDistance)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 72
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.clipdistance-5.frag.out b/Test/baseResults/hlsl.clipdistance-5.frag.out
index 2ab8df4..afdd4c4 100644
--- a/Test/baseResults/hlsl.clipdistance-5.frag.out
+++ b/Test/baseResults/hlsl.clipdistance-5.frag.out
@@ -232,7 +232,7 @@
 0:?     'v.ClipRect' ( in 4-element array of float ClipDistance)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 62
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.clipdistance-5.vert.out b/Test/baseResults/hlsl.clipdistance-5.vert.out
index cd8fa02..3e8f1fe 100644
--- a/Test/baseResults/hlsl.clipdistance-5.vert.out
+++ b/Test/baseResults/hlsl.clipdistance-5.vert.out
@@ -318,7 +318,7 @@
 0:?     '@entryPointOutput.ClipRect' ( out 4-element array of float ClipDistance)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 73
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.clipdistance-6.frag.out b/Test/baseResults/hlsl.clipdistance-6.frag.out
index f81b250..3ee8065 100644
--- a/Test/baseResults/hlsl.clipdistance-6.frag.out
+++ b/Test/baseResults/hlsl.clipdistance-6.frag.out
@@ -282,7 +282,7 @@
 0:?     'v.clip1' ( in 8-element array of float ClipDistance)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 79
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.clipdistance-6.vert.out b/Test/baseResults/hlsl.clipdistance-6.vert.out
index 8bc06d8..a386d0a 100644
--- a/Test/baseResults/hlsl.clipdistance-6.vert.out
+++ b/Test/baseResults/hlsl.clipdistance-6.vert.out
@@ -428,7 +428,7 @@
 0:?     '@entryPointOutput.clip1' ( out 8-element array of float ClipDistance)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 86
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.clipdistance-7.frag.out b/Test/baseResults/hlsl.clipdistance-7.frag.out
index b563caa..94b6a79 100644
--- a/Test/baseResults/hlsl.clipdistance-7.frag.out
+++ b/Test/baseResults/hlsl.clipdistance-7.frag.out
@@ -270,7 +270,7 @@
 0:?     'v.clip1' ( in 8-element array of float ClipDistance)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 78
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.clipdistance-7.vert.out b/Test/baseResults/hlsl.clipdistance-7.vert.out
index 828efce..87e34bd 100644
--- a/Test/baseResults/hlsl.clipdistance-7.vert.out
+++ b/Test/baseResults/hlsl.clipdistance-7.vert.out
@@ -384,7 +384,7 @@
 0:?     '@entryPointOutput.clip1' ( out 8-element array of float ClipDistance)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 81
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.clipdistance-8.frag.out b/Test/baseResults/hlsl.clipdistance-8.frag.out
index 0f73dd5..98c9505 100644
--- a/Test/baseResults/hlsl.clipdistance-8.frag.out
+++ b/Test/baseResults/hlsl.clipdistance-8.frag.out
@@ -186,7 +186,7 @@
 0:?     'v.clip1' ( in 4-element array of float ClipDistance)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 65
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.clipdistance-8.vert.out b/Test/baseResults/hlsl.clipdistance-8.vert.out
index c96d428..88800e3 100644
--- a/Test/baseResults/hlsl.clipdistance-8.vert.out
+++ b/Test/baseResults/hlsl.clipdistance-8.vert.out
@@ -240,7 +240,7 @@
 0:?     '@entryPointOutput.clip1' ( out 4-element array of float ClipDistance)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 62
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.clipdistance-9.frag.out b/Test/baseResults/hlsl.clipdistance-9.frag.out
index 2b63450..ff7f261 100644
--- a/Test/baseResults/hlsl.clipdistance-9.frag.out
+++ b/Test/baseResults/hlsl.clipdistance-9.frag.out
@@ -144,7 +144,7 @@
 0:?     'clip0' ( in 4-element array of float ClipDistance)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 68
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.clipdistance-9.vert.out b/Test/baseResults/hlsl.clipdistance-9.vert.out
index 4eff4e0..2d0c9b0 100644
--- a/Test/baseResults/hlsl.clipdistance-9.vert.out
+++ b/Test/baseResults/hlsl.clipdistance-9.vert.out
@@ -194,7 +194,7 @@
 0:?     'clip0' ( out 4-element array of float ClipDistance)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 67
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.color.hull.tesc.out b/Test/baseResults/hlsl.color.hull.tesc.out
index 84e7794..72e0b7e 100644
--- a/Test/baseResults/hlsl.color.hull.tesc.out
+++ b/Test/baseResults/hlsl.color.hull.tesc.out
@@ -356,7 +356,7 @@
 0:?     '@patchConstantOutput.inside' ( patch out 2-element array of float TessLevelInner)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 127
 
                               Capability Tessellation
diff --git a/Test/baseResults/hlsl.comparison.vec.frag.out b/Test/baseResults/hlsl.comparison.vec.frag.out
index 868e8d6..c7e4ed5 100644
--- a/Test/baseResults/hlsl.comparison.vec.frag.out
+++ b/Test/baseResults/hlsl.comparison.vec.frag.out
@@ -262,7 +262,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 96
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.conditional.frag.out b/Test/baseResults/hlsl.conditional.frag.out
index de264bb..90d9f79 100755
--- a/Test/baseResults/hlsl.conditional.frag.out
+++ b/Test/baseResults/hlsl.conditional.frag.out
@@ -522,7 +522,7 @@
 0:?     'input' (layout( location=0) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 206
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.constantbuffer.frag.out b/Test/baseResults/hlsl.constantbuffer.frag.out
index 0cabf8e..4b5c6b1 100644
--- a/Test/baseResults/hlsl.constantbuffer.frag.out
+++ b/Test/baseResults/hlsl.constantbuffer.frag.out
@@ -132,7 +132,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 66
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.constructArray.vert.out b/Test/baseResults/hlsl.constructArray.vert.out
index 3099539..6e18ad9 100755
--- a/Test/baseResults/hlsl.constructArray.vert.out
+++ b/Test/baseResults/hlsl.constructArray.vert.out
@@ -268,7 +268,7 @@
 0:?     '@entryPointOutput' ( out 4-component vector of float Position)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 89
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.constructexpr.frag.out b/Test/baseResults/hlsl.constructexpr.frag.out
index 22dd4fb..227c7e1 100644
--- a/Test/baseResults/hlsl.constructexpr.frag.out
+++ b/Test/baseResults/hlsl.constructexpr.frag.out
@@ -104,7 +104,7 @@
 0:?     '@entryPointOutput.color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 40
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.constructimat.frag.out b/Test/baseResults/hlsl.constructimat.frag.out
index 8a5d0e8..c36ff6d 100644
--- a/Test/baseResults/hlsl.constructimat.frag.out
+++ b/Test/baseResults/hlsl.constructimat.frag.out
@@ -544,7 +544,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out int)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 98
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.coverage.frag.out b/Test/baseResults/hlsl.coverage.frag.out
index 8fc6abf..8afc59a 100644
--- a/Test/baseResults/hlsl.coverage.frag.out
+++ b/Test/baseResults/hlsl.coverage.frag.out
@@ -118,7 +118,7 @@
 0:?     '@entryPointOutput.vColor' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 52
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.dashI.vert.out b/Test/baseResults/hlsl.dashI.vert.out
index 67e7f21..400502b 100644
--- a/Test/baseResults/hlsl.dashI.vert.out
+++ b/Test/baseResults/hlsl.dashI.vert.out
@@ -1,6 +1,6 @@
 hlsl.dashI.vert
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 40
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.deadFunctionMissingBody.vert.out b/Test/baseResults/hlsl.deadFunctionMissingBody.vert.out
index 5f922e3..2bc08da 100644
--- a/Test/baseResults/hlsl.deadFunctionMissingBody.vert.out
+++ b/Test/baseResults/hlsl.deadFunctionMissingBody.vert.out
@@ -1,6 +1,6 @@
 hlsl.deadFunctionMissingBody.vert
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 18
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.depthGreater.frag.out b/Test/baseResults/hlsl.depthGreater.frag.out
index d6e2669..9749371 100755
--- a/Test/baseResults/hlsl.depthGreater.frag.out
+++ b/Test/baseResults/hlsl.depthGreater.frag.out
@@ -50,7 +50,7 @@
 0:?     'depth' ( out float FragDepth)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 20
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.depthLess.frag.out b/Test/baseResults/hlsl.depthLess.frag.out
index 462e8ee..c3af8ee 100755
--- a/Test/baseResults/hlsl.depthLess.frag.out
+++ b/Test/baseResults/hlsl.depthLess.frag.out
@@ -42,7 +42,7 @@
 0:?     '@entryPointOutput' ( out float FragDepth)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 16
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.discard.frag.out b/Test/baseResults/hlsl.discard.frag.out
index d96bd9b..cc7c866 100755
--- a/Test/baseResults/hlsl.discard.frag.out
+++ b/Test/baseResults/hlsl.discard.frag.out
@@ -108,7 +108,7 @@
 0:?     'input' (layout( location=0) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 50
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.doLoop.frag.out b/Test/baseResults/hlsl.doLoop.frag.out
index 2d6d04f..bb56465 100755
--- a/Test/baseResults/hlsl.doLoop.frag.out
+++ b/Test/baseResults/hlsl.doLoop.frag.out
@@ -144,7 +144,7 @@
 0:?     'input' (layout( location=0) in float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 71
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.domain.1.tese.out b/Test/baseResults/hlsl.domain.1.tese.out
index 317d71d..4bc8bac 100644
--- a/Test/baseResults/hlsl.domain.1.tese.out
+++ b/Test/baseResults/hlsl.domain.1.tese.out
@@ -286,7 +286,7 @@
 0:?     'pcf_data.flInsideTessFactor' ( patch in 2-element array of float TessLevelInner)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 103
 
                               Capability Tessellation
diff --git a/Test/baseResults/hlsl.domain.2.tese.out b/Test/baseResults/hlsl.domain.2.tese.out
index e0d13c1..827f80f 100644
--- a/Test/baseResults/hlsl.domain.2.tese.out
+++ b/Test/baseResults/hlsl.domain.2.tese.out
@@ -284,7 +284,7 @@
 0:?     'pcf_data.foo' (layout( location=2) patch in float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 98
 
                               Capability Tessellation
diff --git a/Test/baseResults/hlsl.domain.3.tese.out b/Test/baseResults/hlsl.domain.3.tese.out
index 2f86473..dd3d502 100644
--- a/Test/baseResults/hlsl.domain.3.tese.out
+++ b/Test/baseResults/hlsl.domain.3.tese.out
@@ -264,7 +264,7 @@
 0:?     'pcf_data.flInsideTessFactor' ( patch in 2-element array of float TessLevelInner)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 100
 
                               Capability Tessellation
diff --git a/Test/baseResults/hlsl.emptystruct.init.vert.out b/Test/baseResults/hlsl.emptystruct.init.vert.out
index 12e539b..410915c 100644
--- a/Test/baseResults/hlsl.emptystruct.init.vert.out
+++ b/Test/baseResults/hlsl.emptystruct.init.vert.out
@@ -60,7 +60,7 @@
 0:?     'vertexIndex' (layout( location=0) in uint)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 29
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.emptystructreturn.frag.out b/Test/baseResults/hlsl.emptystructreturn.frag.out
index ba72b79..8c8b62b 100644
--- a/Test/baseResults/hlsl.emptystructreturn.frag.out
+++ b/Test/baseResults/hlsl.emptystructreturn.frag.out
@@ -50,7 +50,7 @@
 0:?   Linker Objects
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 27
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.emptystructreturn.vert.out b/Test/baseResults/hlsl.emptystructreturn.vert.out
index 1625be5..b2aaf5e 100644
--- a/Test/baseResults/hlsl.emptystructreturn.vert.out
+++ b/Test/baseResults/hlsl.emptystructreturn.vert.out
@@ -48,7 +48,7 @@
 0:?   Linker Objects
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 27
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.entry-in.frag.out b/Test/baseResults/hlsl.entry-in.frag.out
index 1de8687..dc9eea4 100755
--- a/Test/baseResults/hlsl.entry-in.frag.out
+++ b/Test/baseResults/hlsl.entry-in.frag.out
@@ -166,7 +166,7 @@
 0:?     'i.i2' (layout( location=1) flat in 2-component vector of int)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 74
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.entry-out.frag.out b/Test/baseResults/hlsl.entry-out.frag.out
index 4c06e06..6ca3011 100755
--- a/Test/baseResults/hlsl.entry-out.frag.out
+++ b/Test/baseResults/hlsl.entry-out.frag.out
@@ -244,7 +244,7 @@
 0:?     'out3.i' (layout( location=5) out 2-component vector of int)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 89
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.entry.rename.frag.out b/Test/baseResults/hlsl.entry.rename.frag.out
index 077b755..898eb4b 100644
--- a/Test/baseResults/hlsl.entry.rename.frag.out
+++ b/Test/baseResults/hlsl.entry.rename.frag.out
@@ -72,7 +72,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 32
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.explicitDescriptorSet-2.frag.out b/Test/baseResults/hlsl.explicitDescriptorSet-2.frag.out
index 6835eab..b5f3440 100644
--- a/Test/baseResults/hlsl.explicitDescriptorSet-2.frag.out
+++ b/Test/baseResults/hlsl.explicitDescriptorSet-2.frag.out
@@ -1,6 +1,6 @@
 hlsl.explicitDescriptorSet.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 31
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.explicitDescriptorSet.frag.out b/Test/baseResults/hlsl.explicitDescriptorSet.frag.out
index 1ee90b4..8ab296f 100644
--- a/Test/baseResults/hlsl.explicitDescriptorSet.frag.out
+++ b/Test/baseResults/hlsl.explicitDescriptorSet.frag.out
@@ -1,6 +1,6 @@
 hlsl.explicitDescriptorSet.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 31
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.flatten.return.frag.out b/Test/baseResults/hlsl.flatten.return.frag.out
index 1c88f77..e47fe3e 100644
--- a/Test/baseResults/hlsl.flatten.return.frag.out
+++ b/Test/baseResults/hlsl.flatten.return.frag.out
@@ -118,7 +118,7 @@
 0:?     '@entryPointOutput.other_struct_member3' (layout( location=3) out float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 49
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.flattenOpaque.frag.out b/Test/baseResults/hlsl.flattenOpaque.frag.out
index 0b51975..eb47c3f 100755
--- a/Test/baseResults/hlsl.flattenOpaque.frag.out
+++ b/Test/baseResults/hlsl.flattenOpaque.frag.out
@@ -295,7 +295,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 122
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.flattenOpaqueInit.vert.out b/Test/baseResults/hlsl.flattenOpaqueInit.vert.out
index 0a95545..29da844 100755
--- a/Test/baseResults/hlsl.flattenOpaqueInit.vert.out
+++ b/Test/baseResults/hlsl.flattenOpaqueInit.vert.out
@@ -165,7 +165,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 82
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.flattenOpaqueInitMix.vert.out b/Test/baseResults/hlsl.flattenOpaqueInitMix.vert.out
index 5a2cbdc..bf95980 100755
--- a/Test/baseResults/hlsl.flattenOpaqueInitMix.vert.out
+++ b/Test/baseResults/hlsl.flattenOpaqueInitMix.vert.out
@@ -107,7 +107,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 59
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.flattenSubset.frag.out b/Test/baseResults/hlsl.flattenSubset.frag.out
index 8562a69..92e2a96 100755
--- a/Test/baseResults/hlsl.flattenSubset.frag.out
+++ b/Test/baseResults/hlsl.flattenSubset.frag.out
@@ -115,7 +115,7 @@
 0:?     'vpos' (layout( location=0) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 54
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.flattenSubset2.frag.out b/Test/baseResults/hlsl.flattenSubset2.frag.out
index 9a01405..b22734a 100755
--- a/Test/baseResults/hlsl.flattenSubset2.frag.out
+++ b/Test/baseResults/hlsl.flattenSubset2.frag.out
@@ -149,7 +149,7 @@
 0:?     'vpos' (layout( location=0) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 56
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.float1.frag.out b/Test/baseResults/hlsl.float1.frag.out
index ff1c485..7862123 100755
--- a/Test/baseResults/hlsl.float1.frag.out
+++ b/Test/baseResults/hlsl.float1.frag.out
@@ -65,7 +65,7 @@
 0:?     'scalar' ( global float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 27
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.float4.frag.out b/Test/baseResults/hlsl.float4.frag.out
index d9d6ede..cd741ed 100755
--- a/Test/baseResults/hlsl.float4.frag.out
+++ b/Test/baseResults/hlsl.float4.frag.out
@@ -42,7 +42,7 @@
 0:?     'anon@0' (layout( row_major std140) uniform block{ uniform 4-component vector of float AmbientColor,  uniform bool ff1, layout( offset=20) uniform float ff2, layout( binding=0 offset=32) uniform 4-component vector of float ff3, layout( binding=1 offset=48) uniform 4-component vector of float ff4})
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 26
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.forLoop.frag.out b/Test/baseResults/hlsl.forLoop.frag.out
index e588ced..3e835f8 100755
--- a/Test/baseResults/hlsl.forLoop.frag.out
+++ b/Test/baseResults/hlsl.forLoop.frag.out
@@ -402,7 +402,7 @@
 0:?     'input' (layout( location=0) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 183
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.fraggeom.frag.out b/Test/baseResults/hlsl.fraggeom.frag.out
index 444c07c..af3564d 100644
--- a/Test/baseResults/hlsl.fraggeom.frag.out
+++ b/Test/baseResults/hlsl.fraggeom.frag.out
@@ -64,7 +64,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 25
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.gather.array.dx10.frag.out b/Test/baseResults/hlsl.gather.array.dx10.frag.out
index c8cd86f..be4606a 100644
--- a/Test/baseResults/hlsl.gather.array.dx10.frag.out
+++ b/Test/baseResults/hlsl.gather.array.dx10.frag.out
@@ -262,7 +262,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 124
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.gather.basic.dx10.frag.out b/Test/baseResults/hlsl.gather.basic.dx10.frag.out
index af19d6b..8182dde 100644
--- a/Test/baseResults/hlsl.gather.basic.dx10.frag.out
+++ b/Test/baseResults/hlsl.gather.basic.dx10.frag.out
@@ -258,7 +258,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 135
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.gather.basic.dx10.vert.out b/Test/baseResults/hlsl.gather.basic.dx10.vert.out
index f3f1bf0..fe56114 100644
--- a/Test/baseResults/hlsl.gather.basic.dx10.vert.out
+++ b/Test/baseResults/hlsl.gather.basic.dx10.vert.out
@@ -220,7 +220,7 @@
 0:?     '@entryPointOutput.Pos' ( out 4-component vector of float Position)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 126
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.gather.offset.dx10.frag.out b/Test/baseResults/hlsl.gather.offset.dx10.frag.out
index 828a9cb..ae816dd 100644
--- a/Test/baseResults/hlsl.gather.offset.dx10.frag.out
+++ b/Test/baseResults/hlsl.gather.offset.dx10.frag.out
@@ -208,7 +208,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 114
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.gather.offsetarray.dx10.frag.out b/Test/baseResults/hlsl.gather.offsetarray.dx10.frag.out
index 140a5b1..8805232 100644
--- a/Test/baseResults/hlsl.gather.offsetarray.dx10.frag.out
+++ b/Test/baseResults/hlsl.gather.offsetarray.dx10.frag.out
@@ -202,7 +202,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 97
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.gatherRGBA.array.dx10.frag.out b/Test/baseResults/hlsl.gatherRGBA.array.dx10.frag.out
index 0ad93d0..35b0a00 100644
--- a/Test/baseResults/hlsl.gatherRGBA.array.dx10.frag.out
+++ b/Test/baseResults/hlsl.gatherRGBA.array.dx10.frag.out
@@ -750,7 +750,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 255
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.gatherRGBA.basic.dx10.frag.out b/Test/baseResults/hlsl.gatherRGBA.basic.dx10.frag.out
index 0513e06..d0be6d5 100644
--- a/Test/baseResults/hlsl.gatherRGBA.basic.dx10.frag.out
+++ b/Test/baseResults/hlsl.gatherRGBA.basic.dx10.frag.out
@@ -758,7 +758,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 265
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.gatherRGBA.offset.dx10.frag.out b/Test/baseResults/hlsl.gatherRGBA.offset.dx10.frag.out
index f23fe87..49fda31 100644
--- a/Test/baseResults/hlsl.gatherRGBA.offset.dx10.frag.out
+++ b/Test/baseResults/hlsl.gatherRGBA.offset.dx10.frag.out
@@ -1262,7 +1262,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 399
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.gatherRGBA.offsetarray.dx10.frag.out b/Test/baseResults/hlsl.gatherRGBA.offsetarray.dx10.frag.out
index ffc2cdd..9de1a97 100644
--- a/Test/baseResults/hlsl.gatherRGBA.offsetarray.dx10.frag.out
+++ b/Test/baseResults/hlsl.gatherRGBA.offsetarray.dx10.frag.out
@@ -1254,7 +1254,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 389
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.gathercmpRGBA.offset.dx10.frag.out b/Test/baseResults/hlsl.gathercmpRGBA.offset.dx10.frag.out
index a7710c5..fe99df5 100644
--- a/Test/baseResults/hlsl.gathercmpRGBA.offset.dx10.frag.out
+++ b/Test/baseResults/hlsl.gathercmpRGBA.offset.dx10.frag.out
@@ -456,10 +456,11 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 164
 
                               Capability Shader
+                              Capability ImageGatherExtended
                               Capability Sampled1D
                1:             ExtInstImport  "GLSL.std.450"
                               MemoryModel Logical GLSL450
diff --git a/Test/baseResults/hlsl.getdimensions.dx10.frag.out b/Test/baseResults/hlsl.getdimensions.dx10.frag.out
index dd789f1..599c659 100644
--- a/Test/baseResults/hlsl.getdimensions.dx10.frag.out
+++ b/Test/baseResults/hlsl.getdimensions.dx10.frag.out
@@ -2318,7 +2318,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 550
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.getdimensions.dx10.vert.out b/Test/baseResults/hlsl.getdimensions.dx10.vert.out
index 4ff0dc2..cccdfeb 100644
--- a/Test/baseResults/hlsl.getdimensions.dx10.vert.out
+++ b/Test/baseResults/hlsl.getdimensions.dx10.vert.out
@@ -116,7 +116,7 @@
 0:?     '@entryPointOutput.Pos' ( out 4-component vector of float Position)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 48
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.getdimensions.rw.dx10.frag.out b/Test/baseResults/hlsl.getdimensions.rw.dx10.frag.out
index 6a5c951..0b9a674 100644
--- a/Test/baseResults/hlsl.getdimensions.rw.dx10.frag.out
+++ b/Test/baseResults/hlsl.getdimensions.rw.dx10.frag.out
@@ -718,7 +718,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 232
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.getsampleposition.dx10.frag.out b/Test/baseResults/hlsl.getsampleposition.dx10.frag.out
index c8cd8a5..51bd076 100644
--- a/Test/baseResults/hlsl.getsampleposition.dx10.frag.out
+++ b/Test/baseResults/hlsl.getsampleposition.dx10.frag.out
@@ -580,7 +580,7 @@
 0:?     'sample' (layout( location=0) flat in int)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 198
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.global-const-init.frag.out b/Test/baseResults/hlsl.global-const-init.frag.out
index eda1c5d..940f3be 100644
--- a/Test/baseResults/hlsl.global-const-init.frag.out
+++ b/Test/baseResults/hlsl.global-const-init.frag.out
@@ -102,7 +102,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 50
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.groupid.comp.out b/Test/baseResults/hlsl.groupid.comp.out
index 3404551..386a3e9 100644
--- a/Test/baseResults/hlsl.groupid.comp.out
+++ b/Test/baseResults/hlsl.groupid.comp.out
@@ -82,7 +82,7 @@
 0:?     'vGroupId' ( in 3-component vector of uint WorkGroupID)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 37
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.gs-hs-mix.tesc.out b/Test/baseResults/hlsl.gs-hs-mix.tesc.out
index e551815..4971371 100644
--- a/Test/baseResults/hlsl.gs-hs-mix.tesc.out
+++ b/Test/baseResults/hlsl.gs-hs-mix.tesc.out
@@ -798,7 +798,7 @@
 0:?     '@patchConstantOutput' (layout( location=1) patch out structure{ temp 3-element array of 3-component vector of float NormalWS})
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 216
 
                               Capability Tessellation
diff --git a/Test/baseResults/hlsl.hlslOffset.vert.out b/Test/baseResults/hlsl.hlslOffset.vert.out
index b838da4..8393d83 100644
--- a/Test/baseResults/hlsl.hlslOffset.vert.out
+++ b/Test/baseResults/hlsl.hlslOffset.vert.out
@@ -26,7 +26,7 @@
 0:?     'anon@0' (layout( row_major std140) uniform block{layout( row_major std140) uniform float m0, layout( row_major std140) uniform 3-component vector of float m4, layout( row_major std140) uniform float m16, layout( row_major std140 offset=20) uniform 3-component vector of float m20, layout( row_major std140 offset=36) uniform 3-component vector of float m36, layout( row_major std140 offset=56) uniform 2-component vector of float m56, layout( row_major std140) uniform float m64, layout( row_major std140) uniform 2-component vector of float m68, layout( row_major std140) uniform float m76, layout( row_major std140) uniform float m80, layout( row_major std140) uniform 1-element array of 2-component vector of float m96})
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 18
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.hull.1.tesc.out b/Test/baseResults/hlsl.hull.1.tesc.out
index 5b80f15..1be1498 100644
--- a/Test/baseResults/hlsl.hull.1.tesc.out
+++ b/Test/baseResults/hlsl.hull.1.tesc.out
@@ -224,7 +224,7 @@
 0:?     '@patchConstantOutput.edges' ( patch out 4-element array of float TessLevelOuter)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 89
 
                               Capability Tessellation
diff --git a/Test/baseResults/hlsl.hull.2.tesc.out b/Test/baseResults/hlsl.hull.2.tesc.out
index ec8f799..c8218d2 100644
--- a/Test/baseResults/hlsl.hull.2.tesc.out
+++ b/Test/baseResults/hlsl.hull.2.tesc.out
@@ -220,7 +220,7 @@
 0:?     '@patchConstantOutput.edges' ( patch out 4-element array of float TessLevelOuter)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 91
 
                               Capability Tessellation
diff --git a/Test/baseResults/hlsl.hull.3.tesc.out b/Test/baseResults/hlsl.hull.3.tesc.out
index b821bad..4ff0198 100755
--- a/Test/baseResults/hlsl.hull.3.tesc.out
+++ b/Test/baseResults/hlsl.hull.3.tesc.out
@@ -220,7 +220,7 @@
 0:?     '@patchConstantOutput.edges' ( patch out 4-element array of float TessLevelOuter)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 91
 
                               Capability Tessellation
diff --git a/Test/baseResults/hlsl.hull.4.tesc.out b/Test/baseResults/hlsl.hull.4.tesc.out
index 593af3b..a99730d 100644
--- a/Test/baseResults/hlsl.hull.4.tesc.out
+++ b/Test/baseResults/hlsl.hull.4.tesc.out
@@ -476,7 +476,7 @@
 0:?     '@patchConstantOutput.fInsideTessFactor' ( patch out 2-element array of float TessLevelInner)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 127
 
                               Capability Tessellation
diff --git a/Test/baseResults/hlsl.hull.ctrlpt-1.tesc.out b/Test/baseResults/hlsl.hull.ctrlpt-1.tesc.out
index f286c23..41f3c0a 100644
--- a/Test/baseResults/hlsl.hull.ctrlpt-1.tesc.out
+++ b/Test/baseResults/hlsl.hull.ctrlpt-1.tesc.out
@@ -396,7 +396,7 @@
 0:?     '@patchConstantOutput.flInFactor' ( patch out 2-element array of float TessLevelInner)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 124
 
                               Capability Tessellation
diff --git a/Test/baseResults/hlsl.hull.ctrlpt-2.tesc.out b/Test/baseResults/hlsl.hull.ctrlpt-2.tesc.out
index e260fc2..986e110 100644
--- a/Test/baseResults/hlsl.hull.ctrlpt-2.tesc.out
+++ b/Test/baseResults/hlsl.hull.ctrlpt-2.tesc.out
@@ -414,7 +414,7 @@
 0:?     '@patchConstantOutput.flInFactor' ( patch out 2-element array of float TessLevelInner)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 126
 
                               Capability Tessellation
diff --git a/Test/baseResults/hlsl.hull.void.tesc.out b/Test/baseResults/hlsl.hull.void.tesc.out
index d1028ce..c44c7e4 100644
--- a/Test/baseResults/hlsl.hull.void.tesc.out
+++ b/Test/baseResults/hlsl.hull.void.tesc.out
@@ -108,7 +108,7 @@
 0:?     'InvocationId' ( in uint InvocationID)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 55
 
                               Capability Tessellation
diff --git a/Test/baseResults/hlsl.identifier.sample.frag.out b/Test/baseResults/hlsl.identifier.sample.frag.out
index 9fba5bc..a23451e 100644
--- a/Test/baseResults/hlsl.identifier.sample.frag.out
+++ b/Test/baseResults/hlsl.identifier.sample.frag.out
@@ -86,7 +86,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 33
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.if.frag.out b/Test/baseResults/hlsl.if.frag.out
index 907458b..056b672 100755
--- a/Test/baseResults/hlsl.if.frag.out
+++ b/Test/baseResults/hlsl.if.frag.out
@@ -216,7 +216,7 @@
 0:?     'input' (layout( location=0) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 103
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.imagefetch-subvec4.comp.out b/Test/baseResults/hlsl.imagefetch-subvec4.comp.out
index 5638609..721aeea 100644
--- a/Test/baseResults/hlsl.imagefetch-subvec4.comp.out
+++ b/Test/baseResults/hlsl.imagefetch-subvec4.comp.out
@@ -72,7 +72,7 @@
 0:?     'tid' ( in 3-component vector of uint GlobalInvocationID)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 39
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.implicitBool.frag.out b/Test/baseResults/hlsl.implicitBool.frag.out
index c545a2e..72894f2 100755
--- a/Test/baseResults/hlsl.implicitBool.frag.out
+++ b/Test/baseResults/hlsl.implicitBool.frag.out
@@ -332,7 +332,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 139
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.include.vert.out b/Test/baseResults/hlsl.include.vert.out
index 7258802..020879d 100755
--- a/Test/baseResults/hlsl.include.vert.out
+++ b/Test/baseResults/hlsl.include.vert.out
@@ -1,6 +1,6 @@
 ../Test/hlsl.include.vert
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 44
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.inf.vert.out b/Test/baseResults/hlsl.inf.vert.out
index 4521d8b..1cedc55 100755
--- a/Test/baseResults/hlsl.inf.vert.out
+++ b/Test/baseResults/hlsl.inf.vert.out
@@ -112,7 +112,7 @@
 0:?     '@entryPointOutput' ( out 4-component vector of float Position)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 37
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.init.frag.out b/Test/baseResults/hlsl.init.frag.out
index cfd435a..9fc816c 100755
--- a/Test/baseResults/hlsl.init.frag.out
+++ b/Test/baseResults/hlsl.init.frag.out
@@ -331,7 +331,7 @@
 0:?     'anon@0' (layout( row_major std140) uniform block{layout( row_major std140) uniform float a, layout( row_major std140) uniform float b, layout( row_major std140) uniform float c})
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 110
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.init2.frag.out b/Test/baseResults/hlsl.init2.frag.out
index e2e32a6..9e03de3 100644
--- a/Test/baseResults/hlsl.init2.frag.out
+++ b/Test/baseResults/hlsl.init2.frag.out
@@ -358,7 +358,7 @@
 0:?     '@entryPointOutput.color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 112
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.inoutquals.frag.out b/Test/baseResults/hlsl.inoutquals.frag.out
index 8eef84e..42adb1a 100644
--- a/Test/baseResults/hlsl.inoutquals.frag.out
+++ b/Test/baseResults/hlsl.inoutquals.frag.out
@@ -214,7 +214,7 @@
 0:?     'sampleMask' ( out 1-element array of int SampleMaskIn)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 92
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.intrinsic.frexp.frag.out b/Test/baseResults/hlsl.intrinsic.frexp.frag.out
index 1f76b98..3a9d6fd 100644
--- a/Test/baseResults/hlsl.intrinsic.frexp.frag.out
+++ b/Test/baseResults/hlsl.intrinsic.frexp.frag.out
@@ -190,7 +190,7 @@
 0:?     '@entryPointOutput.color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 98
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.intrinsic.frexp.vert.out b/Test/baseResults/hlsl.intrinsic.frexp.vert.out
index ec63731..92bd7ef 100644
--- a/Test/baseResults/hlsl.intrinsic.frexp.vert.out
+++ b/Test/baseResults/hlsl.intrinsic.frexp.vert.out
@@ -113,7 +113,7 @@
 0:?   Linker Objects
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 78
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.intrinsics.barriers.comp.out b/Test/baseResults/hlsl.intrinsics.barriers.comp.out
index c924d06..13fe578 100644
--- a/Test/baseResults/hlsl.intrinsics.barriers.comp.out
+++ b/Test/baseResults/hlsl.intrinsics.barriers.comp.out
@@ -52,7 +52,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 22
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.intrinsics.comp.out b/Test/baseResults/hlsl.intrinsics.comp.out
index 7fe99e2..a5b543c 100644
--- a/Test/baseResults/hlsl.intrinsics.comp.out
+++ b/Test/baseResults/hlsl.intrinsics.comp.out
@@ -716,7 +716,7 @@
 0:?     'inU1' (layout( location=4) in 4-component vector of uint)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 265
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.intrinsics.d3dcolortoubyte4.frag.out b/Test/baseResults/hlsl.intrinsics.d3dcolortoubyte4.frag.out
index 864bfc3..970691c 100644
--- a/Test/baseResults/hlsl.intrinsics.d3dcolortoubyte4.frag.out
+++ b/Test/baseResults/hlsl.intrinsics.d3dcolortoubyte4.frag.out
@@ -74,7 +74,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of int)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 29
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.intrinsics.double.frag.out b/Test/baseResults/hlsl.intrinsics.double.frag.out
index c7c0e70..55a102f 100644
--- a/Test/baseResults/hlsl.intrinsics.double.frag.out
+++ b/Test/baseResults/hlsl.intrinsics.double.frag.out
@@ -164,7 +164,7 @@
 0:?     'inU1b' (layout( location=9) flat in uint)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 90
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.intrinsics.evalfns.frag.out b/Test/baseResults/hlsl.intrinsics.evalfns.frag.out
index 04ccc3b..e786562 100644
--- a/Test/baseResults/hlsl.intrinsics.evalfns.frag.out
+++ b/Test/baseResults/hlsl.intrinsics.evalfns.frag.out
@@ -154,7 +154,7 @@
 0:?     'inI2' (layout( location=4) flat in 2-component vector of int)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 80
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.intrinsics.f1632.frag.out b/Test/baseResults/hlsl.intrinsics.f1632.frag.out
index 3d5c924..c5619ef 100644
--- a/Test/baseResults/hlsl.intrinsics.f1632.frag.out
+++ b/Test/baseResults/hlsl.intrinsics.f1632.frag.out
@@ -260,7 +260,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 103
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.intrinsics.f3216.frag.out b/Test/baseResults/hlsl.intrinsics.f3216.frag.out
index 137d9eb..c447efc 100644
--- a/Test/baseResults/hlsl.intrinsics.f3216.frag.out
+++ b/Test/baseResults/hlsl.intrinsics.f3216.frag.out
@@ -270,7 +270,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 106
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.intrinsics.frag.out b/Test/baseResults/hlsl.intrinsics.frag.out
index c271dc9..b7d7139 100644
--- a/Test/baseResults/hlsl.intrinsics.frag.out
+++ b/Test/baseResults/hlsl.intrinsics.frag.out
@@ -5632,7 +5632,7 @@
 0:?     '@entryPointOutput.color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 1832
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.intrinsics.lit.frag.out b/Test/baseResults/hlsl.intrinsics.lit.frag.out
index 46f275c..8b1454b 100644
--- a/Test/baseResults/hlsl.intrinsics.lit.frag.out
+++ b/Test/baseResults/hlsl.intrinsics.lit.frag.out
@@ -118,7 +118,7 @@
 0:?     'm' (layout( location=2) in float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 48
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.intrinsics.negative.comp.out b/Test/baseResults/hlsl.intrinsics.negative.comp.out
index 3f5598b..97d6719 100644
--- a/Test/baseResults/hlsl.intrinsics.negative.comp.out
+++ b/Test/baseResults/hlsl.intrinsics.negative.comp.out
@@ -180,7 +180,7 @@
 0:?     'inI0' (layout( location=3) in 4-component vector of int)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 99
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.intrinsics.negative.vert.out b/Test/baseResults/hlsl.intrinsics.negative.vert.out
index 90ca623..c2711c6 100644
--- a/Test/baseResults/hlsl.intrinsics.negative.vert.out
+++ b/Test/baseResults/hlsl.intrinsics.negative.vert.out
@@ -308,7 +308,7 @@
 0:?     'inI0' (layout( location=3) in 4-component vector of int)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 155
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.intrinsics.promote.down.frag.out b/Test/baseResults/hlsl.intrinsics.promote.down.frag.out
index 530232e..a561dfe 100644
--- a/Test/baseResults/hlsl.intrinsics.promote.down.frag.out
+++ b/Test/baseResults/hlsl.intrinsics.promote.down.frag.out
@@ -104,7 +104,7 @@
 0:?     '@entryPointOutput.color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 50
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.intrinsics.promote.frag.out b/Test/baseResults/hlsl.intrinsics.promote.frag.out
index a90e494..b064295 100644
--- a/Test/baseResults/hlsl.intrinsics.promote.frag.out
+++ b/Test/baseResults/hlsl.intrinsics.promote.frag.out
@@ -888,7 +888,7 @@
 0:?     '@entryPointOutput.color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 322
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.intrinsics.promote.outputs.frag.out b/Test/baseResults/hlsl.intrinsics.promote.outputs.frag.out
index 6ab3e85..57dfafc 100644
--- a/Test/baseResults/hlsl.intrinsics.promote.outputs.frag.out
+++ b/Test/baseResults/hlsl.intrinsics.promote.outputs.frag.out
@@ -204,7 +204,7 @@
 0:?     '@entryPointOutput.color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 80
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.intrinsics.vert.out b/Test/baseResults/hlsl.intrinsics.vert.out
index ea8f2ba..8e7e3ec 100644
--- a/Test/baseResults/hlsl.intrinsics.vert.out
+++ b/Test/baseResults/hlsl.intrinsics.vert.out
@@ -2779,7 +2779,7 @@
 0:?   Linker Objects
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 1225
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.isfinite.frag.out b/Test/baseResults/hlsl.isfinite.frag.out
index c6a9026..6fee951 100644
--- a/Test/baseResults/hlsl.isfinite.frag.out
+++ b/Test/baseResults/hlsl.isfinite.frag.out
@@ -172,7 +172,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 85
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.layout.frag.out b/Test/baseResults/hlsl.layout.frag.out
index b24af79..010c2ec 100755
--- a/Test/baseResults/hlsl.layout.frag.out
+++ b/Test/baseResults/hlsl.layout.frag.out
@@ -87,7 +87,7 @@
 0:?     'anon@2' (layout( set=4 binding=7 row_major std430) readonly buffer block{layout( row_major std430 offset=16) buffer 4-component vector of float v1PostLayout})
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 44
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.layoutOverride.vert.out b/Test/baseResults/hlsl.layoutOverride.vert.out
index a6b6939..0db2011 100755
--- a/Test/baseResults/hlsl.layoutOverride.vert.out
+++ b/Test/baseResults/hlsl.layoutOverride.vert.out
@@ -52,7 +52,7 @@
 0:?     '@entryPointOutput' ( out 4-component vector of float Position)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 32
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.load.2dms.dx10.frag.out b/Test/baseResults/hlsl.load.2dms.dx10.frag.out
index da4cdd9..2acf3d4 100644
--- a/Test/baseResults/hlsl.load.2dms.dx10.frag.out
+++ b/Test/baseResults/hlsl.load.2dms.dx10.frag.out
@@ -358,7 +358,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 130
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.load.array.dx10.frag.out b/Test/baseResults/hlsl.load.array.dx10.frag.out
index 87dac02..dd665ed 100644
--- a/Test/baseResults/hlsl.load.array.dx10.frag.out
+++ b/Test/baseResults/hlsl.load.array.dx10.frag.out
@@ -388,7 +388,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 159
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.load.basic.dx10.frag.out b/Test/baseResults/hlsl.load.basic.dx10.frag.out
index c586fbd..bcfb977 100644
--- a/Test/baseResults/hlsl.load.basic.dx10.frag.out
+++ b/Test/baseResults/hlsl.load.basic.dx10.frag.out
@@ -490,7 +490,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 179
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.load.basic.dx10.vert.out b/Test/baseResults/hlsl.load.basic.dx10.vert.out
index 22675e5..1638991 100644
--- a/Test/baseResults/hlsl.load.basic.dx10.vert.out
+++ b/Test/baseResults/hlsl.load.basic.dx10.vert.out
@@ -452,7 +452,7 @@
 0:?     '@entryPointOutput.Pos' ( out 4-component vector of float Position)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 171
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.load.buffer.dx10.frag.out b/Test/baseResults/hlsl.load.buffer.dx10.frag.out
index a41374a..21e5d30 100644
--- a/Test/baseResults/hlsl.load.buffer.dx10.frag.out
+++ b/Test/baseResults/hlsl.load.buffer.dx10.frag.out
@@ -166,7 +166,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 72
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.load.buffer.float.dx10.frag.out b/Test/baseResults/hlsl.load.buffer.float.dx10.frag.out
index de59dfc..d951d09 100644
--- a/Test/baseResults/hlsl.load.buffer.float.dx10.frag.out
+++ b/Test/baseResults/hlsl.load.buffer.float.dx10.frag.out
@@ -172,7 +172,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 75
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.load.offset.dx10.frag.out b/Test/baseResults/hlsl.load.offset.dx10.frag.out
index 75809b1..d59ff6f 100644
--- a/Test/baseResults/hlsl.load.offset.dx10.frag.out
+++ b/Test/baseResults/hlsl.load.offset.dx10.frag.out
@@ -562,7 +562,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 201
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.load.offsetarray.dx10.frag.out b/Test/baseResults/hlsl.load.offsetarray.dx10.frag.out
index 70ef14e..b472462 100644
--- a/Test/baseResults/hlsl.load.offsetarray.dx10.frag.out
+++ b/Test/baseResults/hlsl.load.offsetarray.dx10.frag.out
@@ -436,7 +436,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 174
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.load.rwbuffer.dx10.frag.out b/Test/baseResults/hlsl.load.rwbuffer.dx10.frag.out
index d990db1..f134901 100644
--- a/Test/baseResults/hlsl.load.rwbuffer.dx10.frag.out
+++ b/Test/baseResults/hlsl.load.rwbuffer.dx10.frag.out
@@ -110,7 +110,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 57
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.load.rwtexture.array.dx10.frag.out b/Test/baseResults/hlsl.load.rwtexture.array.dx10.frag.out
index b464870..de31ee0 100644
--- a/Test/baseResults/hlsl.load.rwtexture.array.dx10.frag.out
+++ b/Test/baseResults/hlsl.load.rwtexture.array.dx10.frag.out
@@ -208,7 +208,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 119
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.load.rwtexture.dx10.frag.out b/Test/baseResults/hlsl.load.rwtexture.dx10.frag.out
index c106441..68044aa 100644
--- a/Test/baseResults/hlsl.load.rwtexture.dx10.frag.out
+++ b/Test/baseResults/hlsl.load.rwtexture.dx10.frag.out
@@ -244,7 +244,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 132
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.logical.binary.frag.out b/Test/baseResults/hlsl.logical.binary.frag.out
index 6fa45b5..b90811b 100644
--- a/Test/baseResults/hlsl.logical.binary.frag.out
+++ b/Test/baseResults/hlsl.logical.binary.frag.out
@@ -124,7 +124,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 56
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.logical.binary.vec.frag.out b/Test/baseResults/hlsl.logical.binary.vec.frag.out
index 01c8674..32753e5 100644
--- a/Test/baseResults/hlsl.logical.binary.vec.frag.out
+++ b/Test/baseResults/hlsl.logical.binary.vec.frag.out
@@ -254,7 +254,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 115
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.logical.unary.frag.out b/Test/baseResults/hlsl.logical.unary.frag.out
index ce18f35..25dbc2a 100644
--- a/Test/baseResults/hlsl.logical.unary.frag.out
+++ b/Test/baseResults/hlsl.logical.unary.frag.out
@@ -184,7 +184,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 84
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.logicalConvert.frag.out b/Test/baseResults/hlsl.logicalConvert.frag.out
index b98e0dd..6c595f8 100755
--- a/Test/baseResults/hlsl.logicalConvert.frag.out
+++ b/Test/baseResults/hlsl.logicalConvert.frag.out
@@ -254,7 +254,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 50
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.loopattr.frag.out b/Test/baseResults/hlsl.loopattr.frag.out
index 4519bed..cc0073a 100644
--- a/Test/baseResults/hlsl.loopattr.frag.out
+++ b/Test/baseResults/hlsl.loopattr.frag.out
@@ -136,7 +136,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 54
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.matNx1.frag.out b/Test/baseResults/hlsl.matNx1.frag.out
index 8861d48..109362e 100644
--- a/Test/baseResults/hlsl.matNx1.frag.out
+++ b/Test/baseResults/hlsl.matNx1.frag.out
@@ -152,7 +152,7 @@
 0:?     '@entryPointOutput.color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 77
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.matType.bool.frag.out b/Test/baseResults/hlsl.matType.bool.frag.out
index fd38dca..82575b0 100644
--- a/Test/baseResults/hlsl.matType.bool.frag.out
+++ b/Test/baseResults/hlsl.matType.bool.frag.out
@@ -232,7 +232,7 @@
 0:?     '@entryPointOutput.color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 130
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.matType.frag.out b/Test/baseResults/hlsl.matType.frag.out
index 280141f..958b37e 100755
--- a/Test/baseResults/hlsl.matType.frag.out
+++ b/Test/baseResults/hlsl.matType.frag.out
@@ -31,7 +31,7 @@
 0:?     'anon@0' (layout( row_major std140) uniform block{ uniform 1-component vector of float f1,  uniform 1X1 matrix of float fmat11,  uniform 4X1 matrix of float fmat41,  uniform 1X2 matrix of float fmat12,  uniform 2X3 matrix of double dmat23,  uniform 4X4 matrix of int int44})
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 30
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.matType.int.frag.out b/Test/baseResults/hlsl.matType.int.frag.out
index c62ea54..b8d29ac 100644
--- a/Test/baseResults/hlsl.matType.int.frag.out
+++ b/Test/baseResults/hlsl.matType.int.frag.out
@@ -398,7 +398,7 @@
 0:?     '@entryPointOutput.color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 232
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.matpack-1.frag.out b/Test/baseResults/hlsl.matpack-1.frag.out
index 1b992b9..b92f79d 100644
--- a/Test/baseResults/hlsl.matpack-1.frag.out
+++ b/Test/baseResults/hlsl.matpack-1.frag.out
@@ -100,7 +100,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 39
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.matpack-pragma.frag.out b/Test/baseResults/hlsl.matpack-pragma.frag.out
index a631e89..2750d76 100644
--- a/Test/baseResults/hlsl.matpack-pragma.frag.out
+++ b/Test/baseResults/hlsl.matpack-pragma.frag.out
@@ -170,7 +170,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 44
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.matrixSwizzle.vert.out b/Test/baseResults/hlsl.matrixSwizzle.vert.out
index 544d315..9bf7e56 100755
--- a/Test/baseResults/hlsl.matrixSwizzle.vert.out
+++ b/Test/baseResults/hlsl.matrixSwizzle.vert.out
@@ -677,7 +677,7 @@
 
 Missing functionality: matrix swizzle
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 118
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.matrixindex.frag.out b/Test/baseResults/hlsl.matrixindex.frag.out
index b7ca498..63e5614 100644
--- a/Test/baseResults/hlsl.matrixindex.frag.out
+++ b/Test/baseResults/hlsl.matrixindex.frag.out
@@ -272,7 +272,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 83
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.max.frag.out b/Test/baseResults/hlsl.max.frag.out
index c3dc7cd..db215a2 100755
--- a/Test/baseResults/hlsl.max.frag.out
+++ b/Test/baseResults/hlsl.max.frag.out
@@ -66,7 +66,7 @@
 0:?     'input2' (layout( location=1) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 33
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.memberFunCall.frag.out b/Test/baseResults/hlsl.memberFunCall.frag.out
index a459a7d..01cb99a 100755
--- a/Test/baseResults/hlsl.memberFunCall.frag.out
+++ b/Test/baseResults/hlsl.memberFunCall.frag.out
@@ -152,7 +152,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 73
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.mintypes.frag.out b/Test/baseResults/hlsl.mintypes.frag.out
index 93a8d02..8722cf2 100644
--- a/Test/baseResults/hlsl.mintypes.frag.out
+++ b/Test/baseResults/hlsl.mintypes.frag.out
@@ -98,7 +98,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 70
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.mip.operator.frag.out b/Test/baseResults/hlsl.mip.operator.frag.out
index 056febc..eb884da 100644
--- a/Test/baseResults/hlsl.mip.operator.frag.out
+++ b/Test/baseResults/hlsl.mip.operator.frag.out
@@ -128,7 +128,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 61
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.mul-truncate.frag.out b/Test/baseResults/hlsl.mul-truncate.frag.out
index 569b9b4..80fe1cb 100644
--- a/Test/baseResults/hlsl.mul-truncate.frag.out
+++ b/Test/baseResults/hlsl.mul-truncate.frag.out
@@ -383,7 +383,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 231
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.multiDescriptorSet.frag.out b/Test/baseResults/hlsl.multiDescriptorSet.frag.out
index 75eeda6..8bd1ad8 100644
--- a/Test/baseResults/hlsl.multiDescriptorSet.frag.out
+++ b/Test/baseResults/hlsl.multiDescriptorSet.frag.out
@@ -1,6 +1,6 @@
 hlsl.multiDescriptorSet.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 92
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.multiEntry.vert.out b/Test/baseResults/hlsl.multiEntry.vert.out
index 69abaf3..1c77118 100755
--- a/Test/baseResults/hlsl.multiEntry.vert.out
+++ b/Test/baseResults/hlsl.multiEntry.vert.out
@@ -70,7 +70,7 @@
 0:?     'Index' ( in uint VertexIndex)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 41
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.multiReturn.frag.out b/Test/baseResults/hlsl.multiReturn.frag.out
index 39bdfcc..695a52c 100755
--- a/Test/baseResults/hlsl.multiReturn.frag.out
+++ b/Test/baseResults/hlsl.multiReturn.frag.out
@@ -48,7 +48,7 @@
 0:?     'anon@0' (layout( row_major std140) uniform block{layout( row_major std140) uniform structure{ temp float f,  temp 3-component vector of float v,  temp 3X3 matrix of float m} s})
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 42
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.namespace.frag.out b/Test/baseResults/hlsl.namespace.frag.out
index 98f2206..bfb82da 100755
--- a/Test/baseResults/hlsl.namespace.frag.out
+++ b/Test/baseResults/hlsl.namespace.frag.out
@@ -102,7 +102,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 54
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.noSemantic.functionality1.comp.out b/Test/baseResults/hlsl.noSemantic.functionality1.comp.out
index 0b6e9eb..f00fe74 100644
--- a/Test/baseResults/hlsl.noSemantic.functionality1.comp.out
+++ b/Test/baseResults/hlsl.noSemantic.functionality1.comp.out
@@ -1,6 +1,6 @@
 hlsl.noSemantic.functionality1.comp
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 30
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.nonint-index.frag.out b/Test/baseResults/hlsl.nonint-index.frag.out
index 10053df..131c1ec 100644
--- a/Test/baseResults/hlsl.nonint-index.frag.out
+++ b/Test/baseResults/hlsl.nonint-index.frag.out
@@ -88,7 +88,7 @@
 0:?     'input' (layout( location=0) in float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 39
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.nonstaticMemberFunction.frag.out b/Test/baseResults/hlsl.nonstaticMemberFunction.frag.out
index 6b0ded8..1927a4c 100755
--- a/Test/baseResults/hlsl.nonstaticMemberFunction.frag.out
+++ b/Test/baseResults/hlsl.nonstaticMemberFunction.frag.out
@@ -268,7 +268,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 111
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.numericsuffixes.frag.out b/Test/baseResults/hlsl.numericsuffixes.frag.out
index ca93a19..b1fa856 100644
--- a/Test/baseResults/hlsl.numericsuffixes.frag.out
+++ b/Test/baseResults/hlsl.numericsuffixes.frag.out
@@ -192,7 +192,7 @@
 0:?     '@entryPointOutput.color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 54
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.numthreads.comp.out b/Test/baseResults/hlsl.numthreads.comp.out
index 82c609e..fd7de34 100644
--- a/Test/baseResults/hlsl.numthreads.comp.out
+++ b/Test/baseResults/hlsl.numthreads.comp.out
@@ -44,7 +44,7 @@
 0:?     'tid' ( in 3-component vector of uint GlobalInvocationID)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 23
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.opaque-type-bug.frag.out b/Test/baseResults/hlsl.opaque-type-bug.frag.out
index 6c92fdb..918b462 100644
--- a/Test/baseResults/hlsl.opaque-type-bug.frag.out
+++ b/Test/baseResults/hlsl.opaque-type-bug.frag.out
@@ -58,7 +58,7 @@
 0:?     'MyTexture' (layout( binding=0) uniform texture2D)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 27
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.overload.frag.out b/Test/baseResults/hlsl.overload.frag.out
index da40b57..5960d3d 100755
--- a/Test/baseResults/hlsl.overload.frag.out
+++ b/Test/baseResults/hlsl.overload.frag.out
@@ -734,7 +734,7 @@
 0:?     'input' (layout( location=0) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 520
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.params.default.frag.out b/Test/baseResults/hlsl.params.default.frag.out
index 8d90308..c98e0c6 100644
--- a/Test/baseResults/hlsl.params.default.frag.out
+++ b/Test/baseResults/hlsl.params.default.frag.out
@@ -376,7 +376,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of int)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 178
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.partialFlattenLocal.vert.out b/Test/baseResults/hlsl.partialFlattenLocal.vert.out
index 104a6e0..9524118 100755
--- a/Test/baseResults/hlsl.partialFlattenLocal.vert.out
+++ b/Test/baseResults/hlsl.partialFlattenLocal.vert.out
@@ -237,7 +237,7 @@
 0:?     'pos' (layout( location=0) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 90
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.partialFlattenMixed.vert.out b/Test/baseResults/hlsl.partialFlattenMixed.vert.out
index ec91076..51e4c93 100755
--- a/Test/baseResults/hlsl.partialFlattenMixed.vert.out
+++ b/Test/baseResults/hlsl.partialFlattenMixed.vert.out
@@ -91,7 +91,7 @@
 0:?     'pos' (layout( location=0) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 43
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.partialInit.frag.out b/Test/baseResults/hlsl.partialInit.frag.out
index f79e5da..350a745 100755
--- a/Test/baseResults/hlsl.partialInit.frag.out
+++ b/Test/baseResults/hlsl.partialInit.frag.out
@@ -399,7 +399,7 @@
 0:?       0 (const int)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 104
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.pp.expand.frag.err b/Test/baseResults/hlsl.pp.expand.frag.err
new file mode 100644
index 0000000..1b5681f
--- /dev/null
+++ b/Test/baseResults/hlsl.pp.expand.frag.err
@@ -0,0 +1,3 @@
+ERROR: HLSL currently only supported when requesting SPIR-V for Vulkan.
+ERROR: HLSL currently only supported when requesting SPIR-V for Vulkan.
+
diff --git a/Test/baseResults/hlsl.pp.expand.frag.out b/Test/baseResults/hlsl.pp.expand.frag.out
new file mode 100644
index 0000000..7197891
--- /dev/null
+++ b/Test/baseResults/hlsl.pp.expand.frag.out
@@ -0,0 +1,18 @@
+
+
+
+
+
+
+struct A
+{
+    float4 a;
+    float4 b;
+    float4 c = { 1, 2, 3, 4 };
+    float4 d = {({ {(({ 1, 2, 3, 4 }))} })}, { { 1, 2, 3, 4 } };
+};
+
+void main()
+{
+}
+
diff --git a/Test/baseResults/hlsl.pp.line.frag.out b/Test/baseResults/hlsl.pp.line.frag.out
index 83ba603..2c06fe9 100644
--- a/Test/baseResults/hlsl.pp.line.frag.out
+++ b/Test/baseResults/hlsl.pp.line.frag.out
@@ -120,7 +120,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 42
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.pp.vert.out b/Test/baseResults/hlsl.pp.vert.out
index 91f5591..817b647 100755
--- a/Test/baseResults/hlsl.pp.vert.out
+++ b/Test/baseResults/hlsl.pp.vert.out
@@ -26,7 +26,7 @@
 0:?     'anon@0' (layout( row_major std140) uniform block{ uniform int goodGlobal1,  uniform int goodGlobal2})
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 13
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.precedence.frag.out b/Test/baseResults/hlsl.precedence.frag.out
index ba6961a..f4c5338 100755
--- a/Test/baseResults/hlsl.precedence.frag.out
+++ b/Test/baseResults/hlsl.precedence.frag.out
@@ -148,7 +148,7 @@
 0:?     'a4' (layout( location=3) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 65
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.precedence2.frag.out b/Test/baseResults/hlsl.precedence2.frag.out
index 7af669a..9ce674d 100755
--- a/Test/baseResults/hlsl.precedence2.frag.out
+++ b/Test/baseResults/hlsl.precedence2.frag.out
@@ -114,7 +114,7 @@
 0:?     'a4' (layout( location=3) flat in int)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 56
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.precise.frag.out b/Test/baseResults/hlsl.precise.frag.out
index 69cbc66..dd45069 100644
--- a/Test/baseResults/hlsl.precise.frag.out
+++ b/Test/baseResults/hlsl.precise.frag.out
@@ -76,7 +76,7 @@
 0:?     '@entryPointOutput.color' (layout( location=0) noContraction out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 37
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.preprocessor.frag.out b/Test/baseResults/hlsl.preprocessor.frag.out
index a2c96f0..c78de3d 100644
--- a/Test/baseResults/hlsl.preprocessor.frag.out
+++ b/Test/baseResults/hlsl.preprocessor.frag.out
@@ -94,7 +94,7 @@
 0:?     'input' (layout( location=0) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 40
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.promote.atomic.frag.out b/Test/baseResults/hlsl.promote.atomic.frag.out
index 6b6743a..ecc188b 100644
--- a/Test/baseResults/hlsl.promote.atomic.frag.out
+++ b/Test/baseResults/hlsl.promote.atomic.frag.out
@@ -64,7 +64,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 36
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.promote.binary.frag.out b/Test/baseResults/hlsl.promote.binary.frag.out
index 44c1a24..e1931af 100644
--- a/Test/baseResults/hlsl.promote.binary.frag.out
+++ b/Test/baseResults/hlsl.promote.binary.frag.out
@@ -172,7 +172,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 83
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.promote.vec1.frag.out b/Test/baseResults/hlsl.promote.vec1.frag.out
index b89d784..b92d740 100644
--- a/Test/baseResults/hlsl.promote.vec1.frag.out
+++ b/Test/baseResults/hlsl.promote.vec1.frag.out
@@ -80,7 +80,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 31
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.promotions.frag.out b/Test/baseResults/hlsl.promotions.frag.out
index 0fcb6b7..9c08948 100644
--- a/Test/baseResults/hlsl.promotions.frag.out
+++ b/Test/baseResults/hlsl.promotions.frag.out
@@ -1582,7 +1582,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 596
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.reflection.binding.frag.out b/Test/baseResults/hlsl.reflection.binding.frag.out
index dd19621..464ce0f 100644
--- a/Test/baseResults/hlsl.reflection.binding.frag.out
+++ b/Test/baseResults/hlsl.reflection.binding.frag.out
@@ -1,19 +1,19 @@
 hlsl.reflection.binding.frag
 Uniform reflection:
-t1: offset -1, type 8b5d, size 1, index -1, binding 15
-s1: offset -1, type 0, size 1, index -1, binding 5
-t1a: offset -1, type 8b5d, size 1, index -1, binding 16
-s1a: offset -1, type 0, size 1, index -1, binding 6
-c1_a: offset 0, type 8b52, size 1, index 0, binding -1
-c1_b: offset 16, type 1404, size 1, index 0, binding -1
-c1_c: offset 20, type 1406, size 1, index 0, binding -1
-c2_a: offset 0, type 8b52, size 1, index 1, binding -1
-c2_b: offset 16, type 1404, size 1, index 1, binding -1
-c2_c: offset 20, type 1406, size 1, index 1, binding -1
+t1: offset -1, type 8b5d, size 1, index -1, binding 15, stages 16
+s1: offset -1, type 0, size 1, index -1, binding 5, stages 16
+t1a: offset -1, type 8b5d, size 1, index -1, binding 16, stages 16
+s1a: offset -1, type 0, size 1, index -1, binding 6, stages 16
+c1_a: offset 0, type 8b52, size 1, index 0, binding -1, stages 16
+c1_b: offset 16, type 1404, size 1, index 0, binding -1, stages 16
+c1_c: offset 20, type 1406, size 1, index 0, binding -1, stages 16
+c2_a: offset 0, type 8b52, size 1, index 1, binding -1, stages 16
+c2_b: offset 16, type 1404, size 1, index 1, binding -1, stages 16
+c2_c: offset 20, type 1406, size 1, index 1, binding -1, stages 16
 
 Uniform block reflection:
-cbuff1: offset -1, type ffffffff, size 24, index -1, binding 2
-cbuff2: offset -1, type ffffffff, size 24, index -1, binding 3
+cbuff1: offset -1, type ffffffff, size 24, index -1, binding 2, stages 0
+cbuff2: offset -1, type ffffffff, size 24, index -1, binding 3, stages 0
 
 Vertex attribute reflection:
 
diff --git a/Test/baseResults/hlsl.reflection.vert.out b/Test/baseResults/hlsl.reflection.vert.out
index 5f7a033..ea8d869 100644
--- a/Test/baseResults/hlsl.reflection.vert.out
+++ b/Test/baseResults/hlsl.reflection.vert.out
@@ -1,76 +1,76 @@
 hlsl.reflection.vert
 Uniform reflection:
-anonMember3: offset 80, type 8b52, size 1, index 0, binding -1
-s.a: offset 0, type 1404, size 1, index 1, binding -1
-m23: offset 16, type 8b67, size 1, index 0, binding -1
-scalarAfterm23: offset 48, type 1404, size 1, index 0, binding -1
-c_m23: offset 16, type 8b67, size 1, index 2, binding -1
-c_scalarAfterm23: offset 48, type 1404, size 1, index 2, binding -1
-scalarBeforeArray: offset 96, type 1404, size 1, index 0, binding -1
-floatArray: offset 112, type 1406, size 5, index 0, binding -1
-scalarAfterArray: offset 192, type 1404, size 1, index 0, binding -1
-m22: offset 208, type 8b5a, size 9, index 0, binding -1
-dm22: offset 32, type 8b5a, size 4, index 1, binding -1
-foo.n1.a: offset 0, type 1406, size 1, index 3, binding -1
-foo.n2.b: offset 16, type 1406, size 1, index 3, binding -1
-foo.n2.c: offset 20, type 1406, size 1, index 3, binding -1
-foo.n2.d: offset 24, type 1406, size 1, index 3, binding -1
-deepA.d2.d1[2].va: offset 376, type 8b50, size 2, index 1, binding -1
-deepB.d2.d1.va: offset 984, type 8b50, size 2, index 1, binding -1
-deepB.d2.d1[0].va: offset 984, type 8b50, size 2, index 1, binding -1
-deepB.d2.d1[1].va: offset 984, type 8b50, size 2, index 1, binding -1
-deepB.d2.d1[2].va: offset 984, type 8b50, size 2, index 1, binding -1
-deepB.d2.d1[3].va: offset 984, type 8b50, size 2, index 1, binding -1
-deepC.iv4: offset 1568, type 8b52, size 1, index 1, binding -1
-deepC.d2.i: offset 1568, type 1404, size 1, index 1, binding -1
-deepC.d2.d1[0].va: offset 1568, type 8b50, size 3, index 1, binding -1
-deepC.d2.d1[0].b: offset 1568, type 8b56, size 1, index 1, binding -1
-deepC.d2.d1[1].va: offset 1568, type 8b50, size 3, index 1, binding -1
-deepC.d2.d1[1].b: offset 1568, type 8b56, size 1, index 1, binding -1
-deepC.d2.d1[2].va: offset 1568, type 8b50, size 3, index 1, binding -1
-deepC.d2.d1[2].b: offset 1568, type 8b56, size 1, index 1, binding -1
-deepC.d2.d1[3].va: offset 1568, type 8b50, size 3, index 1, binding -1
-deepC.d2.d1[3].b: offset 1568, type 8b56, size 1, index 1, binding -1
-deepC.v3: offset 1568, type 8b54, size 1, index 1, binding -1
-deepD[0].iv4: offset 2480, type 8b52, size 1, index 1, binding -1
-deepD[0].d2.i: offset 2480, type 1404, size 1, index 1, binding -1
-deepD[0].d2.d1[0].va: offset 2480, type 8b50, size 3, index 1, binding -1
-deepD[0].d2.d1[0].b: offset 2480, type 8b56, size 1, index 1, binding -1
-deepD[0].d2.d1[1].va: offset 2480, type 8b50, size 3, index 1, binding -1
-deepD[0].d2.d1[1].b: offset 2480, type 8b56, size 1, index 1, binding -1
-deepD[0].d2.d1[2].va: offset 2480, type 8b50, size 3, index 1, binding -1
-deepD[0].d2.d1[2].b: offset 2480, type 8b56, size 1, index 1, binding -1
-deepD[0].d2.d1[3].va: offset 2480, type 8b50, size 3, index 1, binding -1
-deepD[0].d2.d1[3].b: offset 2480, type 8b56, size 1, index 1, binding -1
-deepD[0].v3: offset 2480, type 8b54, size 1, index 1, binding -1
-deepD[1].iv4: offset 2480, type 8b52, size 1, index 1, binding -1
-deepD[1].d2.i: offset 2480, type 1404, size 1, index 1, binding -1
-deepD[1].d2.d1[0].va: offset 2480, type 8b50, size 3, index 1, binding -1
-deepD[1].d2.d1[0].b: offset 2480, type 8b56, size 1, index 1, binding -1
-deepD[1].d2.d1[1].va: offset 2480, type 8b50, size 3, index 1, binding -1
-deepD[1].d2.d1[1].b: offset 2480, type 8b56, size 1, index 1, binding -1
-deepD[1].d2.d1[2].va: offset 2480, type 8b50, size 3, index 1, binding -1
-deepD[1].d2.d1[2].b: offset 2480, type 8b56, size 1, index 1, binding -1
-deepD[1].d2.d1[3].va: offset 2480, type 8b50, size 3, index 1, binding -1
-deepD[1].d2.d1[3].b: offset 2480, type 8b56, size 1, index 1, binding -1
-deepD[1].v3: offset 2480, type 8b54, size 1, index 1, binding -1
-foo1: offset 0, type 1406, size 1, index 4, binding -1
-foo2: offset 0, type 1406, size 1, index 5, binding -1
-anonMember1: offset 0, type 8b51, size 1, index 0, binding -1
-uf1: offset 16, type 1406, size 1, index 1, binding -1
+anonMember3: offset 80, type 8b52, size 1, index 0, binding -1, stages 1
+s.a: offset 0, type 1404, size 1, index 1, binding -1, stages 1
+m23: offset 16, type 8b67, size 1, index 0, binding -1, stages 1
+scalarAfterm23: offset 48, type 1404, size 1, index 0, binding -1, stages 1
+c_m23: offset 16, type 8b67, size 1, index 2, binding -1, stages 1
+c_scalarAfterm23: offset 48, type 1404, size 1, index 2, binding -1, stages 1
+scalarBeforeArray: offset 96, type 1404, size 1, index 0, binding -1, stages 1
+floatArray: offset 112, type 1406, size 5, index 0, binding -1, stages 1
+scalarAfterArray: offset 192, type 1404, size 1, index 0, binding -1, stages 1
+m22: offset 208, type 8b5a, size 9, index 0, binding -1, stages 1
+dm22: offset 32, type 8b5a, size 4, index 1, binding -1, stages 1
+foo.n1.a: offset 0, type 1406, size 1, index 3, binding -1, stages 1
+foo.n2.b: offset 16, type 1406, size 1, index 3, binding -1, stages 1
+foo.n2.c: offset 20, type 1406, size 1, index 3, binding -1, stages 1
+foo.n2.d: offset 24, type 1406, size 1, index 3, binding -1, stages 1
+deepA.d2.d1[2].va: offset 376, type 8b50, size 2, index 1, binding -1, stages 1
+deepB.d2.d1.va: offset 984, type 8b50, size 2, index 1, binding -1, stages 1
+deepB.d2.d1[0].va: offset 984, type 8b50, size 2, index 1, binding -1, stages 1
+deepB.d2.d1[1].va: offset 984, type 8b50, size 2, index 1, binding -1, stages 1
+deepB.d2.d1[2].va: offset 984, type 8b50, size 2, index 1, binding -1, stages 1
+deepB.d2.d1[3].va: offset 984, type 8b50, size 2, index 1, binding -1, stages 1
+deepC.iv4: offset 1568, type 8b52, size 1, index 1, binding -1, stages 1
+deepC.d2.i: offset 1568, type 1404, size 1, index 1, binding -1, stages 1
+deepC.d2.d1[0].va: offset 1568, type 8b50, size 3, index 1, binding -1, stages 1
+deepC.d2.d1[0].b: offset 1568, type 8b56, size 1, index 1, binding -1, stages 1
+deepC.d2.d1[1].va: offset 1568, type 8b50, size 3, index 1, binding -1, stages 1
+deepC.d2.d1[1].b: offset 1568, type 8b56, size 1, index 1, binding -1, stages 1
+deepC.d2.d1[2].va: offset 1568, type 8b50, size 3, index 1, binding -1, stages 1
+deepC.d2.d1[2].b: offset 1568, type 8b56, size 1, index 1, binding -1, stages 1
+deepC.d2.d1[3].va: offset 1568, type 8b50, size 3, index 1, binding -1, stages 1
+deepC.d2.d1[3].b: offset 1568, type 8b56, size 1, index 1, binding -1, stages 1
+deepC.v3: offset 1568, type 8b54, size 1, index 1, binding -1, stages 1
+deepD[0].iv4: offset 2480, type 8b52, size 1, index 1, binding -1, stages 1
+deepD[0].d2.i: offset 2480, type 1404, size 1, index 1, binding -1, stages 1
+deepD[0].d2.d1[0].va: offset 2480, type 8b50, size 3, index 1, binding -1, stages 1
+deepD[0].d2.d1[0].b: offset 2480, type 8b56, size 1, index 1, binding -1, stages 1
+deepD[0].d2.d1[1].va: offset 2480, type 8b50, size 3, index 1, binding -1, stages 1
+deepD[0].d2.d1[1].b: offset 2480, type 8b56, size 1, index 1, binding -1, stages 1
+deepD[0].d2.d1[2].va: offset 2480, type 8b50, size 3, index 1, binding -1, stages 1
+deepD[0].d2.d1[2].b: offset 2480, type 8b56, size 1, index 1, binding -1, stages 1
+deepD[0].d2.d1[3].va: offset 2480, type 8b50, size 3, index 1, binding -1, stages 1
+deepD[0].d2.d1[3].b: offset 2480, type 8b56, size 1, index 1, binding -1, stages 1
+deepD[0].v3: offset 2480, type 8b54, size 1, index 1, binding -1, stages 1
+deepD[1].iv4: offset 2480, type 8b52, size 1, index 1, binding -1, stages 1
+deepD[1].d2.i: offset 2480, type 1404, size 1, index 1, binding -1, stages 1
+deepD[1].d2.d1[0].va: offset 2480, type 8b50, size 3, index 1, binding -1, stages 1
+deepD[1].d2.d1[0].b: offset 2480, type 8b56, size 1, index 1, binding -1, stages 1
+deepD[1].d2.d1[1].va: offset 2480, type 8b50, size 3, index 1, binding -1, stages 1
+deepD[1].d2.d1[1].b: offset 2480, type 8b56, size 1, index 1, binding -1, stages 1
+deepD[1].d2.d1[2].va: offset 2480, type 8b50, size 3, index 1, binding -1, stages 1
+deepD[1].d2.d1[2].b: offset 2480, type 8b56, size 1, index 1, binding -1, stages 1
+deepD[1].d2.d1[3].va: offset 2480, type 8b50, size 3, index 1, binding -1, stages 1
+deepD[1].d2.d1[3].b: offset 2480, type 8b56, size 1, index 1, binding -1, stages 1
+deepD[1].v3: offset 2480, type 8b54, size 1, index 1, binding -1, stages 1
+foo1: offset 0, type 1406, size 1, index 4, binding -1, stages 1
+foo2: offset 0, type 1406, size 1, index 5, binding -1, stages 1
+anonMember1: offset 0, type 8b51, size 1, index 0, binding -1, stages 1
+uf1: offset 16, type 1406, size 1, index 1, binding -1, stages 1
 
 Uniform block reflection:
-nameless: offset -1, type ffffffff, size 496, index -1, binding -1
-$Global: offset -1, type ffffffff, size 3088, index -1, binding -1
-c_nameless: offset -1, type ffffffff, size 96, index -1, binding -1
-nested: offset -1, type ffffffff, size 32, index -1, binding -1
-abl: offset -1, type ffffffff, size 4, index -1, binding -1
-abl2: offset -1, type ffffffff, size 4, index -1, binding -1
+nameless: offset -1, type ffffffff, size 496, index -1, binding -1, stages 0
+$Global: offset -1, type ffffffff, size 3088, index -1, binding -1, stages 0
+c_nameless: offset -1, type ffffffff, size 96, index -1, binding -1, stages 0
+nested: offset -1, type ffffffff, size 32, index -1, binding -1, stages 0
+abl: offset -1, type ffffffff, size 4, index -1, binding -1, stages 0
+abl2: offset -1, type ffffffff, size 4, index -1, binding -1, stages 0
 
 Vertex attribute reflection:
-attributeFloat: offset 0, type 1406, size 0, index 0, binding -1
-attributeFloat2: offset 0, type 8b50, size 0, index 0, binding -1
-attributeFloat3: offset 0, type 8b51, size 0, index 0, binding -1
-attributeFloat4: offset 0, type 8b52, size 0, index 0, binding -1
-attributeMat4: offset 0, type 8b5c, size 0, index 0, binding -1
+attributeFloat: offset 0, type 1406, size 0, index 0, binding -1, stages 0
+attributeFloat2: offset 0, type 8b50, size 0, index 0, binding -1, stages 0
+attributeFloat3: offset 0, type 8b51, size 0, index 0, binding -1, stages 0
+attributeFloat4: offset 0, type 8b52, size 0, index 0, binding -1, stages 0
+attributeMat4: offset 0, type 8b5c, size 0, index 0, binding -1, stages 0
 
diff --git a/Test/baseResults/hlsl.rw.atomics.frag.out b/Test/baseResults/hlsl.rw.atomics.frag.out
index 211e3af..c874cd2 100644
--- a/Test/baseResults/hlsl.rw.atomics.frag.out
+++ b/Test/baseResults/hlsl.rw.atomics.frag.out
@@ -3946,7 +3946,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 1147
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.rw.bracket.frag.out b/Test/baseResults/hlsl.rw.bracket.frag.out
index b8ed997..d829a7b 100644
--- a/Test/baseResults/hlsl.rw.bracket.frag.out
+++ b/Test/baseResults/hlsl.rw.bracket.frag.out
@@ -1744,7 +1744,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 607
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.rw.register.frag.out b/Test/baseResults/hlsl.rw.register.frag.out
index 25c7bb4..01f6c89 100644
--- a/Test/baseResults/hlsl.rw.register.frag.out
+++ b/Test/baseResults/hlsl.rw.register.frag.out
@@ -98,7 +98,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 42
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.rw.scalar.bracket.frag.out b/Test/baseResults/hlsl.rw.scalar.bracket.frag.out
index be584b4..7fc26cc 100644
--- a/Test/baseResults/hlsl.rw.scalar.bracket.frag.out
+++ b/Test/baseResults/hlsl.rw.scalar.bracket.frag.out
@@ -1690,7 +1690,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 571
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.rw.swizzle.frag.out b/Test/baseResults/hlsl.rw.swizzle.frag.out
index d8836c5..8fcbb4b 100644
--- a/Test/baseResults/hlsl.rw.swizzle.frag.out
+++ b/Test/baseResults/hlsl.rw.swizzle.frag.out
@@ -202,7 +202,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 63
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.rw.vec2.bracket.frag.out b/Test/baseResults/hlsl.rw.vec2.bracket.frag.out
index a967df6..bf1fe08 100644
--- a/Test/baseResults/hlsl.rw.vec2.bracket.frag.out
+++ b/Test/baseResults/hlsl.rw.vec2.bracket.frag.out
@@ -1708,7 +1708,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 605
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.sample.array.dx10.frag.out b/Test/baseResults/hlsl.sample.array.dx10.frag.out
index 809c5cf..92e3dd8 100644
--- a/Test/baseResults/hlsl.sample.array.dx10.frag.out
+++ b/Test/baseResults/hlsl.sample.array.dx10.frag.out
@@ -322,7 +322,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 146
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.sample.basic.dx10.frag.out b/Test/baseResults/hlsl.sample.basic.dx10.frag.out
index 733f1dd..b6915b6 100644
--- a/Test/baseResults/hlsl.sample.basic.dx10.frag.out
+++ b/Test/baseResults/hlsl.sample.basic.dx10.frag.out
@@ -550,7 +550,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 198
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.sample.offset.dx10.frag.out b/Test/baseResults/hlsl.sample.offset.dx10.frag.out
index 862150b..bd199a3 100644
--- a/Test/baseResults/hlsl.sample.offset.dx10.frag.out
+++ b/Test/baseResults/hlsl.sample.offset.dx10.frag.out
@@ -364,7 +364,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 161
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.sample.offsetarray.dx10.frag.out b/Test/baseResults/hlsl.sample.offsetarray.dx10.frag.out
index 04dd8a7..065cef0 100644
--- a/Test/baseResults/hlsl.sample.offsetarray.dx10.frag.out
+++ b/Test/baseResults/hlsl.sample.offsetarray.dx10.frag.out
@@ -274,7 +274,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 118
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.sample.sub-vec4.dx10.frag.out b/Test/baseResults/hlsl.sample.sub-vec4.dx10.frag.out
index efc3225..f24415a 100644
--- a/Test/baseResults/hlsl.sample.sub-vec4.dx10.frag.out
+++ b/Test/baseResults/hlsl.sample.sub-vec4.dx10.frag.out
@@ -154,7 +154,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 72
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.samplebias.array.dx10.frag.out b/Test/baseResults/hlsl.samplebias.array.dx10.frag.out
index d44fa3a..a6fc0a5 100644
--- a/Test/baseResults/hlsl.samplebias.array.dx10.frag.out
+++ b/Test/baseResults/hlsl.samplebias.array.dx10.frag.out
@@ -358,7 +358,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 146
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.samplebias.basic.dx10.frag.out b/Test/baseResults/hlsl.samplebias.basic.dx10.frag.out
index d8da49f..21794f9 100644
--- a/Test/baseResults/hlsl.samplebias.basic.dx10.frag.out
+++ b/Test/baseResults/hlsl.samplebias.basic.dx10.frag.out
@@ -424,7 +424,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 170
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.samplebias.offset.dx10.frag.out b/Test/baseResults/hlsl.samplebias.offset.dx10.frag.out
index 997a4b5..73d69dc 100644
--- a/Test/baseResults/hlsl.samplebias.offset.dx10.frag.out
+++ b/Test/baseResults/hlsl.samplebias.offset.dx10.frag.out
@@ -400,7 +400,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 161
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.samplebias.offsetarray.dx10.frag.out b/Test/baseResults/hlsl.samplebias.offsetarray.dx10.frag.out
index f026ca8..0a7a66b 100644
--- a/Test/baseResults/hlsl.samplebias.offsetarray.dx10.frag.out
+++ b/Test/baseResults/hlsl.samplebias.offsetarray.dx10.frag.out
@@ -298,7 +298,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 118
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.samplecmp.array.dx10.frag.out b/Test/baseResults/hlsl.samplecmp.array.dx10.frag.out
index 2e8f86e..f8f20ca 100644
--- a/Test/baseResults/hlsl.samplecmp.array.dx10.frag.out
+++ b/Test/baseResults/hlsl.samplecmp.array.dx10.frag.out
@@ -398,7 +398,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 209
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.samplecmp.basic.dx10.frag.out b/Test/baseResults/hlsl.samplecmp.basic.dx10.frag.out
index 5304e5a..9862297 100644
--- a/Test/baseResults/hlsl.samplecmp.basic.dx10.frag.out
+++ b/Test/baseResults/hlsl.samplecmp.basic.dx10.frag.out
@@ -380,7 +380,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 198
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.samplecmp.dualmode.frag.out b/Test/baseResults/hlsl.samplecmp.dualmode.frag.out
index d8c7d04..7bcf085 100644
--- a/Test/baseResults/hlsl.samplecmp.dualmode.frag.out
+++ b/Test/baseResults/hlsl.samplecmp.dualmode.frag.out
@@ -85,7 +85,7 @@
 0:?     'g_tTex' (layout( binding=3) uniform texture1D)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 43
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.samplecmp.offset.dx10.frag.out b/Test/baseResults/hlsl.samplecmp.offset.dx10.frag.out
index ae0bd68..f0ba444 100644
--- a/Test/baseResults/hlsl.samplecmp.offset.dx10.frag.out
+++ b/Test/baseResults/hlsl.samplecmp.offset.dx10.frag.out
@@ -326,7 +326,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 167
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.samplecmp.offsetarray.dx10.frag.out b/Test/baseResults/hlsl.samplecmp.offsetarray.dx10.frag.out
index 045523f..ae6078c 100644
--- a/Test/baseResults/hlsl.samplecmp.offsetarray.dx10.frag.out
+++ b/Test/baseResults/hlsl.samplecmp.offsetarray.dx10.frag.out
@@ -338,7 +338,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 178
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.samplecmplevelzero.array.dx10.frag.out b/Test/baseResults/hlsl.samplecmplevelzero.array.dx10.frag.out
index 8c860e7..ae5b118 100644
--- a/Test/baseResults/hlsl.samplecmplevelzero.array.dx10.frag.out
+++ b/Test/baseResults/hlsl.samplecmplevelzero.array.dx10.frag.out
@@ -434,7 +434,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 210
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.samplecmplevelzero.basic.dx10.frag.out b/Test/baseResults/hlsl.samplecmplevelzero.basic.dx10.frag.out
index 568cb82..53ecbf2 100644
--- a/Test/baseResults/hlsl.samplecmplevelzero.basic.dx10.frag.out
+++ b/Test/baseResults/hlsl.samplecmplevelzero.basic.dx10.frag.out
@@ -416,7 +416,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 199
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.samplecmplevelzero.offset.dx10.frag.out b/Test/baseResults/hlsl.samplecmplevelzero.offset.dx10.frag.out
index 7733ab8..1d4f2cd 100644
--- a/Test/baseResults/hlsl.samplecmplevelzero.offset.dx10.frag.out
+++ b/Test/baseResults/hlsl.samplecmplevelzero.offset.dx10.frag.out
@@ -350,7 +350,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 168
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.samplecmplevelzero.offsetarray.dx10.frag.out b/Test/baseResults/hlsl.samplecmplevelzero.offsetarray.dx10.frag.out
index 673f78b..dea6663 100644
--- a/Test/baseResults/hlsl.samplecmplevelzero.offsetarray.dx10.frag.out
+++ b/Test/baseResults/hlsl.samplecmplevelzero.offsetarray.dx10.frag.out
@@ -362,7 +362,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 179
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.samplegrad.array.dx10.frag.out b/Test/baseResults/hlsl.samplegrad.array.dx10.frag.out
index 309bf6c..81a92a2 100644
--- a/Test/baseResults/hlsl.samplegrad.array.dx10.frag.out
+++ b/Test/baseResults/hlsl.samplegrad.array.dx10.frag.out
@@ -430,7 +430,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 140
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.samplegrad.basic.dx10.frag.out b/Test/baseResults/hlsl.samplegrad.basic.dx10.frag.out
index 2367163..3acd9af 100644
--- a/Test/baseResults/hlsl.samplegrad.basic.dx10.frag.out
+++ b/Test/baseResults/hlsl.samplegrad.basic.dx10.frag.out
@@ -532,7 +532,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 175
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.samplegrad.basic.dx10.vert.out b/Test/baseResults/hlsl.samplegrad.basic.dx10.vert.out
index d7a2448..d787939 100644
--- a/Test/baseResults/hlsl.samplegrad.basic.dx10.vert.out
+++ b/Test/baseResults/hlsl.samplegrad.basic.dx10.vert.out
@@ -494,7 +494,7 @@
 0:?     '@entryPointOutput.Pos' ( out 4-component vector of float Position)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 166
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.samplegrad.offset.dx10.frag.out b/Test/baseResults/hlsl.samplegrad.offset.dx10.frag.out
index 6c98dc3..b5a8549 100644
--- a/Test/baseResults/hlsl.samplegrad.offset.dx10.frag.out
+++ b/Test/baseResults/hlsl.samplegrad.offset.dx10.frag.out
@@ -472,7 +472,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 166
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.samplegrad.offsetarray.dx10.frag.out b/Test/baseResults/hlsl.samplegrad.offsetarray.dx10.frag.out
index 5caec99..39a2838 100644
--- a/Test/baseResults/hlsl.samplegrad.offsetarray.dx10.frag.out
+++ b/Test/baseResults/hlsl.samplegrad.offsetarray.dx10.frag.out
@@ -340,7 +340,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 120
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.samplelevel.array.dx10.frag.out b/Test/baseResults/hlsl.samplelevel.array.dx10.frag.out
index 12b20ab..0151cdd 100644
--- a/Test/baseResults/hlsl.samplelevel.array.dx10.frag.out
+++ b/Test/baseResults/hlsl.samplelevel.array.dx10.frag.out
@@ -358,7 +358,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 147
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.samplelevel.basic.dx10.frag.out b/Test/baseResults/hlsl.samplelevel.basic.dx10.frag.out
index 2b585df..9327b84 100644
--- a/Test/baseResults/hlsl.samplelevel.basic.dx10.frag.out
+++ b/Test/baseResults/hlsl.samplelevel.basic.dx10.frag.out
@@ -426,7 +426,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 172
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.samplelevel.basic.dx10.vert.out b/Test/baseResults/hlsl.samplelevel.basic.dx10.vert.out
index 7063f78..d2bd1b8 100644
--- a/Test/baseResults/hlsl.samplelevel.basic.dx10.vert.out
+++ b/Test/baseResults/hlsl.samplelevel.basic.dx10.vert.out
@@ -386,7 +386,7 @@
 0:?     '@entryPointOutput.Pos' ( out 4-component vector of float Position)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 162
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.samplelevel.offset.dx10.frag.out b/Test/baseResults/hlsl.samplelevel.offset.dx10.frag.out
index 2567650..36c932c 100644
--- a/Test/baseResults/hlsl.samplelevel.offset.dx10.frag.out
+++ b/Test/baseResults/hlsl.samplelevel.offset.dx10.frag.out
@@ -400,7 +400,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 162
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.samplelevel.offsetarray.dx10.frag.out b/Test/baseResults/hlsl.samplelevel.offsetarray.dx10.frag.out
index 5af21f7..bc6fd6b 100644
--- a/Test/baseResults/hlsl.samplelevel.offsetarray.dx10.frag.out
+++ b/Test/baseResults/hlsl.samplelevel.offsetarray.dx10.frag.out
@@ -298,7 +298,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 119
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.scalar-length.frag.out b/Test/baseResults/hlsl.scalar-length.frag.out
index e8fd4f2..aa11af5 100644
--- a/Test/baseResults/hlsl.scalar-length.frag.out
+++ b/Test/baseResults/hlsl.scalar-length.frag.out
@@ -64,7 +64,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 30
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.scalar2matrix.frag.out b/Test/baseResults/hlsl.scalar2matrix.frag.out
index ee92275..57d250e 100644
--- a/Test/baseResults/hlsl.scalar2matrix.frag.out
+++ b/Test/baseResults/hlsl.scalar2matrix.frag.out
@@ -374,7 +374,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 96
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.scalarCast.vert.out b/Test/baseResults/hlsl.scalarCast.vert.out
index 218e4d1..0e07c9f 100755
--- a/Test/baseResults/hlsl.scalarCast.vert.out
+++ b/Test/baseResults/hlsl.scalarCast.vert.out
@@ -322,7 +322,7 @@
 0:?     '@entryPointOutput.texCoord' (layout( location=0) out 2-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 120
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.scope.frag.out b/Test/baseResults/hlsl.scope.frag.out
index d6ce30d..b563380 100755
--- a/Test/baseResults/hlsl.scope.frag.out
+++ b/Test/baseResults/hlsl.scope.frag.out
@@ -102,7 +102,7 @@
 0:?     'input' (layout( location=0) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 49
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.self_cast.frag.out b/Test/baseResults/hlsl.self_cast.frag.out
index b2decf3..9d398ed 100644
--- a/Test/baseResults/hlsl.self_cast.frag.out
+++ b/Test/baseResults/hlsl.self_cast.frag.out
@@ -68,7 +68,7 @@
 0:?   Linker Objects
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 32
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.semantic-1.vert.out b/Test/baseResults/hlsl.semantic-1.vert.out
index a285eb4..b5e4091 100644
--- a/Test/baseResults/hlsl.semantic-1.vert.out
+++ b/Test/baseResults/hlsl.semantic-1.vert.out
@@ -242,7 +242,7 @@
 0:?     'v' (layout( location=0) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 84
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.semantic.geom.out b/Test/baseResults/hlsl.semantic.geom.out
index 017cdfa..1c1a9c0 100755
--- a/Test/baseResults/hlsl.semantic.geom.out
+++ b/Test/baseResults/hlsl.semantic.geom.out
@@ -156,7 +156,7 @@
 0:?     'OutputStream.cull0' ( out 1-element array of float CullDistance)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 65
 
                               Capability Geometry
diff --git a/Test/baseResults/hlsl.semantic.vert.out b/Test/baseResults/hlsl.semantic.vert.out
index 48d1e95..2dbcd57 100755
--- a/Test/baseResults/hlsl.semantic.vert.out
+++ b/Test/baseResults/hlsl.semantic.vert.out
@@ -210,7 +210,7 @@
 0:?     '@entryPointOutput.cull1' ( out 2-element array of float CullDistance)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 70
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.semicolons.frag.out b/Test/baseResults/hlsl.semicolons.frag.out
index 3484b2f..94307a6 100644
--- a/Test/baseResults/hlsl.semicolons.frag.out
+++ b/Test/baseResults/hlsl.semicolons.frag.out
@@ -74,7 +74,7 @@
 0:?     '@entryPointOutput.color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 31
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.shapeConv.frag.out b/Test/baseResults/hlsl.shapeConv.frag.out
index 15ebe4d..d283809 100755
--- a/Test/baseResults/hlsl.shapeConv.frag.out
+++ b/Test/baseResults/hlsl.shapeConv.frag.out
@@ -319,7 +319,7 @@
 0:?   Linker Objects
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 127
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.shapeConvRet.frag.out b/Test/baseResults/hlsl.shapeConvRet.frag.out
index 9b0b065..fc12f7f 100755
--- a/Test/baseResults/hlsl.shapeConvRet.frag.out
+++ b/Test/baseResults/hlsl.shapeConvRet.frag.out
@@ -68,7 +68,7 @@
 0:?     'f' (layout( location=0) in float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 35
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.shift.per-set.frag.out b/Test/baseResults/hlsl.shift.per-set.frag.out
index 9b06693..f7ae02e 100644
--- a/Test/baseResults/hlsl.shift.per-set.frag.out
+++ b/Test/baseResults/hlsl.shift.per-set.frag.out
@@ -196,30 +196,30 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 Uniform reflection:
-t1: offset -1, type 8b5d, size 1, index -1, binding 21
-t2: offset -1, type 8b5e, size 1, index -1, binding 22
-t3: offset -1, type 8b5f, size 1, index -1, binding 26
-t4.@data: offset 0, type 8b52, size 1, index 0, binding -1
-t5.@data: offset 0, type 1405, size 0, index 1, binding -1
-t6: offset -1, type 8dc2, size 1, index -1, binding 23
-s1: offset -1, type 0, size 1, index -1, binding 11
-s2: offset -1, type 0, size 1, index -1, binding 17
-u1: offset -1, type 904c, size 1, index -1, binding 31
-u2: offset -1, type 904d, size 1, index -1, binding 42
-u3: offset -1, type 904e, size 1, index -1, binding 43
-u4: offset -1, type 9051, size 1, index -1, binding 34
-u5.@data: offset 0, type 1405, size 0, index 2, binding -1
-u6.@data: offset 0, type 1406, size 1, index 3, binding -1
-cb1: offset 0, type 1404, size 1, index 4, binding -1
-tb1: offset 0, type 1404, size 1, index 5, binding -1
+t1: offset -1, type 8b5d, size 1, index -1, binding 21, stages 16
+t2: offset -1, type 8b5e, size 1, index -1, binding 22, stages 16
+t3: offset -1, type 8b5f, size 1, index -1, binding 26, stages 16
+t4.@data: offset 0, type 8b52, size 1, index 0, binding -1, stages 16
+t5.@data: offset 0, type 1405, size 0, index 1, binding -1, stages 16
+t6: offset -1, type 8dc2, size 1, index -1, binding 23, stages 16
+s1: offset -1, type 0, size 1, index -1, binding 11, stages 16
+s2: offset -1, type 0, size 1, index -1, binding 17, stages 16
+u1: offset -1, type 904c, size 1, index -1, binding 31, stages 16
+u2: offset -1, type 904d, size 1, index -1, binding 42, stages 16
+u3: offset -1, type 904e, size 1, index -1, binding 43, stages 16
+u4: offset -1, type 9051, size 1, index -1, binding 34, stages 16
+u5.@data: offset 0, type 1405, size 0, index 2, binding -1, stages 16
+u6.@data: offset 0, type 1406, size 1, index 3, binding -1, stages 16
+cb1: offset 0, type 1404, size 1, index 4, binding -1, stages 16
+tb1: offset 0, type 1404, size 1, index 5, binding -1, stages 16
 
 Uniform block reflection:
-t4: offset -1, type ffffffff, size 0, index -1, binding 21
-t5: offset -1, type ffffffff, size 0, index -1, binding 22
-u5: offset -1, type ffffffff, size 0, index -1, binding 44
-u6: offset -1, type ffffffff, size 0, index -1, binding 34
-cb: offset -1, type ffffffff, size 4, index -1, binding 51
-tb: offset -1, type ffffffff, size 4, index -1, binding 27
+t4: offset -1, type ffffffff, size 0, index -1, binding 21, stages 0
+t5: offset -1, type ffffffff, size 0, index -1, binding 22, stages 0
+u5: offset -1, type ffffffff, size 0, index -1, binding 44, stages 0
+u6: offset -1, type ffffffff, size 0, index -1, binding 34, stages 0
+cb: offset -1, type ffffffff, size 4, index -1, binding 51, stages 0
+tb: offset -1, type ffffffff, size 4, index -1, binding 27, stages 0
 
 Vertex attribute reflection:
 
diff --git a/Test/baseResults/hlsl.sin.frag.out b/Test/baseResults/hlsl.sin.frag.out
index a53f2a7..b92085e 100755
--- a/Test/baseResults/hlsl.sin.frag.out
+++ b/Test/baseResults/hlsl.sin.frag.out
@@ -52,7 +52,7 @@
 0:?     'input' (layout( location=0) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 26
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.snorm.uav.comp.out b/Test/baseResults/hlsl.snorm.uav.comp.out
index 1fbf49e..2d6dae7 100644
--- a/Test/baseResults/hlsl.snorm.uav.comp.out
+++ b/Test/baseResults/hlsl.snorm.uav.comp.out
@@ -112,7 +112,7 @@
 0:?     'tid' ( in 3-component vector of uint GlobalInvocationID)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 54
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.staticFuncInit.frag.out b/Test/baseResults/hlsl.staticFuncInit.frag.out
new file mode 100755
index 0000000..d468cec
--- /dev/null
+++ b/Test/baseResults/hlsl.staticFuncInit.frag.out
@@ -0,0 +1,218 @@
+hlsl.staticFuncInit.frag
+Shader version: 500
+gl_FragCoord origin is upper left
+0:12Sequence
+0:1  Sequence
+0:1    move second child to first child ( temp float)
+0:1      'x' ( global float)
+0:1      Constant:
+0:1        1.000000
+0:5  Sequence
+0:5    move second child to first child ( temp float)
+0:5      'x' ( global float)
+0:5      Constant:
+0:5        2.000000
+0:4  Function Definition: f1( ( temp float)
+0:4    Function Parameters: 
+0:?     Sequence
+0:6      add second child into first child ( temp float)
+0:6        'x' ( global float)
+0:6        Constant:
+0:6          10.000000
+0:7      Branch: Return with expression
+0:7        'x' ( global float)
+0:12  Sequence
+0:12    move second child to first child ( temp float)
+0:12      'x' ( global float)
+0:12      Constant:
+0:12        7.000000
+0:11  Function Definition: f2(f1; ( temp float)
+0:11    Function Parameters: 
+0:11      'p' ( in float)
+0:?     Sequence
+0:13      add second child into first child ( temp float)
+0:13        'x' ( global float)
+0:13        'p' ( in float)
+0:14      Branch: Return with expression
+0:14        'x' ( global float)
+0:18  Function Definition: @main( ( temp 4-component vector of float)
+0:18    Function Parameters: 
+0:?     Sequence
+0:19      Branch: Return with expression
+0:19        Construct vec4 ( temp 4-component vector of float)
+0:19          add ( temp float)
+0:19            add ( temp float)
+0:19              add ( temp float)
+0:19                add ( temp float)
+0:19                  'x' ( global float)
+0:19                  Function Call: f1( ( temp float)
+0:19                Function Call: f1( ( temp float)
+0:19              Function Call: f2(f1; ( temp float)
+0:19                Constant:
+0:19                  5.000000
+0:19            Function Call: f2(f1; ( temp float)
+0:19              'x' ( global float)
+0:18  Function Definition: main( ( temp void)
+0:18    Function Parameters: 
+0:?     Sequence
+0:18      move second child to first child ( temp 4-component vector of float)
+0:?         '@entryPointOutput' (layout( location=0) out 4-component vector of float)
+0:18        Function Call: @main( ( temp 4-component vector of float)
+0:?   Linker Objects
+0:?     'x' ( global float)
+0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
+
+
+Linked fragment stage:
+
+
+Shader version: 500
+gl_FragCoord origin is upper left
+0:12Sequence
+0:1  Sequence
+0:1    move second child to first child ( temp float)
+0:1      'x' ( global float)
+0:1      Constant:
+0:1        1.000000
+0:5  Sequence
+0:5    move second child to first child ( temp float)
+0:5      'x' ( global float)
+0:5      Constant:
+0:5        2.000000
+0:4  Function Definition: f1( ( temp float)
+0:4    Function Parameters: 
+0:?     Sequence
+0:6      add second child into first child ( temp float)
+0:6        'x' ( global float)
+0:6        Constant:
+0:6          10.000000
+0:7      Branch: Return with expression
+0:7        'x' ( global float)
+0:12  Sequence
+0:12    move second child to first child ( temp float)
+0:12      'x' ( global float)
+0:12      Constant:
+0:12        7.000000
+0:11  Function Definition: f2(f1; ( temp float)
+0:11    Function Parameters: 
+0:11      'p' ( in float)
+0:?     Sequence
+0:13      add second child into first child ( temp float)
+0:13        'x' ( global float)
+0:13        'p' ( in float)
+0:14      Branch: Return with expression
+0:14        'x' ( global float)
+0:18  Function Definition: @main( ( temp 4-component vector of float)
+0:18    Function Parameters: 
+0:?     Sequence
+0:19      Branch: Return with expression
+0:19        Construct vec4 ( temp 4-component vector of float)
+0:19          add ( temp float)
+0:19            add ( temp float)
+0:19              add ( temp float)
+0:19                add ( temp float)
+0:19                  'x' ( global float)
+0:19                  Function Call: f1( ( temp float)
+0:19                Function Call: f1( ( temp float)
+0:19              Function Call: f2(f1; ( temp float)
+0:19                Constant:
+0:19                  5.000000
+0:19            Function Call: f2(f1; ( temp float)
+0:19              'x' ( global float)
+0:18  Function Definition: main( ( temp void)
+0:18    Function Parameters: 
+0:?     Sequence
+0:18      move second child to first child ( temp 4-component vector of float)
+0:?         '@entryPointOutput' (layout( location=0) out 4-component vector of float)
+0:18        Function Call: @main( ( temp 4-component vector of float)
+0:?   Linker Objects
+0:?     'x' ( global float)
+0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
+
+// Module Version 10000
+// Generated by (magic number): 80007
+// Id's are bound by 57
+
+                              Capability Shader
+               1:             ExtInstImport  "GLSL.std.450"
+                              MemoryModel Logical GLSL450
+                              EntryPoint Fragment 4  "main" 55
+                              ExecutionMode 4 OriginUpperLeft
+                              Source HLSL 500
+                              Name 4  "main"
+                              Name 8  "f1("
+                              Name 13  "f2(f1;"
+                              Name 12  "p"
+                              Name 17  "@main("
+                              Name 20  "x"
+                              Name 22  "x"
+                              Name 24  "x"
+                              Name 44  "param"
+                              Name 47  "param"
+                              Name 55  "@entryPointOutput"
+                              Decorate 55(@entryPointOutput) Location 0
+               2:             TypeVoid
+               3:             TypeFunction 2
+               6:             TypeFloat 32
+               7:             TypeFunction 6(float)
+              10:             TypePointer Function 6(float)
+              11:             TypeFunction 6(float) 10(ptr)
+              15:             TypeVector 6(float) 4
+              16:             TypeFunction 15(fvec4)
+              19:             TypePointer Private 6(float)
+           20(x):     19(ptr) Variable Private
+              21:    6(float) Constant 1065353216
+           22(x):     19(ptr) Variable Private
+              23:    6(float) Constant 1073741824
+           24(x):     19(ptr) Variable Private
+              25:    6(float) Constant 1088421888
+              26:    6(float) Constant 1092616192
+              43:    6(float) Constant 1084227584
+              54:             TypePointer Output 15(fvec4)
+55(@entryPointOutput):     54(ptr) Variable Output
+         4(main):           2 Function None 3
+               5:             Label
+                              Store 20(x) 21
+                              Store 22(x) 23
+                              Store 24(x) 25
+              56:   15(fvec4) FunctionCall 17(@main()
+                              Store 55(@entryPointOutput) 56
+                              Return
+                              FunctionEnd
+          8(f1():    6(float) Function None 7
+               9:             Label
+              27:    6(float) Load 22(x)
+              28:    6(float) FAdd 27 26
+                              Store 22(x) 28
+              29:    6(float) Load 22(x)
+                              ReturnValue 29
+                              FunctionEnd
+      13(f2(f1;):    6(float) Function None 11
+           12(p):     10(ptr) FunctionParameter
+              14:             Label
+              32:    6(float) Load 12(p)
+              33:    6(float) Load 24(x)
+              34:    6(float) FAdd 33 32
+                              Store 24(x) 34
+              35:    6(float) Load 24(x)
+                              ReturnValue 35
+                              FunctionEnd
+      17(@main():   15(fvec4) Function None 16
+              18:             Label
+       44(param):     10(ptr) Variable Function
+       47(param):     10(ptr) Variable Function
+              38:    6(float) Load 20(x)
+              39:    6(float) FunctionCall 8(f1()
+              40:    6(float) FAdd 38 39
+              41:    6(float) FunctionCall 8(f1()
+              42:    6(float) FAdd 40 41
+                              Store 44(param) 43
+              45:    6(float) FunctionCall 13(f2(f1;) 44(param)
+              46:    6(float) FAdd 42 45
+              48:    6(float) Load 20(x)
+                              Store 47(param) 48
+              49:    6(float) FunctionCall 13(f2(f1;) 47(param)
+              50:    6(float) FAdd 46 49
+              51:   15(fvec4) CompositeConstruct 50 50 50 50
+                              ReturnValue 51
+                              FunctionEnd
diff --git a/Test/baseResults/hlsl.staticMemberFunction.frag.out b/Test/baseResults/hlsl.staticMemberFunction.frag.out
index e6d85a6..2c7e418 100755
--- a/Test/baseResults/hlsl.staticMemberFunction.frag.out
+++ b/Test/baseResults/hlsl.staticMemberFunction.frag.out
@@ -118,7 +118,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 54
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.store.rwbyteaddressbuffer.type.comp.out b/Test/baseResults/hlsl.store.rwbyteaddressbuffer.type.comp.out
index 27c0fb3..6436db7 100644
--- a/Test/baseResults/hlsl.store.rwbyteaddressbuffer.type.comp.out
+++ b/Test/baseResults/hlsl.store.rwbyteaddressbuffer.type.comp.out
@@ -96,7 +96,7 @@
 0:?     'dispatchThreadID' ( in 3-component vector of uint GlobalInvocationID)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 42
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.string.frag.out b/Test/baseResults/hlsl.string.frag.out
index 1b80a2b..9181b93 100755
--- a/Test/baseResults/hlsl.string.frag.out
+++ b/Test/baseResults/hlsl.string.frag.out
@@ -50,7 +50,7 @@
 0:?     'f' (layout( location=0) in float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 24
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.stringtoken.frag.out b/Test/baseResults/hlsl.stringtoken.frag.out
index 117e221..82033cf 100644
--- a/Test/baseResults/hlsl.stringtoken.frag.out
+++ b/Test/baseResults/hlsl.stringtoken.frag.out
@@ -70,7 +70,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 34
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.struct.frag.out b/Test/baseResults/hlsl.struct.frag.out
index f14a338..bd216c8 100755
--- a/Test/baseResults/hlsl.struct.frag.out
+++ b/Test/baseResults/hlsl.struct.frag.out
@@ -212,7 +212,7 @@
 0:?     's.ff4' (layout( location=7) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 102
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.struct.split-1.vert.out b/Test/baseResults/hlsl.struct.split-1.vert.out
index 810432e..d7d6e92 100644
--- a/Test/baseResults/hlsl.struct.split-1.vert.out
+++ b/Test/baseResults/hlsl.struct.split-1.vert.out
@@ -196,7 +196,7 @@
 0:?     'Pos_loose' (layout( location=3) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 70
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.struct.split.array.geom.out b/Test/baseResults/hlsl.struct.split.array.geom.out
index b52c359..081b05c 100644
--- a/Test/baseResults/hlsl.struct.split.array.geom.out
+++ b/Test/baseResults/hlsl.struct.split.array.geom.out
@@ -160,7 +160,7 @@
 0:?     'OutputStream.VertexID' (layout( location=2) out uint)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 82
 
                               Capability Geometry
diff --git a/Test/baseResults/hlsl.struct.split.assign.frag.out b/Test/baseResults/hlsl.struct.split.assign.frag.out
index 230be04..3454eb6 100644
--- a/Test/baseResults/hlsl.struct.split.assign.frag.out
+++ b/Test/baseResults/hlsl.struct.split.assign.frag.out
@@ -208,7 +208,7 @@
 0:?     'input[2].f' (layout( location=3) in float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 66
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.struct.split.call.vert.out b/Test/baseResults/hlsl.struct.split.call.vert.out
index 85c396c..50d1d2b 100644
--- a/Test/baseResults/hlsl.struct.split.call.vert.out
+++ b/Test/baseResults/hlsl.struct.split.call.vert.out
@@ -214,7 +214,7 @@
 0:?     'vsin.x1_in' (layout( location=2) in int)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 77
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.struct.split.nested.geom.out b/Test/baseResults/hlsl.struct.split.nested.geom.out
index 56c6917..7a72a3f 100644
--- a/Test/baseResults/hlsl.struct.split.nested.geom.out
+++ b/Test/baseResults/hlsl.struct.split.nested.geom.out
@@ -448,7 +448,7 @@
 0:?     'ts.contains_no_builtin_io.m1' (layout( location=3) out int)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 100
 
                               Capability Geometry
diff --git a/Test/baseResults/hlsl.struct.split.trivial.geom.out b/Test/baseResults/hlsl.struct.split.trivial.geom.out
index 0e34284..477fbd2 100644
--- a/Test/baseResults/hlsl.struct.split.trivial.geom.out
+++ b/Test/baseResults/hlsl.struct.split.trivial.geom.out
@@ -192,7 +192,7 @@
 0:?     'ts.pos' ( out 4-component vector of float Position)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 67
 
                               Capability Geometry
diff --git a/Test/baseResults/hlsl.struct.split.trivial.vert.out b/Test/baseResults/hlsl.struct.split.trivial.vert.out
index c5b5756..8bf477e 100644
--- a/Test/baseResults/hlsl.struct.split.trivial.vert.out
+++ b/Test/baseResults/hlsl.struct.split.trivial.vert.out
@@ -98,7 +98,7 @@
 0:?     'Pos_loose' (layout( location=1) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 45
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.structIoFourWay.frag.out b/Test/baseResults/hlsl.structIoFourWay.frag.out
index cff7538..f60c80b 100755
--- a/Test/baseResults/hlsl.structIoFourWay.frag.out
+++ b/Test/baseResults/hlsl.structIoFourWay.frag.out
@@ -162,7 +162,7 @@
 0:?     't.normal' (layout( location=3) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 65
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.structStructName.frag.out b/Test/baseResults/hlsl.structStructName.frag.out
index 90f2504..183dcf6 100755
--- a/Test/baseResults/hlsl.structStructName.frag.out
+++ b/Test/baseResults/hlsl.structStructName.frag.out
@@ -44,7 +44,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out int)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 22
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.structarray.flatten.frag.out b/Test/baseResults/hlsl.structarray.flatten.frag.out
index 8928ea0..411f155 100644
--- a/Test/baseResults/hlsl.structarray.flatten.frag.out
+++ b/Test/baseResults/hlsl.structarray.flatten.frag.out
@@ -156,7 +156,7 @@
 0:?     'ps_output.color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 80
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.structarray.flatten.geom.out b/Test/baseResults/hlsl.structarray.flatten.geom.out
index 6a2af74..f88118d 100644
--- a/Test/baseResults/hlsl.structarray.flatten.geom.out
+++ b/Test/baseResults/hlsl.structarray.flatten.geom.out
@@ -170,7 +170,7 @@
 0:?     'outStream.uv' (layout( location=1) out 2-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 58
 
                               Capability Geometry
diff --git a/Test/baseResults/hlsl.structbuffer.append.fn.frag.out b/Test/baseResults/hlsl.structbuffer.append.fn.frag.out
index 6aa82e4..9beadc7 100644
--- a/Test/baseResults/hlsl.structbuffer.append.fn.frag.out
+++ b/Test/baseResults/hlsl.structbuffer.append.fn.frag.out
@@ -150,7 +150,7 @@
 0:?     'pos' (layout( location=0) flat in uint)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 70
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.structbuffer.append.frag.out b/Test/baseResults/hlsl.structbuffer.append.frag.out
index 8026a12..dff47f8 100644
--- a/Test/baseResults/hlsl.structbuffer.append.frag.out
+++ b/Test/baseResults/hlsl.structbuffer.append.frag.out
@@ -124,7 +124,7 @@
 0:?     'pos' (layout( location=0) flat in uint)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 56
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.structbuffer.atomics.frag.out b/Test/baseResults/hlsl.structbuffer.atomics.frag.out
index a03b4d8..d78f77e 100644
--- a/Test/baseResults/hlsl.structbuffer.atomics.frag.out
+++ b/Test/baseResults/hlsl.structbuffer.atomics.frag.out
@@ -474,7 +474,7 @@
 0:?     'pos' (layout( location=0) flat in uint)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 87
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.structbuffer.byte.frag.out b/Test/baseResults/hlsl.structbuffer.byte.frag.out
index a9831a2..862ebbe 100644
--- a/Test/baseResults/hlsl.structbuffer.byte.frag.out
+++ b/Test/baseResults/hlsl.structbuffer.byte.frag.out
@@ -324,7 +324,7 @@
 0:?     'pos' (layout( location=0) flat in uint)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 114
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.structbuffer.coherent.frag.out b/Test/baseResults/hlsl.structbuffer.coherent.frag.out
index 65945b4..18de2a8 100644
--- a/Test/baseResults/hlsl.structbuffer.coherent.frag.out
+++ b/Test/baseResults/hlsl.structbuffer.coherent.frag.out
@@ -176,7 +176,7 @@
 0:?     'pos' (layout( location=0) flat in uint)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 78
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.structbuffer.floatidx.comp.out b/Test/baseResults/hlsl.structbuffer.floatidx.comp.out
index d1591d5..82e307b 100644
--- a/Test/baseResults/hlsl.structbuffer.floatidx.comp.out
+++ b/Test/baseResults/hlsl.structbuffer.floatidx.comp.out
@@ -180,7 +180,7 @@
 0:?     'nThreadId' ( in 3-component vector of uint GlobalInvocationID)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 85
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.structbuffer.fn.frag.out b/Test/baseResults/hlsl.structbuffer.fn.frag.out
index 396ab20..4bbc550 100644
--- a/Test/baseResults/hlsl.structbuffer.fn.frag.out
+++ b/Test/baseResults/hlsl.structbuffer.fn.frag.out
@@ -138,7 +138,7 @@
 0:?     'pos' (layout( location=0) flat in uint)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 78
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.structbuffer.fn2.comp.out b/Test/baseResults/hlsl.structbuffer.fn2.comp.out
index ca5a980..517b48c 100644
--- a/Test/baseResults/hlsl.structbuffer.fn2.comp.out
+++ b/Test/baseResults/hlsl.structbuffer.fn2.comp.out
@@ -136,7 +136,7 @@
 0:?     'dispatchId' ( in 3-component vector of uint GlobalInvocationID)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 63
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.structbuffer.frag.out b/Test/baseResults/hlsl.structbuffer.frag.out
index 7e8fc44..5f6e8ee 100644
--- a/Test/baseResults/hlsl.structbuffer.frag.out
+++ b/Test/baseResults/hlsl.structbuffer.frag.out
@@ -188,7 +188,7 @@
 0:?     'pos' (layout( location=0) flat in uint)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 96
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.structbuffer.incdec.frag.hlslfun1.out b/Test/baseResults/hlsl.structbuffer.incdec.frag.hlslfun1.out
index b5cb56d..8b84a73 100644
--- a/Test/baseResults/hlsl.structbuffer.incdec.frag.hlslfun1.out
+++ b/Test/baseResults/hlsl.structbuffer.incdec.frag.hlslfun1.out
@@ -1,6 +1,6 @@
 hlsl.structbuffer.incdec.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 70
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.structbuffer.incdec.frag.out b/Test/baseResults/hlsl.structbuffer.incdec.frag.out
index 0afea5b..5c8afd9 100644
--- a/Test/baseResults/hlsl.structbuffer.incdec.frag.out
+++ b/Test/baseResults/hlsl.structbuffer.incdec.frag.out
@@ -204,7 +204,7 @@
 0:?     'pos' (layout( location=0) flat in uint)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 70
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.structbuffer.rw.frag.out b/Test/baseResults/hlsl.structbuffer.rw.frag.out
index 96b700e..ccf295b 100644
--- a/Test/baseResults/hlsl.structbuffer.rw.frag.out
+++ b/Test/baseResults/hlsl.structbuffer.rw.frag.out
@@ -176,7 +176,7 @@
 0:?     'pos' (layout( location=0) flat in uint)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 78
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.structbuffer.rwbyte.frag.out b/Test/baseResults/hlsl.structbuffer.rwbyte.frag.out
index 3bee143..9f1b5b3 100644
--- a/Test/baseResults/hlsl.structbuffer.rwbyte.frag.out
+++ b/Test/baseResults/hlsl.structbuffer.rwbyte.frag.out
@@ -1004,7 +1004,7 @@
 0:?     'pos' (layout( location=0) flat in uint)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 239
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.structin.vert.out b/Test/baseResults/hlsl.structin.vert.out
index a58a7d7..d7f539d 100755
--- a/Test/baseResults/hlsl.structin.vert.out
+++ b/Test/baseResults/hlsl.structin.vert.out
@@ -340,7 +340,7 @@
 0:?     'e' (layout( location=5) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 94
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.subpass.frag.out b/Test/baseResults/hlsl.subpass.frag.out
index c971724..99aeb96 100644
--- a/Test/baseResults/hlsl.subpass.frag.out
+++ b/Test/baseResults/hlsl.subpass.frag.out
@@ -430,7 +430,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 204
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.switch.frag.out b/Test/baseResults/hlsl.switch.frag.out
index 422a872..b72891e 100755
--- a/Test/baseResults/hlsl.switch.frag.out
+++ b/Test/baseResults/hlsl.switch.frag.out
@@ -296,7 +296,7 @@
 0:?     'd' (layout( location=2) flat in int)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 106
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.swizzle.frag.out b/Test/baseResults/hlsl.swizzle.frag.out
index 60efe5d..c734d50 100755
--- a/Test/baseResults/hlsl.swizzle.frag.out
+++ b/Test/baseResults/hlsl.swizzle.frag.out
@@ -77,7 +77,7 @@
 0:?     'AmbientColor' ( global 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 30
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.synthesizeInput.frag.out b/Test/baseResults/hlsl.synthesizeInput.frag.out
index e70ac88..bbe9743 100755
--- a/Test/baseResults/hlsl.synthesizeInput.frag.out
+++ b/Test/baseResults/hlsl.synthesizeInput.frag.out
@@ -98,7 +98,7 @@
 0:?     'input.no_interp' (layout( location=1) flat in uint)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 44
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.target.frag.out b/Test/baseResults/hlsl.target.frag.out
index bc2fda9..0001796 100755
--- a/Test/baseResults/hlsl.target.frag.out
+++ b/Test/baseResults/hlsl.target.frag.out
@@ -114,7 +114,7 @@
 0:?     'out2' (layout( location=3) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 50
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.targetStruct1.frag.out b/Test/baseResults/hlsl.targetStruct1.frag.out
index 1e17ad5..371ce2a 100755
--- a/Test/baseResults/hlsl.targetStruct1.frag.out
+++ b/Test/baseResults/hlsl.targetStruct1.frag.out
@@ -184,7 +184,7 @@
 0:?     'po' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 65
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.targetStruct2.frag.out b/Test/baseResults/hlsl.targetStruct2.frag.out
index 529c142..e6099c9 100755
--- a/Test/baseResults/hlsl.targetStruct2.frag.out
+++ b/Test/baseResults/hlsl.targetStruct2.frag.out
@@ -184,7 +184,7 @@
 0:?     'po' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 65
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.templatetypes.frag.out b/Test/baseResults/hlsl.templatetypes.frag.out
index dca8c4d..3fc5846 100644
--- a/Test/baseResults/hlsl.templatetypes.frag.out
+++ b/Test/baseResults/hlsl.templatetypes.frag.out
@@ -508,7 +508,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 153
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.texture.struct.frag.out b/Test/baseResults/hlsl.texture.struct.frag.out
index 504a535..0778f50 100644
--- a/Test/baseResults/hlsl.texture.struct.frag.out
+++ b/Test/baseResults/hlsl.texture.struct.frag.out
@@ -838,7 +838,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 240
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.texture.subvec4.frag.out b/Test/baseResults/hlsl.texture.subvec4.frag.out
index 2b9702a..bf0f146 100644
--- a/Test/baseResults/hlsl.texture.subvec4.frag.out
+++ b/Test/baseResults/hlsl.texture.subvec4.frag.out
@@ -356,7 +356,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 130
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.texturebuffer.frag.out b/Test/baseResults/hlsl.texturebuffer.frag.out
index 2802272..89b5c54 100644
--- a/Test/baseResults/hlsl.texturebuffer.frag.out
+++ b/Test/baseResults/hlsl.texturebuffer.frag.out
@@ -70,7 +70,7 @@
 0:?     'pos' ( in 4-component vector of float FragCoord)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 39
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.this.frag.out b/Test/baseResults/hlsl.this.frag.out
index 13700c2..ac5fde8 100755
--- a/Test/baseResults/hlsl.this.frag.out
+++ b/Test/baseResults/hlsl.this.frag.out
@@ -240,7 +240,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 98
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.tristream-append.geom.out b/Test/baseResults/hlsl.tristream-append.geom.out
index 2444cfb..be6ca9c 100644
--- a/Test/baseResults/hlsl.tristream-append.geom.out
+++ b/Test/baseResults/hlsl.tristream-append.geom.out
@@ -106,7 +106,7 @@
 0:?   Linker Objects
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 57
 
                               Capability Geometry
diff --git a/Test/baseResults/hlsl.tx.bracket.frag.out b/Test/baseResults/hlsl.tx.bracket.frag.out
index 4684bab..400beb6 100644
--- a/Test/baseResults/hlsl.tx.bracket.frag.out
+++ b/Test/baseResults/hlsl.tx.bracket.frag.out
@@ -422,7 +422,7 @@
 0:?     '@entryPointOutput.Color' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 188
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.tx.overload.frag.out b/Test/baseResults/hlsl.tx.overload.frag.out
index 2464ec9..c8d064a 100644
--- a/Test/baseResults/hlsl.tx.overload.frag.out
+++ b/Test/baseResults/hlsl.tx.overload.frag.out
@@ -134,7 +134,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 73
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.type.half.frag.out b/Test/baseResults/hlsl.type.half.frag.out
index b8c5ed7..6b5a945 100644
--- a/Test/baseResults/hlsl.type.half.frag.out
+++ b/Test/baseResults/hlsl.type.half.frag.out
@@ -164,7 +164,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 60
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.type.identifier.frag.out b/Test/baseResults/hlsl.type.identifier.frag.out
index 57907a0..2eaa2ae 100644
--- a/Test/baseResults/hlsl.type.identifier.frag.out
+++ b/Test/baseResults/hlsl.type.identifier.frag.out
@@ -266,7 +266,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 105
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.typeGraphCopy.vert.out b/Test/baseResults/hlsl.typeGraphCopy.vert.out
index 61f7560..c0c7227 100755
--- a/Test/baseResults/hlsl.typeGraphCopy.vert.out
+++ b/Test/baseResults/hlsl.typeGraphCopy.vert.out
@@ -62,7 +62,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 28
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.typedef.frag.out b/Test/baseResults/hlsl.typedef.frag.out
index e2125b4..11fd107 100755
--- a/Test/baseResults/hlsl.typedef.frag.out
+++ b/Test/baseResults/hlsl.typedef.frag.out
@@ -79,7 +79,7 @@
 0:?   Linker Objects
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 34
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.void.frag.out b/Test/baseResults/hlsl.void.frag.out
index 0ac4581..30edd63 100755
--- a/Test/baseResults/hlsl.void.frag.out
+++ b/Test/baseResults/hlsl.void.frag.out
@@ -54,7 +54,7 @@
 0:?     'input' (layout( location=0) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 27
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.wavebroadcast.comp.out b/Test/baseResults/hlsl.wavebroadcast.comp.out
index 48a87c6..0dfd9ef 100644
--- a/Test/baseResults/hlsl.wavebroadcast.comp.out
+++ b/Test/baseResults/hlsl.wavebroadcast.comp.out
@@ -2298,7 +2298,7 @@
 0:?     'dti' ( in 3-component vector of uint GlobalInvocationID)
 
 // Module Version 10300
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 359
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.waveprefix.comp.out b/Test/baseResults/hlsl.waveprefix.comp.out
index 637b8ba..9736b4e 100644
--- a/Test/baseResults/hlsl.waveprefix.comp.out
+++ b/Test/baseResults/hlsl.waveprefix.comp.out
@@ -2322,7 +2322,7 @@
 0:?     'dti' ( in 3-component vector of uint GlobalInvocationID)
 
 // Module Version 10300
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 369
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.wavequad.comp.out b/Test/baseResults/hlsl.wavequad.comp.out
index 8030b4b..56ef6d7 100644
--- a/Test/baseResults/hlsl.wavequad.comp.out
+++ b/Test/baseResults/hlsl.wavequad.comp.out
@@ -8026,7 +8026,7 @@
 0:?     'dti' ( in 3-component vector of uint GlobalInvocationID)
 
 // Module Version 10300
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 1120
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.wavequery.comp.out b/Test/baseResults/hlsl.wavequery.comp.out
index 8bade0a..5f70124 100644
--- a/Test/baseResults/hlsl.wavequery.comp.out
+++ b/Test/baseResults/hlsl.wavequery.comp.out
@@ -60,7 +60,7 @@
 0:?     'data' (layout( row_major std430) buffer block{layout( row_major std430) buffer unsized 1-element array of uint @data})
 
 // Module Version 10300
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 28
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.wavequery.frag.out b/Test/baseResults/hlsl.wavequery.frag.out
index 5b426d8..52304a6 100644
--- a/Test/baseResults/hlsl.wavequery.frag.out
+++ b/Test/baseResults/hlsl.wavequery.frag.out
@@ -72,7 +72,7 @@
 0:?     '@entryPointOutput' (layout( location=0) out 4-component vector of float)
 
 // Module Version 10300
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 30
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.wavereduction.comp.out b/Test/baseResults/hlsl.wavereduction.comp.out
index f088063..f922f3d 100644
--- a/Test/baseResults/hlsl.wavereduction.comp.out
+++ b/Test/baseResults/hlsl.wavereduction.comp.out
@@ -6186,7 +6186,7 @@
 0:?     'dti' ( in 3-component vector of uint GlobalInvocationID)
 
 // Module Version 10300
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 901
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.wavevote.comp.out b/Test/baseResults/hlsl.wavevote.comp.out
index 0e33067..04f2f98 100644
--- a/Test/baseResults/hlsl.wavevote.comp.out
+++ b/Test/baseResults/hlsl.wavevote.comp.out
@@ -204,7 +204,7 @@
 0:?     'dti' ( in 3-component vector of uint GlobalInvocationID)
 
 // Module Version 10300
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 75
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.whileLoop.frag.out b/Test/baseResults/hlsl.whileLoop.frag.out
index b8b3ab5..babc77d 100755
--- a/Test/baseResults/hlsl.whileLoop.frag.out
+++ b/Test/baseResults/hlsl.whileLoop.frag.out
@@ -96,7 +96,7 @@
 0:?     'input' (layout( location=0) in 4-component vector of float)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 52
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.y-negate-1.vert.out b/Test/baseResults/hlsl.y-negate-1.vert.out
index 7a6efbc..257d56c 100644
--- a/Test/baseResults/hlsl.y-negate-1.vert.out
+++ b/Test/baseResults/hlsl.y-negate-1.vert.out
@@ -72,7 +72,7 @@
 0:?     '@entryPointOutput' ( out 4-component vector of float Position)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 34
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.y-negate-2.vert.out b/Test/baseResults/hlsl.y-negate-2.vert.out
index f45dc16..a234a2e 100644
--- a/Test/baseResults/hlsl.y-negate-2.vert.out
+++ b/Test/baseResults/hlsl.y-negate-2.vert.out
@@ -80,7 +80,7 @@
 0:?     'position' ( out 4-component vector of float Position)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 37
 
                               Capability Shader
diff --git a/Test/baseResults/hlsl.y-negate-3.vert.out b/Test/baseResults/hlsl.y-negate-3.vert.out
index 1de7d10..34bf8f9 100644
--- a/Test/baseResults/hlsl.y-negate-3.vert.out
+++ b/Test/baseResults/hlsl.y-negate-3.vert.out
@@ -126,7 +126,7 @@
 0:?     '@entryPointOutput.somethingelse' (layout( location=0) out int)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 50
 
                               Capability Shader
diff --git a/Test/baseResults/link1.vk.frag.out b/Test/baseResults/link1.vk.frag.out
index e113a36..63660db 100644
--- a/Test/baseResults/link1.vk.frag.out
+++ b/Test/baseResults/link1.vk.frag.out
@@ -197,7 +197,7 @@
 0:?     's2D' (layout( binding=1) uniform highp sampler2D)
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 71
 
                               Capability Shader
diff --git a/Test/baseResults/preprocessor.bad_arg.vert.err b/Test/baseResults/preprocessor.bad_arg.vert.err
new file mode 100644
index 0000000..ae970a0
--- /dev/null
+++ b/Test/baseResults/preprocessor.bad_arg.vert.err
@@ -0,0 +1,4 @@
+ERROR: 0:8: 'macro expansion' : End of input in macro EXP2
+ERROR: 1 compilation errors.  No code generated.
+
+
diff --git a/Test/baseResults/preprocessor.bad_arg.vert.out b/Test/baseResults/preprocessor.bad_arg.vert.out
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/Test/baseResults/preprocessor.bad_arg.vert.out
diff --git a/Test/baseResults/reflection.vert.out b/Test/baseResults/reflection.vert.out
index 422c049..52e16e6 100644
--- a/Test/baseResults/reflection.vert.out
+++ b/Test/baseResults/reflection.vert.out
@@ -1,107 +1,107 @@
 reflection.vert
 Uniform reflection:
-image_ui2D: offset -1, type 9063, size 1, index -1, binding -1
-sampler_2D: offset -1, type 8b5e, size 1, index -1, binding -1
-sampler_2DMSArray: offset -1, type 910b, size 1, index -1, binding -1
-anonMember3: offset 80, type 8b52, size 1, index 0, binding -1
-s.a: offset -1, type 1404, size 1, index -1, binding -1
-named.scalar: offset 12, type 1404, size 1, index 1, binding -1
-m23: offset 16, type 8b67, size 1, index 0, binding -1
-scalarAfterm23: offset 48, type 1404, size 1, index 0, binding -1
-c_m23: offset 16, type 8b67, size 1, index 2, binding -1
-c_scalarAfterm23: offset 64, type 1404, size 1, index 2, binding -1
-scalarBeforeArray: offset 96, type 1404, size 1, index 0, binding -1
-floatArray: offset 112, type 1406, size 5, index 0, binding -1
-scalarAfterArray: offset 192, type 1404, size 1, index 0, binding -1
-named.memvec2: offset 48, type 8b50, size 1, index 1, binding -1
-named.memf1: offset 56, type 1406, size 1, index 1, binding -1
-named.memf2: offset 60, type 8b56, size 1, index 1, binding -1
-named.memf3: offset 64, type 1404, size 1, index 1, binding -1
-named.memvec2a: offset 72, type 8b50, size 1, index 1, binding -1
-named.m22: offset 80, type 8b5a, size 7, index 1, binding -1
-dm22: offset -1, type 8b5a, size 4, index -1, binding -1
-m22: offset 208, type 8b5a, size 3, index 0, binding -1
-nested.foo.n1.a: offset 0, type 1406, size 1, index 3, binding -1
-nested.foo.n2.b: offset 16, type 1406, size 1, index 3, binding -1
-nested.foo.n2.c: offset 20, type 1406, size 1, index 3, binding -1
-nested.foo.n2.d: offset 24, type 1406, size 1, index 3, binding -1
-deepA[0].d2.d1[2].va: offset -1, type 8b50, size 2, index -1, binding -1
-deepA[1].d2.d1[2].va: offset -1, type 8b50, size 2, index -1, binding -1
-deepB[1].d2.d1[0].va: offset -1, type 8b50, size 2, index -1, binding -1
-deepB[1].d2.d1[1].va: offset -1, type 8b50, size 2, index -1, binding -1
-deepB[1].d2.d1[2].va: offset -1, type 8b50, size 2, index -1, binding -1
-deepB[1].d2.d1[3].va: offset -1, type 8b50, size 2, index -1, binding -1
-deepB[0].d2.d1[0].va: offset -1, type 8b50, size 2, index -1, binding -1
-deepB[0].d2.d1[1].va: offset -1, type 8b50, size 2, index -1, binding -1
-deepB[0].d2.d1[2].va: offset -1, type 8b50, size 2, index -1, binding -1
-deepB[0].d2.d1[3].va: offset -1, type 8b50, size 2, index -1, binding -1
-deepC[1].iv4: offset -1, type 8b52, size 1, index -1, binding -1
-deepC[1].d2.i: offset -1, type 1404, size 1, index -1, binding -1
-deepC[1].d2.d1[0].va: offset -1, type 8b50, size 3, index -1, binding -1
-deepC[1].d2.d1[0].b: offset -1, type 8b56, size 1, index -1, binding -1
-deepC[1].d2.d1[1].va: offset -1, type 8b50, size 3, index -1, binding -1
-deepC[1].d2.d1[1].b: offset -1, type 8b56, size 1, index -1, binding -1
-deepC[1].d2.d1[2].va: offset -1, type 8b50, size 3, index -1, binding -1
-deepC[1].d2.d1[2].b: offset -1, type 8b56, size 1, index -1, binding -1
-deepC[1].d2.d1[3].va: offset -1, type 8b50, size 3, index -1, binding -1
-deepC[1].d2.d1[3].b: offset -1, type 8b56, size 1, index -1, binding -1
-deepC[1].v3: offset -1, type 8b54, size 1, index -1, binding -1
-deepD[0].iv4: offset -1, type 8b52, size 1, index -1, binding -1
-deepD[0].d2.i: offset -1, type 1404, size 1, index -1, binding -1
-deepD[0].d2.d1[0].va: offset -1, type 8b50, size 3, index -1, binding -1
-deepD[0].d2.d1[0].b: offset -1, type 8b56, size 1, index -1, binding -1
-deepD[0].d2.d1[1].va: offset -1, type 8b50, size 3, index -1, binding -1
-deepD[0].d2.d1[1].b: offset -1, type 8b56, size 1, index -1, binding -1
-deepD[0].d2.d1[2].va: offset -1, type 8b50, size 3, index -1, binding -1
-deepD[0].d2.d1[2].b: offset -1, type 8b56, size 1, index -1, binding -1
-deepD[0].d2.d1[3].va: offset -1, type 8b50, size 3, index -1, binding -1
-deepD[0].d2.d1[3].b: offset -1, type 8b56, size 1, index -1, binding -1
-deepD[0].v3: offset -1, type 8b54, size 1, index -1, binding -1
-deepD[1].iv4: offset -1, type 8b52, size 1, index -1, binding -1
-deepD[1].d2.i: offset -1, type 1404, size 1, index -1, binding -1
-deepD[1].d2.d1[0].va: offset -1, type 8b50, size 3, index -1, binding -1
-deepD[1].d2.d1[0].b: offset -1, type 8b56, size 1, index -1, binding -1
-deepD[1].d2.d1[1].va: offset -1, type 8b50, size 3, index -1, binding -1
-deepD[1].d2.d1[1].b: offset -1, type 8b56, size 1, index -1, binding -1
-deepD[1].d2.d1[2].va: offset -1, type 8b50, size 3, index -1, binding -1
-deepD[1].d2.d1[2].b: offset -1, type 8b56, size 1, index -1, binding -1
-deepD[1].d2.d1[3].va: offset -1, type 8b50, size 3, index -1, binding -1
-deepD[1].d2.d1[3].b: offset -1, type 8b56, size 1, index -1, binding -1
-deepD[1].v3: offset -1, type 8b54, size 1, index -1, binding -1
-abl.foo: offset 0, type 1406, size 1, index 7, binding -1
-abl2.foo: offset 0, type 1406, size 1, index 11, binding -1
-buf1.runtimeArray: offset 4, type 1406, size 4, index 12, binding -1
-buf2.runtimeArray.c: offset 8, type 1406, size 1, index 13, binding -1
-buf3.runtimeArray: offset 4, type 1406, size 0, index 14, binding -1
-buf4.runtimeArray.c: offset 8, type 1406, size 1, index 15, binding -1
-anonMember1: offset 0, type 8b51, size 1, index 0, binding -1
-uf1: offset -1, type 1406, size 1, index -1, binding -1
-uf2: offset -1, type 1406, size 1, index -1, binding -1
-named.member3: offset 32, type 8b52, size 1, index 1, binding -1
+image_ui2D: offset -1, type 9063, size 1, index -1, binding -1, stages 1
+sampler_2D: offset -1, type 8b5e, size 1, index -1, binding -1, stages 1
+sampler_2DMSArray: offset -1, type 910b, size 1, index -1, binding -1, stages 1
+anonMember3: offset 80, type 8b52, size 1, index 0, binding -1, stages 1
+s.a: offset -1, type 1404, size 1, index -1, binding -1, stages 1
+named.scalar: offset 12, type 1404, size 1, index 1, binding -1, stages 1
+m23: offset 16, type 8b67, size 1, index 0, binding -1, stages 1
+scalarAfterm23: offset 48, type 1404, size 1, index 0, binding -1, stages 1
+c_m23: offset 16, type 8b67, size 1, index 2, binding -1, stages 1
+c_scalarAfterm23: offset 64, type 1404, size 1, index 2, binding -1, stages 1
+scalarBeforeArray: offset 96, type 1404, size 1, index 0, binding -1, stages 1
+floatArray: offset 112, type 1406, size 5, index 0, binding -1, stages 1
+scalarAfterArray: offset 192, type 1404, size 1, index 0, binding -1, stages 1
+named.memvec2: offset 48, type 8b50, size 1, index 1, binding -1, stages 1
+named.memf1: offset 56, type 1406, size 1, index 1, binding -1, stages 1
+named.memf2: offset 60, type 8b56, size 1, index 1, binding -1, stages 1
+named.memf3: offset 64, type 1404, size 1, index 1, binding -1, stages 1
+named.memvec2a: offset 72, type 8b50, size 1, index 1, binding -1, stages 1
+named.m22: offset 80, type 8b5a, size 7, index 1, binding -1, stages 1
+dm22: offset -1, type 8b5a, size 4, index -1, binding -1, stages 1
+m22: offset 208, type 8b5a, size 3, index 0, binding -1, stages 1
+nested.foo.n1.a: offset 0, type 1406, size 1, index 3, binding -1, stages 1
+nested.foo.n2.b: offset 16, type 1406, size 1, index 3, binding -1, stages 1
+nested.foo.n2.c: offset 20, type 1406, size 1, index 3, binding -1, stages 1
+nested.foo.n2.d: offset 24, type 1406, size 1, index 3, binding -1, stages 1
+deepA[0].d2.d1[2].va: offset -1, type 8b50, size 2, index -1, binding -1, stages 1
+deepA[1].d2.d1[2].va: offset -1, type 8b50, size 2, index -1, binding -1, stages 1
+deepB[1].d2.d1[0].va: offset -1, type 8b50, size 2, index -1, binding -1, stages 1
+deepB[1].d2.d1[1].va: offset -1, type 8b50, size 2, index -1, binding -1, stages 1
+deepB[1].d2.d1[2].va: offset -1, type 8b50, size 2, index -1, binding -1, stages 1
+deepB[1].d2.d1[3].va: offset -1, type 8b50, size 2, index -1, binding -1, stages 1
+deepB[0].d2.d1[0].va: offset -1, type 8b50, size 2, index -1, binding -1, stages 1
+deepB[0].d2.d1[1].va: offset -1, type 8b50, size 2, index -1, binding -1, stages 1
+deepB[0].d2.d1[2].va: offset -1, type 8b50, size 2, index -1, binding -1, stages 1
+deepB[0].d2.d1[3].va: offset -1, type 8b50, size 2, index -1, binding -1, stages 1
+deepC[1].iv4: offset -1, type 8b52, size 1, index -1, binding -1, stages 1
+deepC[1].d2.i: offset -1, type 1404, size 1, index -1, binding -1, stages 1
+deepC[1].d2.d1[0].va: offset -1, type 8b50, size 3, index -1, binding -1, stages 1
+deepC[1].d2.d1[0].b: offset -1, type 8b56, size 1, index -1, binding -1, stages 1
+deepC[1].d2.d1[1].va: offset -1, type 8b50, size 3, index -1, binding -1, stages 1
+deepC[1].d2.d1[1].b: offset -1, type 8b56, size 1, index -1, binding -1, stages 1
+deepC[1].d2.d1[2].va: offset -1, type 8b50, size 3, index -1, binding -1, stages 1
+deepC[1].d2.d1[2].b: offset -1, type 8b56, size 1, index -1, binding -1, stages 1
+deepC[1].d2.d1[3].va: offset -1, type 8b50, size 3, index -1, binding -1, stages 1
+deepC[1].d2.d1[3].b: offset -1, type 8b56, size 1, index -1, binding -1, stages 1
+deepC[1].v3: offset -1, type 8b54, size 1, index -1, binding -1, stages 1
+deepD[0].iv4: offset -1, type 8b52, size 1, index -1, binding -1, stages 1
+deepD[0].d2.i: offset -1, type 1404, size 1, index -1, binding -1, stages 1
+deepD[0].d2.d1[0].va: offset -1, type 8b50, size 3, index -1, binding -1, stages 1
+deepD[0].d2.d1[0].b: offset -1, type 8b56, size 1, index -1, binding -1, stages 1
+deepD[0].d2.d1[1].va: offset -1, type 8b50, size 3, index -1, binding -1, stages 1
+deepD[0].d2.d1[1].b: offset -1, type 8b56, size 1, index -1, binding -1, stages 1
+deepD[0].d2.d1[2].va: offset -1, type 8b50, size 3, index -1, binding -1, stages 1
+deepD[0].d2.d1[2].b: offset -1, type 8b56, size 1, index -1, binding -1, stages 1
+deepD[0].d2.d1[3].va: offset -1, type 8b50, size 3, index -1, binding -1, stages 1
+deepD[0].d2.d1[3].b: offset -1, type 8b56, size 1, index -1, binding -1, stages 1
+deepD[0].v3: offset -1, type 8b54, size 1, index -1, binding -1, stages 1
+deepD[1].iv4: offset -1, type 8b52, size 1, index -1, binding -1, stages 1
+deepD[1].d2.i: offset -1, type 1404, size 1, index -1, binding -1, stages 1
+deepD[1].d2.d1[0].va: offset -1, type 8b50, size 3, index -1, binding -1, stages 1
+deepD[1].d2.d1[0].b: offset -1, type 8b56, size 1, index -1, binding -1, stages 1
+deepD[1].d2.d1[1].va: offset -1, type 8b50, size 3, index -1, binding -1, stages 1
+deepD[1].d2.d1[1].b: offset -1, type 8b56, size 1, index -1, binding -1, stages 1
+deepD[1].d2.d1[2].va: offset -1, type 8b50, size 3, index -1, binding -1, stages 1
+deepD[1].d2.d1[2].b: offset -1, type 8b56, size 1, index -1, binding -1, stages 1
+deepD[1].d2.d1[3].va: offset -1, type 8b50, size 3, index -1, binding -1, stages 1
+deepD[1].d2.d1[3].b: offset -1, type 8b56, size 1, index -1, binding -1, stages 1
+deepD[1].v3: offset -1, type 8b54, size 1, index -1, binding -1, stages 1
+abl.foo: offset 0, type 1406, size 1, index 7, binding -1, stages 1
+abl2.foo: offset 0, type 1406, size 1, index 11, binding -1, stages 1
+buf1.runtimeArray: offset 4, type 1406, size 4, index 12, binding -1, stages 1
+buf2.runtimeArray.c: offset 8, type 1406, size 1, index 13, binding -1, stages 1
+buf3.runtimeArray: offset 4, type 1406, size 0, index 14, binding -1, stages 1
+buf4.runtimeArray.c: offset 8, type 1406, size 1, index 15, binding -1, stages 1
+anonMember1: offset 0, type 8b51, size 1, index 0, binding -1, stages 1
+uf1: offset -1, type 1406, size 1, index -1, binding -1, stages 1
+uf2: offset -1, type 1406, size 1, index -1, binding -1, stages 1
+named.member3: offset 32, type 8b52, size 1, index 1, binding -1, stages 1
 
 Uniform block reflection:
-nameless: offset -1, type ffffffff, size 496, index -1, binding -1
-named: offset -1, type ffffffff, size 304, index -1, binding -1
-c_nameless: offset -1, type ffffffff, size 112, index -1, binding -1
-nested: offset -1, type ffffffff, size 32, index -1, binding -1
-abl[0]: offset -1, type ffffffff, size 4, index -1, binding -1
-abl[1]: offset -1, type ffffffff, size 4, index -1, binding -1
-abl[2]: offset -1, type ffffffff, size 4, index -1, binding -1
-abl[3]: offset -1, type ffffffff, size 4, index -1, binding -1
-abl2[0]: offset -1, type ffffffff, size 4, index -1, binding -1
-abl2[1]: offset -1, type ffffffff, size 4, index -1, binding -1
-abl2[2]: offset -1, type ffffffff, size 4, index -1, binding -1
-abl2[3]: offset -1, type ffffffff, size 4, index -1, binding -1
-buf1: offset -1, type ffffffff, size 4, index -1, binding -1
-buf2: offset -1, type ffffffff, size 4, index -1, binding -1
-buf3: offset -1, type ffffffff, size 4, index -1, binding -1
-buf4: offset -1, type ffffffff, size 4, index -1, binding -1
+nameless: offset -1, type ffffffff, size 496, index -1, binding -1, stages 0
+named: offset -1, type ffffffff, size 304, index -1, binding -1, stages 0
+c_nameless: offset -1, type ffffffff, size 112, index -1, binding -1, stages 0
+nested: offset -1, type ffffffff, size 32, index -1, binding -1, stages 0
+abl[0]: offset -1, type ffffffff, size 4, index -1, binding -1, stages 0
+abl[1]: offset -1, type ffffffff, size 4, index -1, binding -1, stages 0
+abl[2]: offset -1, type ffffffff, size 4, index -1, binding -1, stages 0
+abl[3]: offset -1, type ffffffff, size 4, index -1, binding -1, stages 0
+abl2[0]: offset -1, type ffffffff, size 4, index -1, binding -1, stages 0
+abl2[1]: offset -1, type ffffffff, size 4, index -1, binding -1, stages 0
+abl2[2]: offset -1, type ffffffff, size 4, index -1, binding -1, stages 0
+abl2[3]: offset -1, type ffffffff, size 4, index -1, binding -1, stages 0
+buf1: offset -1, type ffffffff, size 4, index -1, binding -1, stages 0
+buf2: offset -1, type ffffffff, size 4, index -1, binding -1, stages 0
+buf3: offset -1, type ffffffff, size 4, index -1, binding -1, stages 0
+buf4: offset -1, type ffffffff, size 4, index -1, binding -1, stages 0
 
 Vertex attribute reflection:
-attributeFloat: offset 0, type 1406, size 0, index 0, binding -1
-attributeFloat2: offset 0, type 8b50, size 0, index 0, binding -1
-attributeFloat3: offset 0, type 8b51, size 0, index 0, binding -1
-attributeFloat4: offset 0, type 8b52, size 0, index 0, binding -1
-attributeMat4: offset 0, type 8b5c, size 0, index 0, binding -1
-gl_InstanceID: offset 0, type 1404, size 0, index 0, binding -1
+attributeFloat: offset 0, type 1406, size 0, index 0, binding -1, stages 0
+attributeFloat2: offset 0, type 8b50, size 0, index 0, binding -1, stages 0
+attributeFloat3: offset 0, type 8b51, size 0, index 0, binding -1, stages 0
+attributeFloat4: offset 0, type 8b52, size 0, index 0, binding -1, stages 0
+attributeMat4: offset 0, type 8b5c, size 0, index 0, binding -1, stages 0
+gl_InstanceID: offset 0, type 1404, size 0, index 0, binding -1, stages 0
 
diff --git a/Test/baseResults/remap.basic.dcefunc.frag.out b/Test/baseResults/remap.basic.dcefunc.frag.out
index 97cc2b4..33ec069 100644
--- a/Test/baseResults/remap.basic.dcefunc.frag.out
+++ b/Test/baseResults/remap.basic.dcefunc.frag.out
@@ -1,6 +1,6 @@
 remap.basic.dcefunc.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 22
 
                               Capability Shader
diff --git a/Test/baseResults/remap.basic.everything.frag.out b/Test/baseResults/remap.basic.everything.frag.out
index 2389590..858d629 100644
--- a/Test/baseResults/remap.basic.everything.frag.out
+++ b/Test/baseResults/remap.basic.everything.frag.out
@@ -1,6 +1,6 @@
 remap.basic.everything.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 24969
 
                               Capability Shader
diff --git a/Test/baseResults/remap.basic.none.frag.out b/Test/baseResults/remap.basic.none.frag.out
index c3e661b..1ad1d74 100644
--- a/Test/baseResults/remap.basic.none.frag.out
+++ b/Test/baseResults/remap.basic.none.frag.out
@@ -1,6 +1,6 @@
 remap.basic.none.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 22
 
                               Capability Shader
diff --git a/Test/baseResults/remap.basic.strip.frag.out b/Test/baseResults/remap.basic.strip.frag.out
index 2cd21d6..3d876d0 100644
--- a/Test/baseResults/remap.basic.strip.frag.out
+++ b/Test/baseResults/remap.basic.strip.frag.out
@@ -1,6 +1,6 @@
 remap.basic.strip.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 22
 
                               Capability Shader
diff --git a/Test/baseResults/remap.hlsl.sample.basic.everything.frag.out b/Test/baseResults/remap.hlsl.sample.basic.everything.frag.out
index b39179d..211daba 100644
--- a/Test/baseResults/remap.hlsl.sample.basic.everything.frag.out
+++ b/Test/baseResults/remap.hlsl.sample.basic.everything.frag.out
@@ -2,7 +2,7 @@
 WARNING: 0:4: 'immediate sampler state' : unimplemented 
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 24878
 
                               Capability Shader
diff --git a/Test/baseResults/remap.hlsl.sample.basic.none.frag.out b/Test/baseResults/remap.hlsl.sample.basic.none.frag.out
index e58a9e6..24a1ade 100644
--- a/Test/baseResults/remap.hlsl.sample.basic.none.frag.out
+++ b/Test/baseResults/remap.hlsl.sample.basic.none.frag.out
@@ -2,7 +2,7 @@
 WARNING: 0:4: 'immediate sampler state' : unimplemented 
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 198
 
                               Capability Shader
diff --git a/Test/baseResults/remap.hlsl.sample.basic.strip.frag.out b/Test/baseResults/remap.hlsl.sample.basic.strip.frag.out
index 54a368e..2108108 100644
--- a/Test/baseResults/remap.hlsl.sample.basic.strip.frag.out
+++ b/Test/baseResults/remap.hlsl.sample.basic.strip.frag.out
@@ -2,7 +2,7 @@
 WARNING: 0:4: 'immediate sampler state' : unimplemented 
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 198
 
                               Capability Shader
diff --git a/Test/baseResults/remap.hlsl.templatetypes.everything.frag.out b/Test/baseResults/remap.hlsl.templatetypes.everything.frag.out
index fe85679..aff0998 100644
--- a/Test/baseResults/remap.hlsl.templatetypes.everything.frag.out
+++ b/Test/baseResults/remap.hlsl.templatetypes.everything.frag.out
@@ -1,6 +1,6 @@
 remap.hlsl.templatetypes.everything.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 24954
 
                               Capability Shader
diff --git a/Test/baseResults/remap.hlsl.templatetypes.none.frag.out b/Test/baseResults/remap.hlsl.templatetypes.none.frag.out
index f37403c..282fd2a 100644
--- a/Test/baseResults/remap.hlsl.templatetypes.none.frag.out
+++ b/Test/baseResults/remap.hlsl.templatetypes.none.frag.out
@@ -1,6 +1,6 @@
 remap.hlsl.templatetypes.none.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 160
 
                               Capability Shader
diff --git a/Test/baseResults/remap.if.everything.frag.out b/Test/baseResults/remap.if.everything.frag.out
index 1b4482b..cdb007b 100644
--- a/Test/baseResults/remap.if.everything.frag.out
+++ b/Test/baseResults/remap.if.everything.frag.out
@@ -1,6 +1,6 @@
 remap.if.everything.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 22855
 
                               Capability Shader
diff --git a/Test/baseResults/remap.if.none.frag.out b/Test/baseResults/remap.if.none.frag.out
index 09ab2d4..0c8d278 100644
--- a/Test/baseResults/remap.if.none.frag.out
+++ b/Test/baseResults/remap.if.none.frag.out
@@ -1,6 +1,6 @@
 remap.if.none.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 25
 
                               Capability Shader
diff --git a/Test/baseResults/remap.similar_1a.everything.frag.out b/Test/baseResults/remap.similar_1a.everything.frag.out
index 6f4a140..2f8f1c7 100644
--- a/Test/baseResults/remap.similar_1a.everything.frag.out
+++ b/Test/baseResults/remap.similar_1a.everything.frag.out
@@ -1,6 +1,6 @@
 remap.similar_1a.everything.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 24916
 
                               Capability Shader
diff --git a/Test/baseResults/remap.similar_1a.none.frag.out b/Test/baseResults/remap.similar_1a.none.frag.out
index 6763686..80d35c3 100644
--- a/Test/baseResults/remap.similar_1a.none.frag.out
+++ b/Test/baseResults/remap.similar_1a.none.frag.out
@@ -1,6 +1,6 @@
 remap.similar_1a.none.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 86
 
                               Capability Shader
diff --git a/Test/baseResults/remap.similar_1b.everything.frag.out b/Test/baseResults/remap.similar_1b.everything.frag.out
index cf4eb7c..c76c4bf 100644
--- a/Test/baseResults/remap.similar_1b.everything.frag.out
+++ b/Test/baseResults/remap.similar_1b.everything.frag.out
@@ -1,6 +1,6 @@
 remap.similar_1b.everything.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 24916
 
                               Capability Shader
diff --git a/Test/baseResults/remap.similar_1b.none.frag.out b/Test/baseResults/remap.similar_1b.none.frag.out
index 1b76cbb..0a854d6 100644
--- a/Test/baseResults/remap.similar_1b.none.frag.out
+++ b/Test/baseResults/remap.similar_1b.none.frag.out
@@ -1,6 +1,6 @@
 remap.similar_1b.none.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 91
 
                               Capability Shader
diff --git a/Test/baseResults/remap.specconst.comp.out b/Test/baseResults/remap.specconst.comp.out
index 16e096c..ee049f4 100644
--- a/Test/baseResults/remap.specconst.comp.out
+++ b/Test/baseResults/remap.specconst.comp.out
@@ -1,6 +1,6 @@
 remap.specconst.comp
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 16104
 
                               Capability Shader
diff --git a/Test/baseResults/remap.switch.everything.frag.out b/Test/baseResults/remap.switch.everything.frag.out
index 5e8d3b2..ffd64d4 100644
--- a/Test/baseResults/remap.switch.everything.frag.out
+++ b/Test/baseResults/remap.switch.everything.frag.out
@@ -3,7 +3,7 @@
          "precision mediump int; precision highp float;" 
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 23990
 
                               Capability Shader
diff --git a/Test/baseResults/remap.switch.none.frag.out b/Test/baseResults/remap.switch.none.frag.out
index 57cf4d7..4dd7897 100644
--- a/Test/baseResults/remap.switch.none.frag.out
+++ b/Test/baseResults/remap.switch.none.frag.out
@@ -3,7 +3,7 @@
          "precision mediump int; precision highp float;" 
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 48
 
                               Capability Shader
diff --git a/Test/baseResults/remap.uniformarray.everything.frag.out b/Test/baseResults/remap.uniformarray.everything.frag.out
index 6ec56a5..c1f306e 100644
--- a/Test/baseResults/remap.uniformarray.everything.frag.out
+++ b/Test/baseResults/remap.uniformarray.everything.frag.out
@@ -1,6 +1,6 @@
 remap.uniformarray.everything.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 25030
 
                               Capability Shader
diff --git a/Test/baseResults/remap.uniformarray.none.frag.out b/Test/baseResults/remap.uniformarray.none.frag.out
index 71849eb..6ed2d45 100644
--- a/Test/baseResults/remap.uniformarray.none.frag.out
+++ b/Test/baseResults/remap.uniformarray.none.frag.out
@@ -1,6 +1,6 @@
 remap.uniformarray.none.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 53
 
                               Capability Shader
diff --git a/Test/baseResults/samplerlessTextureFunctions.frag.out b/Test/baseResults/samplerlessTextureFunctions.frag.out
new file mode 100644
index 0000000..8ac8d4d
--- /dev/null
+++ b/Test/baseResults/samplerlessTextureFunctions.frag.out
@@ -0,0 +1,13 @@
+samplerlessTextureFunctions.frag
+ERROR: 0:9: 'texelFetch' : required extension not requested: GL_EXT_samplerless_texture_functions
+ERROR: 0:10: 'texelFetch' : required extension not requested: GL_EXT_samplerless_texture_functions
+ERROR: 0:16: 'texelFetchOffset' : required extension not requested: GL_EXT_samplerless_texture_functions
+ERROR: 0:18: 'textureSize' : required extension not requested: GL_EXT_samplerless_texture_functions
+ERROR: 0:19: 'textureSize' : required extension not requested: GL_EXT_samplerless_texture_functions
+ERROR: 0:20: 'textureSize' : required extension not requested: GL_EXT_samplerless_texture_functions
+ERROR: 0:22: 'textureQueryLevels' : required extension not requested: GL_EXT_samplerless_texture_functions
+ERROR: 0:24: 'textureSamples' : required extension not requested: GL_EXT_samplerless_texture_functions
+ERROR: 8 compilation errors.  No code generated.
+
+
+SPIR-V is not generated for failed compile or link
diff --git a/Test/baseResults/spv.100ops.frag.out b/Test/baseResults/spv.100ops.frag.out
index a1b03f7..8f656eb 100755
--- a/Test/baseResults/spv.100ops.frag.out
+++ b/Test/baseResults/spv.100ops.frag.out
@@ -1,6 +1,6 @@
 spv.100ops.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 49
 
                               Capability Shader
diff --git a/Test/baseResults/spv.130.frag.out b/Test/baseResults/spv.130.frag.out
index 80b57bc..d1a626d 100644
--- a/Test/baseResults/spv.130.frag.out
+++ b/Test/baseResults/spv.130.frag.out
@@ -2,7 +2,7 @@
 WARNING: 0:31: '#extension' : extension is only partially supported: GL_ARB_gpu_shader5
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 205
 
                               Capability Shader
diff --git a/Test/baseResults/spv.140.frag.out b/Test/baseResults/spv.140.frag.out
index 09c7755..89bf489 100755
--- a/Test/baseResults/spv.140.frag.out
+++ b/Test/baseResults/spv.140.frag.out
@@ -1,6 +1,6 @@
 spv.140.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 96
 
                               Capability Shader
diff --git a/Test/baseResults/spv.150.geom.out b/Test/baseResults/spv.150.geom.out
index d32450d..f759793 100755
--- a/Test/baseResults/spv.150.geom.out
+++ b/Test/baseResults/spv.150.geom.out
@@ -1,6 +1,6 @@
 spv.150.geom
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 71
 
                               Capability Geometry
diff --git a/Test/baseResults/spv.150.vert.out b/Test/baseResults/spv.150.vert.out
index 928347e..282f5f9 100755
--- a/Test/baseResults/spv.150.vert.out
+++ b/Test/baseResults/spv.150.vert.out
@@ -1,6 +1,6 @@
 spv.150.vert
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 63
 
                               Capability Shader
diff --git a/Test/baseResults/spv.16bitstorage-int.frag.out b/Test/baseResults/spv.16bitstorage-int.frag.out
new file mode 100755
index 0000000..9de223c
--- /dev/null
+++ b/Test/baseResults/spv.16bitstorage-int.frag.out
@@ -0,0 +1,336 @@
+spv.16bitstorage-int.frag
+// Module Version 10000
+// Generated by (magic number): 80007
+// Id's are bound by 171
+
+                              Capability Shader
+                              Capability Int16
+                              Capability StorageUniformBufferBlock16
+                              Capability StorageUniform16
+                              Extension  "SPV_AMD_gpu_shader_int16"
+                              Extension  "SPV_KHR_16bit_storage"
+               1:             ExtInstImport  "GLSL.std.450"
+                              MemoryModel Logical GLSL450
+                              EntryPoint Fragment 4  "main"
+                              ExecutionMode 4 OriginUpperLeft
+                              Source GLSL 450
+                              SourceExtension  "GL_EXT_shader_16bit_storage"
+                              Name 4  "main"
+                              Name 12  "S"
+                              MemberName 12(S) 0  "x"
+                              MemberName 12(S) 1  "y"
+                              MemberName 12(S) 2  "z"
+                              Name 17  "B2"
+                              MemberName 17(B2) 0  "o"
+                              MemberName 17(B2) 1  "p"
+                              MemberName 17(B2) 2  "q"
+                              MemberName 17(B2) 3  "r"
+                              MemberName 17(B2) 4  "u"
+                              MemberName 17(B2) 5  "v"
+                              MemberName 17(B2) 6  "x"
+                              MemberName 17(B2) 7  "w"
+                              Name 19  "b2"
+                              Name 23  "S"
+                              MemberName 23(S) 0  "x"
+                              MemberName 23(S) 1  "y"
+                              MemberName 23(S) 2  "z"
+                              Name 25  "B1"
+                              MemberName 25(B1) 0  "a"
+                              MemberName 25(B1) 1  "b"
+                              MemberName 25(B1) 2  "c"
+                              MemberName 25(B1) 3  "d"
+                              MemberName 25(B1) 4  "g"
+                              MemberName 25(B1) 5  "h"
+                              MemberName 25(B1) 6  "j"
+                              Name 27  "b1"
+                              Name 45  "S"
+                              MemberName 45(S) 0  "x"
+                              MemberName 45(S) 1  "y"
+                              MemberName 45(S) 2  "z"
+                              Name 49  "B5"
+                              MemberName 49(B5) 0  "o"
+                              MemberName 49(B5) 1  "p"
+                              MemberName 49(B5) 2  "q"
+                              MemberName 49(B5) 3  "r"
+                              MemberName 49(B5) 4  "u"
+                              MemberName 49(B5) 5  "v"
+                              MemberName 49(B5) 6  "x"
+                              MemberName 49(B5) 7  "w"
+                              Name 51  "b5"
+                              Name 69  "x0"
+                              Name 75  "x1"
+                              Name 88  "S2"
+                              MemberName 88(S2) 0  "x"
+                              MemberName 88(S2) 1  "y"
+                              MemberName 88(S2) 2  "z"
+                              Name 89  "S3"
+                              MemberName 89(S3) 0  "x"
+                              Name 90  "B4"
+                              MemberName 90(B4) 0  "x"
+                              MemberName 90(B4) 1  "y"
+                              Name 92  "b4"
+                              Name 93  "S2"
+                              MemberName 93(S2) 0  "x"
+                              MemberName 93(S2) 1  "y"
+                              MemberName 93(S2) 2  "z"
+                              Name 94  "B3"
+                              MemberName 94(B3) 0  "x"
+                              Name 96  "b3"
+                              Name 113  "v3"
+                              Name 135  "u3"
+                              Decorate 11 ArrayStride 2
+                              MemberDecorate 12(S) 0 Offset 0
+                              MemberDecorate 12(S) 1 Offset 4
+                              MemberDecorate 12(S) 2 Offset 8
+                              Decorate 13 ArrayStride 16
+                              Decorate 15 ArrayStride 4
+                              Decorate 16 ArrayStride 2
+                              MemberDecorate 17(B2) 0 Offset 0
+                              MemberDecorate 17(B2) 1 Offset 4
+                              MemberDecorate 17(B2) 2 Offset 8
+                              MemberDecorate 17(B2) 3 Offset 14
+                              MemberDecorate 17(B2) 4 Offset 24
+                              MemberDecorate 17(B2) 5 Offset 40
+                              MemberDecorate 17(B2) 6 Offset 72
+                              MemberDecorate 17(B2) 7 Offset 472
+                              Decorate 17(B2) BufferBlock
+                              Decorate 19(b2) DescriptorSet 0
+                              Decorate 22 ArrayStride 16
+                              MemberDecorate 23(S) 0 Offset 0
+                              MemberDecorate 23(S) 1 Offset 4
+                              MemberDecorate 23(S) 2 Offset 8
+                              Decorate 24 ArrayStride 16
+                              MemberDecorate 25(B1) 0 Offset 0
+                              MemberDecorate 25(B1) 1 Offset 4
+                              MemberDecorate 25(B1) 2 Offset 8
+                              MemberDecorate 25(B1) 3 Offset 16
+                              MemberDecorate 25(B1) 4 Offset 48
+                              MemberDecorate 25(B1) 5 Offset 64
+                              MemberDecorate 25(B1) 6 Offset 96
+                              Decorate 25(B1) Block
+                              Decorate 27(b1) DescriptorSet 0
+                              Decorate 44 ArrayStride 16
+                              MemberDecorate 45(S) 0 Offset 0
+                              MemberDecorate 45(S) 1 Offset 4
+                              MemberDecorate 45(S) 2 Offset 8
+                              Decorate 46 ArrayStride 16
+                              Decorate 47 ArrayStride 16
+                              Decorate 48 ArrayStride 16
+                              MemberDecorate 49(B5) 0 Offset 0
+                              MemberDecorate 49(B5) 1 Offset 4
+                              MemberDecorate 49(B5) 2 Offset 8
+                              MemberDecorate 49(B5) 3 Offset 16
+                              MemberDecorate 49(B5) 4 Offset 48
+                              MemberDecorate 49(B5) 5 Offset 64
+                              MemberDecorate 49(B5) 6 Offset 96
+                              MemberDecorate 49(B5) 7 Offset 1696
+                              Decorate 49(B5) Block
+                              Decorate 51(b5) DescriptorSet 0
+                              MemberDecorate 88(S2) 0 ColMajor
+                              MemberDecorate 88(S2) 0 Offset 0
+                              MemberDecorate 88(S2) 0 MatrixStride 16
+                              MemberDecorate 88(S2) 1 Offset 64
+                              MemberDecorate 88(S2) 2 Offset 68
+                              MemberDecorate 89(S3) 0 Offset 0
+                              MemberDecorate 90(B4) 0 Offset 0
+                              MemberDecorate 90(B4) 1 Offset 80
+                              Decorate 90(B4) BufferBlock
+                              Decorate 92(b4) DescriptorSet 0
+                              MemberDecorate 93(S2) 0 RowMajor
+                              MemberDecorate 93(S2) 0 Offset 0
+                              MemberDecorate 93(S2) 0 MatrixStride 16
+                              MemberDecorate 93(S2) 1 Offset 64
+                              MemberDecorate 93(S2) 2 Offset 68
+                              MemberDecorate 94(B3) 0 Offset 0
+                              Decorate 94(B3) BufferBlock
+                              Decorate 96(b3) DescriptorSet 0
+               2:             TypeVoid
+               3:             TypeFunction 2
+               6:             TypeInt 16 1
+               7:             TypeVector 6(int16_t) 2
+               8:             TypeVector 6(int16_t) 3
+               9:             TypeInt 32 0
+              10:      9(int) Constant 2
+              11:             TypeArray 6(int16_t) 10
+           12(S):             TypeStruct 6(int16_t) 7(i16vec2) 8(i16vec3)
+              13:             TypeArray 12(S) 10
+              14:      9(int) Constant 100
+              15:             TypeArray 7(i16vec2) 14
+              16:             TypeRuntimeArray 6(int16_t)
+          17(B2):             TypeStruct 6(int16_t) 7(i16vec2) 8(i16vec3) 11 12(S) 13 15 16
+              18:             TypePointer Uniform 17(B2)
+          19(b2):     18(ptr) Variable Uniform
+              20:             TypeInt 32 1
+              21:     20(int) Constant 0
+              22:             TypeArray 6(int16_t) 10
+           23(S):             TypeStruct 6(int16_t) 7(i16vec2) 8(i16vec3)
+              24:             TypeArray 23(S) 10
+          25(B1):             TypeStruct 6(int16_t) 7(i16vec2) 8(i16vec3) 22 23(S) 24 20(int)
+              26:             TypePointer Uniform 25(B1)
+          27(b1):     26(ptr) Variable Uniform
+              28:             TypePointer Uniform 6(int16_t)
+              32:     20(int) Constant 1
+              33:     20(int) Constant 2
+              34:             TypePointer Uniform 8(i16vec3)
+              37:             TypeVector 20(int) 3
+              39:             TypeVector 20(int) 2
+              42:             TypePointer Uniform 7(i16vec2)
+              44:             TypeArray 6(int16_t) 10
+           45(S):             TypeStruct 6(int16_t) 7(i16vec2) 8(i16vec3)
+              46:             TypeArray 45(S) 10
+              47:             TypeArray 7(i16vec2) 14
+              48:             TypeArray 6(int16_t) 14
+          49(B5):             TypeStruct 6(int16_t) 7(i16vec2) 8(i16vec3) 44 45(S) 46 47 48
+              50:             TypePointer Uniform 49(B5)
+          51(b5):     50(ptr) Variable Uniform
+              58:     20(int) Constant 3
+              68:             TypePointer Function 20(int)
+              73:             TypeVector 20(int) 4
+              74:             TypePointer Function 73(ivec4)
+              85:             TypeFloat 32
+              86:             TypeVector 85(float) 4
+              87:             TypeMatrix 86(fvec4) 4
+          88(S2):             TypeStruct 87 6(int16_t) 20(int)
+          89(S3):             TypeStruct 88(S2)
+          90(B4):             TypeStruct 88(S2) 89(S3)
+              91:             TypePointer Uniform 90(B4)
+          92(b4):     91(ptr) Variable Uniform
+          93(S2):             TypeStruct 87 6(int16_t) 20(int)
+          94(B3):             TypeStruct 93(S2)
+              95:             TypePointer Uniform 94(B3)
+          96(b3):     95(ptr) Variable Uniform
+              97:             TypePointer Uniform 87
+             104:      9(int) Constant 0
+             108:     20(int) Constant 5
+             112:             TypePointer Function 37(ivec3)
+             114:     20(int) Constant 7
+             115:     20(int) Constant 6
+             116:             TypePointer Uniform 20(int)
+             166:   39(ivec2) ConstantComposite 32 33
+         4(main):           2 Function None 3
+               5:             Label
+          69(x0):     68(ptr) Variable Function
+          75(x1):     74(ptr) Variable Function
+         113(v3):    112(ptr) Variable Function
+         135(u3):    112(ptr) Variable Function
+              29:     28(ptr) AccessChain 27(b1) 21
+              30:  6(int16_t) Load 29
+              31:     28(ptr) AccessChain 19(b2) 21
+                              Store 31 30
+              35:     34(ptr) AccessChain 19(b2) 33
+              36:  8(i16vec3) Load 35
+              38:   37(ivec3) SConvert 36
+              40:   39(ivec2) VectorShuffle 38 38 0 1
+              41:  7(i16vec2) SConvert 40
+              43:     42(ptr) AccessChain 19(b2) 32
+                              Store 43 41
+              52:     34(ptr) AccessChain 51(b5) 33
+              53:  8(i16vec3) Load 52
+              54:   37(ivec3) SConvert 53
+              55:   39(ivec2) VectorShuffle 54 54 0 1
+              56:  7(i16vec2) SConvert 55
+              57:     42(ptr) AccessChain 19(b2) 32
+                              Store 57 56
+              59:     28(ptr) AccessChain 19(b2) 58 21
+              60:  6(int16_t) Load 59
+              61:     28(ptr) AccessChain 19(b2) 58 21
+                              Store 61 60
+              62:     28(ptr) AccessChain 51(b5) 58 32
+              63:  6(int16_t) Load 62
+              64:     28(ptr) AccessChain 19(b2) 58 32
+                              Store 64 63
+              65:     42(ptr) AccessChain 19(b2) 32
+              66:  7(i16vec2) Load 65
+              67:     42(ptr) AccessChain 19(b2) 32
+                              Store 67 66
+              70:     28(ptr) AccessChain 27(b1) 21
+              71:  6(int16_t) Load 70
+              72:     20(int) SConvert 71
+                              Store 69(x0) 72
+              76:     28(ptr) AccessChain 27(b1) 21
+              77:  6(int16_t) Load 76
+              78:     20(int) SConvert 77
+              79:     42(ptr) AccessChain 19(b2) 32
+              80:  7(i16vec2) Load 79
+              81:   39(ivec2) SConvert 80
+              82:     20(int) CompositeExtract 81 0
+              83:     20(int) CompositeExtract 81 1
+              84:   73(ivec4) CompositeConstruct 78 82 83 32
+                              Store 75(x1) 84
+              98:     97(ptr) AccessChain 96(b3) 21 21
+              99:          87 Load 98
+             100:     97(ptr) AccessChain 92(b4) 21 21
+                              Store 100 99
+             101:     42(ptr) AccessChain 19(b2) 32
+             102:  7(i16vec2) Load 101
+             103:   39(ivec2) SConvert 102
+             105:     20(int) CompositeExtract 103 0
+             106:  6(int16_t) SConvert 105
+             107:     28(ptr) AccessChain 19(b2) 21
+                              Store 107 106
+             109:     42(ptr) AccessChain 19(b2) 108 32 32
+             110:  7(i16vec2) Load 109
+             111:     42(ptr) AccessChain 19(b2) 32
+                              Store 111 110
+             117:    116(ptr) AccessChain 27(b1) 115
+             118:     20(int) Load 117
+             119:     28(ptr) AccessChain 19(b2) 114 118
+             120:  6(int16_t) Load 119
+             121:     20(int) SConvert 120
+             122:    116(ptr) AccessChain 27(b1) 115
+             123:     20(int) Load 122
+             124:     20(int) IAdd 123 32
+             125:     28(ptr) AccessChain 19(b2) 114 124
+             126:  6(int16_t) Load 125
+             127:     20(int) SConvert 126
+             128:    116(ptr) AccessChain 27(b1) 115
+             129:     20(int) Load 128
+             130:     20(int) IAdd 129 33
+             131:     28(ptr) AccessChain 19(b2) 114 130
+             132:  6(int16_t) Load 131
+             133:     20(int) SConvert 132
+             134:   37(ivec3) CompositeConstruct 121 127 133
+                              Store 113(v3) 134
+             136:    116(ptr) AccessChain 27(b1) 115
+             137:     20(int) Load 136
+             138:     28(ptr) AccessChain 51(b5) 114 137
+             139:  6(int16_t) Load 138
+             140:     20(int) SConvert 139
+             141:    116(ptr) AccessChain 27(b1) 115
+             142:     20(int) Load 141
+             143:     20(int) IAdd 142 32
+             144:     28(ptr) AccessChain 51(b5) 114 143
+             145:  6(int16_t) Load 144
+             146:     20(int) SConvert 145
+             147:    116(ptr) AccessChain 27(b1) 115
+             148:     20(int) Load 147
+             149:     20(int) IAdd 148 33
+             150:     28(ptr) AccessChain 51(b5) 114 149
+             151:  6(int16_t) Load 150
+             152:     20(int) SConvert 151
+             153:   37(ivec3) CompositeConstruct 140 146 152
+                              Store 135(u3) 153
+             154:     42(ptr) AccessChain 19(b2) 115 21
+             155:  7(i16vec2) Load 154
+             156:     42(ptr) AccessChain 19(b2) 115 21
+                              Store 156 155
+             157:     42(ptr) AccessChain 51(b5) 115 32
+             158:  7(i16vec2) Load 157
+             159:     42(ptr) AccessChain 19(b2) 115 32
+                              Store 159 158
+             160:     28(ptr) AccessChain 27(b1) 21
+             161:  6(int16_t) Load 160
+             162:     28(ptr) AccessChain 19(b2) 32 104
+                              Store 162 161
+             163:     28(ptr) AccessChain 19(b2) 32 104
+             164:  6(int16_t) Load 163
+             165:     28(ptr) AccessChain 19(b2) 21
+                              Store 165 164
+             167:  7(i16vec2) SConvert 166
+             168:     42(ptr) AccessChain 19(b2) 32
+                              Store 168 167
+             169:  6(int16_t) SConvert 58
+             170:     28(ptr) AccessChain 19(b2) 21
+                              Store 170 169
+                              Return
+                              FunctionEnd
diff --git a/Test/baseResults/spv.16bitstorage-uint.frag.out b/Test/baseResults/spv.16bitstorage-uint.frag.out
new file mode 100755
index 0000000..def7c57
--- /dev/null
+++ b/Test/baseResults/spv.16bitstorage-uint.frag.out
@@ -0,0 +1,338 @@
+spv.16bitstorage-uint.frag
+// Module Version 10000
+// Generated by (magic number): 80007
+// Id's are bound by 173
+
+                              Capability Shader
+                              Capability Int16
+                              Capability StorageUniformBufferBlock16
+                              Capability StorageUniform16
+                              Extension  "SPV_AMD_gpu_shader_int16"
+                              Extension  "SPV_KHR_16bit_storage"
+               1:             ExtInstImport  "GLSL.std.450"
+                              MemoryModel Logical GLSL450
+                              EntryPoint Fragment 4  "main"
+                              ExecutionMode 4 OriginUpperLeft
+                              Source GLSL 450
+                              SourceExtension  "GL_EXT_shader_16bit_storage"
+                              Name 4  "main"
+                              Name 12  "S"
+                              MemberName 12(S) 0  "x"
+                              MemberName 12(S) 1  "y"
+                              MemberName 12(S) 2  "z"
+                              Name 17  "B2"
+                              MemberName 17(B2) 0  "o"
+                              MemberName 17(B2) 1  "p"
+                              MemberName 17(B2) 2  "q"
+                              MemberName 17(B2) 3  "r"
+                              MemberName 17(B2) 4  "u"
+                              MemberName 17(B2) 5  "v"
+                              MemberName 17(B2) 6  "x"
+                              MemberName 17(B2) 7  "w"
+                              Name 19  "b2"
+                              Name 23  "S"
+                              MemberName 23(S) 0  "x"
+                              MemberName 23(S) 1  "y"
+                              MemberName 23(S) 2  "z"
+                              Name 25  "B1"
+                              MemberName 25(B1) 0  "a"
+                              MemberName 25(B1) 1  "b"
+                              MemberName 25(B1) 2  "c"
+                              MemberName 25(B1) 3  "d"
+                              MemberName 25(B1) 4  "g"
+                              MemberName 25(B1) 5  "h"
+                              MemberName 25(B1) 6  "j"
+                              Name 27  "b1"
+                              Name 45  "S"
+                              MemberName 45(S) 0  "x"
+                              MemberName 45(S) 1  "y"
+                              MemberName 45(S) 2  "z"
+                              Name 49  "B5"
+                              MemberName 49(B5) 0  "o"
+                              MemberName 49(B5) 1  "p"
+                              MemberName 49(B5) 2  "q"
+                              MemberName 49(B5) 3  "r"
+                              MemberName 49(B5) 4  "u"
+                              MemberName 49(B5) 5  "v"
+                              MemberName 49(B5) 6  "x"
+                              MemberName 49(B5) 7  "w"
+                              Name 51  "b5"
+                              Name 69  "x0"
+                              Name 75  "x1"
+                              Name 89  "S2"
+                              MemberName 89(S2) 0  "x"
+                              MemberName 89(S2) 1  "y"
+                              MemberName 89(S2) 2  "z"
+                              Name 90  "S3"
+                              MemberName 90(S3) 0  "x"
+                              Name 91  "B4"
+                              MemberName 91(B4) 0  "x"
+                              MemberName 91(B4) 1  "y"
+                              Name 93  "b4"
+                              Name 94  "S2"
+                              MemberName 94(S2) 0  "x"
+                              MemberName 94(S2) 1  "y"
+                              MemberName 94(S2) 2  "z"
+                              Name 95  "B3"
+                              MemberName 95(B3) 0  "x"
+                              Name 97  "b3"
+                              Name 114  "v3"
+                              Name 136  "u3"
+                              Decorate 11 ArrayStride 2
+                              MemberDecorate 12(S) 0 Offset 0
+                              MemberDecorate 12(S) 1 Offset 4
+                              MemberDecorate 12(S) 2 Offset 8
+                              Decorate 13 ArrayStride 16
+                              Decorate 15 ArrayStride 4
+                              Decorate 16 ArrayStride 2
+                              MemberDecorate 17(B2) 0 Offset 0
+                              MemberDecorate 17(B2) 1 Offset 4
+                              MemberDecorate 17(B2) 2 Offset 8
+                              MemberDecorate 17(B2) 3 Offset 14
+                              MemberDecorate 17(B2) 4 Offset 24
+                              MemberDecorate 17(B2) 5 Offset 40
+                              MemberDecorate 17(B2) 6 Offset 72
+                              MemberDecorate 17(B2) 7 Offset 472
+                              Decorate 17(B2) BufferBlock
+                              Decorate 19(b2) DescriptorSet 0
+                              Decorate 22 ArrayStride 16
+                              MemberDecorate 23(S) 0 Offset 0
+                              MemberDecorate 23(S) 1 Offset 4
+                              MemberDecorate 23(S) 2 Offset 8
+                              Decorate 24 ArrayStride 16
+                              MemberDecorate 25(B1) 0 Offset 0
+                              MemberDecorate 25(B1) 1 Offset 4
+                              MemberDecorate 25(B1) 2 Offset 8
+                              MemberDecorate 25(B1) 3 Offset 16
+                              MemberDecorate 25(B1) 4 Offset 48
+                              MemberDecorate 25(B1) 5 Offset 64
+                              MemberDecorate 25(B1) 6 Offset 96
+                              Decorate 25(B1) Block
+                              Decorate 27(b1) DescriptorSet 0
+                              Decorate 44 ArrayStride 16
+                              MemberDecorate 45(S) 0 Offset 0
+                              MemberDecorate 45(S) 1 Offset 4
+                              MemberDecorate 45(S) 2 Offset 8
+                              Decorate 46 ArrayStride 16
+                              Decorate 47 ArrayStride 16
+                              Decorate 48 ArrayStride 16
+                              MemberDecorate 49(B5) 0 Offset 0
+                              MemberDecorate 49(B5) 1 Offset 4
+                              MemberDecorate 49(B5) 2 Offset 8
+                              MemberDecorate 49(B5) 3 Offset 16
+                              MemberDecorate 49(B5) 4 Offset 48
+                              MemberDecorate 49(B5) 5 Offset 64
+                              MemberDecorate 49(B5) 6 Offset 96
+                              MemberDecorate 49(B5) 7 Offset 1696
+                              Decorate 49(B5) Block
+                              Decorate 51(b5) DescriptorSet 0
+                              MemberDecorate 89(S2) 0 ColMajor
+                              MemberDecorate 89(S2) 0 Offset 0
+                              MemberDecorate 89(S2) 0 MatrixStride 16
+                              MemberDecorate 89(S2) 1 Offset 64
+                              MemberDecorate 89(S2) 2 Offset 68
+                              MemberDecorate 90(S3) 0 Offset 0
+                              MemberDecorate 91(B4) 0 Offset 0
+                              MemberDecorate 91(B4) 1 Offset 80
+                              Decorate 91(B4) BufferBlock
+                              Decorate 93(b4) DescriptorSet 0
+                              MemberDecorate 94(S2) 0 RowMajor
+                              MemberDecorate 94(S2) 0 Offset 0
+                              MemberDecorate 94(S2) 0 MatrixStride 16
+                              MemberDecorate 94(S2) 1 Offset 64
+                              MemberDecorate 94(S2) 2 Offset 68
+                              MemberDecorate 95(B3) 0 Offset 0
+                              Decorate 95(B3) BufferBlock
+                              Decorate 97(b3) DescriptorSet 0
+               2:             TypeVoid
+               3:             TypeFunction 2
+               6:             TypeInt 16 0
+               7:             TypeVector 6(int16_t) 2
+               8:             TypeVector 6(int16_t) 3
+               9:             TypeInt 32 0
+              10:      9(int) Constant 2
+              11:             TypeArray 6(int16_t) 10
+           12(S):             TypeStruct 6(int16_t) 7(i16vec2) 8(i16vec3)
+              13:             TypeArray 12(S) 10
+              14:      9(int) Constant 100
+              15:             TypeArray 7(i16vec2) 14
+              16:             TypeRuntimeArray 6(int16_t)
+          17(B2):             TypeStruct 6(int16_t) 7(i16vec2) 8(i16vec3) 11 12(S) 13 15 16
+              18:             TypePointer Uniform 17(B2)
+          19(b2):     18(ptr) Variable Uniform
+              20:             TypeInt 32 1
+              21:     20(int) Constant 0
+              22:             TypeArray 6(int16_t) 10
+           23(S):             TypeStruct 6(int16_t) 7(i16vec2) 8(i16vec3)
+              24:             TypeArray 23(S) 10
+          25(B1):             TypeStruct 6(int16_t) 7(i16vec2) 8(i16vec3) 22 23(S) 24 9(int)
+              26:             TypePointer Uniform 25(B1)
+          27(b1):     26(ptr) Variable Uniform
+              28:             TypePointer Uniform 6(int16_t)
+              32:     20(int) Constant 1
+              33:     20(int) Constant 2
+              34:             TypePointer Uniform 8(i16vec3)
+              37:             TypeVector 9(int) 3
+              39:             TypeVector 9(int) 2
+              42:             TypePointer Uniform 7(i16vec2)
+              44:             TypeArray 6(int16_t) 10
+           45(S):             TypeStruct 6(int16_t) 7(i16vec2) 8(i16vec3)
+              46:             TypeArray 45(S) 10
+              47:             TypeArray 7(i16vec2) 14
+              48:             TypeArray 6(int16_t) 14
+          49(B5):             TypeStruct 6(int16_t) 7(i16vec2) 8(i16vec3) 44 45(S) 46 47 48
+              50:             TypePointer Uniform 49(B5)
+          51(b5):     50(ptr) Variable Uniform
+              58:     20(int) Constant 3
+              68:             TypePointer Function 9(int)
+              73:             TypeVector 9(int) 4
+              74:             TypePointer Function 73(ivec4)
+              82:      9(int) Constant 1
+              86:             TypeFloat 32
+              87:             TypeVector 86(float) 4
+              88:             TypeMatrix 87(fvec4) 4
+          89(S2):             TypeStruct 88 6(int16_t) 9(int)
+          90(S3):             TypeStruct 89(S2)
+          91(B4):             TypeStruct 89(S2) 90(S3)
+              92:             TypePointer Uniform 91(B4)
+          93(b4):     92(ptr) Variable Uniform
+          94(S2):             TypeStruct 88 6(int16_t) 9(int)
+          95(B3):             TypeStruct 94(S2)
+              96:             TypePointer Uniform 95(B3)
+          97(b3):     96(ptr) Variable Uniform
+              98:             TypePointer Uniform 88
+             105:      9(int) Constant 0
+             109:     20(int) Constant 5
+             113:             TypePointer Function 37(ivec3)
+             115:     20(int) Constant 7
+             116:     20(int) Constant 6
+             117:             TypePointer Uniform 9(int)
+             167:   39(ivec2) ConstantComposite 82 10
+             170:      9(int) Constant 3
+         4(main):           2 Function None 3
+               5:             Label
+          69(x0):     68(ptr) Variable Function
+          75(x1):     74(ptr) Variable Function
+         114(v3):    113(ptr) Variable Function
+         136(u3):    113(ptr) Variable Function
+              29:     28(ptr) AccessChain 27(b1) 21
+              30:  6(int16_t) Load 29
+              31:     28(ptr) AccessChain 19(b2) 21
+                              Store 31 30
+              35:     34(ptr) AccessChain 19(b2) 33
+              36:  8(i16vec3) Load 35
+              38:   37(ivec3) UConvert 36
+              40:   39(ivec2) VectorShuffle 38 38 0 1
+              41:  7(i16vec2) UConvert 40
+              43:     42(ptr) AccessChain 19(b2) 32
+                              Store 43 41
+              52:     34(ptr) AccessChain 51(b5) 33
+              53:  8(i16vec3) Load 52
+              54:   37(ivec3) UConvert 53
+              55:   39(ivec2) VectorShuffle 54 54 0 1
+              56:  7(i16vec2) UConvert 55
+              57:     42(ptr) AccessChain 19(b2) 32
+                              Store 57 56
+              59:     28(ptr) AccessChain 19(b2) 58 21
+              60:  6(int16_t) Load 59
+              61:     28(ptr) AccessChain 19(b2) 58 21
+                              Store 61 60
+              62:     28(ptr) AccessChain 51(b5) 58 32
+              63:  6(int16_t) Load 62
+              64:     28(ptr) AccessChain 19(b2) 58 32
+                              Store 64 63
+              65:     42(ptr) AccessChain 19(b2) 32
+              66:  7(i16vec2) Load 65
+              67:     42(ptr) AccessChain 19(b2) 32
+                              Store 67 66
+              70:     28(ptr) AccessChain 27(b1) 21
+              71:  6(int16_t) Load 70
+              72:      9(int) UConvert 71
+                              Store 69(x0) 72
+              76:     28(ptr) AccessChain 27(b1) 21
+              77:  6(int16_t) Load 76
+              78:      9(int) UConvert 77
+              79:     42(ptr) AccessChain 19(b2) 32
+              80:  7(i16vec2) Load 79
+              81:   39(ivec2) UConvert 80
+              83:      9(int) CompositeExtract 81 0
+              84:      9(int) CompositeExtract 81 1
+              85:   73(ivec4) CompositeConstruct 78 83 84 82
+                              Store 75(x1) 85
+              99:     98(ptr) AccessChain 97(b3) 21 21
+             100:          88 Load 99
+             101:     98(ptr) AccessChain 93(b4) 21 21
+                              Store 101 100
+             102:     42(ptr) AccessChain 19(b2) 32
+             103:  7(i16vec2) Load 102
+             104:   39(ivec2) UConvert 103
+             106:      9(int) CompositeExtract 104 0
+             107:  6(int16_t) UConvert 106
+             108:     28(ptr) AccessChain 19(b2) 21
+                              Store 108 107
+             110:     42(ptr) AccessChain 19(b2) 109 32 32
+             111:  7(i16vec2) Load 110
+             112:     42(ptr) AccessChain 19(b2) 32
+                              Store 112 111
+             118:    117(ptr) AccessChain 27(b1) 116
+             119:      9(int) Load 118
+             120:     28(ptr) AccessChain 19(b2) 115 119
+             121:  6(int16_t) Load 120
+             122:      9(int) UConvert 121
+             123:    117(ptr) AccessChain 27(b1) 116
+             124:      9(int) Load 123
+             125:      9(int) IAdd 124 82
+             126:     28(ptr) AccessChain 19(b2) 115 125
+             127:  6(int16_t) Load 126
+             128:      9(int) UConvert 127
+             129:    117(ptr) AccessChain 27(b1) 116
+             130:      9(int) Load 129
+             131:      9(int) IAdd 130 10
+             132:     28(ptr) AccessChain 19(b2) 115 131
+             133:  6(int16_t) Load 132
+             134:      9(int) UConvert 133
+             135:   37(ivec3) CompositeConstruct 122 128 134
+                              Store 114(v3) 135
+             137:    117(ptr) AccessChain 27(b1) 116
+             138:      9(int) Load 137
+             139:     28(ptr) AccessChain 51(b5) 115 138
+             140:  6(int16_t) Load 139
+             141:      9(int) UConvert 140
+             142:    117(ptr) AccessChain 27(b1) 116
+             143:      9(int) Load 142
+             144:      9(int) IAdd 143 82
+             145:     28(ptr) AccessChain 51(b5) 115 144
+             146:  6(int16_t) Load 145
+             147:      9(int) UConvert 146
+             148:    117(ptr) AccessChain 27(b1) 116
+             149:      9(int) Load 148
+             150:      9(int) IAdd 149 10
+             151:     28(ptr) AccessChain 51(b5) 115 150
+             152:  6(int16_t) Load 151
+             153:      9(int) UConvert 152
+             154:   37(ivec3) CompositeConstruct 141 147 153
+                              Store 136(u3) 154
+             155:     42(ptr) AccessChain 19(b2) 116 21
+             156:  7(i16vec2) Load 155
+             157:     42(ptr) AccessChain 19(b2) 116 21
+                              Store 157 156
+             158:     42(ptr) AccessChain 51(b5) 116 32
+             159:  7(i16vec2) Load 158
+             160:     42(ptr) AccessChain 19(b2) 116 32
+                              Store 160 159
+             161:     28(ptr) AccessChain 27(b1) 21
+             162:  6(int16_t) Load 161
+             163:     28(ptr) AccessChain 19(b2) 32 105
+                              Store 163 162
+             164:     28(ptr) AccessChain 19(b2) 32 105
+             165:  6(int16_t) Load 164
+             166:     28(ptr) AccessChain 19(b2) 21
+                              Store 166 165
+             168:  7(i16vec2) UConvert 167
+             169:     42(ptr) AccessChain 19(b2) 32
+                              Store 169 168
+             171:  6(int16_t) UConvert 170
+             172:     28(ptr) AccessChain 19(b2) 21
+                              Store 172 171
+                              Return
+                              FunctionEnd
diff --git a/Test/baseResults/spv.16bitstorage.frag.out b/Test/baseResults/spv.16bitstorage.frag.out
new file mode 100755
index 0000000..ebf48e9
--- /dev/null
+++ b/Test/baseResults/spv.16bitstorage.frag.out
@@ -0,0 +1,338 @@
+spv.16bitstorage.frag
+// Module Version 10000
+// Generated by (magic number): 80007
+// Id's are bound by 173
+
+                              Capability Shader
+                              Capability Float16
+                              Capability StorageUniformBufferBlock16
+                              Capability StorageUniform16
+                              Extension  "SPV_AMD_gpu_shader_half_float"
+                              Extension  "SPV_KHR_16bit_storage"
+               1:             ExtInstImport  "GLSL.std.450"
+                              MemoryModel Logical GLSL450
+                              EntryPoint Fragment 4  "main"
+                              ExecutionMode 4 OriginUpperLeft
+                              Source GLSL 450
+                              SourceExtension  "GL_EXT_shader_16bit_storage"
+                              Name 4  "main"
+                              Name 12  "S"
+                              MemberName 12(S) 0  "x"
+                              MemberName 12(S) 1  "y"
+                              MemberName 12(S) 2  "z"
+                              Name 17  "B2"
+                              MemberName 17(B2) 0  "o"
+                              MemberName 17(B2) 1  "p"
+                              MemberName 17(B2) 2  "q"
+                              MemberName 17(B2) 3  "r"
+                              MemberName 17(B2) 4  "u"
+                              MemberName 17(B2) 5  "v"
+                              MemberName 17(B2) 6  "x"
+                              MemberName 17(B2) 7  "w"
+                              Name 19  "b2"
+                              Name 23  "S"
+                              MemberName 23(S) 0  "x"
+                              MemberName 23(S) 1  "y"
+                              MemberName 23(S) 2  "z"
+                              Name 25  "B1"
+                              MemberName 25(B1) 0  "a"
+                              MemberName 25(B1) 1  "b"
+                              MemberName 25(B1) 2  "c"
+                              MemberName 25(B1) 3  "d"
+                              MemberName 25(B1) 4  "g"
+                              MemberName 25(B1) 5  "h"
+                              MemberName 25(B1) 6  "j"
+                              Name 27  "b1"
+                              Name 46  "S"
+                              MemberName 46(S) 0  "x"
+                              MemberName 46(S) 1  "y"
+                              MemberName 46(S) 2  "z"
+                              Name 50  "B5"
+                              MemberName 50(B5) 0  "o"
+                              MemberName 50(B5) 1  "p"
+                              MemberName 50(B5) 2  "q"
+                              MemberName 50(B5) 3  "r"
+                              MemberName 50(B5) 4  "u"
+                              MemberName 50(B5) 5  "v"
+                              MemberName 50(B5) 6  "x"
+                              MemberName 50(B5) 7  "w"
+                              Name 52  "b5"
+                              Name 70  "x0"
+                              Name 76  "x1"
+                              Name 88  "S2"
+                              MemberName 88(S2) 0  "x"
+                              MemberName 88(S2) 1  "y"
+                              MemberName 88(S2) 2  "z"
+                              Name 89  "S3"
+                              MemberName 89(S3) 0  "x"
+                              Name 90  "B4"
+                              MemberName 90(B4) 0  "x"
+                              MemberName 90(B4) 1  "y"
+                              Name 92  "b4"
+                              Name 93  "S2"
+                              MemberName 93(S2) 0  "x"
+                              MemberName 93(S2) 1  "y"
+                              MemberName 93(S2) 2  "z"
+                              Name 94  "B3"
+                              MemberName 94(B3) 0  "x"
+                              Name 96  "b3"
+                              Name 113  "v3"
+                              Name 135  "u3"
+                              Decorate 11 ArrayStride 2
+                              MemberDecorate 12(S) 0 Offset 0
+                              MemberDecorate 12(S) 1 Offset 4
+                              MemberDecorate 12(S) 2 Offset 8
+                              Decorate 13 ArrayStride 16
+                              Decorate 15 ArrayStride 4
+                              Decorate 16 ArrayStride 2
+                              MemberDecorate 17(B2) 0 Offset 0
+                              MemberDecorate 17(B2) 1 Offset 4
+                              MemberDecorate 17(B2) 2 Offset 8
+                              MemberDecorate 17(B2) 3 Offset 14
+                              MemberDecorate 17(B2) 4 Offset 24
+                              MemberDecorate 17(B2) 5 Offset 40
+                              MemberDecorate 17(B2) 6 Offset 72
+                              MemberDecorate 17(B2) 7 Offset 472
+                              Decorate 17(B2) BufferBlock
+                              Decorate 19(b2) DescriptorSet 0
+                              Decorate 22 ArrayStride 16
+                              MemberDecorate 23(S) 0 Offset 0
+                              MemberDecorate 23(S) 1 Offset 4
+                              MemberDecorate 23(S) 2 Offset 8
+                              Decorate 24 ArrayStride 16
+                              MemberDecorate 25(B1) 0 Offset 0
+                              MemberDecorate 25(B1) 1 Offset 4
+                              MemberDecorate 25(B1) 2 Offset 8
+                              MemberDecorate 25(B1) 3 Offset 16
+                              MemberDecorate 25(B1) 4 Offset 48
+                              MemberDecorate 25(B1) 5 Offset 64
+                              MemberDecorate 25(B1) 6 Offset 96
+                              Decorate 25(B1) Block
+                              Decorate 27(b1) DescriptorSet 0
+                              Decorate 45 ArrayStride 16
+                              MemberDecorate 46(S) 0 Offset 0
+                              MemberDecorate 46(S) 1 Offset 4
+                              MemberDecorate 46(S) 2 Offset 8
+                              Decorate 47 ArrayStride 16
+                              Decorate 48 ArrayStride 16
+                              Decorate 49 ArrayStride 16
+                              MemberDecorate 50(B5) 0 Offset 0
+                              MemberDecorate 50(B5) 1 Offset 4
+                              MemberDecorate 50(B5) 2 Offset 8
+                              MemberDecorate 50(B5) 3 Offset 16
+                              MemberDecorate 50(B5) 4 Offset 48
+                              MemberDecorate 50(B5) 5 Offset 64
+                              MemberDecorate 50(B5) 6 Offset 96
+                              MemberDecorate 50(B5) 7 Offset 1696
+                              Decorate 50(B5) Block
+                              Decorate 52(b5) DescriptorSet 0
+                              MemberDecorate 88(S2) 0 ColMajor
+                              MemberDecorate 88(S2) 0 Offset 0
+                              MemberDecorate 88(S2) 0 MatrixStride 16
+                              MemberDecorate 88(S2) 1 Offset 64
+                              MemberDecorate 88(S2) 2 Offset 68
+                              MemberDecorate 89(S3) 0 Offset 0
+                              MemberDecorate 90(B4) 0 Offset 0
+                              MemberDecorate 90(B4) 1 Offset 80
+                              Decorate 90(B4) BufferBlock
+                              Decorate 92(b4) DescriptorSet 0
+                              MemberDecorate 93(S2) 0 RowMajor
+                              MemberDecorate 93(S2) 0 Offset 0
+                              MemberDecorate 93(S2) 0 MatrixStride 16
+                              MemberDecorate 93(S2) 1 Offset 64
+                              MemberDecorate 93(S2) 2 Offset 68
+                              MemberDecorate 94(B3) 0 Offset 0
+                              Decorate 94(B3) BufferBlock
+                              Decorate 96(b3) DescriptorSet 0
+               2:             TypeVoid
+               3:             TypeFunction 2
+               6:             TypeFloat 16
+               7:             TypeVector 6(float16_t) 2
+               8:             TypeVector 6(float16_t) 3
+               9:             TypeInt 32 0
+              10:      9(int) Constant 2
+              11:             TypeArray 6(float16_t) 10
+           12(S):             TypeStruct 6(float16_t) 7(f16vec2) 8(f16vec3)
+              13:             TypeArray 12(S) 10
+              14:      9(int) Constant 100
+              15:             TypeArray 7(f16vec2) 14
+              16:             TypeRuntimeArray 6(float16_t)
+          17(B2):             TypeStruct 6(float16_t) 7(f16vec2) 8(f16vec3) 11 12(S) 13 15 16
+              18:             TypePointer Uniform 17(B2)
+          19(b2):     18(ptr) Variable Uniform
+              20:             TypeInt 32 1
+              21:     20(int) Constant 0
+              22:             TypeArray 6(float16_t) 10
+           23(S):             TypeStruct 6(float16_t) 7(f16vec2) 8(f16vec3)
+              24:             TypeArray 23(S) 10
+          25(B1):             TypeStruct 6(float16_t) 7(f16vec2) 8(f16vec3) 22 23(S) 24 20(int)
+              26:             TypePointer Uniform 25(B1)
+          27(b1):     26(ptr) Variable Uniform
+              28:             TypePointer Uniform 6(float16_t)
+              32:     20(int) Constant 1
+              33:     20(int) Constant 2
+              34:             TypePointer Uniform 8(f16vec3)
+              37:             TypeFloat 32
+              38:             TypeVector 37(float) 3
+              40:             TypeVector 37(float) 2
+              43:             TypePointer Uniform 7(f16vec2)
+              45:             TypeArray 6(float16_t) 10
+           46(S):             TypeStruct 6(float16_t) 7(f16vec2) 8(f16vec3)
+              47:             TypeArray 46(S) 10
+              48:             TypeArray 7(f16vec2) 14
+              49:             TypeArray 6(float16_t) 14
+          50(B5):             TypeStruct 6(float16_t) 7(f16vec2) 8(f16vec3) 45 46(S) 47 48 49
+              51:             TypePointer Uniform 50(B5)
+          52(b5):     51(ptr) Variable Uniform
+              59:     20(int) Constant 3
+              69:             TypePointer Function 37(float)
+              74:             TypeVector 37(float) 4
+              75:             TypePointer Function 74(fvec4)
+              83:   37(float) Constant 1065353216
+              87:             TypeMatrix 74(fvec4) 4
+          88(S2):             TypeStruct 87 6(float16_t) 37(float)
+          89(S3):             TypeStruct 88(S2)
+          90(B4):             TypeStruct 88(S2) 89(S3)
+              91:             TypePointer Uniform 90(B4)
+          92(b4):     91(ptr) Variable Uniform
+          93(S2):             TypeStruct 87 6(float16_t) 37(float)
+          94(B3):             TypeStruct 93(S2)
+              95:             TypePointer Uniform 94(B3)
+          96(b3):     95(ptr) Variable Uniform
+              97:             TypePointer Uniform 87
+             104:      9(int) Constant 0
+             108:     20(int) Constant 5
+             112:             TypePointer Function 38(fvec3)
+             114:     20(int) Constant 7
+             115:     20(int) Constant 6
+             116:             TypePointer Uniform 20(int)
+             166:   37(float) Constant 1073741824
+             167:   40(fvec2) ConstantComposite 83 166
+             170:   37(float) Constant 1077936128
+         4(main):           2 Function None 3
+               5:             Label
+          70(x0):     69(ptr) Variable Function
+          76(x1):     75(ptr) Variable Function
+         113(v3):    112(ptr) Variable Function
+         135(u3):    112(ptr) Variable Function
+              29:     28(ptr) AccessChain 27(b1) 21
+              30:6(float16_t) Load 29
+              31:     28(ptr) AccessChain 19(b2) 21
+                              Store 31 30
+              35:     34(ptr) AccessChain 19(b2) 33
+              36:  8(f16vec3) Load 35
+              39:   38(fvec3) FConvert 36
+              41:   40(fvec2) VectorShuffle 39 39 0 1
+              42:  7(f16vec2) FConvert 41
+              44:     43(ptr) AccessChain 19(b2) 32
+                              Store 44 42
+              53:     34(ptr) AccessChain 52(b5) 33
+              54:  8(f16vec3) Load 53
+              55:   38(fvec3) FConvert 54
+              56:   40(fvec2) VectorShuffle 55 55 0 1
+              57:  7(f16vec2) FConvert 56
+              58:     43(ptr) AccessChain 19(b2) 32
+                              Store 58 57
+              60:     28(ptr) AccessChain 19(b2) 59 21
+              61:6(float16_t) Load 60
+              62:     28(ptr) AccessChain 19(b2) 59 21
+                              Store 62 61
+              63:     28(ptr) AccessChain 52(b5) 59 32
+              64:6(float16_t) Load 63
+              65:     28(ptr) AccessChain 19(b2) 59 32
+                              Store 65 64
+              66:     43(ptr) AccessChain 19(b2) 32
+              67:  7(f16vec2) Load 66
+              68:     43(ptr) AccessChain 19(b2) 32
+                              Store 68 67
+              71:     28(ptr) AccessChain 27(b1) 21
+              72:6(float16_t) Load 71
+              73:   37(float) FConvert 72
+                              Store 70(x0) 73
+              77:     28(ptr) AccessChain 27(b1) 21
+              78:6(float16_t) Load 77
+              79:   37(float) FConvert 78
+              80:     43(ptr) AccessChain 19(b2) 32
+              81:  7(f16vec2) Load 80
+              82:   40(fvec2) FConvert 81
+              84:   37(float) CompositeExtract 82 0
+              85:   37(float) CompositeExtract 82 1
+              86:   74(fvec4) CompositeConstruct 79 84 85 83
+                              Store 76(x1) 86
+              98:     97(ptr) AccessChain 96(b3) 21 21
+              99:          87 Load 98
+             100:     97(ptr) AccessChain 92(b4) 21 21
+                              Store 100 99
+             101:     43(ptr) AccessChain 19(b2) 32
+             102:  7(f16vec2) Load 101
+             103:   40(fvec2) FConvert 102
+             105:   37(float) CompositeExtract 103 0
+             106:6(float16_t) FConvert 105
+             107:     28(ptr) AccessChain 19(b2) 21
+                              Store 107 106
+             109:     43(ptr) AccessChain 19(b2) 108 32 32
+             110:  7(f16vec2) Load 109
+             111:     43(ptr) AccessChain 19(b2) 32
+                              Store 111 110
+             117:    116(ptr) AccessChain 27(b1) 115
+             118:     20(int) Load 117
+             119:     28(ptr) AccessChain 19(b2) 114 118
+             120:6(float16_t) Load 119
+             121:   37(float) FConvert 120
+             122:    116(ptr) AccessChain 27(b1) 115
+             123:     20(int) Load 122
+             124:     20(int) IAdd 123 32
+             125:     28(ptr) AccessChain 19(b2) 114 124
+             126:6(float16_t) Load 125
+             127:   37(float) FConvert 126
+             128:    116(ptr) AccessChain 27(b1) 115
+             129:     20(int) Load 128
+             130:     20(int) IAdd 129 33
+             131:     28(ptr) AccessChain 19(b2) 114 130
+             132:6(float16_t) Load 131
+             133:   37(float) FConvert 132
+             134:   38(fvec3) CompositeConstruct 121 127 133
+                              Store 113(v3) 134
+             136:    116(ptr) AccessChain 27(b1) 115
+             137:     20(int) Load 136
+             138:     28(ptr) AccessChain 52(b5) 114 137
+             139:6(float16_t) Load 138
+             140:   37(float) FConvert 139
+             141:    116(ptr) AccessChain 27(b1) 115
+             142:     20(int) Load 141
+             143:     20(int) IAdd 142 32
+             144:     28(ptr) AccessChain 52(b5) 114 143
+             145:6(float16_t) Load 144
+             146:   37(float) FConvert 145
+             147:    116(ptr) AccessChain 27(b1) 115
+             148:     20(int) Load 147
+             149:     20(int) IAdd 148 33
+             150:     28(ptr) AccessChain 52(b5) 114 149
+             151:6(float16_t) Load 150
+             152:   37(float) FConvert 151
+             153:   38(fvec3) CompositeConstruct 140 146 152
+                              Store 135(u3) 153
+             154:     43(ptr) AccessChain 19(b2) 115 21
+             155:  7(f16vec2) Load 154
+             156:     43(ptr) AccessChain 19(b2) 115 21
+                              Store 156 155
+             157:     43(ptr) AccessChain 52(b5) 115 32
+             158:  7(f16vec2) Load 157
+             159:     43(ptr) AccessChain 19(b2) 115 32
+                              Store 159 158
+             160:     28(ptr) AccessChain 27(b1) 21
+             161:6(float16_t) Load 160
+             162:     28(ptr) AccessChain 19(b2) 32 104
+                              Store 162 161
+             163:     28(ptr) AccessChain 19(b2) 32 104
+             164:6(float16_t) Load 163
+             165:     28(ptr) AccessChain 19(b2) 21
+                              Store 165 164
+             168:  7(f16vec2) FConvert 167
+             169:     43(ptr) AccessChain 19(b2) 32
+                              Store 169 168
+             171:6(float16_t) FConvert 170
+             172:     28(ptr) AccessChain 19(b2) 21
+                              Store 172 171
+                              Return
+                              FunctionEnd
diff --git a/Test/baseResults/spv.16bitstorage_Error-int.frag.out b/Test/baseResults/spv.16bitstorage_Error-int.frag.out
new file mode 100755
index 0000000..4055258
--- /dev/null
+++ b/Test/baseResults/spv.16bitstorage_Error-int.frag.out
@@ -0,0 +1,91 @@
+spv.16bitstorage_Error-int.frag
+ERROR: 0:54: 'structure: (u)int16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:58: 'return: can't use with structs containing int16' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:61: 'int16_t: (u)int16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:74: '[: does not operate on types containing (u)int16' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:75: '.: can't swizzle types containing (u)int16' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:76: 'built-in function: (u)int16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:76: 'built-in function: (u)int16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:76: 'built-in function: (u)int16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:77: 'built-in function: (u)int16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:77: 'built-in function: (u)int16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:78: '+' :  wrong operand types: no operation '+' exists that takes a left-hand operand of type 'layout( column_major std140 offset=0) uniform int16_t' and a right operand of type 'layout( column_major std140 offset=0) uniform int16_t' (or there is no acceptable conversion)
+ERROR: 0:79: '-' :  wrong operand type no operation '-' exists that takes an operand of type layout( column_major std140 offset=0) uniform int16_t (or there is no acceptable conversion)
+ERROR: 0:80: '+' :  wrong operand types: no operation '+' exists that takes a left-hand operand of type 'layout( column_major std140 offset=0) uniform int16_t' and a right operand of type ' const int' (or there is no acceptable conversion)
+ERROR: 0:81: '.: can't swizzle types containing (u)int16' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:82: '=: can't use with structs containing int16' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:83: 'qualifier: (u)int16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:84: 'qualifier: (u)int16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:85: 'qualifier: (u)int16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:86: '==' :  wrong operand types: no operation '==' exists that takes a left-hand operand of type 'layout( column_major std140 offset=0) uniform int16_t' and a right operand of type 'layout( column_major std140 offset=0) uniform int16_t' (or there is no acceptable conversion)
+ERROR: 0:87: '=: can't use with arrays containing int16' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:88: 'constructor: 16-bit vectors only take vector types' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:89: 'constructor: 16-bit arrays not supported' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:89: 'constructor: 16-bit vectors only take vector types' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:92: 'constructor: can't construct structure containing 16-bit type' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:93: 'func2' : no matching overloaded function found 
+ERROR: 0:99: '' :  syntax error, unexpected IDENTIFIER
+ERROR: 26 compilation errors.  No code generated.
+
+
+SPIR-V is not generated for failed compile or link
diff --git a/Test/baseResults/spv.16bitstorage_Error-uint.frag.out b/Test/baseResults/spv.16bitstorage_Error-uint.frag.out
new file mode 100755
index 0000000..bff46d4
--- /dev/null
+++ b/Test/baseResults/spv.16bitstorage_Error-uint.frag.out
@@ -0,0 +1,91 @@
+spv.16bitstorage_Error-uint.frag
+ERROR: 0:54: 'structure: (u)int16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:58: 'return: can't use with structs containing uint16' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:61: 'uint16_t: (u)int16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:74: '[: does not operate on types containing (u)int16' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:75: '.: can't swizzle types containing (u)int16' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:76: 'built-in function: (u)int16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:76: 'built-in function: (u)int16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:76: 'built-in function: (u)int16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:77: 'built-in function: (u)int16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:77: 'built-in function: (u)int16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:78: '+' :  wrong operand types: no operation '+' exists that takes a left-hand operand of type 'layout( column_major std140 offset=0) uniform uint16_t' and a right operand of type 'layout( column_major std140 offset=0) uniform uint16_t' (or there is no acceptable conversion)
+ERROR: 0:79: '-' :  wrong operand type no operation '-' exists that takes an operand of type layout( column_major std140 offset=0) uniform uint16_t (or there is no acceptable conversion)
+ERROR: 0:80: '+' :  wrong operand types: no operation '+' exists that takes a left-hand operand of type 'layout( column_major std140 offset=0) uniform uint16_t' and a right operand of type ' const int' (or there is no acceptable conversion)
+ERROR: 0:81: '.: can't swizzle types containing (u)int16' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:82: '=: can't use with structs containing uint16' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:83: 'qualifier: (u)int16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:84: 'qualifier: (u)int16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:85: 'qualifier: (u)int16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:86: '==' :  wrong operand types: no operation '==' exists that takes a left-hand operand of type 'layout( column_major std140 offset=0) uniform uint16_t' and a right operand of type 'layout( column_major std140 offset=0) uniform uint16_t' (or there is no acceptable conversion)
+ERROR: 0:87: '=: can't use with arrays containing uint16' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:88: 'constructor: 16-bit vectors only take vector types' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:89: 'constructor: 16-bit arrays not supported' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:89: 'constructor: 16-bit vectors only take vector types' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:92: 'constructor: can't construct structure containing 16-bit type' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_int16
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int16
+ERROR: 0:93: 'func2' : no matching overloaded function found 
+ERROR: 0:99: '' :  syntax error, unexpected IDENTIFIER
+ERROR: 26 compilation errors.  No code generated.
+
+
+SPIR-V is not generated for failed compile or link
diff --git a/Test/baseResults/spv.16bitstorage_Error.frag.out b/Test/baseResults/spv.16bitstorage_Error.frag.out
new file mode 100755
index 0000000..08c75e7
--- /dev/null
+++ b/Test/baseResults/spv.16bitstorage_Error.frag.out
@@ -0,0 +1,99 @@
+spv.16bitstorage_Error.frag
+ERROR: 0:54: 'structure: float16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_half_float
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_float16
+ERROR: 0:58: 'return: can't use with structs containing float16' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_half_float
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_float16
+ERROR: 0:61: 'float16_t: float16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_half_float
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_float16
+ERROR: 0:74: '[: does not operate on types containing float16' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_half_float
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_float16
+ERROR: 0:75: '.: can't swizzle types containing float16' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_half_float
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_float16
+ERROR: 0:76: 'built-in function: float16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_half_float
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_float16
+ERROR: 0:76: 'built-in function: float16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_half_float
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_float16
+ERROR: 0:76: 'built-in function: float16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_half_float
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_float16
+ERROR: 0:77: 'built-in function: float16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_half_float
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_float16
+ERROR: 0:77: 'built-in function: float16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_half_float
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_float16
+ERROR: 0:78: '+' :  wrong operand types: no operation '+' exists that takes a left-hand operand of type 'layout( column_major std140 offset=0) uniform float16_t' and a right operand of type 'layout( column_major std140 offset=0) uniform float16_t' (or there is no acceptable conversion)
+ERROR: 0:79: '-' :  wrong operand type no operation '-' exists that takes an operand of type layout( column_major std140 offset=0) uniform float16_t (or there is no acceptable conversion)
+ERROR: 0:80: '+' :  wrong operand types: no operation '+' exists that takes a left-hand operand of type 'layout( column_major std140 offset=0) uniform float16_t' and a right operand of type ' const float' (or there is no acceptable conversion)
+ERROR: 0:81: '.: can't swizzle types containing float16' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_half_float
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_float16
+ERROR: 0:82: '=: can't use with structs containing float16' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_half_float
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_float16
+ERROR: 0:83: 'qualifier: float16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_half_float
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_float16
+ERROR: 0:84: 'qualifier: float16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_half_float
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_float16
+ERROR: 0:85: 'qualifier: float16 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_half_float
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_float16
+ERROR: 0:86: '==' :  wrong operand types: no operation '==' exists that takes a left-hand operand of type 'layout( column_major std140 offset=0) uniform float16_t' and a right operand of type 'layout( column_major std140 offset=0) uniform float16_t' (or there is no acceptable conversion)
+ERROR: 0:87: '=: can't use with arrays containing float16' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_half_float
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_float16
+ERROR: 0:88: 'half floating-point suffix' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_half_float
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_float16
+ERROR: 0:88: 'half float literal' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_half_float
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_float16
+ERROR: 0:89: 'constructor: 16-bit vectors only take vector types' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_half_float
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_float16
+ERROR: 0:90: 'constructor: 16-bit arrays not supported' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_half_float
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_float16
+ERROR: 0:90: 'constructor: 16-bit vectors only take vector types' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_half_float
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_float16
+ERROR: 0:93: 'constructor: can't construct structure containing 16-bit type' : required extension not requested: Possible extensions include:
+GL_AMD_gpu_shader_half_float
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_float16
+ERROR: 0:94: 'func2' : no matching overloaded function found 
+ERROR: 0:100: '' :  syntax error, unexpected IDENTIFIER
+ERROR: 28 compilation errors.  No code generated.
+
+
+SPIR-V is not generated for failed compile or link
diff --git a/Test/baseResults/spv.300BuiltIns.vert.out b/Test/baseResults/spv.300BuiltIns.vert.out
index cead3fa..ee2c236 100755
--- a/Test/baseResults/spv.300BuiltIns.vert.out
+++ b/Test/baseResults/spv.300BuiltIns.vert.out
@@ -1,6 +1,6 @@
 spv.300BuiltIns.vert
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 42
 
                               Capability Shader
diff --git a/Test/baseResults/spv.300layout.frag.out b/Test/baseResults/spv.300layout.frag.out
index c931b40..10a6d00 100755
--- a/Test/baseResults/spv.300layout.frag.out
+++ b/Test/baseResults/spv.300layout.frag.out
@@ -1,6 +1,6 @@
 spv.300layout.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 37
 
                               Capability Shader
diff --git a/Test/baseResults/spv.300layout.vert.out b/Test/baseResults/spv.300layout.vert.out
index e47835e..0c0663e 100644
--- a/Test/baseResults/spv.300layout.vert.out
+++ b/Test/baseResults/spv.300layout.vert.out
@@ -1,6 +1,6 @@
 spv.300layout.vert
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 163
 
                               Capability Shader
diff --git a/Test/baseResults/spv.300layoutp.vert.out b/Test/baseResults/spv.300layoutp.vert.out
index 1a4cd7f..9c4201d 100755
--- a/Test/baseResults/spv.300layoutp.vert.out
+++ b/Test/baseResults/spv.300layoutp.vert.out
@@ -1,6 +1,6 @@
 spv.300layoutp.vert
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 115
 
                               Capability Shader
diff --git a/Test/baseResults/spv.310.bitcast.frag.out b/Test/baseResults/spv.310.bitcast.frag.out
index 5eb29ea..d7a244f 100755
--- a/Test/baseResults/spv.310.bitcast.frag.out
+++ b/Test/baseResults/spv.310.bitcast.frag.out
@@ -1,6 +1,6 @@
 spv.310.bitcast.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 153
 
                               Capability Shader
diff --git a/Test/baseResults/spv.310.comp.out b/Test/baseResults/spv.310.comp.out
index 68772e4..fd1309d 100644
--- a/Test/baseResults/spv.310.comp.out
+++ b/Test/baseResults/spv.310.comp.out
@@ -1,6 +1,6 @@
 spv.310.comp
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 71
 
                               Capability Shader
diff --git a/Test/baseResults/spv.330.geom.out b/Test/baseResults/spv.330.geom.out
index 5052e77..1ccbfb6 100644
--- a/Test/baseResults/spv.330.geom.out
+++ b/Test/baseResults/spv.330.geom.out
@@ -1,6 +1,6 @@
 spv.330.geom
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 32
 
                               Capability Geometry
diff --git a/Test/baseResults/spv.400.frag.out b/Test/baseResults/spv.400.frag.out
index b5c9b8e..9cb2c63 100644
--- a/Test/baseResults/spv.400.frag.out
+++ b/Test/baseResults/spv.400.frag.out
@@ -1,7 +1,7 @@
 spv.400.frag
 // Module Version 10000
-// Generated by (magic number): 80006
-// Id's are bound by 1115
+// Generated by (magic number): 80007
+// Id's are bound by 1118
 
                               Capability Shader
                               Capability Geometry
@@ -11,7 +11,7 @@
                               Capability SampledRect
                1:             ExtInstImport  "GLSL.std.450"
                               MemoryModel Logical GLSL450
-                              EntryPoint Fragment 4  "main" 13 1024 1030 1035 1047 1073 1094 1096 1102 1104 1113
+                              EntryPoint Fragment 4  "main" 13 1027 1033 1038 1050 1076 1097 1099 1105 1107 1116
                               ExecutionMode 4 OriginUpperLeft
                               Source GLSL 400
                               SourceExtension  "GL_ARB_separate_shader_objects"
@@ -28,41 +28,41 @@
                               Name 439  "bvec2v"
                               Name 448  "bvec3v"
                               Name 457  "bvec4v"
-                              Name 736  "dmat2v"
-                              Name 742  "dmat3v"
-                              Name 748  "dmat4v"
-                              Name 754  "dmat2x3v"
-                              Name 760  "dmat3x2v"
-                              Name 766  "dmat2x4v"
-                              Name 772  "dmat4x2v"
-                              Name 778  "dmat3x4v"
-                              Name 784  "dmat4x3v"
-                              Name 1016  "v"
-                              Name 1022  "arrayedSampler"
-                              Name 1024  "i"
-                              Name 1030  "c2D"
-                              Name 1035  "gl_ClipDistance"
-                              Name 1047  "uoutp"
-                              Name 1051  "samp2dr"
-                              Name 1073  "ioutp"
-                              Name 1077  "isamp2DA"
-                              Name 1094  "gl_FragCoord"
-                              Name 1096  "vl2"
-                              Name 1102  "uo"
-                              Name 1104  "u"
-                              Name 1112  "id"
-                              Name 1113  "gl_PrimitiveID"
+                              Name 739  "dmat2v"
+                              Name 745  "dmat3v"
+                              Name 751  "dmat4v"
+                              Name 757  "dmat2x3v"
+                              Name 763  "dmat3x2v"
+                              Name 769  "dmat2x4v"
+                              Name 775  "dmat4x2v"
+                              Name 781  "dmat3x4v"
+                              Name 787  "dmat4x3v"
+                              Name 1019  "v"
+                              Name 1025  "arrayedSampler"
+                              Name 1027  "i"
+                              Name 1033  "c2D"
+                              Name 1038  "gl_ClipDistance"
+                              Name 1050  "uoutp"
+                              Name 1054  "samp2dr"
+                              Name 1076  "ioutp"
+                              Name 1080  "isamp2DA"
+                              Name 1097  "gl_FragCoord"
+                              Name 1099  "vl2"
+                              Name 1105  "uo"
+                              Name 1107  "u"
+                              Name 1115  "id"
+                              Name 1116  "gl_PrimitiveID"
                               Decorate 17(u2drs) DescriptorSet 0
-                              Decorate 1022(arrayedSampler) DescriptorSet 0
-                              Decorate 1024(i) Flat
-                              Decorate 1035(gl_ClipDistance) BuiltIn ClipDistance
-                              Decorate 1051(samp2dr) DescriptorSet 0
-                              Decorate 1077(isamp2DA) DescriptorSet 0
-                              Decorate 1094(gl_FragCoord) BuiltIn FragCoord
-                              Decorate 1096(vl2) Location 6
-                              Decorate 1104(u) Flat
-                              Decorate 1113(gl_PrimitiveID) Flat
-                              Decorate 1113(gl_PrimitiveID) BuiltIn PrimitiveId
+                              Decorate 1025(arrayedSampler) DescriptorSet 0
+                              Decorate 1027(i) Flat
+                              Decorate 1038(gl_ClipDistance) BuiltIn ClipDistance
+                              Decorate 1054(samp2dr) DescriptorSet 0
+                              Decorate 1080(isamp2DA) DescriptorSet 0
+                              Decorate 1097(gl_FragCoord) BuiltIn FragCoord
+                              Decorate 1099(vl2) Location 6
+                              Decorate 1107(u) Flat
+                              Decorate 1116(gl_PrimitiveID) Flat
+                              Decorate 1116(gl_PrimitiveID) BuiltIn PrimitiveId
                2:             TypeVoid
                3:             TypeFunction 2
               10:             TypeFloat 32
@@ -109,144 +109,143 @@
              572:  437(bvec2) ConstantComposite 563 563
              581:  446(bvec3) ConstantComposite 563 563 563
              590:  455(bvec4) ConstantComposite 563 563 563 563
-             715:   10(float) Constant 1067869798
-             734:             TypeMatrix 43(f64vec2) 2
-             735:             TypePointer Function 734
-             740:             TypeMatrix 48(f64vec3) 3
-             741:             TypePointer Function 740
-             746:             TypeMatrix 53(f64vec4) 4
-             747:             TypePointer Function 746
-             752:             TypeMatrix 48(f64vec3) 2
-             753:             TypePointer Function 752
-             758:             TypeMatrix 43(f64vec2) 3
-             759:             TypePointer Function 758
-             764:             TypeMatrix 53(f64vec4) 2
-             765:             TypePointer Function 764
-             770:             TypeMatrix 43(f64vec2) 4
-             771:             TypePointer Function 770
-             776:             TypeMatrix 53(f64vec4) 3
-             777:             TypePointer Function 776
-             782:             TypeMatrix 48(f64vec3) 4
-             783:             TypePointer Function 782
-             951:     32(int) Constant 1
-             955:     32(int) Constant 2
-             959:     32(int) Constant 3
-             963:     23(int) Constant 1
-             967:     23(int) Constant 2
-             993:   10(float) Constant 1065353216
-            1015:             TypePointer Function 11(fvec4)
-            1017:             TypeImage 10(float) 2D sampled format:Unknown
-            1018:             TypeSampledImage 1017
-            1019:     32(int) Constant 5
-            1020:             TypeArray 1018 1019
-            1021:             TypePointer UniformConstant 1020
-1022(arrayedSampler):   1021(ptr) Variable UniformConstant
-            1023:             TypePointer Input 23(int)
-         1024(i):   1023(ptr) Variable Input
-            1026:             TypePointer UniformConstant 1018
-            1029:             TypePointer Input 20(fvec2)
-       1030(c2D):   1029(ptr) Variable Input
-            1033:             TypeArray 10(float) 955
-            1034:             TypePointer Input 1033
-1035(gl_ClipDistance):   1034(ptr) Variable Input
-            1036:             TypePointer Input 10(float)
-            1040:             TypeVector 10(float) 3
-            1045:             TypeVector 32(int) 4
-            1046:             TypePointer Output 1045(ivec4)
-     1047(uoutp):   1046(ptr) Variable Output
-            1048:             TypeImage 32(int) Rect sampled format:Unknown
-            1049:             TypeSampledImage 1048
-            1050:             TypePointer UniformConstant 1049
-   1051(samp2dr):   1050(ptr) Variable UniformConstant
-            1054:     32(int) Constant 4
-            1055:             TypeArray 24(ivec2) 1054
-            1056:   24(ivec2) ConstantComposite 963 967
-            1057:     23(int) Constant 15
-            1058:     23(int) Constant 16
-            1059:   24(ivec2) ConstantComposite 1057 1058
-            1060:     23(int) Constant 4294967294
-            1061:     23(int) Constant 0
+             737:             TypeMatrix 43(f64vec2) 2
+             738:             TypePointer Function 737
+             743:             TypeMatrix 48(f64vec3) 3
+             744:             TypePointer Function 743
+             749:             TypeMatrix 53(f64vec4) 4
+             750:             TypePointer Function 749
+             755:             TypeMatrix 48(f64vec3) 2
+             756:             TypePointer Function 755
+             761:             TypeMatrix 43(f64vec2) 3
+             762:             TypePointer Function 761
+             767:             TypeMatrix 53(f64vec4) 2
+             768:             TypePointer Function 767
+             773:             TypeMatrix 43(f64vec2) 4
+             774:             TypePointer Function 773
+             779:             TypeMatrix 53(f64vec4) 3
+             780:             TypePointer Function 779
+             785:             TypeMatrix 48(f64vec3) 4
+             786:             TypePointer Function 785
+             954:     32(int) Constant 1
+             958:     32(int) Constant 2
+             962:     32(int) Constant 3
+             966:     23(int) Constant 1
+             970:     23(int) Constant 2
+             996:   10(float) Constant 1065353216
+            1018:             TypePointer Function 11(fvec4)
+            1020:             TypeImage 10(float) 2D sampled format:Unknown
+            1021:             TypeSampledImage 1020
+            1022:     32(int) Constant 5
+            1023:             TypeArray 1021 1022
+            1024:             TypePointer UniformConstant 1023
+1025(arrayedSampler):   1024(ptr) Variable UniformConstant
+            1026:             TypePointer Input 23(int)
+         1027(i):   1026(ptr) Variable Input
+            1029:             TypePointer UniformConstant 1021
+            1032:             TypePointer Input 20(fvec2)
+       1033(c2D):   1032(ptr) Variable Input
+            1036:             TypeArray 10(float) 958
+            1037:             TypePointer Input 1036
+1038(gl_ClipDistance):   1037(ptr) Variable Input
+            1039:             TypePointer Input 10(float)
+            1043:             TypeVector 10(float) 3
+            1048:             TypeVector 32(int) 4
+            1049:             TypePointer Output 1048(ivec4)
+     1050(uoutp):   1049(ptr) Variable Output
+            1051:             TypeImage 32(int) Rect sampled format:Unknown
+            1052:             TypeSampledImage 1051
+            1053:             TypePointer UniformConstant 1052
+   1054(samp2dr):   1053(ptr) Variable UniformConstant
+            1057:     32(int) Constant 4
+            1058:             TypeArray 24(ivec2) 1057
+            1059:   24(ivec2) ConstantComposite 966 970
+            1060:     23(int) Constant 15
+            1061:     23(int) Constant 16
             1062:   24(ivec2) ConstantComposite 1060 1061
-            1063:        1055 ConstantComposite 1056 27 1059 1062
-            1071:             TypeVector 23(int) 4
-            1072:             TypePointer Output 1071(ivec4)
-     1073(ioutp):   1072(ptr) Variable Output
-            1074:             TypeImage 23(int) 2D array sampled format:Unknown
-            1075:             TypeSampledImage 1074
-            1076:             TypePointer UniformConstant 1075
-  1077(isamp2DA):   1076(ptr) Variable UniformConstant
-            1079:   10(float) Constant 1036831949
-            1080: 1040(fvec3) ConstantComposite 1079 1079 1079
-            1081:   24(ivec2) ConstantComposite 963 963
-            1093:             TypePointer Input 11(fvec4)
-1094(gl_FragCoord):   1093(ptr) Variable Input
-       1096(vl2):   1093(ptr) Variable Input
-            1101:             TypePointer Output 32(int)
-        1102(uo):   1101(ptr) Variable Output
-            1103:             TypePointer Input 32(int)
-         1104(u):   1103(ptr) Variable Input
-            1111:             TypePointer Function 23(int)
-1113(gl_PrimitiveID):   1023(ptr) Variable Input
+            1063:     23(int) Constant 4294967294
+            1064:     23(int) Constant 0
+            1065:   24(ivec2) ConstantComposite 1063 1064
+            1066:        1058 ConstantComposite 1059 27 1062 1065
+            1074:             TypeVector 23(int) 4
+            1075:             TypePointer Output 1074(ivec4)
+     1076(ioutp):   1075(ptr) Variable Output
+            1077:             TypeImage 23(int) 2D array sampled format:Unknown
+            1078:             TypeSampledImage 1077
+            1079:             TypePointer UniformConstant 1078
+  1080(isamp2DA):   1079(ptr) Variable UniformConstant
+            1082:   10(float) Constant 1036831949
+            1083: 1043(fvec3) ConstantComposite 1082 1082 1082
+            1084:   24(ivec2) ConstantComposite 966 966
+            1096:             TypePointer Input 11(fvec4)
+1097(gl_FragCoord):   1096(ptr) Variable Input
+       1099(vl2):   1096(ptr) Variable Input
+            1104:             TypePointer Output 32(int)
+        1105(uo):   1104(ptr) Variable Output
+            1106:             TypePointer Input 32(int)
+         1107(u):   1106(ptr) Variable Input
+            1114:             TypePointer Function 23(int)
+1116(gl_PrimitiveID):   1026(ptr) Variable Input
          4(main):           2 Function None 3
                5:             Label
-         1016(v):   1015(ptr) Variable Function
-        1112(id):   1111(ptr) Variable Function
-            1025:     23(int) Load 1024(i)
-            1027:   1026(ptr) AccessChain 1022(arrayedSampler) 1025
-            1028:        1018 Load 1027
-            1031:   20(fvec2) Load 1030(c2D)
-            1032:   11(fvec4) ImageSampleImplicitLod 1028 1031
-                              Store 1016(v) 1032
-            1037:   1036(ptr) AccessChain 1035(gl_ClipDistance) 963
-            1038:   10(float) Load 1037
-            1039:     34(ptr) AccessChain 13(outp) 33
-                              Store 1039 1038
-            1041:   11(fvec4) Load 1016(v)
-            1042: 1040(fvec3) VectorShuffle 1041 1041 1 2 3
-            1043:   11(fvec4) Load 13(outp)
-            1044:   11(fvec4) VectorShuffle 1043 1042 0 4 5 6
-                              Store 13(outp) 1044
-            1052:        1049 Load 1051(samp2dr)
-            1053:   20(fvec2) Load 1030(c2D)
-            1064: 1045(ivec4) ImageGather 1052 1053 967 ConstOffsets 1063
-                              Store 1047(uoutp) 1064
-            1065:   1026(ptr) AccessChain 1022(arrayedSampler) 1061
-            1066:        1018 Load 1065
-            1067:   20(fvec2) Load 1030(c2D)
-            1068:   11(fvec4) ImageGather 1066 1067 1061
-            1069:   11(fvec4) Load 13(outp)
-            1070:   11(fvec4) FAdd 1069 1068
-                              Store 13(outp) 1070
-            1078:        1075 Load 1077(isamp2DA)
-            1082: 1071(ivec4) ImageGather 1078 1080 25 ConstOffset 1081
-                              Store 1073(ioutp) 1082
-            1083:        1075 Load 1077(isamp2DA)
-            1084: 1071(ivec4) ImageGather 1083 1080 25 ConstOffset 1081
-            1085: 1071(ivec4) Load 1073(ioutp)
-            1086: 1071(ivec4) IAdd 1085 1084
-                              Store 1073(ioutp) 1086
-            1087:        1075 Load 1077(isamp2DA)
-            1088:     23(int) Load 1024(i)
-            1089:   24(ivec2) CompositeConstruct 1088 1088
-            1090: 1071(ivec4) ImageGather 1087 1080 1061 Offset 1089
-            1091: 1071(ivec4) Load 1073(ioutp)
-            1092: 1071(ivec4) IAdd 1091 1090
-                              Store 1073(ioutp) 1092
-            1095:   11(fvec4) Load 1094(gl_FragCoord)
-            1097:   11(fvec4) Load 1096(vl2)
-            1098:   11(fvec4) FAdd 1095 1097
-            1099:   11(fvec4) Load 13(outp)
-            1100:   11(fvec4) FAdd 1099 1098
-                              Store 13(outp) 1100
-            1105:     32(int) Load 1104(u)
-            1106:     23(int) Load 1024(i)
-            1107:     32(int) Bitcast 1106
-            1108:     32(int) UMod 1105 1107
-                              Store 1102(uo) 1108
-            1109:           2 FunctionCall 6(foo23()
-            1110:           2 FunctionCall 8(doubles()
-            1114:     23(int) Load 1113(gl_PrimitiveID)
-                              Store 1112(id) 1114
+         1019(v):   1018(ptr) Variable Function
+        1115(id):   1114(ptr) Variable Function
+            1028:     23(int) Load 1027(i)
+            1030:   1029(ptr) AccessChain 1025(arrayedSampler) 1028
+            1031:        1021 Load 1030
+            1034:   20(fvec2) Load 1033(c2D)
+            1035:   11(fvec4) ImageSampleImplicitLod 1031 1034
+                              Store 1019(v) 1035
+            1040:   1039(ptr) AccessChain 1038(gl_ClipDistance) 966
+            1041:   10(float) Load 1040
+            1042:     34(ptr) AccessChain 13(outp) 33
+                              Store 1042 1041
+            1044:   11(fvec4) Load 1019(v)
+            1045: 1043(fvec3) VectorShuffle 1044 1044 1 2 3
+            1046:   11(fvec4) Load 13(outp)
+            1047:   11(fvec4) VectorShuffle 1046 1045 0 4 5 6
+                              Store 13(outp) 1047
+            1055:        1052 Load 1054(samp2dr)
+            1056:   20(fvec2) Load 1033(c2D)
+            1067: 1048(ivec4) ImageGather 1055 1056 970 ConstOffsets 1066
+                              Store 1050(uoutp) 1067
+            1068:   1029(ptr) AccessChain 1025(arrayedSampler) 1064
+            1069:        1021 Load 1068
+            1070:   20(fvec2) Load 1033(c2D)
+            1071:   11(fvec4) ImageGather 1069 1070 1064
+            1072:   11(fvec4) Load 13(outp)
+            1073:   11(fvec4) FAdd 1072 1071
+                              Store 13(outp) 1073
+            1081:        1078 Load 1080(isamp2DA)
+            1085: 1074(ivec4) ImageGather 1081 1083 25 ConstOffset 1084
+                              Store 1076(ioutp) 1085
+            1086:        1078 Load 1080(isamp2DA)
+            1087: 1074(ivec4) ImageGather 1086 1083 25 ConstOffset 1084
+            1088: 1074(ivec4) Load 1076(ioutp)
+            1089: 1074(ivec4) IAdd 1088 1087
+                              Store 1076(ioutp) 1089
+            1090:        1078 Load 1080(isamp2DA)
+            1091:     23(int) Load 1027(i)
+            1092:   24(ivec2) CompositeConstruct 1091 1091
+            1093: 1074(ivec4) ImageGather 1090 1083 1064 Offset 1092
+            1094: 1074(ivec4) Load 1076(ioutp)
+            1095: 1074(ivec4) IAdd 1094 1093
+                              Store 1076(ioutp) 1095
+            1098:   11(fvec4) Load 1097(gl_FragCoord)
+            1100:   11(fvec4) Load 1099(vl2)
+            1101:   11(fvec4) FAdd 1098 1100
+            1102:   11(fvec4) Load 13(outp)
+            1103:   11(fvec4) FAdd 1102 1101
+                              Store 13(outp) 1103
+            1108:     32(int) Load 1107(u)
+            1109:     23(int) Load 1027(i)
+            1110:     32(int) Bitcast 1109
+            1111:     32(int) UMod 1108 1110
+                              Store 1105(uo) 1111
+            1112:           2 FunctionCall 6(foo23()
+            1113:           2 FunctionCall 8(doubles()
+            1117:     23(int) Load 1116(gl_PrimitiveID)
+                              Store 1115(id) 1117
                               Return
                               FunctionEnd
        6(foo23():           2 Function None 3
@@ -278,15 +277,15 @@
              566:    438(ptr) Variable Function
              575:    447(ptr) Variable Function
              584:    456(ptr) Variable Function
-     736(dmat2v):    735(ptr) Variable Function
-     742(dmat3v):    741(ptr) Variable Function
-     748(dmat4v):    747(ptr) Variable Function
-   754(dmat2x3v):    753(ptr) Variable Function
-   760(dmat3x2v):    759(ptr) Variable Function
-   766(dmat2x4v):    765(ptr) Variable Function
-   772(dmat4x2v):    771(ptr) Variable Function
-   778(dmat3x4v):    777(ptr) Variable Function
-   784(dmat4x3v):    783(ptr) Variable Function
+     739(dmat2v):    738(ptr) Variable Function
+     745(dmat3v):    744(ptr) Variable Function
+     751(dmat4v):    750(ptr) Variable Function
+   757(dmat2x3v):    756(ptr) Variable Function
+   763(dmat3x2v):    762(ptr) Variable Function
+   769(dmat2x4v):    768(ptr) Variable Function
+   775(dmat4x2v):    774(ptr) Variable Function
+   781(dmat3x4v):    780(ptr) Variable Function
+   787(dmat4x3v):    786(ptr) Variable Function
                               Store 41(doublev) 42
                               Store 45(dvec2v) 47
                               Store 50(dvec3v) 52
@@ -1080,309 +1079,313 @@
                               Store 55(dvec4v) 712
              713:39(float64_t) Load 41(doublev)
              714:39(float64_t) Load 41(doublev)
+             715:39(float64_t) Load 41(doublev)
              716:39(float64_t) ExtInst 1(GLSL.std.450) 72(Refract) 713 714 715
              717:39(float64_t) Load 41(doublev)
              718:39(float64_t) FAdd 717 716
                               Store 41(doublev) 718
              719: 43(f64vec2) Load 45(dvec2v)
              720: 43(f64vec2) Load 45(dvec2v)
-             721: 43(f64vec2) ExtInst 1(GLSL.std.450) 72(Refract) 719 720 715
-             722: 43(f64vec2) Load 45(dvec2v)
-             723: 43(f64vec2) FAdd 722 721
-                              Store 45(dvec2v) 723
-             724: 48(f64vec3) Load 50(dvec3v)
+             721:39(float64_t) Load 41(doublev)
+             722: 43(f64vec2) ExtInst 1(GLSL.std.450) 72(Refract) 719 720 721
+             723: 43(f64vec2) Load 45(dvec2v)
+             724: 43(f64vec2) FAdd 723 722
+                              Store 45(dvec2v) 724
              725: 48(f64vec3) Load 50(dvec3v)
-             726: 48(f64vec3) ExtInst 1(GLSL.std.450) 72(Refract) 724 725 715
-             727: 48(f64vec3) Load 50(dvec3v)
-             728: 48(f64vec3) FAdd 727 726
-                              Store 50(dvec3v) 728
-             729: 53(f64vec4) Load 55(dvec4v)
-             730: 53(f64vec4) Load 55(dvec4v)
-             731: 53(f64vec4) ExtInst 1(GLSL.std.450) 72(Refract) 729 730 715
+             726: 48(f64vec3) Load 50(dvec3v)
+             727:39(float64_t) Load 41(doublev)
+             728: 48(f64vec3) ExtInst 1(GLSL.std.450) 72(Refract) 725 726 727
+             729: 48(f64vec3) Load 50(dvec3v)
+             730: 48(f64vec3) FAdd 729 728
+                              Store 50(dvec3v) 730
+             731: 53(f64vec4) Load 55(dvec4v)
              732: 53(f64vec4) Load 55(dvec4v)
-             733: 53(f64vec4) FAdd 732 731
-                              Store 55(dvec4v) 733
-             737: 43(f64vec2) Load 45(dvec2v)
-             738: 43(f64vec2) Load 45(dvec2v)
-             739:         734 OuterProduct 737 738
-                              Store 736(dmat2v) 739
-             743: 48(f64vec3) Load 50(dvec3v)
-             744: 48(f64vec3) Load 50(dvec3v)
-             745:         740 OuterProduct 743 744
-                              Store 742(dmat3v) 745
-             749: 53(f64vec4) Load 55(dvec4v)
-             750: 53(f64vec4) Load 55(dvec4v)
-             751:         746 OuterProduct 749 750
-                              Store 748(dmat4v) 751
-             755: 48(f64vec3) Load 50(dvec3v)
-             756: 43(f64vec2) Load 45(dvec2v)
-             757:         752 OuterProduct 755 756
-                              Store 754(dmat2x3v) 757
-             761: 43(f64vec2) Load 45(dvec2v)
-             762: 48(f64vec3) Load 50(dvec3v)
-             763:         758 OuterProduct 761 762
-                              Store 760(dmat3x2v) 763
-             767: 53(f64vec4) Load 55(dvec4v)
-             768: 43(f64vec2) Load 45(dvec2v)
-             769:         764 OuterProduct 767 768
-                              Store 766(dmat2x4v) 769
-             773: 43(f64vec2) Load 45(dvec2v)
-             774: 53(f64vec4) Load 55(dvec4v)
-             775:         770 OuterProduct 773 774
-                              Store 772(dmat4x2v) 775
-             779: 53(f64vec4) Load 55(dvec4v)
-             780: 48(f64vec3) Load 50(dvec3v)
-             781:         776 OuterProduct 779 780
-                              Store 778(dmat3x4v) 781
-             785: 48(f64vec3) Load 50(dvec3v)
-             786: 53(f64vec4) Load 55(dvec4v)
-             787:         782 OuterProduct 785 786
-                              Store 784(dmat4x3v) 787
-             788:         734 Load 736(dmat2v)
-             789:         734 Load 736(dmat2v)
-             790: 43(f64vec2) CompositeExtract 788 0
-             791: 43(f64vec2) CompositeExtract 789 0
-             792: 43(f64vec2) FMul 790 791
-             793: 43(f64vec2) CompositeExtract 788 1
-             794: 43(f64vec2) CompositeExtract 789 1
+             733:39(float64_t) Load 41(doublev)
+             734: 53(f64vec4) ExtInst 1(GLSL.std.450) 72(Refract) 731 732 733
+             735: 53(f64vec4) Load 55(dvec4v)
+             736: 53(f64vec4) FAdd 735 734
+                              Store 55(dvec4v) 736
+             740: 43(f64vec2) Load 45(dvec2v)
+             741: 43(f64vec2) Load 45(dvec2v)
+             742:         737 OuterProduct 740 741
+                              Store 739(dmat2v) 742
+             746: 48(f64vec3) Load 50(dvec3v)
+             747: 48(f64vec3) Load 50(dvec3v)
+             748:         743 OuterProduct 746 747
+                              Store 745(dmat3v) 748
+             752: 53(f64vec4) Load 55(dvec4v)
+             753: 53(f64vec4) Load 55(dvec4v)
+             754:         749 OuterProduct 752 753
+                              Store 751(dmat4v) 754
+             758: 48(f64vec3) Load 50(dvec3v)
+             759: 43(f64vec2) Load 45(dvec2v)
+             760:         755 OuterProduct 758 759
+                              Store 757(dmat2x3v) 760
+             764: 43(f64vec2) Load 45(dvec2v)
+             765: 48(f64vec3) Load 50(dvec3v)
+             766:         761 OuterProduct 764 765
+                              Store 763(dmat3x2v) 766
+             770: 53(f64vec4) Load 55(dvec4v)
+             771: 43(f64vec2) Load 45(dvec2v)
+             772:         767 OuterProduct 770 771
+                              Store 769(dmat2x4v) 772
+             776: 43(f64vec2) Load 45(dvec2v)
+             777: 53(f64vec4) Load 55(dvec4v)
+             778:         773 OuterProduct 776 777
+                              Store 775(dmat4x2v) 778
+             782: 53(f64vec4) Load 55(dvec4v)
+             783: 48(f64vec3) Load 50(dvec3v)
+             784:         779 OuterProduct 782 783
+                              Store 781(dmat3x4v) 784
+             788: 48(f64vec3) Load 50(dvec3v)
+             789: 53(f64vec4) Load 55(dvec4v)
+             790:         785 OuterProduct 788 789
+                              Store 787(dmat4x3v) 790
+             791:         737 Load 739(dmat2v)
+             792:         737 Load 739(dmat2v)
+             793: 43(f64vec2) CompositeExtract 791 0
+             794: 43(f64vec2) CompositeExtract 792 0
              795: 43(f64vec2) FMul 793 794
-             796:         734 CompositeConstruct 792 795
-             797:         734 Load 736(dmat2v)
-             798:         734 MatrixTimesMatrix 797 796
-                              Store 736(dmat2v) 798
-             799:         740 Load 742(dmat3v)
-             800:         740 Load 742(dmat3v)
-             801: 48(f64vec3) CompositeExtract 799 0
-             802: 48(f64vec3) CompositeExtract 800 0
-             803: 48(f64vec3) FMul 801 802
-             804: 48(f64vec3) CompositeExtract 799 1
-             805: 48(f64vec3) CompositeExtract 800 1
+             796: 43(f64vec2) CompositeExtract 791 1
+             797: 43(f64vec2) CompositeExtract 792 1
+             798: 43(f64vec2) FMul 796 797
+             799:         737 CompositeConstruct 795 798
+             800:         737 Load 739(dmat2v)
+             801:         737 MatrixTimesMatrix 800 799
+                              Store 739(dmat2v) 801
+             802:         743 Load 745(dmat3v)
+             803:         743 Load 745(dmat3v)
+             804: 48(f64vec3) CompositeExtract 802 0
+             805: 48(f64vec3) CompositeExtract 803 0
              806: 48(f64vec3) FMul 804 805
-             807: 48(f64vec3) CompositeExtract 799 2
-             808: 48(f64vec3) CompositeExtract 800 2
+             807: 48(f64vec3) CompositeExtract 802 1
+             808: 48(f64vec3) CompositeExtract 803 1
              809: 48(f64vec3) FMul 807 808
-             810:         740 CompositeConstruct 803 806 809
-             811:         740 Load 742(dmat3v)
-             812:         740 MatrixTimesMatrix 811 810
-                              Store 742(dmat3v) 812
-             813:         746 Load 748(dmat4v)
-             814:         746 Load 748(dmat4v)
-             815: 53(f64vec4) CompositeExtract 813 0
-             816: 53(f64vec4) CompositeExtract 814 0
-             817: 53(f64vec4) FMul 815 816
-             818: 53(f64vec4) CompositeExtract 813 1
-             819: 53(f64vec4) CompositeExtract 814 1
+             810: 48(f64vec3) CompositeExtract 802 2
+             811: 48(f64vec3) CompositeExtract 803 2
+             812: 48(f64vec3) FMul 810 811
+             813:         743 CompositeConstruct 806 809 812
+             814:         743 Load 745(dmat3v)
+             815:         743 MatrixTimesMatrix 814 813
+                              Store 745(dmat3v) 815
+             816:         749 Load 751(dmat4v)
+             817:         749 Load 751(dmat4v)
+             818: 53(f64vec4) CompositeExtract 816 0
+             819: 53(f64vec4) CompositeExtract 817 0
              820: 53(f64vec4) FMul 818 819
-             821: 53(f64vec4) CompositeExtract 813 2
-             822: 53(f64vec4) CompositeExtract 814 2
+             821: 53(f64vec4) CompositeExtract 816 1
+             822: 53(f64vec4) CompositeExtract 817 1
              823: 53(f64vec4) FMul 821 822
-             824: 53(f64vec4) CompositeExtract 813 3
-             825: 53(f64vec4) CompositeExtract 814 3
+             824: 53(f64vec4) CompositeExtract 816 2
+             825: 53(f64vec4) CompositeExtract 817 2
              826: 53(f64vec4) FMul 824 825
-             827:         746 CompositeConstruct 817 820 823 826
-             828:         746 Load 748(dmat4v)
-             829:         746 MatrixTimesMatrix 828 827
-                              Store 748(dmat4v) 829
-             830:         752 Load 754(dmat2x3v)
-             831:         752 Load 754(dmat2x3v)
-             832: 48(f64vec3) CompositeExtract 830 0
-             833: 48(f64vec3) CompositeExtract 831 0
-             834: 48(f64vec3) FMul 832 833
-             835: 48(f64vec3) CompositeExtract 830 1
-             836: 48(f64vec3) CompositeExtract 831 1
+             827: 53(f64vec4) CompositeExtract 816 3
+             828: 53(f64vec4) CompositeExtract 817 3
+             829: 53(f64vec4) FMul 827 828
+             830:         749 CompositeConstruct 820 823 826 829
+             831:         749 Load 751(dmat4v)
+             832:         749 MatrixTimesMatrix 831 830
+                              Store 751(dmat4v) 832
+             833:         755 Load 757(dmat2x3v)
+             834:         755 Load 757(dmat2x3v)
+             835: 48(f64vec3) CompositeExtract 833 0
+             836: 48(f64vec3) CompositeExtract 834 0
              837: 48(f64vec3) FMul 835 836
-             838:         752 CompositeConstruct 834 837
-                              Store 754(dmat2x3v) 838
-             839:         764 Load 766(dmat2x4v)
-             840:         764 Load 766(dmat2x4v)
-             841: 53(f64vec4) CompositeExtract 839 0
-             842: 53(f64vec4) CompositeExtract 840 0
-             843: 53(f64vec4) FMul 841 842
-             844: 53(f64vec4) CompositeExtract 839 1
-             845: 53(f64vec4) CompositeExtract 840 1
+             838: 48(f64vec3) CompositeExtract 833 1
+             839: 48(f64vec3) CompositeExtract 834 1
+             840: 48(f64vec3) FMul 838 839
+             841:         755 CompositeConstruct 837 840
+                              Store 757(dmat2x3v) 841
+             842:         767 Load 769(dmat2x4v)
+             843:         767 Load 769(dmat2x4v)
+             844: 53(f64vec4) CompositeExtract 842 0
+             845: 53(f64vec4) CompositeExtract 843 0
              846: 53(f64vec4) FMul 844 845
-             847:         764 CompositeConstruct 843 846
-                              Store 766(dmat2x4v) 847
-             848:         758 Load 760(dmat3x2v)
-             849:         758 Load 760(dmat3x2v)
-             850: 43(f64vec2) CompositeExtract 848 0
-             851: 43(f64vec2) CompositeExtract 849 0
-             852: 43(f64vec2) FMul 850 851
-             853: 43(f64vec2) CompositeExtract 848 1
-             854: 43(f64vec2) CompositeExtract 849 1
+             847: 53(f64vec4) CompositeExtract 842 1
+             848: 53(f64vec4) CompositeExtract 843 1
+             849: 53(f64vec4) FMul 847 848
+             850:         767 CompositeConstruct 846 849
+                              Store 769(dmat2x4v) 850
+             851:         761 Load 763(dmat3x2v)
+             852:         761 Load 763(dmat3x2v)
+             853: 43(f64vec2) CompositeExtract 851 0
+             854: 43(f64vec2) CompositeExtract 852 0
              855: 43(f64vec2) FMul 853 854
-             856: 43(f64vec2) CompositeExtract 848 2
-             857: 43(f64vec2) CompositeExtract 849 2
+             856: 43(f64vec2) CompositeExtract 851 1
+             857: 43(f64vec2) CompositeExtract 852 1
              858: 43(f64vec2) FMul 856 857
-             859:         758 CompositeConstruct 852 855 858
-                              Store 760(dmat3x2v) 859
-             860:         776 Load 778(dmat3x4v)
-             861:         776 Load 778(dmat3x4v)
-             862: 53(f64vec4) CompositeExtract 860 0
-             863: 53(f64vec4) CompositeExtract 861 0
-             864: 53(f64vec4) FMul 862 863
-             865: 53(f64vec4) CompositeExtract 860 1
-             866: 53(f64vec4) CompositeExtract 861 1
+             859: 43(f64vec2) CompositeExtract 851 2
+             860: 43(f64vec2) CompositeExtract 852 2
+             861: 43(f64vec2) FMul 859 860
+             862:         761 CompositeConstruct 855 858 861
+                              Store 763(dmat3x2v) 862
+             863:         779 Load 781(dmat3x4v)
+             864:         779 Load 781(dmat3x4v)
+             865: 53(f64vec4) CompositeExtract 863 0
+             866: 53(f64vec4) CompositeExtract 864 0
              867: 53(f64vec4) FMul 865 866
-             868: 53(f64vec4) CompositeExtract 860 2
-             869: 53(f64vec4) CompositeExtract 861 2
+             868: 53(f64vec4) CompositeExtract 863 1
+             869: 53(f64vec4) CompositeExtract 864 1
              870: 53(f64vec4) FMul 868 869
-             871:         776 CompositeConstruct 864 867 870
-                              Store 778(dmat3x4v) 871
-             872:         770 Load 772(dmat4x2v)
-             873:         770 Load 772(dmat4x2v)
-             874: 43(f64vec2) CompositeExtract 872 0
-             875: 43(f64vec2) CompositeExtract 873 0
-             876: 43(f64vec2) FMul 874 875
-             877: 43(f64vec2) CompositeExtract 872 1
-             878: 43(f64vec2) CompositeExtract 873 1
+             871: 53(f64vec4) CompositeExtract 863 2
+             872: 53(f64vec4) CompositeExtract 864 2
+             873: 53(f64vec4) FMul 871 872
+             874:         779 CompositeConstruct 867 870 873
+                              Store 781(dmat3x4v) 874
+             875:         773 Load 775(dmat4x2v)
+             876:         773 Load 775(dmat4x2v)
+             877: 43(f64vec2) CompositeExtract 875 0
+             878: 43(f64vec2) CompositeExtract 876 0
              879: 43(f64vec2) FMul 877 878
-             880: 43(f64vec2) CompositeExtract 872 2
-             881: 43(f64vec2) CompositeExtract 873 2
+             880: 43(f64vec2) CompositeExtract 875 1
+             881: 43(f64vec2) CompositeExtract 876 1
              882: 43(f64vec2) FMul 880 881
-             883: 43(f64vec2) CompositeExtract 872 3
-             884: 43(f64vec2) CompositeExtract 873 3
+             883: 43(f64vec2) CompositeExtract 875 2
+             884: 43(f64vec2) CompositeExtract 876 2
              885: 43(f64vec2) FMul 883 884
-             886:         770 CompositeConstruct 876 879 882 885
-                              Store 772(dmat4x2v) 886
-             887:         782 Load 784(dmat4x3v)
-             888:         782 Load 784(dmat4x3v)
-             889: 48(f64vec3) CompositeExtract 887 0
-             890: 48(f64vec3) CompositeExtract 888 0
-             891: 48(f64vec3) FMul 889 890
-             892: 48(f64vec3) CompositeExtract 887 1
-             893: 48(f64vec3) CompositeExtract 888 1
+             886: 43(f64vec2) CompositeExtract 875 3
+             887: 43(f64vec2) CompositeExtract 876 3
+             888: 43(f64vec2) FMul 886 887
+             889:         773 CompositeConstruct 879 882 885 888
+                              Store 775(dmat4x2v) 889
+             890:         785 Load 787(dmat4x3v)
+             891:         785 Load 787(dmat4x3v)
+             892: 48(f64vec3) CompositeExtract 890 0
+             893: 48(f64vec3) CompositeExtract 891 0
              894: 48(f64vec3) FMul 892 893
-             895: 48(f64vec3) CompositeExtract 887 2
-             896: 48(f64vec3) CompositeExtract 888 2
+             895: 48(f64vec3) CompositeExtract 890 1
+             896: 48(f64vec3) CompositeExtract 891 1
              897: 48(f64vec3) FMul 895 896
-             898: 48(f64vec3) CompositeExtract 887 3
-             899: 48(f64vec3) CompositeExtract 888 3
+             898: 48(f64vec3) CompositeExtract 890 2
+             899: 48(f64vec3) CompositeExtract 891 2
              900: 48(f64vec3) FMul 898 899
-             901:         782 CompositeConstruct 891 894 897 900
-                              Store 784(dmat4x3v) 901
-             902:         734 Load 736(dmat2v)
-             903:         734 Transpose 902
-             904:         734 Load 736(dmat2v)
-             905:         734 MatrixTimesMatrix 904 903
-                              Store 736(dmat2v) 905
-             906:         740 Load 742(dmat3v)
-             907:         740 Transpose 906
-             908:         740 Load 742(dmat3v)
-             909:         740 MatrixTimesMatrix 908 907
-                              Store 742(dmat3v) 909
-             910:         746 Load 748(dmat4v)
-             911:         746 Transpose 910
-             912:         746 Load 748(dmat4v)
-             913:         746 MatrixTimesMatrix 912 911
-                              Store 748(dmat4v) 913
-             914:         758 Load 760(dmat3x2v)
-             915:         752 Transpose 914
-                              Store 754(dmat2x3v) 915
-             916:         752 Load 754(dmat2x3v)
-             917:         758 Transpose 916
-                              Store 760(dmat3x2v) 917
-             918:         770 Load 772(dmat4x2v)
-             919:         764 Transpose 918
-                              Store 766(dmat2x4v) 919
-             920:         764 Load 766(dmat2x4v)
-             921:         770 Transpose 920
-                              Store 772(dmat4x2v) 921
-             922:         782 Load 784(dmat4x3v)
-             923:         776 Transpose 922
-                              Store 778(dmat3x4v) 923
-             924:         776 Load 778(dmat3x4v)
-             925:         782 Transpose 924
-                              Store 784(dmat4x3v) 925
-             926:         734 Load 736(dmat2v)
-             927:39(float64_t) ExtInst 1(GLSL.std.450) 33(Determinant) 926
-             928:39(float64_t) Load 41(doublev)
-             929:39(float64_t) FAdd 928 927
-                              Store 41(doublev) 929
-             930:         740 Load 742(dmat3v)
-             931:39(float64_t) ExtInst 1(GLSL.std.450) 33(Determinant) 930
-             932:39(float64_t) Load 41(doublev)
-             933:39(float64_t) FAdd 932 931
-                              Store 41(doublev) 933
-             934:         746 Load 748(dmat4v)
-             935:39(float64_t) ExtInst 1(GLSL.std.450) 33(Determinant) 934
-             936:39(float64_t) Load 41(doublev)
-             937:39(float64_t) FAdd 936 935
-                              Store 41(doublev) 937
-             938:         734 Load 736(dmat2v)
-             939:         734 ExtInst 1(GLSL.std.450) 34(MatrixInverse) 938
-             940:         734 Load 736(dmat2v)
-             941:         734 MatrixTimesMatrix 940 939
-                              Store 736(dmat2v) 941
-             942:         740 Load 742(dmat3v)
-             943:         740 ExtInst 1(GLSL.std.450) 34(MatrixInverse) 942
-             944:         740 Load 742(dmat3v)
-             945:         740 MatrixTimesMatrix 944 943
-                              Store 742(dmat3v) 945
-             946:         746 Load 748(dmat4v)
-             947:         746 ExtInst 1(GLSL.std.450) 34(MatrixInverse) 946
-             948:         746 Load 748(dmat4v)
-             949:         746 MatrixTimesMatrix 948 947
-                              Store 748(dmat4v) 949
-             950:39(float64_t) Load 41(doublev)
-             952:     40(ptr) AccessChain 45(dvec2v) 951
-             953:39(float64_t) Load 952
-             954:39(float64_t) FAdd 950 953
-             956:     40(ptr) AccessChain 50(dvec3v) 955
-             957:39(float64_t) Load 956
-             958:39(float64_t) FAdd 954 957
-             960:     40(ptr) AccessChain 55(dvec4v) 959
-             961:39(float64_t) Load 960
-             962:39(float64_t) FAdd 958 961
-             964:     40(ptr) AccessChain 736(dmat2v) 963 951
-             965:39(float64_t) Load 964
-             966:39(float64_t) FAdd 962 965
-             968:     40(ptr) AccessChain 742(dmat3v) 967 955
-             969:39(float64_t) Load 968
-             970:39(float64_t) FAdd 966 969
-             971:     40(ptr) AccessChain 748(dmat4v) 25 959
+             901: 48(f64vec3) CompositeExtract 890 3
+             902: 48(f64vec3) CompositeExtract 891 3
+             903: 48(f64vec3) FMul 901 902
+             904:         785 CompositeConstruct 894 897 900 903
+                              Store 787(dmat4x3v) 904
+             905:         737 Load 739(dmat2v)
+             906:         737 Transpose 905
+             907:         737 Load 739(dmat2v)
+             908:         737 MatrixTimesMatrix 907 906
+                              Store 739(dmat2v) 908
+             909:         743 Load 745(dmat3v)
+             910:         743 Transpose 909
+             911:         743 Load 745(dmat3v)
+             912:         743 MatrixTimesMatrix 911 910
+                              Store 745(dmat3v) 912
+             913:         749 Load 751(dmat4v)
+             914:         749 Transpose 913
+             915:         749 Load 751(dmat4v)
+             916:         749 MatrixTimesMatrix 915 914
+                              Store 751(dmat4v) 916
+             917:         761 Load 763(dmat3x2v)
+             918:         755 Transpose 917
+                              Store 757(dmat2x3v) 918
+             919:         755 Load 757(dmat2x3v)
+             920:         761 Transpose 919
+                              Store 763(dmat3x2v) 920
+             921:         773 Load 775(dmat4x2v)
+             922:         767 Transpose 921
+                              Store 769(dmat2x4v) 922
+             923:         767 Load 769(dmat2x4v)
+             924:         773 Transpose 923
+                              Store 775(dmat4x2v) 924
+             925:         785 Load 787(dmat4x3v)
+             926:         779 Transpose 925
+                              Store 781(dmat3x4v) 926
+             927:         779 Load 781(dmat3x4v)
+             928:         785 Transpose 927
+                              Store 787(dmat4x3v) 928
+             929:         737 Load 739(dmat2v)
+             930:39(float64_t) ExtInst 1(GLSL.std.450) 33(Determinant) 929
+             931:39(float64_t) Load 41(doublev)
+             932:39(float64_t) FAdd 931 930
+                              Store 41(doublev) 932
+             933:         743 Load 745(dmat3v)
+             934:39(float64_t) ExtInst 1(GLSL.std.450) 33(Determinant) 933
+             935:39(float64_t) Load 41(doublev)
+             936:39(float64_t) FAdd 935 934
+                              Store 41(doublev) 936
+             937:         749 Load 751(dmat4v)
+             938:39(float64_t) ExtInst 1(GLSL.std.450) 33(Determinant) 937
+             939:39(float64_t) Load 41(doublev)
+             940:39(float64_t) FAdd 939 938
+                              Store 41(doublev) 940
+             941:         737 Load 739(dmat2v)
+             942:         737 ExtInst 1(GLSL.std.450) 34(MatrixInverse) 941
+             943:         737 Load 739(dmat2v)
+             944:         737 MatrixTimesMatrix 943 942
+                              Store 739(dmat2v) 944
+             945:         743 Load 745(dmat3v)
+             946:         743 ExtInst 1(GLSL.std.450) 34(MatrixInverse) 945
+             947:         743 Load 745(dmat3v)
+             948:         743 MatrixTimesMatrix 947 946
+                              Store 745(dmat3v) 948
+             949:         749 Load 751(dmat4v)
+             950:         749 ExtInst 1(GLSL.std.450) 34(MatrixInverse) 949
+             951:         749 Load 751(dmat4v)
+             952:         749 MatrixTimesMatrix 951 950
+                              Store 751(dmat4v) 952
+             953:39(float64_t) Load 41(doublev)
+             955:     40(ptr) AccessChain 45(dvec2v) 954
+             956:39(float64_t) Load 955
+             957:39(float64_t) FAdd 953 956
+             959:     40(ptr) AccessChain 50(dvec3v) 958
+             960:39(float64_t) Load 959
+             961:39(float64_t) FAdd 957 960
+             963:     40(ptr) AccessChain 55(dvec4v) 962
+             964:39(float64_t) Load 963
+             965:39(float64_t) FAdd 961 964
+             967:     40(ptr) AccessChain 739(dmat2v) 966 954
+             968:39(float64_t) Load 967
+             969:39(float64_t) FAdd 965 968
+             971:     40(ptr) AccessChain 745(dmat3v) 970 958
              972:39(float64_t) Load 971
-             973:39(float64_t) FAdd 970 972
-             974:     40(ptr) AccessChain 754(dmat2x3v) 963 951
+             973:39(float64_t) FAdd 969 972
+             974:     40(ptr) AccessChain 751(dmat4v) 25 962
              975:39(float64_t) Load 974
              976:39(float64_t) FAdd 973 975
-             977:     40(ptr) AccessChain 760(dmat3x2v) 963 951
+             977:     40(ptr) AccessChain 757(dmat2x3v) 966 954
              978:39(float64_t) Load 977
              979:39(float64_t) FAdd 976 978
-             980:     40(ptr) AccessChain 778(dmat3x4v) 967 955
+             980:     40(ptr) AccessChain 763(dmat3x2v) 966 954
              981:39(float64_t) Load 980
              982:39(float64_t) FAdd 979 981
-             983:     40(ptr) AccessChain 784(dmat4x3v) 967 955
+             983:     40(ptr) AccessChain 781(dmat3x4v) 970 958
              984:39(float64_t) Load 983
              985:39(float64_t) FAdd 982 984
-             986:     40(ptr) AccessChain 766(dmat2x4v) 963 951
+             986:     40(ptr) AccessChain 787(dmat4x3v) 970 958
              987:39(float64_t) Load 986
              988:39(float64_t) FAdd 985 987
-             989:     40(ptr) AccessChain 772(dmat4x2v) 963 951
+             989:     40(ptr) AccessChain 769(dmat2x4v) 966 954
              990:39(float64_t) Load 989
              991:39(float64_t) FAdd 988 990
-             992:   428(bool) Load 430(boolv)
-             994:   10(float) Select 992 993 21
-             995:39(float64_t) FConvert 994
-             996:39(float64_t) FAdd 991 995
-             997:    429(ptr) AccessChain 439(bvec2v) 33
-             998:   428(bool) Load 997
-             999:   10(float) Select 998 993 21
-            1000:39(float64_t) FConvert 999
-            1001:39(float64_t) FAdd 996 1000
-            1002:    429(ptr) AccessChain 448(bvec3v) 33
-            1003:   428(bool) Load 1002
-            1004:   10(float) Select 1003 993 21
-            1005:39(float64_t) FConvert 1004
-            1006:39(float64_t) FAdd 1001 1005
-            1007:    429(ptr) AccessChain 457(bvec4v) 33
-            1008:   428(bool) Load 1007
-            1009:   10(float) Select 1008 993 21
-            1010:39(float64_t) FConvert 1009
-            1011:39(float64_t) FAdd 1006 1010
-            1012:   10(float) FConvert 1011
-            1013:   11(fvec4) Load 13(outp)
-            1014:   11(fvec4) VectorTimesScalar 1013 1012
-                              Store 13(outp) 1014
+             992:     40(ptr) AccessChain 775(dmat4x2v) 966 954
+             993:39(float64_t) Load 992
+             994:39(float64_t) FAdd 991 993
+             995:   428(bool) Load 430(boolv)
+             997:   10(float) Select 995 996 21
+             998:39(float64_t) FConvert 997
+             999:39(float64_t) FAdd 994 998
+            1000:    429(ptr) AccessChain 439(bvec2v) 33
+            1001:   428(bool) Load 1000
+            1002:   10(float) Select 1001 996 21
+            1003:39(float64_t) FConvert 1002
+            1004:39(float64_t) FAdd 999 1003
+            1005:    429(ptr) AccessChain 448(bvec3v) 33
+            1006:   428(bool) Load 1005
+            1007:   10(float) Select 1006 996 21
+            1008:39(float64_t) FConvert 1007
+            1009:39(float64_t) FAdd 1004 1008
+            1010:    429(ptr) AccessChain 457(bvec4v) 33
+            1011:   428(bool) Load 1010
+            1012:   10(float) Select 1011 996 21
+            1013:39(float64_t) FConvert 1012
+            1014:39(float64_t) FAdd 1009 1013
+            1015:   10(float) FConvert 1014
+            1016:   11(fvec4) Load 13(outp)
+            1017:   11(fvec4) VectorTimesScalar 1016 1015
+                              Store 13(outp) 1017
                               Return
                               FunctionEnd
diff --git a/Test/baseResults/spv.400.tesc.out b/Test/baseResults/spv.400.tesc.out
index 24c669e..ce7c3af 100644
--- a/Test/baseResults/spv.400.tesc.out
+++ b/Test/baseResults/spv.400.tesc.out
@@ -1,6 +1,6 @@
 spv.400.tesc
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 92
 
                               Capability Tessellation
diff --git a/Test/baseResults/spv.400.tese.out b/Test/baseResults/spv.400.tese.out
index c313123..43b6a91 100755
--- a/Test/baseResults/spv.400.tese.out
+++ b/Test/baseResults/spv.400.tese.out
@@ -1,6 +1,6 @@
 spv.400.tese
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 96
 
                               Capability Tessellation
diff --git a/Test/baseResults/spv.420.geom.out b/Test/baseResults/spv.420.geom.out
index b5f86c2..74a4f0b 100644
--- a/Test/baseResults/spv.420.geom.out
+++ b/Test/baseResults/spv.420.geom.out
@@ -1,6 +1,6 @@
 spv.420.geom
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 72
 
                               Capability Geometry
diff --git a/Test/baseResults/spv.430.frag.out b/Test/baseResults/spv.430.frag.out
index db3dd61..330489f 100755
--- a/Test/baseResults/spv.430.frag.out
+++ b/Test/baseResults/spv.430.frag.out
@@ -1,6 +1,6 @@
 spv.430.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 24
 
                               Capability Shader
diff --git a/Test/baseResults/spv.430.vert.out b/Test/baseResults/spv.430.vert.out
index ccc695d..1cd9e61 100755
--- a/Test/baseResults/spv.430.vert.out
+++ b/Test/baseResults/spv.430.vert.out
@@ -1,6 +1,6 @@
 spv.430.vert
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 66
 
                               Capability Shader
diff --git a/Test/baseResults/spv.450.geom.out b/Test/baseResults/spv.450.geom.out
index ff52b1e..7713e54 100755
--- a/Test/baseResults/spv.450.geom.out
+++ b/Test/baseResults/spv.450.geom.out
@@ -1,6 +1,6 @@
 spv.450.geom
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 31
 
                               Capability Geometry
diff --git a/Test/baseResults/spv.450.noRedecl.tesc.out b/Test/baseResults/spv.450.noRedecl.tesc.out
index f37dbe2..b23061d 100755
--- a/Test/baseResults/spv.450.noRedecl.tesc.out
+++ b/Test/baseResults/spv.450.noRedecl.tesc.out
@@ -1,6 +1,6 @@
 spv.450.noRedecl.tesc
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 21
 
                               Capability Tessellation
diff --git a/Test/baseResults/spv.450.tesc.out b/Test/baseResults/spv.450.tesc.out
index e8bbc8e..35653fd 100755
--- a/Test/baseResults/spv.450.tesc.out
+++ b/Test/baseResults/spv.450.tesc.out
@@ -1,6 +1,6 @@
 spv.450.tesc
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 45
 
                               Capability Tessellation
diff --git a/Test/baseResults/spv.460.comp.out b/Test/baseResults/spv.460.comp.out
index e1c6896..6ebf49f 100755
--- a/Test/baseResults/spv.460.comp.out
+++ b/Test/baseResults/spv.460.comp.out
@@ -1,6 +1,6 @@
 spv.460.comp
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 15
 
                               Capability Shader
diff --git a/Test/baseResults/spv.460.frag.out b/Test/baseResults/spv.460.frag.out
index 90e67ee..04393fb 100755
--- a/Test/baseResults/spv.460.frag.out
+++ b/Test/baseResults/spv.460.frag.out
@@ -1,6 +1,6 @@
 spv.460.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 32
 
                               Capability Shader
diff --git a/Test/baseResults/spv.460.vert.out b/Test/baseResults/spv.460.vert.out
index ec911a1..c2ef302 100755
--- a/Test/baseResults/spv.460.vert.out
+++ b/Test/baseResults/spv.460.vert.out
@@ -1,6 +1,6 @@
 spv.460.vert
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 20
 
                               Capability Shader
diff --git a/Test/baseResults/spv.8bitstorage-int.frag.out b/Test/baseResults/spv.8bitstorage-int.frag.out
new file mode 100755
index 0000000..94e7ab5
--- /dev/null
+++ b/Test/baseResults/spv.8bitstorage-int.frag.out
@@ -0,0 +1,335 @@
+spv.8bitstorage-int.frag
+// Module Version 10000
+// Generated by (magic number): 80007
+// Id's are bound by 171
+
+                              Capability Shader
+                              Capability Int8
+                              Capability CapabilityStorageBuffer8BitAccess
+                              Capability CapabilityUniformAndStorageBuffer8BitAccess
+                              Extension  "SPV_KHR_8bit_storage"
+               1:             ExtInstImport  "GLSL.std.450"
+                              MemoryModel Logical GLSL450
+                              EntryPoint Fragment 4  "main"
+                              ExecutionMode 4 OriginUpperLeft
+                              Source GLSL 450
+                              SourceExtension  "GL_EXT_shader_8bit_storage"
+                              Name 4  "main"
+                              Name 12  "S"
+                              MemberName 12(S) 0  "x"
+                              MemberName 12(S) 1  "y"
+                              MemberName 12(S) 2  "z"
+                              Name 17  "B2"
+                              MemberName 17(B2) 0  "o"
+                              MemberName 17(B2) 1  "p"
+                              MemberName 17(B2) 2  "q"
+                              MemberName 17(B2) 3  "r"
+                              MemberName 17(B2) 4  "u"
+                              MemberName 17(B2) 5  "v"
+                              MemberName 17(B2) 6  "x"
+                              MemberName 17(B2) 7  "w"
+                              Name 19  "b2"
+                              Name 23  "S"
+                              MemberName 23(S) 0  "x"
+                              MemberName 23(S) 1  "y"
+                              MemberName 23(S) 2  "z"
+                              Name 25  "B1"
+                              MemberName 25(B1) 0  "a"
+                              MemberName 25(B1) 1  "b"
+                              MemberName 25(B1) 2  "c"
+                              MemberName 25(B1) 3  "d"
+                              MemberName 25(B1) 4  "g"
+                              MemberName 25(B1) 5  "h"
+                              MemberName 25(B1) 6  "j"
+                              Name 27  "b1"
+                              Name 45  "S"
+                              MemberName 45(S) 0  "x"
+                              MemberName 45(S) 1  "y"
+                              MemberName 45(S) 2  "z"
+                              Name 49  "B5"
+                              MemberName 49(B5) 0  "o"
+                              MemberName 49(B5) 1  "p"
+                              MemberName 49(B5) 2  "q"
+                              MemberName 49(B5) 3  "r"
+                              MemberName 49(B5) 4  "u"
+                              MemberName 49(B5) 5  "v"
+                              MemberName 49(B5) 6  "x"
+                              MemberName 49(B5) 7  "w"
+                              Name 51  "b5"
+                              Name 69  "x0"
+                              Name 75  "x1"
+                              Name 88  "S2"
+                              MemberName 88(S2) 0  "x"
+                              MemberName 88(S2) 1  "y"
+                              MemberName 88(S2) 2  "z"
+                              Name 89  "S3"
+                              MemberName 89(S3) 0  "x"
+                              Name 90  "B4"
+                              MemberName 90(B4) 0  "x"
+                              MemberName 90(B4) 1  "y"
+                              Name 92  "b4"
+                              Name 93  "S2"
+                              MemberName 93(S2) 0  "x"
+                              MemberName 93(S2) 1  "y"
+                              MemberName 93(S2) 2  "z"
+                              Name 94  "B3"
+                              MemberName 94(B3) 0  "x"
+                              Name 96  "b3"
+                              Name 113  "v3"
+                              Name 135  "u3"
+                              Decorate 11 ArrayStride 1
+                              MemberDecorate 12(S) 0 Offset 0
+                              MemberDecorate 12(S) 1 Offset 2
+                              MemberDecorate 12(S) 2 Offset 4
+                              Decorate 13 ArrayStride 8
+                              Decorate 15 ArrayStride 2
+                              Decorate 16 ArrayStride 1
+                              MemberDecorate 17(B2) 0 Offset 0
+                              MemberDecorate 17(B2) 1 Offset 2
+                              MemberDecorate 17(B2) 2 Offset 4
+                              MemberDecorate 17(B2) 3 Offset 7
+                              MemberDecorate 17(B2) 4 Offset 12
+                              MemberDecorate 17(B2) 5 Offset 20
+                              MemberDecorate 17(B2) 6 Offset 36
+                              MemberDecorate 17(B2) 7 Offset 236
+                              Decorate 17(B2) BufferBlock
+                              Decorate 19(b2) DescriptorSet 0
+                              Decorate 22 ArrayStride 16
+                              MemberDecorate 23(S) 0 Offset 0
+                              MemberDecorate 23(S) 1 Offset 2
+                              MemberDecorate 23(S) 2 Offset 4
+                              Decorate 24 ArrayStride 16
+                              MemberDecorate 25(B1) 0 Offset 0
+                              MemberDecorate 25(B1) 1 Offset 2
+                              MemberDecorate 25(B1) 2 Offset 4
+                              MemberDecorate 25(B1) 3 Offset 16
+                              MemberDecorate 25(B1) 4 Offset 48
+                              MemberDecorate 25(B1) 5 Offset 64
+                              MemberDecorate 25(B1) 6 Offset 96
+                              Decorate 25(B1) Block
+                              Decorate 27(b1) DescriptorSet 0
+                              Decorate 44 ArrayStride 16
+                              MemberDecorate 45(S) 0 Offset 0
+                              MemberDecorate 45(S) 1 Offset 2
+                              MemberDecorate 45(S) 2 Offset 4
+                              Decorate 46 ArrayStride 16
+                              Decorate 47 ArrayStride 16
+                              Decorate 48 ArrayStride 16
+                              MemberDecorate 49(B5) 0 Offset 0
+                              MemberDecorate 49(B5) 1 Offset 2
+                              MemberDecorate 49(B5) 2 Offset 4
+                              MemberDecorate 49(B5) 3 Offset 16
+                              MemberDecorate 49(B5) 4 Offset 48
+                              MemberDecorate 49(B5) 5 Offset 64
+                              MemberDecorate 49(B5) 6 Offset 96
+                              MemberDecorate 49(B5) 7 Offset 1696
+                              Decorate 49(B5) Block
+                              Decorate 51(b5) DescriptorSet 0
+                              MemberDecorate 88(S2) 0 ColMajor
+                              MemberDecorate 88(S2) 0 Offset 0
+                              MemberDecorate 88(S2) 0 MatrixStride 16
+                              MemberDecorate 88(S2) 1 Offset 64
+                              MemberDecorate 88(S2) 2 Offset 68
+                              MemberDecorate 89(S3) 0 Offset 0
+                              MemberDecorate 90(B4) 0 Offset 0
+                              MemberDecorate 90(B4) 1 Offset 80
+                              Decorate 90(B4) BufferBlock
+                              Decorate 92(b4) DescriptorSet 0
+                              MemberDecorate 93(S2) 0 RowMajor
+                              MemberDecorate 93(S2) 0 Offset 0
+                              MemberDecorate 93(S2) 0 MatrixStride 16
+                              MemberDecorate 93(S2) 1 Offset 64
+                              MemberDecorate 93(S2) 2 Offset 68
+                              MemberDecorate 94(B3) 0 Offset 0
+                              Decorate 94(B3) BufferBlock
+                              Decorate 96(b3) DescriptorSet 0
+               2:             TypeVoid
+               3:             TypeFunction 2
+               6:             TypeInt 8 1
+               7:             TypeVector 6(int8_t) 2
+               8:             TypeVector 6(int8_t) 3
+               9:             TypeInt 32 0
+              10:      9(int) Constant 2
+              11:             TypeArray 6(int8_t) 10
+           12(S):             TypeStruct 6(int8_t) 7(i8vec2) 8(i8vec3)
+              13:             TypeArray 12(S) 10
+              14:      9(int) Constant 100
+              15:             TypeArray 7(i8vec2) 14
+              16:             TypeRuntimeArray 6(int8_t)
+          17(B2):             TypeStruct 6(int8_t) 7(i8vec2) 8(i8vec3) 11 12(S) 13 15 16
+              18:             TypePointer Uniform 17(B2)
+          19(b2):     18(ptr) Variable Uniform
+              20:             TypeInt 32 1
+              21:     20(int) Constant 0
+              22:             TypeArray 6(int8_t) 10
+           23(S):             TypeStruct 6(int8_t) 7(i8vec2) 8(i8vec3)
+              24:             TypeArray 23(S) 10
+          25(B1):             TypeStruct 6(int8_t) 7(i8vec2) 8(i8vec3) 22 23(S) 24 20(int)
+              26:             TypePointer Uniform 25(B1)
+          27(b1):     26(ptr) Variable Uniform
+              28:             TypePointer Uniform 6(int8_t)
+              32:     20(int) Constant 1
+              33:     20(int) Constant 2
+              34:             TypePointer Uniform 8(i8vec3)
+              37:             TypeVector 20(int) 3
+              39:             TypeVector 20(int) 2
+              42:             TypePointer Uniform 7(i8vec2)
+              44:             TypeArray 6(int8_t) 10
+           45(S):             TypeStruct 6(int8_t) 7(i8vec2) 8(i8vec3)
+              46:             TypeArray 45(S) 10
+              47:             TypeArray 7(i8vec2) 14
+              48:             TypeArray 6(int8_t) 14
+          49(B5):             TypeStruct 6(int8_t) 7(i8vec2) 8(i8vec3) 44 45(S) 46 47 48
+              50:             TypePointer Uniform 49(B5)
+          51(b5):     50(ptr) Variable Uniform
+              58:     20(int) Constant 3
+              68:             TypePointer Function 20(int)
+              73:             TypeVector 20(int) 4
+              74:             TypePointer Function 73(ivec4)
+              85:             TypeFloat 32
+              86:             TypeVector 85(float) 4
+              87:             TypeMatrix 86(fvec4) 4
+          88(S2):             TypeStruct 87 6(int8_t) 20(int)
+          89(S3):             TypeStruct 88(S2)
+          90(B4):             TypeStruct 88(S2) 89(S3)
+              91:             TypePointer Uniform 90(B4)
+          92(b4):     91(ptr) Variable Uniform
+          93(S2):             TypeStruct 87 6(int8_t) 20(int)
+          94(B3):             TypeStruct 93(S2)
+              95:             TypePointer Uniform 94(B3)
+          96(b3):     95(ptr) Variable Uniform
+              97:             TypePointer Uniform 87
+             104:      9(int) Constant 0
+             108:     20(int) Constant 5
+             112:             TypePointer Function 37(ivec3)
+             114:     20(int) Constant 7
+             115:     20(int) Constant 6
+             116:             TypePointer Uniform 20(int)
+             166:   39(ivec2) ConstantComposite 32 33
+         4(main):           2 Function None 3
+               5:             Label
+          69(x0):     68(ptr) Variable Function
+          75(x1):     74(ptr) Variable Function
+         113(v3):    112(ptr) Variable Function
+         135(u3):    112(ptr) Variable Function
+              29:     28(ptr) AccessChain 27(b1) 21
+              30:   6(int8_t) Load 29
+              31:     28(ptr) AccessChain 19(b2) 21
+                              Store 31 30
+              35:     34(ptr) AccessChain 19(b2) 33
+              36:   8(i8vec3) Load 35
+              38:   37(ivec3) SConvert 36
+              40:   39(ivec2) VectorShuffle 38 38 0 1
+              41:   7(i8vec2) SConvert 40
+              43:     42(ptr) AccessChain 19(b2) 32
+                              Store 43 41
+              52:     34(ptr) AccessChain 51(b5) 33
+              53:   8(i8vec3) Load 52
+              54:   37(ivec3) SConvert 53
+              55:   39(ivec2) VectorShuffle 54 54 0 1
+              56:   7(i8vec2) SConvert 55
+              57:     42(ptr) AccessChain 19(b2) 32
+                              Store 57 56
+              59:     28(ptr) AccessChain 19(b2) 58 21
+              60:   6(int8_t) Load 59
+              61:     28(ptr) AccessChain 19(b2) 58 21
+                              Store 61 60
+              62:     28(ptr) AccessChain 51(b5) 58 32
+              63:   6(int8_t) Load 62
+              64:     28(ptr) AccessChain 19(b2) 58 32
+                              Store 64 63
+              65:     42(ptr) AccessChain 19(b2) 32
+              66:   7(i8vec2) Load 65
+              67:     42(ptr) AccessChain 19(b2) 32
+                              Store 67 66
+              70:     28(ptr) AccessChain 27(b1) 21
+              71:   6(int8_t) Load 70
+              72:     20(int) SConvert 71
+                              Store 69(x0) 72
+              76:     28(ptr) AccessChain 27(b1) 21
+              77:   6(int8_t) Load 76
+              78:     20(int) SConvert 77
+              79:     42(ptr) AccessChain 19(b2) 32
+              80:   7(i8vec2) Load 79
+              81:   39(ivec2) SConvert 80
+              82:     20(int) CompositeExtract 81 0
+              83:     20(int) CompositeExtract 81 1
+              84:   73(ivec4) CompositeConstruct 78 82 83 32
+                              Store 75(x1) 84
+              98:     97(ptr) AccessChain 96(b3) 21 21
+              99:          87 Load 98
+             100:     97(ptr) AccessChain 92(b4) 21 21
+                              Store 100 99
+             101:     42(ptr) AccessChain 19(b2) 32
+             102:   7(i8vec2) Load 101
+             103:   39(ivec2) SConvert 102
+             105:     20(int) CompositeExtract 103 0
+             106:   6(int8_t) SConvert 105
+             107:     28(ptr) AccessChain 19(b2) 21
+                              Store 107 106
+             109:     42(ptr) AccessChain 19(b2) 108 32 32
+             110:   7(i8vec2) Load 109
+             111:     42(ptr) AccessChain 19(b2) 32
+                              Store 111 110
+             117:    116(ptr) AccessChain 27(b1) 115
+             118:     20(int) Load 117
+             119:     28(ptr) AccessChain 19(b2) 114 118
+             120:   6(int8_t) Load 119
+             121:     20(int) SConvert 120
+             122:    116(ptr) AccessChain 27(b1) 115
+             123:     20(int) Load 122
+             124:     20(int) IAdd 123 32
+             125:     28(ptr) AccessChain 19(b2) 114 124
+             126:   6(int8_t) Load 125
+             127:     20(int) SConvert 126
+             128:    116(ptr) AccessChain 27(b1) 115
+             129:     20(int) Load 128
+             130:     20(int) IAdd 129 33
+             131:     28(ptr) AccessChain 19(b2) 114 130
+             132:   6(int8_t) Load 131
+             133:     20(int) SConvert 132
+             134:   37(ivec3) CompositeConstruct 121 127 133
+                              Store 113(v3) 134
+             136:    116(ptr) AccessChain 27(b1) 115
+             137:     20(int) Load 136
+             138:     28(ptr) AccessChain 51(b5) 114 137
+             139:   6(int8_t) Load 138
+             140:     20(int) SConvert 139
+             141:    116(ptr) AccessChain 27(b1) 115
+             142:     20(int) Load 141
+             143:     20(int) IAdd 142 32
+             144:     28(ptr) AccessChain 51(b5) 114 143
+             145:   6(int8_t) Load 144
+             146:     20(int) SConvert 145
+             147:    116(ptr) AccessChain 27(b1) 115
+             148:     20(int) Load 147
+             149:     20(int) IAdd 148 33
+             150:     28(ptr) AccessChain 51(b5) 114 149
+             151:   6(int8_t) Load 150
+             152:     20(int) SConvert 151
+             153:   37(ivec3) CompositeConstruct 140 146 152
+                              Store 135(u3) 153
+             154:     42(ptr) AccessChain 19(b2) 115 21
+             155:   7(i8vec2) Load 154
+             156:     42(ptr) AccessChain 19(b2) 115 21
+                              Store 156 155
+             157:     42(ptr) AccessChain 51(b5) 115 32
+             158:   7(i8vec2) Load 157
+             159:     42(ptr) AccessChain 19(b2) 115 32
+                              Store 159 158
+             160:     28(ptr) AccessChain 27(b1) 21
+             161:   6(int8_t) Load 160
+             162:     28(ptr) AccessChain 19(b2) 32 104
+                              Store 162 161
+             163:     28(ptr) AccessChain 19(b2) 32 104
+             164:   6(int8_t) Load 163
+             165:     28(ptr) AccessChain 19(b2) 21
+                              Store 165 164
+             167:   7(i8vec2) SConvert 166
+             168:     42(ptr) AccessChain 19(b2) 32
+                              Store 168 167
+             169:   6(int8_t) SConvert 58
+             170:     28(ptr) AccessChain 19(b2) 21
+                              Store 170 169
+                              Return
+                              FunctionEnd
diff --git a/Test/baseResults/spv.8bitstorage-uint.frag.out b/Test/baseResults/spv.8bitstorage-uint.frag.out
new file mode 100755
index 0000000..f4e7b6d
--- /dev/null
+++ b/Test/baseResults/spv.8bitstorage-uint.frag.out
@@ -0,0 +1,337 @@
+spv.8bitstorage-uint.frag
+// Module Version 10000
+// Generated by (magic number): 80007
+// Id's are bound by 173
+
+                              Capability Shader
+                              Capability Int8
+                              Capability CapabilityStorageBuffer8BitAccess
+                              Capability CapabilityUniformAndStorageBuffer8BitAccess
+                              Extension  "SPV_KHR_8bit_storage"
+               1:             ExtInstImport  "GLSL.std.450"
+                              MemoryModel Logical GLSL450
+                              EntryPoint Fragment 4  "main"
+                              ExecutionMode 4 OriginUpperLeft
+                              Source GLSL 450
+                              SourceExtension  "GL_EXT_shader_8bit_storage"
+                              Name 4  "main"
+                              Name 12  "S"
+                              MemberName 12(S) 0  "x"
+                              MemberName 12(S) 1  "y"
+                              MemberName 12(S) 2  "z"
+                              Name 17  "B2"
+                              MemberName 17(B2) 0  "o"
+                              MemberName 17(B2) 1  "p"
+                              MemberName 17(B2) 2  "q"
+                              MemberName 17(B2) 3  "r"
+                              MemberName 17(B2) 4  "u"
+                              MemberName 17(B2) 5  "v"
+                              MemberName 17(B2) 6  "x"
+                              MemberName 17(B2) 7  "w"
+                              Name 19  "b2"
+                              Name 23  "S"
+                              MemberName 23(S) 0  "x"
+                              MemberName 23(S) 1  "y"
+                              MemberName 23(S) 2  "z"
+                              Name 25  "B1"
+                              MemberName 25(B1) 0  "a"
+                              MemberName 25(B1) 1  "b"
+                              MemberName 25(B1) 2  "c"
+                              MemberName 25(B1) 3  "d"
+                              MemberName 25(B1) 4  "g"
+                              MemberName 25(B1) 5  "h"
+                              MemberName 25(B1) 6  "j"
+                              Name 27  "b1"
+                              Name 45  "S"
+                              MemberName 45(S) 0  "x"
+                              MemberName 45(S) 1  "y"
+                              MemberName 45(S) 2  "z"
+                              Name 49  "B5"
+                              MemberName 49(B5) 0  "o"
+                              MemberName 49(B5) 1  "p"
+                              MemberName 49(B5) 2  "q"
+                              MemberName 49(B5) 3  "r"
+                              MemberName 49(B5) 4  "u"
+                              MemberName 49(B5) 5  "v"
+                              MemberName 49(B5) 6  "x"
+                              MemberName 49(B5) 7  "w"
+                              Name 51  "b5"
+                              Name 69  "x0"
+                              Name 75  "x1"
+                              Name 89  "S2"
+                              MemberName 89(S2) 0  "x"
+                              MemberName 89(S2) 1  "y"
+                              MemberName 89(S2) 2  "z"
+                              Name 90  "S3"
+                              MemberName 90(S3) 0  "x"
+                              Name 91  "B4"
+                              MemberName 91(B4) 0  "x"
+                              MemberName 91(B4) 1  "y"
+                              Name 93  "b4"
+                              Name 94  "S2"
+                              MemberName 94(S2) 0  "x"
+                              MemberName 94(S2) 1  "y"
+                              MemberName 94(S2) 2  "z"
+                              Name 95  "B3"
+                              MemberName 95(B3) 0  "x"
+                              Name 97  "b3"
+                              Name 114  "v3"
+                              Name 136  "u3"
+                              Decorate 11 ArrayStride 1
+                              MemberDecorate 12(S) 0 Offset 0
+                              MemberDecorate 12(S) 1 Offset 2
+                              MemberDecorate 12(S) 2 Offset 4
+                              Decorate 13 ArrayStride 8
+                              Decorate 15 ArrayStride 2
+                              Decorate 16 ArrayStride 1
+                              MemberDecorate 17(B2) 0 Offset 0
+                              MemberDecorate 17(B2) 1 Offset 2
+                              MemberDecorate 17(B2) 2 Offset 4
+                              MemberDecorate 17(B2) 3 Offset 7
+                              MemberDecorate 17(B2) 4 Offset 12
+                              MemberDecorate 17(B2) 5 Offset 20
+                              MemberDecorate 17(B2) 6 Offset 36
+                              MemberDecorate 17(B2) 7 Offset 236
+                              Decorate 17(B2) BufferBlock
+                              Decorate 19(b2) DescriptorSet 0
+                              Decorate 22 ArrayStride 16
+                              MemberDecorate 23(S) 0 Offset 0
+                              MemberDecorate 23(S) 1 Offset 2
+                              MemberDecorate 23(S) 2 Offset 4
+                              Decorate 24 ArrayStride 16
+                              MemberDecorate 25(B1) 0 Offset 0
+                              MemberDecorate 25(B1) 1 Offset 2
+                              MemberDecorate 25(B1) 2 Offset 4
+                              MemberDecorate 25(B1) 3 Offset 16
+                              MemberDecorate 25(B1) 4 Offset 48
+                              MemberDecorate 25(B1) 5 Offset 64
+                              MemberDecorate 25(B1) 6 Offset 96
+                              Decorate 25(B1) Block
+                              Decorate 27(b1) DescriptorSet 0
+                              Decorate 44 ArrayStride 16
+                              MemberDecorate 45(S) 0 Offset 0
+                              MemberDecorate 45(S) 1 Offset 2
+                              MemberDecorate 45(S) 2 Offset 4
+                              Decorate 46 ArrayStride 16
+                              Decorate 47 ArrayStride 16
+                              Decorate 48 ArrayStride 16
+                              MemberDecorate 49(B5) 0 Offset 0
+                              MemberDecorate 49(B5) 1 Offset 2
+                              MemberDecorate 49(B5) 2 Offset 4
+                              MemberDecorate 49(B5) 3 Offset 16
+                              MemberDecorate 49(B5) 4 Offset 48
+                              MemberDecorate 49(B5) 5 Offset 64
+                              MemberDecorate 49(B5) 6 Offset 96
+                              MemberDecorate 49(B5) 7 Offset 1696
+                              Decorate 49(B5) Block
+                              Decorate 51(b5) DescriptorSet 0
+                              MemberDecorate 89(S2) 0 ColMajor
+                              MemberDecorate 89(S2) 0 Offset 0
+                              MemberDecorate 89(S2) 0 MatrixStride 16
+                              MemberDecorate 89(S2) 1 Offset 64
+                              MemberDecorate 89(S2) 2 Offset 68
+                              MemberDecorate 90(S3) 0 Offset 0
+                              MemberDecorate 91(B4) 0 Offset 0
+                              MemberDecorate 91(B4) 1 Offset 80
+                              Decorate 91(B4) BufferBlock
+                              Decorate 93(b4) DescriptorSet 0
+                              MemberDecorate 94(S2) 0 RowMajor
+                              MemberDecorate 94(S2) 0 Offset 0
+                              MemberDecorate 94(S2) 0 MatrixStride 16
+                              MemberDecorate 94(S2) 1 Offset 64
+                              MemberDecorate 94(S2) 2 Offset 68
+                              MemberDecorate 95(B3) 0 Offset 0
+                              Decorate 95(B3) BufferBlock
+                              Decorate 97(b3) DescriptorSet 0
+               2:             TypeVoid
+               3:             TypeFunction 2
+               6:             TypeInt 8 0
+               7:             TypeVector 6(int8_t) 2
+               8:             TypeVector 6(int8_t) 3
+               9:             TypeInt 32 0
+              10:      9(int) Constant 2
+              11:             TypeArray 6(int8_t) 10
+           12(S):             TypeStruct 6(int8_t) 7(i8vec2) 8(i8vec3)
+              13:             TypeArray 12(S) 10
+              14:      9(int) Constant 100
+              15:             TypeArray 7(i8vec2) 14
+              16:             TypeRuntimeArray 6(int8_t)
+          17(B2):             TypeStruct 6(int8_t) 7(i8vec2) 8(i8vec3) 11 12(S) 13 15 16
+              18:             TypePointer Uniform 17(B2)
+          19(b2):     18(ptr) Variable Uniform
+              20:             TypeInt 32 1
+              21:     20(int) Constant 0
+              22:             TypeArray 6(int8_t) 10
+           23(S):             TypeStruct 6(int8_t) 7(i8vec2) 8(i8vec3)
+              24:             TypeArray 23(S) 10
+          25(B1):             TypeStruct 6(int8_t) 7(i8vec2) 8(i8vec3) 22 23(S) 24 9(int)
+              26:             TypePointer Uniform 25(B1)
+          27(b1):     26(ptr) Variable Uniform
+              28:             TypePointer Uniform 6(int8_t)
+              32:     20(int) Constant 1
+              33:     20(int) Constant 2
+              34:             TypePointer Uniform 8(i8vec3)
+              37:             TypeVector 9(int) 3
+              39:             TypeVector 9(int) 2
+              42:             TypePointer Uniform 7(i8vec2)
+              44:             TypeArray 6(int8_t) 10
+           45(S):             TypeStruct 6(int8_t) 7(i8vec2) 8(i8vec3)
+              46:             TypeArray 45(S) 10
+              47:             TypeArray 7(i8vec2) 14
+              48:             TypeArray 6(int8_t) 14
+          49(B5):             TypeStruct 6(int8_t) 7(i8vec2) 8(i8vec3) 44 45(S) 46 47 48
+              50:             TypePointer Uniform 49(B5)
+          51(b5):     50(ptr) Variable Uniform
+              58:     20(int) Constant 3
+              68:             TypePointer Function 9(int)
+              73:             TypeVector 9(int) 4
+              74:             TypePointer Function 73(ivec4)
+              82:      9(int) Constant 1
+              86:             TypeFloat 32
+              87:             TypeVector 86(float) 4
+              88:             TypeMatrix 87(fvec4) 4
+          89(S2):             TypeStruct 88 6(int8_t) 9(int)
+          90(S3):             TypeStruct 89(S2)
+          91(B4):             TypeStruct 89(S2) 90(S3)
+              92:             TypePointer Uniform 91(B4)
+          93(b4):     92(ptr) Variable Uniform
+          94(S2):             TypeStruct 88 6(int8_t) 9(int)
+          95(B3):             TypeStruct 94(S2)
+              96:             TypePointer Uniform 95(B3)
+          97(b3):     96(ptr) Variable Uniform
+              98:             TypePointer Uniform 88
+             105:      9(int) Constant 0
+             109:     20(int) Constant 5
+             113:             TypePointer Function 37(ivec3)
+             115:     20(int) Constant 7
+             116:     20(int) Constant 6
+             117:             TypePointer Uniform 9(int)
+             167:   39(ivec2) ConstantComposite 82 10
+             170:      9(int) Constant 3
+         4(main):           2 Function None 3
+               5:             Label
+          69(x0):     68(ptr) Variable Function
+          75(x1):     74(ptr) Variable Function
+         114(v3):    113(ptr) Variable Function
+         136(u3):    113(ptr) Variable Function
+              29:     28(ptr) AccessChain 27(b1) 21
+              30:   6(int8_t) Load 29
+              31:     28(ptr) AccessChain 19(b2) 21
+                              Store 31 30
+              35:     34(ptr) AccessChain 19(b2) 33
+              36:   8(i8vec3) Load 35
+              38:   37(ivec3) UConvert 36
+              40:   39(ivec2) VectorShuffle 38 38 0 1
+              41:   7(i8vec2) UConvert 40
+              43:     42(ptr) AccessChain 19(b2) 32
+                              Store 43 41
+              52:     34(ptr) AccessChain 51(b5) 33
+              53:   8(i8vec3) Load 52
+              54:   37(ivec3) UConvert 53
+              55:   39(ivec2) VectorShuffle 54 54 0 1
+              56:   7(i8vec2) UConvert 55
+              57:     42(ptr) AccessChain 19(b2) 32
+                              Store 57 56
+              59:     28(ptr) AccessChain 19(b2) 58 21
+              60:   6(int8_t) Load 59
+              61:     28(ptr) AccessChain 19(b2) 58 21
+                              Store 61 60
+              62:     28(ptr) AccessChain 51(b5) 58 32
+              63:   6(int8_t) Load 62
+              64:     28(ptr) AccessChain 19(b2) 58 32
+                              Store 64 63
+              65:     42(ptr) AccessChain 19(b2) 32
+              66:   7(i8vec2) Load 65
+              67:     42(ptr) AccessChain 19(b2) 32
+                              Store 67 66
+              70:     28(ptr) AccessChain 27(b1) 21
+              71:   6(int8_t) Load 70
+              72:      9(int) UConvert 71
+                              Store 69(x0) 72
+              76:     28(ptr) AccessChain 27(b1) 21
+              77:   6(int8_t) Load 76
+              78:      9(int) UConvert 77
+              79:     42(ptr) AccessChain 19(b2) 32
+              80:   7(i8vec2) Load 79
+              81:   39(ivec2) UConvert 80
+              83:      9(int) CompositeExtract 81 0
+              84:      9(int) CompositeExtract 81 1
+              85:   73(ivec4) CompositeConstruct 78 83 84 82
+                              Store 75(x1) 85
+              99:     98(ptr) AccessChain 97(b3) 21 21
+             100:          88 Load 99
+             101:     98(ptr) AccessChain 93(b4) 21 21
+                              Store 101 100
+             102:     42(ptr) AccessChain 19(b2) 32
+             103:   7(i8vec2) Load 102
+             104:   39(ivec2) UConvert 103
+             106:      9(int) CompositeExtract 104 0
+             107:   6(int8_t) UConvert 106
+             108:     28(ptr) AccessChain 19(b2) 21
+                              Store 108 107
+             110:     42(ptr) AccessChain 19(b2) 109 32 32
+             111:   7(i8vec2) Load 110
+             112:     42(ptr) AccessChain 19(b2) 32
+                              Store 112 111
+             118:    117(ptr) AccessChain 27(b1) 116
+             119:      9(int) Load 118
+             120:     28(ptr) AccessChain 19(b2) 115 119
+             121:   6(int8_t) Load 120
+             122:      9(int) UConvert 121
+             123:    117(ptr) AccessChain 27(b1) 116
+             124:      9(int) Load 123
+             125:      9(int) IAdd 124 82
+             126:     28(ptr) AccessChain 19(b2) 115 125
+             127:   6(int8_t) Load 126
+             128:      9(int) UConvert 127
+             129:    117(ptr) AccessChain 27(b1) 116
+             130:      9(int) Load 129
+             131:      9(int) IAdd 130 10
+             132:     28(ptr) AccessChain 19(b2) 115 131
+             133:   6(int8_t) Load 132
+             134:      9(int) UConvert 133
+             135:   37(ivec3) CompositeConstruct 122 128 134
+                              Store 114(v3) 135
+             137:    117(ptr) AccessChain 27(b1) 116
+             138:      9(int) Load 137
+             139:     28(ptr) AccessChain 51(b5) 115 138
+             140:   6(int8_t) Load 139
+             141:      9(int) UConvert 140
+             142:    117(ptr) AccessChain 27(b1) 116
+             143:      9(int) Load 142
+             144:      9(int) IAdd 143 82
+             145:     28(ptr) AccessChain 51(b5) 115 144
+             146:   6(int8_t) Load 145
+             147:      9(int) UConvert 146
+             148:    117(ptr) AccessChain 27(b1) 116
+             149:      9(int) Load 148
+             150:      9(int) IAdd 149 10
+             151:     28(ptr) AccessChain 51(b5) 115 150
+             152:   6(int8_t) Load 151
+             153:      9(int) UConvert 152
+             154:   37(ivec3) CompositeConstruct 141 147 153
+                              Store 136(u3) 154
+             155:     42(ptr) AccessChain 19(b2) 116 21
+             156:   7(i8vec2) Load 155
+             157:     42(ptr) AccessChain 19(b2) 116 21
+                              Store 157 156
+             158:     42(ptr) AccessChain 51(b5) 116 32
+             159:   7(i8vec2) Load 158
+             160:     42(ptr) AccessChain 19(b2) 116 32
+                              Store 160 159
+             161:     28(ptr) AccessChain 27(b1) 21
+             162:   6(int8_t) Load 161
+             163:     28(ptr) AccessChain 19(b2) 32 105
+                              Store 163 162
+             164:     28(ptr) AccessChain 19(b2) 32 105
+             165:   6(int8_t) Load 164
+             166:     28(ptr) AccessChain 19(b2) 21
+                              Store 166 165
+             168:   7(i8vec2) UConvert 167
+             169:     42(ptr) AccessChain 19(b2) 32
+                              Store 169 168
+             171:   6(int8_t) UConvert 170
+             172:     28(ptr) AccessChain 19(b2) 21
+                              Store 172 171
+                              Return
+                              FunctionEnd
diff --git a/Test/baseResults/spv.8bitstorage_Error-int.frag.out b/Test/baseResults/spv.8bitstorage_Error-int.frag.out
new file mode 100755
index 0000000..0562111
--- /dev/null
+++ b/Test/baseResults/spv.8bitstorage_Error-int.frag.out
@@ -0,0 +1,71 @@
+spv.8bitstorage_Error-int.frag
+ERROR: 0:54: 'structure: (u)int8 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:58: 'return: can't use with structs containing int8' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:61: 'int8_t: (u)int8 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:74: '[: does not operate on types containing (u)int8' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:75: '.: can't swizzle types containing (u)int8' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:76: 'built-in function: (u)int8 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:76: 'built-in function: (u)int8 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:76: 'built-in function: (u)int8 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:77: 'built-in function: (u)int8 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:77: 'built-in function: (u)int8 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:78: '+' :  wrong operand types: no operation '+' exists that takes a left-hand operand of type 'layout( column_major std140 offset=0) uniform int8_t' and a right operand of type 'layout( column_major std140 offset=0) uniform int8_t' (or there is no acceptable conversion)
+ERROR: 0:79: '-' :  wrong operand type no operation '-' exists that takes an operand of type layout( column_major std140 offset=0) uniform int8_t (or there is no acceptable conversion)
+ERROR: 0:80: '+' :  wrong operand types: no operation '+' exists that takes a left-hand operand of type 'layout( column_major std140 offset=0) uniform int8_t' and a right operand of type ' const int' (or there is no acceptable conversion)
+ERROR: 0:81: '.: can't swizzle types containing (u)int8' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:82: '=: can't use with structs containing int8' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:83: 'qualifier: (u)int8 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:84: 'qualifier: (u)int8 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:85: 'qualifier: (u)int8 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:86: '==' :  wrong operand types: no operation '==' exists that takes a left-hand operand of type 'layout( column_major std140 offset=0) uniform int8_t' and a right operand of type 'layout( column_major std140 offset=0) uniform int8_t' (or there is no acceptable conversion)
+ERROR: 0:87: '=: can't use with arrays containing int8' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:88: 'constructor: 8-bit vectors only take vector types' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:89: 'constructor: 8-bit arrays not supported' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:89: 'constructor: 8-bit vectors only take vector types' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:92: 'constructor: can't construct structure containing 8-bit type' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:93: 'func2' : no matching overloaded function found 
+ERROR: 0:99: '' :  syntax error, unexpected IDENTIFIER
+ERROR: 26 compilation errors.  No code generated.
+
+
+SPIR-V is not generated for failed compile or link
diff --git a/Test/baseResults/spv.8bitstorage_Error-uint.frag.out b/Test/baseResults/spv.8bitstorage_Error-uint.frag.out
new file mode 100755
index 0000000..93070f2
--- /dev/null
+++ b/Test/baseResults/spv.8bitstorage_Error-uint.frag.out
@@ -0,0 +1,71 @@
+spv.8bitstorage_Error-uint.frag
+ERROR: 0:54: 'structure: (u)int8 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:58: 'return: can't use with structs containing uint8' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:61: 'uint8_t: (u)int8 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:74: '[: does not operate on types containing (u)int8' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:75: '.: can't swizzle types containing (u)int8' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:76: 'built-in function: (u)int8 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:76: 'built-in function: (u)int8 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:76: 'built-in function: (u)int8 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:77: 'built-in function: (u)int8 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:77: 'built-in function: (u)int8 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:78: '+' :  wrong operand types: no operation '+' exists that takes a left-hand operand of type 'layout( column_major std140 offset=0) uniform uint8_t' and a right operand of type 'layout( column_major std140 offset=0) uniform uint8_t' (or there is no acceptable conversion)
+ERROR: 0:79: '-' :  wrong operand type no operation '-' exists that takes an operand of type layout( column_major std140 offset=0) uniform uint8_t (or there is no acceptable conversion)
+ERROR: 0:80: '+' :  wrong operand types: no operation '+' exists that takes a left-hand operand of type 'layout( column_major std140 offset=0) uniform uint8_t' and a right operand of type ' const int' (or there is no acceptable conversion)
+ERROR: 0:81: '.: can't swizzle types containing (u)int8' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:82: '=: can't use with structs containing uint8' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:83: 'qualifier: (u)int8 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:84: 'qualifier: (u)int8 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:85: 'qualifier: (u)int8 types can only be in uniform block or buffer storage' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:86: '==' :  wrong operand types: no operation '==' exists that takes a left-hand operand of type 'layout( column_major std140 offset=0) uniform uint8_t' and a right operand of type 'layout( column_major std140 offset=0) uniform uint8_t' (or there is no acceptable conversion)
+ERROR: 0:87: '=: can't use with arrays containing uint8' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:88: 'constructor: 8-bit vectors only take vector types' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:89: 'constructor: 8-bit arrays not supported' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:89: 'constructor: 8-bit vectors only take vector types' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:92: 'constructor: can't construct structure containing 8-bit type' : required extension not requested: Possible extensions include:
+GL_KHX_shader_explicit_arithmetic_types
+GL_KHX_shader_explicit_arithmetic_types_int8
+ERROR: 0:93: 'func2' : no matching overloaded function found 
+ERROR: 0:99: '' :  syntax error, unexpected IDENTIFIER
+ERROR: 26 compilation errors.  No code generated.
+
+
+SPIR-V is not generated for failed compile or link
diff --git a/Test/baseResults/spv.AofA.frag.out b/Test/baseResults/spv.AofA.frag.out
index aaa9a49..a19fae9 100644
--- a/Test/baseResults/spv.AofA.frag.out
+++ b/Test/baseResults/spv.AofA.frag.out
@@ -2,7 +2,7 @@
 WARNING: 0:6: '[][]' : Generating SPIR-V array-of-arrays, but Vulkan only supports single array level for this resource 
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 104
 
                               Capability Shader
diff --git a/Test/baseResults/spv.GeometryShaderPassthrough.geom.out b/Test/baseResults/spv.GeometryShaderPassthrough.geom.out
index f8a4c6d..015bd0f 100644
--- a/Test/baseResults/spv.GeometryShaderPassthrough.geom.out
+++ b/Test/baseResults/spv.GeometryShaderPassthrough.geom.out
@@ -1,6 +1,6 @@
 spv.GeometryShaderPassthrough.geom
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 15
 
                               Capability Geometry
diff --git a/Test/baseResults/spv.OVR_multiview.vert.out b/Test/baseResults/spv.OVR_multiview.vert.out
index 7eb7a9c..7013ced 100644
--- a/Test/baseResults/spv.OVR_multiview.vert.out
+++ b/Test/baseResults/spv.OVR_multiview.vert.out
@@ -1,6 +1,6 @@
 spv.OVR_multiview.vert
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 27
 
                               Capability Shader
diff --git a/Test/baseResults/spv.Operations.frag.out b/Test/baseResults/spv.Operations.frag.out
index 4d7b03c..4113ddf 100755
--- a/Test/baseResults/spv.Operations.frag.out
+++ b/Test/baseResults/spv.Operations.frag.out
@@ -1,6 +1,6 @@
 spv.Operations.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 532
 
                               Capability Shader
diff --git a/Test/baseResults/spv.accessChain.frag.out b/Test/baseResults/spv.accessChain.frag.out
index 6e57405..bf87829 100755
--- a/Test/baseResults/spv.accessChain.frag.out
+++ b/Test/baseResults/spv.accessChain.frag.out
@@ -1,6 +1,6 @@
 spv.accessChain.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 222
 
                               Capability Shader
diff --git a/Test/baseResults/spv.aggOps.frag.out b/Test/baseResults/spv.aggOps.frag.out
index f730e45..1c0c7e9 100644
--- a/Test/baseResults/spv.aggOps.frag.out
+++ b/Test/baseResults/spv.aggOps.frag.out
@@ -3,7 +3,7 @@
          "precision mediump int; precision highp float;" 
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 215
 
                               Capability Shader
diff --git a/Test/baseResults/spv.always-discard.frag.out b/Test/baseResults/spv.always-discard.frag.out
index 5831c47..8074cf8 100644
--- a/Test/baseResults/spv.always-discard.frag.out
+++ b/Test/baseResults/spv.always-discard.frag.out
@@ -1,6 +1,6 @@
 spv.always-discard.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 84
 
                               Capability Shader
diff --git a/Test/baseResults/spv.always-discard2.frag.out b/Test/baseResults/spv.always-discard2.frag.out
index e96de55..e3fa43a 100755
--- a/Test/baseResults/spv.always-discard2.frag.out
+++ b/Test/baseResults/spv.always-discard2.frag.out
@@ -1,6 +1,6 @@
 spv.always-discard2.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 40
 
                               Capability Shader
diff --git a/Test/baseResults/spv.arbPostDepthCoverage.frag.out b/Test/baseResults/spv.arbPostDepthCoverage.frag.out
index 9bb521c..f41c012 100644
--- a/Test/baseResults/spv.arbPostDepthCoverage.frag.out
+++ b/Test/baseResults/spv.arbPostDepthCoverage.frag.out
@@ -1,6 +1,6 @@
 spv.arbPostDepthCoverage.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 18
 
                               Capability Shader
diff --git a/Test/baseResults/spv.atomic.comp.out b/Test/baseResults/spv.atomic.comp.out
index b6e9903..3dd88f3 100755
--- a/Test/baseResults/spv.atomic.comp.out
+++ b/Test/baseResults/spv.atomic.comp.out
@@ -1,6 +1,6 @@
 spv.atomic.comp
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 74
 
                               Capability Shader
diff --git a/Test/baseResults/spv.atomicInt64.comp.out b/Test/baseResults/spv.atomicInt64.comp.out
index 0e1f89f..9c66aec 100644
--- a/Test/baseResults/spv.atomicInt64.comp.out
+++ b/Test/baseResults/spv.atomicInt64.comp.out
@@ -1,6 +1,6 @@
 spv.atomicInt64.comp
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 149
 
                               Capability Shader
diff --git a/Test/baseResults/spv.barrier.vert.out b/Test/baseResults/spv.barrier.vert.out
index c6ba5f5..b9369f2 100755
--- a/Test/baseResults/spv.barrier.vert.out
+++ b/Test/baseResults/spv.barrier.vert.out
@@ -1,6 +1,6 @@
 spv.barrier.vert
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 24
 
                               Capability Shader
diff --git a/Test/baseResults/spv.bitCast.frag.out b/Test/baseResults/spv.bitCast.frag.out
index 02aaca9..a687b8d 100644
--- a/Test/baseResults/spv.bitCast.frag.out
+++ b/Test/baseResults/spv.bitCast.frag.out
@@ -1,6 +1,6 @@
 spv.bitCast.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 172
 
                               Capability Shader
diff --git a/Test/baseResults/spv.bool.vert.out b/Test/baseResults/spv.bool.vert.out
index 370cc3e..becd707 100644
--- a/Test/baseResults/spv.bool.vert.out
+++ b/Test/baseResults/spv.bool.vert.out
@@ -1,6 +1,6 @@
 spv.bool.vert
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 46
 
                               Capability Shader
diff --git a/Test/baseResults/spv.boolInBlock.frag.out b/Test/baseResults/spv.boolInBlock.frag.out
index 8a79c70..e86ca6b 100644
--- a/Test/baseResults/spv.boolInBlock.frag.out
+++ b/Test/baseResults/spv.boolInBlock.frag.out
@@ -1,6 +1,6 @@
 spv.boolInBlock.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 102
 
                               Capability Shader
diff --git a/Test/baseResults/spv.branch-return.vert.out b/Test/baseResults/spv.branch-return.vert.out
index e4cc8d7..ca44724 100644
--- a/Test/baseResults/spv.branch-return.vert.out
+++ b/Test/baseResults/spv.branch-return.vert.out
@@ -1,6 +1,6 @@
 spv.branch-return.vert
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 38
 
                               Capability Shader
diff --git a/Test/baseResults/spv.buffer.autoassign.frag.out b/Test/baseResults/spv.buffer.autoassign.frag.out
index ebf64a2..507318f 100644
--- a/Test/baseResults/spv.buffer.autoassign.frag.out
+++ b/Test/baseResults/spv.buffer.autoassign.frag.out
@@ -1,6 +1,6 @@
 spv.buffer.autoassign.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 50
 
                               Capability Shader
diff --git a/Test/baseResults/spv.builtInXFB.vert.out b/Test/baseResults/spv.builtInXFB.vert.out
index 98483d4..556a698 100755
--- a/Test/baseResults/spv.builtInXFB.vert.out
+++ b/Test/baseResults/spv.builtInXFB.vert.out
@@ -1,6 +1,6 @@
 spv.builtInXFB.vert
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 21
 
                               Capability Shader
diff --git a/Test/baseResults/spv.conditionalDiscard.frag.out b/Test/baseResults/spv.conditionalDiscard.frag.out
index d16aadf..f5e9e6f 100755
--- a/Test/baseResults/spv.conditionalDiscard.frag.out
+++ b/Test/baseResults/spv.conditionalDiscard.frag.out
@@ -1,6 +1,6 @@
 spv.conditionalDiscard.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 36
 
                               Capability Shader
diff --git a/Test/baseResults/spv.constStruct.vert.out b/Test/baseResults/spv.constStruct.vert.out
index 68169cd..d04f33d 100755
--- a/Test/baseResults/spv.constStruct.vert.out
+++ b/Test/baseResults/spv.constStruct.vert.out
@@ -1,6 +1,6 @@
 spv.constStruct.vert
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 23
 
                               Capability Shader
diff --git a/Test/baseResults/spv.controlFlowAttributes.frag.out b/Test/baseResults/spv.controlFlowAttributes.frag.out
index f7e3186..eb25382 100755
--- a/Test/baseResults/spv.controlFlowAttributes.frag.out
+++ b/Test/baseResults/spv.controlFlowAttributes.frag.out
@@ -8,7 +8,7 @@
 WARNING: 0:26: '' : attribute with arguments not recognized, skipping 
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 118
 
                               Capability Shader
diff --git a/Test/baseResults/spv.conversion.frag.out b/Test/baseResults/spv.conversion.frag.out
index 63c26b3..a321532 100755
--- a/Test/baseResults/spv.conversion.frag.out
+++ b/Test/baseResults/spv.conversion.frag.out
@@ -1,6 +1,6 @@
 spv.conversion.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 455
 
                               Capability Shader
diff --git a/Test/baseResults/spv.dataOut.frag.out b/Test/baseResults/spv.dataOut.frag.out
index 19cd836..f384721 100755
--- a/Test/baseResults/spv.dataOut.frag.out
+++ b/Test/baseResults/spv.dataOut.frag.out
@@ -1,6 +1,6 @@
 spv.dataOut.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 20
 
                               Capability Shader
diff --git a/Test/baseResults/spv.dataOutIndirect.frag.out b/Test/baseResults/spv.dataOutIndirect.frag.out
index 8e87c00..c0b52ae 100755
--- a/Test/baseResults/spv.dataOutIndirect.frag.out
+++ b/Test/baseResults/spv.dataOutIndirect.frag.out
@@ -1,6 +1,6 @@
 spv.dataOutIndirect.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 26
 
                               Capability Shader
diff --git a/Test/baseResults/spv.dataOutIndirect.vert.out b/Test/baseResults/spv.dataOutIndirect.vert.out
index b36f825..9ba988c 100755
--- a/Test/baseResults/spv.dataOutIndirect.vert.out
+++ b/Test/baseResults/spv.dataOutIndirect.vert.out
@@ -2,7 +2,7 @@
 WARNING: 0:3: attribute deprecated in version 130; may be removed in future release
 
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 38
 
                               Capability Shader
diff --git a/Test/baseResults/spv.debugInfo.1.1.frag.out b/Test/baseResults/spv.debugInfo.1.1.frag.out
index f6de5e2..facaf9e 100644
--- a/Test/baseResults/spv.debugInfo.1.1.frag.out
+++ b/Test/baseResults/spv.debugInfo.1.1.frag.out
@@ -1,6 +1,6 @@
 spv.debugInfo.frag
 // Module Version 10300
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 124
 
                               Capability Shader
diff --git a/Test/baseResults/spv.debugInfo.frag.out b/Test/baseResults/spv.debugInfo.frag.out
index 809fe9a..aaa988d 100644
--- a/Test/baseResults/spv.debugInfo.frag.out
+++ b/Test/baseResults/spv.debugInfo.frag.out
@@ -1,6 +1,6 @@
 spv.debugInfo.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 124
 
                               Capability Shader
diff --git a/Test/baseResults/spv.deepRvalue.frag.out b/Test/baseResults/spv.deepRvalue.frag.out
index 296fa7d..a0e4eab 100644
--- a/Test/baseResults/spv.deepRvalue.frag.out
+++ b/Test/baseResults/spv.deepRvalue.frag.out
@@ -1,6 +1,6 @@
 spv.deepRvalue.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 152
 
                               Capability Shader
diff --git a/Test/baseResults/spv.depthOut.frag.out b/Test/baseResults/spv.depthOut.frag.out
index 6d3f023..5da0df0 100755
--- a/Test/baseResults/spv.depthOut.frag.out
+++ b/Test/baseResults/spv.depthOut.frag.out
@@ -1,6 +1,6 @@
 spv.depthOut.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 15
 
                               Capability Shader
diff --git a/Test/baseResults/spv.deviceGroup.frag.out b/Test/baseResults/spv.deviceGroup.frag.out
index 92767aa..6710b77 100644
--- a/Test/baseResults/spv.deviceGroup.frag.out
+++ b/Test/baseResults/spv.deviceGroup.frag.out
@@ -1,6 +1,6 @@
 spv.deviceGroup.frag
 // Module Version 10300
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 17
 
                               Capability Shader
diff --git a/Test/baseResults/spv.discard-dce.frag.out b/Test/baseResults/spv.discard-dce.frag.out
index e48aff2..9d138f2 100755
--- a/Test/baseResults/spv.discard-dce.frag.out
+++ b/Test/baseResults/spv.discard-dce.frag.out
@@ -1,6 +1,6 @@
 spv.discard-dce.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 84
 
                               Capability Shader
diff --git a/Test/baseResults/spv.do-simple.vert.out b/Test/baseResults/spv.do-simple.vert.out
index 0117c8f..6014dfe 100755
--- a/Test/baseResults/spv.do-simple.vert.out
+++ b/Test/baseResults/spv.do-simple.vert.out
@@ -1,6 +1,6 @@
 spv.do-simple.vert
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 21
 
                               Capability Shader
diff --git a/Test/baseResults/spv.do-while-continue-break.vert.out b/Test/baseResults/spv.do-while-continue-break.vert.out
index 2fceb4c..2838880 100644
--- a/Test/baseResults/spv.do-while-continue-break.vert.out
+++ b/Test/baseResults/spv.do-while-continue-break.vert.out
@@ -1,6 +1,6 @@
 spv.do-while-continue-break.vert
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 43
 
                               Capability Shader
diff --git a/Test/baseResults/spv.doWhileLoop.frag.out b/Test/baseResults/spv.doWhileLoop.frag.out
index dc8c0be..808466e 100755
--- a/Test/baseResults/spv.doWhileLoop.frag.out
+++ b/Test/baseResults/spv.doWhileLoop.frag.out
@@ -1,6 +1,6 @@
 spv.doWhileLoop.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 34
 
                               Capability Shader
diff --git a/Test/baseResults/spv.double.comp.out b/Test/baseResults/spv.double.comp.out
index 6f825c9..eb8e122 100755
--- a/Test/baseResults/spv.double.comp.out
+++ b/Test/baseResults/spv.double.comp.out
@@ -1,6 +1,6 @@
 spv.double.comp
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 60
 
                               Capability Shader
diff --git a/Test/baseResults/spv.drawParams.vert.out b/Test/baseResults/spv.drawParams.vert.out
index af7519b..8f3e2c0 100644
--- a/Test/baseResults/spv.drawParams.vert.out
+++ b/Test/baseResults/spv.drawParams.vert.out
@@ -1,6 +1,6 @@
 spv.drawParams.vert
 // Module Version 10300
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 29
 
                               Capability Shader
diff --git a/Test/baseResults/spv.earlyReturnDiscard.frag.out b/Test/baseResults/spv.earlyReturnDiscard.frag.out
index c854a7b..c44b722 100755
--- a/Test/baseResults/spv.earlyReturnDiscard.frag.out
+++ b/Test/baseResults/spv.earlyReturnDiscard.frag.out
@@ -1,6 +1,6 @@
 spv.earlyReturnDiscard.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 110
 
                               Capability Shader
diff --git a/Test/baseResults/spv.explicittypes.frag.out b/Test/baseResults/spv.explicittypes.frag.out
index 1fb2485..6f7f2b9 100755
--- a/Test/baseResults/spv.explicittypes.frag.out
+++ b/Test/baseResults/spv.explicittypes.frag.out
@@ -1,6 +1,6 @@
 spv.explicittypes.frag
 // Module Version 10300
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 576
 
                               Capability Shader
@@ -51,13 +51,13 @@
                               Name 133  "u8v"
                               Name 136  "i8v"
                               Name 141  "i16v"
-                              Name 149  "i32v"
-                              Name 157  "u32v"
-                              Name 163  "i64v"
-                              Name 168  "u64v"
-                              Name 182  "f16v"
-                              Name 188  "f32v"
-                              Name 194  "f64v"
+                              Name 150  "i32v"
+                              Name 158  "u32v"
+                              Name 164  "i64v"
+                              Name 169  "u64v"
+                              Name 183  "f16v"
+                              Name 189  "f32v"
+                              Name 195  "f64v"
                               Name 222  "u16v"
                               Name 252  "bv"
                               Name 268  "i32v"
@@ -212,25 +212,25 @@
              135:             TypePointer Function 134(i8vec2)
              139:             TypeVector 77(int16_t) 2
              140:             TypePointer Function 139(i16vec2)
-             147:             TypeVector 29(int) 2
-             148:             TypePointer Function 147(ivec2)
-             155:             TypeVector 19(int) 2
-             156:             TypePointer Function 155(ivec2)
-             161:             TypeVector 16(int64_t) 2
-             162:             TypePointer Function 161(i64vec2)
-             166:             TypeVector 38(int64_t) 2
-             167:             TypePointer Function 166(i64vec2)
-             179:             TypeFloat 16
-             180:             TypeVector 179(float16_t) 2
-             181:             TypePointer Function 180(f16vec2)
-             185:             TypeFloat 32
-             186:             TypeVector 185(float) 2
-             187:             TypePointer Function 186(fvec2)
-             191:             TypeFloat 64
-             192:             TypeVector 191(float64_t) 2
-             193:             TypePointer Function 192(f64vec2)
-             220:             TypeVector 91(int16_t) 2
-             221:             TypePointer Function 220(i16vec2)
+             145:             TypeVector 91(int16_t) 2
+             148:             TypeVector 29(int) 2
+             149:             TypePointer Function 148(ivec2)
+             154:             TypeVector 19(int) 2
+             157:             TypePointer Function 154(ivec2)
+             162:             TypeVector 16(int64_t) 2
+             163:             TypePointer Function 162(i64vec2)
+             167:             TypeVector 38(int64_t) 2
+             168:             TypePointer Function 167(i64vec2)
+             180:             TypeFloat 16
+             181:             TypeVector 180(float16_t) 2
+             182:             TypePointer Function 181(f16vec2)
+             186:             TypeFloat 32
+             187:             TypeVector 186(float) 2
+             188:             TypePointer Function 187(fvec2)
+             192:             TypeFloat 64
+             193:             TypeVector 192(float64_t) 2
+             194:             TypePointer Function 193(f64vec2)
+             221:             TypePointer Function 145(i16vec2)
              249:             TypeBool
              250:             TypeVector 249(bool) 2
              251:             TypePointer Function 250(bvec2)
@@ -247,23 +247,23 @@
              368:139(i16vec2) ConstantComposite 366 366
              371: 91(int16_t) Constant 0
              372: 91(int16_t) Constant 1
-             373:220(i16vec2) ConstantComposite 371 371
-             374:220(i16vec2) ConstantComposite 372 372
+             373:145(i16vec2) ConstantComposite 371 371
+             374:145(i16vec2) ConstantComposite 372 372
              467:     29(int) Constant 1
-             468:  147(ivec2) ConstantComposite 30 30
-             469:  147(ivec2) ConstantComposite 467 467
+             468:  148(ivec2) ConstantComposite 30 30
+             469:  148(ivec2) ConstantComposite 467 467
              472:     19(int) Constant 0
              473:     19(int) Constant 1
-             474:  155(ivec2) ConstantComposite 472 472
-             475:  155(ivec2) ConstantComposite 473 473
+             474:  154(ivec2) ConstantComposite 472 472
+             475:  154(ivec2) ConstantComposite 473 473
              550: 16(int64_t) Constant 0 0
              551: 16(int64_t) Constant 1 0
-             552:161(i64vec2) ConstantComposite 550 550
-             553:161(i64vec2) ConstantComposite 551 551
+             552:162(i64vec2) ConstantComposite 550 550
+             553:162(i64vec2) ConstantComposite 551 551
              556: 38(int64_t) Constant 0 0
              557: 38(int64_t) Constant 1 0
-             558:166(i64vec2) ConstantComposite 556 556
-             559:166(i64vec2) ConstantComposite 557 557
+             558:167(i64vec2) ConstantComposite 556 556
+             559:167(i64vec2) ConstantComposite 557 557
              565:             TypeVector 77(int16_t) 3
              566:             TypeVector 77(int16_t) 4
              567:             TypeVector 91(int16_t) 3
@@ -272,7 +272,7 @@
              570:             TypeVector 29(int) 4
              571:             TypeVector 19(int) 3
              572:             TypeVector 19(int) 4
-      573(Block):             TypeStruct 77(int16_t) 139(i16vec2) 565(i16vec3) 566(i16vec4) 91(int16_t) 220(i16vec2) 567(i16vec3) 568(i16vec4) 29(int) 147(ivec2) 569(ivec3) 570(ivec4) 19(int) 155(ivec2) 571(ivec3) 572(ivec4)
+      573(Block):             TypeStruct 77(int16_t) 139(i16vec2) 565(i16vec3) 566(i16vec4) 91(int16_t) 145(i16vec2) 567(i16vec3) 568(i16vec4) 29(int) 148(ivec2) 569(ivec3) 570(ivec4) 19(int) 154(ivec2) 571(ivec3) 572(ivec4)
              574:             TypePointer Uniform 573(Block)
       575(block):    574(ptr) Variable Uniform
          4(main):           2 Function None 3
@@ -352,13 +352,13 @@
         133(u8v):    132(ptr) Variable Function
         136(i8v):    135(ptr) Variable Function
        141(i16v):    140(ptr) Variable Function
-       149(i32v):    148(ptr) Variable Function
-       157(u32v):    156(ptr) Variable Function
-       163(i64v):    162(ptr) Variable Function
-       168(u64v):    167(ptr) Variable Function
-       182(f16v):    181(ptr) Variable Function
-       188(f32v):    187(ptr) Variable Function
-       194(f64v):    193(ptr) Variable Function
+       150(i32v):    149(ptr) Variable Function
+       158(u32v):    157(ptr) Variable Function
+       164(i64v):    163(ptr) Variable Function
+       169(u64v):    168(ptr) Variable Function
+       183(f16v):    182(ptr) Variable Function
+       189(f32v):    188(ptr) Variable Function
+       195(f64v):    194(ptr) Variable Function
        222(u16v):    221(ptr) Variable Function
          252(bv):    251(ptr) Variable Function
              137: 134(i8vec2) Load 136(i8v)
@@ -368,116 +368,116 @@
              143:139(i16vec2) SConvert 142
                               Store 141(i16v) 143
              144: 131(i8vec2) Load 133(u8v)
-             145:139(i16vec2) UConvert 144
-             146:139(i16vec2) Bitcast 145
-                              Store 141(i16v) 146
-             150: 134(i8vec2) Load 136(i8v)
-             151:  147(ivec2) SConvert 150
-                              Store 149(i32v) 151
-             152: 131(i8vec2) Load 133(u8v)
-             153:  147(ivec2) UConvert 152
-             154:  147(ivec2) Bitcast 153
-                              Store 149(i32v) 154
-             158: 134(i8vec2) Load 136(i8v)
-             159:  147(ivec2) SConvert 158
-             160:  155(ivec2) Bitcast 159
-                              Store 157(u32v) 160
-             164: 134(i8vec2) Load 136(i8v)
-             165:161(i64vec2) SConvert 164
-                              Store 163(i64v) 165
-             169: 134(i8vec2) Load 136(i8v)
-             170:161(i64vec2) SConvert 169
-             171:166(i64vec2) Bitcast 170
-                              Store 168(u64v) 171
-             172: 131(i8vec2) Load 133(u8v)
-             173:  155(ivec2) UConvert 172
-                              Store 157(u32v) 173
-             174: 131(i8vec2) Load 133(u8v)
-             175:161(i64vec2) UConvert 174
-             176:161(i64vec2) Bitcast 175
-                              Store 163(i64v) 176
-             177: 131(i8vec2) Load 133(u8v)
-             178:166(i64vec2) UConvert 177
-                              Store 168(u64v) 178
-             183: 134(i8vec2) Load 136(i8v)
-             184:180(f16vec2) ConvertSToF 183
-                              Store 182(f16v) 184
-             189: 134(i8vec2) Load 136(i8v)
-             190:  186(fvec2) ConvertSToF 189
-                              Store 188(f32v) 190
-             195: 134(i8vec2) Load 136(i8v)
-             196:192(f64vec2) ConvertSToF 195
-                              Store 194(f64v) 196
-             197: 131(i8vec2) Load 133(u8v)
-             198:180(f16vec2) ConvertUToF 197
-                              Store 182(f16v) 198
-             199: 131(i8vec2) Load 133(u8v)
-             200:  186(fvec2) ConvertUToF 199
-                              Store 188(f32v) 200
-             201: 131(i8vec2) Load 133(u8v)
-             202:192(f64vec2) ConvertUToF 201
-                              Store 194(f64v) 202
-             203: 131(i8vec2) Load 133(u8v)
-             204: 134(i8vec2) Bitcast 203
-                              Store 136(i8v) 204
-             205: 134(i8vec2) Load 136(i8v)
-             206:139(i16vec2) SConvert 205
-                              Store 141(i16v) 206
-             207: 131(i8vec2) Load 133(u8v)
-             208:139(i16vec2) UConvert 207
-             209:139(i16vec2) Bitcast 208
-                              Store 141(i16v) 209
-             210: 134(i8vec2) Load 136(i8v)
-             211:  147(ivec2) SConvert 210
-                              Store 149(i32v) 211
-             212: 131(i8vec2) Load 133(u8v)
-             213:  147(ivec2) UConvert 212
-             214:  147(ivec2) Bitcast 213
-                              Store 149(i32v) 214
-             215: 134(i8vec2) Load 136(i8v)
-             216:161(i64vec2) SConvert 215
-                              Store 163(i64v) 216
-             217: 134(i8vec2) Load 136(i8v)
-             218:161(i64vec2) SConvert 217
-             219:166(i64vec2) Bitcast 218
-                              Store 168(u64v) 219
+             146:145(i16vec2) UConvert 144
+             147:139(i16vec2) Bitcast 146
+                              Store 141(i16v) 147
+             151: 134(i8vec2) Load 136(i8v)
+             152:  148(ivec2) SConvert 151
+                              Store 150(i32v) 152
+             153: 131(i8vec2) Load 133(u8v)
+             155:  154(ivec2) UConvert 153
+             156:  148(ivec2) Bitcast 155
+                              Store 150(i32v) 156
+             159: 134(i8vec2) Load 136(i8v)
+             160:  148(ivec2) SConvert 159
+             161:  154(ivec2) Bitcast 160
+                              Store 158(u32v) 161
+             165: 134(i8vec2) Load 136(i8v)
+             166:162(i64vec2) SConvert 165
+                              Store 164(i64v) 166
+             170: 134(i8vec2) Load 136(i8v)
+             171:162(i64vec2) SConvert 170
+             172:167(i64vec2) Bitcast 171
+                              Store 169(u64v) 172
+             173: 131(i8vec2) Load 133(u8v)
+             174:  154(ivec2) UConvert 173
+                              Store 158(u32v) 174
+             175: 131(i8vec2) Load 133(u8v)
+             176:167(i64vec2) UConvert 175
+             177:162(i64vec2) Bitcast 176
+                              Store 164(i64v) 177
+             178: 131(i8vec2) Load 133(u8v)
+             179:167(i64vec2) UConvert 178
+                              Store 169(u64v) 179
+             184: 134(i8vec2) Load 136(i8v)
+             185:181(f16vec2) ConvertSToF 184
+                              Store 183(f16v) 185
+             190: 134(i8vec2) Load 136(i8v)
+             191:  187(fvec2) ConvertSToF 190
+                              Store 189(f32v) 191
+             196: 134(i8vec2) Load 136(i8v)
+             197:193(f64vec2) ConvertSToF 196
+                              Store 195(f64v) 197
+             198: 131(i8vec2) Load 133(u8v)
+             199:181(f16vec2) ConvertUToF 198
+                              Store 183(f16v) 199
+             200: 131(i8vec2) Load 133(u8v)
+             201:  187(fvec2) ConvertUToF 200
+                              Store 189(f32v) 201
+             202: 131(i8vec2) Load 133(u8v)
+             203:193(f64vec2) ConvertUToF 202
+                              Store 195(f64v) 203
+             204: 131(i8vec2) Load 133(u8v)
+             205: 134(i8vec2) Bitcast 204
+                              Store 136(i8v) 205
+             206: 134(i8vec2) Load 136(i8v)
+             207:139(i16vec2) SConvert 206
+                              Store 141(i16v) 207
+             208: 131(i8vec2) Load 133(u8v)
+             209:145(i16vec2) UConvert 208
+             210:139(i16vec2) Bitcast 209
+                              Store 141(i16v) 210
+             211: 134(i8vec2) Load 136(i8v)
+             212:  148(ivec2) SConvert 211
+                              Store 150(i32v) 212
+             213: 131(i8vec2) Load 133(u8v)
+             214:  154(ivec2) UConvert 213
+             215:  148(ivec2) Bitcast 214
+                              Store 150(i32v) 215
+             216: 134(i8vec2) Load 136(i8v)
+             217:162(i64vec2) SConvert 216
+                              Store 164(i64v) 217
+             218: 134(i8vec2) Load 136(i8v)
+             219:162(i64vec2) SConvert 218
+             220:167(i64vec2) Bitcast 219
+                              Store 169(u64v) 220
              223: 134(i8vec2) Load 136(i8v)
              224:139(i16vec2) SConvert 223
-             225:220(i16vec2) Bitcast 224
+             225:145(i16vec2) Bitcast 224
                               Store 222(u16v) 225
              226: 131(i8vec2) Load 133(u8v)
-             227:220(i16vec2) UConvert 226
+             227:145(i16vec2) UConvert 226
                               Store 222(u16v) 227
              228: 131(i8vec2) Load 133(u8v)
-             229:  155(ivec2) UConvert 228
-                              Store 157(u32v) 229
+             229:  154(ivec2) UConvert 228
+                              Store 158(u32v) 229
              230: 131(i8vec2) Load 133(u8v)
-             231:161(i64vec2) UConvert 230
-             232:161(i64vec2) Bitcast 231
-                              Store 163(i64v) 232
+             231:167(i64vec2) UConvert 230
+             232:162(i64vec2) Bitcast 231
+                              Store 164(i64v) 232
              233: 131(i8vec2) Load 133(u8v)
-             234:161(i64vec2) UConvert 233
-             235:161(i64vec2) Bitcast 234
-             236:166(i64vec2) Bitcast 235
-                              Store 168(u64v) 236
+             234:167(i64vec2) UConvert 233
+             235:162(i64vec2) Bitcast 234
+             236:167(i64vec2) Bitcast 235
+                              Store 169(u64v) 236
              237: 134(i8vec2) Load 136(i8v)
-             238:180(f16vec2) ConvertSToF 237
-                              Store 182(f16v) 238
+             238:181(f16vec2) ConvertSToF 237
+                              Store 183(f16v) 238
              239: 134(i8vec2) Load 136(i8v)
-             240:  186(fvec2) ConvertSToF 239
-                              Store 188(f32v) 240
+             240:  187(fvec2) ConvertSToF 239
+                              Store 189(f32v) 240
              241: 134(i8vec2) Load 136(i8v)
-             242:192(f64vec2) ConvertSToF 241
-                              Store 194(f64v) 242
+             242:193(f64vec2) ConvertSToF 241
+                              Store 195(f64v) 242
              243: 131(i8vec2) Load 133(u8v)
-             244:180(f16vec2) ConvertUToF 243
-                              Store 182(f16v) 244
+             244:181(f16vec2) ConvertUToF 243
+                              Store 183(f16v) 244
              245: 131(i8vec2) Load 133(u8v)
-             246:  186(fvec2) ConvertUToF 245
-                              Store 188(f32v) 246
+             246:  187(fvec2) ConvertUToF 245
+                              Store 189(f32v) 246
              247: 131(i8vec2) Load 133(u8v)
-             248:192(f64vec2) ConvertUToF 247
-                              Store 194(f64v) 248
+             248:193(f64vec2) ConvertUToF 247
+                              Store 195(f64v) 248
              253:  250(bvec2) Load 252(bv)
              257: 134(i8vec2) Select 253 256 255
                               Store 136(i8v) 257
@@ -494,388 +494,388 @@
                               FunctionEnd
  10(typeCast16():           2 Function None 3
               11:             Label
-       268(i32v):    148(ptr) Variable Function
+       268(i32v):    149(ptr) Variable Function
        269(i16v):    140(ptr) Variable Function
        272(u16v):    221(ptr) Variable Function
-       278(u32v):    156(ptr) Variable Function
-       282(i64v):    162(ptr) Variable Function
-       285(u64v):    167(ptr) Variable Function
-       296(f16v):    181(ptr) Variable Function
-       299(f32v):    187(ptr) Variable Function
-       302(f64v):    193(ptr) Variable Function
+       278(u32v):    157(ptr) Variable Function
+       282(i64v):    163(ptr) Variable Function
+       285(u64v):    168(ptr) Variable Function
+       296(f16v):    182(ptr) Variable Function
+       299(f32v):    188(ptr) Variable Function
+       302(f64v):    194(ptr) Variable Function
         347(i8v):    135(ptr) Variable Function
         353(u8v):    132(ptr) Variable Function
          363(bv):    251(ptr) Variable Function
              270:139(i16vec2) Load 269(i16v)
-             271:  147(ivec2) SConvert 270
+             271:  148(ivec2) SConvert 270
                               Store 268(i32v) 271
-             273:220(i16vec2) Load 272(u16v)
-             274:  147(ivec2) UConvert 273
-             275:  147(ivec2) Bitcast 274
+             273:145(i16vec2) Load 272(u16v)
+             274:  154(ivec2) UConvert 273
+             275:  148(ivec2) Bitcast 274
                               Store 268(i32v) 275
              276:139(i16vec2) Load 269(i16v)
-             277:220(i16vec2) Bitcast 276
+             277:145(i16vec2) Bitcast 276
                               Store 272(u16v) 277
              279:139(i16vec2) Load 269(i16v)
-             280:  147(ivec2) SConvert 279
-             281:  155(ivec2) Bitcast 280
+             280:  148(ivec2) SConvert 279
+             281:  154(ivec2) Bitcast 280
                               Store 278(u32v) 281
              283:139(i16vec2) Load 269(i16v)
-             284:161(i64vec2) SConvert 283
+             284:162(i64vec2) SConvert 283
                               Store 282(i64v) 284
              286:139(i16vec2) Load 269(i16v)
-             287:161(i64vec2) SConvert 286
-             288:166(i64vec2) Bitcast 287
+             287:162(i64vec2) SConvert 286
+             288:167(i64vec2) Bitcast 287
                               Store 285(u64v) 288
-             289:220(i16vec2) Load 272(u16v)
-             290:  155(ivec2) UConvert 289
+             289:145(i16vec2) Load 272(u16v)
+             290:  154(ivec2) UConvert 289
                               Store 278(u32v) 290
-             291:220(i16vec2) Load 272(u16v)
-             292:161(i64vec2) UConvert 291
-             293:161(i64vec2) Bitcast 292
+             291:145(i16vec2) Load 272(u16v)
+             292:167(i64vec2) UConvert 291
+             293:162(i64vec2) Bitcast 292
                               Store 282(i64v) 293
-             294:220(i16vec2) Load 272(u16v)
-             295:166(i64vec2) UConvert 294
+             294:145(i16vec2) Load 272(u16v)
+             295:167(i64vec2) UConvert 294
                               Store 285(u64v) 295
              297:139(i16vec2) Load 269(i16v)
-             298:180(f16vec2) ConvertSToF 297
+             298:181(f16vec2) ConvertSToF 297
                               Store 296(f16v) 298
              300:139(i16vec2) Load 269(i16v)
-             301:  186(fvec2) ConvertSToF 300
+             301:  187(fvec2) ConvertSToF 300
                               Store 299(f32v) 301
              303:139(i16vec2) Load 269(i16v)
-             304:192(f64vec2) ConvertSToF 303
+             304:193(f64vec2) ConvertSToF 303
                               Store 302(f64v) 304
-             305:220(i16vec2) Load 272(u16v)
-             306:180(f16vec2) ConvertUToF 305
+             305:145(i16vec2) Load 272(u16v)
+             306:181(f16vec2) ConvertUToF 305
                               Store 296(f16v) 306
-             307:220(i16vec2) Load 272(u16v)
-             308:  186(fvec2) ConvertUToF 307
+             307:145(i16vec2) Load 272(u16v)
+             308:  187(fvec2) ConvertUToF 307
                               Store 299(f32v) 308
-             309:220(i16vec2) Load 272(u16v)
-             310:192(f64vec2) ConvertUToF 309
+             309:145(i16vec2) Load 272(u16v)
+             310:193(f64vec2) ConvertUToF 309
                               Store 302(f64v) 310
              311:139(i16vec2) Load 269(i16v)
-             312:  147(ivec2) SConvert 311
+             312:  148(ivec2) SConvert 311
                               Store 268(i32v) 312
-             313:220(i16vec2) Load 272(u16v)
-             314:  147(ivec2) UConvert 313
-             315:  147(ivec2) Bitcast 314
+             313:145(i16vec2) Load 272(u16v)
+             314:  154(ivec2) UConvert 313
+             315:  148(ivec2) Bitcast 314
                               Store 268(i32v) 315
              316:139(i16vec2) Load 269(i16v)
-             317:220(i16vec2) Bitcast 316
+             317:145(i16vec2) Bitcast 316
                               Store 272(u16v) 317
              318:139(i16vec2) Load 269(i16v)
-             319:  147(ivec2) SConvert 318
-             320:  155(ivec2) Bitcast 319
+             319:  148(ivec2) SConvert 318
+             320:  154(ivec2) Bitcast 319
                               Store 278(u32v) 320
              321:139(i16vec2) Load 269(i16v)
-             322:161(i64vec2) SConvert 321
+             322:162(i64vec2) SConvert 321
                               Store 282(i64v) 322
              323:139(i16vec2) Load 269(i16v)
-             324:161(i64vec2) SConvert 323
-             325:166(i64vec2) Bitcast 324
+             324:162(i64vec2) SConvert 323
+             325:167(i64vec2) Bitcast 324
                               Store 285(u64v) 325
-             326:220(i16vec2) Load 272(u16v)
-             327:  155(ivec2) UConvert 326
+             326:145(i16vec2) Load 272(u16v)
+             327:  154(ivec2) UConvert 326
                               Store 278(u32v) 327
-             328:220(i16vec2) Load 272(u16v)
-             329:161(i64vec2) UConvert 328
-             330:161(i64vec2) Bitcast 329
+             328:145(i16vec2) Load 272(u16v)
+             329:167(i64vec2) UConvert 328
+             330:162(i64vec2) Bitcast 329
                               Store 282(i64v) 330
-             331:220(i16vec2) Load 272(u16v)
-             332:161(i64vec2) UConvert 331
-             333:161(i64vec2) Bitcast 332
-             334:166(i64vec2) Bitcast 333
+             331:145(i16vec2) Load 272(u16v)
+             332:167(i64vec2) UConvert 331
+             333:162(i64vec2) Bitcast 332
+             334:167(i64vec2) Bitcast 333
                               Store 285(u64v) 334
              335:139(i16vec2) Load 269(i16v)
-             336:180(f16vec2) ConvertSToF 335
+             336:181(f16vec2) ConvertSToF 335
                               Store 296(f16v) 336
              337:139(i16vec2) Load 269(i16v)
-             338:  186(fvec2) ConvertSToF 337
+             338:  187(fvec2) ConvertSToF 337
                               Store 299(f32v) 338
              339:139(i16vec2) Load 269(i16v)
-             340:192(f64vec2) ConvertSToF 339
+             340:193(f64vec2) ConvertSToF 339
                               Store 302(f64v) 340
-             341:220(i16vec2) Load 272(u16v)
-             342:180(f16vec2) ConvertUToF 341
+             341:145(i16vec2) Load 272(u16v)
+             342:181(f16vec2) ConvertUToF 341
                               Store 296(f16v) 342
-             343:220(i16vec2) Load 272(u16v)
-             344:  186(fvec2) ConvertUToF 343
+             343:145(i16vec2) Load 272(u16v)
+             344:  187(fvec2) ConvertUToF 343
                               Store 299(f32v) 344
-             345:220(i16vec2) Load 272(u16v)
-             346:192(f64vec2) ConvertUToF 345
+             345:145(i16vec2) Load 272(u16v)
+             346:193(f64vec2) ConvertUToF 345
                               Store 302(f64v) 346
              348:139(i16vec2) Load 269(i16v)
              349: 134(i8vec2) SConvert 348
                               Store 347(i8v) 349
-             350:220(i16vec2) Load 272(u16v)
-             351: 134(i8vec2) UConvert 350
+             350:145(i16vec2) Load 272(u16v)
+             351: 131(i8vec2) UConvert 350
              352: 134(i8vec2) Bitcast 351
                               Store 347(i8v) 352
              354:139(i16vec2) Load 269(i16v)
              355: 134(i8vec2) SConvert 354
              356: 131(i8vec2) Bitcast 355
                               Store 353(u8v) 356
-             357:220(i16vec2) Load 272(u16v)
+             357:145(i16vec2) Load 272(u16v)
              358: 131(i8vec2) UConvert 357
                               Store 353(u8v) 358
-             359:220(i16vec2) Load 272(u16v)
+             359:145(i16vec2) Load 272(u16v)
              360: 131(i8vec2) UConvert 359
-             361:139(i16vec2) UConvert 360
+             361:145(i16vec2) UConvert 360
              362:139(i16vec2) Bitcast 361
                               Store 269(i16v) 362
              364:  250(bvec2) Load 363(bv)
              369:139(i16vec2) Select 364 368 367
                               Store 269(i16v) 369
              370:  250(bvec2) Load 363(bv)
-             375:220(i16vec2) Select 370 374 373
+             375:145(i16vec2) Select 370 374 373
                               Store 272(u16v) 375
              376:139(i16vec2) Load 269(i16v)
              377:  250(bvec2) INotEqual 376 373
                               Store 363(bv) 377
-             378:220(i16vec2) Load 272(u16v)
+             378:145(i16vec2) Load 272(u16v)
              379:  250(bvec2) INotEqual 378 373
                               Store 363(bv) 379
                               Return
                               FunctionEnd
  12(typeCast32():           2 Function None 3
               13:             Label
-       380(u32v):    156(ptr) Variable Function
-       381(i32v):    148(ptr) Variable Function
-       384(i64v):    162(ptr) Variable Function
-       387(u64v):    167(ptr) Variable Function
-       396(f32v):    187(ptr) Variable Function
-       399(f64v):    193(ptr) Variable Function
+       380(u32v):    157(ptr) Variable Function
+       381(i32v):    149(ptr) Variable Function
+       384(i64v):    163(ptr) Variable Function
+       387(u64v):    168(ptr) Variable Function
+       396(f32v):    188(ptr) Variable Function
+       399(f64v):    194(ptr) Variable Function
         406(i8v):    135(ptr) Variable Function
        412(i16v):    140(ptr) Variable Function
         429(u8v):    132(ptr) Variable Function
        435(u16v):    221(ptr) Variable Function
-       452(f16v):    181(ptr) Variable Function
+       452(f16v):    182(ptr) Variable Function
          465(bv):    251(ptr) Variable Function
-             382:  147(ivec2) Load 381(i32v)
-             383:  155(ivec2) Bitcast 382
+             382:  148(ivec2) Load 381(i32v)
+             383:  154(ivec2) Bitcast 382
                               Store 380(u32v) 383
-             385:  147(ivec2) Load 381(i32v)
-             386:161(i64vec2) SConvert 385
+             385:  148(ivec2) Load 381(i32v)
+             386:162(i64vec2) SConvert 385
                               Store 384(i64v) 386
-             388:  147(ivec2) Load 381(i32v)
-             389:161(i64vec2) SConvert 388
-             390:166(i64vec2) Bitcast 389
+             388:  148(ivec2) Load 381(i32v)
+             389:162(i64vec2) SConvert 388
+             390:167(i64vec2) Bitcast 389
                               Store 387(u64v) 390
-             391:  155(ivec2) Load 380(u32v)
-             392:161(i64vec2) UConvert 391
-             393:161(i64vec2) Bitcast 392
+             391:  154(ivec2) Load 380(u32v)
+             392:167(i64vec2) UConvert 391
+             393:162(i64vec2) Bitcast 392
                               Store 384(i64v) 393
-             394:  155(ivec2) Load 380(u32v)
-             395:166(i64vec2) UConvert 394
+             394:  154(ivec2) Load 380(u32v)
+             395:167(i64vec2) UConvert 394
                               Store 387(u64v) 395
-             397:  147(ivec2) Load 381(i32v)
-             398:  186(fvec2) ConvertSToF 397
+             397:  148(ivec2) Load 381(i32v)
+             398:  187(fvec2) ConvertSToF 397
                               Store 396(f32v) 398
-             400:  147(ivec2) Load 381(i32v)
-             401:192(f64vec2) ConvertSToF 400
+             400:  148(ivec2) Load 381(i32v)
+             401:193(f64vec2) ConvertSToF 400
                               Store 399(f64v) 401
-             402:  155(ivec2) Load 380(u32v)
-             403:  186(fvec2) ConvertUToF 402
+             402:  154(ivec2) Load 380(u32v)
+             403:  187(fvec2) ConvertUToF 402
                               Store 396(f32v) 403
-             404:  155(ivec2) Load 380(u32v)
-             405:192(f64vec2) ConvertUToF 404
+             404:  154(ivec2) Load 380(u32v)
+             405:193(f64vec2) ConvertUToF 404
                               Store 399(f64v) 405
-             407:  147(ivec2) Load 381(i32v)
+             407:  148(ivec2) Load 381(i32v)
              408: 134(i8vec2) SConvert 407
                               Store 406(i8v) 408
-             409:  155(ivec2) Load 380(u32v)
-             410: 134(i8vec2) UConvert 409
+             409:  154(ivec2) Load 380(u32v)
+             410: 131(i8vec2) UConvert 409
              411: 134(i8vec2) Bitcast 410
                               Store 406(i8v) 411
-             413:  147(ivec2) Load 381(i32v)
+             413:  148(ivec2) Load 381(i32v)
              414:139(i16vec2) SConvert 413
                               Store 412(i16v) 414
-             415:  155(ivec2) Load 380(u32v)
-             416:139(i16vec2) UConvert 415
+             415:  154(ivec2) Load 380(u32v)
+             416:145(i16vec2) UConvert 415
              417:139(i16vec2) Bitcast 416
                               Store 412(i16v) 417
-             418:  147(ivec2) Load 381(i32v)
+             418:  148(ivec2) Load 381(i32v)
              419:     29(int) CompositeExtract 418 0
              420:     29(int) CompositeExtract 418 1
-             421:  147(ivec2) CompositeConstruct 419 420
+             421:  148(ivec2) CompositeConstruct 419 420
                               Store 381(i32v) 421
-             422:  155(ivec2) Load 380(u32v)
-             423:  147(ivec2) Bitcast 422
+             422:  154(ivec2) Load 380(u32v)
+             423:  148(ivec2) Bitcast 422
                               Store 381(i32v) 423
-             424:  147(ivec2) Load 381(i32v)
-             425:161(i64vec2) SConvert 424
+             424:  148(ivec2) Load 381(i32v)
+             425:162(i64vec2) SConvert 424
                               Store 384(i64v) 425
-             426:  155(ivec2) Load 380(u32v)
-             427:161(i64vec2) UConvert 426
-             428:161(i64vec2) Bitcast 427
+             426:  154(ivec2) Load 380(u32v)
+             427:167(i64vec2) UConvert 426
+             428:162(i64vec2) Bitcast 427
                               Store 384(i64v) 428
-             430:  147(ivec2) Load 381(i32v)
+             430:  148(ivec2) Load 381(i32v)
              431: 134(i8vec2) SConvert 430
              432: 131(i8vec2) Bitcast 431
                               Store 429(u8v) 432
-             433:  155(ivec2) Load 380(u32v)
+             433:  154(ivec2) Load 380(u32v)
              434: 131(i8vec2) UConvert 433
                               Store 429(u8v) 434
-             436:  147(ivec2) Load 381(i32v)
+             436:  148(ivec2) Load 381(i32v)
              437:139(i16vec2) SConvert 436
-             438:220(i16vec2) Bitcast 437
+             438:145(i16vec2) Bitcast 437
                               Store 435(u16v) 438
-             439:  155(ivec2) Load 380(u32v)
-             440:220(i16vec2) UConvert 439
+             439:  154(ivec2) Load 380(u32v)
+             440:145(i16vec2) UConvert 439
                               Store 435(u16v) 440
-             441:  147(ivec2) Load 381(i32v)
-             442:  155(ivec2) Bitcast 441
+             441:  148(ivec2) Load 381(i32v)
+             442:  154(ivec2) Bitcast 441
                               Store 380(u32v) 442
-             443:  155(ivec2) Load 380(u32v)
+             443:  154(ivec2) Load 380(u32v)
              444:     19(int) CompositeExtract 443 0
              445:     19(int) CompositeExtract 443 1
-             446:  155(ivec2) CompositeConstruct 444 445
+             446:  154(ivec2) CompositeConstruct 444 445
                               Store 380(u32v) 446
-             447:  147(ivec2) Load 381(i32v)
-             448:161(i64vec2) SConvert 447
-             449:166(i64vec2) Bitcast 448
+             447:  148(ivec2) Load 381(i32v)
+             448:162(i64vec2) SConvert 447
+             449:167(i64vec2) Bitcast 448
                               Store 387(u64v) 449
-             450:  155(ivec2) Load 380(u32v)
-             451:166(i64vec2) UConvert 450
+             450:  154(ivec2) Load 380(u32v)
+             451:167(i64vec2) UConvert 450
                               Store 387(u64v) 451
-             453:  147(ivec2) Load 381(i32v)
-             454:180(f16vec2) ConvertSToF 453
+             453:  148(ivec2) Load 381(i32v)
+             454:181(f16vec2) ConvertSToF 453
                               Store 452(f16v) 454
-             455:  147(ivec2) Load 381(i32v)
-             456:  186(fvec2) ConvertSToF 455
+             455:  148(ivec2) Load 381(i32v)
+             456:  187(fvec2) ConvertSToF 455
                               Store 396(f32v) 456
-             457:  147(ivec2) Load 381(i32v)
-             458:192(f64vec2) ConvertSToF 457
+             457:  148(ivec2) Load 381(i32v)
+             458:193(f64vec2) ConvertSToF 457
                               Store 399(f64v) 458
-             459:  155(ivec2) Load 380(u32v)
-             460:180(f16vec2) ConvertUToF 459
+             459:  154(ivec2) Load 380(u32v)
+             460:181(f16vec2) ConvertUToF 459
                               Store 452(f16v) 460
-             461:  155(ivec2) Load 380(u32v)
-             462:  186(fvec2) ConvertUToF 461
+             461:  154(ivec2) Load 380(u32v)
+             462:  187(fvec2) ConvertUToF 461
                               Store 396(f32v) 462
-             463:  155(ivec2) Load 380(u32v)
-             464:192(f64vec2) ConvertUToF 463
+             463:  154(ivec2) Load 380(u32v)
+             464:193(f64vec2) ConvertUToF 463
                               Store 399(f64v) 464
              466:  250(bvec2) Load 465(bv)
-             470:  147(ivec2) Select 466 469 468
+             470:  148(ivec2) Select 466 469 468
                               Store 381(i32v) 470
              471:  250(bvec2) Load 465(bv)
-             476:  155(ivec2) Select 471 475 474
+             476:  154(ivec2) Select 471 475 474
                               Store 380(u32v) 476
-             477:  147(ivec2) Load 381(i32v)
+             477:  148(ivec2) Load 381(i32v)
              478:  250(bvec2) INotEqual 477 474
                               Store 465(bv) 478
-             479:  155(ivec2) Load 380(u32v)
+             479:  154(ivec2) Load 380(u32v)
              480:  250(bvec2) INotEqual 479 474
                               Store 465(bv) 480
                               Return
                               FunctionEnd
  14(typeCast64():           2 Function None 3
               15:             Label
-       481(u64v):    167(ptr) Variable Function
-       482(i64v):    162(ptr) Variable Function
-       485(f64v):    193(ptr) Variable Function
+       481(u64v):    168(ptr) Variable Function
+       482(i64v):    163(ptr) Variable Function
+       485(f64v):    194(ptr) Variable Function
         490(i8v):    135(ptr) Variable Function
        496(i16v):    140(ptr) Variable Function
-       502(i32v):    148(ptr) Variable Function
+       502(i32v):    149(ptr) Variable Function
         510(u8v):    132(ptr) Variable Function
        516(u16v):    221(ptr) Variable Function
-       522(u32v):    156(ptr) Variable Function
-       534(f16v):    181(ptr) Variable Function
-       537(f32v):    187(ptr) Variable Function
+       522(u32v):    157(ptr) Variable Function
+       534(f16v):    182(ptr) Variable Function
+       537(f32v):    188(ptr) Variable Function
          548(bv):    251(ptr) Variable Function
-             483:161(i64vec2) Load 482(i64v)
-             484:166(i64vec2) Bitcast 483
+             483:162(i64vec2) Load 482(i64v)
+             484:167(i64vec2) Bitcast 483
                               Store 481(u64v) 484
-             486:161(i64vec2) Load 482(i64v)
-             487:192(f64vec2) ConvertSToF 486
+             486:162(i64vec2) Load 482(i64v)
+             487:193(f64vec2) ConvertSToF 486
                               Store 485(f64v) 487
-             488:166(i64vec2) Load 481(u64v)
-             489:192(f64vec2) ConvertUToF 488
+             488:167(i64vec2) Load 481(u64v)
+             489:193(f64vec2) ConvertUToF 488
                               Store 485(f64v) 489
-             491:161(i64vec2) Load 482(i64v)
+             491:162(i64vec2) Load 482(i64v)
              492: 134(i8vec2) SConvert 491
                               Store 490(i8v) 492
-             493:166(i64vec2) Load 481(u64v)
-             494: 134(i8vec2) UConvert 493
+             493:167(i64vec2) Load 481(u64v)
+             494: 131(i8vec2) UConvert 493
              495: 134(i8vec2) Bitcast 494
                               Store 490(i8v) 495
-             497:161(i64vec2) Load 482(i64v)
+             497:162(i64vec2) Load 482(i64v)
              498:139(i16vec2) SConvert 497
                               Store 496(i16v) 498
-             499:166(i64vec2) Load 481(u64v)
-             500:139(i16vec2) UConvert 499
+             499:167(i64vec2) Load 481(u64v)
+             500:145(i16vec2) UConvert 499
              501:139(i16vec2) Bitcast 500
                               Store 496(i16v) 501
-             503:161(i64vec2) Load 482(i64v)
-             504:  147(ivec2) SConvert 503
+             503:162(i64vec2) Load 482(i64v)
+             504:  148(ivec2) SConvert 503
                               Store 502(i32v) 504
-             505:166(i64vec2) Load 481(u64v)
-             506:  147(ivec2) UConvert 505
-             507:  147(ivec2) Bitcast 506
+             505:167(i64vec2) Load 481(u64v)
+             506:  154(ivec2) UConvert 505
+             507:  148(ivec2) Bitcast 506
                               Store 502(i32v) 507
-             508:166(i64vec2) Load 481(u64v)
-             509:161(i64vec2) Bitcast 508
+             508:167(i64vec2) Load 481(u64v)
+             509:162(i64vec2) Bitcast 508
                               Store 482(i64v) 509
-             511:161(i64vec2) Load 482(i64v)
+             511:162(i64vec2) Load 482(i64v)
              512: 134(i8vec2) SConvert 511
              513: 131(i8vec2) Bitcast 512
                               Store 510(u8v) 513
-             514:166(i64vec2) Load 481(u64v)
+             514:167(i64vec2) Load 481(u64v)
              515: 131(i8vec2) UConvert 514
                               Store 510(u8v) 515
-             517:161(i64vec2) Load 482(i64v)
+             517:162(i64vec2) Load 482(i64v)
              518:139(i16vec2) SConvert 517
-             519:220(i16vec2) Bitcast 518
+             519:145(i16vec2) Bitcast 518
                               Store 516(u16v) 519
-             520:166(i64vec2) Load 481(u64v)
-             521:220(i16vec2) UConvert 520
+             520:167(i64vec2) Load 481(u64v)
+             521:145(i16vec2) UConvert 520
                               Store 516(u16v) 521
-             523:161(i64vec2) Load 482(i64v)
-             524:  147(ivec2) SConvert 523
-             525:  155(ivec2) Bitcast 524
+             523:162(i64vec2) Load 482(i64v)
+             524:  148(ivec2) SConvert 523
+             525:  154(ivec2) Bitcast 524
                               Store 522(u32v) 525
-             526:166(i64vec2) Load 481(u64v)
-             527:  155(ivec2) UConvert 526
+             526:167(i64vec2) Load 481(u64v)
+             527:  154(ivec2) UConvert 526
                               Store 522(u32v) 527
-             528:161(i64vec2) Load 482(i64v)
-             529:166(i64vec2) Bitcast 528
+             528:162(i64vec2) Load 482(i64v)
+             529:167(i64vec2) Bitcast 528
                               Store 481(u64v) 529
-             530:166(i64vec2) Load 481(u64v)
+             530:167(i64vec2) Load 481(u64v)
              531: 38(int64_t) CompositeExtract 530 0
              532: 38(int64_t) CompositeExtract 530 1
-             533:166(i64vec2) CompositeConstruct 531 532
+             533:167(i64vec2) CompositeConstruct 531 532
                               Store 481(u64v) 533
-             535:161(i64vec2) Load 482(i64v)
-             536:180(f16vec2) ConvertSToF 535
+             535:162(i64vec2) Load 482(i64v)
+             536:181(f16vec2) ConvertSToF 535
                               Store 534(f16v) 536
-             538:161(i64vec2) Load 482(i64v)
-             539:  186(fvec2) ConvertSToF 538
+             538:162(i64vec2) Load 482(i64v)
+             539:  187(fvec2) ConvertSToF 538
                               Store 537(f32v) 539
-             540:161(i64vec2) Load 482(i64v)
-             541:192(f64vec2) ConvertSToF 540
+             540:162(i64vec2) Load 482(i64v)
+             541:193(f64vec2) ConvertSToF 540
                               Store 485(f64v) 541
-             542:166(i64vec2) Load 481(u64v)
-             543:180(f16vec2) ConvertUToF 542
+             542:167(i64vec2) Load 481(u64v)
+             543:181(f16vec2) ConvertUToF 542
                               Store 534(f16v) 543
-             544:166(i64vec2) Load 481(u64v)
-             545:  186(fvec2) ConvertUToF 544
+             544:167(i64vec2) Load 481(u64v)
+             545:  187(fvec2) ConvertUToF 544
                               Store 537(f32v) 545
-             546:166(i64vec2) Load 481(u64v)
-             547:192(f64vec2) ConvertUToF 546
+             546:167(i64vec2) Load 481(u64v)
+             547:193(f64vec2) ConvertUToF 546
                               Store 485(f64v) 547
              549:  250(bvec2) Load 548(bv)
-             554:161(i64vec2) Select 549 553 552
+             554:162(i64vec2) Select 549 553 552
                               Store 482(i64v) 554
              555:  250(bvec2) Load 548(bv)
-             560:166(i64vec2) Select 555 559 558
+             560:167(i64vec2) Select 555 559 558
                               Store 481(u64v) 560
-             561:161(i64vec2) Load 482(i64v)
+             561:162(i64vec2) Load 482(i64v)
              562:  250(bvec2) INotEqual 561 558
                               Store 548(bv) 562
-             563:166(i64vec2) Load 481(u64v)
+             563:167(i64vec2) Load 481(u64v)
              564:  250(bvec2) INotEqual 563 558
                               Store 548(bv) 564
                               Return
diff --git a/Test/baseResults/spv.extPostDepthCoverage.frag.out b/Test/baseResults/spv.extPostDepthCoverage.frag.out
index 0cb29f5..85a2359 100644
--- a/Test/baseResults/spv.extPostDepthCoverage.frag.out
+++ b/Test/baseResults/spv.extPostDepthCoverage.frag.out
@@ -1,6 +1,6 @@
 spv.extPostDepthCoverage.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 6
 
                               Capability Shader
diff --git a/Test/baseResults/spv.float16.frag.out b/Test/baseResults/spv.float16.frag.out
index a29228f..b6d37f4 100644
--- a/Test/baseResults/spv.float16.frag.out
+++ b/Test/baseResults/spv.float16.frag.out
@@ -1,6 +1,6 @@
 spv.float16.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 534
 
                               Capability Shader
diff --git a/Test/baseResults/spv.float16Fetch.frag.out b/Test/baseResults/spv.float16Fetch.frag.out
index 093af6b..67ddd61 100644
--- a/Test/baseResults/spv.float16Fetch.frag.out
+++ b/Test/baseResults/spv.float16Fetch.frag.out
@@ -1,10 +1,11 @@
 spv.float16Fetch.frag
 // Module Version 10000
-// Generated by (magic number): 80006
+// Generated by (magic number): 80007
 // Id's are bound by 5923
 
                               Capability Shader
                               Capability Float16
+                              Capability ImageGatherExtended
                               Capability StorageImageMultisample
                               Capability ImageCubeArray
                               Capability ImageRect
diff --git a/Test/baseResults/spv.float32.frag.out b/Test/baseResults/spv.float32.frag.out
index 7179992..40c6677 100644
--- a/Test/baseResults/spv.float32.frag.out
+++ b/Test/baseResults/spv.float32.frag.out
@@ -1,7 +1,7 @@
 spv.float32.frag
 // Module Version 10300
-// Generated by (magic number): 80006
-// Id's are bound by 530
+// Generated by (magic number): 80007
+// Id's are bound by 533
 
                               Capability Shader
                               Capability Float16
@@ -13,7 +13,7 @@
                               Capability InterpolationFunction
                1:             ExtInstImport  "GLSL.std.450"
                               MemoryModel Logical GLSL450
-                              EntryPoint Fragment 4  "main" 468
+                              EntryPoint Fragment 4  "main" 471
                               ExecutionMode 4 OriginUpperLeft
                               Source GLSL 450
                               SourceExtension  "GL_KHX_shader_explicit_arithmetic_types"
@@ -48,81 +48,81 @@
                               Name 189  "i16v"
                               Name 195  "i32v"
                               Name 201  "i64v"
-                              Name 204  "u8v"
-                              Name 210  "u16v"
-                              Name 215  "u32v"
-                              Name 221  "u64v"
-                              Name 226  "f32v2"
-                              Name 227  "f32v1"
-                              Name 259  "f32v2"
-                              Name 260  "f32v1"
-                              Name 276  "f32v2"
-                              Name 277  "f32v1"
-                              Name 298  "f32"
-                              Name 302  "f32v3"
-                              Name 342  "bv"
-                              Name 363  "b"
-                              Name 373  "iv"
-                              Name 374  "ResType"
-                              Name 381  "f32"
-                              Name 382  "f32v1"
-                              Name 386  "f32v2"
-                              Name 392  "f32v3"
-                              Name 411  "f32m3"
-                              Name 412  "f32m1"
-                              Name 414  "f32m2"
-                              Name 423  "f32v1"
-                              Name 425  "f32v2"
-                              Name 430  "f32m4"
-                              Name 433  "f32"
-                              Name 436  "f32m5"
-                              Name 441  "f32m6"
-                              Name 442  "f32m7"
-                              Name 445  "bv"
-                              Name 446  "f32v1"
-                              Name 448  "f32v2"
-                              Name 466  "f32v"
-                              Name 468  "if32v"
-                              Name 517  "S"
-                              MemberName 517(S) 0  "x"
-                              MemberName 517(S) 1  "y"
-                              MemberName 517(S) 2  "z"
-                              Name 519  "B1"
-                              MemberName 519(B1) 0  "a"
-                              MemberName 519(B1) 1  "b"
-                              MemberName 519(B1) 2  "c"
-                              MemberName 519(B1) 3  "d"
-                              MemberName 519(B1) 4  "e"
-                              MemberName 519(B1) 5  "f"
-                              MemberName 519(B1) 6  "g"
-                              MemberName 519(B1) 7  "h"
-                              Name 521  ""
-                              Name 522  "sf16"
-                              Name 523  "sf"
-                              Name 524  "sd"
-                              Decorate 515 ArrayStride 16
-                              Decorate 516 ArrayStride 32
-                              MemberDecorate 517(S) 0 Offset 0
-                              MemberDecorate 517(S) 1 Offset 8
-                              MemberDecorate 517(S) 2 Offset 16
-                              Decorate 518 ArrayStride 32
-                              MemberDecorate 519(B1) 0 Offset 0
-                              MemberDecorate 519(B1) 1 Offset 8
-                              MemberDecorate 519(B1) 2 Offset 16
-                              MemberDecorate 519(B1) 3 Offset 32
-                              MemberDecorate 519(B1) 4 ColMajor
-                              MemberDecorate 519(B1) 4 Offset 64
-                              MemberDecorate 519(B1) 4 MatrixStride 16
-                              MemberDecorate 519(B1) 5 ColMajor
-                              MemberDecorate 519(B1) 5 Offset 96
-                              MemberDecorate 519(B1) 5 MatrixStride 16
-                              MemberDecorate 519(B1) 6 Offset 160
-                              MemberDecorate 519(B1) 7 Offset 192
-                              Decorate 519(B1) Block
-                              Decorate 521 DescriptorSet 0
-                              Decorate 522(sf16) SpecId 100
-                              Decorate 523(sf) SpecId 101
-                              Decorate 524(sd) SpecId 102
+                              Name 207  "u8v"
+                              Name 213  "u16v"
+                              Name 218  "u32v"
+                              Name 224  "u64v"
+                              Name 229  "f32v2"
+                              Name 230  "f32v1"
+                              Name 262  "f32v2"
+                              Name 263  "f32v1"
+                              Name 279  "f32v2"
+                              Name 280  "f32v1"
+                              Name 301  "f32"
+                              Name 305  "f32v3"
+                              Name 345  "bv"
+                              Name 366  "b"
+                              Name 376  "iv"
+                              Name 377  "ResType"
+                              Name 384  "f32"
+                              Name 385  "f32v1"
+                              Name 389  "f32v2"
+                              Name 395  "f32v3"
+                              Name 414  "f32m3"
+                              Name 415  "f32m1"
+                              Name 417  "f32m2"
+                              Name 426  "f32v1"
+                              Name 428  "f32v2"
+                              Name 433  "f32m4"
+                              Name 436  "f32"
+                              Name 439  "f32m5"
+                              Name 444  "f32m6"
+                              Name 445  "f32m7"
+                              Name 448  "bv"
+                              Name 449  "f32v1"
+                              Name 451  "f32v2"
+                              Name 469  "f32v"
+                              Name 471  "if32v"
+                              Name 520  "S"
+                              MemberName 520(S) 0  "x"
+                              MemberName 520(S) 1  "y"
+                              MemberName 520(S) 2  "z"
+                              Name 522  "B1"
+                              MemberName 522(B1) 0  "a"
+                              MemberName 522(B1) 1  "b"
+                              MemberName 522(B1) 2  "c"
+                              MemberName 522(B1) 3  "d"
+                              MemberName 522(B1) 4  "e"
+                              MemberName 522(B1) 5  "f"
+                              MemberName 522(B1) 6  "g"
+                              MemberName 522(B1) 7  "h"
+                              Name 524  ""
+                              Name 525  "sf16"
+                              Name 526  "sf"
+                              Name 527  "sd"
+                              Decorate 518 ArrayStride 16
+                              Decorate 519 ArrayStride 32
+                              MemberDecorate 520(S) 0 Offset 0
+                              MemberDecorate 520(S) 1 Offset 8
+                              MemberDecorate 520(S) 2 Offset 16
+                              Decorate 521 ArrayStride 32
+                              MemberDecorate 522(B1) 0 Offset 0
+                              MemberDecorate 522(B1) 1 Offset 8
+                              MemberDecorate 522(B1) 2 Offset 16
+                              MemberDecorate 522(B1) 3 Offset 32
+                              MemberDecorate 522(B1) 4 ColMajor
+                              MemberDecorate 522(B1) 4 Offset 64
+                              MemberDecorate 522(B1) 4 MatrixStride 16
+                              MemberDecorate 522(B1) 5 ColMajor
+                              MemberDecorate 522(B1) 5 Offset 96
+                              MemberDecorate 522(B1) 5 MatrixStride 16
+                              MemberDecorate 522(B1) 6 Offset 160
+                              MemberDecorate 522(B1) 7 Offset 192
+                              Decorate 522(B1) Block
+                              Decorate 524 DescriptorSet 0
+                              Decorate 525(sf16) SpecId 100
+                              Decorate 526(sf) SpecId 101
+                              Decorate 527(sd) SpecId 102
                2:             TypeVoid
                3:             TypeFunction 2
               26:             TypeFloat 32
@@ -166,47 +166,50 @@
              198:             TypeInt 64 1
              199:             TypeVector 198(int64_t) 3
              200:             TypePointer Function 199(i64vec3)
-             207:             TypeInt 16 0
-             208:             TypeVector 207(int16_t) 3
-             209:             TypePointer Function 208(i16vec3)
-             213:             TypeVector 31(int) 3
-             214:             TypePointer Function 213(ivec3)
-             218:             TypeInt 64 0
-             219:             TypeVector 218(int64_t) 3
-             220:             TypePointer Function 219(i64vec3)
-             224:             TypeVector 26(float) 4
-             225:             TypePointer Function 224(fvec4)
-    374(ResType):             TypeStruct 153(fvec3) 193(ivec3)
-             409:             TypeMatrix 153(fvec3) 2
-             410:             TypePointer Function 409
-             428:             TypeMatrix 27(fvec2) 3
-             429:             TypePointer Function 428
-             434:             TypeMatrix 153(fvec3) 3
-             435:             TypePointer Function 434
-             439:             TypeMatrix 224(fvec4) 4
-             440:             TypePointer Function 439
-             467:             TypePointer Input 153(fvec3)
-      468(if32v):    467(ptr) Variable Input
-             469:             TypePointer Input 26(float)
-             506:    192(int) Constant 1
-             511:   26(float) Constant 1056964608
-             512:   27(fvec2) ConstantComposite 511 511
-             514:     31(int) Constant 2
-             515:             TypeArray 26(float) 514
-             516:             TypeArray 409 514
-          517(S):             TypeStruct 26(float) 27(fvec2) 153(fvec3)
-             518:             TypeArray 517(S) 514
-         519(B1):             TypeStruct 26(float) 27(fvec2) 153(fvec3) 515 409 516 517(S) 518
-             520:             TypePointer Uniform 519(B1)
-             521:    520(ptr) Variable Uniform
-       522(sf16):172(float16_t) SpecConstant 12288
-         523(sf):   26(float) SpecConstant 1048576000
-         524(sd):149(float64_t) SpecConstant 0 1071644672
-             525:   26(float) SpecConstantOp 115 522(sf16)
-             526:   26(float) SpecConstantOp 115 522(sf16)
-             527:149(float64_t) SpecConstantOp 115 526
-             528:172(float16_t) SpecConstantOp 115 523(sf)
-             529:172(float16_t) SpecConstantOp 115 524(sd)
+             204:             TypeInt 8 0
+             205:             TypeVector 204(int8_t) 3
+             206:             TypePointer Function 205(i8vec3)
+             210:             TypeInt 16 0
+             211:             TypeVector 210(int16_t) 3
+             212:             TypePointer Function 211(i16vec3)
+             216:             TypeVector 31(int) 3
+             217:             TypePointer Function 216(ivec3)
+             221:             TypeInt 64 0
+             222:             TypeVector 221(int64_t) 3
+             223:             TypePointer Function 222(i64vec3)
+             227:             TypeVector 26(float) 4
+             228:             TypePointer Function 227(fvec4)
+    377(ResType):             TypeStruct 153(fvec3) 193(ivec3)
+             412:             TypeMatrix 153(fvec3) 2
+             413:             TypePointer Function 412
+             431:             TypeMatrix 27(fvec2) 3
+             432:             TypePointer Function 431
+             437:             TypeMatrix 153(fvec3) 3
+             438:             TypePointer Function 437
+             442:             TypeMatrix 227(fvec4) 4
+             443:             TypePointer Function 442
+             470:             TypePointer Input 153(fvec3)
+      471(if32v):    470(ptr) Variable Input
+             472:             TypePointer Input 26(float)
+             509:    192(int) Constant 1
+             514:   26(float) Constant 1056964608
+             515:   27(fvec2) ConstantComposite 514 514
+             517:     31(int) Constant 2
+             518:             TypeArray 26(float) 517
+             519:             TypeArray 412 517
+          520(S):             TypeStruct 26(float) 27(fvec2) 153(fvec3)
+             521:             TypeArray 520(S) 517
+         522(B1):             TypeStruct 26(float) 27(fvec2) 153(fvec3) 518 412 519 520(S) 521
+             523:             TypePointer Uniform 522(B1)
+             524:    523(ptr) Variable Uniform
+       525(sf16):172(float16_t) SpecConstant 12288
+         526(sf):   26(float) SpecConstant 1048576000
+         527(sd):149(float64_t) SpecConstant 0 1071644672
+             528:   26(float) SpecConstantOp 115 525(sf16)
+             529:   26(float) SpecConstantOp 115 525(sf16)
+             530:149(float64_t) SpecConstantOp 115 529
+             531:172(float16_t) SpecConstantOp 115 526(sf)
+             532:172(float16_t) SpecConstantOp 115 527(sd)
          4(main):           2 Function None 3
                5:             Label
                               Return
@@ -363,10 +366,10 @@
        189(i16v):    188(ptr) Variable Function
        195(i32v):    194(ptr) Variable Function
        201(i64v):    200(ptr) Variable Function
-        204(u8v):    182(ptr) Variable Function
-       210(u16v):    209(ptr) Variable Function
-       215(u32v):    214(ptr) Variable Function
-       221(u64v):    220(ptr) Variable Function
+        207(u8v):    206(ptr) Variable Function
+       213(u16v):    212(ptr) Variable Function
+       218(u32v):    217(ptr) Variable Function
+       224(u64v):    223(ptr) Variable Function
              156:  153(fvec3) Load 155(f32v)
              157:150(f64vec3) FConvert 156
                               Store 152(f64v) 157
@@ -400,401 +403,401 @@
              202:  153(fvec3) Load 155(f32v)
              203:199(i64vec3) ConvertFToS 202
                               Store 201(i64v) 203
-             205:  153(fvec3) Load 155(f32v)
-             206: 181(i8vec3) ConvertFToS 205
-                              Store 204(u8v) 206
-             211:  153(fvec3) Load 155(f32v)
-             212:208(i16vec3) ConvertFToU 211
-                              Store 210(u16v) 212
-             216:  153(fvec3) Load 155(f32v)
-             217:  213(ivec3) ConvertFToU 216
-                              Store 215(u32v) 217
-             222:  153(fvec3) Load 155(f32v)
-             223:219(i64vec3) ConvertFToU 222
-                              Store 221(u64v) 223
+             208:  153(fvec3) Load 155(f32v)
+             209: 205(i8vec3) ConvertFToU 208
+                              Store 207(u8v) 209
+             214:  153(fvec3) Load 155(f32v)
+             215:211(i16vec3) ConvertFToU 214
+                              Store 213(u16v) 215
+             219:  153(fvec3) Load 155(f32v)
+             220:  216(ivec3) ConvertFToU 219
+                              Store 218(u32v) 220
+             225:  153(fvec3) Load 155(f32v)
+             226:222(i64vec3) ConvertFToU 225
+                              Store 224(u64v) 226
                               Return
                               FunctionEnd
 12(builtinAngleTrigFuncs():           2 Function None 3
               13:             Label
-      226(f32v2):    225(ptr) Variable Function
-      227(f32v1):    225(ptr) Variable Function
-             228:  224(fvec4) Load 227(f32v1)
-             229:  224(fvec4) ExtInst 1(GLSL.std.450) 11(Radians) 228
-                              Store 226(f32v2) 229
-             230:  224(fvec4) Load 227(f32v1)
-             231:  224(fvec4) ExtInst 1(GLSL.std.450) 12(Degrees) 230
-                              Store 226(f32v2) 231
-             232:  224(fvec4) Load 227(f32v1)
-             233:  224(fvec4) ExtInst 1(GLSL.std.450) 13(Sin) 232
-                              Store 226(f32v2) 233
-             234:  224(fvec4) Load 227(f32v1)
-             235:  224(fvec4) ExtInst 1(GLSL.std.450) 14(Cos) 234
-                              Store 226(f32v2) 235
-             236:  224(fvec4) Load 227(f32v1)
-             237:  224(fvec4) ExtInst 1(GLSL.std.450) 15(Tan) 236
-                              Store 226(f32v2) 237
-             238:  224(fvec4) Load 227(f32v1)
-             239:  224(fvec4) ExtInst 1(GLSL.std.450) 16(Asin) 238
-                              Store 226(f32v2) 239
-             240:  224(fvec4) Load 227(f32v1)
-             241:  224(fvec4) ExtInst 1(GLSL.std.450) 17(Acos) 240
-                              Store 226(f32v2) 241
-             242:  224(fvec4) Load 227(f32v1)
-             243:  224(fvec4) Load 226(f32v2)
-             244:  224(fvec4) ExtInst 1(GLSL.std.450) 25(Atan2) 242 243
-                              Store 226(f32v2) 244
-             245:  224(fvec4) Load 227(f32v1)
-             246:  224(fvec4) ExtInst 1(GLSL.std.450) 18(Atan) 245
-                              Store 226(f32v2) 246
-             247:  224(fvec4) Load 227(f32v1)
-             248:  224(fvec4) ExtInst 1(GLSL.std.450) 19(Sinh) 247
-                              Store 226(f32v2) 248
-             249:  224(fvec4) Load 227(f32v1)
-             250:  224(fvec4) ExtInst 1(GLSL.std.450) 20(Cosh) 249
-                              Store 226(f32v2) 250
-             251:  224(fvec4) Load 227(f32v1)
-             252:  224(fvec4) ExtInst 1(GLSL.std.450) 21(Tanh) 251
-                              Store 226(f32v2) 252
-             253:  224(fvec4) Load 227(f32v1)
-             254:  224(fvec4) ExtInst 1(GLSL.std.450) 22(Asinh) 253
-                              Store 226(f32v2) 254
-             255:  224(fvec4) Load 227(f32v1)
-             256:  224(fvec4) ExtInst 1(GLSL.std.450) 23(Acosh) 255
-                              Store 226(f32v2) 256
-             257:  224(fvec4) Load 227(f32v1)
-             258:  224(fvec4) ExtInst 1(GLSL.std.450) 24(Atanh) 257
-                              Store 226(f32v2) 258
+      229(f32v2):    228(ptr) Variable Function
+      230(f32v1):    228(ptr) Variable Function
+             231:  227(fvec4) Load 230(f32v1)
+             232:  227(fvec4) ExtInst 1(GLSL.std.450) 11(Radians) 231
+                              Store 229(f32v2) 232
+             233:  227(fvec4) Load 230(f32v1)
+             234:  227(fvec4) ExtInst 1(GLSL.std.450) 12(Degrees) 233
+                              Store 229(f32v2) 234
+             235:  227(fvec4) Load 230(f32v1)
+             236:  227(fvec4) ExtInst 1(GLSL.std.450) 13(Sin) 235
+                              Store 229(f32v2) 236
+             237:  227(fvec4) Load 230(f32v1)
+             238:  227(fvec4) ExtInst 1(GLSL.std.450) 14(Cos) 237
+                              Store 229(f32v2) 238
+             239:  227(fvec4) Load 230(f32v1)
+             240:  227(fvec4) ExtInst 1(GLSL.std.450) 15(Tan) 239
+                              Store 229(f32v2) 240
+             241:  227(fvec4) Load 230(f32v1)
+             242:  227(fvec4) ExtInst 1(GLSL.std.450) 16(Asin) 241
+                              Store 229(f32v2) 242
+             243:  227(fvec4) Load 230(f32v1)
+             244:  227(fvec4) ExtInst 1(GLSL.std.450) 17(Acos) 243
+                              Store 229(f32v2) 244
+             245:  227(fvec4) Load 230(f32v1)
+             246:  227(fvec4) Load 229(f32v2)
+             247:  227(fvec4) ExtInst 1(GLSL.std.450) 25(Atan2) 245 246
+                              Store 229(f32v2) 247
+             248:  227(fvec4) Load 230(f32v1)
+             249:  227(fvec4) ExtInst 1(GLSL.std.450) 18(Atan) 248
+                              Store 229(f32v2) 249
+             250:  227(fvec4) Load 230(f32v1)
+             251:  227(fvec4) ExtInst 1(GLSL.std.450) 19(Sinh) 250
+                              Store 229(f32v2) 251
+             252:  227(fvec4) Load 230(f32v1)
+             253:  227(fvec4) ExtInst 1(GLSL.std.450) 20(Cosh) 252
+                              Store 229(f32v2) 253
+             254:  227(fvec4) Load 230(f32v1)
+             255:  227(fvec4) ExtInst 1(GLSL.std.450) 21(Tanh) 254
+                              Store 229(f32v2) 255
+             256:  227(fvec4) Load 230(f32v1)
+             257:  227(fvec4) ExtInst 1(GLSL.std.450) 22(Asinh) 256
+                              Store 229(f32v2) 257
+             258:  227(fvec4) Load 230(f32v1)
+             259:  227(fvec4) ExtInst 1(GLSL.std.450) 23(Acosh) 258
+                              Store 229(f32v2) 259
+             260:  227(fvec4) Load 230(f32v1)
+             261:  227(fvec4) ExtInst 1(GLSL.std.450) 24(Atanh) 260
+                              Store 229(f32v2) 261
                               Return
                               FunctionEnd
 14(builtinExpFuncs():           2 Function None 3
               15:             Label
-      259(f32v2):     28(ptr) Variable Function
-      260(f32v1):     28(ptr) Variable Function
-             261:   27(fvec2) Load 260(f32v1)
-             262:   27(fvec2) Load 259(f32v2)
-             263:   27(fvec2) ExtInst 1(GLSL.std.450) 26(Pow) 261 262
-                              Store 259(f32v2) 263
-             264:   27(fvec2) Load 260(f32v1)
-             265:   27(fvec2) ExtInst 1(GLSL.std.450) 27(Exp) 264
-                              Store 259(f32v2) 265
-             266:   27(fvec2) Load 260(f32v1)
-             267:   27(fvec2) ExtInst 1(GLSL.std.450) 28(Log) 266
-                              Store 259(f32v2) 267
-             268:   27(fvec2) Load 260(f32v1)
-             269:   27(fvec2) ExtInst 1(GLSL.std.450) 29(Exp2) 268
-                              Store 259(f32v2) 269
-             270:   27(fvec2) Load 260(f32v1)
-             271:   27(fvec2) ExtInst 1(GLSL.std.450) 30(Log2) 270
-                              Store 259(f32v2) 271
-             272:   27(fvec2) Load 260(f32v1)
-             273:   27(fvec2) ExtInst 1(GLSL.std.450) 31(Sqrt) 272
-                              Store 259(f32v2) 273
-             274:   27(fvec2) Load 260(f32v1)
-             275:   27(fvec2) ExtInst 1(GLSL.std.450) 32(InverseSqrt) 274
-                              Store 259(f32v2) 275
+      262(f32v2):     28(ptr) Variable Function
+      263(f32v1):     28(ptr) Variable Function
+             264:   27(fvec2) Load 263(f32v1)
+             265:   27(fvec2) Load 262(f32v2)
+             266:   27(fvec2) ExtInst 1(GLSL.std.450) 26(Pow) 264 265
+                              Store 262(f32v2) 266
+             267:   27(fvec2) Load 263(f32v1)
+             268:   27(fvec2) ExtInst 1(GLSL.std.450) 27(Exp) 267
+                              Store 262(f32v2) 268
+             269:   27(fvec2) Load 263(f32v1)
+             270:   27(fvec2) ExtInst 1(GLSL.std.450) 28(Log) 269
+                              Store 262(f32v2) 270
+             271:   27(fvec2) Load 263(f32v1)
+             272:   27(fvec2) ExtInst 1(GLSL.std.450) 29(Exp2) 271
+                              Store 262(f32v2) 272
+             273:   27(fvec2) Load 263(f32v1)
+             274:   27(fvec2) ExtInst 1(GLSL.std.450) 30(Log2) 273
+                              Store 262(f32v2) 274
+             275:   27(fvec2) Load 263(f32v1)
+             276:   27(fvec2) ExtInst 1(GLSL.std.450) 31(Sqrt) 275
+                              Store 262(f32v2) 276
+             277:   27(fvec2) Load 263(f32v1)
+             278:   27(fvec2) ExtInst 1(GLSL.std.450) 32(InverseSqrt) 277
+                              Store 262(f32v2) 278
                               Return
                               FunctionEnd
 16(builtinCommonFuncs():           2 Function None 3
               17:             Label
-      276(f32v2):    154(ptr) Variable Function
-      277(f32v1):    154(ptr) Variable Function
-        298(f32):     33(ptr) Variable Function
-      302(f32v3):    154(ptr) Variable Function
-         342(bv):    159(ptr) Variable Function
-          363(b):    108(ptr) Variable Function
-         373(iv):    194(ptr) Variable Function
-             278:  153(fvec3) Load 277(f32v1)
-             279:  153(fvec3) ExtInst 1(GLSL.std.450) 4(FAbs) 278
-                              Store 276(f32v2) 279
-             280:  153(fvec3) Load 277(f32v1)
-             281:  153(fvec3) ExtInst 1(GLSL.std.450) 6(FSign) 280
-                              Store 276(f32v2) 281
-             282:  153(fvec3) Load 277(f32v1)
-             283:  153(fvec3) ExtInst 1(GLSL.std.450) 8(Floor) 282
-                              Store 276(f32v2) 283
-             284:  153(fvec3) Load 277(f32v1)
-             285:  153(fvec3) ExtInst 1(GLSL.std.450) 3(Trunc) 284
-                              Store 276(f32v2) 285
-             286:  153(fvec3) Load 277(f32v1)
-             287:  153(fvec3) ExtInst 1(GLSL.std.450) 1(Round) 286
-                              Store 276(f32v2) 287
-             288:  153(fvec3) Load 277(f32v1)
-             289:  153(fvec3) ExtInst 1(GLSL.std.450) 2(RoundEven) 288
-                              Store 276(f32v2) 289
-             290:  153(fvec3) Load 277(f32v1)
-             291:  153(fvec3) ExtInst 1(GLSL.std.450) 9(Ceil) 290
-                              Store 276(f32v2) 291
-             292:  153(fvec3) Load 277(f32v1)
-             293:  153(fvec3) Ex