Ruy - Float Kernel in ARM32 asm.

PiperOrigin-RevId: 257833458
10 files changed
tree: 260e0b586946b6efa2abb3b46b08194db1404ecb
  1. allocator.cc
  2. allocator.h
  3. allocator_test.cc
  4. benchmark.cc
  5. block_map.cc
  6. block_map.h
  7. blocking_counter.cc
  8. blocking_counter.h
  9. BUILD
  10. check_macros.h
  11. common.h
  12. context.cc
  13. context.h
  14. detect_dotprod.cc
  15. detect_dotprod.h
  16. dispatch.h
  17. example.cc
  18. example_advanced.cc
  19. internal_matrix.h
  20. kernel.h
  21. kernel_arm32.cc
  22. kernel_arm64.cc
  23. matrix.h
  24. opt_set.h
  25. pack.cc
  26. pack.h
  27. path.h
  28. pmu.cc
  29. pmu.h
  30. prepack.h
  31. README.md
  32. ruy.h
  33. ruy_advanced.h
  34. ruy_test.bzl
  35. ruy_test_ext.bzl
  36. ruy_visibility.bzl
  37. size_util.h
  38. spec.h
  39. test.h
  40. test_fast.cc
  41. test_slow.cc
  42. test_special_specs.cc
  43. thread_pool.cc
  44. thread_pool.h
  45. time.h
  46. trace.cc
  47. trace.h
  48. trmul.cc
  49. trmul.h
  50. tune.cc
  51. tune.h
  52. tune_test.cc
  53. tune_tool.cc
  54. wait.cc
  55. wait.h
  56. wait_test.cc
README.md

ruy is not BLAS

ruy is a matrix multiplication library. Its focus is to cover the matrix multiplication needs of TensorFlow Lite.

ruy supports both floating-point (like Eigen) and quantized (like gemmlowp).

Status

ruy is very new, immature code. It has quite good test coverage, but the code is in flux, lacks comments, needs more cleanup, and there are no design docs at the moment.

We hope to improve on all that and integrate ruy into TensorFlow Lite, at first as a non-default path for ARM A64 only, over the next few weeks [April 2019].

Efficiency

ruy is designed to achieve maximal performance not just on very large sizes, as is the focus of many established libraries, but on whatever are the actual sizes and shapes of matrices most critical in current TensorFlow Lite applications. This often means quite small sizes, e.g. 100x100 or even 50x50, and all sorts of rectangular shapes.

ruy is currently only optimized for ARM A64; other architectures have only slow reference code at the moment.

ruy is currently optimized only for the following combination of storage orders: LHS = row-major, RHS = column-major, destination = column-major. All other combinations of storage orders fall back to slow reference code at the moment.