Bug: 228115129

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  1. 4cb517a Initial import. by Andrew Walbran · 2 years, 1 month ago main master
  2. 412d44a Initial empty repository by Roman Yepishev · 2 years ago

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Low level access to Cortex-A processors.

Currently Supported Execution States

  • [x] AArch64
  • [ ] AArch32

Minimum Supported Rust Version

Requires a recent nightly of Rust.


Please note that for using this crate's register definitions (as provided by cortex_a::registers::*), you need to also include tock-registers in your project. This is because the interface traits provided by tock-registers are implemented by this crate. You should include the same version of tock-registers as is being used by this crate to ensure sane interoperatbility.

For example, in the following snippet, X.Y.Z should be the same version of tock-registers that is mentioned in cortex-a's Cargo.toml.

name = "Your embedded project"

# Some parts omitted for brevity.

tock-registers = "X.Y.Z"
cortex-a = "A.B.C"       # <-- Includes tock-registers itself.


Check out https://github.com/rust-embedded/rust-raspberrypi-OS-tutorials for usage examples. Listed below is a snippet of rust-raspberrypi-OS-tutorials's early boot code.

use cortex_a::{asm, registers::*};
use tock_registers::interfaces::Writeable; // <-- Trait needed to use `write()` and `set()`.

// Some parts omitted for brevity.

unsafe fn prepare_el2_to_el1_transition(
    virt_boot_core_stack_end_exclusive_addr: u64,
    virt_kernel_init_addr: u64,
) {
    // Enable timer counter registers for EL1.

    // No offset for reading the counters.

    // Set EL1 execution state to AArch64.

    // Set up a simulated exception return.
            + SPSR_EL2::A::Masked
            + SPSR_EL2::I::Masked
            + SPSR_EL2::F::Masked
            + SPSR_EL2::M::EL1h,


Descriptive comments in the source files are taken from the ARM Architecture Reference Manual ARMv8, for ARMv8-A architecture profile.


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Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any additional terms or conditions.