| commit | d1592a966bc22b94362380aa690eeb92f42b8ca0 | [log] [tgz] |
|---|---|---|
| author | Simon Pilgrim <llvm-dev@redking.me.uk> | Wed May 28 11:02:37 2025 +0100 |
| committer | GitHub <noreply@github.com> | Wed May 28 11:02:37 2025 +0100 |
| tree | 087c31b836f81be817d0b13eafe3f49d133ffc3f | |
| parent | eea69691908d2ff59ef2614fc6f948d021d0ef07 [diff] |
[X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (#140028) When attempting to replace a full vector constant load with an instruction that uses a smaller constant, check the scheduler model to ensure the instruction isn't slower. Throughput must not regress, but allow a small increase in latency based on how much constant data we're saving (I've used a simple estimate of 1 cycle per 128-bits of data saved). NOTE: this currently ignores hoisted constant loads where the slower instruction might be acceptable. Fixes #135998
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