tree 78a48c744f8b9d057119001f73e73c8a6736a5f0
parent 658dc9ca506ae9e4894c2bb1577281a356f2d817
author Jason Ekstrand <jason@jlekstrand.net> 1579718391 -0600
committer Marge Bot <eric+marge@anholt.net> 1579918713 +0000

anv: Make AUX table invalidate a PIPE_* bit

This commit moves it in with all the other cache invalidation operations
as if it were done by PIPE_CONTROL even though it's a pair of register
writes.  This means we only have to write the GFX_AUX_TABLE_BASE_ADDR
register once at device initialization instead of every invalidate.
Invalidates are now a single LRI instead of two.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3519>