commit e65f561a75c34e2e09a381720d5e302d2236686c
author Karol Herbst <git@karolherbst.de> Fri Jun 09 15:27:18 2023 +0200
committer Marge Bot <emma+marge@anholt.net> Sat Jun 10 09:33:19 2023 +0000
tree 28ef30a15eb35f9a401cd7201d10363817f8f045
parent 5ae953b5e97831a1bc3db9f24b06bd916f89e76f

ac/llvm: support vec2 on b2i16

Since radeonsi sets the alu_to_scalar callback, frontends like Rusticl
might end up generating vec2 b2i16. Support this just like it's done for
b2f16.

Fixes: d692d433f28 ("radeonsi: use nir_lower_alu_to_scalar correctly")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23551>

src/amd/llvm/ac_nir_to_llvm.c

diff --git a/src/amd/llvm/ac_nir_to_llvm.c b/src/amd/llvm/ac_nir_to_llvm.c
index 0082164..d566a25 100644
--- a/src/amd/llvm/ac_nir_to_llvm.c
+++ b/src/amd/llvm/ac_nir_to_llvm.c
@@ -266,6 +266,16 @@
    case 8:
       return LLVMBuildSelect(ctx->builder, src0, ctx->i8_1, ctx->i8_0, "");
    case 16:
+      if (LLVMGetTypeKind(LLVMTypeOf(src0)) == LLVMVectorTypeKind) {
+         assert(LLVMGetVectorSize(LLVMTypeOf(src0)) == 2);
+         LLVMValueRef i[] = {
+            LLVMBuildSelect(ctx->builder, ac_llvm_extract_elem(ctx, src0, 0),
+                            ctx->i16_1, ctx->i16_0, ""),
+            LLVMBuildSelect(ctx->builder, ac_llvm_extract_elem(ctx, src0, 1),
+                            ctx->i16_1, ctx->i16_0, ""),
+         };
+         return ac_build_gather_values(ctx, i, 2);
+      }
       return LLVMBuildSelect(ctx->builder, src0, ctx->i16_1, ctx->i16_0, "");
    case 32:
       return LLVMBuildSelect(ctx->builder, src0, ctx->i32_1, ctx->i32_0, "");