diff --git a/src/intel/compiler/brw_vec4_gs_visitor.cpp b/src/intel/compiler/brw_vec4_gs_visitor.cpp
index c7b99dc..05cbab2 100644
--- a/src/intel/compiler/brw_vec4_gs_visitor.cpp
+++ b/src/intel/compiler/brw_vec4_gs_visitor.cpp
@@ -610,6 +610,8 @@
    [GL_TRIANGLE_STRIP_ADJACENCY] = _3DPRIM_TRISTRIP_ADJ,
 };
 
+} /* namespace brw */
+
 extern "C" const unsigned *
 brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
                void *mem_ctx,
@@ -828,9 +830,9 @@
       prog_data->base.urb_entry_size = ALIGN(output_size_bytes, 128) / 128;
    }
 
-   assert(nir->info.gs.output_primitive < ARRAY_SIZE(gl_prim_to_hw_prim));
+   assert(nir->info.gs.output_primitive < ARRAY_SIZE(brw::gl_prim_to_hw_prim));
    prog_data->output_topology =
-      gl_prim_to_hw_prim[nir->info.gs.output_primitive];
+      brw::gl_prim_to_hw_prim[nir->info.gs.output_primitive];
 
    prog_data->vertices_in = nir->info.gs.vertices_in;
 
@@ -881,7 +883,7 @@
           likely(!(INTEL_DEBUG & DEBUG_NO_DUAL_OBJECT_GS))) {
          prog_data->base.dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT;
 
-         vec4_gs_visitor v(compiler, log_data, &c, prog_data, nir,
+         brw::vec4_gs_visitor v(compiler, log_data, &c, prog_data, nir,
                            mem_ctx, true /* no_spills */, shader_time_index);
 
          /* Backup 'nr_params' and 'param' as they can be modified by the
@@ -947,15 +949,15 @@
    else
       prog_data->base.dispatch_mode = DISPATCH_MODE_4X2_DUAL_INSTANCE;
 
-   vec4_gs_visitor *gs = NULL;
+   brw::vec4_gs_visitor *gs = NULL;
    const unsigned *ret = NULL;
 
    if (compiler->devinfo->gen >= 7)
-      gs = new vec4_gs_visitor(compiler, log_data, &c, prog_data,
+      gs = new brw::vec4_gs_visitor(compiler, log_data, &c, prog_data,
                                nir, mem_ctx, false /* no_spills */,
                                shader_time_index);
    else
-      gs = new gen6_gs_visitor(compiler, log_data, &c, prog_data, prog,
+      gs = new brw::gen6_gs_visitor(compiler, log_data, &c, prog_data, prog,
                                nir, mem_ctx, false /* no_spills */,
                                shader_time_index);
 
@@ -972,6 +974,3 @@
    delete gs;
    return ret;
 }
-
-
-} /* namespace brw */
diff --git a/src/intel/compiler/brw_vec4_tcs.cpp b/src/intel/compiler/brw_vec4_tcs.cpp
index 29c0d9e..0e4c02e 100644
--- a/src/intel/compiler/brw_vec4_tcs.cpp
+++ b/src/intel/compiler/brw_vec4_tcs.cpp
@@ -352,6 +352,8 @@
    return 1;
 }
 
+} /* namespace brw */
+
 extern "C" const unsigned *
 brw_compile_tcs(const struct brw_compiler *compiler,
                 void *log_data,
@@ -390,7 +392,7 @@
    bool has_primitive_id =
       nir->info.system_values_read & (1 << SYSTEM_VALUE_PRIMITIVE_ID);
 
-   prog_data->patch_count_threshold = get_patch_count_threshold(key->input_vertices);
+   prog_data->patch_count_threshold = brw::get_patch_count_threshold(key->input_vertices);
 
    if (compiler->use_tcs_8_patch &&
        nir->info.tess.tcs_vertices_out <= (devinfo->gen >= 12 ? 32 : 16) &&
@@ -487,7 +489,7 @@
 
       assembly = g.get_assembly();
    } else {
-      vec4_tcs_visitor v(compiler, log_data, key, prog_data,
+      brw::vec4_tcs_visitor v(compiler, log_data, key, prog_data,
                          nir, mem_ctx, shader_time_index, &input_vue_map);
       if (!v.run()) {
          if (error_str)
@@ -507,6 +509,3 @@
 
    return assembly;
 }
-
-
-} /* namespace brw */