)]}'
{
  "commit": "e5499ca2bfe8b8d9520e2ef72ebc0da24425992c",
  "tree": "2c67c83fd269190b6cf1dfadc9d65fe80e03e790",
  "parents": [
    "22180137e9709937116f622185d027a108410236"
  ],
  "author": {
    "name": "Danylo Piliaiev",
    "email": "dpiliaiev@igalia.com",
    "time": "Mon Dec 14 18:42:59 2020 +0200"
  },
  "committer": {
    "name": "Danylo Piliaiev",
    "email": "dpiliaiev@igalia.com",
    "time": "Mon Dec 21 16:25:34 2020 +0200"
  },
  "message": "freedreno/a6xx: Fix SP_HS_UNKNOWN_A831 value and document it\n\nIt appears that storage for varyings in a wave has an upper\nlimit of wavesize * max_a831 where max_a831 is 64.\nExceeding the limit seam to force gpu to reduce primitives\nprocessed per wave, at least calculations make sense with\nsuch interpretation.\n\nWith blob SP_HS_UNKNOWN_A831 never exceeds 64 and setting\nit to 65 in freedreno leads to a hang.\n\nOn A630 tests (patch_size\u003d3 + gl_Position + array of vec4)\nhave shown such relation:\n\n| Num of vec4 | A831 | PC_HS_INPUT_SIZE |\n|-------------|------|------------------|\n| 1           | 0x10 | 0xc              |\n| 2           | 0x14 | 0xf              |\n| 3           | 0x18 | 0x12             |\n| 4           | 0x1c | 0x15             |\n| 5           | 0x20 | 0x18             |\n| 6           | 0x24 | 0x1b             |\n| 7           | 0x28 | 0x1e             |\n| 8           | 0x2c | 0x21             |\n| 9           | 0x30 | 0x24             |\n| 10          | 0x34 | 0x27             |\n| 11          | 0x38 | 0x2a             |\n| 12          | 0x3c | 0x2d             |\n| 13          | 0x3f | 0x30             |\n| 14          | 0x40 | 0x33             |\n| 15          | 0x3d | 0x36             |\n| 16          | 0x3d | 0x39             |\n| 17          | 0x40 | 0x3c             |\n| 18          | 0x3f | 0x3f             |\n| 19          | 0x3e | 0x42             |\n| 20          | 0x3d | 0x45             |\n| 21          | 0x3f | 0x48             |\n| 22          | 0x3d | 0x4b             |\n| 23          | 0x40 | 0x4e             |\n| 24          | 0x3d | 0x51             |\n| 25          | 0x3f | 0x54             |\n| 26          | 0x3c | 0x57             |\n| 27          | 0x3e | 0x5a             |\n| 28          | 0x40 | 0x5d             |\n| 29          | 0x3c | 0x60             |\n| 30          | 0x3e | 0x63             |\n| 31          | 0x40 | 0x66             |\n|-------------|------|------------------|\n\nBrief tests with high patch sizes also confirm that formula\nmatches blob behaviour.\n\nA831 is not a limit for storage available for one thread, so\nnaming it as SP_HS_WAVE_INPUT_SIZE would make more sense.\n\nFixes: 47e2c195 \"freedreno/a6xx: Program state for tessellation stages\"\n\nSigned-off-by: Danylo Piliaiev \u003cdpiliaiev@igalia.com\u003e\nPart-of: \u003chttps://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7917\u003e\n",
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