)]}'
{
  "commit": "b2e1fc8976de00fb0924c08d6556106b44d2268b",
  "tree": "14be2492f2df74ef8636f99fe766c4880a57f565",
  "parents": [
    "9190f82d573c43e96c3e1c92e0350da755ba5f6a"
  ],
  "author": {
    "name": "Jason Ekstrand",
    "email": "jason@jlekstrand.net",
    "time": "Fri Sep 25 17:43:33 2020 -0500"
  },
  "committer": {
    "name": "Marge Bot",
    "email": "eric+marge@anholt.net",
    "time": "Fri Oct 02 07:30:49 2020 +0000"
  },
  "message": "nir: Add a pass to lower vec3s to vec4s\n\nLLVM loves take advantage of the fact that vec3s in OpenCL are 16B\naligned and so it can just read/write them as vec4s.  This results in a\nLOT of vec4-\u003evec3 casts on loads and stores.  One solution to this\nproblem is to get rid of all vec3 variables.\n\nReviewed-by: Jesse Natalie \u003cjenatali@microsoft.com\u003e\nPart-of: \u003chttps://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6871\u003e\n",
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