tree bf07f171134318f6fb3a439746070e64f1605a63
parent ec7b55f4cc5dd3dc61eb6b9e51f46c58a2a896d3
author Danylo Piliaiev <danylo.piliaiev@globallogic.com> 1587730304 +0300
committer Marge Bot <eric+marge@anholt.net> 1593085810 +0000

iris: Honor scanout requirement from DRI

Translate PIPE_BIND_SCANOUT as ISL_SURF_USAGE_DISPLAY_BIT,
instead of PIPE_BIND_DISPLAY_TARGET.

PIPE_BIND_DISPLAY_TARGET isn't used for dri images and seem to
be set only for fake winsys buffers (which aren't displayed).
The trouble is that a fake buffer could be multisampled and we
cannot have multisampled surface with display bit.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2313
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4784>