radeonsi: Bugfix needed for hashcat
Hashcat needs MAX_GLOBAL_BUFFERS to be 21 or even 22 for some modes. It'll crash otherwise.
I'm adding an assert to see if programs need it to be even higher.
Signed-off-by: Christian Inci <chris.bugsfd@broke-the-inter.net>
[Handle first properly; should be NFC, since clover always uses first == 0.]
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index 9d83cb3..cb14a35 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -32,7 +32,7 @@
#include "si_pipe.h"
#include "sid.h"
-#define MAX_GLOBAL_BUFFERS 20
+#define MAX_GLOBAL_BUFFERS 22
struct si_compute {
unsigned ir_type;
@@ -196,17 +196,19 @@
struct si_context *sctx = (struct si_context*)ctx;
struct si_compute *program = sctx->cs_shader_state.program;
+ assert(first + n <= MAX_GLOBAL_BUFFERS);
+
if (!resources) {
- for (i = first; i < first + n; i++) {
- pipe_resource_reference(&program->global_buffers[i], NULL);
+ for (i = 0; i < n; i++) {
+ pipe_resource_reference(&program->global_buffers[first + i], NULL);
}
return;
}
- for (i = first; i < first + n; i++) {
+ for (i = 0; i < n; i++) {
uint64_t va;
uint32_t offset;
- pipe_resource_reference(&program->global_buffers[i], resources[i]);
+ pipe_resource_reference(&program->global_buffers[first + i], resources[i]);
va = r600_resource(resources[i])->gpu_address;
offset = util_le32_to_cpu(*handles[i]);
va += offset;
