i965: Skip register write detection when possible.
Detecting register write support by trial and error introduces a
stall at screen creation time, which it would be nice to avoid.
Certain command parser versions guarantee this will work (see the
giant comment in intelInitScreen2 below, or a few commits ago):
- Ivybridge: version >= 1 (kernel v3.16)
- Baytrail: version >= 2 (kernel v3.19)
- Haswell: version >= 7 (kernel v4.8)
For simplicity, we don't bother with version 1 in this patch.
This assumes that the user hasn't disabled aliasing PPGTT via a kernel
command line parameter. Don't do that - you're only breaking things.
Signed-off-by: Kenneth Graunke <email@example.com>
Reviewed-by: Samuel Iglesias Gonsálvez <firstname.lastname@example.org>
(cherry picked from commit 5e29af5f772c1e1b02a4cc46d2f7d3b5d2151ad8)
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c
index 61b001e..5d1c768 100644
@@ -1346,13 +1346,19 @@
intel_detect_pipelined_so(struct intel_screen *screen)
+ const struct gen_device_info *devinfo = &screen->devinfo;
/* Supposedly, Broadwell just works. */
- if (screen->devinfo.gen >= 8)
+ if (devinfo->gen >= 8)
- if (screen->devinfo.gen <= 6)
+ if (devinfo->gen <= 6)
+ /* See the big explanation about command parser versions below */
+ if (screen->cmd_parser_version >= (devinfo->is_haswell ? 7 : 2))
+ return true;
/* We use SO_WRITE_OFFSET0 since you're supposed to write it (unlike the
* statistics registers), and we already reset it to zero before using it.