| commit | 03e8b3551cf52b6b8b8efb48af7f413ddc4116b1 | [log] [tgz] |
|---|---|---|
| author | Marcin Ślusarz <marcin.slusarz@intel.com> | Thu Jul 09 20:54:41 2020 +0200 |
| committer | Marge Bot <eric+marge@anholt.net> | Mon Aug 10 13:41:29 2020 +0000 |
| tree | 962479e2c9d15aacae9c431844cd7a9582ebd0c0 | |
| parent | e7e6f709389be9744841d42dade3fcee8e8c6a30 [diff] |
intel/perf: fix how pipeline stats are stored It matters only when counters are not ordered by offset. Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5788>