commit 441462f9328cc7fb86af74c9568a7f70b7bd1fbc
author Owen Anderson <resistor@mac.com> Thu Sep 08 22:48:37 2011 +0000
committer Owen Anderson <resistor@mac.com> Thu Sep 08 22:48:37 2011 +0000
tree 24c3b8071f0427ad312bea365e2cee9aabee44b2
parent d2fc31b3f75700dc89305cb161f3bca7f1a39bef

All conditional branches are disallowed in IT blocks, not just CBZ/CBNZ.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139329 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/Disassembler/ARMDisassembler.cpp

diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index d361a60..2791350 100644
--- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -429,12 +429,13 @@
   switch (MI.getOpcode()) {
     case ARM::tBcc:
     case ARM::t2Bcc:
-      return Success;
     case ARM::tCBZ:
     case ARM::tCBNZ:
-      // Some instructions are not allowed in IT blocks.
+      // Some instructions (mostly conditional branches) are not
+      // allowed in IT blocks.
       if (!ITBlock.empty())
         return SoftFail;
+      return Success;
       break;
     default:
       break;