Thumb2 assembly parsing and encoding for UASX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140085 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 1a5acfe..7ec28e5 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -4952,6 +4952,8 @@
def : MnemonicAlias<"shsubaddx", "shsax">;
// SSAX == SSUBADDX
def : MnemonicAlias<"ssubaddx", "ssax">;
+// UASX == UADDSUBX
+def : MnemonicAlias<"uaddsubx", "uasx">;
// LDRSBT/LDRHT/LDRSHT post-index offset if optional.
// Note that the write-back output register is a dummy operand for MC (it's
diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s
index 65299ca..892cdaf 100644
--- a/test/MC/ARM/basic-thumb2-instructions.s
+++ b/test/MC/ARM/basic-thumb2-instructions.s
@@ -2686,3 +2686,21 @@
@ CHECK: ite gt @ encoding: [0xcc,0xbf]
@ CHECK: uadd16gt r1, r2, r3 @ encoding: [0x92,0xfa,0x43,0xf1]
@ CHECK: uadd8le r1, r2, r3 @ encoding: [0x82,0xfa,0x43,0xf1]
+
+
+@------------------------------------------------------------------------------
+@ UASX
+@------------------------------------------------------------------------------
+ uasx r9, r12, r0
+ it eq
+ uasxeq r9, r12, r0
+ uaddsubx r9, r12, r0
+ it eq
+ uaddsubxeq r9, r12, r0
+
+@ CHECK: uasx r9, r12, r0 @ encoding: [0xac,0xfa,0x40,0xf9]
+@ CHECK: it eq @ encoding: [0x08,0xbf]
+@ CHECK: uasxeq r9, r12, r0 @ encoding: [0xac,0xfa,0x40,0xf9]
+@ CHECK: uasx r9, r12, r0 @ encoding: [0xac,0xfa,0x40,0xf9]
+@ CHECK: it eq @ encoding: [0x08,0xbf]
+@ CHECK: uasxeq r9, r12, r0 @ encoding: [0xac,0xfa,0x40,0xf9]
