commit 149f29f1fdd3f806fcc2570173105d27d718bd1d
author Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Tue Sep 20 22:34:45 2011 +0000
committer Bruno Cardoso Lopes <bruno.cardoso@gmail.com> Tue Sep 20 22:34:45 2011 +0000
tree 3693b9ac79f361613def585f7f36898813b3f346
parent e3039de7225cdceca8a22b8c662a4b05b3dcc566

Simplify max/minp[s|d] dagcombine matching

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140199 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86ISelLowering.cpp

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index c21b1dc..a2b5d04 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -12562,17 +12562,14 @@
   // Get the LHS/RHS of the select.
   SDValue LHS = N->getOperand(1);
   SDValue RHS = N->getOperand(2);
+  EVT VT = LHS.getValueType();
 
   // If we have SSE[12] support, try to form min/max nodes. SSE min/max
   // instructions match the semantics of the common C idiom x<y?x:y but not
   // x<=y?x:y, because of how they handle negative zero (which can be
   // ignored in unsafe-math mode).
-  if (Cond.getOpcode() == ISD::SETCC &&
-      ((Subtarget->hasXMMInt() &&
-        (LHS.getValueType() == MVT::f32 || LHS.getValueType() == MVT::v4f32 || 
-         LHS.getValueType() == MVT::f64 || LHS.getValueType() == MVT::v2f64)) ||
-       (Subtarget->hasAVX() &&
-        (LHS.getValueType() == MVT::v8f32 || LHS.getValueType() == MVT::v4f64)))) {
+  if (Cond.getOpcode() == ISD::SETCC && VT.isFloatingPoint() &&
+      VT != MVT::f80 && DAG.getTargetLoweringInfo().isTypeLegal(VT)) {
     ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
 
     unsigned Opcode = 0;