tree 103a53607c843951f6974130d3ec07ced62d08bd
parent 919d2514641f2672496df144392dc24a62ca261e
author Chen-Yu Tsai <wens@csie.org> 1542696790 +0800
committer Maxime Ripard <maxime.ripard@bootlin.com> 1542700640 +0100
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arm64: dts: allwinner: h6: orangepi: Enable USB 2.0 host and OTG ports

The Orange Pi Lite 2 and Orange Pi One Plus share the same design for
their USB 2.0 ports. VBUS is directly tied to the board wide 5V rail,
which is also directly tied to the DC jack. There is no current limiting
in this design.

This patch enables all the USB 2.0 related device nodes, and sets the
VBUS regulator supplies and OTG ID detection GPIO.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>