| commit | 80e61fcd23946cb222f780a49ab2eeb7ef1d3749 | [log] [tgz] |
|---|---|---|
| author | Christoph Hellwig <hch@lst.de> | Mon Jun 03 12:52:47 2019 +0200 |
| committer | Christoph Hellwig <hch@lst.de> | Tue Jun 25 08:14:24 2019 +0200 |
| tree | b3b775066ec7062eccd1e0fd50d7be00475099c0 | |
| parent | 34ab03160eda51839be6dd5a939680963266707c [diff] |
arc: remove the partial DMA_ATTR_NON_CONSISTENT support The arc DMA code supports DMA_ATTR_NON_CONSISTENT allocations, but does not provide a cache_sync operation. This means any user of it will never be able to actually transfer cache ownership and thus cause coherency bugs. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Evgeniy Paltsev <paltsev@synopsys.com> Tested-by: Evgeniy Paltsev <paltsev@synopsys.com>