| commit | 8cd61c313d8b5a813a38b615796ea50563f3afae | [log] [tgz] |
|---|---|---|
| author | Roman Li <Roman.Li@amd.com> | Tue Nov 20 16:50:29 2018 -0500 |
| committer | Alex Deucher <alexander.deucher@amd.com> | Tue Dec 18 17:39:35 2018 -0500 |
| tree | 086f1a054bac5aafbe638d8e241b1b9a44fc73cd | |
| parent | 77acd1cd912987ffd62dad6a09275a1fb406f0c2 [diff] |
drm/amd/display: Raise dispclk value for Polaris [Why] The visual corruption due to low display clock value observed on some systems [How] There was earlier patch for dspclk: 'drm/amd/display: Raise dispclk value for dce_update_clocks' Adding +15% workaround also to to dce112_update_clocks Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Leo Li <Sunpeng.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>