commit 0fb1f35ed9cc2115a88cc73a02e56d288bf2aa8f
author Vineet Gupta <vgupta@synopsys.com> Wed Feb 11 18:37:43 2015 +0530
committer Vineet Gupta <vgupta@synopsys.com> Mon Oct 28 12:12:32 2019 -0700
tree 71099784d49368fc03c37ac966bfcc1bb25ce636
parent cfd9d70a855edf6adb37d0ed88be9e35274dbe49

ARCv2: mm: TLB Miss optim: Use double world load/stores LDD/STD

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>

arch/arc/mm/tlbex.S

diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S
index d6fbded..110c725 100644
--- a/arch/arc/mm/tlbex.S
+++ b/arch/arc/mm/tlbex.S
@@ -122,17 +122,27 @@
 #else	/* ARCv2 */
 
 .macro TLBMISS_FREEUP_REGS
+#ifdef CONFIG_ARC_HAS_LL64
+	std   r0, [sp, -16]
+	std   r2, [sp, -8]
+#else
 	PUSH  r0
 	PUSH  r1
 	PUSH  r2
 	PUSH  r3
+#endif
 .endm
 
 .macro TLBMISS_RESTORE_REGS
+#ifdef CONFIG_ARC_HAS_LL64
+	ldd   r0, [sp, -16]
+	ldd   r2, [sp, -8]
+#else
 	POP   r3
 	POP   r2
 	POP   r1
 	POP   r0
+#endif
 .endm
 
 #endif