)]}'
{
  "commit": "181964965d0ab11d5fd680b722d4845fbc89f5a5",
  "tree": "2057dc1e54c36d5fac730584b11a22a6d17664fc",
  "parents": [
    "63d2b2232148a493d6a5b385a1ebbbd3fa37ece3"
  ],
  "author": {
    "name": "Li, Xin6",
    "email": "xin6.li@intel.com",
    "time": "Tue Nov 07 13:52:52 2023 +0800"
  },
  "committer": {
    "name": "Zhang, Xinfeng",
    "email": "carl.zhang@intel.com",
    "time": "Tue Dec 19 14:57:43 2023 +0800"
  },
  "message": "va:Add PRIME3 defination\n\nAdd PRIME3 memory type defination to support create surface with extra flags.\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "0bda4587459280f7873a426d29b899101ac3786e",
      "old_mode": 33188,
      "old_path": "va/va_drmcommon.h",
      "new_id": "3396abe9c080dfaa8b31cc098335d319194ade73",
      "new_mode": 33188,
      "new_path": "va/va_drmcommon.h"
    },
    {
      "type": "modify",
      "old_id": "a273bf0519ab407fe9999fffd8089908d116baf6",
      "old_mode": 33188,
      "old_path": "va/va_trace.c",
      "new_id": "365708cff0ebca8fba41ea8d781aab98ae47e184",
      "new_mode": 33188,
      "new_path": "va/va_trace.c"
    }
  ]
}