tree d0cea8998b136bb0008b79eb6a14459a200504fb
parent 5498d670f514c6570987236db60650b74c3d8bcb
author Steinar Midtskogen <stemidts@cisco.com> 1527511656 +0200
committer Steinar Midtskogen <stemidts@cisco.com> 1529000499 +0000

Import SIMD intrinsics from more recent Thor code

This enables ARMv8/aarch64 optimisations of CDEF as well as a few
minor improvements to x86 and ARMv7.  Several new intrinsics also
added, which makes it possible to remove x86 specific code in the CDEF
code.  Also, various sanitizer warnings have been addressed (mostly
related to intended two-complement overflow/underflow).  And there are
several AVX2 improvements.

New intrinsics: v64_sadd_s8, v64_sadd_u8, v64_pack_s32_u16,
v64_rdavg_u16, v128_sad_u16, v128_ssd_s16, v128_sadd_s8, v128_sadd_u8,
v128_add_64, v128_sub_64, v128_pack_s32_u16, v128_rdavg_u16,
v128_min_s32, v128_max_s32, v128_cmpgt_s32, v128_cmpeq_32,
v128_cmplt_s32, v128_padd_u8, v128_shl_n_64, v128_shr_n_u64,
v128_shr_n_s64, v128_shr_s64, v128_shr_u64, v128_shl_64,
v128_dotp_su8, v128_dotp_s32, v128_movemask_8, v128_dup_64,
v128_blend_8, v256_sad_u16, v256_ssd_s16, v256_low_u64, v256_dotp_su8,
v256_dotp_s32, v256_sadd_s8, v256_sadd_u8, v256_add_64, v256_sub_64,
v256_pack_s32_u16, v256_rdavg_u16, v256_min_s32, v256_max_s32,
v256_cmpgt_s32, v256_cmplt_s32, v256_cmpeq_32, v256_wideshuffle_8,
v256_padd_u8, v256_shl_n_64, v256_shr_n_u64, v256_shr_n_s64,
v256_shr_s64, v256_shr_u64, v256_shl_64, v256_movemask_8, v256_dup_64,
v256_blend_8, v256_unziplo_64, v256_unziphi_64

The unit tests have been updated.

Change-Id: If051e902f2095e3a02aaf13cf1230475392f051e