Snap for 12673321 from fc556bccc1bd436e436661c416c319e8f30a683e to 25Q1-release
Change-Id: Ib6e5451c6978d1e1e193d1ff7651a2d77093e65f
diff --git a/METADATA b/METADATA
index 92a513a..6ee71fd 100644
--- a/METADATA
+++ b/METADATA
@@ -8,14 +8,14 @@
license_type: RESTRICTED
last_upgrade_date {
year: 2024
- month: 10
- day: 31
+ month: 11
+ day: 13
}
homepage: "https://flashrom.org/"
identifier {
type: "Git"
value: "https://chromium.googlesource.com/chromiumos/third_party/flashrom/"
+ version: "c08865ab385d8aea6abea48850892e32bb45d5e8"
primary_source: true
- version: "05d781e93d8967799d7580da2994af996db71c65"
}
}
diff --git a/VERSION b/VERSION
index 4a06232..bd033f4 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-1.5.0-devel
+v1.5.0-devel
diff --git a/doc/about_flashrom/team.rst b/doc/about_flashrom/team.rst
index 215d930..cbcef45 100644
--- a/doc/about_flashrom/team.rst
+++ b/doc/about_flashrom/team.rst
@@ -6,7 +6,7 @@
All contributors and users who have a Gerrit account can send patches,
add comments to patches and vote +1..-1 on patches.
-All contributors and users are expected to follow Development guidelines and
+All contributors and users are expected to follow :doc:`/dev_guide/development_guide` and
:doc:`code_of_conduct`.
There are two special groups in Gerrit.
@@ -18,7 +18,7 @@
can do full approval of patches (i.e. vote +2).
In general, members of the group have some area of responsibility in the
-`MAINTAINERS <https://review.coreboot.org/plugins/gitiles/flashrom/+/refs/heads/main/MAINTAINERS>`_ file,
+`MAINTAINERS <https://github.com/flashrom/flashrom/blob/main/MAINTAINERS>`_ file,
and are automatically added as reviewers to patches when the patch touches this area.
The responsibilities are the following.
diff --git a/doc/contact.rst b/doc/contact.rst
index 79cdb91..38888fb 100644
--- a/doc/contact.rst
+++ b/doc/contact.rst
@@ -43,8 +43,8 @@
You are welcome to join and discuss current and future flashrom development, ideas and contributions.
-If you have a problem and would like to get help, don't ask for help. Instead, just **explain** your problem right away,
-and make sure to **describe** the situation as much as possible, so that other people can understand you and provide meaningful answers.
+If you have a problem and would like to get help, don't ask for help. Instead, just explain your problem right away,
+and make sure to describe the situation as much as possible, so that other people can understand you and provide meaningful answers.
Otherwise, others have to ask or guess the details of your problem, which is frustrating for both parties.
Should you need to paste lots of text (more than three lines), please use a `paste service <https://en.wikipedia.org/wiki/Pastebin>`_.
@@ -54,6 +54,12 @@
Questions on `coreboot <https://coreboot.org>`_, `OpenBIOS <http://www.openbios.info/>`_, firmware and related topics are welcome in **#coreboot** on the same server.
+Discord
+"""""""
+
+Flashrom Discord channel is hosted on coreboot's server. Once you join, you will be able to see all coreboot's and flashrom's channels in one place.
+To join, use the `invite link <https://discord.gg/dgcrkwVyeR>`_.
+
IRC
"""
@@ -68,10 +74,10 @@
with many different cultures and timezones. Most people are in the `CET timezone <https://en.wikipedia.org/wiki/Central_European_Time>`_,
so the channel may be very quiet during `CET nighttime <https://time.is/CET>`_.
-If you receive no replies, **please be patient**.
+If you receive no replies, *please be patient*.
After all, silence is better than getting replied with `"IDK" <https://en.wiktionary.org/wiki/IDK>`_.
-Frequently, somebody knows the answer, but hasn't checked IRC yet. In any case, please **do not leave the channel while waiting for an answer!**
-Since IRC does not store messages, replying to somebody who left the channel is **impossible**.
+Frequently, somebody knows the answer, but hasn't checked IRC yet. In any case, please *do not leave the channel while waiting for an answer!*
+Since IRC does not store messages, replying to somebody who left the channel is *impossible*.
To have persistence on IRC, you can set up an `IRC bouncer <https://en.wikipedia.org/wiki/Internet_Relay_Chat#Bouncer>`_
like `ZNC <https://en.wikipedia.org/wiki/ZNC>`_, or use `IRCCloud <https://www.irccloud.com/>`_.
@@ -81,11 +87,7 @@
Instead of sending lots of tiny messages with only about two words, prefer using longer sentences, spaces and punctuation symbols.
If reading and understanding your messages is easy, replying to them is also easy.
-Discord
-"""""""
-
-Flashrom Discord channel is hosted on coreboot's server. Once you join, you will be able to see all coreboot's and flashrom's channels in one place.
-To join, use the `invite link <https://discord.gg/dgcrkwVyeR>`_.
+*Note: the channel is not moderated or monitored by any of the current active maintainers.*
Dev meeting
-----------
diff --git a/doc/dev_guide/release_process.rst b/doc/dev_guide/release_process.rst
index 749779e..15eaf6c 100644
--- a/doc/dev_guide/release_process.rst
+++ b/doc/dev_guide/release_process.rst
@@ -24,14 +24,13 @@
* Double-check and merge all the patches that are fully ready (see also :ref:`merge-checklist`)
-* Update VERSION file to first release candidate. Check the git history of VERSION file for a version name pattern.
+* Update VERSION file to first release candidate. The name pattern is: ``v{version_number}-rc{rc_number}``.
- * As an example at the time of writing, the version name of the first release candidate was ``1.4.0-rc1``.
+ * As an example, the version name of the first release candidate can be ``v1.4.0-rc1``.
* To update the VERSION file, push a patch to Gerrit, and another maintainer should review and approve.
-* After submitting the change to the VERSION file, tag this commit.
- You can check `flashrom tags in Gerrit <https://review.coreboot.org/admin/repos/flashrom,tags,25>`_
- for tag name pattern. As an example at the time of writing, the tag name was ``v1.4.0-rc1``.
+* After submitting the change to the VERSION file, tag this commit. Tag name should be the same as
+ version name, for example above ``v1.4.0-rc1``.
* Write an announcement on the mailing list. Be very clear about:
@@ -74,13 +73,19 @@
* Submit the release notes, and in the same patch restart :doc:`/release_notes/devel` document.
This way everyone who is syncing the repository by the release tag will have release notes in the tree.
-* Update VERSION file to release version (for example, at the time of writing ``1.4.0``), and submit this
+* Update VERSION file to release version, name pattern is: ``v{version_name}``
+ (for example, it can be ``v1.4.0``), and submit this.
-* Tag the commit which updates the VERSION file. You can check
- `flashrom tags in Gerrit <https://review.coreboot.org/admin/repos/flashrom,tags,25>`_ for tag name pattern.
- As an example at the time of writing, the tag name was ``v1.4.0``.
+* Tag the commit which updates the VERSION file. Tag name should be the same as version name,
+ for example above ``v1.4.0``.
-* Create the tarball, sign it, and upload to the server together with the signature.
+* Create the tarball:
+
+ * At the moment of writing, the command we use ``meson dist --include-subprojects``,
+ more details are in `meson docs <https://mesonbuild.com/Creating-releases.html#creating-releases>`_.
+ * Check that tarball name follows the pattern ``flashrom-v{version_name}.tar.xz``, for example ``flashrom-v1.4.0.tar.xz``.
+
+* Sign the tarball, and upload to the server together with the signature.
* Update release notes with the link to download tarball, signature, and fingerprint. Submit this and check that final release notes are published on the website.
@@ -93,7 +98,8 @@
Start the next cycle of development
===================================
-* Update the VERSION file to the development version. For example, at the time of writing ``1.5.0-devel``, and submit this.
+* Update the VERSION file to the development version. For example, the name pattern is: ``v{version_name}-devel``,
+ for example ``v1.5.0-devel``, and submit this.
* Submit all the patches that have been ready and waiting.
diff --git a/doc/release_notes/devel.rst b/doc/release_notes/devel.rst
index 919d364..8021899 100644
--- a/doc/release_notes/devel.rst
+++ b/doc/release_notes/devel.rst
@@ -26,6 +26,7 @@
New Feature
===========
+
Libpci 3.13.0 and onwards support ECAM to access pci registers. Flashrom will
be moved to ECAM from IO port 0xcf8/0xcfc if the libpci version is >= 3.13.0.
The ECAM has been supported for a very long time, most platforms should support
@@ -34,4 +35,48 @@
Chipset support
===============
+
Added Raptor Point PCH support.
+
+Chip model support added
+========================
+
+* FM25Q04
+* FM25Q64
+* FM25Q128
+
+* GD25B128E
+* GD25B256E
+* GD25B512MF
+* GD25F64F
+* GD25F256F
+* GD25R128E
+* GD25R256E
+* GD25R512MF
+* GD25LB256F
+* GD25LB512ME
+* GD25LB512MF
+* GD25LR256F
+* GD25LR512MF
+* GD25LF256F
+* GD25LF512MF
+
+* MX25U25645G
+* MX77U51250F
+
+* W25Q32JV_M
+
+* XM25LU64C
+* XM25QH32C
+* XM25QH32D
+* XM25QH64D
+* XM25QH128D
+* XM25QH256D
+* XM25QH512C
+* XM25QH512D
+* XM25QU16C
+* XM25QU32C
+* XM25QU128D
+* XM25QU256D
+* XM25QU512C
+* XM25QU512D
diff --git a/erasure_layout.c b/erasure_layout.c
index eba052b..db1e8a4 100644
--- a/erasure_layout.c
+++ b/erasure_layout.c
@@ -189,6 +189,27 @@
}
}
+/* Deselect all the blocks from index_to_deselect and down to the smallest. */
+static void deselect_erase_functions(const struct erase_layout *layout, size_t index_to_deselect,
+ int sub_block_start, const int sub_block_end)
+{
+ for (int j = sub_block_start; j <= sub_block_end; j++)
+ layout[index_to_deselect].layout_list[j].selected = false;
+
+ int block_start_to_deselect =
+ layout[index_to_deselect].layout_list[sub_block_start].first_sub_block_index;
+ int block_end_to_deselect =
+ layout[index_to_deselect].layout_list[sub_block_end].last_sub_block_index;
+
+ if (index_to_deselect)
+ deselect_erase_functions(layout,
+ index_to_deselect - 1,
+ block_start_to_deselect,
+ block_end_to_deselect);
+ else
+ return; // index_to_deselect has already reached 0, the smallest size of block. we are done.
+}
+
/*
* @brief Function to select the list of sectors that need erasing
*
@@ -228,10 +249,18 @@
}
const int total_blocks = sub_block_end - sub_block_start + 1;
- if (count && count > total_blocks/2) {
+ if (count == total_blocks) {
+ /* We are selecting one large block instead, so send opcode once
+ * instead of sending many smaller ones.
+ */
if (ll->start_addr >= rstart && ll->end_addr <= rend) {
- for (int j = sub_block_start; j <= sub_block_end; j++)
- layout[findex - 1].layout_list[j].selected = false;
+ /* Deselect all smaller blocks covering the same region. */
+ deselect_erase_functions(layout,
+ findex - 1,
+ sub_block_start,
+ sub_block_end);
+
+ /* Select large block. */
ll->selected = true;
}
}
diff --git a/flashchips.c b/flashchips.c
index 6f94ff6..9947cff 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -8084,6 +8084,153 @@
.voltage = {2300, 3600},
},
+{
+ .vendor = "GigaDevice",
+ .name = "GD25F64F",
+ .bustype = BUS_SPI,
+ .manufacture_id = GIGADEVICE_ID,
+ .model_id = GIGADEVICE_GD25F64F,
+ .total_size = 8192,
+ .page_size = 256,
+ /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR2 | FEATURE_WRSR3,
+ .tested = TEST_OK_PREWB,
+ .probe = PROBE_SPI_RDID,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 2048} },
+ .block_erase = SPI_BLOCK_ERASE_20,
+ }, {
+ .eraseblocks = { {32 * 1024, 256} },
+ .block_erase = SPI_BLOCK_ERASE_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 128} },
+ .block_erase = SPI_BLOCK_ERASE_D8,
+ }, {
+ .eraseblocks = { {8 * 1024 * 1024, 1} },
+ .block_erase = SPI_BLOCK_ERASE_60,
+ }, {
+ .eraseblocks = { {8 * 1024 * 1024, 1} },
+ .block_erase = SPI_BLOCK_ERASE_C7,
+ }
+ },
+ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD,
+ .unlock = SPI_DISABLE_BLOCKPROTECT_BP4_SRWD, /* TODO: 2nd status reg (read with 0x35) */
+ .write = SPI_CHIP_WRITE256,
+ .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
+ .voltage = {2700, 3600},
+ .reg_bits =
+ {
+ .srp = {STATUS1, 7, RW},
+ .srl = {STATUS2, 0, RW},
+ .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}},
+ .tb = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like TB */
+ .sec = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like SEC */
+ .cmp = {STATUS3, 4, RW},
+ },
+ .decode_range = DECODE_RANGE_SPI25,
+ },
+
+{
+ .vendor = "GigaDevice",
+ .name = "GD25F128F",
+ .bustype = BUS_SPI,
+ .manufacture_id = GIGADEVICE_ID,
+ .model_id = GIGADEVICE_GD25F128F,
+ .total_size = 16384,
+ .page_size = 256,
+ /* OTP: 3x2048B; read 0x48; write 0x42, erase 0x44 */
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR2 | FEATURE_WRSR3,
+ .tested = TEST_OK_PREWB,
+ .probe = PROBE_SPI_RDID,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 4096} },
+ .block_erase = SPI_BLOCK_ERASE_20,
+ }, {
+ .eraseblocks = { {32 * 1024, 512} },
+ .block_erase = SPI_BLOCK_ERASE_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 256} },
+ .block_erase = SPI_BLOCK_ERASE_D8,
+ }, {
+ .eraseblocks = { {16 * 1024 * 1024, 1} },
+ .block_erase = SPI_BLOCK_ERASE_60,
+ }, {
+ .eraseblocks = { {16 * 1024 * 1024, 1} },
+ .block_erase = SPI_BLOCK_ERASE_C7,
+ }
+ },
+ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD,
+ .unlock = SPI_DISABLE_BLOCKPROTECT_BP4_SRWD, /* TODO: 2nd status reg (read with 0x35) */
+ .write = SPI_CHIP_WRITE256,
+ .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
+ .voltage = {2700, 3600},
+ .reg_bits =
+ {
+ .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
+ .tb = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like TB */
+ },
+ .decode_range = DECODE_RANGE_SPI25,
+ },
+
+ {
+ .vendor = "GigaDevice",
+ .name = "GD25F256F",
+ .bustype = BUS_SPI,
+ .manufacture_id = GIGADEVICE_ID,
+ .model_id = GIGADEVICE_GD25F256F,
+ .total_size = 32768,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI | FEATURE_WRSR2 | FEATURE_WRSR3 | FEATURE_4BA,
+ .tested = TEST_OK_PREWB,
+ .probe = PROBE_SPI_RDID,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 8192} },
+ .block_erase = SPI_BLOCK_ERASE_21,
+ }, {
+ .eraseblocks = { {4 * 1024, 8192} },
+ .block_erase = SPI_BLOCK_ERASE_20,
+ }, {
+ .eraseblocks = { {32 * 1024, 1024} },
+ .block_erase = SPI_BLOCK_ERASE_5C,
+ }, {
+ .eraseblocks = { {32 * 1024, 1024} },
+ .block_erase = SPI_BLOCK_ERASE_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 512} },
+ .block_erase = SPI_BLOCK_ERASE_DC,
+ }, {
+ .eraseblocks = { {64 * 1024, 512} },
+ .block_erase = SPI_BLOCK_ERASE_D8,
+ }, {
+ .eraseblocks = { {32 * 1024 * 1024, 1} },
+ .block_erase = SPI_BLOCK_ERASE_60,
+ }, {
+ .eraseblocks = { {32 * 1024 * 1024, 1} },
+ .block_erase = SPI_BLOCK_ERASE_C7,
+ }
+ },
+ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD,
+ .unlock = SPI_DISABLE_BLOCKPROTECT_BP4_SRWD,
+ .write = SPI_CHIP_WRITE256,
+ .read = SPI_CHIP_READ,
+ .voltage = {2700, 3600},
+ .reg_bits =
+ {
+ .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
+ .tb = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like TB */
+ },
+ .decode_range = DECODE_RANGE_SPI25,
+ },
+
{
.vendor = "GigaDevice",
.name = "GD25WQ80E",
@@ -22631,14 +22778,14 @@
{
.vendor = "XMC",
- .name = "XM25QU64C",
+ .name = "XM25QU64C/XM25LU64C",
.bustype = BUS_SPI,
.manufacture_id = ST_ID,
.model_id = XMC_XM25QU64C,
.total_size = 8192,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI,
- .tested = TEST_UNTESTED,
+ .tested = TEST_OK_PREW,
.probe = PROBE_SPI_RDID,
.probe_timing = TIMING_ZERO,
.block_erasers =
diff --git a/ichspi.c b/ichspi.c
index f5fad01..dc5caee 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -1832,7 +1832,11 @@
static bool ich_spi_probe_opcode(const struct flashctx *flash, uint8_t opcode)
{
- return find_opcode(curopcodes, opcode) >= 0;
+ int ret = find_opcode(curopcodes, opcode);
+ if ((ret == -1) && (lookup_spi_type(opcode) <= 3))
+ /* opcode is in POSSIBLE_OPCODES, report supported. */
+ return true;
+ return ret >= 0;
}
#define ICH_BMWAG(x) ((x >> 24) & 0xff)
@@ -2037,18 +2041,7 @@
msg_gspew("resulted in 0x%08"PRIx32".\n", mmio_readl(addr));
}
-static const struct spi_master spi_master_ich7 = {
- .max_data_read = 64,
- .max_data_write = 64,
- .command = ich_spi_send_command,
- .multicommand = ich_spi_send_multicommand,
- .map_flash_region = physmap,
- .unmap_flash_region = physunmap,
- .read = default_spi_read,
- .write_256 = default_spi_write_256,
-};
-
-static const struct spi_master spi_master_ich9 = {
+static const struct spi_master spi_master_ich = {
.max_data_read = 64,
.max_data_write = 64,
.command = ich_spi_send_command,
@@ -2100,7 +2093,7 @@
}
ich_init_opcodes(ich_gen);
ich_set_bbar(0, ich_gen);
- register_spi_master(&spi_master_ich7, NULL);
+ register_spi_master(&spi_master_ich, NULL);
return 0;
}
@@ -2466,7 +2459,7 @@
memcpy(opaque_hwseq_data, &hwseq_data, sizeof(*opaque_hwseq_data));
register_opaque_master(&opaque_master_ich_hwseq, opaque_hwseq_data);
} else {
- register_spi_master(&spi_master_ich9, NULL);
+ register_spi_master(&spi_master_ich, NULL);
}
return 0;
diff --git a/include/flashchips.h b/include/flashchips.h
index cacf177..0c1a8dc 100644
--- a/include/flashchips.h
+++ b/include/flashchips.h
@@ -400,6 +400,9 @@
#define GIGADEVICE_GD25VQ41B 0x4213 /* Same as GD25VQ40C, can be distinguished by SFDP */
#define GIGADEVICE_GD25VQ80C 0x4214
#define GIGADEVICE_GD25VQ16C 0x4215
+#define GIGADEVICE_GD25F64F 0x4317
+#define GIGADEVICE_GD25F128F 0x4318
+#define GIGADEVICE_GD25F256F 0x4319
#define GIGADEVICE_GD25LQ40 0x6013
#define GIGADEVICE_GD25LQ80 0x6014
#define GIGADEVICE_GD25LQ16 0x6015
@@ -853,7 +856,7 @@
#define ST_M45PE80 0x4014 /* Same as XM25QH80B */
#define ST_M45PE16 0x4015
#define XMC_XM25QH64C 0x4017 /* Same as XM25QH64D */
-#define XMC_XM25QU64C 0x4117
+#define XMC_XM25QU64C 0x4117 /* Same as XM25LU64C */
#define XMC_XM25QU80B 0x5014
#define XMC_XM25QH16C 0x4015 /* Same as XM25QH16D */
#define XMC_XM25QU16C 0x5015
diff --git a/linux_mtd.c b/linux_mtd.c
index eea0cf2..0cb2330 100644
--- a/linux_mtd.c
+++ b/linux_mtd.c
@@ -49,7 +49,7 @@
int i;
size_t bytes_read;
FILE *fp;
- char path[strlen(LINUX_MTD_SYSFS_ROOT) + 32];
+ char path[sizeof(LINUX_MTD_SYSFS_ROOT) + 31];
snprintf(path, sizeof(path), "%s/%s", sysfs_path, filename);
diff --git a/writeprotect.c b/writeprotect.c
index 411089d..964c311 100644
--- a/writeprotect.c
+++ b/writeprotect.c
@@ -482,7 +482,7 @@
case FLASHROM_WP_MODE_HARDWARE:
if (!bits->srp_bit_present)
- return FLASHROM_WP_ERR_CHIP_UNSUPPORTED;
+ return FLASHROM_WP_ERR_MODE_UNSUPPORTED;
bits->srl = 0;
bits->srp = 1;
