BACKPORT: internal.c: De-maze the pre-processor wraps a little
This makes it again easier to parse internal.c by consolidating
some processor wraps and labeling the ends of others.
BUG=none
BRANCH=none
TEST=builds
Original-Change-Id: I32fb1a3fff7afa671f08fb2cc2ad406772f5e10f
Original-Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Original-Reviewed-on: https://review.coreboot.org/c/flashrom/+/46815
Original-Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
(cherry picked from commit 74fd0300b8d4a58d3838963f60c9f16451d1db78)
Change-Id: Ibc8b30391055283eb2dc297ae1419eb685caa421
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+/2512926
Reviewed-by: Alan Green <avg@chromium.org>
Tested-by: Edward O'Callaghan <quasisec@chromium.org>
Commit-Queue: Alan Green <avg@chromium.org>
Commit-Queue: Edward O'Callaghan <quasisec@chromium.org>
Auto-Submit: Edward O'Callaghan <quasisec@chromium.org>
diff --git a/internal.c b/internal.c
index 57fee3f..fa70754 100644
--- a/internal.c
+++ b/internal.c
@@ -115,7 +115,7 @@
return 0;
}
-#endif // if IS_X86
+#endif /* IS_X86 */
static void internal_chip_writeb(const struct flashctx *flash, uint8_t val,
chipaddr addr)
@@ -306,9 +306,7 @@
msg_pinfo("Continuing anyway.\n");
}
}
-#endif // if IS_X86
-#if IS_X86
is_laptop = 2; /* Assume that we don't know by default. */
dmi_init();
@@ -331,7 +329,7 @@
* FIXME: Find a replacement for DMI on non-x86.
* FIXME: Enable Super I/O probing once port I/O is possible.
*/
-#endif // if IS_X86
+#endif /* IS_X86 */
/* Check laptop whitelist. */
board_handle_before_laptop();
@@ -365,7 +363,7 @@
ret = 1;
goto internal_init_exit;
}
-#endif // if IS_X86
+#endif /* IS_X86 */
if (internal_buses_supported & BUS_NONSPI)
register_par_master(&par_master_internal, internal_buses_supported);
