UPSTREAM: ft2232_spi: Fix broken GPIOL cs_bits state (#126)
This only sets 3rd CS# bit be asserted during read/write operations.
Tested and confirmed working on 4232H & PicoTap ft2232 programmers
against MX25R6435F & S25FL128S chips.
Original-Signed-off-by: Samir Ibradzic <sibradzic@gmail.com>
Original-Change-Id: Ia0ac14b9a52f251306887500dae3e57d73322157
Original-Reviewed-on: https://review.coreboot.org/c/flashrom/+/38898
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
(cherry picked from commit a43e44b6abbe8381be3f3dd20a430973cf8b8ab5)
BUG=b:145175076
BRANCH=master
TEST=works on servo v2
Tested-by: Nikolai Artemiev <nartemiev@chromium.org>
Signed-off-by: Nikolai Artemiev <nartemiev@chromium.org>
Change-Id: Ib6e2ae01540d5d88210b2011721b3c8fd42b6c41
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+/2209931
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: Edward O'Callaghan <quasisec@chromium.org>
Commit-Queue: Edward O'Callaghan <quasisec@chromium.org>
1 file changed