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android / platform / external / flashrom / 47d04ce9
commit47d04ce9f62d2778b3ea57a331535a800d439a61[log] [tgz]
authorEdward O'Callaghan <quasisec@chromium.org>Mon Aug 12 18:02:34 2019 +1000
committerCommit Bot <commit-bot@chromium.org>Sun Aug 25 04:13:32 2019 +0000
tree7ae10b4ae2d5ffd85976455929302316ee58a61e
parentf65ab7e56c4dd6c504e816b51b625cc7347afdcd [diff]
chipset_enable: Introduce enable_flash_ich_fwh_decode()

ICH2 (and C-ICH)/3/4/5 also have FWH_SEL1/2 registers but at
different addresses. In preparation for implementing fwh_idsel
parsing for older ICH chipsets extract the parameter handling
and add variables for the offsets.

While FWH_DEC_EN1 is a 16bit register for ICH6, it is two separate
8bit registers on ICH5 and earlier. Implement all accesses with two
byte instructions instead, to prepare for extended support.

Backports the upstream `commit 743babc875`.

BUG=chromium:478356
BRANCH=none
TEST=still builds

Change-Id: I216e45a7f9f1d037e630485f75fd38958a326b09
Signed-off-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+/1760508
Reviewed-by: Sam McNally <sammc@chromium.org>
1 file changed
tree: 7ae10b4ae2d5ffd85976455929302316ee58a61e
  1. Documentation/
  2. tests/
  3. util/
  4. .gitattributes
  5. .gitignore
  6. 82802ab.c
  7. action_descriptor.c
  8. action_descriptor.h
  9. amd_imc.c
  10. android.c
  11. android.h
  12. archtest.c
  13. atahpt.c
  14. big_lock.c
  15. big_lock.h
  16. bitbang_spi.c
  17. board_enable.c
  18. buspirate_spi.c
  19. cbtable.c
  20. check.h
  21. chipdrivers.h
  22. chipset_enable.c
  23. cli_classic.c
  24. cli_common.c
  25. cli_output.c
  26. COPYING
  27. coreboot_tables.h
  28. cros_ec.c
  29. cros_ec.h
  30. cros_ec_commands.h
  31. cros_ec_dev.c
  32. cros_ec_dev.h
  33. cros_ec_i2c.c
  34. cros_ec_lock.c
  35. cros_ec_lock.h
  36. cros_ec_lpc.c
  37. dediprog.c
  38. dmi.c
  39. drkaiser.c
  40. dummyflasher.c
  41. edi.c
  42. edi.h
  43. ene.h
  44. ene_lpc.c
  45. fdtmap.c
  46. fdtmap.h
  47. file.c
  48. file.h
  49. file_lock.c
  50. flash.h
  51. flashchips.c
  52. flashchips.h
  53. flashrom.8.tmpl
  54. flashrom.c
  55. fmap.c
  56. fmap.h
  57. ft2232_spi.c
  58. gfxnvidia.c
  59. helpers.c
  60. hwaccess.c
  61. hwaccess.h
  62. ich_descriptors.c
  63. ich_descriptors.h
  64. ichspi.c
  65. internal.c
  66. ipc_lock.h
  67. it85spi.c
  68. it87spi.c
  69. jedec.c
  70. layout.c
  71. layout.h
  72. linux_i2c.c
  73. linux_mtd.c
  74. linux_spi.c
  75. locks.h
  76. m29f400bt.c
  77. Makefile
  78. mcp6x_spi.c
  79. mec1308.c
  80. nic3com.c
  81. nicintel.c
  82. nicintel_spi.c
  83. nicnatsemi.c
  84. nicrealtek.c
  85. ogp_spi.c
  86. opaque.c
  87. os.h
  88. OWNERS
  89. pcidev.c
  90. physmap.c
  91. platform.h
  92. pm49fl00x.c
  93. power.c
  94. power.h
  95. PRESUBMIT.cfg
  96. print.c
  97. print_wiki.c
  98. processor_enable.c
  99. programmer.c
  100. programmer.h
  101. raiden_debug_spi.c
  102. rayer_spi.c
  103. README.chromiumos
  104. s25f.c
  105. satamv.c
  106. satasii.c
  107. sb600spi.c
  108. search.c
  109. search.h
  110. serial.c
  111. serprog.c
  112. serprog.h
  113. sharplhf00l04.c
  114. spi.c
  115. spi.h
  116. spi25.c
  117. spi25_statusreg.c
  118. spi4ba.c
  119. spi4ba.h
  120. sst28sf040.c
  121. sst49lfxxxc.c
  122. sst_fwhub.c
  123. stm50flw0x0x.c
  124. udelay.c
  125. usb_device.c
  126. usb_device.h
  127. usbdev.c
  128. w29ee011.c
  129. w39.c
  130. wbsio_spi.c
  131. wpce775x.c
  132. writeprotect.c
  133. writeprotect.h