tree bb67a333a2e06341077a943e252bc5182e491b8b
parent 7e24a8e75934608c3475e0dc5c48d5a3bfc17b31
author Daniel Verkamp <dverkamp@chromium.org> 1580512795 -0800
committer Commit Bot <commit-bot@chromium.org> 1580894316 +0000

devices: pci: fix writable_bits for 64-bit BARs

The high 32 bits of writable_bits was set incorrectly when adding 64-bit
memory BARs to PciConfiguration: it would effectively always be all
zeroes (no writable bits) instead of all ones (all writable bits).

The writable_bits field is used to determine which bits to force to 0
when reading the BAR, which is used by the guest to determine the size
of a BAR: write an all-ones value to the BAR, read it back, and the
resulting value has only the writable bits still set.  Since PCI BARs
must be a power of two in size, the effective size of the BAR is the
bitwise inverse of the resulting value plus one.

For 64-bit BARs, this process is the same, except that two contiguous
32-bit registers are combined, so for a 4096-byte 64-bit BAR, the
writable_bits field should be 0xFFFFFFFF_FFFFF000; however, with the
previous (buggy) code, it was 0x00000000_FFFFF000.

Add checks to the unit tests to verify that the writable_bits field is
correctly calculated as well.

BUG=None
TEST=cargo test -p devices pci_configuration
TEST=Boot Linux 4.19 kernel in crosvm

Change-Id: Ib97aa5dccf9bf042328c0fc9defe1797fc67bb05
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2033620
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>