Memory Layout

x86-64 guest physical memory map

This is a survey of the existing memory layout for crosvm on x86-64 when booting a Linux kernel. Some of these values are different when booting a BIOS image or when compiled with features=direct (ManaTEE); see the source. All addresses are in hexadecimal.

Name/source link	Address	End (exclusive)	Size	Notes
	`0000`	`7000`		RAM (may start at 0x1000 for crosvm-direct)
`ZERO_PAGE_OFFSET`	`7000`			Linux boot_params structure
`BOOT_STACK_POINTER`	`8000`			Boot SP value
`boot_pml4_addr`	`9000`			Boot page table
`boot_pdpte_addr`	`A000`			Boot page table
`boot_pde_addr`	`B000`			Boot page table
`CMDLINE_OFFSET`	`2_0000`	`20_0000`	~1.87 MiB	Linux kernel command line
`ACPI_HI_RSDP_WINDOW_BASE`	`E_0000`			ACPI RSDP table (TODO: technically overlaps command line buffer; check CMDLINE_MAX_SIZE)
`KERNEL_START_OFFSET`	`20_0000`			Linux kernel image load address
`END_ADDR_BEFORE_32BITS`	`20_0000`	`D000_0000`	~3.24 GiB	RAM (<4G)
`END_ADDR_BEFORE_32BITS`	`D000_0000`	`F400_0000`	576 MiB	Low (<4G) MMIO allocation area
`PCIE_CFG_MMIO_START`	`F400_0000`	`F800_0000`	64 MiB	PCIe enhanced config (ECAM)
`RESERVED_MEM_SIZE`	`F800_0000`	`1_0000_0000`	128 MiB	LAPIC/IOAPIC/HPET/…
`TSS_ADDR`	`FFFB_D000`			Boot task state segment
	`1_0000_0000`			RAM (>4G)
	(end of RAM)			High (>4G) MMIO allocation area

aarch64 guest physical memory map

All addresses are IPA in hexadecimal.

Common layout

These apply for all boot modes.

Name/source link	Address	End (exclusive)	Size	Notes
`SERIAL_ADDR[3]`	`2e8`	`2f0`	8 bytes	Serial port MMIO
`SERIAL_ADDR[1]`	`2f8`	`300`	8 bytes	Serial port MMIO
`SERIAL_ADDR[2]`	`3e8`	`3f0`	8 bytes	Serial port MMIO
`SERIAL_ADDR[0]`	`3f8`	`400`	8 bytes	Serial port MMIO
`AARCH64_RTC_ADDR`	`2000`	`3000`	4 KiB	Real-time clock
`AARCH64_PCI_CFG_BASE`	`1_0000`	`2_0000`	64 KiB	PCI configuration (CAM)
`AARCH64_MMIO_BASE`	`200_0000`	`400_0000`	32 MiB	Low MMIO allocation area
`AARCH64_GIC_CPUI_BASE`	`3ffd_0000`	`3fff_0000`	128 KiB	vGIC
`AARCH64_GIC_DIST_BASE`	`3fff_0000`	`4000_0000`	64 KiB	vGIC
`AARCH64_AXI_BASE`	`4000_0000`			Seemingly unused? Is this hard-coded somewhere in the kernel?
`AARCH64_PVTIME_IPA_START`	`7fd0_0000`	`7fe0_0000`	64 KiB	Paravirtualized time
`AARCH64_PROTECTED_VM_FW_START`	`7fe0_0000`	`8000_0000`	2 MiB	pVM firmware (if running a protected VM)
`AARCH64_PHYS_MEM_START`	`8000_0000`		--mem size	RAM (starts at IPA = 2 GiB)
`plat_mmio_base`	after RAM	+0x800000	8 MiB	Platform device MMIO region
`high_mmio_base`	after plat_mmio	max phys addr		High MMIO allocation area

Layout when booting a kernel

These apply when no bootloader is passed, so crosvm boots a kernel directly.

Name/source link	Address	Size	Notes
`AARCH64_KERNEL_OFFSET`	`8080_0000`		Kernel load location in RAM
`initrd_addr`	after kernel		Linux initrd location in RAM
`fdt_offset`	before end of RAM	2 MiB	Flattened device tree in RAM

Layout when booting a bootloader

These apply when a bootloader is passed with --bios.

Name/source link	Address	End (exclusive)	Size	Notes
`AARCH64_FDT_OFFSET_IN_BIOS_MODE`	`8000_0000`	`8020_0000`	2 MiB	Flattened device tree in RAM
`AARCH64_BIOS_OFFSET`	`8020_0000`			Bootloader image in RAM