tag | aedc5c75b418461cd6ac8e15e38d9831a2571eeb | |
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tagger | The Android Open Source Project <initial-contribution@android.com> | Wed Apr 13 16:25:02 2022 -0700 |
object | d476dee7912174f75aa41f1a02fac34c44a2df17 |
Android Mainline 12.0.0 Release 59 (7993649,com.google.android.captiveportallogin)
commit | d476dee7912174f75aa41f1a02fac34c44a2df17 | [log] [tgz] |
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author | Xin Li <delphij@google.com> | Sat Feb 20 13:36:05 2021 +0000 |
committer | Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com> | Sat Feb 20 13:36:05 2021 +0000 |
tree | 61775889817f39fb6d1bdeb88fb5fafaee2971da | |
parent | c2b0225a045961da5588ed92a09ff6f8a8d94a01 [diff] | |
parent | 7c831673275ad137f81749388bed19ef74788903 [diff] |
[automerger skipped] Mark ab/7061308 as merged in stage. am: 6ca2549f6b -s ours am: dc6e6c148b -s ours am: 7c83167327 -s ours am skip reason: Change-Id I895e9e3bb0bec7fbd39e69112d11f68b9a9ad850 with SHA-1 126e8d4277 is in history Original change: undetermined MUST ONLY BE SUBMITTED BY AUTOMERGER Change-Id: Ie09312d4a4f5b8346357cf01233ab98e7466ad6c
cpuinfo is a library to detect essential for performance optimization information about host CPU.
Log processor name:
cpuinfo_initialize(); printf("Running on %s CPU\n", cpuinfo_get_package(0)->name);
Detect if target is a 32-bit or 64-bit ARM system:
#if CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64 /* 32-bit ARM-specific code here */ #endif
Check if the host CPU support ARM NEON
cpuinfo_initialize(); if (cpuinfo_has_arm_neon()) { neon_implementation(arguments); }
Check if the host CPU supports x86 AVX
cpuinfo_initialize(); if (cpuinfo_has_x86_avx()) { avx_implementation(arguments); }
Check if the thread runs on a Cortex-A53 core
cpuinfo_initialize(); switch (cpuinfo_get_current_core()->uarch) { case cpuinfo_uarch_cortex_a53: cortex_a53_implementation(arguments); break; default: generic_implementation(arguments); break; }
Get the size of level 1 data cache on the fastest core in the processor (e.g. big core in big.LITTLE ARM systems):
cpuinfo_initialize(); const size_t l1_size = cpuinfo_get_processor(0)->cache.l1d->size;
Pin thread to cores sharing L2 cache with the current core (Linux or Android)
cpuinfo_initialize(); cpu_set_t cpu_set; CPU_ZERO(&cpu_set); const struct cpuinfo_cache* current_l2 = cpuinfo_get_current_processor()->cache.l2; for (uint32_t i = 0; i < current_l2->processor_count; i++) { CPU_SET(cpuinfo_get_processor(current_l2->processor_start + i)->linux_id, &cpu_set); } pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpu_set);
/proc/cpuinfo
on ARMro.chipname
, ro.board.platform
, ro.product.board
, ro.mediatek.platform
, ro.arch
properties (Android)dmesg
) on ARM Linux/proc/cpuinfo
on 32-bit ARM EABI (Linux)FPSID
and WCID
registers (32-bit ARM)getauxval
(Linux/ARM)/proc/self/auxv
(Android/ARM)/proc/cpuinfo
(Linux/pre-ARMv7)sysctlbyname
(Mach)typology
directories (ARM/Linux)cache
directories (Linux)/proc/cpuinfo
(Linux)host_info
(Mach)GetLogicalProcessorInformationEx
(Windows)