Add -fnative-half-arguments-and-returns
Summary:
r246764 handled __fp16 arguments and returns for AAPCS, but skipped this
handling for OpenCL. Simlar to OpenCL, RenderScript also handles __fp16
type natively.
This patch adds the -fnative-half-arguments-and-returns command line
flag to allow such languages to skip this coercion of __fp16.
Reviewers: srhines, olista01
Subscribers: cfe-commits
Differential Revision: http://reviews.llvm.org/D18138
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@263795 91177308-0d34-0410-b5e6-96231b3b80d8
(cherry picked from commit a630229eafa7a45d95b1a9c6873bbaa415e4df0a)
Change-Id: I26a65c2c2a59e815d9d73ff294a8e20b12c641e6
diff --git a/include/clang/Basic/LangOptions.def b/include/clang/Basic/LangOptions.def
index 492f650..325a554 100644
--- a/include/clang/Basic/LangOptions.def
+++ b/include/clang/Basic/LangOptions.def
@@ -161,6 +161,7 @@
LANGOPT(OpenCL , 1, 0, "OpenCL")
LANGOPT(OpenCLVersion , 32, 0, "OpenCL version")
LANGOPT(NativeHalfType , 1, 0, "Native half type support")
+LANGOPT(NativeHalfArgsAndReturns, 1, 0, "Native half args and returns")
LANGOPT(HalfArgsAndReturns, 1, 0, "half args and returns")
LANGOPT(CUDA , 1, 0, "CUDA")
LANGOPT(OpenMP , 1, 0, "OpenMP support")
diff --git a/include/clang/Driver/CC1Options.td b/include/clang/Driver/CC1Options.td
index d7f42a9..57a9422 100644
--- a/include/clang/Driver/CC1Options.td
+++ b/include/clang/Driver/CC1Options.td
@@ -584,6 +584,8 @@
HelpText<"Control emission of RTTI data">;
def fnative_half_type: Flag<["-"], "fnative-half-type">,
HelpText<"Use the native half type for __fp16 instead of promoting to float">;
+def fnative_half_arguments_and_returns : Flag<["-"], "fnative-half-arguments-and-returns">,
+ HelpText<"Use the native __fp16 type for arguments and returns (and skip ABI-specific lowering)">;
def fallow_half_arguments_and_returns : Flag<["-"], "fallow-half-arguments-and-returns">,
HelpText<"Allow function arguments and returns of type half">;
diff --git a/lib/CodeGen/TargetInfo.cpp b/lib/CodeGen/TargetInfo.cpp
index 86adde4..38f3075 100644
--- a/lib/CodeGen/TargetInfo.cpp
+++ b/lib/CodeGen/TargetInfo.cpp
@@ -5001,7 +5001,7 @@
// __fp16 gets passed as if it were an int or float, but with the top 16 bits
// unspecified. This is not done for OpenCL as it handles the half type
// natively, and does not need to interwork with AAPCS code.
- if (Ty->isHalfType() && !getContext().getLangOpts().OpenCL) {
+ if (Ty->isHalfType() && !getContext().getLangOpts().NativeHalfArgsAndReturns) {
llvm::Type *ResType = IsEffectivelyAAPCS_VFP ?
llvm::Type::getFloatTy(getVMContext()) :
llvm::Type::getInt32Ty(getVMContext());
@@ -5197,7 +5197,7 @@
// __fp16 gets returned as if it were an int or float, but with the top 16
// bits unspecified. This is not done for OpenCL as it handles the half type
// natively, and does not need to interwork with AAPCS code.
- if (RetTy->isHalfType() && !getContext().getLangOpts().OpenCL) {
+ if (RetTy->isHalfType() && !getContext().getLangOpts().NativeHalfArgsAndReturns) {
llvm::Type *ResType = IsEffectivelyAAPCS_VFP ?
llvm::Type::getFloatTy(getVMContext()) :
llvm::Type::getInt32Ty(getVMContext());
diff --git a/lib/Frontend/CompilerInvocation.cpp b/lib/Frontend/CompilerInvocation.cpp
index 8481a73..d51a531 100644
--- a/lib/Frontend/CompilerInvocation.cpp
+++ b/lib/Frontend/CompilerInvocation.cpp
@@ -1359,6 +1359,7 @@
Opts.LaxVectorConversions = 0;
Opts.DefaultFPContract = 1;
Opts.NativeHalfType = 1;
+ Opts.NativeHalfArgsAndReturns = 1;
}
Opts.CUDA = IK == IK_CUDA || IK == IK_PreprocessedCuda ||
@@ -1715,7 +1716,11 @@
Opts.ModuleFeatures = Args.getAllArgValues(OPT_fmodule_feature);
std::sort(Opts.ModuleFeatures.begin(), Opts.ModuleFeatures.end());
Opts.NativeHalfType |= Args.hasArg(OPT_fnative_half_type);
- Opts.HalfArgsAndReturns = Args.hasArg(OPT_fallow_half_arguments_and_returns);
+ Opts.NativeHalfArgsAndReturns |= Args.hasArg(OPT_fnative_half_arguments_and_returns);
+ // Enable HalfArgsAndReturns if present in Args or if NativeHalfArgsAndReturns
+ // is enabled.
+ Opts.HalfArgsAndReturns = Args.hasArg(OPT_fallow_half_arguments_and_returns)
+ | Opts.NativeHalfArgsAndReturns;
Opts.GNUAsm = !Args.hasArg(OPT_fno_gnu_inline_asm);
// __declspec is enabled by default for the PS4 by the driver, and also
diff --git a/test/CodeGen/arm-fp16-arguments.c b/test/CodeGen/arm-fp16-arguments.c
index 15a9ceb..65f076a 100644
--- a/test/CodeGen/arm-fp16-arguments.c
+++ b/test/CodeGen/arm-fp16-arguments.c
@@ -1,5 +1,6 @@
// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi soft -fallow-half-arguments-and-returns -emit-llvm -o - -O1 %s | FileCheck %s --check-prefix=CHECK --check-prefix=SOFT
// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi hard -fallow-half-arguments-and-returns -emit-llvm -o - -O1 %s | FileCheck %s --check-prefix=CHECK --check-prefix=HARD
+// RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi soft -fnative-half-arguments-and-returns -emit-llvm -o - -O1 %s | FileCheck %s --check-prefix=NATIVE
__fp16 g;
@@ -10,12 +11,17 @@
// HARD: [[BITCAST:%.*]] = bitcast float [[PARAM]] to i32
// HARD: [[TRUNC:%.*]] = trunc i32 [[BITCAST]] to i16
// CHECK: store i16 [[TRUNC]], i16* bitcast (half* @g to i16*)
+// NATIVE: define void @t1(half [[PARAM:%.*]])
+// NATIVE: store half [[PARAM]], half* @g
__fp16 t2() { return g; }
// SOFT: define i32 @t2()
// HARD: define arm_aapcs_vfpcc float @t2()
+// NATIVE: define half @t2()
// CHECK: [[LOAD:%.*]] = load i16, i16* bitcast (half* @g to i16*)
// CHECK: [[ZEXT:%.*]] = zext i16 [[LOAD]] to i32
// SOFT: ret i32 [[ZEXT]]
// HARD: [[BITCAST:%.*]] = bitcast i32 [[ZEXT]] to float
// HARD: ret float [[BITCAST]]
+// NATIVE: [[LOAD:%.*]] = load half, half* @g
+// NATIVE: ret half [[LOAD]]
