# Copyright 2020 Google LLC
#
# This source code is licensed under the BSD-style license found in the
# LICENSE file in the root directory of this source tree.
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_4x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_5x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_6x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__neon_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_1x4
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_2x4
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_3x4
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_4x4
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_5x4
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_6x4
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_1x4_acc2
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_1x4_acc3
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_1x4_acc4
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__neonfma_2x4_acc2
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_4x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neon_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_2x4
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_3x4
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_4x4
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4_acc2
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4_acc3
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_1x4_acc4
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__neonfma_2x4_acc2
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_4x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_5x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc5
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_2x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_3x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_4x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_2x4
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_3x4
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_4x4
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_5x4
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc2
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc3
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc4
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc5
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_2x4_acc2
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_2x4_acc3
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_3x4_acc2
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_4x4_acc2
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_1x4_acc5
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_2x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neon_3x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_3x4
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc2
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc3
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc4
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_1x4_acc5
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4_acc2
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_2x4_acc3
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__neonfma_3x4_acc2
  arch:
    - aarch64
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_4x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_5x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_6x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__sse_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_4x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__sse_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_4x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_5x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_1x4_acc5
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_2x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_3x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__sse_4x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_1x4_acc5
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_2x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__sse_3x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_4x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_5x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_6x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__ssse3_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_4x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_5x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_6x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_splat_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_4x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_5x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_6x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_splat_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_4x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_5x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_6x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_arm_loadsplat_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_4x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_5x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_6x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__wasmsimd_x86_loadsplat_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_4x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_loadsplat_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_4x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_loadsplat_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_4x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_arm_splat_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_4x4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__wasmsimd_x86_splat_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc5
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_2x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_3x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_4x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_4x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_5x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc5
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_2x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_3x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_4x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_4x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_5x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc5
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_2x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_3x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_4x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_4x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_5x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc5
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_2x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_3x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_4x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_4x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_5x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_1x4_acc5
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_2x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_loadsplat_3x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_1x4_acc5
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_2x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_loadsplat_3x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_1x4_acc5
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_2x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_arm_splat_3x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_3x4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_1x4_acc5
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_2x4_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__wasmsimd_x86_splat_3x4_acc2
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- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_3x1
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_4x1
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_5x1
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_6x1
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_1x1_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_1x1_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_1x1_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3p1__scalar_2x1_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_1x1
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_2x1
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_3x1
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- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_1x1_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_1x1_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_3x3s2p1__scalar_2x1_acc2
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- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_3x1
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_1x1_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_1x1_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_1x1_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_1x1_acc5
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- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_2x1_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5p2__scalar_3x1_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_2x1
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_3x1
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1_acc4
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_1x1_acc5
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_2x1_acc2
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_2x1_acc3
- name: xnn_f32_dwconv2d_chw_ukernel_5x5s2p2__scalar_3x1_acc2