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a64_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst/
a64_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst/
a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/
a64_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst/
a64_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst/
a64_fp16_nhwc_generic_output9_mla_depthfirst/
a64_fp16_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst/
a64_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/
a64_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst/
a64_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst/
a64_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/
a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/
a64_fp32_nhwc_generic_output9_mla_depthfirst/
a64_fp32_packed_to_nhwc_3x3_s2_with_multiplier_output3x3_mla_depthfirst/
a64_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst/
a64_fp32_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst/
a64_s8q_nhwc_3x3_s1_output2x2_dot_depthfirst/
a64_s8q_nhwc_3x3_s1_output2x2_mla_depthfirst/
a64_s8q_nhwc_3x3_s2_output2x2_mla_depthfirst/
a64_s8q_nhwc_5x5_s1_output2x2_mla_depthfirst/
a64_s8q_nhwc_generic_output9_mla_depthfirst/
a64_s8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst/
a64_s8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst/
a64_s8q_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst/
a64_s8qs_nhwc_3x3_s1_output2x2_dot_depthfirst/
a64_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst/
a64_u8q_nhwc_3x3_s1_output2x2_mla_depthfirst/
a64_u8q_nhwc_3x3_s2_output2x2_mla_depthfirst/
a64_u8q_nhwc_5x5_s1_output2x2_mla_depthfirst/
a64_u8q_nhwc_generic_output9_mla_depthfirst/
a64_u8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst/
a64_u8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst/
a64_u8q_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst/
a64_u8qa_nhwc_3x3_s1_output2x2_mla_depthfirst/
a64_u8qa_nhwc_3x3_s2_output2x2_mla_depthfirst/
a64_u8qa_nhwc_5x5_s1_output2x2_mla_depthfirst/
a64_u8s8u8q_nhwc_3x3_s1_output2x2_mla_depthfirst/
a64_u8s8u8q_nhwc_3x3_s2_output2x2_mla_depthfirst/
a64_u8s8u8q_nhwc_5x5_s1_output2x2_mla_depthfirst/
a64_u8s8u8q_nhwc_generic_output9_mla_depthfirst/
a64_u8s8u8q_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst/
sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/
sme2_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst/
sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst/
sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/
sme2_fp32_planar_3x3_s1_4rows_mla_za/
sme2_fp32_planar_3x3_s2_4rows_mla_za/
sme2_fp32_planar_5x5_s1_4rows_mla_za/
sme2_fp32_planar_5x5_s2_4rows_mla_za/
sme2_fp32bf16fp32_planar_3x3_s1_4rows_dot_za/
sme2_fp32bf16fp32_planar_3x3_s2_4rows_dot_za/
sme2_fp32bf16fp32_planar_5x5_s1_4rows_dot_za/
sme2_fp32bf16fp32_planar_5x5_s2_4rows_dot_za/
sme2_s8q_planar_3x3_s1_4rows_dot_za/
sme2_s8q_planar_3x3_s2_2rows_dot_za/
sme2_s8q_planar_3x3_s2_4rows_dot_za/
sme2_s8q_planar_5x5_s1_4rows_dot_za/
sme2_s8q_planar_5x5_s2_4rows_dot_za/
sme2_u8q_planar_3x3_s1_4rows_dot_za/
sme2_u8q_planar_3x3_s2_2rows_dot_za/
sme2_u8q_planar_3x3_s2_4rows_dot_za/
sme2_u8q_planar_5x5_s1_4rows_dot_za/
sme2_u8q_planar_5x5_s2_4rows_dot_za/
sme2_u8s8u8q_planar_3x3_s1_4rows_dot_za/
sme2_u8s8u8q_planar_3x3_s2_2rows_dot_za/
sme2_u8s8u8q_planar_3x3_s2_4rows_dot_za/
sme2_u8s8u8q_planar_5x5_s1_4rows_dot_za/
sme2_u8s8u8q_planar_5x5_s2_4rows_dot_za/
sve_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst/
sve_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst/
sve_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/
sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst/
sve_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst/
sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/
sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_strided/
sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst/
sve_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst/
sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/
sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/
sve_fp32_nhwc_generic_output9_mla_depthfirst/
sve_fp32_packed_to_nhwc_3x3_s2_with_multiplier_output3x3_mla_depthfirst/
sve_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst/
sve_fp32_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst/
sve_s8q_nhwc_3x3_s1_output2x2_dot_depthfirst/
sve_s8q_nhwc_3x3_s1_output2x2_mla_depthfirst/
sve_s8q_nhwc_3x3_s2_output2x2_mla_depthfirst/
sve_s8q_nhwc_5x5_s1_output2x2_mla_depthfirst/
sve_s8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst/
sve_s8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst/
sve_s8qs_nhwc_3x3_s1_output2x2_dot_depthfirst/
sve_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst/
sve_u8q_nhwc_3x3_s1_output2x2_mla_depthfirst/
sve_u8q_nhwc_3x3_s2_output2x2_mla_depthfirst/
sve_u8q_nhwc_5x5_s1_output2x2_mla_depthfirst/
sve_u8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst/
sve_u8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst/
sve_u8s8u8q_nhwc_3x3_s1_output2x2_mla_depthfirst/
sve_u8s8u8q_nhwc_3x3_s2_output2x2_mla_depthfirst/
sve_u8s8u8q_nhwc_5x5_s1_output2x2_mla_depthfirst/
a64_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp
a64_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst.hpp
a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst.hpp
a64_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp
a64_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp
a64_fp16_nhwc_generic_output9_mla_depthfirst.hpp
a64_fp16_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst.hpp
a64_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp
a64_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst.hpp
a64_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst.hpp
a64_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp
a64_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp
a64_fp32_nhwc_generic_output9_mla_depthfirst.hpp
a64_fp32_packed_to_nhwc_3x3_s2_with_multiplier_output3x3_mla_depthfirst.hpp
a64_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst.hpp
a64_fp32_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst.hpp
a64_s8q_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp
a64_s8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp
a64_s8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp
a64_s8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp
a64_s8q_nhwc_generic_output9_mla_depthfirst.hpp
a64_s8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst.hpp
a64_s8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst.hpp
a64_s8q_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst.hpp
a64_s8qs_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp
a64_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp
a64_u8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp
a64_u8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp
a64_u8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp
a64_u8q_nhwc_generic_output9_mla_depthfirst.hpp
a64_u8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst.hpp
a64_u8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst.hpp
a64_u8q_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst.hpp
a64_u8qa_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp
a64_u8qa_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp
a64_u8qa_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp
a64_u8s8u8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp
a64_u8s8u8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp
a64_u8s8u8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp
a64_u8s8u8q_nhwc_generic_output9_mla_depthfirst.hpp
a64_u8s8u8q_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst.hpp
sme2_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp
sme2_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst.hpp
sme2_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst.hpp
sme2_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp
sme2_fp32_planar_3x3_s1_4rows_mla_za.hpp
sme2_fp32_planar_3x3_s2_4rows_mla_za.hpp
sme2_fp32_planar_5x5_s1_4rows_mla_za.hpp
sme2_fp32_planar_5x5_s2_4rows_mla_za.hpp
sme2_fp32bf16fp32_planar_3x3_s1_4rows_dot_za.hpp
sme2_fp32bf16fp32_planar_3x3_s2_4rows_dot_za.hpp
sme2_fp32bf16fp32_planar_5x5_s1_4rows_dot_za.hpp
sme2_fp32bf16fp32_planar_5x5_s2_4rows_dot_za.hpp
sme2_s8q_planar_3x3_s1_4rows_dot_za.hpp
sme2_s8q_planar_3x3_s2_4rows_dot_za.hpp
sme2_s8q_planar_5x5_s1_4rows_dot_za.hpp
sme2_s8q_planar_5x5_s2_4rows_dot_za.hpp
sme2_u8q_planar_3x3_s1_4rows_dot_za.hpp
sme2_u8q_planar_3x3_s2_4rows_dot_za.hpp
sme2_u8q_planar_5x5_s1_4rows_dot_za.hpp
sme2_u8q_planar_5x5_s2_4rows_dot_za.hpp
sme2_u8s8u8q_planar_3x3_s1_4rows_dot_za.hpp
sme2_u8s8u8q_planar_3x3_s2_4rows_dot_za.hpp
sme2_u8s8u8q_planar_5x5_s1_4rows_dot_za.hpp
sme2_u8s8u8q_planar_5x5_s2_4rows_dot_za.hpp
sve_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp
sve_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst.hpp
sve_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst.hpp
sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp
sve_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp
sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp
sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_strided.hpp
sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst.hpp
sve_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst.hpp
sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp
sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp
sve_fp32_nhwc_generic_output9_mla_depthfirst.hpp
sve_fp32_packed_to_nhwc_3x3_s2_with_multiplier_output3x3_mla_depthfirst.hpp
sve_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst.hpp
sve_fp32_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst.hpp
sve_s8q_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp
sve_s8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp
sve_s8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp
sve_s8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp
sve_s8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst.hpp
sve_s8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst.hpp
sve_s8qs_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp
sve_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp
sve_u8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp
sve_u8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp
sve_u8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp
sve_u8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst.hpp
sve_u8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst.hpp
sve_u8s8u8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp
sve_u8s8u8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp
sve_u8s8u8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp